diff --git a/sys/arm64/apple/apple_aic.c b/sys/arm64/apple/apple_aic.c
--- a/sys/arm64/apple/apple_aic.c
+++ b/sys/arm64/apple/apple_aic.c
@@ -139,10 +139,15 @@
 	struct apple_aic_irqsrc	sc_ipi_srcs[AIC_NIPIS];
 	u_int			*sc_cpuids;	/* cpu index to AIC CPU ID */
 	uint32_t		*sc_ipimasks;
+#else
+	u_int			sc_cpuid;	/* BSP's AIC CPU ID */
 #endif
 };
 
+#ifdef SMP
+/* Used purely for IRQ load-balancing in SMP configurations. */
 static u_int aic_next_cpu;
+#endif
 
 static device_probe_t apple_aic_probe;
 static device_attach_t apple_aic_attach;
@@ -187,7 +192,10 @@
 	const char *name;
 	intptr_t xref;
 	int error, rid;
-	u_int i, cpu, j, info;
+	u_int i, j, info;
+#ifdef SMP
+	u_int cpu;
+#endif
 
 	sc = device_get_softc(dev);
 	sc->sc_dev = dev;
@@ -223,6 +231,12 @@
 	if (bootverbose)
 		device_printf(dev, "BSP CPU %d: whoami %x\n", cpu,
 		    sc->sc_cpuids[cpu]);
+#else
+	sc->sc_cpuid = bus_read_4(sc->sc_mem, AIC_WHOAMI);
+	if (bootverbose)
+		device_printf(dev, "BSP CPU %d: whoami %x\n",
+		    PCPU_GET(cpuid),
+		    sc->sc_cpuid);
 #endif
 
 
@@ -370,7 +384,7 @@
 	enum intr_trigger trig;
 	enum intr_polarity pol;
 	int error;
-	u_int die, irq;
+	u_int cpu, die, irq;
 
 	sc = device_get_softc(dev);
 	ai = (struct apple_aic_irqsrc *)isrc;
@@ -409,9 +423,13 @@
 	switch (type) {
 	case AIC_TYPE_IRQ:
 		/* XXX die sensitive? */
+#ifdef SMP
+		cpu = sc->sc_cpuids[aic_next_cpu];
 		aic_next_cpu = intr_irq_next_cpu(aic_next_cpu, &all_cpus);
-		bus_write_4(sc->sc_mem, AIC_TARGET_CPU(irq),
-		    1 << sc->sc_cpuids[aic_next_cpu]);
+#else
+		cpu = sc->sc_cpuid;
+#endif
+		bus_write_4(sc->sc_mem, AIC_TARGET_CPU(irq), 1 << cpu);
 		break;
 	case AIC_TYPE_FIQ:
 		isrc->isrc_flags |= INTR_ISRCF_PPI;