diff --git a/sys/dev/iavf/iavf_lib.c b/sys/dev/iavf/iavf_lib.c
--- a/sys/dev/iavf/iavf_lib.c
+++ b/sys/dev/iavf/iavf_lib.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause */
-/*  Copyright (c) 2021, Intel Corporation
+/*  Copyright (c) 2024, Intel Corporation
  *  All rights reserved.
  *
  *  Redistribution and use in source and binary forms, with or without
@@ -1479,10 +1479,11 @@
 {
 	struct pci_devinfo *dinfo;
 	u32 msix_ctrl;
+	u8 msix_location;
 
 	dinfo = (struct pci_devinfo *)device_get_ivars(dev);
-	/* We can hardcode this offset since we know the device */
-	msix_ctrl = pci_read_config(dev, 0x70 + PCIR_MSIX_CTRL, 2);
+	msix_location = dinfo->cfg.msix.msix_location;
+	msix_ctrl = pci_read_config(dev, msix_location + PCIR_MSIX_CTRL, 2);
 	dinfo->cfg.msix.msix_ctrl = msix_ctrl;
 	dinfo->cfg.msix.msix_msgnum = (msix_ctrl & PCIM_MSIXCTRL_TABLE_SIZE) + 1;
 }
diff --git a/sys/dev/iavf/if_iavf_iflib.c b/sys/dev/iavf/if_iavf_iflib.c
--- a/sys/dev/iavf/if_iavf_iflib.c
+++ b/sys/dev/iavf/if_iavf_iflib.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause */
-/*  Copyright (c) 2021, Intel Corporation
+/*  Copyright (c) 2024, Intel Corporation
  *  All rights reserved.
  *
  *  Redistribution and use in source and binary forms, with or without
@@ -370,7 +370,7 @@
 	}
 	scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0]
 	    * sizeof(union iavf_32byte_rx_desc), DBA_ALIGN);
-	scctx->isc_msix_bar = PCIR_BAR(IAVF_MSIX_BAR);
+	scctx->isc_msix_bar = pci_msix_table_bar(dev);
 	scctx->isc_tx_nsegments = IAVF_MAX_TX_SEGS;
 	scctx->isc_tx_tso_segments_max = IAVF_MAX_TSO_SEGS;
 	scctx->isc_tx_tso_size_max = IAVF_TSO_SIZE;