diff --git a/sysutils/u-boot-beagleplay-r5/Makefile b/sysutils/u-boot-beagleplay-r5/Makefile new file mode 100644 --- /dev/null +++ b/sysutils/u-boot-beagleplay-r5/Makefile @@ -0,0 +1,12 @@ +MASTERDIR= ${.CURDIR}/../u-boot-master + +MODEL= beagleplay_r5 +BOARD_CONFIG= am62x_beagleplay_r5_defconfig +FAMILY= k3r5 + +CONFIG_FRAGMENT= ${.CURDIR}/files/bp_fragment +FRAGMENT_NAME= bp_fragment + +EXTRA_PATCHES= ${.CURDIR}/files/ + +.include "${MASTERDIR}/Makefile" diff --git a/sysutils/u-boot-beagleplay-r5/files/bp_fragment b/sysutils/u-boot-beagleplay-r5/files/bp_fragment new file mode 100644 --- /dev/null +++ b/sysutils/u-boot-beagleplay-r5/files/bp_fragment @@ -0,0 +1,13 @@ +# Defconfig fragment to apply on top of: +# am62x_evm_r5_defconfig +# +CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-beagleplay" +CONFIG_OF_LIST="k3-am625-r5-beagleplay" +CONFIG_SPL_OF_LIST="k3-am625-r5-beagleplay" +# Do not use emmc boot - we will use FS only +CONFIG_SUPPORT_EMMC_BOOT=n +# No SPI flash on Beagleplay +CONFIG_SPI=n +CONFIG_SPI_FLASH=n +CONFIG_SPL_DM_SPI_FLASH=n +CONFIG_SPL_SPI_FLASH_SUPPORT=n diff --git a/sysutils/u-boot-beagleplay-r5/files/patch-arch_arm_mach__k3_include_mach_am62__hardware.h b/sysutils/u-boot-beagleplay-r5/files/patch-arch_arm_mach__k3_include_mach_am62__hardware.h new file mode 100644 --- /dev/null +++ b/sysutils/u-boot-beagleplay-r5/files/patch-arch_arm_mach__k3_include_mach_am62__hardware.h @@ -0,0 +1,12 @@ +--- arch/arm/mach-k3/include/mach/am62_hardware.h.orig 2024-04-02 12:58:58.000000000 +0200 ++++ arch/arm/mach-k3/include/mach/am62_hardware.h 2024-07-16 03:53:56.233728000 +0200 +@@ -75,6 +75,9 @@ + + #define CTRLMMR_MCU_RST_CTRL (MCU_CTRL_MMR0_BASE + 0x18170) + ++/* Debounce register configuration */ ++#define CTRLMMR_DBOUNCE_CFG(index) (MCU_CTRL_MMR0_BASE + 0x4080 + (index * 4)) ++ + #define ROM_EXTENDED_BOOT_DATA_INFO 0x43c3f1e0 + + #define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000 diff --git a/sysutils/u-boot-beagleplay-r5/files/patch-board_beagle_beagleplay_beagleplay.c b/sysutils/u-boot-beagleplay-r5/files/patch-board_beagle_beagleplay_beagleplay.c new file mode 100644 --- /dev/null +++ b/sysutils/u-boot-beagleplay-r5/files/patch-board_beagle_beagleplay_beagleplay.c @@ -0,0 +1,77 @@ +--- board/beagle/beagleplay/beagleplay.c.orig 2024-04-02 12:58:58.000000000 +0200 ++++ board/beagle/beagleplay/beagleplay.c 2024-07-16 04:32:11.621899000 +0200 +@@ -11,6 +11,8 @@ + #include + #include + ++#include ++ + DECLARE_GLOBAL_DATA_PTR; + + int board_init(void) +@@ -27,6 +29,65 @@ + { + return fdtdec_setup_memory_banksize(); + } ++ ++#ifdef CONFIG_SPL_BOARD_INIT ++ ++/* ++ * Enable the 32k Crystal: needed for accurate 32k clock ++ * and external clock sources such as wlan 32k input clock ++ * supplied from the SoC to the wlan chip. ++ * ++ * The trim setup can be very highly board type specific choice of the crystal ++ * So this is done in the board file, though, in this case, no specific trim ++ * is necessary. ++ */ ++static void crystal_32k_enable(void) ++{ ++ /* Only mess with 32k at the start of boot from R5 */ ++ if (IS_ENABLED(CONFIG_CPU_V7R)) { ++ /* ++ * We have external 32k crystal, so lets enable it (0x0) ++ * and disable bypass (0x0) ++ */ ++ writel(0x0, MCU_CTRL_LFXOSC_CTRL); ++ ++ /* Add any crystal specific TRIM needed here.. */ ++ ++ /* Make sure to mux the SoC 32k from the crystal */ ++ writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL, ++ MCU_CTRL_DEVICE_CLKOUT_32K_CTRL); ++ } ++} ++ ++static void debounce_configure(void) ++{ ++ /* Configure debounce one time from R5 */ ++ if (IS_ENABLED(CONFIG_CPU_V7R)) { ++ /* ++ * Setup debounce time registers. ++ * arbitrary values. Times are approx ++ */ ++ /* 1.9ms debounce @ 32k */ ++ writel(0x1, CTRLMMR_DBOUNCE_CFG(1)); ++ /* 5ms debounce @ 32k */ ++ writel(0x5, CTRLMMR_DBOUNCE_CFG(2)); ++ /* 20ms debounce @ 32k */ ++ writel(0x14, CTRLMMR_DBOUNCE_CFG(3)); ++ /* 46ms debounce @ 32k */ ++ writel(0x18, CTRLMMR_DBOUNCE_CFG(4)); ++ /* 100ms debounce @ 32k */ ++ writel(0x1c, CTRLMMR_DBOUNCE_CFG(5)); ++ /* 156ms debounce @ 32k */ ++ writel(0x1f, CTRLMMR_DBOUNCE_CFG(6)); ++ } ++} ++ ++void spl_board_init(void) ++{ ++ crystal_32k_enable(); ++ debounce_configure(); ++} ++#endif + + #ifdef CONFIG_BOARD_LATE_INIT + int board_late_init(void) diff --git a/sysutils/u-boot-beagleplay-r5/files/patch-board_beagle_beagleplay_beagleplay.env b/sysutils/u-boot-beagleplay-r5/files/patch-board_beagle_beagleplay_beagleplay.env new file mode 100644 --- /dev/null +++ b/sysutils/u-boot-beagleplay-r5/files/patch-board_beagle_beagleplay_beagleplay.env @@ -0,0 +1,10 @@ +--- board/beagle/beagleplay/beagleplay.env.orig 2024-04-02 12:58:58.000000000 +0200 ++++ board/beagle/beagleplay/beagleplay.env 2024-07-16 04:40:11.571810000 +0200 +@@ -13,6 +13,6 @@ + mmcdev=1 + bootpart=1:1 + bootdir=/boot +-boot_targets=mmc1 mmc0 usb pxe ++boot_targets=mmc1 mmc0 + bootmeths=script extlinux efi pxe + rd_spec=- diff --git a/sysutils/u-boot-beagleplay-r5/files/patch-configs_am62x__beagleplay__r5__defconfig b/sysutils/u-boot-beagleplay-r5/files/patch-configs_am62x__beagleplay__r5__defconfig new file mode 100644 --- /dev/null +++ b/sysutils/u-boot-beagleplay-r5/files/patch-configs_am62x__beagleplay__r5__defconfig @@ -0,0 +1,10 @@ +--- configs/am62x_beagleplay_r5_defconfig.orig 2024-04-02 12:58:58.000000000 +0200 ++++ configs/am62x_beagleplay_r5_defconfig 2024-07-16 04:45:50.230972000 +0200 +@@ -36,6 +36,7 @@ + CONFIG_SPL_BSS_START_ADDR=0x43c3b000 + CONFIG_SPL_BSS_MAX_SIZE=0x3000 + CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y ++CONFIG_SPL_BOARD_INIT=y + CONFIG_SPL_SYS_MALLOC_SIMPLE=y + CONFIG_SPL_STACK_R=y + CONFIG_SPL_SEPARATE_BSS=y diff --git a/sysutils/u-boot-beagleplay-r5/pkg-descr b/sysutils/u-boot-beagleplay-r5/pkg-descr new file mode 100644 --- /dev/null +++ b/sysutils/u-boot-beagleplay-r5/pkg-descr @@ -0,0 +1 @@ +U-Boot loader for BeaglePlay-r5 part of the AM625 SoC