diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -1620,12 +1620,12 @@ #define PAR_S_MASK (0x1 << PAR_S_SHIFT) /* PMBIDR_EL1 */ -#define PMBIDR_EL1 MRS_REG(PMBIDR_EL1) -#define PMBIDR_EL1_op0 0x3 -#define PMBIDR_EL1_op1 0x0 -#define PMBIDR_EL1_CRn 0x9 -#define PMBIDR_EL1_CRm 0xa -#define PMBIDR_EL1_op2 0x7 +#define PMBIDR_EL1 MRS_REG_ALT_NAME(PMBIDR_EL1) +#define PMBIDR_EL1_op0 3 +#define PMBIDR_EL1_op1 0 +#define PMBIDR_EL1_CRn 9 +#define PMBIDR_EL1_CRm 10 +#define PMBIDR_EL1_op2 7 #define PMBIDR_Align_SHIFT 0 #define PMBIDR_Align_MASK (UL(0xf) << PMBIDR_Align_SHIFT) #define PMBIDR_P_SHIFT 4 @@ -1634,12 +1634,12 @@ #define PMBIDR_F (UL(0x1) << PMBIDR_F_SHIFT) /* PMBLIMITR_EL1 */ -#define PMBLIMITR_EL1 MRS_REG(PMBLIMITR_EL1) -#define PMBLIMITR_EL1_op0 0x3 -#define PMBLIMITR_EL1_op1 0x0 -#define PMBLIMITR_EL1_CRn 0x9 -#define PMBLIMITR_EL1_CRm 0xa -#define PMBLIMITR_EL1_op2 0x0 +#define PMBLIMITR_EL1 MRS_REG_ALT_NAME(PMBLIMITR_EL1) +#define PMBLIMITR_EL1_op0 3 +#define PMBLIMITR_EL1_op1 0 +#define PMBLIMITR_EL1_CRn 9 +#define PMBLIMITR_EL1_CRm 10 +#define PMBLIMITR_EL1_op2 0 #define PMBLIMITR_E_SHIFT 0 #define PMBLIMITR_E (UL(0x1) << PMBLIMITR_E_SHIFT) #define PMBLIMITR_FM_SHIFT 1 @@ -1651,23 +1651,23 @@ (UL(0xfffffffffffff) << PMBLIMITR_LIMIT_SHIFT) /* PMBPTR_EL1 */ -#define PMBPTR_EL1 MRS_REG(PMBPTR_EL1) -#define PMBPTR_EL1_op0 0x3 -#define PMBPTR_EL1_op1 0x0 -#define PMBPTR_EL1_CRn 0x9 -#define PMBPTR_EL1_CRm 0xa -#define PMBPTR_EL1_op2 0x1 +#define PMBPTR_EL1 MRS_REG_ALT_NAME(PMBPTR_EL1) +#define PMBPTR_EL1_op0 3 +#define PMBPTR_EL1_op1 0 +#define PMBPTR_EL1_CRn 9 +#define PMBPTR_EL1_CRm 10 +#define PMBPTR_EL1_op2 1 #define PMBPTR_PTR_SHIFT 0 #define PMBPTR_PTR_MASK \ (UL(0xffffffffffffffff) << PMBPTR_PTR_SHIFT) /* PMBSR_EL1 */ -#define PMBSR_EL1 MRS_REG(PMBSR_EL1) -#define PMBSR_EL1_op0 0x3 -#define PMBSR_EL1_op1 0x0 -#define PMBSR_EL1_CRn 0x9 -#define PMBSR_EL1_CRm 0xa -#define PMBSR_EL1_op2 0x3 +#define PMBSR_EL1 MRS_REG_ALT_NAME(PMBSR_EL1) +#define PMBSR_EL1_op0 3 +#define PMBSR_EL1_op1 0 +#define PMBSR_EL1_CRn 9 +#define PMBSR_EL1_CRm 10 +#define PMBSR_EL1_op2 3 #define PMBSR_MSS_SHIFT 0 #define PMBSR_MSS_MASK (UL(0xffff) << PMBSR_MSS_SHIFT) #define PMBSR_COLL_SHIFT 16 @@ -1832,12 +1832,12 @@ #define PMOVSSET_EL0_op2 3 /* PMSCR_EL1 */ -#define PMSCR_EL1 MRS_REG(PMSCR_EL1) -#define PMSCR_EL1_op0 0x3 -#define PMSCR_EL1_op1 0x0 -#define PMSCR_EL1_CRn 0x9 -#define PMSCR_EL1_CRm 0x9 -#define PMSCR_EL1_op2 0x0 +#define PMSCR_EL1 MRS_REG_ALT_NAME(PMSCR_EL1) +#define PMSCR_EL1_op0 3 +#define PMSCR_EL1_op1 0 +#define PMSCR_EL1_CRn 9 +#define PMSCR_EL1_CRm 9 +#define PMSCR_EL1_op2 0 #define PMSCR_E0SPE_SHIFT 0 #define PMSCR_E0SPE (UL(0x1) << PMSCR_E0SPE_SHIFT) #define PMSCR_E1SPE_SHIFT 1 @@ -1861,20 +1861,20 @@ #define PMSELR_SEL_MASK 0x1f /* PMSEVFR_EL1 */ -#define PMSEVFR_EL1 MRS_REG(PMSEVFR_EL1) -#define PMSEVFR_EL1_op0 0x3 -#define PMSEVFR_EL1_op1 0x0 -#define PMSEVFR_EL1_CRn 0x9 -#define PMSEVFR_EL1_CRm 0x9 -#define PMSEVFR_EL1_op2 0x5 +#define PMSEVFR_EL1 MRS_REG_ALT_NAME(PMSEVFR_EL1) +#define PMSEVFR_EL1_op0 3 +#define PMSEVFR_EL1_op1 0 +#define PMSEVFR_EL1_CRn 9 +#define PMSEVFR_EL1_CRm 9 +#define PMSEVFR_EL1_op2 5 /* PMSFCR_EL1 */ -#define PMSFCR_EL1 MRS_REG(PMSFCR_EL1) -#define PMSFCR_EL1_op0 0x3 -#define PMSFCR_EL1_op1 0x0 -#define PMSFCR_EL1_CRn 0x9 -#define PMSFCR_EL1_CRm 0x9 -#define PMSFCR_EL1_op2 0x4 +#define PMSFCR_EL1 MRS_REG_ALT_NAME(PMSFCR_EL1) +#define PMSFCR_EL1_op0 3 +#define PMSFCR_EL1_op1 0 +#define PMSFCR_EL1_CRn 9 +#define PMSFCR_EL1_CRm 9 +#define PMSFCR_EL1_op2 4 #define PMSFCR_FE_SHIFT 0 #define PMSFCR_FE (UL(0x1) << PMSFCR_FE_SHIFT) #define PMSFCR_FT_SHIFT 1 @@ -1891,24 +1891,24 @@ #define PMSFCR_ST (UL(0x1) << PMSFCR_ST_SHIFT) /* PMSICR_EL1 */ -#define PMSICR_EL1 MRS_REG(PMSICR_EL1) -#define PMSICR_EL1_op0 0x3 -#define PMSICR_EL1_op1 0x0 -#define PMSICR_EL1_CRn 0x9 -#define PMSICR_EL1_CRm 0x9 -#define PMSICR_EL1_op2 0x2 +#define PMSICR_EL1 MRS_REG_ALT_NAME(PMSICR_EL1) +#define PMSICR_EL1_op0 3 +#define PMSICR_EL1_op1 0 +#define PMSICR_EL1_CRn 9 +#define PMSICR_EL1_CRm 9 +#define PMSICR_EL1_op2 2 #define PMSICR_COUNT_SHIFT 0 #define PMSICR_COUNT_MASK (UL(0xffffffff) << PMSICR_COUNT_SHIFT) #define PMSICR_ECOUNT_SHIFT 56 #define PMSICR_ECOUNT_MASK (UL(0xff) << PMSICR_ECOUNT_SHIFT) /* PMSIDR_EL1 */ -#define PMSIDR_EL1 MRS_REG(PMSIDR_EL1) -#define PMSIDR_EL1_op0 0x3 -#define PMSIDR_EL1_op1 0x0 -#define PMSIDR_EL1_CRn 0x9 -#define PMSIDR_EL1_CRm 0x9 -#define PMSIDR_EL1_op2 0x7 +#define PMSIDR_EL1 MRS_REG_ALT_NAME(PMSIDR_EL1) +#define PMSIDR_EL1_op0 3 +#define PMSIDR_EL1_op1 0 +#define PMSIDR_EL1_CRn 9 +#define PMSIDR_EL1_CRm 9 +#define PMSIDR_EL1_op2 7 #define PMSIDR_FE_SHIFT 0 #define PMSIDR_FE (UL(0x1) << PMSIDR_FE_SHIFT) #define PMSIDR_FT_SHIFT 1 @@ -1935,34 +1935,34 @@ #define PMSIDR_PBT (UL(0x1) << PMSIDR_PBT_SHIFT) /* PMSIRR_EL1 */ -#define PMSIRR_EL1 MRS_REG(PMSIRR_EL1) -#define PMSIRR_EL1_op0 0x3 -#define PMSIRR_EL1_op1 0x0 -#define PMSIRR_EL1_CRn 0x9 -#define PMSIRR_EL1_CRm 0x9 -#define PMSIRR_EL1_op2 0x3 +#define PMSIRR_EL1 MRS_REG_ALT_NAME(PMSIRR_EL1) +#define PMSIRR_EL1_op0 3 +#define PMSIRR_EL1_op1 0 +#define PMSIRR_EL1_CRn 9 +#define PMSIRR_EL1_CRm 9 +#define PMSIRR_EL1_op2 3 #define PMSIRR_RND_SHIFT 0 #define PMSIRR_RND (UL(0x1) << PMSIRR_RND_SHIFT) #define PMSIRR_INTERVAL_SHIFT 8 #define PMSIRR_INTERVAL_MASK (UL(0xffffff) << PMSIRR_INTERVAL_SHIFT) /* PMSLATFR_EL1 */ -#define PMSLATFR_EL1 MRS_REG(PMSLATFR_EL1) -#define PMSLATFR_EL1_op0 0x3 -#define PMSLATFR_EL1_op1 0x0 -#define PMSLATFR_EL1_CRn 0x9 -#define PMSLATFR_EL1_CRm 0x9 -#define PMSLATFR_EL1_op2 0x6 +#define PMSLATFR_EL1 MRS_REG_ALT_NAME(PMSLATFR_EL1) +#define PMSLATFR_EL1_op0 3 +#define PMSLATFR_EL1_op1 0 +#define PMSLATFR_EL1_CRn 9 +#define PMSLATFR_EL1_CRm 9 +#define PMSLATFR_EL1_op2 6 #define PMSLATFR_MINLAT_SHIFT 0 #define PMSLATFR_MINLAT_MASK (UL(0xfff) << PMSLATFR_MINLAT_SHIFT) /* PMSNEVFR_EL1 */ -#define PMSNEVFR_EL1 MRS_REG(PMSNEVFR_EL1) -#define PMSNEVFR_EL1_op0 0x3 -#define PMSNEVFR_EL1_op1 0x0 -#define PMSNEVFR_EL1_CRn 0x9 -#define PMSNEVFR_EL1_CRm 0x9 -#define PMSNEVFR_EL1_op2 0x1 +#define PMSNEVFR_EL1 MRS_REG_ALT_NAME(PMSNEVFR_EL1) +#define PMSNEVFR_EL1_op0 3 +#define PMSNEVFR_EL1_op1 0 +#define PMSNEVFR_EL1_CRn 9 +#define PMSNEVFR_EL1_CRm 9 +#define PMSNEVFR_EL1_op2 1 /* PMSWINC_EL0 */ #define PMSWINC_EL0 MRS_REG(PMSWINC_EL0)