Index: sys/dev/sound/chip.h =================================================================== --- sys/dev/sound/chip.h +++ sys/dev/sound/chip.h @@ -42,6 +42,6 @@ * to the children. */ struct sndcard_func { - int func; /* The function code. */ - void *varinfo; /* Bridge-specific information. */ + int func; /* The function code. */ + void *varinfo; /* Bridge-specific information. */ }; Index: sys/dev/sound/driver.c =================================================================== --- sys/dev/sound/driver.c +++ sys/dev/sound/driver.c @@ -47,11 +47,7 @@ return 0; } -static moduledata_t snd_mod = { - "snd_driver", - snd_modevent, - NULL -}; +static moduledata_t snd_mod = { "snd_driver", snd_modevent, NULL }; DECLARE_MODULE(snd_driver, snd_mod, SI_SUB_DRIVERS, SI_ORDER_MIDDLE); MODULE_VERSION(snd_driver, 1); Index: sys/dev/sound/fdt/audio_dai.h =================================================================== --- sys/dev/sound/fdt/audio_dai.h +++ sys/dev/sound/fdt/audio_dai.h @@ -25,46 +25,45 @@ #ifndef __DAI_H__ #define __DAI_H__ -#define AUDIO_DAI_FORMAT_I2S 0 -#define AUDIO_DAI_FORMAT_RJ 1 -#define AUDIO_DAI_FORMAT_LJ 2 -#define AUDIO_DAI_FORMAT_DSPA 3 -#define AUDIO_DAI_FORMAT_DSPB 4 -#define AUDIO_DAI_FORMAT_AC97 5 -#define AUDIO_DAI_FORMAT_PDM 6 +#define AUDIO_DAI_FORMAT_I2S 0 +#define AUDIO_DAI_FORMAT_RJ 1 +#define AUDIO_DAI_FORMAT_LJ 2 +#define AUDIO_DAI_FORMAT_DSPA 3 +#define AUDIO_DAI_FORMAT_DSPB 4 +#define AUDIO_DAI_FORMAT_AC97 5 +#define AUDIO_DAI_FORMAT_PDM 6 /* * Polarity: Normal/Inverted BCLK/Frame */ -#define AUDIO_DAI_POLARITY_NB_NF 0 -#define AUDIO_DAI_POLARITY_NB_IF 1 -#define AUDIO_DAI_POLARITY_IB_NF 2 -#define AUDIO_DAI_POLARITY_IB_IF 3 -#define AUDIO_DAI_POLARITY_INVERTED_FRAME(n) ((n) & 0x01) -#define AUDIO_DAI_POLARITY_INVERTED_BCLK(n) ((n) & 0x2) +#define AUDIO_DAI_POLARITY_NB_NF 0 +#define AUDIO_DAI_POLARITY_NB_IF 1 +#define AUDIO_DAI_POLARITY_IB_NF 2 +#define AUDIO_DAI_POLARITY_IB_IF 3 +#define AUDIO_DAI_POLARITY_INVERTED_FRAME(n) ((n) & 0x01) +#define AUDIO_DAI_POLARITY_INVERTED_BCLK(n) ((n) & 0x2) -#define AUDIO_DAI_CLOCK_CBM_CFM 0 -#define AUDIO_DAI_CLOCK_CBS_CFM 1 -#define AUDIO_DAI_CLOCK_CBM_CFS 2 -#define AUDIO_DAI_CLOCK_CBS_CFS 3 +#define AUDIO_DAI_CLOCK_CBM_CFM 0 +#define AUDIO_DAI_CLOCK_CBS_CFM 1 +#define AUDIO_DAI_CLOCK_CBM_CFS 2 +#define AUDIO_DAI_CLOCK_CBS_CFS 3 -#define AUDIO_DAI_CLOCK_IN 0 -#define AUDIO_DAI_CLOCK_OUT 1 +#define AUDIO_DAI_CLOCK_IN 0 +#define AUDIO_DAI_CLOCK_OUT 1 -#define AUDIO_DAI_JACK_HP 0 -#define AUDIO_DAI_JACK_MIC 1 +#define AUDIO_DAI_JACK_HP 0 +#define AUDIO_DAI_JACK_MIC 1 /* * Signal to audio_soc that chn_intr required * for either recording or playback */ -#define AUDIO_DAI_REC_INTR (1 << 1) -#define AUDIO_DAI_PLAY_INTR (1 << 0) - -#define AUDIO_DAI_FORMAT(fmt, pol, clk) (((fmt) << 16) | ((pol) << 8) | (clk)) -#define AUDIO_DAI_FORMAT_FORMAT(format) (((format) >> 16) & 0xff) -#define AUDIO_DAI_FORMAT_POLARITY(format) (((format) >> 8) & 0xff) -#define AUDIO_DAI_FORMAT_CLOCK(format) (((format) >> 0) & 0xff) +#define AUDIO_DAI_REC_INTR (1 << 1) +#define AUDIO_DAI_PLAY_INTR (1 << 0) +#define AUDIO_DAI_FORMAT(fmt, pol, clk) (((fmt) << 16) | ((pol) << 8) | (clk)) +#define AUDIO_DAI_FORMAT_FORMAT(format) (((format) >> 16) & 0xff) +#define AUDIO_DAI_FORMAT_POLARITY(format) (((format) >> 8) & 0xff) +#define AUDIO_DAI_FORMAT_CLOCK(format) (((format) >> 0) & 0xff) #endif /* __DAI_H__ */ Index: sys/dev/sound/fdt/audio_soc.c =================================================================== --- sys/dev/sound/fdt/audio_soc.c +++ sys/dev/sound/fdt/audio_soc.c @@ -23,37 +23,37 @@ * */ -#include #include "opt_platform.h" +#include #include #include #include #include +#include #include #include #include -#include #include #include - #include #include + #include "audio_dai_if.h" -#define AUDIO_BUFFER_SIZE 48000 * 4 +#define AUDIO_BUFFER_SIZE 48000 * 4 struct audio_soc_aux_node { - SLIST_ENTRY(audio_soc_aux_node) link; - device_t dev; + SLIST_ENTRY(audio_soc_aux_node) link; + device_t dev; }; struct audio_soc_channel { - struct audio_soc_softc *sc; /* parent device's softc */ - struct pcm_channel *pcm; /* PCM channel */ - struct snd_dbuf *buf; /* PCM buffer */ - int dir; /* direction */ + struct audio_soc_softc *sc; /* parent device's softc */ + struct pcm_channel *pcm; /* PCM channel */ + struct snd_dbuf *buf; /* PCM buffer */ + int dir; /* direction */ }; struct audio_soc_softc { @@ -61,45 +61,45 @@ * pcm_register assumes that sc is snddev_info, * so this has to be first structure member for "compatibility" */ - struct snddev_info info; - device_t dev; - char *name; + struct snddev_info info; + device_t dev; + char *name; struct intr_config_hook init_hook; - device_t cpu_dev; - device_t codec_dev; - SLIST_HEAD(, audio_soc_aux_node) aux_devs; - unsigned int mclk_fs; - struct audio_soc_channel play_channel; - struct audio_soc_channel rec_channel; + device_t cpu_dev; + device_t codec_dev; + SLIST_HEAD(, audio_soc_aux_node) aux_devs; + unsigned int mclk_fs; + struct audio_soc_channel play_channel; + struct audio_soc_channel rec_channel; /* * The format is from the CPU node, for CODEC node clock roles * need to be reversed. */ - uint32_t format; - uint32_t link_mclk_fs; + uint32_t format; + uint32_t link_mclk_fs; }; static struct ofw_compat_data compat_data[] = { - {"simple-audio-card", 1}, - {NULL, 0}, + { "simple-audio-card", 1 }, + { NULL, 0 }, }; static struct { const char *name; unsigned int fmt; } ausoc_dai_formats[] = { - { "i2s", AUDIO_DAI_FORMAT_I2S }, - { "right_j", AUDIO_DAI_FORMAT_RJ }, - { "left_j", AUDIO_DAI_FORMAT_LJ }, - { "dsp_a", AUDIO_DAI_FORMAT_DSPA }, - { "dsp_b", AUDIO_DAI_FORMAT_DSPB }, - { "ac97", AUDIO_DAI_FORMAT_AC97 }, - { "pdm", AUDIO_DAI_FORMAT_PDM }, + { "i2s", AUDIO_DAI_FORMAT_I2S }, + { "right_j", AUDIO_DAI_FORMAT_RJ }, + { "left_j", AUDIO_DAI_FORMAT_LJ }, + { "dsp_a", AUDIO_DAI_FORMAT_DSPA }, + { "dsp_b", AUDIO_DAI_FORMAT_DSPB }, + { "ac97", AUDIO_DAI_FORMAT_AC97 }, + { "pdm", AUDIO_DAI_FORMAT_PDM }, }; -static int audio_soc_probe(device_t dev); -static int audio_soc_attach(device_t dev); -static int audio_soc_detach(device_t dev); +static int audio_soc_probe(device_t dev); +static int audio_soc_attach(device_t dev); +static int audio_soc_detach(device_t dev); /* * Invert master/slave roles for CODEC side of the node @@ -166,14 +166,19 @@ if (sc->link_mclk_fs) { rate = speed * sc->link_mclk_fs; if (AUDIO_DAI_SET_SYSCLK(sc->cpu_dev, rate, AUDIO_DAI_CLOCK_IN)) - device_printf(sc->dev, "failed to set sysclk for CPU node\n"); - - if (AUDIO_DAI_SET_SYSCLK(sc->codec_dev, rate, AUDIO_DAI_CLOCK_OUT)) - device_printf(sc->dev, "failed to set sysclk for codec node\n"); - - SLIST_FOREACH(aux_node, &sc->aux_devs, link) { - if (AUDIO_DAI_SET_SYSCLK(aux_node->dev, rate, AUDIO_DAI_CLOCK_OUT)) - device_printf(sc->dev, "failed to set sysclk for aux node\n"); + device_printf(sc->dev, + "failed to set sysclk for CPU node\n"); + + if (AUDIO_DAI_SET_SYSCLK(sc->codec_dev, rate, + AUDIO_DAI_CLOCK_OUT)) + device_printf(sc->dev, + "failed to set sysclk for codec node\n"); + + SLIST_FOREACH (aux_node, &sc->aux_devs, link) { + if (AUDIO_DAI_SET_SYSCLK(aux_node->dev, rate, + AUDIO_DAI_CLOCK_OUT)) + device_printf(sc->dev, + "failed to set sysclk for aux node\n"); } } @@ -182,7 +187,7 @@ */ speed = AUDIO_DAI_SET_CHANSPEED(sc->cpu_dev, speed); AUDIO_DAI_SET_CHANSPEED(sc->codec_dev, speed); - SLIST_FOREACH(aux_node, &sc->aux_devs, link) { + SLIST_FOREACH (aux_node, &sc->aux_devs, link) { AUDIO_DAI_SET_CHANSPEED(aux_node->dev, speed); } @@ -203,7 +208,7 @@ static void * audio_soc_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, - struct pcm_channel *c, int dir) + struct pcm_channel *c, int dir) { struct audio_soc_channel *ausoc_chan; void *buffer; @@ -233,7 +238,7 @@ ausoc_chan = (struct audio_soc_channel *)data; sc = ausoc_chan->sc; AUDIO_DAI_TRIGGER(sc->codec_dev, go, ausoc_chan->dir); - SLIST_FOREACH(aux_node, &sc->aux_devs, link) { + SLIST_FOREACH (aux_node, &sc->aux_devs, link) { AUDIO_DAI_TRIGGER(aux_node->dev, go, ausoc_chan->dir); } @@ -268,17 +273,15 @@ return AUDIO_DAI_GET_CAPS(sc->cpu_dev); } -static kobj_method_t audio_soc_chan_methods[] = { - KOBJMETHOD(channel_init, audio_soc_chan_init), - KOBJMETHOD(channel_free, audio_soc_chan_free), - KOBJMETHOD(channel_setformat, audio_soc_chan_setformat), - KOBJMETHOD(channel_setspeed, audio_soc_chan_setspeed), - KOBJMETHOD(channel_setblocksize,audio_soc_chan_setblocksize), - KOBJMETHOD(channel_trigger, audio_soc_chan_trigger), - KOBJMETHOD(channel_getptr, audio_soc_chan_getptr), - KOBJMETHOD(channel_getcaps, audio_soc_chan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t audio_soc_chan_methods[] = { KOBJMETHOD(channel_init, + audio_soc_chan_init), + KOBJMETHOD(channel_free, audio_soc_chan_free), + KOBJMETHOD(channel_setformat, audio_soc_chan_setformat), + KOBJMETHOD(channel_setspeed, audio_soc_chan_setspeed), + KOBJMETHOD(channel_setblocksize, audio_soc_chan_setblocksize), + KOBJMETHOD(channel_trigger, audio_soc_chan_trigger), + KOBJMETHOD(channel_getptr, audio_soc_chan_getptr), + KOBJMETHOD(channel_getcaps, audio_soc_chan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(audio_soc_chan); static void @@ -288,7 +291,8 @@ int channel_intr_required; sc = (struct audio_soc_softc *)arg; - channel_intr_required = AUDIO_DAI_INTR(sc->cpu_dev, sc->play_channel.buf, sc->rec_channel.buf); + channel_intr_required = AUDIO_DAI_INTR(sc->cpu_dev, + sc->play_channel.buf, sc->rec_channel.buf); if (channel_intr_required & AUDIO_DAI_PLAY_INTR) chn_intr(sc->play_channel.pcm); if (channel_intr_required & AUDIO_DAI_REC_INTR) @@ -332,7 +336,8 @@ return; } if ((OF_getencprop(child, "sound-dai", &xref, sizeof(xref))) <= 0) { - device_printf(sc->dev, "missing sound-dai property in cpu node\n"); + device_printf(sc->dev, + "missing sound-dai property in cpu node\n"); return; } daidev = OF_device_from_xref(xref); @@ -348,7 +353,8 @@ return; } if ((OF_getencprop(child, "sound-dai", &xref, sizeof(xref))) <= 0) { - device_printf(sc->dev, "missing sound-dai property in codec node\n"); + device_printf(sc->dev, + "missing sound-dai property in codec node\n"); return; } daidev = OF_device_from_xref(xref); @@ -360,16 +366,20 @@ /* Add AUX devices */ aux_devs = NULL; - ncells = OF_getencprop_alloc_multi(node, "simple-audio-card,aux-devs", sizeof(*aux_devs), - (void **)&aux_devs); + ncells = OF_getencprop_alloc_multi(node, "simple-audio-card,aux-devs", + sizeof(*aux_devs), (void **)&aux_devs); for (i = 0; i < ncells; i++) { auxdev = OF_device_from_xref(aux_devs[i]); if (auxdev == NULL) - device_printf(sc->dev, "warning: no driver attached to aux node\n"); - aux_node = (struct audio_soc_aux_node *)malloc(sizeof(*aux_node), M_DEVBUF, M_NOWAIT); + device_printf(sc->dev, + "warning: no driver attached to aux node\n"); + aux_node = (struct audio_soc_aux_node *)malloc(sizeof( + *aux_node), + M_DEVBUF, M_NOWAIT); if (aux_node == NULL) { - device_printf(sc->dev, "failed to allocate aux node struct\n"); + device_printf(sc->dev, + "failed to allocate aux node struct\n"); return; } aux_node->dev = auxdev; @@ -385,14 +395,17 @@ } /* Reverse clock roles for CODEC */ - if (AUDIO_DAI_INIT(sc->codec_dev, audio_soc_reverse_clocks(sc->format))) { + if (AUDIO_DAI_INIT(sc->codec_dev, + audio_soc_reverse_clocks(sc->format))) { device_printf(sc->dev, "failed to initialize codec node\n"); return; } - SLIST_FOREACH(aux_node, &sc->aux_devs, link) { - if (AUDIO_DAI_INIT(aux_node->dev, audio_soc_reverse_clocks(sc->format))) { - device_printf(sc->dev, "failed to initialize aux node\n"); + SLIST_FOREACH (aux_node, &sc->aux_devs, link) { + if (AUDIO_DAI_INIT(aux_node->dev, + audio_soc_reverse_clocks(sc->format))) { + device_printf(sc->dev, + "failed to initialize aux node\n"); return; } } @@ -405,14 +418,16 @@ sc->play_channel.sc = sc; sc->rec_channel.sc = sc; - pcm_addchan(sc->dev, PCMDIR_PLAY, &audio_soc_chan_class, &sc->play_channel); - pcm_addchan(sc->dev, PCMDIR_REC, &audio_soc_chan_class, &sc->rec_channel); + pcm_addchan(sc->dev, PCMDIR_PLAY, &audio_soc_chan_class, + &sc->play_channel); + pcm_addchan(sc->dev, PCMDIR_REC, &audio_soc_chan_class, + &sc->rec_channel); pcm_setstatus(sc->dev, "at simplebus"); AUDIO_DAI_SETUP_INTR(sc->cpu_dev, audio_soc_intr, sc); AUDIO_DAI_SETUP_MIXER(sc->codec_dev, sc->dev); - SLIST_FOREACH(aux_node, &sc->aux_devs, link) { + SLIST_FOREACH (aux_node, &sc->aux_devs, link) { AUDIO_DAI_SETUP_MIXER(aux_node->dev, sc->dev); } } @@ -458,8 +473,8 @@ } else fmt = AUDIO_DAI_FORMAT_I2S; - if (OF_getencprop(node, "simple-audio-card,mclk-fs", - &sc->link_mclk_fs, sizeof(sc->link_mclk_fs)) <= 0) + if (OF_getencprop(node, "simple-audio-card,mclk-fs", &sc->link_mclk_fs, + sizeof(sc->link_mclk_fs)) <= 0) sc->link_mclk_fs = 0; /* Unless specified otherwise, CPU node is the master */ @@ -467,28 +482,32 @@ cpu_child = ofw_bus_find_child(node, "simple-audio-card,cpu"); - if ((OF_getencprop(node, "simple-audio-card,frame-master", &xref, sizeof(xref))) > 0) + if ((OF_getencprop(node, "simple-audio-card,frame-master", &xref, + sizeof(xref))) > 0) frame_master = cpu_child == OF_node_from_xref(xref); - if ((OF_getencprop(node, "simple-audio-card,bitclock-master", &xref, sizeof(xref))) > 0) + if ((OF_getencprop(node, "simple-audio-card,bitclock-master", &xref, + sizeof(xref))) > 0) bitclock_master = cpu_child == OF_node_from_xref(xref); if (frame_master) { - clk = bitclock_master ? - AUDIO_DAI_CLOCK_CBM_CFM : AUDIO_DAI_CLOCK_CBS_CFM; + clk = bitclock_master ? AUDIO_DAI_CLOCK_CBM_CFM : + AUDIO_DAI_CLOCK_CBS_CFM; } else { - clk = bitclock_master ? - AUDIO_DAI_CLOCK_CBM_CFS : AUDIO_DAI_CLOCK_CBS_CFS; + clk = bitclock_master ? AUDIO_DAI_CLOCK_CBM_CFS : + AUDIO_DAI_CLOCK_CBS_CFS; } - bool bitclock_inversion = OF_hasprop(node, "simple-audio-card,bitclock-inversion"); - bool frame_inversion = OF_hasprop(node, "simple-audio-card,frame-inversion"); + bool bitclock_inversion = OF_hasprop(node, + "simple-audio-card,bitclock-inversion"); + bool frame_inversion = OF_hasprop(node, + "simple-audio-card,frame-inversion"); if (bitclock_inversion) { - pol = frame_inversion ? - AUDIO_DAI_POLARITY_IB_IF : AUDIO_DAI_POLARITY_IB_NF; + pol = frame_inversion ? AUDIO_DAI_POLARITY_IB_IF : + AUDIO_DAI_POLARITY_IB_NF; } else { - pol = frame_inversion ? - AUDIO_DAI_POLARITY_NB_IF : AUDIO_DAI_POLARITY_NB_NF; + pol = frame_inversion ? AUDIO_DAI_POLARITY_NB_IF : + AUDIO_DAI_POLARITY_NB_NF; } sc->format = AUDIO_DAI_FORMAT(fmt, pol, clk); @@ -520,10 +539,10 @@ } static device_method_t audio_soc_methods[] = { - /* device_if methods */ - DEVMETHOD(device_probe, audio_soc_probe), - DEVMETHOD(device_attach, audio_soc_attach), - DEVMETHOD(device_detach, audio_soc_detach), + /* device_if methods */ + DEVMETHOD(device_probe, audio_soc_probe), + DEVMETHOD(device_attach, audio_soc_attach), + DEVMETHOD(device_detach, audio_soc_detach), DEVMETHOD_END, }; Index: sys/dev/sound/fdt/dummy_codec.c =================================================================== --- sys/dev/sound/fdt/dummy_codec.c +++ sys/dev/sound/fdt/dummy_codec.c @@ -25,6 +25,8 @@ * SUCH DAMAGE. */ +#include "opt_snd.h" + #include #include #include @@ -32,25 +34,23 @@ #include #include #include -#include #include +#include + #include #include #include - -#include "opt_snd.h" -#include #include +#include + #include "audio_dai_if.h" -static struct ofw_compat_data compat_data[] = { - { "dummy-codec", 1}, - { NULL, 0 } -}; +static struct ofw_compat_data compat_data[] = { { "dummy-codec", 1 }, + { NULL, 0 } }; struct dummy_codec_softc { - device_t dev; + device_t dev; }; static int dummy_codec_probe(device_t dev); @@ -101,11 +101,11 @@ static device_method_t dummy_codec_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, dummy_codec_probe), - DEVMETHOD(device_attach, dummy_codec_attach), - DEVMETHOD(device_detach, dummy_codec_detach), + DEVMETHOD(device_probe, dummy_codec_probe), + DEVMETHOD(device_attach, dummy_codec_attach), + DEVMETHOD(device_detach, dummy_codec_detach), - DEVMETHOD(audio_dai_init, dummy_codec_dai_init), + DEVMETHOD(audio_dai_init, dummy_codec_dai_init), DEVMETHOD_END }; Index: sys/dev/sound/fdt/simple_amplifier.c =================================================================== --- sys/dev/sound/fdt/simple_amplifier.c +++ sys/dev/sound/fdt/simple_amplifier.c @@ -25,6 +25,8 @@ * SUCH DAMAGE. */ +#include "opt_snd.h" + #include #include #include @@ -32,31 +34,28 @@ #include #include #include -#include #include +#include + #include +#include #include #include - #include -#include - -#include "opt_snd.h" -#include #include +#include + #include "audio_dai_if.h" -static struct ofw_compat_data compat_data[] = { - { "simple-audio-amplifier", 1}, - { NULL, 0} -}; +static struct ofw_compat_data compat_data[] = { { "simple-audio-amplifier", 1 }, + { NULL, 0 } }; struct simple_amp_softc { - device_t dev; - regulator_t supply_vcc; - gpio_pin_t gpio_enable; - bool gpio_is_valid; + device_t dev; + regulator_t supply_vcc; + gpio_pin_t gpio_enable; + bool gpio_is_valid; }; static int simple_amp_probe(device_t dev); @@ -87,8 +86,8 @@ sc->dev = dev; node = ofw_bus_get_node(dev); - error = gpio_pin_get_by_ofw_property(dev, node, - "enable-gpios", &sc->gpio_enable); + error = gpio_pin_get_by_ofw_property(dev, node, "enable-gpios", + &sc->gpio_enable); if (error != 0) sc->gpio_is_valid = false; else @@ -121,7 +120,7 @@ static int simple_amp_dai_trigger(device_t dev, int go, int pcm_dir) { - struct simple_amp_softc *sc; + struct simple_amp_softc *sc; int error; if ((pcm_dir != PCMDIR_PLAY) && (pcm_dir != PCMDIR_REC)) @@ -179,12 +178,12 @@ static device_method_t simple_amp_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, simple_amp_probe), - DEVMETHOD(device_attach, simple_amp_attach), - DEVMETHOD(device_detach, simple_amp_detach), + DEVMETHOD(device_probe, simple_amp_probe), + DEVMETHOD(device_attach, simple_amp_attach), + DEVMETHOD(device_detach, simple_amp_detach), - DEVMETHOD(audio_dai_init, simple_amp_dai_init), - DEVMETHOD(audio_dai_trigger, simple_amp_dai_trigger), + DEVMETHOD(audio_dai_init, simple_amp_dai_init), + DEVMETHOD(audio_dai_trigger, simple_amp_dai_trigger), DEVMETHOD_END }; Index: sys/dev/sound/isa/sb.h =================================================================== --- sys/dev/sound/isa/sb.h +++ sys/dev/sound/isa/sb.h @@ -38,20 +38,20 @@ * sound blaster registers */ -#define SBDSP_RST 0x6 -#define DSP_READ 0xA -#define DSP_WRITE 0xC -#define SBDSP_CMD 0xC -#define SBDSP_STATUS 0xC -#define DSP_DATA_AVAIL 0xE -#define DSP_DATA_AVL16 0xF - -#define SB_MIX_ADDR 0x4 -#define SB_MIX_DATA 0x5 +#define SBDSP_RST 0x6 +#define DSP_READ 0xA +#define DSP_WRITE 0xC +#define SBDSP_CMD 0xC +#define SBDSP_STATUS 0xC +#define DSP_DATA_AVAIL 0xE +#define DSP_DATA_AVL16 0xF + +#define SB_MIX_ADDR 0x4 +#define SB_MIX_DATA 0x5 #if 0 -#define OPL3_LEFT (io_base + 0x0) -#define OPL3_RIGHT (io_base + 0x2) -#define OPL3_BOTH (io_base + 0x8) +#define OPL3_LEFT (io_base + 0x0) +#define OPL3_RIGHT (io_base + 0x2) +#define OPL3_BOTH (io_base + 0x8) #endif /* @@ -59,62 +59,63 @@ */ /* these are not used except for programmed I/O (not in this driver) */ -#define DSP_DAC8 0x10 /* direct DAC output */ -#define DSP_ADC8 0x20 /* direct ADC input */ +#define DSP_DAC8 0x10 /* direct DAC output */ +#define DSP_ADC8 0x20 /* direct ADC input */ /* these should be used in the SB 1.0 */ -#define DSP_CMD_DAC8 0x14 /* single cycle 8-bit dma out */ -#define DSP_CMD_ADC8 0x24 /* single cycle 8-bit dma in */ +#define DSP_CMD_DAC8 0x14 /* single cycle 8-bit dma out */ +#define DSP_CMD_ADC8 0x24 /* single cycle 8-bit dma in */ /* these should be used in the SB 2.0 and 2.01 */ -#define DSP_CMD_DAC8_AUTO 0x1c /* auto 8-bit dma out */ -#define DSP_CMD_ADC8_AUTO 0x2c /* auto 8-bit dma out */ +#define DSP_CMD_DAC8_AUTO 0x1c /* auto 8-bit dma out */ +#define DSP_CMD_ADC8_AUTO 0x2c /* auto 8-bit dma out */ -#define DSP_CMD_HSSIZE 0x48 /* high speed dma count */ -#define DSP_CMD_HSDAC_AUTO 0x90 /* high speed dac, auto */ -#define DSP_CMD_HSADC_AUTO 0x98 /* high speed adc, auto */ +#define DSP_CMD_HSSIZE 0x48 /* high speed dma count */ +#define DSP_CMD_HSDAC_AUTO 0x90 /* high speed dac, auto */ +#define DSP_CMD_HSADC_AUTO 0x98 /* high speed adc, auto */ /* SBPro commands. Some cards (JAZZ, SMW) also support 16 bits */ - /* prepare for dma input */ -#define DSP_CMD_DMAMODE(stereo, bit16) (0xA0 | (stereo ? 8:0) | (bit16 ? 4:0)) +/* prepare for dma input */ +#define DSP_CMD_DMAMODE(stereo, bit16) \ + (0xA0 | (stereo ? 8 : 0) | (bit16 ? 4 : 0)) -#define DSP_CMD_DAC2 0x16 /* 2-bit adpcm dma out (cont) */ -#define DSP_CMD_DAC2S 0x17 /* 2-bit adpcm dma out (start) */ +#define DSP_CMD_DAC2 0x16 /* 2-bit adpcm dma out (cont) */ +#define DSP_CMD_DAC2S 0x17 /* 2-bit adpcm dma out (start) */ -#define DSP_CMD_DAC2S_AUTO 0x1f /* auto 2-bit adpcm dma out (start) */ +#define DSP_CMD_DAC2S_AUTO 0x1f /* auto 2-bit adpcm dma out (start) */ /* SB16 commands */ -#define DSP_CMD_O16 0xb0 -#define DSP_CMD_I16 0xb8 -#define DSP_CMD_O8 0xc0 -#define DSP_CMD_I8 0xc8 - -#define DSP_MODE_U8MONO 0x00 -#define DSP_MODE_U8STEREO 0x20 -#define DSP_MODE_S16MONO 0x10 -#define DSP_MODE_S16STEREO 0x30 - -#define DSP_CMD_SPKON 0xD1 -#define DSP_CMD_SPKOFF 0xD3 -#define DSP_CMD_SPKR(on) (0xD1 | (on ? 0:2)) - -#define DSP_CMD_DMAPAUSE_8 0xD0 -#define DSP_CMD_DMAPAUSE_16 0xD5 -#define DSP_CMD_DMAEXIT_8 0xDA -#define DSP_CMD_DMAEXIT_16 0xD9 -#define DSP_CMD_TCONST 0x40 /* set time constant */ -#define DSP_CMD_HSDAC 0x91 /* high speed dac */ -#define DSP_CMD_HSADC 0x99 /* high speed adc */ - -#define DSP_CMD_GETVER 0xE1 -#define DSP_CMD_GETID 0xE7 /* return id bytes */ - -#define DSP_CMD_OUT16 0x41 /* send parms for dma out on sb16 */ -#define DSP_CMD_IN16 0x42 /* send parms for dma in on sb16 */ -#if 0 /*** unknown ***/ -#define DSP_CMD_FA 0xFA /* get version from prosonic*/ -#define DSP_CMD_FB 0xFB /* set irq/dma for prosonic*/ +#define DSP_CMD_O16 0xb0 +#define DSP_CMD_I16 0xb8 +#define DSP_CMD_O8 0xc0 +#define DSP_CMD_I8 0xc8 + +#define DSP_MODE_U8MONO 0x00 +#define DSP_MODE_U8STEREO 0x20 +#define DSP_MODE_S16MONO 0x10 +#define DSP_MODE_S16STEREO 0x30 + +#define DSP_CMD_SPKON 0xD1 +#define DSP_CMD_SPKOFF 0xD3 +#define DSP_CMD_SPKR(on) (0xD1 | (on ? 0 : 2)) + +#define DSP_CMD_DMAPAUSE_8 0xD0 +#define DSP_CMD_DMAPAUSE_16 0xD5 +#define DSP_CMD_DMAEXIT_8 0xDA +#define DSP_CMD_DMAEXIT_16 0xD9 +#define DSP_CMD_TCONST 0x40 /* set time constant */ +#define DSP_CMD_HSDAC 0x91 /* high speed dac */ +#define DSP_CMD_HSADC 0x99 /* high speed adc */ + +#define DSP_CMD_GETVER 0xE1 +#define DSP_CMD_GETID 0xE7 /* return id bytes */ + +#define DSP_CMD_OUT16 0x41 /* send parms for dma out on sb16 */ +#define DSP_CMD_IN16 0x42 /* send parms for dma in on sb16 */ +#if 0 /*** unknown ***/ +#define DSP_CMD_FA 0xFA /* get version from prosonic*/ +#define DSP_CMD_FB 0xFB /* set irq/dma for prosonic*/ #endif /* @@ -125,90 +126,90 @@ * cmd is a combination of DSP_DMA16 or DSP_DMA8 and */ -#define DSP_DMA16 0xb0 -#define DSP_DMA8 0xc0 -# define DSP_F16_DAC 0x00 -# define DSP_F16_ADC 0x08 -# define DSP_F16_AUTO 0x04 -# define DSP_F16_FIFO_ON 0x02 +#define DSP_DMA16 0xb0 +#define DSP_DMA8 0xc0 +#define DSP_F16_DAC 0x00 +#define DSP_F16_ADC 0x08 +#define DSP_F16_AUTO 0x04 +#define DSP_F16_FIFO_ON 0x02 /* * mode is a combination of the following: */ -#define DSP_F16_STEREO 0x20 -#define DSP_F16_SIGNED 0x10 +#define DSP_F16_STEREO 0x20 +#define DSP_F16_SIGNED 0x10 -#define IMODE_NONE 0 -#define IMODE_OUTPUT PCM_ENABLE_OUTPUT -#define IMODE_INPUT PCM_ENABLE_INPUT -#define IMODE_INIT 3 -#define IMODE_MIDI 4 +#define IMODE_NONE 0 +#define IMODE_OUTPUT PCM_ENABLE_OUTPUT +#define IMODE_INPUT PCM_ENABLE_INPUT +#define IMODE_INIT 3 +#define IMODE_MIDI 4 -#define NORMAL_MIDI 0 -#define UART_MIDI 1 +#define NORMAL_MIDI 0 +#define UART_MIDI 1 /* * values used for bd_flags in SoundBlaster driver */ -#define BD_F_HISPEED 0x0001 /* doing high speed ... */ +#define BD_F_HISPEED 0x0001 /* doing high speed ... */ #if 0 -#define BD_F_JAZZ16 0x0002 /* jazz16 detected */ -#define BD_F_JAZZ16_2 0x0004 /* jazz16 type 2 */ +#define BD_F_JAZZ16 0x0002 /* jazz16 detected */ +#define BD_F_JAZZ16_2 0x0004 /* jazz16 type 2 */ #endif -#define BD_F_DUP_MIDI 0x0008 /* duplex midi */ +#define BD_F_DUP_MIDI 0x0008 /* duplex midi */ -#define BD_F_MIX_MASK 0x0070 /* up to 8 mixers (I know of 3) */ -#define BD_F_MIX_CT1335 0x0010 /* CT1335 */ -#define BD_F_MIX_CT1345 0x0020 /* CT1345 */ -#define BD_F_MIX_CT1745 0x0030 /* CT1745 */ +#define BD_F_MIX_MASK 0x0070 /* up to 8 mixers (I know of 3) */ +#define BD_F_MIX_CT1335 0x0010 /* CT1335 */ +#define BD_F_MIX_CT1345 0x0020 /* CT1345 */ +#define BD_F_MIX_CT1745 0x0030 /* CT1745 */ -#define BD_F_SB16 0x0100 /* this is a SB16 */ -#define BD_F_SB16X 0x0200 /* this is a vibra16X or clone */ +#define BD_F_SB16 0x0100 /* this is a SB16 */ +#define BD_F_SB16X 0x0200 /* this is a vibra16X or clone */ #if 0 -#define BD_F_MIDIBUSY 0x0400 /* midi busy */ +#define BD_F_MIDIBUSY 0x0400 /* midi busy */ #endif -#define BD_F_ESS 0x0800 /* this is an ESS chip */ -#define BD_F_DMARUN 0x2000 -#define BD_F_DMARUN2 0x4000 +#define BD_F_ESS 0x0800 /* this is an ESS chip */ +#define BD_F_DMARUN 0x2000 +#define BD_F_DMARUN2 0x4000 /* * Mixer registers of SB Pro */ -#define VOC_VOL 0x04 -#define MIC_VOL 0x0A -#define MIC_MIX 0x0A -#define RECORD_SRC 0x0C -#define IN_FILTER 0x0C -#define OUT_FILTER 0x0E -#define MASTER_VOL 0x22 -#define FM_VOL 0x26 -#define CD_VOL 0x28 -#define LINE_VOL 0x2E -#define IRQ_NR 0x80 -#define DMA_NR 0x81 -#define IRQ_STAT 0x82 +#define VOC_VOL 0x04 +#define MIC_VOL 0x0A +#define MIC_MIX 0x0A +#define RECORD_SRC 0x0C +#define IN_FILTER 0x0C +#define OUT_FILTER 0x0E +#define MASTER_VOL 0x22 +#define FM_VOL 0x26 +#define CD_VOL 0x28 +#define LINE_VOL 0x2E +#define IRQ_NR 0x80 +#define DMA_NR 0x81 +#define IRQ_STAT 0x82 /* * Additional registers on the SG NX Pro */ -#define COVOX_VOL 0x42 -#define TREBLE_LVL 0x44 -#define BASS_LVL 0x46 +#define COVOX_VOL 0x42 +#define TREBLE_LVL 0x44 +#define BASS_LVL 0x46 -#define FREQ_HI (1 << 3)/* Use High-frequency ANFI filters */ -#define FREQ_LOW 0 /* Use Low-frequency ANFI filters */ -#define FILT_ON 0 /* Yes, 0 to turn it on, 1 for off */ -#define FILT_OFF (1 << 5) +#define FREQ_HI (1 << 3) /* Use High-frequency ANFI filters */ +#define FREQ_LOW 0 /* Use Low-frequency ANFI filters */ +#define FILT_ON 0 /* Yes, 0 to turn it on, 1 for off */ +#define FILT_OFF (1 << 5) -#define MONO_DAC 0x00 -#define STEREO_DAC 0x02 +#define MONO_DAC 0x00 +#define STEREO_DAC 0x02 /* * Mixer registers of SB16 */ -#define SB16_IMASK_L 0x3d -#define SB16_IMASK_R 0x3e -#define SB16_OMASK 0x3c +#define SB16_IMASK_L 0x3d +#define SB16_IMASK_R 0x3e +#define SB16_OMASK 0x3c #endif Index: sys/dev/sound/macio/aoa.h =================================================================== --- sys/dev/sound/macio/aoa.h +++ sys/dev/sound/macio/aoa.h @@ -29,18 +29,18 @@ #define SOUND_AOA_H #ifndef AOA_DEBUG -#define DPRINTF(x) /* nothing */ +#define DPRINTF(x) /* nothing */ #else -#define DPRINTF(x) printf x +#define DPRINTF(x) printf x #endif struct aoa_softc { - device_t sc_dev; - void *sc_intrp; - struct resource *sc_odma; + device_t sc_dev; + void *sc_intrp; + struct resource *sc_odma; }; -void aoa_interrupt(void *); -int aoa_attach(void *xsc); +void aoa_interrupt(void *); +int aoa_attach(void *xsc); #endif /* SOUND_AOA_H */ Index: sys/dev/sound/macio/aoa.c =================================================================== --- sys/dev/sound/macio/aoa.c +++ sys/dev/sound/macio/aoa.c @@ -30,65 +30,65 @@ */ #include - #include #include -#include #include -#include +#include #include +#include #include +#include + +#include #include #include -#include -#include + #include #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include #include +#include #include "mixer_if.h" struct aoa_dma { - struct mtx mutex; - struct resource *reg; /* DBDMA registers */ - dbdma_channel_t *channel; /* DBDMA channel */ - bus_dma_tag_t tag; /* bus_dma tag */ - struct pcm_channel *pcm; /* PCM channel */ - struct snd_dbuf *buf; /* PCM buffer */ - u_int slots; /* # of slots */ - u_int slot; /* current slot */ - u_int bufsz; /* buffer size */ - u_int blksz; /* block size */ - int running; + struct mtx mutex; + struct resource *reg; /* DBDMA registers */ + dbdma_channel_t *channel; /* DBDMA channel */ + bus_dma_tag_t tag; /* bus_dma tag */ + struct pcm_channel *pcm; /* PCM channel */ + struct snd_dbuf *buf; /* PCM buffer */ + u_int slots; /* # of slots */ + u_int slot; /* current slot */ + u_int bufsz; /* buffer size */ + u_int blksz; /* block size */ + int running; }; static void aoa_dma_set_program(struct aoa_dma *dma) { - u_int32_t addr; - int i; + u_int32_t addr; + int i; - addr = (u_int32_t) sndbuf_getbufaddr(dma->buf); + addr = (u_int32_t)sndbuf_getbufaddr(dma->buf); KASSERT(dma->bufsz == sndbuf_getsize(dma->buf), ("bad size")); dma->slots = dma->bufsz / dma->blksz; for (i = 0; i < dma->slots; ++i) { - dbdma_insert_command(dma->channel, - i, /* slot */ - DBDMA_OUTPUT_MORE, /* command */ - 0, /* stream */ - addr, /* data */ - dma->blksz, /* count */ - DBDMA_ALWAYS, /* interrupt */ - DBDMA_COND_TRUE, /* branch */ - DBDMA_NEVER, /* wait */ - dma->slots + 1 /* branch_slot */ + dbdma_insert_command(dma->channel, i, /* slot */ + DBDMA_OUTPUT_MORE, /* command */ + 0, /* stream */ + addr, /* data */ + dma->blksz, /* count */ + DBDMA_ALWAYS, /* interrupt */ + DBDMA_COND_TRUE, /* branch */ + DBDMA_NEVER, /* wait */ + dma->slots + 1 /* branch_slot */ ); addr += dma->blksz; @@ -107,19 +107,19 @@ dbdma_sync_commands(dma->channel, BUS_DMASYNC_PREWRITE); } -#define AOA_BUFFER_SIZE 65536 +#define AOA_BUFFER_SIZE 65536 static struct aoa_dma * aoa_dma_create(struct aoa_softc *sc) { struct aoa_dma *dma; - bus_dma_tag_t tag; - int err; - device_t self; + bus_dma_tag_t tag; + int err; + device_t self; self = sc->sc_dev; - err = bus_dma_tag_create(bus_get_dma_tag(self), - 4, 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, + err = bus_dma_tag_create(bus_get_dma_tag(self), 4, 0, + BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, AOA_BUFFER_SIZE, 1, AOA_BUFFER_SIZE, 0, NULL, NULL, &tag); if (err != 0) return (NULL); @@ -147,16 +147,16 @@ static u_int32_t aoa_chan_setblocksize(kobj_t obj, void *data, u_int32_t blocksz) { - struct aoa_dma *dma = data; - int err, lz; + struct aoa_dma *dma = data; + int err, lz; DPRINTF(("aoa_chan_setblocksize: blocksz = %u, dma->blksz = %u\n", - blocksz, dma->blksz)); + blocksz, dma->blksz)); KASSERT(!dma->running, ("dma is running")); KASSERT(blocksz > 0, ("bad blocksz")); /* Round blocksz down to a power of two... */ - __asm volatile ("cntlzw %0,%1" : "=r"(lz) : "r"(blocksz)); + __asm volatile("cntlzw %0,%1" : "=r"(lz) : "r"(blocksz)); blocksz = 1 << (31 - lz); DPRINTF(("blocksz = %u\n", blocksz)); @@ -209,7 +209,7 @@ static u_int32_t aoa_chan_getptr(kobj_t obj, void *data) { - struct aoa_dma *dma = data; + struct aoa_dma *dma = data; if (!dma->running) return (0); @@ -219,11 +219,11 @@ static void * aoa_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, - struct pcm_channel *c, int dir) + struct pcm_channel *c, int dir) { - struct aoa_softc *sc = devinfo; - struct aoa_dma *dma; - int max_slots, err; + struct aoa_softc *sc = devinfo; + struct aoa_dma *dma; + int max_slots, err; KASSERT(dir == PCMDIR_PLAY, ("bad dir")); @@ -237,7 +237,7 @@ /* One slot per block, plus branch to 0 plus STOP. */ max_slots = 2 + dma->bufsz / dma->blksz; err = dbdma_allocate_channel(dma->reg, 0, bus_get_dma_tag(sc->sc_dev), - max_slots, &dma->channel ); + max_slots, &dma->channel); if (err != 0) { aoa_dma_delete(dma); return (NULL); @@ -257,8 +257,8 @@ static int aoa_chan_trigger(kobj_t obj, void *data, int go) { - struct aoa_dma *dma = data; - int i; + struct aoa_dma *dma = data; + int i; switch (go) { case PCMTRIG_START: @@ -304,7 +304,7 @@ static int aoa_chan_free(kobj_t obj, void *data) { - struct aoa_dma *dma = data; + struct aoa_dma *dma = data; sndbuf_free(dma->buf); dbdma_free_channel(dma->channel); @@ -316,8 +316,8 @@ void aoa_interrupt(void *xsc) { - struct aoa_softc *sc = xsc; - struct aoa_dma *dma; + struct aoa_softc *sc = xsc; + struct aoa_dma *dma; if (!(dma = sc->sc_intrp) || !dma->running) return; @@ -336,11 +336,8 @@ mtx_unlock(&dma->mutex); } -static u_int32_t sc_fmt[] = { - SND_FORMAT(AFMT_S16_BE, 2, 0), - 0 -}; -static struct pcmchan_caps aoa_caps = {44100, 44100, sc_fmt, 0}; +static u_int32_t sc_fmt[] = { SND_FORMAT(AFMT_S16_BE, 2, 0), 0 }; +static struct pcmchan_caps aoa_caps = { 44100, 44100, sc_fmt, 0 }; static struct pcmchan_caps * aoa_chan_getcaps(kobj_t obj, void *data) @@ -348,17 +345,15 @@ return (&aoa_caps); } -static kobj_method_t aoa_chan_methods[] = { - KOBJMETHOD(channel_init, aoa_chan_init), - KOBJMETHOD(channel_free, aoa_chan_free), - KOBJMETHOD(channel_setformat, aoa_chan_setformat), - KOBJMETHOD(channel_setspeed, aoa_chan_setspeed), - KOBJMETHOD(channel_setblocksize,aoa_chan_setblocksize), - KOBJMETHOD(channel_trigger, aoa_chan_trigger), - KOBJMETHOD(channel_getptr, aoa_chan_getptr), - KOBJMETHOD(channel_getcaps, aoa_chan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t aoa_chan_methods[] = { KOBJMETHOD(channel_init, + aoa_chan_init), + KOBJMETHOD(channel_free, aoa_chan_free), + KOBJMETHOD(channel_setformat, aoa_chan_setformat), + KOBJMETHOD(channel_setspeed, aoa_chan_setspeed), + KOBJMETHOD(channel_setblocksize, aoa_chan_setblocksize), + KOBJMETHOD(channel_trigger, aoa_chan_trigger), + KOBJMETHOD(channel_getptr, aoa_chan_getptr), + KOBJMETHOD(channel_getcaps, aoa_chan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(aoa_chan); int Index: sys/dev/sound/macio/davbus.c =================================================================== --- sys/dev/sound/macio/davbus.c +++ sys/dev/sound/macio/davbus.c @@ -45,45 +45,40 @@ #include "opt_snd.h" #endif -#include +#include +#include +#include #include #include - -#include -#include -#include +#include #include "mixer_if.h" struct davbus_softc { - struct aoa_softc aoa; - phandle_t node; - phandle_t soundnode; - struct resource *reg; - struct mtx mutex; - int device_id; - u_int output_mask; - u_int (*read_status)(struct davbus_softc *, u_int); - void (*set_outputs)(struct davbus_softc *, u_int); + struct aoa_softc aoa; + phandle_t node; + phandle_t soundnode; + struct resource *reg; + struct mtx mutex; + int device_id; + u_int output_mask; + u_int (*read_status)(struct davbus_softc *, u_int); + void (*set_outputs)(struct davbus_softc *, u_int); }; -static int davbus_probe(device_t); -static int davbus_attach(device_t); -static void davbus_cint(void *); +static int davbus_probe(device_t); +static int davbus_attach(device_t); +static void davbus_cint(void *); static device_method_t pcm_davbus_methods[] = { /* Device interface. */ - DEVMETHOD(device_probe, davbus_probe), - DEVMETHOD(device_attach, davbus_attach), - { 0, 0 } + DEVMETHOD(device_probe, davbus_probe), + DEVMETHOD(device_attach, davbus_attach), { 0, 0 } }; -static driver_t pcm_davbus_driver = { - "pcm", - pcm_davbus_methods, - PCM_SOFTC_SIZE -}; +static driver_t pcm_davbus_driver = { "pcm", pcm_davbus_methods, + PCM_SOFTC_SIZE }; DRIVER_MODULE(pcm_davbus, macio, pcm_davbus_driver, 0, 0); MODULE_DEPEND(pcm_davbus, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); @@ -94,7 +89,7 @@ static int davbus_probe(device_t self) { - const char *name; + const char *name; name = ofw_bus_get_name(self); if (!name) @@ -112,24 +107,22 @@ * Burgundy codec control */ -static int burgundy_init(struct snd_mixer *m); -static int burgundy_uninit(struct snd_mixer *m); -static int burgundy_reinit(struct snd_mixer *m); -static void burgundy_write_locked(struct davbus_softc *, u_int, u_int); -static void burgundy_set_outputs(struct davbus_softc *d, u_int mask); -static u_int burgundy_read_status(struct davbus_softc *d, u_int status); -static int burgundy_set(struct snd_mixer *m, unsigned dev, unsigned left, - unsigned right); -static u_int32_t burgundy_setrecsrc(struct snd_mixer *m, u_int32_t src); - -static kobj_method_t burgundy_mixer_methods[] = { - KOBJMETHOD(mixer_init, burgundy_init), - KOBJMETHOD(mixer_uninit, burgundy_uninit), - KOBJMETHOD(mixer_reinit, burgundy_reinit), - KOBJMETHOD(mixer_set, burgundy_set), - KOBJMETHOD(mixer_setrecsrc, burgundy_setrecsrc), - KOBJMETHOD_END -}; +static int burgundy_init(struct snd_mixer *m); +static int burgundy_uninit(struct snd_mixer *m); +static int burgundy_reinit(struct snd_mixer *m); +static void burgundy_write_locked(struct davbus_softc *, u_int, u_int); +static void burgundy_set_outputs(struct davbus_softc *d, u_int mask); +static u_int burgundy_read_status(struct davbus_softc *d, u_int status); +static int burgundy_set(struct snd_mixer *m, unsigned dev, unsigned left, + unsigned right); +static u_int32_t burgundy_setrecsrc(struct snd_mixer *m, u_int32_t src); + +static kobj_method_t burgundy_mixer_methods[] = { KOBJMETHOD(mixer_init, + burgundy_init), + KOBJMETHOD(mixer_uninit, burgundy_uninit), + KOBJMETHOD(mixer_reinit, burgundy_reinit), + KOBJMETHOD(mixer_set, burgundy_set), + KOBJMETHOD(mixer_setrecsrc, burgundy_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(burgundy_mixer); @@ -162,8 +155,8 @@ burgundy_write_locked(d, BURGUNDY_MIX2_REG, BURGUNDY_MIX_ISA); burgundy_write_locked(d, BURGUNDY_MIX3_REG, 0); - burgundy_write_locked(d, BURGUNDY_OS_REG, BURGUNDY_OS0_MIX2 | - BURGUNDY_OS1_MIX2); + burgundy_write_locked(d, BURGUNDY_OS_REG, + BURGUNDY_OS0_MIX2 | BURGUNDY_OS1_MIX2); burgundy_write_locked(d, BURGUNDY_SDIN_REG, BURGUNDY_ISA_SF0); @@ -177,8 +170,8 @@ burgundy_write_locked(d, BURGUNDY_ISSAL_REG, BURGUNDY_ISS_UNITY); burgundy_write_locked(d, BURGUNDY_ISSAR_REG, BURGUNDY_ISS_UNITY); - burgundy_set_outputs(d, burgundy_read_status(d, - bus_read_4(d->reg, DAVBUS_CODEC_STATUS))); + burgundy_set_outputs(d, + burgundy_read_status(d, bus_read_4(d->reg, DAVBUS_CODEC_STATUS))); mtx_unlock(&d->mutex); @@ -216,8 +209,8 @@ bus_write_4(d->reg, DAVBUS_CODEC_CTRL, data); - while (bus_read_4(d->reg, DAVBUS_CODEC_CTRL) & - DAVBUS_CODEC_BUSY) + while ( + bus_read_4(d->reg, DAVBUS_CODEC_CTRL) & DAVBUS_CODEC_BUSY) DELAY(1); val >>= 8; /* next byte. */ @@ -228,7 +221,7 @@ static void burgundy_set_outputs(struct davbus_softc *d, u_int mask) { - u_int x = 0; + u_int x = 0; if (mask == d->output_mask) return; @@ -308,24 +301,22 @@ * Screamer Codec Control */ -static int screamer_init(struct snd_mixer *m); -static int screamer_uninit(struct snd_mixer *m); -static int screamer_reinit(struct snd_mixer *m); -static void screamer_write_locked(struct davbus_softc *, u_int, u_int); -static void screamer_set_outputs(struct davbus_softc *d, u_int mask); -static u_int screamer_read_status(struct davbus_softc *d, u_int status); -static int screamer_set(struct snd_mixer *m, unsigned dev, unsigned left, - unsigned right); -static u_int32_t screamer_setrecsrc(struct snd_mixer *m, u_int32_t src); - -static kobj_method_t screamer_mixer_methods[] = { - KOBJMETHOD(mixer_init, screamer_init), - KOBJMETHOD(mixer_uninit, screamer_uninit), - KOBJMETHOD(mixer_reinit, screamer_reinit), - KOBJMETHOD(mixer_set, screamer_set), - KOBJMETHOD(mixer_setrecsrc, screamer_setrecsrc), - KOBJMETHOD_END -}; +static int screamer_init(struct snd_mixer *m); +static int screamer_uninit(struct snd_mixer *m); +static int screamer_reinit(struct snd_mixer *m); +static void screamer_write_locked(struct davbus_softc *, u_int, u_int); +static void screamer_set_outputs(struct davbus_softc *d, u_int mask); +static u_int screamer_read_status(struct davbus_softc *d, u_int status); +static int screamer_set(struct snd_mixer *m, unsigned dev, unsigned left, + unsigned right); +static u_int32_t screamer_setrecsrc(struct snd_mixer *m, u_int32_t src); + +static kobj_method_t screamer_mixer_methods[] = { KOBJMETHOD(mixer_init, + screamer_init), + KOBJMETHOD(mixer_uninit, screamer_uninit), + KOBJMETHOD(mixer_reinit, screamer_reinit), + KOBJMETHOD(mixer_set, screamer_set), + KOBJMETHOD(mixer_setrecsrc, screamer_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(screamer_mixer); @@ -341,11 +332,11 @@ mtx_lock(&d->mutex); - screamer_write_locked(d, SCREAMER_CODEC_ADDR0, SCREAMER_INPUT_CD | - SCREAMER_DEFAULT_CD_GAIN); + screamer_write_locked(d, SCREAMER_CODEC_ADDR0, + SCREAMER_INPUT_CD | SCREAMER_DEFAULT_CD_GAIN); - screamer_set_outputs(d, screamer_read_status(d, - bus_read_4(d->reg, DAVBUS_CODEC_STATUS))); + screamer_set_outputs(d, + screamer_read_status(d, bus_read_4(d->reg, DAVBUS_CODEC_STATUS))); screamer_write_locked(d, SCREAMER_CODEC_ADDR2, 0); screamer_write_locked(d, SCREAMER_CODEC_ADDR4, 0); @@ -374,7 +365,7 @@ static void screamer_write_locked(struct davbus_softc *d, u_int reg, u_int val) { - u_int x; + u_int x; KASSERT(val == (val & 0xfff), ("bad val")); @@ -394,7 +385,7 @@ static void screamer_set_outputs(struct davbus_softc *d, u_int mask) { - u_int x; + u_int x; if (mask == d->output_mask) { return; @@ -433,7 +424,7 @@ static u_int screamer_read_status(struct davbus_softc *d, u_int status) { - int headphones; + int headphones; switch (d->device_id) { case 5: /* Sawtooth */ @@ -471,10 +462,10 @@ switch (dev) { case SOUND_MIXER_VOLUME: mtx_lock(&d->mutex); - screamer_write_locked(d, SCREAMER_CODEC_ADDR2, (lval << 6) | - rval); - screamer_write_locked(d, SCREAMER_CODEC_ADDR4, (lval << 6) | - rval); + screamer_write_locked(d, SCREAMER_CODEC_ADDR2, + (lval << 6) | rval); + screamer_write_locked(d, SCREAMER_CODEC_ADDR4, + (lval << 6) | rval); mtx_unlock(&d->mutex); return (left | (right << 8)); @@ -492,11 +483,11 @@ static int davbus_attach(device_t self) { - struct davbus_softc *sc; - struct resource *dbdma_irq, *cintr; - void *cookie; - char compat[64]; - int rid, oirq, err; + struct davbus_softc *sc; + struct resource *dbdma_irq, *cintr; + void *cookie; + char compat[64]; + int rid, oirq, err; sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); @@ -512,15 +503,15 @@ /* Map the DBDMA channel register space. */ rid = 1; - sc->aoa.sc_odma = bus_alloc_resource_any(self, SYS_RES_MEMORY, - &rid, RF_ACTIVE); + sc->aoa.sc_odma = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, + RF_ACTIVE); if (sc->aoa.sc_odma == NULL) return (ENXIO); /* Establish the DBDMA channel edge-triggered interrupt. */ rid = 1; - dbdma_irq = bus_alloc_resource_any(self, SYS_RES_IRQ, - &rid, RF_SHAREABLE | RF_ACTIVE); + dbdma_irq = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, + RF_SHAREABLE | RF_ACTIVE); if (dbdma_irq == NULL) return (ENXIO); @@ -532,8 +523,8 @@ if (err != 0) return (err); - snd_setup_intr(self, dbdma_irq, INTR_MPSAFE, aoa_interrupt, - sc, &cookie); + snd_setup_intr(self, dbdma_irq, INTR_MPSAFE, aoa_interrupt, sc, + &cookie); /* Now initialize the controller. */ @@ -547,15 +538,16 @@ /* Setup the control interrupt. */ rid = 0; - cintr = bus_alloc_resource_any(self, SYS_RES_IRQ, - &rid, RF_SHAREABLE | RF_ACTIVE); + cintr = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, + RF_SHAREABLE | RF_ACTIVE); if (cintr != NULL) - bus_setup_intr(self, cintr, INTR_TYPE_MISC | INTR_MPSAFE, - NULL, davbus_cint, sc, &cookie); + bus_setup_intr(self, cintr, INTR_TYPE_MISC | INTR_MPSAFE, NULL, + davbus_cint, sc, &cookie); /* Initialize controller registers. */ - bus_write_4(sc->reg, DAVBUS_SOUND_CTRL, DAVBUS_INPUT_SUBFRAME0 | - DAVBUS_OUTPUT_SUBFRAME0 | DAVBUS_RATE_44100 | DAVBUS_INTR_PORTCHG); + bus_write_4(sc->reg, DAVBUS_SOUND_CTRL, + DAVBUS_INPUT_SUBFRAME0 | DAVBUS_OUTPUT_SUBFRAME0 | + DAVBUS_RATE_44100 | DAVBUS_INTR_PORTCHG); /* Attach DBDMA engine and PCM layer */ err = aoa_attach(sc); @@ -575,7 +567,7 @@ davbus_cint(void *ptr) { struct davbus_softc *d = ptr; - u_int reg, status, mask; + u_int reg, status, mask; mtx_lock(&d->mutex); Index: sys/dev/sound/macio/davbusreg.h =================================================================== --- sys/dev/sound/macio/davbusreg.h +++ sys/dev/sound/macio/davbusreg.h @@ -33,11 +33,11 @@ #define _SOUND_DAVBUS_H /* DAVbus controller registers. */ -#define DAVBUS_SOUND_CTRL 0x00 -#define DAVBUS_CODEC_CTRL 0x10 -#define DAVBUS_CODEC_STATUS 0x20 -#define DAVBUS_CLIP_COUNT 0x30 -#define DAVBUS_BYTE_SWAP 0x40 +#define DAVBUS_SOUND_CTRL 0x00 +#define DAVBUS_CODEC_CTRL 0x10 +#define DAVBUS_CODEC_STATUS 0x20 +#define DAVBUS_CLIP_COUNT 0x30 +#define DAVBUS_BYTE_SWAP 0x40 /* * The DAVbus uses a serial bus time multiplexed in four subframes, @@ -46,172 +46,172 @@ * thorugh the DAV interface. */ /* DAVBUS_SOUND_CTRL bit definitions. */ -#define DAVBUS_INPUT_SUBFRAME0 0x00000001 -#define DAVBUS_INPUT_SUBFRAME1 0x00000002 -#define DAVBUS_INPUT_SUBFRAME2 0x00000004 -#define DAVBUS_INPUT_SUBFRAME3 0x00000008 +#define DAVBUS_INPUT_SUBFRAME0 0x00000001 +#define DAVBUS_INPUT_SUBFRAME1 0x00000002 +#define DAVBUS_INPUT_SUBFRAME2 0x00000004 +#define DAVBUS_INPUT_SUBFRAME3 0x00000008 -#define DAVBUS_OUTPUT_SUBFRAME0 0x00000010 -#define DAVBUS_OUTPUT_SUBFRAME1 0x00000020 -#define DAVBUS_OUTPUT_SUBFRAME2 0x00000040 -#define DAVBUS_OUTPUT_SUBFRAME3 0x00000080 +#define DAVBUS_OUTPUT_SUBFRAME0 0x00000010 +#define DAVBUS_OUTPUT_SUBFRAME1 0x00000020 +#define DAVBUS_OUTPUT_SUBFRAME2 0x00000040 +#define DAVBUS_OUTPUT_SUBFRAME3 0x00000080 -#define DAVBUS_RATE_44100 0x00000000 -#define DAVBUS_RATE_29400 0x00000100 -#define DAVBUS_RATE_22050 0x00000200 -#define DAVBUS_RATE_17640 0x00000300 -#define DAVBUS_RATE_14700 0x00000400 -#define DAVBUS_RATE_11025 0x00000500 -#define DAVBUS_RATE_8820 0x00000600 -#define DAVBUS_RATE_7350 0x00000700 -#define DAVBUS_RATE_MASK 0x00000700 +#define DAVBUS_RATE_44100 0x00000000 +#define DAVBUS_RATE_29400 0x00000100 +#define DAVBUS_RATE_22050 0x00000200 +#define DAVBUS_RATE_17640 0x00000300 +#define DAVBUS_RATE_14700 0x00000400 +#define DAVBUS_RATE_11025 0x00000500 +#define DAVBUS_RATE_8820 0x00000600 +#define DAVBUS_RATE_7350 0x00000700 +#define DAVBUS_RATE_MASK 0x00000700 -#define DAVBUS_ERROR 0x00000800 -#define DAVBUS_PORTCHG 0x00001000 -#define DAVBUS_INTR_ERROR 0x00002000 /* interrupt on error */ -#define DAVBUS_INTR_PORTCHG 0x00004000 /* interrupt on port change */ +#define DAVBUS_ERROR 0x00000800 +#define DAVBUS_PORTCHG 0x00001000 +#define DAVBUS_INTR_ERROR 0x00002000 /* interrupt on error */ +#define DAVBUS_INTR_PORTCHG 0x00004000 /* interrupt on port change */ -#define DAVBUS_STATUS_SUBFRAME 0x00018000 /* mask */ +#define DAVBUS_STATUS_SUBFRAME 0x00018000 /* mask */ /* DAVBUS_CODEC_CTRL bit definitions. */ -#define DAVBUS_CODEC_BUSY 0x01000000 +#define DAVBUS_CODEC_BUSY 0x01000000 /* * Burgundy Codec Control Bits */ /* Burgundy transaction bits. */ -#define BURGUNDY_CTRL_RESET 0x00100000 -#define BURGUNDY_CTRL_WRITE 0x00200000 +#define BURGUNDY_CTRL_RESET 0x00100000 +#define BURGUNDY_CTRL_WRITE 0x00200000 /* Mute control for each analog output port. */ -#define BURGUNDY_MUTE_REG 0x16000 -#define BURGUNDY_P13M_EN 0x01 -#define BURGUNDY_P14L_EN 0x02 -#define BURGUNDY_P14R_EN 0x04 -#define BURGUNDY_P15L_EN 0x08 -#define BURGUNDY_P15R_EN 0x10 -#define BURGUNDY_P16L_EN 0x20 -#define BURGUNDY_P16R_EN 0x40 -#define BURGUNDY_P17M_EN 0x80 +#define BURGUNDY_MUTE_REG 0x16000 +#define BURGUNDY_P13M_EN 0x01 +#define BURGUNDY_P14L_EN 0x02 +#define BURGUNDY_P14R_EN 0x04 +#define BURGUNDY_P15L_EN 0x08 +#define BURGUNDY_P15R_EN 0x10 +#define BURGUNDY_P16L_EN 0x20 +#define BURGUNDY_P16R_EN 0x40 +#define BURGUNDY_P17M_EN 0x80 /* Attenuation of each analog output port. */ -#define BURGUNDY_OL13_REG 0x16100 -#define BURGUNDY_OL14_REG 0x16200 -#define BURGUNDY_OL15_REG 0x16300 -#define BURGUNDY_OL16_REG 0x16400 -#define BURGUNDY_OL17_REG 0x16500 +#define BURGUNDY_OL13_REG 0x16100 +#define BURGUNDY_OL14_REG 0x16200 +#define BURGUNDY_OL15_REG 0x16300 +#define BURGUNDY_OL16_REG 0x16400 +#define BURGUNDY_OL17_REG 0x16500 /* Inputs of four digital mixers. */ -#define BURGUNDY_MIX0_REG 0x42900 -#define BURGUNDY_MIX1_REG 0x42A00 -#define BURGUNDY_MIX2_REG 0x42B00 -#define BURGUNDY_MIX3_REG 0x42C00 -#define BURGUNDY_MIX_IS0 0x00010001 -#define BURGUNDY_MIX_IS1 0x00020002 -#define BURGUNDY_MIX_IS2 0x00040004 -#define BURGUNDY_MIX_IS3 0x00080008 -#define BURGUNDY_MIX_IS4 0x00100010 -#define BURGUNDY_MIX_ISA 0x01000100 /* Digital stream ISA. */ -#define BURGUNDY_MIX_ISB 0x02000200 /* Digital stream ISB. */ -#define BURGUNDY_MIX_ISC 0x04000400 /* Digital stream ISC. */ -#define BURGUNDY_MIX_ISD 0x08000800 /* Digital stream ISD. */ -#define BURGUNDY_MIX_ISE 0x10001000 /* Digital stream ISE. */ -#define BURGUNDY_MIX_ISF 0x20002000 /* Digital stream ISF. */ -#define BURGUNDY_MIX_ISG 0x40004000 /* Digital stream ISG. */ -#define BURGUNDY_MIX_ISH 0x80008000 /* Digital stream ISH. */ +#define BURGUNDY_MIX0_REG 0x42900 +#define BURGUNDY_MIX1_REG 0x42A00 +#define BURGUNDY_MIX2_REG 0x42B00 +#define BURGUNDY_MIX3_REG 0x42C00 +#define BURGUNDY_MIX_IS0 0x00010001 +#define BURGUNDY_MIX_IS1 0x00020002 +#define BURGUNDY_MIX_IS2 0x00040004 +#define BURGUNDY_MIX_IS3 0x00080008 +#define BURGUNDY_MIX_IS4 0x00100010 +#define BURGUNDY_MIX_ISA 0x01000100 /* Digital stream ISA. */ +#define BURGUNDY_MIX_ISB 0x02000200 /* Digital stream ISB. */ +#define BURGUNDY_MIX_ISC 0x04000400 /* Digital stream ISC. */ +#define BURGUNDY_MIX_ISD 0x08000800 /* Digital stream ISD. */ +#define BURGUNDY_MIX_ISE 0x10001000 /* Digital stream ISE. */ +#define BURGUNDY_MIX_ISF 0x20002000 /* Digital stream ISF. */ +#define BURGUNDY_MIX_ISG 0x40004000 /* Digital stream ISG. */ +#define BURGUNDY_MIX_ISH 0x80008000 /* Digital stream ISH. */ /* A digital scalar at the output of each mixer. */ -#define BURGUNDY_MXS0L_REG 0x12D00 -#define BURGUNDY_MXS0R_REG 0x12D01 -#define BURGUNDY_MXS1L_REG 0x12D02 -#define BURGUNDY_MXS1R_REG 0x12D03 -#define BURGUNDY_MXS2L_REG 0x12E00 -#define BURGUNDY_MXS2R_REG 0x12E01 -#define BURGUNDY_MXS3L_REG 0x12E02 -#define BURGUNDY_MXS3R_REG 0x12E03 -#define BURGUNDY_MXS_UNITY 0xDF +#define BURGUNDY_MXS0L_REG 0x12D00 +#define BURGUNDY_MXS0R_REG 0x12D01 +#define BURGUNDY_MXS1L_REG 0x12D02 +#define BURGUNDY_MXS1R_REG 0x12D03 +#define BURGUNDY_MXS2L_REG 0x12E00 +#define BURGUNDY_MXS2R_REG 0x12E01 +#define BURGUNDY_MXS3L_REG 0x12E02 +#define BURGUNDY_MXS3R_REG 0x12E03 +#define BURGUNDY_MXS_UNITY 0xDF /* Demultiplexer. Routes the mixer 0-3 (see above) to output sources. Output sources 0-2 can be converted to analog. */ -#define BURGUNDY_OS_REG 0x42F00 -#define BURGUNDY_OS0_MIX0 0x00000000 -#define BURGUNDY_OS0_MIX1 0x00000001 -#define BURGUNDY_OS0_MIX2 0x00000002 -#define BURGUNDY_OS0_MIX3 0x00000003 -#define BURGUNDY_OS1_MIX0 0x00000000 -#define BURGUNDY_OS1_MIX1 0x00000004 -#define BURGUNDY_OS1_MIX2 0x00000008 -#define BURGUNDY_OS1_MIX3 0x0000000C -#define BURGUNDY_OS2_MIX0 0x00000000 -#define BURGUNDY_OS2_MIX1 0x00000010 -#define BURGUNDY_OS2_MIX2 0x00000020 -#define BURGUNDY_OS2_MIX3 0x00000030 -#define BURGUNDY_OS3_MIX0 0x00000000 -#define BURGUNDY_OS3_MIX1 0x00000040 -#define BURGUNDY_OS3_MIX2 0x00000080 -#define BURGUNDY_OS3_MIX3 0x000000C0 -#define BURGUNDY_OSA_MIX0 0x00000000 -#define BURGUNDY_OSA_MIX1 0x00010000 -#define BURGUNDY_OSA_MIX2 0x00020000 -#define BURGUNDY_OSA_MIX3 0x00030000 -#define BURGUNDY_OSB_MIX0 0x00000000 -#define BURGUNDY_OSB_MIX1 0x00040000 -#define BURGUNDY_OSB_MIX2 0x00080000 -#define BURGUNDY_OSB_MIX3 0x000C0000 -#define BURGUNDY_OSC_MIX0 0x00000000 -#define BURGUNDY_OSC_MIX1 0x00100000 -#define BURGUNDY_OSC_MIX2 0x00200000 -#define BURGUNDY_OSC_MIX3 0x00300000 -#define BURGUNDY_OSD_MIX0 0x00000000 -#define BURGUNDY_OSD_MIX1 0x00400000 -#define BURGUNDY_OSD_MIX2 0x00800000 -#define BURGUNDY_OSD_MIX3 0x00C00000 -#define BURGUNDY_OSE_MIX0 0x00000000 -#define BURGUNDY_OSE_MIX1 0x01000000 -#define BURGUNDY_OSE_MIX2 0x02000000 -#define BURGUNDY_OSE_MIX3 0x03000000 -#define BURGUNDY_OSF_MIX0 0x00000000 -#define BURGUNDY_OSF_MIX1 0x04000000 -#define BURGUNDY_OSF_MIX2 0x08000000 -#define BURGUNDY_OSF_MIX3 0x0C000000 -#define BURGUNDY_OSG_MIX0 0x00000000 -#define BURGUNDY_OSG_MIX1 0x10000000 -#define BURGUNDY_OSG_MIX2 0x20000000 -#define BURGUNDY_OSG_MIX3 0x30000000 -#define BURGUNDY_OSH_MIX0 0x00000000 -#define BURGUNDY_OSH_MIX1 0x40000000 -#define BURGUNDY_OSH_MIX2 0x80000000 -#define BURGUNDY_OSH_MIX3 0xC0000000 +#define BURGUNDY_OS_REG 0x42F00 +#define BURGUNDY_OS0_MIX0 0x00000000 +#define BURGUNDY_OS0_MIX1 0x00000001 +#define BURGUNDY_OS0_MIX2 0x00000002 +#define BURGUNDY_OS0_MIX3 0x00000003 +#define BURGUNDY_OS1_MIX0 0x00000000 +#define BURGUNDY_OS1_MIX1 0x00000004 +#define BURGUNDY_OS1_MIX2 0x00000008 +#define BURGUNDY_OS1_MIX3 0x0000000C +#define BURGUNDY_OS2_MIX0 0x00000000 +#define BURGUNDY_OS2_MIX1 0x00000010 +#define BURGUNDY_OS2_MIX2 0x00000020 +#define BURGUNDY_OS2_MIX3 0x00000030 +#define BURGUNDY_OS3_MIX0 0x00000000 +#define BURGUNDY_OS3_MIX1 0x00000040 +#define BURGUNDY_OS3_MIX2 0x00000080 +#define BURGUNDY_OS3_MIX3 0x000000C0 +#define BURGUNDY_OSA_MIX0 0x00000000 +#define BURGUNDY_OSA_MIX1 0x00010000 +#define BURGUNDY_OSA_MIX2 0x00020000 +#define BURGUNDY_OSA_MIX3 0x00030000 +#define BURGUNDY_OSB_MIX0 0x00000000 +#define BURGUNDY_OSB_MIX1 0x00040000 +#define BURGUNDY_OSB_MIX2 0x00080000 +#define BURGUNDY_OSB_MIX3 0x000C0000 +#define BURGUNDY_OSC_MIX0 0x00000000 +#define BURGUNDY_OSC_MIX1 0x00100000 +#define BURGUNDY_OSC_MIX2 0x00200000 +#define BURGUNDY_OSC_MIX3 0x00300000 +#define BURGUNDY_OSD_MIX0 0x00000000 +#define BURGUNDY_OSD_MIX1 0x00400000 +#define BURGUNDY_OSD_MIX2 0x00800000 +#define BURGUNDY_OSD_MIX3 0x00C00000 +#define BURGUNDY_OSE_MIX0 0x00000000 +#define BURGUNDY_OSE_MIX1 0x01000000 +#define BURGUNDY_OSE_MIX2 0x02000000 +#define BURGUNDY_OSE_MIX3 0x03000000 +#define BURGUNDY_OSF_MIX0 0x00000000 +#define BURGUNDY_OSF_MIX1 0x04000000 +#define BURGUNDY_OSF_MIX2 0x08000000 +#define BURGUNDY_OSF_MIX3 0x0C000000 +#define BURGUNDY_OSG_MIX0 0x00000000 +#define BURGUNDY_OSG_MIX1 0x10000000 +#define BURGUNDY_OSG_MIX2 0x20000000 +#define BURGUNDY_OSG_MIX3 0x30000000 +#define BURGUNDY_OSH_MIX0 0x00000000 +#define BURGUNDY_OSH_MIX1 0x40000000 +#define BURGUNDY_OSH_MIX2 0x80000000 +#define BURGUNDY_OSH_MIX3 0xC0000000 /* A digital scalar for output sources 0 to 3. */ -#define BURGUNDY_OSS0L_REG 0x13000 -#define BURGUNDY_OSS0R_REG 0x13001 -#define BURGUNDY_OSS1L_REG 0x13002 -#define BURGUNDY_OSS1R_REG 0x13003 -#define BURGUNDY_OSS2L_REG 0x13100 -#define BURGUNDY_OSS2R_REG 0x13101 -#define BURGUNDY_OSS3L_REG 0x13102 -#define BURGUNDY_OSS3R_REG 0x13103 -#define BURGUNDY_OSS_UNITY 0xDF +#define BURGUNDY_OSS0L_REG 0x13000 +#define BURGUNDY_OSS0R_REG 0x13001 +#define BURGUNDY_OSS1L_REG 0x13002 +#define BURGUNDY_OSS1R_REG 0x13003 +#define BURGUNDY_OSS2L_REG 0x13100 +#define BURGUNDY_OSS2R_REG 0x13101 +#define BURGUNDY_OSS3L_REG 0x13102 +#define BURGUNDY_OSS3R_REG 0x13103 +#define BURGUNDY_OSS_UNITY 0xDF /* Digital input streams ISA-ISC. A stream may be derived from data coming from the controller in subframes 0 to 3 as well as from internal output sources OSA-OSD. */ -#define BURGUNDY_SDIN_REG 0x17800 -#define BURGUNDY_ISA_SF0 0x00 -#define BURGUNDY_ISA_OSA 0x02 -#define BURGUNDY_ISB_SF1 0x00 -#define BURGUNDY_ISB_OSB 0x08 -#define BURGUNDY_ISC_SF2 0x00 -#define BURGUNDY_ISC_OSC 0x20 -#define BURGUNDY_ISD_SF3 0x00 -#define BURGUNDY_ISD_OSD 0x80 +#define BURGUNDY_SDIN_REG 0x17800 +#define BURGUNDY_ISA_SF0 0x00 +#define BURGUNDY_ISA_OSA 0x02 +#define BURGUNDY_ISB_SF1 0x00 +#define BURGUNDY_ISB_OSB 0x08 +#define BURGUNDY_ISC_SF2 0x00 +#define BURGUNDY_ISC_OSC 0x20 +#define BURGUNDY_ISD_SF3 0x00 +#define BURGUNDY_ISD_OSD 0x80 /* A digital scaler for input streams 0-4 A-H. */ -#define BURGUNDY_ISSAL_REG 0x12500 -#define BURGUNDY_ISSAR_REG 0x12501 -#define BURGUNDY_ISS_UNITY 0xDF +#define BURGUNDY_ISSAL_REG 0x12500 +#define BURGUNDY_ISSAR_REG 0x12501 +#define BURGUNDY_ISS_UNITY 0xDF /* * Screamer codec control bits @@ -220,17 +220,17 @@ */ /* screamer transaction bits. */ -#define SCREAMER_CODEC_ADDR0 0x00000000 -#define SCREAMER_CODEC_ADDR1 0x00001000 -#define SCREAMER_CODEC_ADDR2 0x00002000 -#define SCREAMER_CODEC_ADDR4 0x00004000 -#define SCREAMER_CODEC_ADDR5 0x00005000 -#define SCREAMER_CODEC_ADDR6 0x00006000 -#define SCREAMER_CODEC_ADDR7 0x00007000 -#define SCREAMER_CODEC_EMSEL0 0x00000000 -#define SCREAMER_CODEC_EMSEL1 0x00400000 -#define SCREAMER_CODEC_EMSEL2 0x00800000 -#define SCREAMER_CODEC_EMSEL4 0x00c00000 +#define SCREAMER_CODEC_ADDR0 0x00000000 +#define SCREAMER_CODEC_ADDR1 0x00001000 +#define SCREAMER_CODEC_ADDR2 0x00002000 +#define SCREAMER_CODEC_ADDR4 0x00004000 +#define SCREAMER_CODEC_ADDR5 0x00005000 +#define SCREAMER_CODEC_ADDR6 0x00006000 +#define SCREAMER_CODEC_ADDR7 0x00007000 +#define SCREAMER_CODEC_EMSEL0 0x00000000 +#define SCREAMER_CODEC_EMSEL1 0x00400000 +#define SCREAMER_CODEC_EMSEL2 0x00800000 +#define SCREAMER_CODEC_EMSEL4 0x00c00000 /* cc0 */ /* @@ -240,19 +240,19 @@ * The gain is a 4-bit value expressed in units of 1.5 dB, * ranging from 0 dB (0) to +22.5 dB (15). */ -#define SCREAMER_DEFAULT_CD_GAIN 0x000000bb /* +16.5 dB */ -#define SCREAMER_INPUT_CD 0x00000200 -#define SCREAMER_INPUT_LINE 0x00000400 -#define SCREAMER_INPUT_MICROPHONE 0x00000800 -#define SCREAMER_INPUT_MASK 0x00000e00 +#define SCREAMER_DEFAULT_CD_GAIN 0x000000bb /* +16.5 dB */ +#define SCREAMER_INPUT_CD 0x00000200 +#define SCREAMER_INPUT_LINE 0x00000400 +#define SCREAMER_INPUT_MICROPHONE 0x00000800 +#define SCREAMER_INPUT_MASK 0x00000e00 /* cc1 */ -#define SCREAMER_LOOP_THROUGH 0x00000040 -#define SCREAMER_MUTE_SPEAKER 0x00000080 -#define SCREAMER_MUTE_HEADPHONES 0x00000200 -#define SCREAMER_PARALLEL_OUTPUT 0x00000c00 -#define SCREAMER_PROG_OUTPUT0 0x00000400 -#define SCREAMER_PROG_OUTPUT1 0x00000800 +#define SCREAMER_LOOP_THROUGH 0x00000040 +#define SCREAMER_MUTE_SPEAKER 0x00000080 +#define SCREAMER_MUTE_HEADPHONES 0x00000200 +#define SCREAMER_PARALLEL_OUTPUT 0x00000c00 +#define SCREAMER_PROG_OUTPUT0 0x00000400 +#define SCREAMER_PROG_OUTPUT1 0x00000800 /* cc2: headphones/external port attenuation */ /* cc4: internal speaker attenuation */ @@ -265,18 +265,18 @@ */ /* screamer codec status bits. */ -#define SCREAMER_STATUS_MASK 0x00FFFFFF -#define SCREAMER_STATUS_SENSEMASK 0x0000000F -#define SCREAMER_STATUS_SENSE0 0x00000008 -#define SCREAMER_STATUS_SENSE1 0x00000004 -#define SCREAMER_STATUS_SENSE2 0x00000002 -#define SCREAMER_STATUS_SENSE3 0x00000001 -#define SCREAMER_STATUS_PARTMASK 0x00000300 -#define SCREAMER_STATUS_PARTSHFT 8 -#define SCREAMER_PART_CRYSTAL 0x00000100 -#define SCREAMER_PART_NATIONAL 0x00000200 -#define SCREAMER_PART_TI 0x00000300 -#define SCREAMER_STATUS_REVMASK 0x0000F000 -#define SCREAMER_STATUS_REVSHFT 12 +#define SCREAMER_STATUS_MASK 0x00FFFFFF +#define SCREAMER_STATUS_SENSEMASK 0x0000000F +#define SCREAMER_STATUS_SENSE0 0x00000008 +#define SCREAMER_STATUS_SENSE1 0x00000004 +#define SCREAMER_STATUS_SENSE2 0x00000002 +#define SCREAMER_STATUS_SENSE3 0x00000001 +#define SCREAMER_STATUS_PARTMASK 0x00000300 +#define SCREAMER_STATUS_PARTSHFT 8 +#define SCREAMER_PART_CRYSTAL 0x00000100 +#define SCREAMER_PART_NATIONAL 0x00000200 +#define SCREAMER_PART_TI 0x00000300 +#define SCREAMER_STATUS_REVMASK 0x0000F000 +#define SCREAMER_STATUS_REVSHFT 12 #endif /* _SOUND_DAVBUS_H */ Index: sys/dev/sound/macio/i2s.c =================================================================== --- sys/dev/sound/macio/i2s.c +++ sys/dev/sound/macio/i2s.c @@ -59,91 +59,84 @@ #include #include -#include -#include #include -#include +#include #include +#include +#include #include +#include + +#include #include #include -#include -#include #include -#include +#include + #include #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include #include +#include #include struct i2s_softc { - struct aoa_softc aoa; - phandle_t node; - phandle_t soundnode; - struct resource *reg; - u_int output_mask; - struct mtx port_mtx; + struct aoa_softc aoa; + phandle_t node; + phandle_t soundnode; + struct resource *reg; + u_int output_mask; + struct mtx port_mtx; }; -static int i2s_probe(device_t); -static int i2s_attach(device_t); -static void i2s_postattach(void *); -static int i2s_setup(struct i2s_softc *, u_int, u_int, u_int); -static void i2s_mute_headphone (struct i2s_softc *, int); -static void i2s_mute_lineout (struct i2s_softc *, int); -static void i2s_mute_speaker (struct i2s_softc *, int); -static void i2s_set_outputs(void *, u_int); +static int i2s_probe(device_t); +static int i2s_attach(device_t); +static void i2s_postattach(void *); +static int i2s_setup(struct i2s_softc *, u_int, u_int, u_int); +static void i2s_mute_headphone(struct i2s_softc *, int); +static void i2s_mute_lineout(struct i2s_softc *, int); +static void i2s_mute_speaker(struct i2s_softc *, int); +static void i2s_set_outputs(void *, u_int); -static struct intr_config_hook *i2s_delayed_attach = NULL; +static struct intr_config_hook *i2s_delayed_attach = NULL; -kobj_class_t i2s_mixer_class = NULL; -device_t i2s_mixer = NULL; +kobj_class_t i2s_mixer_class = NULL; +device_t i2s_mixer = NULL; static device_method_t pcm_i2s_methods[] = { /* Device interface. */ - DEVMETHOD(device_probe, i2s_probe), - DEVMETHOD(device_attach, i2s_attach), - { 0, 0 } + DEVMETHOD(device_probe, i2s_probe), + DEVMETHOD(device_attach, i2s_attach), { 0, 0 } }; -static driver_t pcm_i2s_driver = { - "pcm", - pcm_i2s_methods, - PCM_SOFTC_SIZE -}; +static driver_t pcm_i2s_driver = { "pcm", pcm_i2s_methods, PCM_SOFTC_SIZE }; DRIVER_MODULE(pcm_i2s, macio, pcm_i2s_driver, 0, 0); MODULE_DEPEND(pcm_i2s, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); -static int aoagpio_probe(device_t); -static int aoagpio_attach(device_t); +static int aoagpio_probe(device_t); +static int aoagpio_attach(device_t); static device_method_t aoagpio_methods[] = { /* Device interface. */ - DEVMETHOD(device_probe, aoagpio_probe), - DEVMETHOD(device_attach, aoagpio_attach), - { 0, 0 } + DEVMETHOD(device_probe, aoagpio_probe), + DEVMETHOD(device_attach, aoagpio_attach), { 0, 0 } }; struct aoagpio_softc { - device_t dev; - int ctrl; - int detect_active; /* for extint-gpio */ - int level; /* for extint-gpio */ - struct i2s_softc *i2s; /* for extint-gpio */ + device_t dev; + int ctrl; + int detect_active; /* for extint-gpio */ + int level; /* for extint-gpio */ + struct i2s_softc *i2s; /* for extint-gpio */ }; -static driver_t aoagpio_driver = { - "aoagpio", - aoagpio_methods, - sizeof(struct aoagpio_softc) -}; +static driver_t aoagpio_driver = { "aoagpio", aoagpio_methods, + sizeof(struct aoagpio_softc) }; DRIVER_MODULE(aoagpio, macgpio, aoagpio_driver, 0, 0); @@ -153,9 +146,9 @@ static int i2s_probe(device_t self) { - const char *name; - phandle_t subchild; - char subchildname[255]; + const char *name; + phandle_t subchild; + char subchildname[255]; name = ofw_bus_get_name(self); if (!name) @@ -170,8 +163,10 @@ * driver can't handle it. */ subchild = OF_child(OF_child(ofw_bus_get_node(self))); - if (subchild != 0 && OF_getprop(subchild, "name", subchildname, - sizeof(subchildname)) > 0 && strcmp(subchildname, "lightshow") == 0) + if (subchild != 0 && + OF_getprop(subchild, "name", subchildname, sizeof(subchildname)) > + 0 && + strcmp(subchildname, "lightshow") == 0) return (ENXIO); device_set_desc(self, "Apple I2S Audio Controller"); @@ -184,11 +179,11 @@ static int i2s_attach(device_t self) { - struct i2s_softc *sc; - struct resource *dbdma_irq; - void *dbdma_ih; - int rid, oirq, err; - phandle_t port; + struct i2s_softc *sc; + struct resource *dbdma_irq; + void *dbdma_ih; + int rid, oirq, err; + phandle_t port; sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); @@ -219,8 +214,8 @@ /* Establish the DBDMA channel edge-triggered interrupt. */ rid = 1; - dbdma_irq = bus_alloc_resource_any(self, SYS_RES_IRQ, - &rid, RF_SHAREABLE | RF_ACTIVE); + dbdma_irq = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, + RF_SHAREABLE | RF_ACTIVE); if (dbdma_irq == NULL) return (ENXIO); @@ -229,8 +224,8 @@ if (err != 0) return (err); - snd_setup_intr(self, dbdma_irq, INTR_MPSAFE, aoa_interrupt, - sc, &dbdma_ih); + snd_setup_intr(self, dbdma_irq, INTR_MPSAFE, aoa_interrupt, sc, + &dbdma_ih); oirq = rman_get_start(dbdma_irq); err = powerpc_config_intr(oirq, INTR_TRIGGER_EDGE, INTR_POLARITY_LOW); @@ -242,7 +237,7 @@ * the I2C controller to attach. */ if ((i2s_delayed_attach = malloc(sizeof(struct intr_config_hook), - M_TEMP, M_WAITOK | M_ZERO)) == NULL) + M_TEMP, M_WAITOK | M_ZERO)) == NULL) return (ENOMEM); i2s_delayed_attach->ich_func = i2s_postattach; @@ -268,35 +263,29 @@ GPIO_CTRL_NUM }; -#define GPIO_CTRL_EXTINT_SET \ - ((1 << HEADPHONE_DETECT) | \ - (1 << LINEOUT_DETECT)) +#define GPIO_CTRL_EXTINT_SET ((1 << HEADPHONE_DETECT) | (1 << LINEOUT_DETECT)) -static struct aoagpio_softc *gpio_ctrls[GPIO_CTRL_NUM] = - {NULL, NULL, NULL, NULL, NULL, NULL}; +static struct aoagpio_softc *gpio_ctrls[GPIO_CTRL_NUM] = { NULL, NULL, NULL, + NULL, NULL, NULL }; static struct gpio_match { - const char *name; - enum gpio_ctrl ctrl; -} gpio_controls[] = { - {"headphone-mute", HEADPHONE_MUTE}, - {"lineout-mute", LINEOUT_MUTE}, - {"amp-mute", AMP_MUTE}, - {"headphone-detect", HEADPHONE_DETECT}, - {"lineout-detect", LINEOUT_DETECT}, - {"line-output-detect", LINEOUT_DETECT}, - {"audio-hw-reset", AUDIO_HW_RESET}, - {"hw-reset", AUDIO_HW_RESET}, - {NULL, GPIO_CTRL_NUM} -}; - -static void i2s_cint(struct i2s_softc *); + const char *name; + enum gpio_ctrl ctrl; +} gpio_controls[] = { { "headphone-mute", HEADPHONE_MUTE }, + { "lineout-mute", LINEOUT_MUTE }, { "amp-mute", AMP_MUTE }, + { "headphone-detect", HEADPHONE_DETECT }, + { "lineout-detect", LINEOUT_DETECT }, + { "line-output-detect", LINEOUT_DETECT }, + { "audio-hw-reset", AUDIO_HW_RESET }, { "hw-reset", AUDIO_HW_RESET }, + { NULL, GPIO_CTRL_NUM } }; + +static void i2s_cint(struct i2s_softc *); static void aoagpio_int(void *cookie) { - device_t self = cookie; - struct aoagpio_softc *sc; + device_t self = cookie; + struct aoagpio_softc *sc; sc = device_get_softc(self); @@ -312,11 +301,11 @@ static int aoagpio_probe(device_t gpio) { - phandle_t node; - char bname[32]; - const char *name; - struct gpio_match *m; - struct aoagpio_softc *sc; + phandle_t node; + char bname[32]; + const char *name; + struct gpio_match *m; + struct aoagpio_softc *sc; node = ofw_bus_get_node(gpio); if (node == 0 || node == -1) @@ -340,7 +329,7 @@ sc->i2s = NULL; OF_getprop(node, "audio-gpio-active-state", - &sc->detect_active, sizeof(sc->detect_active)); + &sc->detect_active, sizeof(sc->detect_active)); if ((1 << m->ctrl) & GPIO_CTRL_EXTINT_SET) aoagpio_int(gpio); @@ -357,10 +346,10 @@ static int aoagpio_attach(device_t gpio) { - struct aoagpio_softc *sc; - struct resource *r; - void *cookie; - int irq, rid = 0; + struct aoagpio_softc *sc; + struct resource *r; + void *cookie; + int irq, rid = 0; sc = device_get_softc(gpio); @@ -373,11 +362,12 @@ DPRINTF(("interrupting at irq %d\n", irq)); if (powerpc_config_intr(irq, INTR_TRIGGER_EDGE, - INTR_POLARITY_LOW) != 0) + INTR_POLARITY_LOW) != 0) return (ENXIO); - bus_setup_intr(gpio, r, INTR_TYPE_MISC | INTR_MPSAFE | - INTR_ENTROPY, NULL, aoagpio_int, gpio, &cookie); + bus_setup_intr(gpio, r, + INTR_TYPE_MISC | INTR_MPSAFE | INTR_ENTROPY, NULL, + aoagpio_int, gpio, &cookie); } return (0); @@ -386,54 +376,51 @@ /* * I2S module registers */ -#define I2S_INT 0x00 -#define I2S_FORMAT 0x10 -#define I2S_FRAMECOUNT 0x40 -#define I2S_FRAMEMATCH 0x50 -#define I2S_WORDSIZE 0x60 +#define I2S_INT 0x00 +#define I2S_FORMAT 0x10 +#define I2S_FRAMECOUNT 0x40 +#define I2S_FRAMEMATCH 0x50 +#define I2S_WORDSIZE 0x60 /* I2S_INT register definitions */ -#define I2S_INT_CLKSTOPPEND 0x01000000 /* clock-stop interrupt pending */ +#define I2S_INT_CLKSTOPPEND 0x01000000 /* clock-stop interrupt pending */ /* I2S_FORMAT register definitions */ -#define CLKSRC_49MHz 0x80000000 /* Use 49152000Hz Osc. */ -#define CLKSRC_45MHz 0x40000000 /* Use 45158400Hz Osc. */ -#define CLKSRC_18MHz 0x00000000 /* Use 18432000Hz Osc. */ -#define MCLK_DIV_MASK 0x1f000000 /* MCLK = SRC / DIV */ -#define SCLK_DIV_MASK 0x00f00000 /* SCLK = MCLK / DIV */ -#define SCLK_MASTER 0x00080000 /* Master mode */ -#define SCLK_SLAVE 0x00000000 /* Slave mode */ -#define SERIAL_FORMAT 0x00070000 -#define SERIAL_SONY 0x00000000 -#define SERIAL_64x 0x00010000 -#define SERIAL_32x 0x00020000 -#define SERIAL_DAV 0x00040000 -#define SERIAL_SILICON 0x00050000 +#define CLKSRC_49MHz 0x80000000 /* Use 49152000Hz Osc. */ +#define CLKSRC_45MHz 0x40000000 /* Use 45158400Hz Osc. */ +#define CLKSRC_18MHz 0x00000000 /* Use 18432000Hz Osc. */ +#define MCLK_DIV_MASK 0x1f000000 /* MCLK = SRC / DIV */ +#define SCLK_DIV_MASK 0x00f00000 /* SCLK = MCLK / DIV */ +#define SCLK_MASTER 0x00080000 /* Master mode */ +#define SCLK_SLAVE 0x00000000 /* Slave mode */ +#define SERIAL_FORMAT 0x00070000 +#define SERIAL_SONY 0x00000000 +#define SERIAL_64x 0x00010000 +#define SERIAL_32x 0x00020000 +#define SERIAL_DAV 0x00040000 +#define SERIAL_SILICON 0x00050000 /* I2S_WORDSIZE register definitions */ -#define INPUT_STEREO (2 << 24) -#define INPUT_MONO (1 << 24) -#define INPUT_16BIT (0 << 16) -#define INPUT_24BIT (3 << 16) -#define OUTPUT_STEREO (2 << 8) -#define OUTPUT_MONO (1 << 8) -#define OUTPUT_16BIT (0 << 0) -#define OUTPUT_24BIT (3 << 0) +#define INPUT_STEREO (2 << 24) +#define INPUT_MONO (1 << 24) +#define INPUT_16BIT (0 << 16) +#define INPUT_24BIT (3 << 16) +#define OUTPUT_STEREO (2 << 8) +#define OUTPUT_MONO (1 << 8) +#define OUTPUT_16BIT (0 << 0) +#define OUTPUT_24BIT (3 << 0) /* Master clock, needed by some codecs. We hardcode this to 256 * fs as this is valid for most codecs. */ -#define MCLK_FS 256 +#define MCLK_FS 256 /* Number of clock sources we can use. */ -#define NCLKS 3 +#define NCLKS 3 static const struct i2s_clksrc { u_int cs_clock; u_int cs_reg; -} clksrc[NCLKS] = { - {49152000, CLKSRC_49MHz}, - {45158400, CLKSRC_45MHz}, - {18432000, CLKSRC_18MHz} -}; +} clksrc[NCLKS] = { { 49152000, CLKSRC_49MHz }, { 45158400, CLKSRC_45MHz }, + { 18432000, CLKSRC_18MHz } }; /* Configure the I2S controller for the required settings. 'rate' is the frame rate. @@ -550,21 +537,23 @@ if (obio_fcr_isset(OBIO_FCR1, I2S0CLKEN)) { bus_space_write_4(sc->sc_tag, sc->sc_bsh, I2S_INT, - I2S_INT_CLKSTOPPEND); + I2S_INT_CLKSTOPPEND); obio_fcr_clear(OBIO_FCR1, I2S0CLKEN); for (timo = 1000; timo > 0; timo--) { if (bus_space_read_4(sc->sc_tag, sc->sc_bsh, - I2S_INT) & I2S_INT_CLKSTOPPEND) + I2S_INT) & + I2S_INT_CLKSTOPPEND) break; DELAY(10); } if (timo == 0) - printf("%s: timeout waiting for clock to stop\n", - sc->sc_dev.dv_xname); + printf( + "%s: timeout waiting for clock to stop\n", + sc->sc_dev.dv_xname); } bus_space_write_4(sc->sc_tag, sc->sc_bsh, I2S_FORMAT, reg); @@ -580,8 +569,8 @@ static phandle_t of_find_firstchild_byname(phandle_t node, const char *req_name) { - char name[32]; /* max name len per OF spec. */ - phandle_t n; + char name[32]; /* max name len per OF spec. */ + phandle_t n; for (n = OF_child(node); n != -1; n = OF_peer(n)) { bzero(name, sizeof(name)); @@ -608,8 +597,8 @@ static void gpio_write(enum gpio_ctrl ctrl, u_int x) { - struct aoagpio_softc *sc; - u_int reg; + struct aoagpio_softc *sc; + u_int reg; if ((sc = gpio_ctrls[ctrl]) == NULL) return; @@ -626,12 +615,10 @@ { u_int mask = 0; - if (gpio_ctrls[HEADPHONE_DETECT] && - gpio_ctrls[HEADPHONE_DETECT]->level) + if (gpio_ctrls[HEADPHONE_DETECT] && gpio_ctrls[HEADPHONE_DETECT]->level) mask |= 1 << 1; - if (gpio_ctrls[LINEOUT_DETECT] && - gpio_ctrls[LINEOUT_DETECT]->level) + if (gpio_ctrls[LINEOUT_DETECT] && gpio_ctrls[LINEOUT_DETECT]->level) mask |= 1 << 2; if (mask == 0) @@ -640,12 +627,12 @@ i2s_set_outputs(sc, mask); } -#define reset_active 0 +#define reset_active 0 /* these values are in microseconds */ -#define RESET_SETUP_TIME 5000 -#define RESET_HOLD_TIME 20000 -#define RESET_RELEASE_TIME 10000 +#define RESET_SETUP_TIME 5000 +#define RESET_HOLD_TIME 20000 +#define RESET_RELEASE_TIME 10000 static void i2s_audio_hw_reset(struct i2s_softc *sc) @@ -653,13 +640,13 @@ if (gpio_ctrls[AUDIO_HW_RESET]) { DPRINTF(("resetting codec\n")); - gpio_write(AUDIO_HW_RESET, !reset_active); /* Negate RESET */ + gpio_write(AUDIO_HW_RESET, !reset_active); /* Negate RESET */ DELAY(RESET_SETUP_TIME); - gpio_write(AUDIO_HW_RESET, reset_active); /* Assert RESET */ + gpio_write(AUDIO_HW_RESET, reset_active); /* Assert RESET */ DELAY(RESET_HOLD_TIME); - gpio_write(AUDIO_HW_RESET, !reset_active); /* Negate RESET */ + gpio_write(AUDIO_HW_RESET, !reset_active); /* Negate RESET */ DELAY(RESET_RELEASE_TIME); } else { @@ -667,26 +654,25 @@ } } -#define AMP_ACTIVE 0 /* XXX OF */ -#define HEADPHONE_ACTIVE 0 /* XXX OF */ -#define LINEOUT_ACTIVE 0 /* XXX OF */ - -#define MUTE_CONTROL(xxx, yyy) \ -static void \ -i2s_mute_##xxx(struct i2s_softc *sc, int mute) \ -{ \ - int x; \ - \ - if (gpio_ctrls[yyy##_MUTE] == NULL) \ - return; \ - if (mute) \ - x = yyy##_ACTIVE; \ - else \ - x = ! yyy##_ACTIVE; \ - \ - if (x != gpio_read(yyy##_MUTE)) \ - gpio_write(yyy##_MUTE, x); \ -} +#define AMP_ACTIVE 0 /* XXX OF */ +#define HEADPHONE_ACTIVE 0 /* XXX OF */ +#define LINEOUT_ACTIVE 0 /* XXX OF */ + +#define MUTE_CONTROL(xxx, yyy) \ + static void i2s_mute_##xxx(struct i2s_softc *sc, int mute) \ + { \ + int x; \ + \ + if (gpio_ctrls[yyy##_MUTE] == NULL) \ + return; \ + if (mute) \ + x = yyy##_ACTIVE; \ + else \ + x = !yyy##_ACTIVE; \ + \ + if (x != gpio_read(yyy##_MUTE)) \ + gpio_write(yyy##_MUTE, x); \ + } MUTE_CONTROL(speaker, AMP) MUTE_CONTROL(headphone, HEADPHONE) @@ -695,7 +681,7 @@ static void i2s_set_outputs(void *ptr, u_int mask) { - struct i2s_softc *sc = ptr; + struct i2s_softc *sc = ptr; if (mask == sc->output_mask) return; @@ -730,9 +716,9 @@ static void i2s_postattach(void *xsc) { - struct i2s_softc *sc = xsc; - device_t self; - int i; + struct i2s_softc *sc = xsc; + device_t self; + int i; self = sc->aoa.sc_dev; Index: sys/dev/sound/macio/onyx.c =================================================================== --- sys/dev/sound/macio/onyx.c +++ sys/dev/sound/macio/onyx.c @@ -33,18 +33,19 @@ #include #include -#include -#include #include -#include +#include #include +#include +#include #include +#include + +#include #include #include -#include -#include #include -#include +#include #include #include @@ -59,77 +60,68 @@ #include "mixer_if.h" extern kobj_class_t i2s_mixer_class; -extern device_t i2s_mixer; +extern device_t i2s_mixer; -struct onyx_softc -{ +struct onyx_softc { device_t sc_dev; uint32_t sc_addr; }; -static int onyx_probe(device_t); -static int onyx_attach(device_t); -static int onyx_init(struct snd_mixer *m); -static int onyx_uninit(struct snd_mixer *m); -static int onyx_reinit(struct snd_mixer *m); -static int onyx_set(struct snd_mixer *m, unsigned dev, unsigned left, - unsigned right); -static u_int32_t onyx_setrecsrc(struct snd_mixer *m, u_int32_t src); +static int onyx_probe(device_t); +static int onyx_attach(device_t); +static int onyx_init(struct snd_mixer *m); +static int onyx_uninit(struct snd_mixer *m); +static int onyx_reinit(struct snd_mixer *m); +static int onyx_set(struct snd_mixer *m, unsigned dev, unsigned left, + unsigned right); +static u_int32_t onyx_setrecsrc(struct snd_mixer *m, u_int32_t src); static device_method_t onyx_methods[] = { /* Device interface. */ - DEVMETHOD(device_probe, onyx_probe), - DEVMETHOD(device_attach, onyx_attach), - { 0, 0 } + DEVMETHOD(device_probe, onyx_probe), + DEVMETHOD(device_attach, onyx_attach), { 0, 0 } }; -static driver_t onyx_driver = { - "onyx", - onyx_methods, - sizeof(struct onyx_softc) -}; +static driver_t onyx_driver = { "onyx", onyx_methods, + sizeof(struct onyx_softc) }; DRIVER_MODULE(onyx, iicbus, onyx_driver, 0, 0); MODULE_VERSION(onyx, 1); MODULE_DEPEND(onyx, iicbus, 1, 1, 1); -static kobj_method_t onyx_mixer_methods[] = { - KOBJMETHOD(mixer_init, onyx_init), - KOBJMETHOD(mixer_uninit, onyx_uninit), - KOBJMETHOD(mixer_reinit, onyx_reinit), - KOBJMETHOD(mixer_set, onyx_set), - KOBJMETHOD(mixer_setrecsrc, onyx_setrecsrc), - KOBJMETHOD_END -}; +static kobj_method_t onyx_mixer_methods[] = { KOBJMETHOD(mixer_init, onyx_init), + KOBJMETHOD(mixer_uninit, onyx_uninit), + KOBJMETHOD(mixer_reinit, onyx_reinit), KOBJMETHOD(mixer_set, onyx_set), + KOBJMETHOD(mixer_setrecsrc, onyx_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(onyx_mixer); -#define PCM3052_IICADDR 0x8C /* Hard-coded I2C slave addr */ +#define PCM3052_IICADDR 0x8C /* Hard-coded I2C slave addr */ /* * PCM3052 registers. * Numbering in decimal as used in the data sheet. */ -#define PCM3052_REG_LEFT_ATTN 65 -#define PCM3052_REG_RIGHT_ATTN 66 -#define PCM3052_REG_CONTROL 67 -#define PCM3052_MRST (1 << 7) -#define PCM3052_SRST (1 << 6) -#define PCM3052_REG_DAC_CONTROL 68 -#define PCM3052_OVR1 (1 << 6) -#define PCM3052_MUTE_L (1 << 1) -#define PCM3052_MUTE_R (1 << 0) -#define PCM3052_REG_DAC_DEEMPH 69 -#define PCM3052_REG_DAC_FILTER 70 -#define PCM3052_DAC_FILTER_ALWAYS (1 << 2) -#define PCM3052_REG_OUT_PHASE 71 -#define PCM3052_REG_ADC_CONTROL 72 -#define PCM3052_REG_ADC_HPF_BP 75 -#define PCM3052_HPF_ALWAYS (1 << 2) -#define PCM3052_REG_INFO_1 77 -#define PCM3052_REG_INFO_2 78 -#define PCM3052_REG_INFO_3 79 -#define PCM3052_REG_INFO_4 80 +#define PCM3052_REG_LEFT_ATTN 65 +#define PCM3052_REG_RIGHT_ATTN 66 +#define PCM3052_REG_CONTROL 67 +#define PCM3052_MRST (1 << 7) +#define PCM3052_SRST (1 << 6) +#define PCM3052_REG_DAC_CONTROL 68 +#define PCM3052_OVR1 (1 << 6) +#define PCM3052_MUTE_L (1 << 1) +#define PCM3052_MUTE_R (1 << 0) +#define PCM3052_REG_DAC_DEEMPH 69 +#define PCM3052_REG_DAC_FILTER 70 +#define PCM3052_DAC_FILTER_ALWAYS (1 << 2) +#define PCM3052_REG_OUT_PHASE 71 +#define PCM3052_REG_ADC_CONTROL 72 +#define PCM3052_REG_ADC_HPF_BP 75 +#define PCM3052_HPF_ALWAYS (1 << 2) +#define PCM3052_REG_INFO_1 77 +#define PCM3052_REG_INFO_2 78 +#define PCM3052_REG_INFO_3 79 +#define PCM3052_REG_INFO_4 80 struct onyx_reg { u_char LEFT_ATTN; @@ -148,21 +140,21 @@ }; static const struct onyx_reg onyx_initdata = { - 0x80, /* LEFT_ATTN, Mute default */ - 0x80, /* RIGHT_ATTN, Mute default */ - PCM3052_MRST | PCM3052_SRST, /* CONTROL */ - 0, /* DAC_CONTROL */ - 0, /* DAC_DEEMPH */ - PCM3052_DAC_FILTER_ALWAYS, /* DAC_FILTER */ - 0, /* OUT_PHASE */ - (-1 /* dB */ + 8) & 0xf, /* ADC_CONTROL */ - PCM3052_HPF_ALWAYS, /* ADC_HPF_BP */ - (1 << 2), /* INFO_1 */ - 2, /* INFO_2, */ - 0, /* INFO_3, CLK 0 (level II), - SF 0 (44.1 kHz) */ - 1 /* INFO_4, VALIDL/R 0, - WL 24-bit depth */ + 0x80, /* LEFT_ATTN, Mute default */ + 0x80, /* RIGHT_ATTN, Mute default */ + PCM3052_MRST | PCM3052_SRST, /* CONTROL */ + 0, /* DAC_CONTROL */ + 0, /* DAC_DEEMPH */ + PCM3052_DAC_FILTER_ALWAYS, /* DAC_FILTER */ + 0, /* OUT_PHASE */ + (-1 /* dB */ + 8) & 0xf, /* ADC_CONTROL */ + PCM3052_HPF_ALWAYS, /* ADC_HPF_BP */ + (1 << 2), /* INFO_1 */ + 2, /* INFO_2, */ + 0, /* INFO_3, CLK 0 (level II), + SF 0 (44.1 kHz) */ + 1 /* INFO_4, VALIDL/R 0, + WL 24-bit depth */ }; static int @@ -171,9 +163,7 @@ u_int size; uint8_t buf[16]; - struct iic_msg msg[] = { - { sc->sc_addr, IIC_M_WR, 0, buf } - }; + struct iic_msg msg[] = { { sc->sc_addr, IIC_M_WR, 0, buf } }; size = 1; msg[0].len = size + 1; @@ -227,20 +217,18 @@ onyx_init(struct snd_mixer *m) { struct onyx_softc *sc; - u_int x = 0; + u_int x = 0; sc = device_get_softc(mix_getdevinfo(m)); onyx_write(sc, PCM3052_REG_LEFT_ATTN, onyx_initdata.LEFT_ATTN); onyx_write(sc, PCM3052_REG_RIGHT_ATTN, onyx_initdata.RIGHT_ATTN); onyx_write(sc, PCM3052_REG_CONTROL, onyx_initdata.CONTROL); - onyx_write(sc, PCM3052_REG_DAC_CONTROL, - onyx_initdata.DAC_CONTROL); + onyx_write(sc, PCM3052_REG_DAC_CONTROL, onyx_initdata.DAC_CONTROL); onyx_write(sc, PCM3052_REG_DAC_DEEMPH, onyx_initdata.DAC_DEEMPH); onyx_write(sc, PCM3052_REG_DAC_FILTER, onyx_initdata.DAC_FILTER); onyx_write(sc, PCM3052_REG_OUT_PHASE, onyx_initdata.OUT_PHASE); - onyx_write(sc, PCM3052_REG_ADC_CONTROL, - onyx_initdata.ADC_CONTROL); + onyx_write(sc, PCM3052_REG_ADC_CONTROL, onyx_initdata.ADC_CONTROL); onyx_write(sc, PCM3052_REG_ADC_HPF_BP, onyx_initdata.ADC_HPF_BP); onyx_write(sc, PCM3052_REG_INFO_1, onyx_initdata.INFO_1); onyx_write(sc, PCM3052_REG_INFO_2, onyx_initdata.INFO_2); Index: sys/dev/sound/macio/snapper.c =================================================================== --- sys/dev/sound/macio/snapper.c +++ sys/dev/sound/macio/snapper.c @@ -59,18 +59,19 @@ #include #include -#include -#include #include -#include +#include #include +#include +#include #include +#include + +#include #include #include -#include -#include #include -#include +#include #include #include @@ -85,106 +86,99 @@ #include "mixer_if.h" extern kobj_class_t i2s_mixer_class; -extern device_t i2s_mixer; +extern device_t i2s_mixer; -struct snapper_softc -{ +struct snapper_softc { device_t sc_dev; uint32_t sc_addr; }; -static int snapper_probe(device_t); -static int snapper_attach(device_t); -static int snapper_init(struct snd_mixer *m); -static int snapper_uninit(struct snd_mixer *m); -static int snapper_reinit(struct snd_mixer *m); -static int snapper_set(struct snd_mixer *m, unsigned dev, unsigned left, - unsigned right); -static u_int32_t snapper_setrecsrc(struct snd_mixer *m, u_int32_t src); +static int snapper_probe(device_t); +static int snapper_attach(device_t); +static int snapper_init(struct snd_mixer *m); +static int snapper_uninit(struct snd_mixer *m); +static int snapper_reinit(struct snd_mixer *m); +static int snapper_set(struct snd_mixer *m, unsigned dev, unsigned left, + unsigned right); +static u_int32_t snapper_setrecsrc(struct snd_mixer *m, u_int32_t src); static device_method_t snapper_methods[] = { /* Device interface. */ - DEVMETHOD(device_probe, snapper_probe), - DEVMETHOD(device_attach, snapper_attach), - { 0, 0 } + DEVMETHOD(device_probe, snapper_probe), + DEVMETHOD(device_attach, snapper_attach), { 0, 0 } }; -static driver_t snapper_driver = { - "snapper", - snapper_methods, - sizeof(struct snapper_softc) -}; +static driver_t snapper_driver = { "snapper", snapper_methods, + sizeof(struct snapper_softc) }; DRIVER_MODULE(snapper, iicbus, snapper_driver, 0, 0); MODULE_VERSION(snapper, 1); MODULE_DEPEND(snapper, iicbus, 1, 1, 1); -static kobj_method_t snapper_mixer_methods[] = { - KOBJMETHOD(mixer_init, snapper_init), - KOBJMETHOD(mixer_uninit, snapper_uninit), - KOBJMETHOD(mixer_reinit, snapper_reinit), - KOBJMETHOD(mixer_set, snapper_set), - KOBJMETHOD(mixer_setrecsrc, snapper_setrecsrc), - KOBJMETHOD_END -}; +static kobj_method_t snapper_mixer_methods[] = { KOBJMETHOD(mixer_init, + snapper_init), + KOBJMETHOD(mixer_uninit, snapper_uninit), + KOBJMETHOD(mixer_reinit, snapper_reinit), + KOBJMETHOD(mixer_set, snapper_set), + KOBJMETHOD(mixer_setrecsrc, snapper_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(snapper_mixer); -#define SNAPPER_IICADDR 0x6a /* Hard-coded I2C slave addr */ +#define SNAPPER_IICADDR 0x6a /* Hard-coded I2C slave addr */ /* Snapper (Texas Instruments TAS3004) registers. */ -#define SNAPPER_MCR1 0x01 /* Main control register 1 (1byte) */ -#define SNAPPER_DRC 0x02 /* Dynamic range compression (6bytes) */ -#define SNAPPER_VOLUME 0x04 /* Volume (6bytes) */ -#define SNAPPER_TREBLE 0x05 /* Treble control (1byte) */ -#define SNAPPER_BASS 0x06 /* Bass control (1byte) */ -#define SNAPPER_MIXER_L 0x07 /* Mixer left gain (9bytes) */ -#define SNAPPER_MIXER_R 0x08 /* Mixer right gain (9bytes) */ -#define SNAPPER_LB0 0x0a /* Left biquad 0 (15bytes) */ -#define SNAPPER_LB1 0x0b /* Left biquad 1 (15bytes) */ -#define SNAPPER_LB2 0x0c /* Left biquad 2 (15bytes) */ -#define SNAPPER_LB3 0x0d /* Left biquad 3 (15bytes) */ -#define SNAPPER_LB4 0x0e /* Left biquad 4 (15bytes) */ -#define SNAPPER_LB5 0x0f /* Left biquad 5 (15bytes) */ -#define SNAPPER_LB6 0x10 /* Left biquad 6 (15bytes) */ -#define SNAPPER_RB0 0x13 /* Right biquad 0 (15bytes) */ -#define SNAPPER_RB1 0x14 /* Right biquad 1 (15bytes) */ -#define SNAPPER_RB2 0x15 /* Right biquad 2 (15bytes) */ -#define SNAPPER_RB3 0x16 /* Right biquad 3 (15bytes) */ -#define SNAPPER_RB4 0x17 /* Right biquad 4 (15bytes) */ -#define SNAPPER_RB5 0x18 /* Right biquad 5 (15bytes) */ -#define SNAPPER_RB6 0x19 /* Right biquad 6 (15bytes) */ -#define SNAPPER_LLB 0x21 /* Left loudness biquad (15bytes) */ -#define SNAPPER_RLB 0x22 /* Right loudness biquad (15bytes) */ -#define SNAPPER_LLB_GAIN 0x23 /* Left loudness biquad gain (3bytes) */ -#define SNAPPER_RLB_GAIN 0x24 /* Right loudness biquad gain (3bytes) */ -#define SNAPPER_ACR 0x40 /* Analog control register (1byte) */ -#define SNAPPER_MCR2 0x43 /* Main control register 2 (1byte) */ -#define SNAPPER_MCR1_FL 0x80 /* Fast load */ -#define SNAPPER_MCR1_SC 0x40 /* SCLK frequency */ -#define SNAPPER_MCR1_SC_32 0x00 /* 32fs */ -#define SNAPPER_MCR1_SC_64 0x40 /* 64fs */ -#define SNAPPER_MCR1_SM 0x30 /* Output serial port mode */ -#define SNAPPER_MCR1_SM_L 0x00 /* Left justified */ -#define SNAPPER_MCR1_SM_R 0x10 /* Right justified */ -#define SNAPPER_MCR1_SM_I2S 0x20 /* I2S */ -#define SNAPPER_MCR1_W 0x03 /* Serial port word length */ -#define SNAPPER_MCR1_W_16 0x00 /* 16 bit */ -#define SNAPPER_MCR1_W_18 0x01 /* 18 bit */ -#define SNAPPER_MCR1_W_20 0x02 /* 20 bit */ -#define SNAPPER_MCR1_W_24 0x03 /* 24 bit */ -#define SNAPPER_MCR2_DL 0x80 /* Download */ -#define SNAPPER_MCR2_AP 0x02 /* All pass mode */ -#define SNAPPER_ACR_ADM 0x80 /* ADC output mode */ -#define SNAPPER_ACR_LRB 0x40 /* Select B input */ -#define SNAPPER_ACR_DM 0x0c /* De-emphasis control */ -#define SNAPPER_ACR_DM_OFF 0x00 /* off */ -#define SNAPPER_ACR_DM_48 0x04 /* fs = 48kHz */ -#define SNAPPER_ACR_DM_44 0x08 /* fs = 44.1kHz */ -#define SNAPPER_ACR_INP 0x02 /* Analog input select */ -#define SNAPPER_ACR_INP_A 0x00 /* A */ -#define SNAPPER_ACR_INP_B 0x02 /* B */ -#define SNAPPER_ACR_APD 0x01 /* Analog power down */ +#define SNAPPER_MCR1 0x01 /* Main control register 1 (1byte) */ +#define SNAPPER_DRC 0x02 /* Dynamic range compression (6bytes) */ +#define SNAPPER_VOLUME 0x04 /* Volume (6bytes) */ +#define SNAPPER_TREBLE 0x05 /* Treble control (1byte) */ +#define SNAPPER_BASS 0x06 /* Bass control (1byte) */ +#define SNAPPER_MIXER_L 0x07 /* Mixer left gain (9bytes) */ +#define SNAPPER_MIXER_R 0x08 /* Mixer right gain (9bytes) */ +#define SNAPPER_LB0 0x0a /* Left biquad 0 (15bytes) */ +#define SNAPPER_LB1 0x0b /* Left biquad 1 (15bytes) */ +#define SNAPPER_LB2 0x0c /* Left biquad 2 (15bytes) */ +#define SNAPPER_LB3 0x0d /* Left biquad 3 (15bytes) */ +#define SNAPPER_LB4 0x0e /* Left biquad 4 (15bytes) */ +#define SNAPPER_LB5 0x0f /* Left biquad 5 (15bytes) */ +#define SNAPPER_LB6 0x10 /* Left biquad 6 (15bytes) */ +#define SNAPPER_RB0 0x13 /* Right biquad 0 (15bytes) */ +#define SNAPPER_RB1 0x14 /* Right biquad 1 (15bytes) */ +#define SNAPPER_RB2 0x15 /* Right biquad 2 (15bytes) */ +#define SNAPPER_RB3 0x16 /* Right biquad 3 (15bytes) */ +#define SNAPPER_RB4 0x17 /* Right biquad 4 (15bytes) */ +#define SNAPPER_RB5 0x18 /* Right biquad 5 (15bytes) */ +#define SNAPPER_RB6 0x19 /* Right biquad 6 (15bytes) */ +#define SNAPPER_LLB 0x21 /* Left loudness biquad (15bytes) */ +#define SNAPPER_RLB 0x22 /* Right loudness biquad (15bytes) */ +#define SNAPPER_LLB_GAIN 0x23 /* Left loudness biquad gain (3bytes) */ +#define SNAPPER_RLB_GAIN 0x24 /* Right loudness biquad gain (3bytes) */ +#define SNAPPER_ACR 0x40 /* Analog control register (1byte) */ +#define SNAPPER_MCR2 0x43 /* Main control register 2 (1byte) */ +#define SNAPPER_MCR1_FL 0x80 /* Fast load */ +#define SNAPPER_MCR1_SC 0x40 /* SCLK frequency */ +#define SNAPPER_MCR1_SC_32 0x00 /* 32fs */ +#define SNAPPER_MCR1_SC_64 0x40 /* 64fs */ +#define SNAPPER_MCR1_SM 0x30 /* Output serial port mode */ +#define SNAPPER_MCR1_SM_L 0x00 /* Left justified */ +#define SNAPPER_MCR1_SM_R 0x10 /* Right justified */ +#define SNAPPER_MCR1_SM_I2S 0x20 /* I2S */ +#define SNAPPER_MCR1_W 0x03 /* Serial port word length */ +#define SNAPPER_MCR1_W_16 0x00 /* 16 bit */ +#define SNAPPER_MCR1_W_18 0x01 /* 18 bit */ +#define SNAPPER_MCR1_W_20 0x02 /* 20 bit */ +#define SNAPPER_MCR1_W_24 0x03 /* 24 bit */ +#define SNAPPER_MCR2_DL 0x80 /* Download */ +#define SNAPPER_MCR2_AP 0x02 /* All pass mode */ +#define SNAPPER_ACR_ADM 0x80 /* ADC output mode */ +#define SNAPPER_ACR_LRB 0x40 /* Select B input */ +#define SNAPPER_ACR_DM 0x0c /* De-emphasis control */ +#define SNAPPER_ACR_DM_OFF 0x00 /* off */ +#define SNAPPER_ACR_DM_48 0x04 /* fs = 48kHz */ +#define SNAPPER_ACR_DM_44 0x08 /* fs = 44.1kHz */ +#define SNAPPER_ACR_INP 0x02 /* Analog input select */ +#define SNAPPER_ACR_INP_A 0x00 /* A */ +#define SNAPPER_ACR_INP_B 0x02 /* B */ +#define SNAPPER_ACR_APD 0x01 /* Analog power down */ struct snapper_reg { u_char MCR1[1]; @@ -218,103 +212,126 @@ static const struct snapper_reg snapper_initdata = { { SNAPPER_MCR1_SC_64 | SNAPPER_MCR1_SM_I2S | - SNAPPER_MCR1_W_16 }, /* MCR1 */ - { 1, 0, 0, 0, 0, 0 }, /* DRC */ - { 0, 0, 0, 0, 0, 0 }, /* VOLUME */ - { 0x72 }, /* TREBLE */ - { 0x72 }, /* BASS */ - { 0x10, 0x00, 0x00, 0, 0, 0, 0, 0, 0 }, /* MIXER_L */ - { 0x10, 0x00, 0x00, 0, 0, 0, 0, 0, 0 }, /* MIXER_R */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0, 0, 0 }, /* LLB_GAIN */ - { 0, 0, 0 }, /* RLB_GAIN */ - { SNAPPER_ACR_ADM | SNAPPER_ACR_LRB | SNAPPER_ACR_INP_B },/* ACR */ - { SNAPPER_MCR2_AP } /* MCR2 */ + SNAPPER_MCR1_W_16 }, /* MCR1 */ + { 1, 0, 0, 0, 0, 0 }, /* DRC */ + { 0, 0, 0, 0, 0, 0 }, /* VOLUME */ + { 0x72 }, /* TREBLE */ + { 0x72 }, /* BASS */ + { 0x10, 0x00, 0x00, 0, 0, 0, 0, 0, 0 }, /* MIXER_L */ + { 0x10, 0x00, 0x00, 0, 0, 0, 0, 0, 0 }, /* MIXER_R */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0, 0, 0 }, /* LLB_GAIN */ + { 0, 0, 0 }, /* RLB_GAIN */ + { SNAPPER_ACR_ADM | SNAPPER_ACR_LRB | SNAPPER_ACR_INP_B }, /* ACR */ + { SNAPPER_MCR2_AP } /* MCR2 */ }; static const char snapper_regsize[] = { - 0, /* 0x00 */ - sizeof snapper_initdata.MCR1, /* 0x01 */ - sizeof snapper_initdata.DRC, /* 0x02 */ - 0, /* 0x03 */ - sizeof snapper_initdata.VOLUME, /* 0x04 */ - sizeof snapper_initdata.TREBLE, /* 0x05 */ - sizeof snapper_initdata.BASS, /* 0x06 */ - sizeof snapper_initdata.MIXER_L, /* 0x07 */ - sizeof snapper_initdata.MIXER_R, /* 0x08 */ - 0, /* 0x09 */ - sizeof snapper_initdata.LB0, /* 0x0a */ - sizeof snapper_initdata.LB1, /* 0x0b */ - sizeof snapper_initdata.LB2, /* 0x0c */ - sizeof snapper_initdata.LB3, /* 0x0d */ - sizeof snapper_initdata.LB4, /* 0x0e */ - sizeof snapper_initdata.LB5, /* 0x0f */ - sizeof snapper_initdata.LB6, /* 0x10 */ - 0, /* 0x11 */ - 0, /* 0x12 */ - sizeof snapper_initdata.RB0, /* 0x13 */ - sizeof snapper_initdata.RB1, /* 0x14 */ - sizeof snapper_initdata.RB2, /* 0x15 */ - sizeof snapper_initdata.RB3, /* 0x16 */ - sizeof snapper_initdata.RB4, /* 0x17 */ - sizeof snapper_initdata.RB5, /* 0x18 */ - sizeof snapper_initdata.RB6, /* 0x19 */ - 0,0,0,0, 0,0, - 0, /* 0x20 */ - sizeof snapper_initdata.LLB, /* 0x21 */ - sizeof snapper_initdata.RLB, /* 0x22 */ - sizeof snapper_initdata.LLB_GAIN, /* 0x23 */ - sizeof snapper_initdata.RLB_GAIN, /* 0x24 */ - 0,0,0,0, 0,0,0,0, 0,0,0, - 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, - sizeof snapper_initdata.ACR, /* 0x40 */ - 0, /* 0x41 */ - 0, /* 0x42 */ - sizeof snapper_initdata.MCR2 /* 0x43 */ + 0, /* 0x00 */ + sizeof snapper_initdata.MCR1, /* 0x01 */ + sizeof snapper_initdata.DRC, /* 0x02 */ + 0, /* 0x03 */ + sizeof snapper_initdata.VOLUME, /* 0x04 */ + sizeof snapper_initdata.TREBLE, /* 0x05 */ + sizeof snapper_initdata.BASS, /* 0x06 */ + sizeof snapper_initdata.MIXER_L, /* 0x07 */ + sizeof snapper_initdata.MIXER_R, /* 0x08 */ + 0, /* 0x09 */ + sizeof snapper_initdata.LB0, /* 0x0a */ + sizeof snapper_initdata.LB1, /* 0x0b */ + sizeof snapper_initdata.LB2, /* 0x0c */ + sizeof snapper_initdata.LB3, /* 0x0d */ + sizeof snapper_initdata.LB4, /* 0x0e */ + sizeof snapper_initdata.LB5, /* 0x0f */ + sizeof snapper_initdata.LB6, /* 0x10 */ + 0, /* 0x11 */ + 0, /* 0x12 */ + sizeof snapper_initdata.RB0, /* 0x13 */ + sizeof snapper_initdata.RB1, /* 0x14 */ + sizeof snapper_initdata.RB2, /* 0x15 */ + sizeof snapper_initdata.RB3, /* 0x16 */ + sizeof snapper_initdata.RB4, /* 0x17 */ + sizeof snapper_initdata.RB5, /* 0x18 */ + sizeof snapper_initdata.RB6, /* 0x19 */ + 0, 0, 0, 0, 0, 0, 0, /* 0x20 */ + sizeof snapper_initdata.LLB, /* 0x21 */ + sizeof snapper_initdata.RLB, /* 0x22 */ + sizeof snapper_initdata.LLB_GAIN, /* 0x23 */ + sizeof snapper_initdata.RLB_GAIN, /* 0x24 */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, sizeof snapper_initdata.ACR, /* 0x40 */ + 0, /* 0x41 */ + 0, /* 0x42 */ + sizeof snapper_initdata.MCR2 /* 0x43 */ }; /* dB = 20 * log (x) table. */ -static u_int snapper_volume_table[100] = { - 0x00000148, 0x0000015C, 0x00000171, 0x00000186, // -46.0, -45.5, -45.0, -44.5, - 0x0000019E, 0x000001B6, 0x000001D0, 0x000001EB, // -44.0, -43.5, -43.0, -42.5, - 0x00000209, 0x00000227, 0x00000248, 0x0000026B, // -42.0, -41.5, -41.0, -40.5, - 0x0000028F, 0x000002B6, 0x000002DF, 0x0000030B, // -40.0, -39.5, -39.0, -38.5, - 0x00000339, 0x0000036A, 0x0000039E, 0x000003D5, // -38.0, -37.5, -37.0, -36.5, - 0x0000040F, 0x0000044C, 0x0000048D, 0x000004D2, // -36.0, -35.5, -35.0, -34.5, - 0x0000051C, 0x00000569, 0x000005BB, 0x00000612, // -34.0, -33.5, -33.0, -32.5, - 0x0000066E, 0x000006D0, 0x00000737, 0x000007A5, // -32.0, -31.5, -31.0, -30.5, - 0x00000818, 0x00000893, 0x00000915, 0x0000099F, // -30.0, -29.5, -29.0, -28.5, - 0x00000A31, 0x00000ACC, 0x00000B6F, 0x00000C1D, // -28.0, -27.5, -27.0, -26.5, - 0x00000CD5, 0x00000D97, 0x00000E65, 0x00000F40, // -26.0, -25.5, -25.0, -24.5, - 0x00001027, 0x0000111C, 0x00001220, 0x00001333, // -24.0, -23.5, -23.0, -22.5, - 0x00001456, 0x0000158A, 0x000016D1, 0x0000182B, // -22.0, -21.5, -21.0, -20.5, - 0x0000199A, 0x00001B1E, 0x00001CB9, 0x00001E6D, // -20.0, -19.5, -19.0, -18.5, - 0x0000203A, 0x00002223, 0x00002429, 0x0000264E, // -18.0, -17.5, -17.0, -16.5, - 0x00002893, 0x00002AFA, 0x00002D86, 0x00003039, // -16.0, -15.5, -15.0, -14.5, - 0x00003314, 0x0000361B, 0x00003950, 0x00003CB5, // -14.0, -13.5, -13.0, -12.5, - 0x0000404E, 0x0000441D, 0x00004827, 0x00004C6D, // -12.0, -11.5, -11.0, -10.5, - 0x000050F4, 0x000055C0, 0x00005AD5, 0x00006037, // -10.0, -9.5, -9.0, -8.5, - 0x000065EA, 0x00006BF4, 0x0000725A, 0x00007920, // -8.0, -7.5, -7.0, -6.5, - 0x0000804E, 0x000087EF, 0x00008FF6, 0x0000987D, // -6.0, -5.5, -5.0, -4.5, - 0x0000A186, 0x0000AB19, 0x0000B53C, 0x0000BFF9, // -4.0, -3.5, -3.0, -2.5, - 0x0000CB59, 0x0000D766, 0x0000E429, 0x0000F1AE, // -2.0, -1.5, -1.0, -0.5, - 0x00010000, 0x00010F2B, 0x00011F3D, 0x00013042, // 0.0, +0.5, +1.0, +1.5, - 0x00014249, 0x00015562, 0x0001699C, 0x00017F09 // 2.0, +2.5, +3.0, +3.5, +static u_int snapper_volume_table[100] = { + 0x00000148, 0x0000015C, 0x00000171, + 0x00000186, // -46.0, -45.5, -45.0, -44.5, + 0x0000019E, 0x000001B6, 0x000001D0, + 0x000001EB, // -44.0, -43.5, -43.0, -42.5, + 0x00000209, 0x00000227, 0x00000248, + 0x0000026B, // -42.0, -41.5, -41.0, -40.5, + 0x0000028F, 0x000002B6, 0x000002DF, + 0x0000030B, // -40.0, -39.5, -39.0, -38.5, + 0x00000339, 0x0000036A, 0x0000039E, + 0x000003D5, // -38.0, -37.5, -37.0, -36.5, + 0x0000040F, 0x0000044C, 0x0000048D, + 0x000004D2, // -36.0, -35.5, -35.0, -34.5, + 0x0000051C, 0x00000569, 0x000005BB, + 0x00000612, // -34.0, -33.5, -33.0, -32.5, + 0x0000066E, 0x000006D0, 0x00000737, + 0x000007A5, // -32.0, -31.5, -31.0, -30.5, + 0x00000818, 0x00000893, 0x00000915, + 0x0000099F, // -30.0, -29.5, -29.0, -28.5, + 0x00000A31, 0x00000ACC, 0x00000B6F, + 0x00000C1D, // -28.0, -27.5, -27.0, -26.5, + 0x00000CD5, 0x00000D97, 0x00000E65, + 0x00000F40, // -26.0, -25.5, -25.0, -24.5, + 0x00001027, 0x0000111C, 0x00001220, + 0x00001333, // -24.0, -23.5, -23.0, -22.5, + 0x00001456, 0x0000158A, 0x000016D1, + 0x0000182B, // -22.0, -21.5, -21.0, -20.5, + 0x0000199A, 0x00001B1E, 0x00001CB9, + 0x00001E6D, // -20.0, -19.5, -19.0, -18.5, + 0x0000203A, 0x00002223, 0x00002429, + 0x0000264E, // -18.0, -17.5, -17.0, -16.5, + 0x00002893, 0x00002AFA, 0x00002D86, + 0x00003039, // -16.0, -15.5, -15.0, -14.5, + 0x00003314, 0x0000361B, 0x00003950, + 0x00003CB5, // -14.0, -13.5, -13.0, -12.5, + 0x0000404E, 0x0000441D, 0x00004827, + 0x00004C6D, // -12.0, -11.5, -11.0, -10.5, + 0x000050F4, 0x000055C0, 0x00005AD5, + 0x00006037, // -10.0, -9.5, -9.0, -8.5, + 0x000065EA, 0x00006BF4, 0x0000725A, + 0x00007920, // -8.0, -7.5, -7.0, -6.5, + 0x0000804E, 0x000087EF, 0x00008FF6, + 0x0000987D, // -6.0, -5.5, -5.0, -4.5, + 0x0000A186, 0x0000AB19, 0x0000B53C, + 0x0000BFF9, // -4.0, -3.5, -3.0, -2.5, + 0x0000CB59, 0x0000D766, 0x0000E429, + 0x0000F1AE, // -2.0, -1.5, -1.0, -0.5, + 0x00010000, 0x00010F2B, 0x00011F3D, + 0x00013042, // 0.0, +0.5, +1.0, +1.5, + 0x00014249, 0x00015562, 0x0001699C, + 0x00017F09 // 2.0, +2.5, +3.0, +3.5, }; static int @@ -323,9 +340,7 @@ u_int size; uint8_t buf[16]; - struct iic_msg msg[] = { - { sc->sc_addr, IIC_M_WR, 0, buf } - }; + struct iic_msg msg[] = { { sc->sc_addr, IIC_M_WR, 0, buf } }; KASSERT(reg < sizeof(snapper_regsize), ("bad reg")); size = snapper_regsize[reg]; @@ -381,11 +396,11 @@ snapper_init(struct snd_mixer *m) { struct snapper_softc *sc; - u_int x = 0; + u_int x = 0; sc = device_get_softc(mix_getdevinfo(m)); - snapper_write(sc, SNAPPER_LB0, snapper_initdata.LB0); + snapper_write(sc, SNAPPER_LB0, snapper_initdata.LB0); snapper_write(sc, SNAPPER_LB1, snapper_initdata.LB1); snapper_write(sc, SNAPPER_LB2, snapper_initdata.LB2); snapper_write(sc, SNAPPER_LB3, snapper_initdata.LB3); Index: sys/dev/sound/macio/tumbler.c =================================================================== --- sys/dev/sound/macio/tumbler.c +++ sys/dev/sound/macio/tumbler.c @@ -59,18 +59,19 @@ #include #include -#include -#include #include -#include +#include #include +#include +#include #include +#include + +#include #include #include -#include -#include #include -#include +#include #include #include @@ -85,92 +86,85 @@ #include "mixer_if.h" extern kobj_class_t i2s_mixer_class; -extern device_t i2s_mixer; +extern device_t i2s_mixer; -struct tumbler_softc -{ +struct tumbler_softc { device_t sc_dev; uint32_t sc_addr; }; -static int tumbler_probe(device_t); -static int tumbler_attach(device_t); -static int tumbler_init(struct snd_mixer *m); -static int tumbler_uninit(struct snd_mixer *m); -static int tumbler_reinit(struct snd_mixer *m); -static int tumbler_set(struct snd_mixer *m, unsigned dev, unsigned left, - unsigned right); -static u_int32_t tumbler_setrecsrc(struct snd_mixer *m, u_int32_t src); +static int tumbler_probe(device_t); +static int tumbler_attach(device_t); +static int tumbler_init(struct snd_mixer *m); +static int tumbler_uninit(struct snd_mixer *m); +static int tumbler_reinit(struct snd_mixer *m); +static int tumbler_set(struct snd_mixer *m, unsigned dev, unsigned left, + unsigned right); +static u_int32_t tumbler_setrecsrc(struct snd_mixer *m, u_int32_t src); static device_method_t tumbler_methods[] = { /* Device interface. */ - DEVMETHOD(device_probe, tumbler_probe), - DEVMETHOD(device_attach, tumbler_attach), - { 0, 0 } + DEVMETHOD(device_probe, tumbler_probe), + DEVMETHOD(device_attach, tumbler_attach), { 0, 0 } }; -static driver_t tumbler_driver = { - "tumbler", - tumbler_methods, - sizeof(struct tumbler_softc) -}; +static driver_t tumbler_driver = { "tumbler", tumbler_methods, + sizeof(struct tumbler_softc) }; DRIVER_MODULE(tumbler, iicbus, tumbler_driver, 0, 0); MODULE_VERSION(tumbler, 1); MODULE_DEPEND(tumbler, iicbus, 1, 1, 1); -static kobj_method_t tumbler_mixer_methods[] = { - KOBJMETHOD(mixer_init, tumbler_init), - KOBJMETHOD(mixer_uninit, tumbler_uninit), - KOBJMETHOD(mixer_reinit, tumbler_reinit), - KOBJMETHOD(mixer_set, tumbler_set), - KOBJMETHOD(mixer_setrecsrc, tumbler_setrecsrc), - KOBJMETHOD_END -}; +static kobj_method_t tumbler_mixer_methods[] = { KOBJMETHOD(mixer_init, + tumbler_init), + KOBJMETHOD(mixer_uninit, tumbler_uninit), + KOBJMETHOD(mixer_reinit, tumbler_reinit), + KOBJMETHOD(mixer_set, tumbler_set), + KOBJMETHOD(mixer_setrecsrc, tumbler_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(tumbler_mixer); -#define TUMBLER_IICADDR 0x68 /* Tumbler I2C slave address */ +#define TUMBLER_IICADDR 0x68 /* Tumbler I2C slave address */ /* Tumbler (Texas Instruments TAS3001) registers. */ -#define TUMBLER_MCR 0x01 /* Main control register (1byte) */ -#define TUMBLER_DRC 0x02 /* Dynamic Range Compression (2bytes) */ -#define TUMBLER_VOLUME 0x04 /* Volume (6bytes) */ -#define TUMBLER_TREBLE 0x05 /* Treble control (1byte) */ -#define TUMBLER_BASS 0x06 /* Bass control (1byte) */ -#define TUMBLER_MIXER1 0x07 /* Mixer1 (3bytes) */ -#define TUMBLER_MIXER2 0x08 /* Mixer2 (3bytes) */ -#define TUMBLER_LB0 0x0a /* Left biquad 0 (15bytes) */ -#define TUMBLER_LB1 0x0b /* Left biquad 1 (15bytes) */ -#define TUMBLER_LB2 0x0c /* Left biquad 2 (15bytes) */ -#define TUMBLER_LB3 0x0d /* Left biquad 3 (15bytes) */ -#define TUMBLER_LB4 0x0e /* Left biquad 4 (15bytes) */ -#define TUMBLER_LB5 0x0f /* Left biquad 5 (15bytes) */ -#define TUMBLER_RB0 0x13 /* Right biquad 0 (15bytes) */ -#define TUMBLER_RB1 0x14 /* Right biquad 1 (15bytes) */ -#define TUMBLER_RB2 0x15 /* Right biquad 2 (15bytes) */ -#define TUMBLER_RB3 0x16 /* Right biquad 3 (15bytes) */ -#define TUMBLER_RB4 0x17 /* Right biquad 4 (15bytes) */ -#define TUMBLER_RB5 0x18 /* Right biquad 5 (15bytes) */ -#define TUMBLER_MCR_FL 0x80 /* Fast load */ -#define TUMBLER_MCR_SC 0x40 /* SCLK frequency */ -#define TUMBLER_MCR_SC_32 0x00 /* 32fs */ -#define TUMBLER_MCR_SC_64 0x40 /* 64fs */ -#define TUMBLER_MCR_SM 0x30 /* Output serial port mode */ -#define TUMBLER_MCR_SM_L 0x00 /* Left justified */ -#define TUMBLER_MCR_SM_R 0x10 /* Right justified */ -#define TUMBLER_MCR_SM_I2S 0x20 /* I2S */ -#define TUMBLER_MCR_ISM 0x0C /* Input serial mode */ -#define TUMBLER_MCR_ISM_L 0x00 -#define TUMBLER_MCR_ISM_R 0x04 -#define TUMBLER_MCR_ISM_I2S 0x08 -#define TUMBLER_MCR_W 0x03 /* Serial port word length */ -#define TUMBLER_MCR_W_16 0x00 /* 16 bit */ -#define TUMBLER_MCR_W_18 0x01 /* 18 bit */ -#define TUMBLER_MCR_W_20 0x02 /* 20 bit */ -#define TUMBLER_DRC_COMP_31 0xc0 /* 3:1 compression */ -#define TUMBLER_DRC_ENABLE 0x01 /* enable DRC */ -#define TUMBLER_DRC_DEFL_TH 0xa0 /* default compression threshold */ +#define TUMBLER_MCR 0x01 /* Main control register (1byte) */ +#define TUMBLER_DRC 0x02 /* Dynamic Range Compression (2bytes) */ +#define TUMBLER_VOLUME 0x04 /* Volume (6bytes) */ +#define TUMBLER_TREBLE 0x05 /* Treble control (1byte) */ +#define TUMBLER_BASS 0x06 /* Bass control (1byte) */ +#define TUMBLER_MIXER1 0x07 /* Mixer1 (3bytes) */ +#define TUMBLER_MIXER2 0x08 /* Mixer2 (3bytes) */ +#define TUMBLER_LB0 0x0a /* Left biquad 0 (15bytes) */ +#define TUMBLER_LB1 0x0b /* Left biquad 1 (15bytes) */ +#define TUMBLER_LB2 0x0c /* Left biquad 2 (15bytes) */ +#define TUMBLER_LB3 0x0d /* Left biquad 3 (15bytes) */ +#define TUMBLER_LB4 0x0e /* Left biquad 4 (15bytes) */ +#define TUMBLER_LB5 0x0f /* Left biquad 5 (15bytes) */ +#define TUMBLER_RB0 0x13 /* Right biquad 0 (15bytes) */ +#define TUMBLER_RB1 0x14 /* Right biquad 1 (15bytes) */ +#define TUMBLER_RB2 0x15 /* Right biquad 2 (15bytes) */ +#define TUMBLER_RB3 0x16 /* Right biquad 3 (15bytes) */ +#define TUMBLER_RB4 0x17 /* Right biquad 4 (15bytes) */ +#define TUMBLER_RB5 0x18 /* Right biquad 5 (15bytes) */ +#define TUMBLER_MCR_FL 0x80 /* Fast load */ +#define TUMBLER_MCR_SC 0x40 /* SCLK frequency */ +#define TUMBLER_MCR_SC_32 0x00 /* 32fs */ +#define TUMBLER_MCR_SC_64 0x40 /* 64fs */ +#define TUMBLER_MCR_SM 0x30 /* Output serial port mode */ +#define TUMBLER_MCR_SM_L 0x00 /* Left justified */ +#define TUMBLER_MCR_SM_R 0x10 /* Right justified */ +#define TUMBLER_MCR_SM_I2S 0x20 /* I2S */ +#define TUMBLER_MCR_ISM 0x0C /* Input serial mode */ +#define TUMBLER_MCR_ISM_L 0x00 +#define TUMBLER_MCR_ISM_R 0x04 +#define TUMBLER_MCR_ISM_I2S 0x08 +#define TUMBLER_MCR_W 0x03 /* Serial port word length */ +#define TUMBLER_MCR_W_16 0x00 /* 16 bit */ +#define TUMBLER_MCR_W_18 0x01 /* 18 bit */ +#define TUMBLER_MCR_W_20 0x02 /* 20 bit */ +#define TUMBLER_DRC_COMP_31 0xc0 /* 3:1 compression */ +#define TUMBLER_DRC_ENABLE 0x01 /* enable DRC */ +#define TUMBLER_DRC_DEFL_TH 0xa0 /* default compression threshold */ /* * Tumbler codec. @@ -178,7 +172,7 @@ struct tumbler_reg { u_char MCR[1]; - u_char DRC[2]; + u_char DRC[2]; u_char VOLUME[6]; u_char TREBLE[1]; u_char BASS[1]; @@ -199,83 +193,108 @@ }; const struct tumbler_reg tumbler_initdata = { - { TUMBLER_MCR_SC_64 | TUMBLER_MCR_SM_I2S | - TUMBLER_MCR_ISM_I2S | TUMBLER_MCR_W_16 }, /* MCR */ - { TUMBLER_DRC_COMP_31, TUMBLER_DRC_DEFL_TH }, /* DRC */ - { 0, 0, 0, 0, 0, 0 }, /* VOLUME */ - { 0x72 }, /* TREBLE */ - { 0x3e }, /* BASS */ - { 0x10, 0x00, 0x00 }, /* MIXER1 */ - { 0x00, 0x00, 0x00 }, /* MIXER2 */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } /* BIQUAD */ + { TUMBLER_MCR_SC_64 | TUMBLER_MCR_SM_I2S | TUMBLER_MCR_ISM_I2S | + TUMBLER_MCR_W_16 }, /* MCR */ + { TUMBLER_DRC_COMP_31, TUMBLER_DRC_DEFL_TH }, /* DRC */ + { 0, 0, 0, 0, 0, 0 }, /* VOLUME */ + { 0x72 }, /* TREBLE */ + { 0x3e }, /* BASS */ + { 0x10, 0x00, 0x00 }, /* MIXER1 */ + { 0x00, 0x00, 0x00 }, /* MIXER2 */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ + { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } /* BIQUAD */ }; const char tumbler_regsize[] = { - 0, /* 0x00 */ - sizeof tumbler_initdata.MCR, /* 0x01 */ - sizeof tumbler_initdata.DRC, /* 0x02 */ - 0, /* 0x03 */ - sizeof tumbler_initdata.VOLUME, /* 0x04 */ - sizeof tumbler_initdata.TREBLE, /* 0x05 */ - sizeof tumbler_initdata.BASS, /* 0x06 */ - sizeof tumbler_initdata.MIXER1, /* 0x07 */ - sizeof tumbler_initdata.MIXER2, /* 0x08 */ - 0, /* 0x09 */ - sizeof tumbler_initdata.LB0, /* 0x0a */ - sizeof tumbler_initdata.LB1, /* 0x0b */ - sizeof tumbler_initdata.LB2, /* 0x0c */ - sizeof tumbler_initdata.LB3, /* 0x0d */ - sizeof tumbler_initdata.LB4, /* 0x0e */ - sizeof tumbler_initdata.LB5, /* 0x0f */ - 0, /* 0x10 */ - 0, /* 0x11 */ - 0, /* 0x12 */ - sizeof tumbler_initdata.RB0, /* 0x13 */ - sizeof tumbler_initdata.RB1, /* 0x14 */ - sizeof tumbler_initdata.RB2, /* 0x15 */ - sizeof tumbler_initdata.RB3, /* 0x16 */ - sizeof tumbler_initdata.RB4, /* 0x17 */ - sizeof tumbler_initdata.RB5 /* 0x18 */ + 0, /* 0x00 */ + sizeof tumbler_initdata.MCR, /* 0x01 */ + sizeof tumbler_initdata.DRC, /* 0x02 */ + 0, /* 0x03 */ + sizeof tumbler_initdata.VOLUME, /* 0x04 */ + sizeof tumbler_initdata.TREBLE, /* 0x05 */ + sizeof tumbler_initdata.BASS, /* 0x06 */ + sizeof tumbler_initdata.MIXER1, /* 0x07 */ + sizeof tumbler_initdata.MIXER2, /* 0x08 */ + 0, /* 0x09 */ + sizeof tumbler_initdata.LB0, /* 0x0a */ + sizeof tumbler_initdata.LB1, /* 0x0b */ + sizeof tumbler_initdata.LB2, /* 0x0c */ + sizeof tumbler_initdata.LB3, /* 0x0d */ + sizeof tumbler_initdata.LB4, /* 0x0e */ + sizeof tumbler_initdata.LB5, /* 0x0f */ + 0, /* 0x10 */ + 0, /* 0x11 */ + 0, /* 0x12 */ + sizeof tumbler_initdata.RB0, /* 0x13 */ + sizeof tumbler_initdata.RB1, /* 0x14 */ + sizeof tumbler_initdata.RB2, /* 0x15 */ + sizeof tumbler_initdata.RB3, /* 0x16 */ + sizeof tumbler_initdata.RB4, /* 0x17 */ + sizeof tumbler_initdata.RB5 /* 0x18 */ }; /* dB = 20 * log (x) table. */ -static u_int tumbler_volume_table[100] = { - 0x00000148, 0x0000015C, 0x00000171, 0x00000186, // -46.0, -45.5, -45.0, -44.5, - 0x0000019E, 0x000001B6, 0x000001D0, 0x000001EB, // -44.0, -43.5, -43.0, -42.5, - 0x00000209, 0x00000227, 0x00000248, 0x0000026B, // -42.0, -41.5, -41.0, -40.5, - 0x0000028F, 0x000002B6, 0x000002DF, 0x0000030B, // -40.0, -39.5, -39.0, -38.5, - 0x00000339, 0x0000036A, 0x0000039E, 0x000003D5, // -38.0, -37.5, -37.0, -36.5, - 0x0000040F, 0x0000044C, 0x0000048D, 0x000004D2, // -36.0, -35.5, -35.0, -34.5, - 0x0000051C, 0x00000569, 0x000005BB, 0x00000612, // -34.0, -33.5, -33.0, -32.5, - 0x0000066E, 0x000006D0, 0x00000737, 0x000007A5, // -32.0, -31.5, -31.0, -30.5, - 0x00000818, 0x00000893, 0x00000915, 0x0000099F, // -30.0, -29.5, -29.0, -28.5, - 0x00000A31, 0x00000ACC, 0x00000B6F, 0x00000C1D, // -28.0, -27.5, -27.0, -26.5, - 0x00000CD5, 0x00000D97, 0x00000E65, 0x00000F40, // -26.0, -25.5, -25.0, -24.5, - 0x00001027, 0x0000111C, 0x00001220, 0x00001333, // -24.0, -23.5, -23.0, -22.5, - 0x00001456, 0x0000158A, 0x000016D1, 0x0000182B, // -22.0, -21.5, -21.0, -20.5, - 0x0000199A, 0x00001B1E, 0x00001CB9, 0x00001E6D, // -20.0, -19.5, -19.0, -18.5, - 0x0000203A, 0x00002223, 0x00002429, 0x0000264E, // -18.0, -17.5, -17.0, -16.5, - 0x00002893, 0x00002AFA, 0x00002D86, 0x00003039, // -16.0, -15.5, -15.0, -14.5, - 0x00003314, 0x0000361B, 0x00003950, 0x00003CB5, // -14.0, -13.5, -13.0, -12.5, - 0x0000404E, 0x0000441D, 0x00004827, 0x00004C6D, // -12.0, -11.5, -11.0, -10.5, - 0x000050F4, 0x000055C0, 0x00005AD5, 0x00006037, // -10.0, -9.5, -9.0, -8.5, - 0x000065EA, 0x00006BF4, 0x0000725A, 0x00007920, // -8.0, -7.5, -7.0, -6.5, - 0x0000804E, 0x000087EF, 0x00008FF6, 0x0000987D, // -6.0, -5.5, -5.0, -4.5, - 0x0000A186, 0x0000AB19, 0x0000B53C, 0x0000BFF9, // -4.0, -3.5, -3.0, -2.5, - 0x0000CB59, 0x0000D766, 0x0000E429, 0x0000F1AE, // -2.0, -1.5, -1.0, -0.5, - 0x00010000, 0x00010F2B, 0x00011F3D, 0x00013042, // 0.0, +0.5, +1.0, +1.5, - 0x00014249, 0x00015562, 0x0001699C, 0x00017F09 // 2.0, +2.5, +3.0, +3.5, +static u_int tumbler_volume_table[100] = { + 0x00000148, 0x0000015C, 0x00000171, + 0x00000186, // -46.0, -45.5, -45.0, -44.5, + 0x0000019E, 0x000001B6, 0x000001D0, + 0x000001EB, // -44.0, -43.5, -43.0, -42.5, + 0x00000209, 0x00000227, 0x00000248, + 0x0000026B, // -42.0, -41.5, -41.0, -40.5, + 0x0000028F, 0x000002B6, 0x000002DF, + 0x0000030B, // -40.0, -39.5, -39.0, -38.5, + 0x00000339, 0x0000036A, 0x0000039E, + 0x000003D5, // -38.0, -37.5, -37.0, -36.5, + 0x0000040F, 0x0000044C, 0x0000048D, + 0x000004D2, // -36.0, -35.5, -35.0, -34.5, + 0x0000051C, 0x00000569, 0x000005BB, + 0x00000612, // -34.0, -33.5, -33.0, -32.5, + 0x0000066E, 0x000006D0, 0x00000737, + 0x000007A5, // -32.0, -31.5, -31.0, -30.5, + 0x00000818, 0x00000893, 0x00000915, + 0x0000099F, // -30.0, -29.5, -29.0, -28.5, + 0x00000A31, 0x00000ACC, 0x00000B6F, + 0x00000C1D, // -28.0, -27.5, -27.0, -26.5, + 0x00000CD5, 0x00000D97, 0x00000E65, + 0x00000F40, // -26.0, -25.5, -25.0, -24.5, + 0x00001027, 0x0000111C, 0x00001220, + 0x00001333, // -24.0, -23.5, -23.0, -22.5, + 0x00001456, 0x0000158A, 0x000016D1, + 0x0000182B, // -22.0, -21.5, -21.0, -20.5, + 0x0000199A, 0x00001B1E, 0x00001CB9, + 0x00001E6D, // -20.0, -19.5, -19.0, -18.5, + 0x0000203A, 0x00002223, 0x00002429, + 0x0000264E, // -18.0, -17.5, -17.0, -16.5, + 0x00002893, 0x00002AFA, 0x00002D86, + 0x00003039, // -16.0, -15.5, -15.0, -14.5, + 0x00003314, 0x0000361B, 0x00003950, + 0x00003CB5, // -14.0, -13.5, -13.0, -12.5, + 0x0000404E, 0x0000441D, 0x00004827, + 0x00004C6D, // -12.0, -11.5, -11.0, -10.5, + 0x000050F4, 0x000055C0, 0x00005AD5, + 0x00006037, // -10.0, -9.5, -9.0, -8.5, + 0x000065EA, 0x00006BF4, 0x0000725A, + 0x00007920, // -8.0, -7.5, -7.0, -6.5, + 0x0000804E, 0x000087EF, 0x00008FF6, + 0x0000987D, // -6.0, -5.5, -5.0, -4.5, + 0x0000A186, 0x0000AB19, 0x0000B53C, + 0x0000BFF9, // -4.0, -3.5, -3.0, -2.5, + 0x0000CB59, 0x0000D766, 0x0000E429, + 0x0000F1AE, // -2.0, -1.5, -1.0, -0.5, + 0x00010000, 0x00010F2B, 0x00011F3D, + 0x00013042, // 0.0, +0.5, +1.0, +1.5, + 0x00014249, 0x00015562, 0x0001699C, + 0x00017F09 // 2.0, +2.5, +3.0, +3.5, }; static int @@ -284,9 +303,7 @@ u_int size; uint8_t buf[16]; - struct iic_msg msg[] = { - { sc->sc_addr, IIC_M_WR, 0, buf } - }; + struct iic_msg msg[] = { { sc->sc_addr, IIC_M_WR, 0, buf } }; KASSERT(reg < sizeof(tumbler_regsize), ("bad reg")); size = tumbler_regsize[reg]; @@ -308,8 +325,8 @@ if (name == NULL) return (ENXIO); - if (strcmp(name, "deq") == 0 && iicbus_get_addr(dev) == - TUMBLER_IICADDR) { + if (strcmp(name, "deq") == 0 && + iicbus_get_addr(dev) == TUMBLER_IICADDR) { device_set_desc(dev, "Texas Instruments TAS3001 Audio Codec"); return (0); } @@ -336,11 +353,11 @@ tumbler_init(struct snd_mixer *m) { struct tumbler_softc *sc; - u_int x = 0; + u_int x = 0; sc = device_get_softc(mix_getdevinfo(m)); - tumbler_write(sc, TUMBLER_LB0, tumbler_initdata.LB0); + tumbler_write(sc, TUMBLER_LB0, tumbler_initdata.LB0); tumbler_write(sc, TUMBLER_LB1, tumbler_initdata.LB1); tumbler_write(sc, TUMBLER_LB2, tumbler_initdata.LB2); tumbler_write(sc, TUMBLER_LB3, tumbler_initdata.LB3); @@ -355,7 +372,7 @@ tumbler_write(sc, TUMBLER_RB5, tumbler_initdata.RB5); tumbler_write(sc, TUMBLER_MCR, tumbler_initdata.MCR); tumbler_write(sc, TUMBLER_DRC, tumbler_initdata.DRC); - tumbler_write(sc, TUMBLER_VOLUME, tumbler_initdata.VOLUME); + tumbler_write(sc, TUMBLER_VOLUME, tumbler_initdata.VOLUME); tumbler_write(sc, TUMBLER_TREBLE, tumbler_initdata.TREBLE); tumbler_write(sc, TUMBLER_BASS, tumbler_initdata.BASS); tumbler_write(sc, TUMBLER_MIXER1, tumbler_initdata.MIXER1); Index: sys/dev/sound/midi/midi.h =================================================================== --- sys/dev/sound/midi/midi.h +++ sys/dev/sound/midi/midi.h @@ -34,24 +34,24 @@ MALLOC_DECLARE(M_MIDI); -#define M_RX 0x01 -#define M_TX 0x02 -#define M_RXEN 0x04 -#define M_TXEN 0x08 +#define M_RX 0x01 +#define M_TX 0x02 +#define M_RXEN 0x04 +#define M_TXEN 0x08 #define MIDI_TYPE unsigned char struct snd_midi; -struct snd_midi * -midi_init(kobj_class_t _mpu_cls, int _unit, int _channel, void *cookie); -int midi_uninit(struct snd_midi *_m); -int midi_out(struct snd_midi *_m, MIDI_TYPE *_buf, int _size); -int midi_in(struct snd_midi *_m, MIDI_TYPE *_buf, int _size); +struct snd_midi *midi_init(kobj_class_t _mpu_cls, int _unit, int _channel, + void *cookie); +int midi_uninit(struct snd_midi *_m); +int midi_out(struct snd_midi *_m, MIDI_TYPE *_buf, int _size); +int midi_in(struct snd_midi *_m, MIDI_TYPE *_buf, int _size); -kobj_t midimapper_addseq(void *arg1, int *unit, void **cookie); -int midimapper_open(void *arg1, void **cookie); -int midimapper_close(void *arg1, void *cookie); -kobj_t midimapper_fetch_synth(void *arg, void *cookie, int unit); +kobj_t midimapper_addseq(void *arg1, int *unit, void **cookie); +int midimapper_open(void *arg1, void **cookie); +int midimapper_close(void *arg1, void *cookie); +kobj_t midimapper_fetch_synth(void *arg, void *cookie, int unit); #endif Index: sys/dev/sound/midi/midi.c =================================================================== --- sys/dev/sound/midi/midi.c +++ sys/dev/sound/midi/midi.c @@ -30,58 +30,59 @@ * POSSIBILITY OF SUCH DAMAGE. */ - /* - * Parts of this file started out as NetBSD: midi.c 1.31 - * They are mostly gone. Still the most obvious will be the state - * machine midi_in - */ +/* + * Parts of this file started out as NetBSD: midi.c 1.31 + * They are mostly gone. Still the most obvious will be the state + * machine midi_in + */ +#include #include #include -#include +#include +#include #include +#include #include +#include +#include #include +#include #include -#include -#include +#include +#include #include -#include -#include +#include #include -#include -#include -#include +#include #include -#include -#include -#include -#include #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif #include -#include "mpu_if.h" - #include + +#include "mpu_if.h" #include "synth_if.h" MALLOC_DEFINE(M_MIDI, "midi buffers", "Midi data allocation area"); #ifndef KOBJMETHOD_END -#define KOBJMETHOD_END { NULL, NULL } +#define KOBJMETHOD_END \ + { \ + NULL, NULL \ + } #endif -#define PCMMKMINOR(u, d, c) ((((c) & 0xff) << 16) | (((u) & 0x0f) << 4) | ((d) & 0x0f)) +#define PCMMKMINOR(u, d, c) \ + ((((c) & 0xff) << 16) | (((u) & 0x0f) << 4) | ((d) & 0x0f)) #define MIDIMKMINOR(u, d, c) PCMMKMINOR(u, d, c) -#define MIDI_DEV_RAW 2 +#define MIDI_DEV_RAW 2 #define MIDI_DEV_MIDICTL 12 -enum midi_states { - MIDI_IN_START, MIDI_IN_SYSEX, MIDI_IN_DATA -}; +enum midi_states { MIDI_IN_START, MIDI_IN_SYSEX, MIDI_IN_DATA }; /* * The MPU interface current has init() uninit() inqsize() outqsize() @@ -94,33 +95,33 @@ * /dev/rmidi Structure definitions */ -#define MIDI_NAMELEN 16 +#define MIDI_NAMELEN 16 struct snd_midi { KOBJ_FIELDS; - struct mtx lock; /* Protects all but queues */ - void *cookie; + struct mtx lock; /* Protects all but queues */ + void *cookie; - int unit; /* Should only be used in midistat */ - int channel; /* Should only be used in midistat */ + int unit; /* Should only be used in midistat */ + int channel; /* Should only be used in midistat */ - int busy; - int flags; /* File flags */ - char name[MIDI_NAMELEN]; - struct mtx qlock; /* Protects inq, outq and flags */ + int busy; + int flags; /* File flags */ + char name[MIDI_NAMELEN]; + struct mtx qlock; /* Protects inq, outq and flags */ MIDIQ_HEAD(, char) inq, outq; - int rchan, wchan; + int rchan, wchan; struct selinfo rsel, wsel; - int hiwat; /* QLEN(outq)>High-water -> disable - * writes from userland */ + int hiwat; /* QLEN(outq)>High-water -> disable + * writes from userland */ enum midi_states inq_state; - int inq_status, inq_left; /* Variables for the state machine in - * Midi_in, this is to provide that - * signals only get issued only - * complete command packets. */ + int inq_status, inq_left; /* Variables for the state machine in + * Midi_in, this is to provide that + * signals only get issued only + * complete command packets. */ struct proc *async; struct cdev *dev; struct synth_midi *synth; - int synth_flags; + int synth_flags; TAILQ_ENTRY(snd_midi) link; }; @@ -139,8 +140,8 @@ static synth_controller_t midisynth_controller; static synth_bender_t midisynth_bender; -static kobj_method_t midisynth_methods[] = { - KOBJMETHOD(synth_open, midisynth_open), +static kobj_method_t midisynth_methods[] = { KOBJMETHOD(synth_open, + midisynth_open), KOBJMETHOD(synth_close, midisynth_close), KOBJMETHOD(synth_writeraw, midisynth_writeraw), KOBJMETHOD(synth_setinstr, midisynth_setinstr), @@ -148,9 +149,7 @@ KOBJMETHOD(synth_killnote, midisynth_killnote), KOBJMETHOD(synth_alloc, midisynth_alloc), KOBJMETHOD(synth_controller, midisynth_controller), - KOBJMETHOD(synth_bender, midisynth_bender), - KOBJMETHOD_END -}; + KOBJMETHOD(synth_bender, midisynth_bender), KOBJMETHOD_END }; DEFINE_CLASS(midisynth, midisynth_methods, 0); @@ -182,7 +181,7 @@ */ static struct sx midistat_lock; -static int midistat_isopen = 0; +static int midistat_isopen = 0; static struct sbuf midistat_sbuf; static struct cdev *midistat_dev; @@ -229,34 +228,35 @@ * Prototypes of library functions */ -static int midi_destroy(struct snd_midi *, int); -static int midistat_prepare(struct sbuf * s); -static int midi_load(void); -static int midi_unload(void); +static int midi_destroy(struct snd_midi *, int); +static int midistat_prepare(struct sbuf *s); +static int midi_load(void); +static int midi_unload(void); /* * Misc declr. */ -SYSCTL_NODE(_hw, OID_AUTO, midi, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "Midi driver"); +SYSCTL_NODE(_hw, OID_AUTO, midi, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, "Midi driver"); static SYSCTL_NODE(_hw_midi, OID_AUTO, stat, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, "Status device"); -int midi_debug; +int midi_debug; /* XXX: should this be moved into debug.midi? */ SYSCTL_INT(_hw_midi, OID_AUTO, debug, CTLFLAG_RW, &midi_debug, 0, ""); -int midi_dumpraw; +int midi_dumpraw; SYSCTL_INT(_hw_midi, OID_AUTO, dumpraw, CTLFLAG_RW, &midi_dumpraw, 0, ""); -int midi_instroff; +int midi_instroff; SYSCTL_INT(_hw_midi, OID_AUTO, instroff, CTLFLAG_RW, &midi_instroff, 0, ""); -int midistat_verbose; -SYSCTL_INT(_hw_midi_stat, OID_AUTO, verbose, CTLFLAG_RW, - &midistat_verbose, 0, ""); +int midistat_verbose; +SYSCTL_INT(_hw_midi_stat, OID_AUTO, verbose, CTLFLAG_RW, &midistat_verbose, 0, + ""); -#define MIDI_DEBUG(l,a) if(midi_debug>=l) a +#define MIDI_DEBUG(l, a) \ + if (midi_debug >= l) \ + a /* * CODE START */ @@ -289,7 +289,7 @@ * new unit number. */ i = -1; - TAILQ_FOREACH(m, &midi_devs, link) { + TAILQ_FOREACH (m, &midi_devs, link) { mtx_lock(&m->lock); if (unit != 0) { if (m->unit == unit && m->channel == channel) { @@ -364,8 +364,8 @@ sx_xunlock(&midistat_lock); m->dev = make_dev(&midi_cdevsw, - MIDIMKMINOR(unit, MIDI_DEV_RAW, channel), - UID_ROOT, GID_WHEEL, 0666, "midi%d.%d", unit, channel); + MIDIMKMINOR(unit, MIDI_DEV_RAW, channel), UID_ROOT, GID_WHEEL, 0666, + "midi%d.%d", unit, channel); m->dev->si_drv1 = m; return m; @@ -434,17 +434,17 @@ */ #ifdef notdef -static int midi_lengths[] = {2, 2, 2, 2, 1, 1, 2, 0}; +static int midi_lengths[] = { 2, 2, 2, 2, 1, 1, 2, 0 }; -#endif /* notdef */ +#endif /* notdef */ /* Number of bytes in a MIDI command */ #define MIDI_LENGTH(d) (midi_lengths[((d) >> 4) & 7]) -#define MIDI_ACK 0xfe +#define MIDI_ACK 0xfe #define MIDI_IS_STATUS(d) ((d) >= 0x80) #define MIDI_IS_COMMON(d) ((d) >= 0xf0) -#define MIDI_SYSEX_START 0xF0 -#define MIDI_SYSEX_END 0xF7 +#define MIDI_SYSEX_START 0xF0 +#define MIDI_SYSEX_END 0xF7 int midi_in(struct snd_midi *m, MIDI_TYPE *buf, int size) @@ -455,9 +455,9 @@ /* MIDI_TYPE data; */ MIDI_DEBUG(5, printf("midi_in: m=%p size=%d\n", m, size)); -/* - * XXX: locking flub - */ + /* + * XXX: locking flub + */ if (!(m->flags & M_RX)) return size; @@ -545,27 +545,27 @@ } if (sig) { #endif - MIDI_DEBUG(6, printf("midi_in: len %jd avail %jd\n", - (intmax_t)MIDIQ_LEN(m->inq), - (intmax_t)MIDIQ_AVAIL(m->inq))); - if (MIDIQ_AVAIL(m->inq) > size) { - used = size; - MIDIQ_ENQ(m->inq, buf, size); - } else { - MIDI_DEBUG(4, printf("midi_in: Discarding data qu\n")); - mtx_unlock(&m->qlock); - return 0; - } - if (m->rchan) { - wakeup(&m->rchan); - m->rchan = 0; - } - selwakeup(&m->rsel); - if (m->async) { - PROC_LOCK(m->async); - kern_psignal(m->async, SIGIO); - PROC_UNLOCK(m->async); - } + MIDI_DEBUG(6, + printf("midi_in: len %jd avail %jd\n", (intmax_t)MIDIQ_LEN(m->inq), + (intmax_t)MIDIQ_AVAIL(m->inq))); + if (MIDIQ_AVAIL(m->inq) > size) { + used = size; + MIDIQ_ENQ(m->inq, buf, size); + } else { + MIDI_DEBUG(4, printf("midi_in: Discarding data qu\n")); + mtx_unlock(&m->qlock); + return 0; + } + if (m->rchan) { + wakeup(&m->rchan); + m->rchan = 0; + } + selwakeup(&m->rsel); + if (m->async) { + PROC_LOCK(m->async); + kern_psignal(m->async, SIGIO); + PROC_UNLOCK(m->async); + } #if 0 } #endif @@ -581,9 +581,9 @@ { int used; -/* - * XXX: locking flub - */ + /* + * XXX: locking flub + */ if (!(m->flags & M_TXEN)) return 0; @@ -622,8 +622,9 @@ struct snd_midi *m = i_dev->si_drv1; int retval; - MIDI_DEBUG(1, printf("midiopen %p %s %s\n", td, - flags & FREAD ? "M_RX" : "", flags & FWRITE ? "M_TX" : "")); + MIDI_DEBUG(1, + printf("midiopen %p %s %s\n", td, flags & FREAD ? "M_RX" : "", + flags & FWRITE ? "M_TX" : "")); if (m == NULL) return ENXIO; @@ -657,9 +658,9 @@ if (flags & FREAD) { m->flags |= M_RX | M_RXEN; /* - * Only clear the inq, the outq might still have data to drain - * from a previous session - */ + * Only clear the inq, the outq might still have data to drain + * from a previous session + */ MIDIQ_CLEAR(m->inq); } @@ -670,7 +671,8 @@ MIDI_DEBUG(2, printf("midi_open: opened.\n")); -err: mtx_unlock(&m->qlock); +err: + mtx_unlock(&m->qlock); mtx_unlock(&m->lock); return retval; } @@ -682,8 +684,9 @@ int retval; int oldflags; - MIDI_DEBUG(1, printf("midi_close %p %s %s\n", td, - flags & FREAD ? "M_RX" : "", flags & FWRITE ? "M_TX" : "")); + MIDI_DEBUG(1, + printf("midi_close %p %s %s\n", td, flags & FREAD ? "M_RX" : "", + flags & FWRITE ? "M_TX" : "")); if (m == NULL) return ENXIO; @@ -713,7 +716,8 @@ mtx_unlock(&m->qlock); mtx_unlock(&m->lock); retval = 0; -err: return retval; +err: + return retval; } /* @@ -729,8 +733,8 @@ int used; char buf[MIDI_RSIZE]; - MIDI_DEBUG(5, printf("midiread: count=%lu\n", - (unsigned long)uio->uio_resid)); + MIDI_DEBUG(5, + printf("midiread: count=%lu\n", (unsigned long)uio->uio_resid)); retval = EIO; @@ -750,8 +754,8 @@ goto err1; mtx_unlock(&m->lock); m->rchan = 1; - retval = msleep(&m->rchan, &m->qlock, - PCATCH | PDROP, "midi RX", 0); + retval = msleep(&m->rchan, &m->qlock, PCATCH | PDROP, + "midi RX", 0); /* * We slept, maybe things have changed since last * dying check @@ -771,8 +775,8 @@ } MIDI_DEBUG(6, printf("midi_read start\n")); /* - * At this point, it is certain that m->inq has data - */ + * At this point, it is certain that m->inq has data + */ used = MIN(MIDIQ_LEN(m->inq), uio->uio_resid); used = MIN(used, MIDI_RSIZE); @@ -788,9 +792,11 @@ * If we Made it here then transfer is good */ retval = 0; -err1: mtx_unlock(&m->qlock); +err1: + mtx_unlock(&m->qlock); mtx_unlock(&m->lock); -err0: MIDI_DEBUG(4, printf("midi_read: ret %d\n", retval)); +err0: + MIDI_DEBUG(4, printf("midi_read: ret %d\n", retval)); return retval; } @@ -826,8 +832,8 @@ mtx_unlock(&m->lock); m->wchan = 1; MIDI_DEBUG(3, printf("midi_write msleep\n")); - retval = msleep(&m->wchan, &m->qlock, - PCATCH | PDROP, "midi TX", 0); + retval = msleep(&m->wchan, &m->qlock, PCATCH | PDROP, + "midi TX", 0); /* * We slept, maybe things have changed since last * dying check @@ -846,14 +852,15 @@ } /* - * We are certain than data can be placed on the queue - */ + * We are certain than data can be placed on the queue + */ used = MIN(MIDIQ_AVAIL(m->outq), uio->uio_resid); used = MIN(used, MIDI_WSIZE); - MIDI_DEBUG(5, printf("midiout: resid %zd len %jd avail %jd\n", - uio->uio_resid, (intmax_t)MIDIQ_LEN(m->outq), - (intmax_t)MIDIQ_AVAIL(m->outq))); + MIDI_DEBUG(5, + printf("midiout: resid %zd len %jd avail %jd\n", + uio->uio_resid, (intmax_t)MIDIQ_LEN(m->outq), + (intmax_t)MIDIQ_AVAIL(m->outq))); MIDI_DEBUG(5, printf("midi_write: uiomove cc=%d\n", used)); retval = uiomove(buf, used, uio); @@ -861,8 +868,8 @@ goto err1; MIDIQ_ENQ(m->outq, buf, used); /* - * Inform the bottom half that data can be written - */ + * Inform the bottom half that data can be written + */ if (!(m->flags & M_TXEN)) { m->flags |= M_TXEN; MPU_CALLBACK(m, m->cookie, m->flags); @@ -872,9 +879,11 @@ * If we Made it here then transfer is good */ retval = 0; -err1: mtx_unlock(&m->qlock); +err1: + mtx_unlock(&m->qlock); mtx_unlock(&m->lock); -err0: return retval; +err0: + return retval; } int @@ -1008,7 +1017,7 @@ } sbuf_printf(s, "Installed devices:\n"); - TAILQ_FOREACH(m, &midi_devs, link) { + TAILQ_FOREACH (m, &midi_devs, link) { mtx_lock(&m->lock); sbuf_printf(s, "%s [%d/%d:%s]", m->name, m->unit, m->channel, MPU_PROVIDER(m, m->cookie)); @@ -1030,34 +1039,37 @@ midi_cmdname(int cmd) { static struct { - int cmd; - char *name; - } *tab, cmdtab_midiioctl[] = { -#define A(x) {x, ## x} - /* - * Once we have some real IOCTLs define, the following will - * be relavant. - * - * A(SNDCTL_MIDI_PRETIME), A(SNDCTL_MIDI_MPUMODE), - * A(SNDCTL_MIDI_MPUCMD), A(SNDCTL_SYNTH_INFO), - * A(SNDCTL_MIDI_INFO), A(SNDCTL_SYNTH_MEMAVL), - * A(SNDCTL_FM_LOAD_INSTR), A(SNDCTL_FM_4OP_ENABLE), - * A(MIOSPASSTHRU), A(MIOGPASSTHRU), A(AIONWRITE), - * A(AIOGSIZE), A(AIOSSIZE), A(AIOGFMT), A(AIOSFMT), - * A(AIOGMIX), A(AIOSMIX), A(AIOSTOP), A(AIOSYNC), - * A(AIOGCAP), - */ + int cmd; + char *name; + } *tab, + cmdtab_midiioctl[] = { +#define A(x) \ + { \ + x, ##x \ + } + /* + * Once we have some real IOCTLs define, the following will + * be relavant. + * + * A(SNDCTL_MIDI_PRETIME), A(SNDCTL_MIDI_MPUMODE), + * A(SNDCTL_MIDI_MPUCMD), A(SNDCTL_SYNTH_INFO), + * A(SNDCTL_MIDI_INFO), A(SNDCTL_SYNTH_MEMAVL), + * A(SNDCTL_FM_LOAD_INSTR), A(SNDCTL_FM_4OP_ENABLE), + * A(MIOSPASSTHRU), A(MIOGPASSTHRU), A(AIONWRITE), + * A(AIOGSIZE), A(AIOSSIZE), A(AIOGFMT), A(AIOSFMT), + * A(AIOGMIX), A(AIOSMIX), A(AIOSTOP), A(AIOSYNC), + * A(AIOGCAP), + */ #undef A - { - -1, "unknown" - }, - }; + { -1, "unknown" }, + }; - for (tab = cmdtab_midiioctl; tab->cmd != cmd && tab->cmd != -1; tab++); + for (tab = cmdtab_midiioctl; tab->cmd != cmd && tab->cmd != -1; tab++) + ; return tab->name; } -#endif /* notdef */ +#endif /* notdef */ /* * midisynth @@ -1069,8 +1081,9 @@ struct snd_midi *m = ((struct synth_midi *)n)->m; int retval; - MIDI_DEBUG(1, printf("midisynth_open %s %s\n", - flags & FREAD ? "M_RX" : "", flags & FWRITE ? "M_TX" : "")); + MIDI_DEBUG(1, + printf("midisynth_open %s %s\n", flags & FREAD ? "M_RX" : "", + flags & FWRITE ? "M_TX" : "")); if (m == NULL) return ENXIO; @@ -1105,9 +1118,9 @@ if (flags & FREAD) { m->flags |= M_RX | M_RXEN; /* - * Only clear the inq, the outq might still have data to drain - * from a previous session - */ + * Only clear the inq, the outq might still have data to drain + * from a previous session + */ MIDIQ_CLEAR(m->inq); m->rchan = 0; } @@ -1120,7 +1133,8 @@ MPU_CALLBACK(m, m->cookie, m->flags); -err: mtx_unlock(&m->qlock); +err: + mtx_unlock(&m->qlock); mtx_unlock(&m->lock); MIDI_DEBUG(2, printf("midisynth_open: return %d.\n", retval)); return retval; @@ -1133,9 +1147,10 @@ int retval; int oldflags; - MIDI_DEBUG(1, printf("midisynth_close %s %s\n", - m->synth_flags & FREAD ? "M_RX" : "", - m->synth_flags & FWRITE ? "M_TX" : "")); + MIDI_DEBUG(1, + printf("midisynth_close %s %s\n", + m->synth_flags & FREAD ? "M_RX" : "", + m->synth_flags & FWRITE ? "M_TX" : "")); if (m == NULL) return ENXIO; @@ -1165,7 +1180,8 @@ mtx_unlock(&m->qlock); mtx_unlock(&m->lock); retval = 0; -err: return retval; +err: + return retval; } /* @@ -1205,8 +1221,8 @@ mtx_unlock(&m->lock); m->wchan = 1; MIDI_DEBUG(3, printf("midisynth_writeraw msleep\n")); - retval = msleep(&m->wchan, &m->qlock, - PCATCH | PDROP, "midi TX", 0); + retval = msleep(&m->wchan, &m->qlock, PCATCH | PDROP, + "midi TX", 0); /* * We slept, maybe things have changed since last * dying check @@ -1224,15 +1240,15 @@ } /* - * We are certain than data can be placed on the queue - */ + * We are certain than data can be placed on the queue + */ used = MIN(MIDIQ_AVAIL(m->outq), len); used = MIN(used, MIDI_WSIZE); MIDI_DEBUG(5, - printf("midi_synth: resid %zu len %jd avail %jd\n", - len, (intmax_t)MIDIQ_LEN(m->outq), - (intmax_t)MIDIQ_AVAIL(m->outq))); + printf("midi_synth: resid %zu len %jd avail %jd\n", len, + (intmax_t)MIDIQ_LEN(m->outq), + (intmax_t)MIDIQ_AVAIL(m->outq))); if (midi_dumpraw) for (i = 0; i < used; i++) @@ -1242,8 +1258,8 @@ len -= used; /* - * Inform the bottom half that data can be written - */ + * Inform the bottom half that data can be written + */ if (!(m->flags & M_TXEN)) { m->flags |= M_TXEN; MPU_CALLBACK(m, m->cookie, m->flags); @@ -1256,9 +1272,11 @@ printf("\n"); retval = 0; -err1: mtx_unlock(&m->qlock); +err1: + mtx_unlock(&m->qlock); mtx_unlock(&m->lock); -err0: return retval; +err0: + return retval; } static int @@ -1273,11 +1291,11 @@ vel = 127; if (vel == 64) { - c[0] = 0x90 | (chn & 0x0f); /* Note on. */ + c[0] = 0x90 | (chn & 0x0f); /* Note on. */ c[1] = (u_char)note; c[2] = 0; } else { - c[0] = 0x80 | (chn & 0x0f); /* Note off. */ + c[0] = 0x80 | (chn & 0x0f); /* Note off. */ c[1] = (u_char)note; c[2] = (u_char)vel; } @@ -1293,7 +1311,7 @@ if (instr > 127 || chn > 15) return EINVAL; - c[0] = 0xc0 | (chn & 0x0f); /* Progamme change. */ + c[0] = 0xc0 | (chn & 0x0f); /* Progamme change. */ c[1] = instr + midi_instroff; return midisynth_writeraw(n, c, 2); @@ -1310,7 +1328,7 @@ if (vel > 127) vel = 127; - c[0] = 0x90 | (chn & 0x0f); /* Note on. */ + c[0] = 0x90 | (chn & 0x0f); /* Note on. */ c[1] = (u_char)note; c[2] = (u_char)vel; @@ -1330,7 +1348,7 @@ if (ctrlnum > 127 || chn > 15) return EINVAL; - c[0] = 0xb0 | (chn & 0x0f); /* Control Message. */ + c[0] = 0xb0 | (chn & 0x0f); /* Control Message. */ c[1] = ctrlnum; c[2] = val; return midisynth_writeraw(n, c, 3); @@ -1344,7 +1362,7 @@ if (val > 16383 || chn > 15) return EINVAL; - c[0] = 0xe0 | (chn & 0x0f); /* Pitch bend. */ + c[0] = 0xe0 | (chn & 0x0f); /* Pitch bend. */ c[1] = (u_char)val & 0x7f; c[2] = (u_char)(val >> 7) & 0x7f; @@ -1362,7 +1380,7 @@ MIDI_DEBUG(3, printf("midi_destroy\n")); m->dev->si_drv1 = NULL; - mtx_unlock(&m->lock); /* XXX */ + mtx_unlock(&m->lock); /* XXX */ destroy_dev(m->dev); TAILQ_REMOVE(&midi_devs, m, link); if (midiuninit) @@ -1387,8 +1405,8 @@ TAILQ_INIT(&midi_devs); midistat_dev = make_dev(&midistat_cdevsw, - MIDIMKMINOR(0, MIDI_DEV_MIDICTL, 0), - UID_ROOT, GID_WHEEL, 0666, "midistat"); + MIDIMKMINOR(0, MIDI_DEV_MIDICTL, 0), UID_ROOT, GID_WHEEL, 0666, + "midistat"); return 0; } @@ -1405,7 +1423,7 @@ if (midistat_isopen) goto exit0; - TAILQ_FOREACH_SAFE(m, &midi_devs, link, tmp) { + TAILQ_FOREACH_SAFE (m, &midi_devs, link, tmp) { mtx_lock(&m->lock); if (m->busy) retval = EBUSY; @@ -1476,7 +1494,7 @@ struct snd_midi *m; sx_xlock(&midistat_lock); - TAILQ_FOREACH(m, &midi_devs, link) { + TAILQ_FOREACH (m, &midi_devs, link) { retval++; } sx_xunlock(&midistat_lock); @@ -1496,7 +1514,7 @@ int retval = 0; sx_xlock(&midistat_lock); - TAILQ_FOREACH(m, &midi_devs, link) { + TAILQ_FOREACH (m, &midi_devs, link) { if (unit == retval) { sx_xunlock(&midistat_lock); return (kobj_t)m->synth; Index: sys/dev/sound/midi/midiq.h =================================================================== --- sys/dev/sound/midi/midiq.h +++ sys/dev/sound/midi/midiq.h @@ -29,72 +29,101 @@ #ifndef MIDIQ_H #define MIDIQ_H -#define MIDIQ_MOVE(a,b,c) bcopy(b,a,c) +#define MIDIQ_MOVE(a, b, c) bcopy(b, a, c) -#define MIDIQ_HEAD(name, type) \ -struct name { \ - int h, t, s; \ - type * b; \ -} +#define MIDIQ_HEAD(name, type) \ + struct name { \ + int h, t, s; \ + type *b; \ + } -#define MIDIQ_INIT(head, buf, size) do { \ - (head).h=(head).t=0; \ - (head).s=size; \ - (head).b=buf; \ -} while (0) +#define MIDIQ_INIT(head, buf, size) \ + do { \ + (head).h = (head).t = 0; \ + (head).s = size; \ + (head).b = buf; \ + } while (0) -#define MIDIQ_EMPTY(head) ((head).h == (head).t ) +#define MIDIQ_EMPTY(head) ((head).h == (head).t) -#define MIDIQ_LENBASE(head) ((head).h - (head).t < 0 ? \ - (head).h - (head).t + (head).s : \ - (head).h - (head).t) +#define MIDIQ_LENBASE(head) \ + ((head).h - (head).t < 0 ? (head).h - (head).t + (head).s : \ + (head).h - (head).t) -#define MIDIQ_FULL(head) ((head).h == -1) -#define MIDIQ_AVAIL(head) (MIDIQ_FULL(head) ? 0 : (head).s - MIDIQ_LENBASE(head)) -#define MIDIQ_LEN(head) ((head).s - MIDIQ_AVAIL(head)) +#define MIDIQ_FULL(head) ((head).h == -1) +#define MIDIQ_AVAIL(head) \ + (MIDIQ_FULL(head) ? 0 : (head).s - MIDIQ_LENBASE(head)) +#define MIDIQ_LEN(head) ((head).s - MIDIQ_AVAIL(head)) #define MIDIQ_DEBUG 0 /* * No protection against overflow, underflow */ -#define MIDIQ_ENQ(head, buf, size) do { \ - if(MIDIQ_DEBUG)\ - printf("#1 %p %p bytes copied %jd tran req s %d h %d t %d\n", \ - &(head).b[(head).h], (buf), \ - (intmax_t)(sizeof(*(head).b) * \ - MIN( (size), (head).s - (head).h) ), \ - (size), (head).h, (head).t); \ - MIDIQ_MOVE(&(head).b[(head).h], (buf), sizeof(*(head).b) * MIN((size), (head).s - (head).h)); \ - if( (head).s - (head).h < (size) ) { \ - if(MIDIQ_DEBUG) \ - printf("#2 %p %p bytes copied %jd\n", (head).b, (buf) + (head).s - (head).h, (intmax_t)sizeof(*(head).b) * ((size) - (head).s + (head).h) ); \ - MIDIQ_MOVE((head).b, (buf) + (head).s - (head).h, sizeof(*(head).b) * ((size) - (head).s + (head).h) ); \ - } \ - (head).h+=(size); \ - (head).h%=(head).s; \ - if(MIDIQ_EMPTY(head)) (head).h=-1; \ - if(MIDIQ_DEBUG)\ - printf("#E h %d t %d\n", (head).h, (head).t); \ -} while (0) +#define MIDIQ_ENQ(head, buf, size) \ + do { \ + if (MIDIQ_DEBUG) \ + printf( \ + "#1 %p %p bytes copied %jd tran req s %d h %d t %d\n", \ + &(head).b[(head).h], (buf), \ + (intmax_t)(sizeof(*(head).b) * \ + MIN((size), (head).s - (head).h)), \ + (size), (head).h, (head).t); \ + MIDIQ_MOVE(&(head).b[(head).h], (buf), \ + sizeof(*(head).b) * MIN((size), (head).s - (head).h)); \ + if ((head).s - (head).h < (size)) { \ + if (MIDIQ_DEBUG) \ + printf("#2 %p %p bytes copied %jd\n", \ + (head).b, (buf) + (head).s - (head).h, \ + (intmax_t)sizeof(*(head).b) * \ + ((size) - (head).s + (head).h)); \ + MIDIQ_MOVE((head).b, (buf) + (head).s - (head).h, \ + sizeof(*(head).b) * \ + ((size) - (head).s + (head).h)); \ + } \ + (head).h += (size); \ + (head).h %= (head).s; \ + if (MIDIQ_EMPTY(head)) \ + (head).h = -1; \ + if (MIDIQ_DEBUG) \ + printf("#E h %d t %d\n", (head).h, (head).t); \ + } while (0) -#define MIDIQ_DEQ_I(head, buf, size, move, update) do { \ - if(MIDIQ_FULL(head)) (head).h=(head).t; \ - if(MIDIQ_DEBUG)\ - printf("#1 %p %p bytes copied %jd tran req s %d h %d t %d\n", &(head).b[(head).t], (buf), (intmax_t)sizeof(*(head).b) * MIN((size), (head).s - (head).t), (size), (head).h, (head).t); \ - if (move) MIDIQ_MOVE((buf), &(head).b[(head).t], sizeof(*(head).b) * MIN((size), (head).s - (head).t)); \ - if( (head).s - (head).t < (size) ) { \ - if(MIDIQ_DEBUG) \ - printf("#2 %p %p bytes copied %jd\n", (head).b, (buf) + (head).s - (head).t, (intmax_t)sizeof(*(head).b) * ((size) - (head).s + (head).t) ); \ - if (move) MIDIQ_MOVE((buf) + (head).s - (head).t, (head).b, sizeof(*(head).b) * ((size) - (head).s + (head).t) ); \ - } \ - if (update) { \ - (head).t+=(size); \ - (head).t%=(head).s; \ - } else { \ - if (MIDIQ_EMPTY(head)) (head).h=-1; \ - } \ - if(MIDIQ_DEBUG)\ - printf("#E h %d t %d\n", (head).h, (head).t); \ -} while (0) +#define MIDIQ_DEQ_I(head, buf, size, move, update) \ + do { \ + if (MIDIQ_FULL(head)) \ + (head).h = (head).t; \ + if (MIDIQ_DEBUG) \ + printf( \ + "#1 %p %p bytes copied %jd tran req s %d h %d t %d\n", \ + &(head).b[(head).t], (buf), \ + (intmax_t)sizeof(*(head).b) * \ + MIN((size), (head).s - (head).t), \ + (size), (head).h, (head).t); \ + if (move) \ + MIDIQ_MOVE((buf), &(head).b[(head).t], \ + sizeof(*(head).b) * \ + MIN((size), (head).s - (head).t)); \ + if ((head).s - (head).t < (size)) { \ + if (MIDIQ_DEBUG) \ + printf("#2 %p %p bytes copied %jd\n", \ + (head).b, (buf) + (head).s - (head).t, \ + (intmax_t)sizeof(*(head).b) * \ + ((size) - (head).s + (head).t)); \ + if (move) \ + MIDIQ_MOVE((buf) + (head).s - (head).t, \ + (head).b, \ + sizeof(*(head).b) * \ + ((size) - (head).s + (head).t)); \ + } \ + if (update) { \ + (head).t += (size); \ + (head).t %= (head).s; \ + } else { \ + if (MIDIQ_EMPTY(head)) \ + (head).h = -1; \ + } \ + if (MIDIQ_DEBUG) \ + printf("#E h %d t %d\n", (head).h, (head).t); \ + } while (0) #define MIDIQ_SIZE(head) ((head).s) #define MIDIQ_CLEAR(head) ((head).h = (head).t = 0) Index: sys/dev/sound/midi/mpu401.h =================================================================== --- sys/dev/sound/midi/mpu401.h +++ sys/dev/sound/midi/mpu401.h @@ -33,9 +33,8 @@ typedef int mpu401_intr_t(struct mpu401 *_obj); -extern struct mpu401 * -mpu401_init(kobj_class_t _cls, void *cookie, driver_intr_t *_softintr, - mpu401_intr_t ** _cb); +extern struct mpu401 *mpu401_init(kobj_class_t _cls, void *cookie, + driver_intr_t *_softintr, mpu401_intr_t **_cb); extern int mpu401_uninit(struct mpu401 *_obj); #endif Index: sys/dev/sound/midi/mpu401.c =================================================================== --- sys/dev/sound/midi/mpu401.c +++ sys/dev/sound/midi/mpu401.c @@ -26,56 +26,58 @@ * SUCH DAMAGE. */ -#include #include #include -#include +#include +#include /* to get driver_intr_t */ #include +#include #include +#include #include #include -#include -#include -#include -#include /* to get driver_intr_t */ +#include #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include #include +#include #include "mpu_if.h" #include "mpufoi_if.h" #ifndef KOBJMETHOD_END -#define KOBJMETHOD_END { NULL, NULL } +#define KOBJMETHOD_END \ + { \ + NULL, NULL \ + } #endif -#define MPU_DATAPORT 0 -#define MPU_CMDPORT 1 -#define MPU_STATPORT 1 -#define MPU_RESET 0xff -#define MPU_UART 0x3f -#define MPU_ACK 0xfe -#define MPU_STATMASK 0xc0 +#define MPU_DATAPORT 0 +#define MPU_CMDPORT 1 +#define MPU_STATPORT 1 +#define MPU_RESET 0xff +#define MPU_UART 0x3f +#define MPU_ACK 0xfe +#define MPU_STATMASK 0xc0 #define MPU_OUTPUTBUSY 0x40 -#define MPU_INPUTBUSY 0x80 +#define MPU_INPUTBUSY 0x80 #define MPU_TRYDATA 50 -#define MPU_DELAY 2500 +#define MPU_DELAY 2500 -#define CMD(m,d) MPUFOI_WRITE(m, m->cookie, MPU_CMDPORT,d) -#define STATUS(m) MPUFOI_READ(m, m->cookie, MPU_STATPORT) -#define READ(m) MPUFOI_READ(m, m->cookie, MPU_DATAPORT) -#define WRITE(m,d) MPUFOI_WRITE(m, m->cookie, MPU_DATAPORT,d) +#define CMD(m, d) MPUFOI_WRITE(m, m->cookie, MPU_CMDPORT, d) +#define STATUS(m) MPUFOI_READ(m, m->cookie, MPU_STATPORT) +#define READ(m) MPUFOI_READ(m, m->cookie, MPU_DATAPORT) +#define WRITE(m, d) MPUFOI_WRITE(m, m->cookie, MPU_DATAPORT, d) struct mpu401 { KOBJ_FIELDS; struct snd_midi *mid; - int flags; + int flags; driver_intr_t *si; - void *cookie; + void *cookie; struct callout timer; }; @@ -91,17 +93,14 @@ static const char *mpu401_mdescr(struct snd_midi *, void *, int); static const char *mpu401_mprovider(struct snd_midi *, void *); -static kobj_method_t mpu401_methods[] = { - KOBJMETHOD(mpu_init, mpu401_minit), +static kobj_method_t mpu401_methods[] = { KOBJMETHOD(mpu_init, mpu401_minit), KOBJMETHOD(mpu_uninit, mpu401_muninit), KOBJMETHOD(mpu_inqsize, mpu401_minqsize), KOBJMETHOD(mpu_outqsize, mpu401_moutqsize), KOBJMETHOD(mpu_callback, mpu401_mcallback), KOBJMETHOD(mpu_callbackp, mpu401_mcallbackp), KOBJMETHOD(mpu_descr, mpu401_mdescr), - KOBJMETHOD(mpu_provider, mpu401_mprovider), - KOBJMETHOD_END -}; + KOBJMETHOD(mpu_provider, mpu401_mprovider), KOBJMETHOD_END }; DEFINE_CLASS(mpu401, mpu401_methods, 0); @@ -112,12 +111,11 @@ if (m->si) (m->si)(m->cookie); - } static int mpu401_intr(struct mpu401 *m) { -#define MPU_INTR_BUF 16 +#define MPU_INTR_BUF 16 MIDI_TYPE b[MPU_INTR_BUF]; int i; int s; @@ -125,21 +123,23 @@ /* printf("mpu401_intr\n"); */ -#define RXRDY(m) ( (STATUS(m) & MPU_INPUTBUSY) == 0) -#define TXRDY(m) ( (STATUS(m) & MPU_OUTPUTBUSY) == 0) +#define RXRDY(m) ((STATUS(m) & MPU_INPUTBUSY) == 0) +#define TXRDY(m) ((STATUS(m) & MPU_OUTPUTBUSY) == 0) #if 0 -#define D(x,l) printf("mpu401_intr %d %x %s %s\n",l, x, x&MPU_INPUTBUSY?"RX":"", x&MPU_OUTPUTBUSY?"TX":"") +#define D(x, l) \ + printf("mpu401_intr %d %x %s %s\n", l, x, \ + x &MPU_INPUTBUSY ? "RX" : "", x &MPU_OUTPUTBUSY ? "TX" : "") #else -#define D(x,l) +#define D(x, l) #endif i = 0; s = STATUS(m); D(s, 1); while ((s & MPU_INPUTBUSY) == 0 && i < MPU_INTR_BUF) { b[i] = READ(m); -/* - printf("mpu401_intr in i %d d %d\n", i, b[i]); -*/ + /* + printf("mpu401_intr in i %d d %d\n", i, b[i]); + */ i++; s = STATUS(m); } @@ -148,15 +148,17 @@ i = 0; while (!(s & MPU_OUTPUTBUSY) && i < MPU_INTR_BUF) { if (midi_out(m->mid, b, 1)) { -/* - printf("mpu401_intr out i %d d %d\n", i, b[0]); -*/ + /* + printf("mpu401_intr out i %d d + %d\n", i, b[0]); + */ WRITE(m, *b); } else { -/* - printf("mpu401_intr write: no output\n"); -*/ + /* + printf("mpu401_intr write: no + output\n"); + */ return 0; } i++; @@ -172,7 +174,7 @@ struct mpu401 * mpu401_init(kobj_class_t cls, void *cookie, driver_intr_t softintr, - mpu401_intr_t ** cb) + mpu401_intr_t **cb) { struct mpu401 *m; @@ -278,7 +280,7 @@ static void mpu401_mcallbackp(struct snd_midi *sm, void *arg, int flags) { -/* printf("mpu401_callbackp\n"); */ + /* printf("mpu401_callbackp\n"); */ mpu401_mcallback(sm, arg, flags); } Index: sys/dev/sound/midi/sequencer.h =================================================================== --- sys/dev/sound/midi/sequencer.h +++ sys/dev/sound/midi/sequencer.h @@ -34,42 +34,42 @@ #ifndef _SEQUENCER_H_ #define _SEQUENCER_H_ -#define NSEQ_MAX 16 +#define NSEQ_MAX 16 /* * many variables should be reduced to a range. Here define a macro */ -#define RANGE(var, low, high) (var) = \ -((var)<(low)?(low) : (var)>(high)?(high) : (var)) +#define RANGE(var, low, high) \ + (var) = ((var) < (low) ? (low) : (var) > (high) ? (high) : (var)) #ifdef _KERNEL -void seq_timer(void *arg); +void seq_timer(void *arg); SYSCTL_DECL(_hw_midi_seq); extern int seq_debug; -#define SEQ_DEBUG(y, x) \ - do { \ - if (seq_debug >= y) { \ - (x); \ - } \ +#define SEQ_DEBUG(y, x) \ + do { \ + if (seq_debug >= y) { \ + (x); \ + } \ } while (0) SYSCTL_DECL(_hw_midi); -#endif /* _KERNEL */ +#endif /* _KERNEL */ -#define SYNTHPROP_MIDI 1 -#define SYNTHPROP_SYNTH 2 -#define SYNTHPROP_RX 4 -#define SYNTHPROP_TX 8 +#define SYNTHPROP_MIDI 1 +#define SYNTHPROP_SYNTH 2 +#define SYNTHPROP_RX 4 +#define SYNTHPROP_TX 8 struct _midi_cmdtab { - int cmd; - char *name; + int cmd; + char *name; }; typedef struct _midi_cmdtab midi_cmdtab; extern midi_cmdtab cmdtab_seqevent[]; @@ -78,12 +78,8 @@ extern midi_cmdtab cmdtab_seqcv[]; extern midi_cmdtab cmdtab_seqccmn[]; -char *midi_cmdname(int cmd, midi_cmdtab * tab); +char *midi_cmdname(int cmd, midi_cmdtab *tab); -enum { - MORE, - TIMERARMED, - QUEUEFULL -}; +enum { MORE, TIMERARMED, QUEUEFULL }; #endif Index: sys/dev/sound/midi/sequencer.c =================================================================== --- sys/dev/sound/midi/sequencer.c +++ sys/dev/sound/midi/sequencer.c @@ -33,37 +33,35 @@ #include #include -#include - -#include -#include -#include -#include -#include -#include - -#include /* for DATA_SET */ - -#include +#include +#include #include -#include -#include -#include #include +#include +#include +#include +#include +#include /* for DATA_SET */ +#include +#include #include -#include -#include -#include -#include /* for DELAY */ -#include -#include #include -#include +#include #include -#include -#include -#include +#include +#include +#include #include +#include +#include +#include +#include +#include +#include + +#include +#include /* for DELAY */ +#include #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" @@ -71,27 +69,28 @@ #include #include -#include "synth_if.h" - #include +#include "synth_if.h" + #define TMR_TIMERBASE 13 -#define SND_DEV_SEQ 1 /* Sequencer output /dev/sequencer (FM - * synthesizer and MIDI output) */ -#define SND_DEV_MUSIC 8 /* /dev/music, level 2 interface */ +#define SND_DEV_SEQ \ + 1 /* Sequencer output /dev/sequencer (FM \ + * synthesizer and MIDI output) */ +#define SND_DEV_MUSIC 8 /* /dev/music, level 2 interface */ /* Length of a sequencer event. */ #define EV_SZ 8 #define IEV_SZ 8 /* Lookup modes */ -#define LOOKUP_EXIST (0) -#define LOOKUP_OPEN (1) -#define LOOKUP_CLOSE (2) +#define LOOKUP_EXIST (0) +#define LOOKUP_OPEN (1) +#define LOOKUP_CLOSE (2) #define PCMMKMINOR(u, d, c) \ - ((((c) & 0xff) << 16) | (((u) & 0x0f) << 4) | ((d) & 0x0f)) + ((((c) & 0xff) << 16) | (((u) & 0x0f) << 4) | ((d) & 0x0f)) #define MIDIMKMINOR(u, d, c) PCMMKMINOR(u, d, c) #define MIDIUNIT(y) ((dev2unit(y) >> 4) & 0x0f) #define MIDIDEV(y) (dev2unit(y) & 0x0f) @@ -123,32 +122,32 @@ MIDIQ_HEAD(, u_char) in_q, out_q; - u_long flags; + u_long flags; /* Flags (protected by flag_mtx of mididev_info) */ - int fflags; /* Access mode */ - int music; + int fflags; /* Access mode */ + int music; - int out_water; /* Sequence output threshould */ - snd_sync_parm sync_parm; /* AIOSYNC parameter set */ - struct thread *sync_thread; /* AIOSYNCing thread */ + int out_water; /* Sequence output threshould */ + snd_sync_parm sync_parm; /* AIOSYNC parameter set */ + struct thread *sync_thread; /* AIOSYNCing thread */ struct selinfo in_sel, out_sel; - int midi_number; + int midi_number; struct cdev *seqdev, *musicdev; - int unit; - int maxunits; + int unit; + int maxunits; kobj_t *midis; - int *midi_flags; - kobj_t mapper; - void *mapper_cookie; + int *midi_flags; + kobj_t mapper; + void *mapper_cookie; struct timeval timerstop, timersub; - int timerbase, tempo; - int timerrun; - int done; - int playing; - int recording; - int busy; - int pre_event_timeout; - int waiting; + int timerbase, tempo; + int timerrun; + int done; + int playing; + int recording; + int busy; + int pre_event_timeout; + int waiting; }; /* @@ -159,110 +158,113 @@ SYSCTL_NODE(_hw_midi, OID_AUTO, seq, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, "Midi sequencer"); -int seq_debug; +int seq_debug; /* XXX: should this be moved into debug.midi? */ SYSCTL_INT(_hw_midi_seq, OID_AUTO, debug, CTLFLAG_RW, &seq_debug, 0, ""); -midi_cmdtab cmdtab_seqevent[] = { - {SEQ_NOTEOFF, "SEQ_NOTEOFF"}, - {SEQ_NOTEON, "SEQ_NOTEON"}, - {SEQ_WAIT, "SEQ_WAIT"}, - {SEQ_PGMCHANGE, "SEQ_PGMCHANGE"}, - {SEQ_SYNCTIMER, "SEQ_SYNCTIMER"}, - {SEQ_MIDIPUTC, "SEQ_MIDIPUTC"}, - {SEQ_DRUMON, "SEQ_DRUMON"}, - {SEQ_DRUMOFF, "SEQ_DRUMOFF"}, - {SEQ_ECHO, "SEQ_ECHO"}, - {SEQ_AFTERTOUCH, "SEQ_AFTERTOUCH"}, - {SEQ_CONTROLLER, "SEQ_CONTROLLER"}, - {SEQ_BALANCE, "SEQ_BALANCE"}, - {SEQ_VOLMODE, "SEQ_VOLMODE"}, - {SEQ_FULLSIZE, "SEQ_FULLSIZE"}, - {SEQ_PRIVATE, "SEQ_PRIVATE"}, - {SEQ_EXTENDED, "SEQ_EXTENDED"}, - {EV_SEQ_LOCAL, "EV_SEQ_LOCAL"}, - {EV_TIMING, "EV_TIMING"}, - {EV_CHN_COMMON, "EV_CHN_COMMON"}, - {EV_CHN_VOICE, "EV_CHN_VOICE"}, - {EV_SYSEX, "EV_SYSEX"}, - {-1, NULL}, +midi_cmdtab cmdtab_seqevent[] = { + { SEQ_NOTEOFF, "SEQ_NOTEOFF" }, + { SEQ_NOTEON, "SEQ_NOTEON" }, + { SEQ_WAIT, "SEQ_WAIT" }, + { SEQ_PGMCHANGE, "SEQ_PGMCHANGE" }, + { SEQ_SYNCTIMER, "SEQ_SYNCTIMER" }, + { SEQ_MIDIPUTC, "SEQ_MIDIPUTC" }, + { SEQ_DRUMON, "SEQ_DRUMON" }, + { SEQ_DRUMOFF, "SEQ_DRUMOFF" }, + { SEQ_ECHO, "SEQ_ECHO" }, + { SEQ_AFTERTOUCH, "SEQ_AFTERTOUCH" }, + { SEQ_CONTROLLER, "SEQ_CONTROLLER" }, + { SEQ_BALANCE, "SEQ_BALANCE" }, + { SEQ_VOLMODE, "SEQ_VOLMODE" }, + { SEQ_FULLSIZE, "SEQ_FULLSIZE" }, + { SEQ_PRIVATE, "SEQ_PRIVATE" }, + { SEQ_EXTENDED, "SEQ_EXTENDED" }, + { EV_SEQ_LOCAL, "EV_SEQ_LOCAL" }, + { EV_TIMING, "EV_TIMING" }, + { EV_CHN_COMMON, "EV_CHN_COMMON" }, + { EV_CHN_VOICE, "EV_CHN_VOICE" }, + { EV_SYSEX, "EV_SYSEX" }, + { -1, NULL }, }; -midi_cmdtab cmdtab_seqioctl[] = { - {SNDCTL_SEQ_RESET, "SNDCTL_SEQ_RESET"}, - {SNDCTL_SEQ_SYNC, "SNDCTL_SEQ_SYNC"}, - {SNDCTL_SYNTH_INFO, "SNDCTL_SYNTH_INFO"}, - {SNDCTL_SEQ_CTRLRATE, "SNDCTL_SEQ_CTRLRATE"}, - {SNDCTL_SEQ_GETOUTCOUNT, "SNDCTL_SEQ_GETOUTCOUNT"}, - {SNDCTL_SEQ_GETINCOUNT, "SNDCTL_SEQ_GETINCOUNT"}, - {SNDCTL_SEQ_PERCMODE, "SNDCTL_SEQ_PERCMODE"}, - {SNDCTL_FM_LOAD_INSTR, "SNDCTL_FM_LOAD_INSTR"}, - {SNDCTL_SEQ_TESTMIDI, "SNDCTL_SEQ_TESTMIDI"}, - {SNDCTL_SEQ_RESETSAMPLES, "SNDCTL_SEQ_RESETSAMPLES"}, - {SNDCTL_SEQ_NRSYNTHS, "SNDCTL_SEQ_NRSYNTHS"}, - {SNDCTL_SEQ_NRMIDIS, "SNDCTL_SEQ_NRMIDIS"}, - {SNDCTL_SEQ_GETTIME, "SNDCTL_SEQ_GETTIME"}, - {SNDCTL_MIDI_INFO, "SNDCTL_MIDI_INFO"}, - {SNDCTL_SEQ_THRESHOLD, "SNDCTL_SEQ_THRESHOLD"}, - {SNDCTL_SYNTH_MEMAVL, "SNDCTL_SYNTH_MEMAVL"}, - {SNDCTL_FM_4OP_ENABLE, "SNDCTL_FM_4OP_ENABLE"}, - {SNDCTL_PMGR_ACCESS, "SNDCTL_PMGR_ACCESS"}, - {SNDCTL_SEQ_PANIC, "SNDCTL_SEQ_PANIC"}, - {SNDCTL_SEQ_OUTOFBAND, "SNDCTL_SEQ_OUTOFBAND"}, - {SNDCTL_TMR_TIMEBASE, "SNDCTL_TMR_TIMEBASE"}, - {SNDCTL_TMR_START, "SNDCTL_TMR_START"}, - {SNDCTL_TMR_STOP, "SNDCTL_TMR_STOP"}, - {SNDCTL_TMR_CONTINUE, "SNDCTL_TMR_CONTINUE"}, - {SNDCTL_TMR_TEMPO, "SNDCTL_TMR_TEMPO"}, - {SNDCTL_TMR_SOURCE, "SNDCTL_TMR_SOURCE"}, - {SNDCTL_TMR_METRONOME, "SNDCTL_TMR_METRONOME"}, - {SNDCTL_TMR_SELECT, "SNDCTL_TMR_SELECT"}, - {SNDCTL_MIDI_PRETIME, "SNDCTL_MIDI_PRETIME"}, - {AIONWRITE, "AIONWRITE"}, - {AIOGSIZE, "AIOGSIZE"}, - {AIOSSIZE, "AIOSSIZE"}, - {AIOGFMT, "AIOGFMT"}, - {AIOSFMT, "AIOSFMT"}, - {AIOGMIX, "AIOGMIX"}, - {AIOSMIX, "AIOSMIX"}, - {AIOSTOP, "AIOSTOP"}, - {AIOSYNC, "AIOSYNC"}, - {AIOGCAP, "AIOGCAP"}, - {-1, NULL}, +midi_cmdtab cmdtab_seqioctl[] = { + { SNDCTL_SEQ_RESET, "SNDCTL_SEQ_RESET" }, + { SNDCTL_SEQ_SYNC, "SNDCTL_SEQ_SYNC" }, + { SNDCTL_SYNTH_INFO, "SNDCTL_SYNTH_INFO" }, + { SNDCTL_SEQ_CTRLRATE, "SNDCTL_SEQ_CTRLRATE" }, + { SNDCTL_SEQ_GETOUTCOUNT, "SNDCTL_SEQ_GETOUTCOUNT" }, + { SNDCTL_SEQ_GETINCOUNT, "SNDCTL_SEQ_GETINCOUNT" }, + { SNDCTL_SEQ_PERCMODE, "SNDCTL_SEQ_PERCMODE" }, + { SNDCTL_FM_LOAD_INSTR, "SNDCTL_FM_LOAD_INSTR" }, + { SNDCTL_SEQ_TESTMIDI, "SNDCTL_SEQ_TESTMIDI" }, + { SNDCTL_SEQ_RESETSAMPLES, "SNDCTL_SEQ_RESETSAMPLES" }, + { SNDCTL_SEQ_NRSYNTHS, "SNDCTL_SEQ_NRSYNTHS" }, + { SNDCTL_SEQ_NRMIDIS, "SNDCTL_SEQ_NRMIDIS" }, + { SNDCTL_SEQ_GETTIME, "SNDCTL_SEQ_GETTIME" }, + { SNDCTL_MIDI_INFO, "SNDCTL_MIDI_INFO" }, + { SNDCTL_SEQ_THRESHOLD, "SNDCTL_SEQ_THRESHOLD" }, + { SNDCTL_SYNTH_MEMAVL, "SNDCTL_SYNTH_MEMAVL" }, + { SNDCTL_FM_4OP_ENABLE, "SNDCTL_FM_4OP_ENABLE" }, + { SNDCTL_PMGR_ACCESS, "SNDCTL_PMGR_ACCESS" }, + { SNDCTL_SEQ_PANIC, "SNDCTL_SEQ_PANIC" }, + { SNDCTL_SEQ_OUTOFBAND, "SNDCTL_SEQ_OUTOFBAND" }, + { SNDCTL_TMR_TIMEBASE, "SNDCTL_TMR_TIMEBASE" }, + { SNDCTL_TMR_START, "SNDCTL_TMR_START" }, + { SNDCTL_TMR_STOP, "SNDCTL_TMR_STOP" }, + { SNDCTL_TMR_CONTINUE, "SNDCTL_TMR_CONTINUE" }, + { SNDCTL_TMR_TEMPO, "SNDCTL_TMR_TEMPO" }, + { SNDCTL_TMR_SOURCE, "SNDCTL_TMR_SOURCE" }, + { SNDCTL_TMR_METRONOME, "SNDCTL_TMR_METRONOME" }, + { SNDCTL_TMR_SELECT, "SNDCTL_TMR_SELECT" }, + { SNDCTL_MIDI_PRETIME, "SNDCTL_MIDI_PRETIME" }, + { AIONWRITE, "AIONWRITE" }, + { AIOGSIZE, "AIOGSIZE" }, + { AIOSSIZE, "AIOSSIZE" }, + { AIOGFMT, "AIOGFMT" }, + { AIOSFMT, "AIOSFMT" }, + { AIOGMIX, "AIOGMIX" }, + { AIOSMIX, "AIOSMIX" }, + { AIOSTOP, "AIOSTOP" }, + { AIOSYNC, "AIOSYNC" }, + { AIOGCAP, "AIOGCAP" }, + { -1, NULL }, }; -midi_cmdtab cmdtab_timer[] = { - {TMR_WAIT_REL, "TMR_WAIT_REL"}, - {TMR_WAIT_ABS, "TMR_WAIT_ABS"}, - {TMR_STOP, "TMR_STOP"}, - {TMR_START, "TMR_START"}, - {TMR_CONTINUE, "TMR_CONTINUE"}, - {TMR_TEMPO, "TMR_TEMPO"}, - {TMR_ECHO, "TMR_ECHO"}, - {TMR_CLOCK, "TMR_CLOCK"}, - {TMR_SPP, "TMR_SPP"}, - {TMR_TIMESIG, "TMR_TIMESIG"}, - {-1, NULL}, +midi_cmdtab cmdtab_timer[] = { + { TMR_WAIT_REL, "TMR_WAIT_REL" }, + { TMR_WAIT_ABS, "TMR_WAIT_ABS" }, + { TMR_STOP, "TMR_STOP" }, + { TMR_START, "TMR_START" }, + { TMR_CONTINUE, "TMR_CONTINUE" }, + { TMR_TEMPO, "TMR_TEMPO" }, + { TMR_ECHO, "TMR_ECHO" }, + { TMR_CLOCK, "TMR_CLOCK" }, + { TMR_SPP, "TMR_SPP" }, + { TMR_TIMESIG, "TMR_TIMESIG" }, + { -1, NULL }, }; -midi_cmdtab cmdtab_seqcv[] = { - {MIDI_NOTEOFF, "MIDI_NOTEOFF"}, - {MIDI_NOTEON, "MIDI_NOTEON"}, - {MIDI_KEY_PRESSURE, "MIDI_KEY_PRESSURE"}, - {-1, NULL}, +midi_cmdtab cmdtab_seqcv[] = { + { MIDI_NOTEOFF, "MIDI_NOTEOFF" }, + { MIDI_NOTEON, "MIDI_NOTEON" }, + { MIDI_KEY_PRESSURE, "MIDI_KEY_PRESSURE" }, + { -1, NULL }, }; -midi_cmdtab cmdtab_seqccmn[] = { - {MIDI_CTL_CHANGE, "MIDI_CTL_CHANGE"}, - {MIDI_PGM_CHANGE, "MIDI_PGM_CHANGE"}, - {MIDI_CHN_PRESSURE, "MIDI_CHN_PRESSURE"}, - {MIDI_PITCH_BEND, "MIDI_PITCH_BEND"}, - {MIDI_SYSTEM_PREFIX, "MIDI_SYSTEM_PREFIX"}, - {-1, NULL}, +midi_cmdtab cmdtab_seqccmn[] = { + { MIDI_CTL_CHANGE, "MIDI_CTL_CHANGE" }, + { MIDI_PGM_CHANGE, "MIDI_PGM_CHANGE" }, + { MIDI_CHN_PRESSURE, "MIDI_CHN_PRESSURE" }, + { MIDI_PITCH_BEND, "MIDI_PITCH_BEND" }, + { MIDI_SYSTEM_PREFIX, "MIDI_SYSTEM_PREFIX" }, + { -1, NULL }, }; #ifndef KOBJMETHOD_END -#define KOBJMETHOD_END { NULL, NULL } +#define KOBJMETHOD_END \ + { \ + NULL, NULL \ + } #endif /* @@ -295,8 +297,8 @@ static int seq_sysex(struct seq_softc *scp, kobj_t md, u_char *event); static int seq_fetch_mid(struct seq_softc *scp, int unit, kobj_t *md); -void seq_copytoinput(struct seq_softc *scp, u_char *event, int len); -int seq_modevent(module_t mod, int type, void *data); +void seq_copytoinput(struct seq_softc *scp, u_char *event, int len); +int seq_modevent(module_t mod, int type, void *data); struct seq_softc *seqs[10]; static struct mtx seqinfo_mtx; static u_long nseq = 0; @@ -351,11 +353,11 @@ while (t->timerrun == 0) { SEQ_DEBUG(2, printf("Timer wait when timer isn't running\n")); /* - * The old sequencer used timeouts that only increased - * the timer when the timer was running. - * Hence the sequencer would stick (?) if the - * timer was disabled. - */ + * The old sequencer used timeouts that only increased + * the timer when the timer was running. + * Hence the sequencer would stick (?) if the + * timer was disabled. + */ cv_wait(&t->reset_cv, &t->seq_lock); if (t->playing == 0) return; @@ -379,7 +381,7 @@ if (when.tv_sec < 0 || when.tv_usec < 0) { SEQ_DEBUG(3, printf("seq_timer error negative time %lds.%06lds\n", - (long)when.tv_sec, (long)when.tv_usec)); + (long)when.tv_sec, (long)when.tv_usec)); return; } i = when.tv_sec * 1000000ull; @@ -396,7 +398,6 @@ if (ret != EWOULDBLOCK) SEQ_DEBUG(3, printf("seq_timer didn't timeout\n")); - } static int @@ -416,7 +417,7 @@ i = now.tv_sec * 1000000ull; i += now.tv_usec; i *= t->timerbase; -/* i /= t->tempo; */ + /* i /= t->tempo; */ i /= 1000000ull; ret = i; @@ -436,7 +437,7 @@ mtx_lock(&scp->seq_lock); SEQ_DEBUG(2, printf("seq_eventthread started\n")); while (scp->done == 0) { -restart: + restart: while (scp->playing == 0) { cv_wait(&scp->state_cv, &scp->seq_lock); if (scp->done) @@ -484,17 +485,16 @@ ret = seq_local(scp, event); else if (event[0] == EV_TIMING) ret = seq_timing(scp, event); - else if (event[0] != EV_CHN_VOICE && - event[0] != EV_CHN_COMMON && - event[0] != EV_SYSEX && - event[0] != SEQ_MIDIPUTC) { + else if (event[0] != EV_CHN_VOICE && event[0] != EV_CHN_COMMON && + event[0] != EV_SYSEX && event[0] != SEQ_MIDIPUTC) { ret = 1; - SEQ_DEBUG(2, printf("seq_processevent not known %d\n", - event[0])); + SEQ_DEBUG(2, + printf("seq_processevent not known %d\n", event[0])); } else if (seq_fetch_mid(scp, event[1], &m) != 0) { ret = 1; - SEQ_DEBUG(2, printf("seq_processevent midi unit not found %d\n", - event[1])); + SEQ_DEBUG(2, + printf("seq_processevent midi unit not found %d\n", + event[1])); } else switch (event[0]) { case EV_CHN_VOICE: @@ -567,12 +567,12 @@ goto err; scp->seqdev = make_dev(&seq_cdevsw, - MIDIMKMINOR(scp->unit, SND_DEV_SEQ, 0), UID_ROOT, - GID_WHEEL, 0666, "sequencer%d", scp->unit); + MIDIMKMINOR(scp->unit, SND_DEV_SEQ, 0), UID_ROOT, GID_WHEEL, 0666, + "sequencer%d", scp->unit); scp->musicdev = make_dev(&seq_cdevsw, - MIDIMKMINOR(scp->unit, SND_DEV_MUSIC, 0), UID_ROOT, - GID_WHEEL, 0666, "music%d", scp->unit); + MIDIMKMINOR(scp->unit, SND_DEV_MUSIC, 0), UID_ROOT, GID_WHEEL, 0666, + "music%d", scp->unit); if (scp->seqdev == NULL || scp->musicdev == NULL) goto err; @@ -580,9 +580,7 @@ * TODO: Add to list of sequencers this module provides */ - ret = - kproc_create - (seq_eventthread, scp, NULL, RFHIGHPID, 0, + ret = kproc_create(seq_eventthread, scp, NULL, RFHIGHPID, 0, "sequencer %02d", scp->unit); if (ret) @@ -607,8 +605,8 @@ if (scp->musicdev != NULL) destroy_dev(scp->musicdev); /* - * TODO: Destroy mutex and cv - */ + * TODO: Destroy mutex and cv + */ if (scp->midis != NULL) free(scp->midis, M_TEMP); if (scp->midi_flags != NULL) @@ -629,7 +627,7 @@ struct seq_softc *scp = seqs[unit]; int i; - //SEQ_DEBUG(4, printf("seq_delunit: %d\n", unit)); + // SEQ_DEBUG(4, printf("seq_delunit: %d\n", unit)); SEQ_DEBUG(1, printf("seq_delunit: 1 \n")); mtx_lock(&scp->seq_lock); @@ -744,8 +742,9 @@ if (scp == NULL) return ENXIO; - SEQ_DEBUG(3, printf("seq_open: scp %p unit %d, flags 0x%x.\n", - scp, scp->unit, flags)); + SEQ_DEBUG(3, + printf("seq_open: scp %p unit %d, flags 0x%x.\n", scp, scp->unit, + flags)); /* * Mark this device busy. @@ -781,8 +780,8 @@ scp->fflags) != 0) scp->midis[scp->midi_number] = NULL; else { - scp->midi_flags[scp->midi_number] = - SYNTH_QUERY(scp->midis[scp->midi_number]); + scp->midi_flags[scp->midi_number] = SYNTH_QUERY( + scp->midis[scp->midi_number]); scp->midi_number++; } } @@ -804,8 +803,9 @@ scp->busy = 1; mtx_unlock(&scp->seq_lock); - SEQ_DEBUG(2, printf("seq_open: opened, mode %s.\n", - scp->music ? "music" : "sequencer")); + SEQ_DEBUG(2, + printf("seq_open: opened, mode %s.\n", + scp->music ? "music" : "sequencer")); SEQ_DEBUG(2, printf("Sequencer %d %p opened maxunits %d midi_number %d:\n", scp->unit, scp, scp->maxunits, scp->midi_number)); @@ -868,13 +868,15 @@ if (scp == NULL) return ENXIO; - SEQ_DEBUG(7, printf("mseq_read: unit %d, resid %zd.\n", - scp->unit, uio->uio_resid)); + SEQ_DEBUG(7, + printf("mseq_read: unit %d, resid %zd.\n", scp->unit, + uio->uio_resid)); mtx_lock(&scp->seq_lock); if ((scp->fflags & FREAD) == 0) { - SEQ_DEBUG(2, printf("mseq_read: unit %d is not for reading.\n", - scp->unit)); + SEQ_DEBUG(2, + printf("mseq_read: unit %d is not for reading.\n", + scp->unit)); retval = EIO; goto err1; } @@ -928,8 +930,8 @@ retval = 0; err1: mtx_unlock(&scp->seq_lock); - SEQ_DEBUG(6, printf("mseq_read: ret %d, resid %zd.\n", - retval, uio->uio_resid)); + SEQ_DEBUG(6, + printf("mseq_read: ret %d, resid %zd.\n", retval, uio->uio_resid)); return retval; } @@ -942,8 +944,9 @@ int retval; int used; - SEQ_DEBUG(7, printf("seq_write: unit %d, resid %zd.\n", - scp->unit, uio->uio_resid)); + SEQ_DEBUG(7, + printf("seq_write: unit %d, resid %zd.\n", scp->unit, + uio->uio_resid)); if (scp == NULL) return ENXIO; @@ -951,8 +954,9 @@ mtx_lock(&scp->seq_lock); if ((scp->fflags & FWRITE) == 0) { - SEQ_DEBUG(2, printf("seq_write: unit %d is not for writing.\n", - scp->unit)); + SEQ_DEBUG(2, + printf("seq_write: unit %d is not for writing.\n", + scp->unit)); retval = EIO; goto err0; } @@ -971,9 +975,9 @@ retval = cv_wait_sig(&scp->out_cv, &scp->seq_lock); /* - * We slept, maybe things have changed since last - * dying check - */ + * We slept, maybe things have changed since last + * dying check + */ if (retval != 0) goto err0; #if 0 @@ -987,9 +991,10 @@ used = MIN(uio->uio_resid, 4); - SEQ_DEBUG(8, printf("seqout: resid %zd len %jd avail %jd\n", - uio->uio_resid, (intmax_t)MIDIQ_LEN(scp->out_q), - (intmax_t)MIDIQ_AVAIL(scp->out_q))); + SEQ_DEBUG(8, + printf("seqout: resid %zd len %jd avail %jd\n", + uio->uio_resid, (intmax_t)MIDIQ_LEN(scp->out_q), + (intmax_t)MIDIQ_AVAIL(scp->out_q))); if (used != 4) { retval = ENXIO; @@ -1002,8 +1007,9 @@ goto err0; ev_code = event[0]; - SEQ_DEBUG(8, printf("seq_write: unit %d, event %s.\n", - scp->unit, midi_cmdname(ev_code, cmdtab_seqevent))); + SEQ_DEBUG(8, + printf("seq_write: unit %d, event %s.\n", scp->unit, + midi_cmdname(ev_code, cmdtab_seqevent))); /* Have a look at the event code. */ if (ev_code == SEQ_FULLSIZE) { @@ -1032,10 +1038,12 @@ * For now, just flush the darn buffer */ SEQ_DEBUG(2, - printf("seq_write: SEQ_FULLSIZE flusing buffer.\n")); + printf( + "seq_write: SEQ_FULLSIZE flusing buffer.\n")); while (uio->uio_resid > 0) { mtx_unlock(&scp->seq_lock); - retval = uiomove(event, MIN(EV_SZ, uio->uio_resid), uio); + retval = uiomove(event, + MIN(EV_SZ, uio->uio_resid), uio); mtx_lock(&scp->seq_lock); if (retval) goto err0; @@ -1053,7 +1061,10 @@ * bytes. scoop extra info. */ if (scp->music && ev_code == SEQ_EXTENDED) { - SEQ_DEBUG(2, printf("seq_write: invalid level two event %x.\n", ev_code)); + SEQ_DEBUG(2, + printf( + "seq_write: invalid level two event %x.\n", + ev_code)); goto err0; } mtx_unlock(&scp->seq_lock); @@ -1064,7 +1075,8 @@ mtx_lock(&scp->seq_lock); if (error) { SEQ_DEBUG(2, - printf("seq_write: user memory mangled?\n")); + printf( + "seq_write: user memory mangled?\n")); goto err0; } } else { @@ -1072,7 +1084,9 @@ * Size four event. */ if (scp->music) { - SEQ_DEBUG(2, printf("seq_write: four byte event in music mode.\n")); + SEQ_DEBUG(2, + printf( + "seq_write: four byte event in music mode.\n")); goto err0; } } @@ -1087,10 +1101,10 @@ if (event[0] == EV_TIMING && (event[1] == TMR_START || event[1] == TMR_STOP)) { /* - * For now, try to make midimoutain work by - * forcing these events to be processed + * For now, try to make midimoutain work by + * forcing these events to be processed * immediately. - */ + */ seq_processevent(scp, event); } else MIDIQ_ENQ(scp->out_q, event, EV_SZ); @@ -1116,7 +1130,7 @@ err0: SEQ_DEBUG(6, printf("seq_write done: leftover buffer length %zd retval %d\n", - uio->uio_resid, retval)); + uio->uio_resid, retval)); mtx_unlock(&scp->seq_lock); return retval; } @@ -1141,8 +1155,9 @@ if (scp == NULL) return ENXIO; - SEQ_DEBUG(6, printf("seq_ioctl: unit %d, cmd %s.\n", - scp->unit, midi_cmdname(cmd, cmdtab_seqioctl))); + SEQ_DEBUG(6, + printf("seq_ioctl: unit %d, cmd %s.\n", scp->unit, + midi_cmdname(cmd, cmdtab_seqioctl))); ret = 0; @@ -1187,7 +1202,7 @@ goto timerevent; case SNDCTL_TMR_CONTINUE: event[1] = TMR_CONTINUE; -timerevent: + timerevent: event[0] = EV_TIMING; mtx_lock(&scp->seq_lock); if (!scp->music) { @@ -1295,8 +1310,8 @@ *(int *)arg = 0; else { /* - * TODO: count the numbder of devices that can WRITERAW - */ + * TODO: count the numbder of devices that can WRITERAW + */ *(int *)arg = scp->midi_number; } mtx_unlock(&scp->seq_lock); @@ -1372,8 +1387,8 @@ midiinfo->device = midiunit; midiinfo->capabilities = scp->midi_flags[midiunit]; /* - * TODO: What devtype? - */ + * TODO: What devtype? + */ midiinfo->dev_type = 0x01; ret = 0; } else @@ -1503,8 +1518,8 @@ int used; u_char dev, chn, note, vel; - out[0] = out[1] = out[2] = out[3] = out[4] = out[5] = out[6] = - out[7] = 0; + out[0] = out[1] = out[2] = out[3] = out[4] = out[5] = out[6] = out[7] = + 0; dev = 0; chn = event[1]; @@ -1566,21 +1581,21 @@ out[5] = vel; used += 4; break; -/* - out[0] = EV_TIMING; - out[1] = dev; - out[2] = MIDI_PGM_CHANGE; - out[3] = chn; - out[4] = note; - out[5] = vel; - SEQ_DEBUG(4,printf("seq_playevent: synctimer\n")); - break; -*/ + /* + out[0] = EV_TIMING; + out[1] = dev; + out[2] = MIDI_PGM_CHANGE; + out[3] = chn; + out[4] = note; + out[5] = vel; + SEQ_DEBUG(4,printf("seq_playevent: + synctimer\n")); break; + */ case SEQ_MIDIPUTC: SEQ_DEBUG(4, printf("seq_playevent: put data 0x%02x, unit %d.\n", - event[1], event[2])); + event[1], event[2])); /* * Pass through to the midi device. * device = event[2] @@ -1624,7 +1639,8 @@ */ case SEQ_CONTROLLER: /* - * SYNTH_CONTROLLER(md, event[3], event[4], *(short *)&event[5]) + * SYNTH_CONTROLLER(md, event[3], event[4], *(short + * *)&event[5]) */ case SEQ_VOLMODE: /* @@ -1633,7 +1649,8 @@ default: SEQ_DEBUG(2, printf("seq_convertold: SEQ_EXTENDED type %d" - "not handled\n", event[1])); + "not handled\n", + event[1])); break; } break; @@ -1644,8 +1661,9 @@ out[5] = event[3]; out[6] = event[4]; - SEQ_DEBUG(5, printf("SEQ_WAIT %d", - event[2] + (event[3] << 8) + (event[4] << 24))); + SEQ_DEBUG(5, + printf("SEQ_WAIT %d", + event[2] + (event[3] << 8) + (event[4] << 24))); used += 4; break; @@ -1655,8 +1673,9 @@ case SEQ_PRIVATE: default: SEQ_DEBUG(2, - printf("seq_convertold: event type %d not handled %d %d %d\n", - event[0], event[1], event[2], event[3])); + printf( + "seq_convertold: event type %d not handled %d %d %d\n", + event[0], event[1], event[2], event[3])); break; } return used; @@ -1674,15 +1693,14 @@ if (MIDIQ_AVAIL(scp->in_q) < len) { /* - * ENOROOM? EINPUTDROPPED? ETOUGHLUCK? - */ + * ENOROOM? EINPUTDROPPED? ETOUGHLUCK? + */ SEQ_DEBUG(2, printf("seq_copytoinput: queue full\n")); } else { MIDIQ_ENQ(scp->in_q, event, len); selwakeup(&scp->in_sel); cv_broadcast(&scp->in_cv); } - } static int @@ -1699,9 +1717,11 @@ mtx_assert(&scp->seq_lock, MA_OWNED); - SEQ_DEBUG(5, printf("seq_chnvoice: unit %d, dev %d, cmd %s," - " chn %d, note %d, parm %d.\n", scp->unit, event[1], - midi_cmdname(cmd, cmdtab_seqcv), chn, note, parm)); + SEQ_DEBUG(5, + printf("seq_chnvoice: unit %d, dev %d, cmd %s," + " chn %d, note %d, parm %d.\n", + scp->unit, event[1], midi_cmdname(cmd, cmdtab_seqcv), chn, note, + parm)); voice = SYNTH_ALLOC(md, chn, note); @@ -1750,8 +1770,9 @@ break; default: ret = 1; - SEQ_DEBUG(2, printf("seq_chnvoice event type %d not handled\n", - event[1])); + SEQ_DEBUG(2, + printf("seq_chnvoice event type %d not handled\n", + event[1])); break; } @@ -1772,26 +1793,29 @@ p1 = event[4]; w14 = *(u_short *)&event[6]; - SEQ_DEBUG(5, printf("seq_chncommon: unit %d, dev %d, cmd %s, chn %d," - " p1 %d, w14 %d.\n", scp->unit, event[1], - midi_cmdname(cmd, cmdtab_seqccmn), chn, p1, w14)); + SEQ_DEBUG(5, + printf("seq_chncommon: unit %d, dev %d, cmd %s, chn %d," + " p1 %d, w14 %d.\n", + scp->unit, event[1], midi_cmdname(cmd, cmdtab_seqccmn), chn, p1, + w14)); mtx_unlock(&scp->seq_lock); switch (cmd) { case MIDI_PGM_CHANGE: - SEQ_DEBUG(4, printf("seq_chncommon pgmchn chn %d pg %d\n", - chn, p1)); + SEQ_DEBUG(4, + printf("seq_chncommon pgmchn chn %d pg %d\n", chn, p1)); SYNTH_SETINSTR(md, chn, p1); break; case MIDI_CTL_CHANGE: - SEQ_DEBUG(4, printf("seq_chncommon ctlch chn %d pg %d %d\n", - chn, p1, w14)); + SEQ_DEBUG(4, + printf("seq_chncommon ctlch chn %d pg %d %d\n", chn, p1, + w14)); SYNTH_CONTROLLER(md, chn, p1, w14); break; case MIDI_PITCH_BEND: if (scp->music) { /* - * TODO: MIDI_PITCH_BEND - */ + * TODO: MIDI_PITCH_BEND + */ #if 0 mtx_lock(&md->synth.vc_mtx); md->synth.chn_info[chn].bender_value = w14; @@ -1828,7 +1852,7 @@ ret = 1; SEQ_DEBUG(2, printf("seq_chncommon event type %d not handled.\n", - event[1])); + event[1])); break; } mtx_lock(&scp->seq_lock); @@ -1842,11 +1866,12 @@ int ret; ret = 0; - param = event[4] + (event[5] << 8) + - (event[6] << 16) + (event[7] << 24); + param = event[4] + (event[5] << 8) + (event[6] << 16) + + (event[7] << 24); - SEQ_DEBUG(5, printf("seq_timing: unit %d, cmd %d, param %d.\n", - scp->unit, event[1], param)); + SEQ_DEBUG(5, + printf("seq_timing: unit %d, cmd %d, param %d.\n", scp->unit, + event[1], param)); switch (event[1]) { case TMR_WAIT_REL: timer_wait(scp, param, 0); @@ -1905,8 +1930,9 @@ #endif break; default: - SEQ_DEBUG(2, printf("seq_timing event type %d not handled.\n", - event[1])); + SEQ_DEBUG(2, + printf("seq_timing event type %d not handled.\n", + event[1])); ret = 1; break; } @@ -1921,12 +1947,12 @@ ret = 0; mtx_assert(&scp->seq_lock, MA_OWNED); - SEQ_DEBUG(5, printf("seq_local: unit %d, cmd %d\n", scp->unit, - event[1])); + SEQ_DEBUG(5, + printf("seq_local: unit %d, cmd %d\n", scp->unit, event[1])); switch (event[1]) { default: - SEQ_DEBUG(1, printf("seq_local event type %d not handled\n", - event[1])); + SEQ_DEBUG(1, + printf("seq_local event type %d not handled\n", event[1])); ret = 1; break; } @@ -1939,8 +1965,8 @@ int i, l; mtx_assert(&scp->seq_lock, MA_OWNED); - SEQ_DEBUG(5, printf("seq_sysex: unit %d device %d\n", scp->unit, - event[1])); + SEQ_DEBUG(5, + printf("seq_sysex: unit %d device %d\n", scp->unit, event[1])); l = 0; for (i = 0; i < 6 && event[i + 2] != 0xff; i++) l = i + 1; @@ -2027,14 +2053,14 @@ } rl = MIDIQ_LEN(scp->out_q); - i = cv_timedwait_sig(&scp->out_cv, - &scp->seq_lock, SEQ_SYNC_TIMEOUT * hz); + i = cv_timedwait_sig(&scp->out_cv, &scp->seq_lock, + SEQ_SYNC_TIMEOUT * hz); if (i == EINTR || i == ERESTART) { if (i == EINTR) { /* - * XXX: I don't know why we stop playing - */ + * XXX: I don't know why we stop playing + */ scp->playing = 0; cv_broadcast(&scp->out_cv); } @@ -2056,7 +2082,8 @@ * TODO: Consider if the raw devices need to be flushed */ - SEQ_DEBUG(1, printf("seq_sync queue stuck, aborting\n")); + SEQ_DEBUG(1, + printf("seq_sync queue stuck, aborting\n")); return i; } @@ -2089,7 +2116,7 @@ return 0; } -char * +char * midi_cmdname(int cmd, midi_cmdtab *tab) { while (tab->name != NULL) { Index: sys/dev/sound/pci/allegro_code.h =================================================================== --- sys/dev/sound/pci/allegro_code.h +++ sys/dev/sound/pci/allegro_code.h @@ -52,112 +52,955 @@ */ uint16_t gaw_kernel_vect_code[] = { - 0x7980, 0x0030, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x00FB, 0x7980, - 0x00DD, 0x7980, 0x03B4, 0x7980, 0x0332, 0x7980, 0x0287, 0x7980, 0x03B4, - 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x031A, 0x7980, - 0x03B4, 0x7980, 0x022F, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4, - 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x0063, 0x7980, 0x006B, 0x7980, - 0x03B4, 0x7980, 0x03B4, 0xBF80, 0x2C7C, 0x8806, 0x8804, 0xBE40, 0xBC20, - 0xAE09, 0x1000, 0xAE0A, 0x0001, 0x6938, 0xEB08, 0x0053, 0x695A, 0xEB08, - 0x00D6, 0x0009, 0x8B88, 0x6980, 0xE388, 0x0036, 0xBE30, 0xBC20, 0x6909, - 0xB801, 0x9009, 0xBE41, 0xBE41, 0x6928, 0xEB88, 0x0078, 0xBE41, 0xBE40, - 0x7980, 0x0038, 0xBE41, 0xBE41, 0x903A, 0x6938, 0xE308, 0x0056, 0x903A, - 0xBE41, 0xBE40, 0xEF00, 0x903A, 0x6939, 0xE308, 0x005E, 0x903A, 0xEF00, - 0x690B, 0x660C, 0xEF8C, 0x690A, 0x660C, 0x620B, 0x6609, 0xEF00, 0x6910, - 0x660F, 0xEF04, 0xE388, 0x0075, 0x690E, 0x660F, 0x6210, 0x660D, 0xEF00, - 0x690E, 0x660D, 0xEF00, 0xAE70, 0x0001, 0xBC20, 0xAE27, 0x0001, 0x6939, - 0xEB08, 0x005D, 0x6926, 0xB801, 0x9026, 0x0026, 0x8B88, 0x6980, 0xE388, - 0x00CB, 0x9028, 0x0D28, 0x4211, 0xE100, 0x007A, 0x4711, 0xE100, 0x00A0, - 0x7A80, 0x0063, 0xB811, 0x660A, 0x6209, 0xE304, 0x007A, 0x0C0B, 0x4005, - 0x100A, 0xBA01, 0x9012, 0x0C12, 0x4002, 0x7980, 0x00AF, 0x7A80, 0x006B, - 0xBE02, 0x620E, 0x660D, 0xBA10, 0xE344, 0x007A, 0x0C10, 0x4005, 0x100E, - 0xBA01, 0x9012, 0x0C12, 0x4002, 0x1003, 0xBA02, 0x9012, 0x0C12, 0x4000, - 0x1003, 0xE388, 0x00BA, 0x1004, 0x7980, 0x00BC, 0x1004, 0xBA01, 0x9012, - 0x0C12, 0x4001, 0x0C05, 0x4003, 0x0C06, 0x4004, 0x1011, 0xBFB0, 0x01FF, - 0x9012, 0x0C12, 0x4006, 0xBC20, 0xEF00, 0xAE26, 0x1028, 0x6970, 0xBFD0, - 0x0001, 0x9070, 0xE388, 0x007A, 0xAE28, 0x0000, 0xEF00, 0xAE70, 0x0300, - 0x0C70, 0xB00C, 0xAE5A, 0x0000, 0xEF00, 0x7A80, 0x038A, 0x697F, 0xB801, - 0x907F, 0x0056, 0x8B88, 0x0CA0, 0xB008, 0xAF71, 0xB000, 0x4E71, 0xE200, - 0x00F3, 0xAE56, 0x1057, 0x0056, 0x0CA0, 0xB008, 0x8056, 0x7980, 0x03A1, - 0x0810, 0xBFA0, 0x1059, 0xE304, 0x03A1, 0x8056, 0x7980, 0x03A1, 0x7A80, - 0x038A, 0xBF01, 0xBE43, 0xBE59, 0x907C, 0x6937, 0xE388, 0x010D, 0xBA01, - 0xE308, 0x010C, 0xAE71, 0x0004, 0x0C71, 0x5000, 0x6936, 0x9037, 0xBF0A, - 0x109E, 0x8B8A, 0xAF80, 0x8014, 0x4C80, 0xBF0A, 0x0560, 0xF500, 0xBF0A, - 0x0520, 0xB900, 0xBB17, 0x90A0, 0x6917, 0xE388, 0x0148, 0x0D17, 0xE100, - 0x0127, 0xBF0C, 0x0578, 0xBF0D, 0x057C, 0x7980, 0x012B, 0xBF0C, 0x0538, - 0xBF0D, 0x053C, 0x6900, 0xE308, 0x0135, 0x8B8C, 0xBE59, 0xBB07, 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+ 0x0061, + 0x8B88, + 0x6980, + 0xE388, + 0x024E, + 0x9071, + 0x0D71, + 0x000B, + 0xAFA0, + 0x8010, + 0xAFA0, + 0x8010, + 0x0810, + 0x660A, + 0xE308, + 0x0249, + 0x0009, + 0x0810, + 0x660C, + 0xE388, + 0x024E, + 0x800B, + 0xBC20, + 0x697B, + 0xE388, + 0x03A1, + 0xBF0A, + 0x109E, + 0x8B8A, + 0xAF80, + 0x8014, + 0x4C80, + 0xE100, + 0x0266, + 0x697C, + 0xBF90, + 0x0560, + 0x9072, + 0x0372, + 0x697C, + 0xBF90, + 0x0564, + 0x9073, + 0x0473, + 0x7980, + 0x0270, + 0x697C, + 0xBF90, + 0x0520, + 0x9072, + 0x0372, + 0x697C, + 0xBF90, + 0x0524, + 0x9073, + 0x0473, + 0x697C, + 0xB801, + 0x907C, + 0xBF0A, + 0x10FD, + 0x8B8A, + 0xAF80, + 0x8010, + 0x734F, + 0x548A, + 0xBE03, + 0x9880, + 0xBC21, + 0x7326, + 0x548B, + 0xBE03, + 0x618B, + 0x988C, + 0xBE03, + 0x6180, + 0x9880, + 0x7980, + 0x03A1, + 0x7A80, + 0x038A, + 0x0D28, + 0x4711, + 0xE100, + 0x02BE, + 0xAF12, + 0x4006, + 0x6912, + 0xBFB0, + 0x0C00, + 0xE388, + 0x02B6, + 0xBFA0, + 0x0800, + 0xE388, + 0x02B2, + 0x6912, + 0xBFB0, + 0x0C00, + 0xBFA0, + 0x0400, + 0xE388, + 0x02A3, + 0x6909, + 0x900B, + 0x7980, + 0x02A5, + 0xAF0B, + 0x4005, + 0x6901, + 0x9005, + 0x6902, + 0x9006, + 0x4311, + 0xE100, + 0x02ED, + 0x6911, + 0xBFC0, + 0x2000, + 0x9011, + 0x7980, + 0x02ED, + 0x6909, + 0x900B, + 0x7980, + 0x02B8, + 0xAF0B, + 0x4005, + 0xAF05, + 0x4003, + 0xAF06, + 0x4004, + 0x7980, + 0x02ED, + 0xAF12, + 0x4006, + 0x6912, + 0xBFB0, + 0x0C00, + 0xE388, + 0x02E7, + 0xBFA0, + 0x0800, + 0xE388, + 0x02E3, + 0x6912, + 0xBFB0, + 0x0C00, + 0xBFA0, + 0x0400, + 0xE388, + 0x02D4, + 0x690D, + 0x9010, + 0x7980, + 0x02D6, + 0xAF10, + 0x4005, + 0x6901, + 0x9005, + 0x6902, + 0x9006, + 0x4311, + 0xE100, + 0x02ED, + 0x6911, + 0xBFC0, + 0x2000, + 0x9011, + 0x7980, + 0x02ED, + 0x690D, + 0x9010, + 0x7980, + 0x02E9, + 0xAF10, + 0x4005, + 0xAF05, + 0x4003, + 0xAF06, + 0x4004, + 0xBC20, + 0x6970, + 0x9071, + 0x7A80, + 0x0078, + 0x6971, + 0x9070, + 0x7980, + 0x03A1, + 0xBC20, + 0x0361, + 0x8B8B, + 0x6980, + 0xEF88, + 0x0272, + 0x0372, + 0x7804, + 0x9071, + 0x0D71, + 0x8B8A, + 0x000B, + 0xB903, + 0x8809, + 0xBEC6, + 0x0309, + 0x69A8, + 0x90AB, + 0x69A8, + 0x90AA, + 0x0810, + 0x660A, + 0xE344, + 0x030F, + 0x0009, + 0x0810, + 0x660C, + 0xE388, + 0x0314, + 0x800B, + 0xBC20, + 0x6961, + 0xB801, + 0x9061, + 0x7980, + 0x02F7, + 0x7A80, + 0x038A, + 0x5D35, + 0x0001, + 0x6934, + 0xB801, + 0x9034, + 0xBF0A, + 0x109E, + 0x8B8A, + 0xAF80, + 0x8014, + 0x4880, + 0xAE72, + 0x0550, + 0xF500, + 0xAE72, + 0x0510, + 0xAE61, + 0x1051, + 0x7A80, + 0x02F6, + 0x7980, + 0x03A1, + 0x7A80, + 0x038A, + 0x5D35, + 0x0002, + 0x695E, + 0xB801, + 0x905E, + 0xBF0A, + 0x109E, + 0x8B8A, + 0xAF80, + 0x8014, + 0x4780, + 0xAE72, + 0x0558, + 0xF500, + 0xAE72, + 0x0518, + 0xAE61, + 0x105C, + 0x7A80, + 0x02F6, + 0x7980, + 0x03A1, + 0x001C, + 0x8B88, + 0x6980, + 0xEF88, + 0x901D, + 0x0D1D, + 0x100F, + 0x6610, + 0xE38C, + 0x0358, + 0x690E, + 0x6610, + 0x620F, + 0x660D, + 0xBA0F, + 0xE301, + 0x037A, + 0x0410, + 0x8B8A, + 0xB903, + 0x8809, + 0xBEC6, + 0x036C, + 0x6A8C, + 0x61AA, + 0x98AB, + 0x6A8C, + 0x61AB, + 0x98AD, + 0x6A8C, + 0x61AD, + 0x98A9, + 0x6A8C, + 0x61A9, + 0x98AA, + 0x7C04, + 0x8B8B, + 0x7C04, + 0x8B8D, + 0x7C04, + 0x8B89, + 0x7C04, + 0x0814, + 0x660E, + 0xE308, + 0x0379, + 0x040D, + 0x8410, + 0xBC21, + 0x691C, + 0xB801, + 0x901C, + 0x7980, + 0x034A, + 0xB903, + 0x8809, + 0x8B8A, + 0xBEC6, + 0x0388, + 0x54AC, + 0xBE03, + 0x618C, + 0x98AA, + 0xEF00, + 0xBC20, + 0xBE46, + 0x0809, + 0x906B, + 0x080A, + 0x906C, + 0x080B, + 0x906D, + 0x081A, + 0x9062, + 0x081B, + 0x9063, + 0x081E, + 0x9064, + 0xBE59, + 0x881E, + 0x8065, + 0x8166, + 0x8267, + 0x8368, + 0x8469, + 0x856A, + 0xEF00, + 0xBC20, + 0x696B, + 0x8809, + 0x696C, + 0x880A, + 0x696D, + 0x880B, + 0x6962, + 0x881A, + 0x6963, + 0x881B, + 0x6964, + 0x881E, + 0x0065, + 0x0166, + 0x0267, + 0x0368, + 0x0469, + 0x056A, + 0xBE3A, }; /* @@ -165,55 +1008,402 @@ */ uint16_t gaw_minisrc_code_0400[] = { - 0xBF80, 0x101E, 0x906E, 0x006E, 0x8B88, 0x6980, 0xEF88, 0x906F, 0x0D6F, - 0x6900, 0xEB08, 0x0412, 0xBC20, 0x696E, 0xB801, 0x906E, 0x7980, 0x0403, - 0xB90E, 0x8807, 0xBE43, 0xBF01, 0xBE47, 0xBE41, 0x7A80, 0x002A, 0xBE40, - 0x3029, 0xEFCC, 0xBE41, 0x7A80, 0x0028, 0xBE40, 0x3028, 0xEFCC, 0x6907, - 0xE308, 0x042A, 0x6909, 0x902C, 0x7980, 0x042C, 0x690D, 0x902C, 0x1009, - 0x881A, 0x100A, 0xBA01, 0x881B, 0x100D, 0x881C, 0x100E, 0xBA01, 0x881D, - 0xBF80, 0x00ED, 0x881E, 0x050C, 0x0124, 0xB904, 0x9027, 0x6918, 0xE308, - 0x04B3, 0x902D, 0x6913, 0xBFA0, 0x7598, 0xF704, 0xAE2D, 0x00FF, 0x8B8D, - 0x6919, 0xE308, 0x0463, 0x691A, 0xE308, 0x0456, 0xB907, 0x8809, 0xBEC6, - 0x0453, 0x10A9, 0x90AD, 0x7980, 0x047C, 0xB903, 0x8809, 0xBEC6, 0x0460, - 0x1889, 0x6C22, 0x90AD, 0x10A9, 0x6E23, 0x6C22, 0x90AD, 0x7980, 0x047C, - 0x101A, 0xE308, 0x046F, 0xB903, 0x8809, 0xBEC6, 0x046C, 0x10A9, 0x90A0, - 0x90AD, 0x7980, 0x047C, 0xB901, 0x8809, 0xBEC6, 0x047B, 0x1889, 0x6C22, - 0x90A0, 0x90AD, 0x10A9, 0x6E23, 0x6C22, 0x90A0, 0x90AD, 0x692D, 0xE308, - 0x049C, 0x0124, 0xB703, 0xB902, 0x8818, 0x8B89, 0x022C, 0x108A, 0x7C04, - 0x90A0, 0x692B, 0x881F, 0x7E80, 0x055B, 0x692A, 0x8809, 0x8B89, 0x99A0, - 0x108A, 0x90A0, 0x692B, 0x881F, 0x7E80, 0x055B, 0x692A, 0x8809, 0x8B89, - 0x99AF, 0x7B99, 0x0484, 0x0124, 0x060F, 0x101B, 0x2013, 0x901B, 0xBFA0, - 0x7FFF, 0xE344, 0x04AC, 0x901B, 0x8B89, 0x7A80, 0x051A, 0x6927, 0xBA01, - 0x9027, 0x7A80, 0x0523, 0x6927, 0xE308, 0x049E, 0x7980, 0x050F, 0x0624, - 0x1026, 0x2013, 0x9026, 0xBFA0, 0x7FFF, 0xE304, 0x04C0, 0x8B8D, 0x7A80, - 0x051A, 0x7980, 0x04B4, 0x9026, 0x1013, 0x3026, 0x901B, 0x8B8D, 0x7A80, - 0x051A, 0x7A80, 0x0523, 0x1027, 0xBA01, 0x9027, 0xE308, 0x04B4, 0x0124, - 0x060F, 0x8B89, 0x691A, 0xE308, 0x04EA, 0x6919, 0xE388, 0x04E0, 0xB903, - 0x8809, 0xBEC6, 0x04DD, 0x1FA0, 0x2FAE, 0x98A9, 0x7980, 0x050F, 0xB901, - 0x8818, 0xB907, 0x8809, 0xBEC6, 0x04E7, 0x10EE, 0x90A9, 0x7980, 0x050F, - 0x6919, 0xE308, 0x04FE, 0xB903, 0x8809, 0xBE46, 0xBEC6, 0x04FA, 0x17A0, - 0xBE1E, 0x1FAE, 0xBFBF, 0xFF00, 0xBE13, 0xBFDF, 0x8080, 0x99A9, 0xBE47, - 0x7980, 0x050F, 0xB901, 0x8809, 0xBEC6, 0x050E, 0x16A0, 0x26A0, 0xBFB7, - 0xFF00, 0xBE1E, 0x1EA0, 0x2EAE, 0xBFBF, 0xFF00, 0xBE13, 0xBFDF, 0x8080, - 0x99A9, 0x850C, 0x860F, 0x6907, 0xE388, 0x0516, 0x0D07, 0x8510, 0xBE59, - 0x881E, 0xBE4A, 0xEF00, 0x101E, 0x901C, 0x101F, 0x901D, 0x10A0, 0x901E, - 0x10A0, 0x901F, 0xEF00, 0x101E, 0x301C, 0x9020, 0x731B, 0x5420, 0xBE03, - 0x9825, 0x1025, 0x201C, 0x9025, 0x7325, 0x5414, 0xBE03, 0x8B8E, 0x9880, - 0x692F, 0xE388, 0x0539, 0xBE59, 0xBB07, 0x6180, 0x9880, 0x8BA0, 0x101F, - 0x301D, 0x9021, 0x731B, 0x5421, 0xBE03, 0x982E, 0x102E, 0x201D, 0x902E, - 0x732E, 0x5415, 0xBE03, 0x9880, 0x692F, 0xE388, 0x054F, 0xBE59, 0xBB07, - 0x6180, 0x9880, 0x8BA0, 0x6918, 0xEF08, 0x7325, 0x5416, 0xBE03, 0x98A0, - 0x732E, 0x5417, 0xBE03, 0x98A0, 0xEF00, 0x8BA0, 0xBEC6, 0x056B, 0xBE59, - 0xBB04, 0xAA90, 0xBE04, 0xBE1E, 0x99E0, 0x8BE0, 0x69A0, 0x90D0, 0x69A0, - 0x90D0, 0x081F, 0xB805, 0x881F, 0x8B90, 0x69A0, 0x90D0, 0x69A0, 0x9090, - 0x8BD0, 0x8BD8, 0xBE1F, 0xEF00, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0xBF80, + 0x101E, + 0x906E, + 0x006E, + 0x8B88, + 0x6980, + 0xEF88, + 0x906F, + 0x0D6F, + 0x6900, + 0xEB08, + 0x0412, + 0xBC20, + 0x696E, + 0xB801, + 0x906E, + 0x7980, + 0x0403, + 0xB90E, + 0x8807, + 0xBE43, + 0xBF01, + 0xBE47, + 0xBE41, + 0x7A80, + 0x002A, + 0xBE40, + 0x3029, + 0xEFCC, + 0xBE41, + 0x7A80, + 0x0028, + 0xBE40, + 0x3028, + 0xEFCC, + 0x6907, + 0xE308, + 0x042A, + 0x6909, + 0x902C, + 0x7980, + 0x042C, + 0x690D, + 0x902C, + 0x1009, + 0x881A, + 0x100A, + 0xBA01, + 0x881B, + 0x100D, + 0x881C, + 0x100E, + 0xBA01, + 0x881D, + 0xBF80, + 0x00ED, + 0x881E, + 0x050C, + 0x0124, + 0xB904, + 0x9027, + 0x6918, + 0xE308, + 0x04B3, + 0x902D, + 0x6913, + 0xBFA0, + 0x7598, + 0xF704, + 0xAE2D, + 0x00FF, + 0x8B8D, + 0x6919, + 0xE308, + 0x0463, + 0x691A, + 0xE308, + 0x0456, + 0xB907, + 0x8809, + 0xBEC6, + 0x0453, + 0x10A9, + 0x90AD, + 0x7980, + 0x047C, + 0xB903, + 0x8809, + 0xBEC6, + 0x0460, + 0x1889, + 0x6C22, + 0x90AD, + 0x10A9, + 0x6E23, + 0x6C22, + 0x90AD, + 0x7980, + 0x047C, + 0x101A, + 0xE308, + 0x046F, + 0xB903, + 0x8809, + 0xBEC6, + 0x046C, + 0x10A9, + 0x90A0, + 0x90AD, + 0x7980, + 0x047C, + 0xB901, + 0x8809, + 0xBEC6, + 0x047B, + 0x1889, + 0x6C22, + 0x90A0, + 0x90AD, + 0x10A9, + 0x6E23, + 0x6C22, + 0x90A0, + 0x90AD, + 0x692D, + 0xE308, + 0x049C, + 0x0124, + 0xB703, + 0xB902, + 0x8818, + 0x8B89, + 0x022C, + 0x108A, + 0x7C04, + 0x90A0, + 0x692B, + 0x881F, + 0x7E80, + 0x055B, + 0x692A, + 0x8809, + 0x8B89, + 0x99A0, + 0x108A, + 0x90A0, + 0x692B, + 0x881F, + 0x7E80, + 0x055B, + 0x692A, + 0x8809, + 0x8B89, + 0x99AF, + 0x7B99, + 0x0484, + 0x0124, + 0x060F, + 0x101B, + 0x2013, + 0x901B, + 0xBFA0, + 0x7FFF, + 0xE344, + 0x04AC, + 0x901B, + 0x8B89, + 0x7A80, + 0x051A, + 0x6927, + 0xBA01, + 0x9027, + 0x7A80, + 0x0523, + 0x6927, + 0xE308, + 0x049E, + 0x7980, + 0x050F, + 0x0624, + 0x1026, + 0x2013, + 0x9026, + 0xBFA0, + 0x7FFF, + 0xE304, + 0x04C0, + 0x8B8D, + 0x7A80, + 0x051A, + 0x7980, + 0x04B4, + 0x9026, + 0x1013, + 0x3026, + 0x901B, + 0x8B8D, + 0x7A80, + 0x051A, + 0x7A80, + 0x0523, + 0x1027, + 0xBA01, + 0x9027, + 0xE308, + 0x04B4, + 0x0124, + 0x060F, + 0x8B89, + 0x691A, + 0xE308, + 0x04EA, + 0x6919, + 0xE388, + 0x04E0, + 0xB903, + 0x8809, + 0xBEC6, + 0x04DD, + 0x1FA0, + 0x2FAE, + 0x98A9, + 0x7980, + 0x050F, + 0xB901, + 0x8818, + 0xB907, + 0x8809, + 0xBEC6, + 0x04E7, + 0x10EE, + 0x90A9, + 0x7980, + 0x050F, + 0x6919, + 0xE308, + 0x04FE, + 0xB903, + 0x8809, + 0xBE46, + 0xBEC6, + 0x04FA, + 0x17A0, + 0xBE1E, + 0x1FAE, + 0xBFBF, + 0xFF00, + 0xBE13, + 0xBFDF, + 0x8080, + 0x99A9, + 0xBE47, + 0x7980, + 0x050F, + 0xB901, + 0x8809, + 0xBEC6, + 0x050E, + 0x16A0, + 0x26A0, + 0xBFB7, + 0xFF00, + 0xBE1E, + 0x1EA0, + 0x2EAE, + 0xBFBF, + 0xFF00, + 0xBE13, + 0xBFDF, + 0x8080, + 0x99A9, + 0x850C, + 0x860F, + 0x6907, + 0xE388, + 0x0516, + 0x0D07, + 0x8510, + 0xBE59, + 0x881E, + 0xBE4A, + 0xEF00, + 0x101E, + 0x901C, + 0x101F, + 0x901D, + 0x10A0, + 0x901E, + 0x10A0, + 0x901F, + 0xEF00, + 0x101E, + 0x301C, + 0x9020, + 0x731B, + 0x5420, + 0xBE03, + 0x9825, + 0x1025, + 0x201C, + 0x9025, + 0x7325, + 0x5414, + 0xBE03, + 0x8B8E, + 0x9880, + 0x692F, + 0xE388, + 0x0539, + 0xBE59, + 0xBB07, + 0x6180, + 0x9880, + 0x8BA0, + 0x101F, + 0x301D, + 0x9021, + 0x731B, + 0x5421, + 0xBE03, + 0x982E, + 0x102E, + 0x201D, + 0x902E, + 0x732E, + 0x5415, + 0xBE03, + 0x9880, + 0x692F, + 0xE388, + 0x054F, + 0xBE59, + 0xBB07, + 0x6180, + 0x9880, + 0x8BA0, + 0x6918, + 0xEF08, + 0x7325, + 0x5416, + 0xBE03, + 0x98A0, + 0x732E, + 0x5417, + 0xBE03, + 0x98A0, + 0xEF00, + 0x8BA0, + 0xBEC6, + 0x056B, + 0xBE59, + 0xBB04, + 0xAA90, + 0xBE04, + 0xBE1E, + 0x99E0, + 0x8BE0, + 0x69A0, + 0x90D0, + 0x69A0, + 0x90D0, + 0x081F, + 0xB805, + 0x881F, + 0x8B90, + 0x69A0, + 0x90D0, + 0x69A0, + 0x9090, + 0x8BD0, + 0x8BD8, + 0xBE1F, + 0xEF00, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, + 0x0000, }; -uint16_t minisrc_lpf[10] = { - 0X0743, 0X1104, 0X0A4C, 0XF88D, 0X242C, - 0X1023, 0X1AA9, 0X0B60, 0XEFDD, 0X186F -}; +uint16_t minisrc_lpf[10] = { 0X0743, 0X1104, 0X0A4C, 0XF88D, 0X242C, 0X1023, + 0X1AA9, 0X0B60, 0XEFDD, 0X186F }; -#endif /* !_DEV_SOUND_PCI_ALLEGRO_CODE_H */ +#endif /* !_DEV_SOUND_PCI_ALLEGRO_CODE_H */ Index: sys/dev/sound/pci/allegro_reg.h =================================================================== --- sys/dev/sound/pci/allegro_reg.h +++ sys/dev/sound/pci/allegro_reg.h @@ -46,362 +46,364 @@ #define _DEV_SOUND_PCI_ALLEGRO_REG_H /* Allegro PCI configuration registers */ -#define PCI_LEGACY_AUDIO_CTRL 0x40 -#define SOUND_BLASTER_ENABLE 0x00000001 -#define FM_SYNTHESIS_ENABLE 0x00000002 -#define GAME_PORT_ENABLE 0x00000004 -#define MPU401_IO_ENABLE 0x00000008 -#define MPU401_IRQ_ENABLE 0x00000010 -#define ALIAS_10BIT_IO 0x00000020 -#define SB_DMA_MASK 0x000000C0 -#define SB_DMA_0 0x00000040 -#define SB_DMA_1 0x00000040 -#define SB_DMA_R 0x00000080 -#define SB_DMA_3 0x000000C0 -#define SB_IRQ_MASK 0x00000700 -#define SB_IRQ_5 0x00000000 -#define SB_IRQ_7 0x00000100 -#define SB_IRQ_9 0x00000200 -#define SB_IRQ_10 0x00000300 -#define MIDI_IRQ_MASK 0x00003800 -#define SERIAL_IRQ_ENABLE 0x00004000 -#define DISABLE_LEGACY 0x00008000 - -#define PCI_ALLEGRO_CONFIG 0x50 -#define SB_ADDR_240 0x00000004 -#define MPU_ADDR_MASK 0x00000018 -#define MPU_ADDR_330 0x00000000 -#define MPU_ADDR_300 0x00000008 -#define MPU_ADDR_320 0x00000010 -#define MPU_ADDR_340 0x00000018 -#define USE_PCI_TIMING 0x00000040 -#define POSTED_WRITE_ENABLE 0x00000080 -#define DMA_POLICY_MASK 0x00000700 -#define DMA_DDMA 0x00000000 -#define DMA_TDMA 0x00000100 -#define DMA_PCPCI 0x00000200 -#define DMA_WBDMA16 0x00000400 -#define DMA_WBDMA4 0x00000500 -#define DMA_WBDMA2 0x00000600 -#define DMA_WBDMA1 0x00000700 -#define DMA_SAFE_GUARD 0x00000800 -#define HI_PERF_GP_ENABLE 0x00001000 -#define PIC_SNOOP_MODE_0 0x00002000 -#define PIC_SNOOP_MODE_1 0x00004000 -#define SOUNDBLASTER_IRQ_MASK 0x00008000 -#define RING_IN_ENABLE 0x00010000 -#define SPDIF_TEST_MODE 0x00020000 -#define CLK_MULT_MODE_SELECT_2 0x00040000 -#define EEPROM_WRITE_ENABLE 0x00080000 -#define CODEC_DIR_IN 0x00100000 -#define HV_BUTTON_FROM_GD 0x00200000 -#define REDUCED_DEBOUNCE 0x00400000 -#define HV_CTRL_ENABLE 0x00800000 -#define SPDIF_ENABLE 0x01000000 -#define CLK_DIV_SELECT 0x06000000 -#define CLK_DIV_BY_48 0x00000000 -#define CLK_DIV_BY_49 0x02000000 -#define CLK_DIV_BY_50 0x04000000 -#define CLK_DIV_RESERVED 0x06000000 -#define PM_CTRL_ENABLE 0x08000000 -#define CLK_MULT_MODE_SELECT 0x30000000 -#define CLK_MULT_MODE_SHIFT 28 -#define CLK_MULT_MODE_0 0x00000000 -#define CLK_MULT_MODE_1 0x10000000 -#define CLK_MULT_MODE_2 0x20000000 -#define CLK_MULT_MODE_3 0x30000000 -#define INT_CLK_SELECT 0x40000000 -#define INT_CLK_MULT_RESET 0x80000000 +#define PCI_LEGACY_AUDIO_CTRL 0x40 +#define SOUND_BLASTER_ENABLE 0x00000001 +#define FM_SYNTHESIS_ENABLE 0x00000002 +#define GAME_PORT_ENABLE 0x00000004 +#define MPU401_IO_ENABLE 0x00000008 +#define MPU401_IRQ_ENABLE 0x00000010 +#define ALIAS_10BIT_IO 0x00000020 +#define SB_DMA_MASK 0x000000C0 +#define SB_DMA_0 0x00000040 +#define SB_DMA_1 0x00000040 +#define SB_DMA_R 0x00000080 +#define SB_DMA_3 0x000000C0 +#define SB_IRQ_MASK 0x00000700 +#define SB_IRQ_5 0x00000000 +#define SB_IRQ_7 0x00000100 +#define SB_IRQ_9 0x00000200 +#define SB_IRQ_10 0x00000300 +#define MIDI_IRQ_MASK 0x00003800 +#define SERIAL_IRQ_ENABLE 0x00004000 +#define DISABLE_LEGACY 0x00008000 + +#define PCI_ALLEGRO_CONFIG 0x50 +#define SB_ADDR_240 0x00000004 +#define MPU_ADDR_MASK 0x00000018 +#define MPU_ADDR_330 0x00000000 +#define MPU_ADDR_300 0x00000008 +#define MPU_ADDR_320 0x00000010 +#define MPU_ADDR_340 0x00000018 +#define USE_PCI_TIMING 0x00000040 +#define POSTED_WRITE_ENABLE 0x00000080 +#define DMA_POLICY_MASK 0x00000700 +#define DMA_DDMA 0x00000000 +#define DMA_TDMA 0x00000100 +#define DMA_PCPCI 0x00000200 +#define DMA_WBDMA16 0x00000400 +#define DMA_WBDMA4 0x00000500 +#define DMA_WBDMA2 0x00000600 +#define DMA_WBDMA1 0x00000700 +#define DMA_SAFE_GUARD 0x00000800 +#define HI_PERF_GP_ENABLE 0x00001000 +#define PIC_SNOOP_MODE_0 0x00002000 +#define PIC_SNOOP_MODE_1 0x00004000 +#define SOUNDBLASTER_IRQ_MASK 0x00008000 +#define RING_IN_ENABLE 0x00010000 +#define SPDIF_TEST_MODE 0x00020000 +#define CLK_MULT_MODE_SELECT_2 0x00040000 +#define EEPROM_WRITE_ENABLE 0x00080000 +#define CODEC_DIR_IN 0x00100000 +#define HV_BUTTON_FROM_GD 0x00200000 +#define REDUCED_DEBOUNCE 0x00400000 +#define HV_CTRL_ENABLE 0x00800000 +#define SPDIF_ENABLE 0x01000000 +#define CLK_DIV_SELECT 0x06000000 +#define CLK_DIV_BY_48 0x00000000 +#define CLK_DIV_BY_49 0x02000000 +#define CLK_DIV_BY_50 0x04000000 +#define CLK_DIV_RESERVED 0x06000000 +#define PM_CTRL_ENABLE 0x08000000 +#define CLK_MULT_MODE_SELECT 0x30000000 +#define CLK_MULT_MODE_SHIFT 28 +#define CLK_MULT_MODE_0 0x00000000 +#define CLK_MULT_MODE_1 0x10000000 +#define CLK_MULT_MODE_2 0x20000000 +#define CLK_MULT_MODE_3 0x30000000 +#define INT_CLK_SELECT 0x40000000 +#define INT_CLK_MULT_RESET 0x80000000 /* M3 */ -#define INT_CLK_SRC_NOT_PCI 0x00100000 -#define INT_CLK_MULT_ENABLE 0x80000000 - -#define PCI_ACPI_CONTROL 0x54 -#define PCI_ACPI_D0 0x00000000 -#define PCI_ACPI_D1 0xB4F70000 -#define PCI_ACPI_D2 0xB4F7B4F7 - -#define PCI_USER_CONFIG 0x58 -#define EXT_PCI_MASTER_ENABLE 0x00000001 -#define SPDIF_OUT_SELECT 0x00000002 -#define TEST_PIN_DIR_CTRL 0x00000004 -#define AC97_CODEC_TEST 0x00000020 -#define TRI_STATE_BUFFER 0x00000080 -#define IN_CLK_12MHZ_SELECT 0x00000100 -#define MULTI_FUNC_DISABLE 0x00000200 -#define EXT_MASTER_PAIR_SEL 0x00000400 -#define PCI_MASTER_SUPPORT 0x00000800 -#define STOP_CLOCK_ENABLE 0x00001000 -#define EAPD_DRIVE_ENABLE 0x00002000 -#define REQ_TRI_STATE_ENABLE 0x00004000 -#define REQ_LOW_ENABLE 0x00008000 -#define MIDI_1_ENABLE 0x00010000 -#define MIDI_2_ENABLE 0x00020000 -#define SB_AUDIO_SYNC 0x00040000 -#define HV_CTRL_TEST 0x00100000 -#define SOUNDBLASTER_TEST 0x00400000 - -#define PCI_USER_CONFIG_C 0x5C - -#define PCI_DDMA_CTRL 0x60 -#define DDMA_ENABLE 0x00000001 +#define INT_CLK_SRC_NOT_PCI 0x00100000 +#define INT_CLK_MULT_ENABLE 0x80000000 + +#define PCI_ACPI_CONTROL 0x54 +#define PCI_ACPI_D0 0x00000000 +#define PCI_ACPI_D1 0xB4F70000 +#define PCI_ACPI_D2 0xB4F7B4F7 + +#define PCI_USER_CONFIG 0x58 +#define EXT_PCI_MASTER_ENABLE 0x00000001 +#define SPDIF_OUT_SELECT 0x00000002 +#define TEST_PIN_DIR_CTRL 0x00000004 +#define AC97_CODEC_TEST 0x00000020 +#define TRI_STATE_BUFFER 0x00000080 +#define IN_CLK_12MHZ_SELECT 0x00000100 +#define MULTI_FUNC_DISABLE 0x00000200 +#define EXT_MASTER_PAIR_SEL 0x00000400 +#define PCI_MASTER_SUPPORT 0x00000800 +#define STOP_CLOCK_ENABLE 0x00001000 +#define EAPD_DRIVE_ENABLE 0x00002000 +#define REQ_TRI_STATE_ENABLE 0x00004000 +#define REQ_LOW_ENABLE 0x00008000 +#define MIDI_1_ENABLE 0x00010000 +#define MIDI_2_ENABLE 0x00020000 +#define SB_AUDIO_SYNC 0x00040000 +#define HV_CTRL_TEST 0x00100000 +#define SOUNDBLASTER_TEST 0x00400000 + +#define PCI_USER_CONFIG_C 0x5C + +#define PCI_DDMA_CTRL 0x60 +#define DDMA_ENABLE 0x00000001 /* Allegro registers */ -#define HOST_INT_CTRL 0x18 -#define SB_INT_ENABLE 0x0001 -#define MPU401_INT_ENABLE 0x0002 -#define ASSP_INT_ENABLE 0x0010 -#define RING_INT_ENABLE 0x0020 -#define HV_INT_ENABLE 0x0040 -#define CLKRUN_GEN_ENABLE 0x0100 -#define HV_CTRL_TO_PME 0x0400 -#define SOFTWARE_RESET_ENABLE 0x8000 - -#define HOST_INT_STATUS 0x1A -#define SB_INT_PENDING 0x01 -#define MPU401_INT_PENDING 0x02 -#define ASSP_INT_PENDING 0x10 -#define RING_INT_PENDING 0x20 -#define HV_INT_PENDING 0x40 - -#define HARDWARE_VOL_CTRL 0x1B -#define SHADOW_MIX_REG_VOICE 0x1C -#define HW_VOL_COUNTER_VOICE 0x1D -#define SHADOW_MIX_REG_MASTER 0x1E -#define HW_VOL_COUNTER_MASTER 0x1F - -#define CODEC_COMMAND 0x30 -#define CODEC_READ_B 0x80 - -#define CODEC_STATUS 0x30 -#define CODEC_BUSY_B 0x01 - -#define CODEC_DATA 0x32 +#define HOST_INT_CTRL 0x18 +#define SB_INT_ENABLE 0x0001 +#define MPU401_INT_ENABLE 0x0002 +#define ASSP_INT_ENABLE 0x0010 +#define RING_INT_ENABLE 0x0020 +#define HV_INT_ENABLE 0x0040 +#define CLKRUN_GEN_ENABLE 0x0100 +#define HV_CTRL_TO_PME 0x0400 +#define SOFTWARE_RESET_ENABLE 0x8000 + +#define HOST_INT_STATUS 0x1A +#define SB_INT_PENDING 0x01 +#define MPU401_INT_PENDING 0x02 +#define ASSP_INT_PENDING 0x10 +#define RING_INT_PENDING 0x20 +#define HV_INT_PENDING 0x40 + +#define HARDWARE_VOL_CTRL 0x1B +#define SHADOW_MIX_REG_VOICE 0x1C +#define HW_VOL_COUNTER_VOICE 0x1D +#define SHADOW_MIX_REG_MASTER 0x1E +#define HW_VOL_COUNTER_MASTER 0x1F + +#define CODEC_COMMAND 0x30 +#define CODEC_READ_B 0x80 + +#define CODEC_STATUS 0x30 +#define CODEC_BUSY_B 0x01 + +#define CODEC_DATA 0x32 /* AC97 registers */ #ifndef M3_MODEL -#define AC97_RESET 0x00 +#define AC97_RESET 0x00 #endif -#define AC97_VOL_MUTE_B 0x8000 -#define AC97_VOL_M 0x1F -#define AC97_LEFT_VOL_S 8 +#define AC97_VOL_MUTE_B 0x8000 +#define AC97_VOL_M 0x1F +#define AC97_LEFT_VOL_S 8 -#define AC97_MASTER_VOL 0x02 -#define AC97_LINE_LEVEL_VOL 0x04 -#define AC97_MASTER_MONO_VOL 0x06 -#define AC97_PC_BEEP_VOL 0x0A -#define AC97_PC_BEEP_VOL_M 0x0F -#define AC97_SROUND_MASTER_VOL 0x38 -#define AC97_PC_BEEP_VOL_S 1 +#define AC97_MASTER_VOL 0x02 +#define AC97_LINE_LEVEL_VOL 0x04 +#define AC97_MASTER_MONO_VOL 0x06 +#define AC97_PC_BEEP_VOL 0x0A +#define AC97_PC_BEEP_VOL_M 0x0F +#define AC97_SROUND_MASTER_VOL 0x38 +#define AC97_PC_BEEP_VOL_S 1 #ifndef M3_MODEL -#define AC97_PHONE_VOL 0x0C -#define AC97_MIC_VOL 0x0E +#define AC97_PHONE_VOL 0x0C +#define AC97_MIC_VOL 0x0E #endif -#define AC97_MIC_20DB_ENABLE 0x40 +#define AC97_MIC_20DB_ENABLE 0x40 #ifndef M3_MODEL -#define AC97_LINEIN_VOL 0x10 -#define AC97_CD_VOL 0x12 -#define AC97_VIDEO_VOL 0x14 -#define AC97_AUX_VOL 0x16 +#define AC97_LINEIN_VOL 0x10 +#define AC97_CD_VOL 0x12 +#define AC97_VIDEO_VOL 0x14 +#define AC97_AUX_VOL 0x16 #endif -#define AC97_PCM_OUT_VOL 0x18 +#define AC97_PCM_OUT_VOL 0x18 #ifndef M3_MODEL -#define AC97_RECORD_SELECT 0x1A +#define AC97_RECORD_SELECT 0x1A #endif -#define AC97_RECORD_MIC 0x00 -#define AC97_RECORD_CD 0x01 -#define AC97_RECORD_VIDEO 0x02 -#define AC97_RECORD_AUX 0x03 -#define AC97_RECORD_MONO_MUX 0x02 -#define AC97_RECORD_DIGITAL 0x03 -#define AC97_RECORD_LINE 0x04 -#define AC97_RECORD_STEREO 0x05 -#define AC97_RECORD_MONO 0x06 -#define AC97_RECORD_PHONE 0x07 +#define AC97_RECORD_MIC 0x00 +#define AC97_RECORD_CD 0x01 +#define AC97_RECORD_VIDEO 0x02 +#define AC97_RECORD_AUX 0x03 +#define AC97_RECORD_MONO_MUX 0x02 +#define AC97_RECORD_DIGITAL 0x03 +#define AC97_RECORD_LINE 0x04 +#define AC97_RECORD_STEREO 0x05 +#define AC97_RECORD_MONO 0x06 +#define AC97_RECORD_PHONE 0x07 #ifndef M3_MODEL -#define AC97_RECORD_GAIN 0x1C +#define AC97_RECORD_GAIN 0x1C #endif -#define AC97_RECORD_VOL_M 0x0F +#define AC97_RECORD_VOL_M 0x0F #ifndef M3_MODEL -#define AC97_GENERAL_PURPOSE 0x20 +#define AC97_GENERAL_PURPOSE 0x20 #endif -#define AC97_POWER_DOWN_CTRL 0x26 -#define AC97_ADC_READY 0x0001 -#define AC97_DAC_READY 0x0002 -#define AC97_ANALOG_READY 0x0004 -#define AC97_VREF_ON 0x0008 -#define AC97_PR0 0x0100 -#define AC97_PR1 0x0200 -#define AC97_PR2 0x0400 -#define AC97_PR3 0x0800 -#define AC97_PR4 0x1000 - -#define AC97_RESERVED1 0x28 - -#define AC97_VENDOR_TEST 0x5A - -#define AC97_CLOCK_DELAY 0x5C -#define AC97_LINEOUT_MUX_SEL 0x0001 -#define AC97_MONO_MUX_SEL 0x0002 -#define AC97_CLOCK_DELAY_SEL 0x1F -#define AC97_DAC_CDS_SHIFT 6 -#define AC97_ADC_CDS_SHIFT 11 - -#define AC97_MULTI_CHANNEL_SEL 0x74 +#define AC97_POWER_DOWN_CTRL 0x26 +#define AC97_ADC_READY 0x0001 +#define AC97_DAC_READY 0x0002 +#define AC97_ANALOG_READY 0x0004 +#define AC97_VREF_ON 0x0008 +#define AC97_PR0 0x0100 +#define AC97_PR1 0x0200 +#define AC97_PR2 0x0400 +#define AC97_PR3 0x0800 +#define AC97_PR4 0x1000 + +#define AC97_RESERVED1 0x28 + +#define AC97_VENDOR_TEST 0x5A + +#define AC97_CLOCK_DELAY 0x5C +#define AC97_LINEOUT_MUX_SEL 0x0001 +#define AC97_MONO_MUX_SEL 0x0002 +#define AC97_CLOCK_DELAY_SEL 0x1F +#define AC97_DAC_CDS_SHIFT 6 +#define AC97_ADC_CDS_SHIFT 11 + +#define AC97_MULTI_CHANNEL_SEL 0x74 #ifndef M3_MODEL -#define AC97_VENDOR_ID1 0x7C -#define AC97_VENDOR_ID2 0x7E +#define AC97_VENDOR_ID1 0x7C +#define AC97_VENDOR_ID2 0x7E #endif -#define RING_BUS_CTRL_A 0x36 -#define RAC_PME_ENABLE 0x0100 -#define RAC_SDFS_ENABLE 0x0200 -#define LAC_PME_ENABLE 0x0400 -#define LAC_SDFS_ENABLE 0x0800 -#define SERIAL_AC_LINK_ENABLE 0x1000 -#define IO_SRAM_ENABLE 0x2000 -#define IIS_INPUT_ENABLE 0x8000 - -#define RING_BUS_CTRL_B 0x38 -#define SECOND_CODEC_ID_MASK 0x0003 -#define SPDIF_FUNC_ENABLE 0x0010 -#define SECOND_AC_ENABLE 0x0020 -#define SB_MODULE_INTF_ENABLE 0x0040 -#define SSPE_ENABLE 0x0040 -#define M3I_DOCK_ENABLE 0x0080 - -#define SDO_OUT_DEST_CTRL 0x3A -#define COMMAND_ADDR_OUT 0x0003 -#define PCM_LR_OUT_LOCAL 0x0000 -#define PCM_LR_OUT_REMOTE 0x0004 -#define PCM_LR_OUT_MUTE 0x0008 -#define PCM_LR_OUT_BOTH 0x000C -#define LINE1_DAC_OUT_LOCAL 0x0000 -#define LINE1_DAC_OUT_REMOTE 0x0010 -#define LINE1_DAC_OUT_MUTE 0x0020 -#define LINE1_DAC_OUT_BOTH 0x0030 -#define PCM_CLS_OUT_LOCAL 0x0000 -#define PCM_CLS_OUT_REMOTE 0x0040 -#define PCM_CLS_OUT_MUTE 0x0080 -#define PCM_CLS_OUT_BOTH 0x00C0 -#define PCM_RLF_OUT_LOCAL 0x0000 -#define PCM_RLF_OUT_REMOTE 0x0100 -#define PCM_RLF_OUT_MUTE 0x0200 -#define PCM_RLF_OUT_BOTH 0x0300 -#define LINE2_DAC_OUT_LOCAL 0x0000 -#define LINE2_DAC_OUT_REMOTE 0x0400 -#define LINE2_DAC_OUT_MUTE 0x0800 -#define LINE2_DAC_OUT_BOTH 0x0C00 -#define HANDSET_OUT_LOCAL 0x0000 -#define HANDSET_OUT_REMOTE 0x1000 -#define HANDSET_OUT_MUTE 0x2000 -#define HANDSET_OUT_BOTH 0x3000 -#define IO_CTRL_OUT_LOCAL 0x0000 -#define IO_CTRL_OUT_REMOTE 0x4000 -#define IO_CTRL_OUT_MUTE 0x8000 -#define IO_CTRL_OUT_BOTH 0xC000 - -#define SDO_IN_DEST_CTRL 0x3C -#define STATUS_ADDR_IN 0x0003 -#define PCM_LR_IN_LOCAL 0x0000 -#define PCM_LR_IN_REMOTE 0x0004 -#define PCM_LR_RESERVED 0x0008 -#define PCM_LR_IN_BOTH 0x000C -#define LINE1_ADC_IN_LOCAL 0x0000 -#define LINE1_ADC_IN_REMOTE 0x0010 -#define LINE1_ADC_IN_MUTE 0x0020 -#define MIC_ADC_IN_LOCAL 0x0000 -#define MIC_ADC_IN_REMOTE 0x0040 -#define MIC_ADC_IN_MUTE 0x0080 -#define LINE2_DAC_IN_LOCAL 0x0000 -#define LINE2_DAC_IN_REMOTE 0x0400 -#define LINE2_DAC_IN_MUTE 0x0800 -#define HANDSET_IN_LOCAL 0x0000 -#define HANDSET_IN_REMOTE 0x1000 -#define HANDSET_IN_MUTE 0x2000 -#define IO_STATUS_IN_LOCAL 0x0000 -#define IO_STATUS_IN_REMOTE 0x4000 - -#define SPDIF_IN_CTRL 0x3E -#define SPDIF_IN_ENABLE 0x0001 - -#define GPIO_DATA 0x60 -#define GPIO_DATA_MASK 0x0FFF -#define GPIO_HV_STATUS 0x3000 -#define GPIO_PME_STATUS 0x4000 - -#define GPIO_MASK 0x64 -#define GPIO_DIRECTION 0x68 -#define GPO_PRIMARY_AC97 0x0001 -#define GPI_LINEOUT_SENSE 0x0004 -#define GPO_SECONDARY_AC97 0x0008 -#define GPI_VOL_DOWN 0x0010 -#define GPI_VOL_UP 0x0020 -#define GPI_IIS_CLK 0x0040 -#define GPI_IIS_LRCLK 0x0080 -#define GPI_IIS_DATA 0x0100 -#define GPI_DOCKING_STATUS 0x0100 -#define GPI_HEADPHONE_SENSE 0x0200 -#define GPO_EXT_AMP_SHUTDOWN 0x1000 +#define RING_BUS_CTRL_A 0x36 +#define RAC_PME_ENABLE 0x0100 +#define RAC_SDFS_ENABLE 0x0200 +#define LAC_PME_ENABLE 0x0400 +#define LAC_SDFS_ENABLE 0x0800 +#define SERIAL_AC_LINK_ENABLE 0x1000 +#define IO_SRAM_ENABLE 0x2000 +#define IIS_INPUT_ENABLE 0x8000 + +#define RING_BUS_CTRL_B 0x38 +#define SECOND_CODEC_ID_MASK 0x0003 +#define SPDIF_FUNC_ENABLE 0x0010 +#define SECOND_AC_ENABLE 0x0020 +#define SB_MODULE_INTF_ENABLE 0x0040 +#define SSPE_ENABLE 0x0040 +#define M3I_DOCK_ENABLE 0x0080 + +#define SDO_OUT_DEST_CTRL 0x3A +#define COMMAND_ADDR_OUT 0x0003 +#define PCM_LR_OUT_LOCAL 0x0000 +#define PCM_LR_OUT_REMOTE 0x0004 +#define PCM_LR_OUT_MUTE 0x0008 +#define PCM_LR_OUT_BOTH 0x000C +#define LINE1_DAC_OUT_LOCAL 0x0000 +#define LINE1_DAC_OUT_REMOTE 0x0010 +#define LINE1_DAC_OUT_MUTE 0x0020 +#define LINE1_DAC_OUT_BOTH 0x0030 +#define PCM_CLS_OUT_LOCAL 0x0000 +#define PCM_CLS_OUT_REMOTE 0x0040 +#define PCM_CLS_OUT_MUTE 0x0080 +#define PCM_CLS_OUT_BOTH 0x00C0 +#define PCM_RLF_OUT_LOCAL 0x0000 +#define PCM_RLF_OUT_REMOTE 0x0100 +#define PCM_RLF_OUT_MUTE 0x0200 +#define PCM_RLF_OUT_BOTH 0x0300 +#define LINE2_DAC_OUT_LOCAL 0x0000 +#define LINE2_DAC_OUT_REMOTE 0x0400 +#define LINE2_DAC_OUT_MUTE 0x0800 +#define LINE2_DAC_OUT_BOTH 0x0C00 +#define HANDSET_OUT_LOCAL 0x0000 +#define HANDSET_OUT_REMOTE 0x1000 +#define HANDSET_OUT_MUTE 0x2000 +#define HANDSET_OUT_BOTH 0x3000 +#define IO_CTRL_OUT_LOCAL 0x0000 +#define IO_CTRL_OUT_REMOTE 0x4000 +#define IO_CTRL_OUT_MUTE 0x8000 +#define IO_CTRL_OUT_BOTH 0xC000 + +#define SDO_IN_DEST_CTRL 0x3C +#define STATUS_ADDR_IN 0x0003 +#define PCM_LR_IN_LOCAL 0x0000 +#define PCM_LR_IN_REMOTE 0x0004 +#define PCM_LR_RESERVED 0x0008 +#define PCM_LR_IN_BOTH 0x000C +#define LINE1_ADC_IN_LOCAL 0x0000 +#define LINE1_ADC_IN_REMOTE 0x0010 +#define LINE1_ADC_IN_MUTE 0x0020 +#define MIC_ADC_IN_LOCAL 0x0000 +#define MIC_ADC_IN_REMOTE 0x0040 +#define MIC_ADC_IN_MUTE 0x0080 +#define LINE2_DAC_IN_LOCAL 0x0000 +#define LINE2_DAC_IN_REMOTE 0x0400 +#define LINE2_DAC_IN_MUTE 0x0800 +#define HANDSET_IN_LOCAL 0x0000 +#define HANDSET_IN_REMOTE 0x1000 +#define HANDSET_IN_MUTE 0x2000 +#define IO_STATUS_IN_LOCAL 0x0000 +#define IO_STATUS_IN_REMOTE 0x4000 + +#define SPDIF_IN_CTRL 0x3E +#define SPDIF_IN_ENABLE 0x0001 + +#define GPIO_DATA 0x60 +#define GPIO_DATA_MASK 0x0FFF +#define GPIO_HV_STATUS 0x3000 +#define GPIO_PME_STATUS 0x4000 + +#define GPIO_MASK 0x64 +#define GPIO_DIRECTION 0x68 +#define GPO_PRIMARY_AC97 0x0001 +#define GPI_LINEOUT_SENSE 0x0004 +#define GPO_SECONDARY_AC97 0x0008 +#define GPI_VOL_DOWN 0x0010 +#define GPI_VOL_UP 0x0020 +#define GPI_IIS_CLK 0x0040 +#define GPI_IIS_LRCLK 0x0080 +#define GPI_IIS_DATA 0x0100 +#define GPI_DOCKING_STATUS 0x0100 +#define GPI_HEADPHONE_SENSE 0x0200 +#define GPO_EXT_AMP_SHUTDOWN 0x1000 /* M3 */ -#define GPO_M3_EXT_AMP_SHUTDN 0x0002 - -#define ASSP_INDEX_PORT 0x80 -#define ASSP_MEMORY_PORT 0x82 -#define ASSP_DATA_PORT 0x84 - -#define MPU401_DATA_PORT 0x98 -#define MPU401_STATUS_PORT 0x99 - -#define CLK_MULT_DATA_PORT 0x9C - -#define ASSP_CONTROL_A 0xA2 -#define ASSP_0_WS_ENABLE 0x01 -#define ASSP_CTRL_A_RESERVED1 0x02 -#define ASSP_CTRL_A_RESERVED2 0x04 -#define ASSP_CLK_49MHZ_SELECT 0x08 -#define FAST_PLU_ENABLE 0x10 -#define ASSP_CTRL_A_RESERVED3 0x20 -#define DSP_CLK_36MHZ_SELECT 0x40 - -#define ASSP_CONTROL_B 0xA4 -#define RESET_ASSP 0x00 -#define RUN_ASSP 0x01 -#define ENABLE_ASSP_CLOCK 0x00 -#define STOP_ASSP_CLOCK 0x10 -#define RESET_TOGGLE 0x40 - -#define ASSP_CONTROL_C 0xA6 -#define ASSP_HOST_INT_ENABLE 0x01 -#define FM_ADDR_REMAP_DISABLE 0x02 -#define HOST_WRITE_PORT_ENABLE 0x08 - -#define ASSP_HOST_INT_STATUS 0xAC -#define DSP2HOST_REQ_PIORECORD 0x01 -#define DSP2HOST_REQ_I2SRATE 0x02 -#define DSP2HOST_REQ_TIMER 0x04 +#define GPO_M3_EXT_AMP_SHUTDN 0x0002 + +#define ASSP_INDEX_PORT 0x80 +#define ASSP_MEMORY_PORT 0x82 +#define ASSP_DATA_PORT 0x84 + +#define MPU401_DATA_PORT 0x98 +#define MPU401_STATUS_PORT 0x99 + +#define CLK_MULT_DATA_PORT 0x9C + +#define ASSP_CONTROL_A 0xA2 +#define ASSP_0_WS_ENABLE 0x01 +#define ASSP_CTRL_A_RESERVED1 0x02 +#define ASSP_CTRL_A_RESERVED2 0x04 +#define ASSP_CLK_49MHZ_SELECT 0x08 +#define FAST_PLU_ENABLE 0x10 +#define ASSP_CTRL_A_RESERVED3 0x20 +#define DSP_CLK_36MHZ_SELECT 0x40 + +#define ASSP_CONTROL_B 0xA4 +#define RESET_ASSP 0x00 +#define RUN_ASSP 0x01 +#define ENABLE_ASSP_CLOCK 0x00 +#define STOP_ASSP_CLOCK 0x10 +#define RESET_TOGGLE 0x40 + +#define ASSP_CONTROL_C 0xA6 +#define ASSP_HOST_INT_ENABLE 0x01 +#define FM_ADDR_REMAP_DISABLE 0x02 +#define HOST_WRITE_PORT_ENABLE 0x08 + +#define ASSP_HOST_INT_STATUS 0xAC +#define DSP2HOST_REQ_PIORECORD 0x01 +#define DSP2HOST_REQ_I2SRATE 0x02 +#define DSP2HOST_REQ_TIMER 0x04 /* * DSP memory map */ -#define REV_A_CODE_MEMORY_BEGIN 0x0000 -#define REV_A_CODE_MEMORY_END 0x0FFF -#define REV_A_CODE_MEMORY_UNIT_LENGTH 0x0040 -#define REV_A_CODE_MEMORY_LENGTH (REV_A_CODE_MEMORY_END - REV_A_CODE_MEMORY_BEGIN + 1) +#define REV_A_CODE_MEMORY_BEGIN 0x0000 +#define REV_A_CODE_MEMORY_END 0x0FFF +#define REV_A_CODE_MEMORY_UNIT_LENGTH 0x0040 +#define REV_A_CODE_MEMORY_LENGTH \ + (REV_A_CODE_MEMORY_END - REV_A_CODE_MEMORY_BEGIN + 1) -#define REV_B_CODE_MEMORY_BEGIN 0x0000 -#define REV_B_CODE_MEMORY_END 0x0BFF -#define REV_B_CODE_MEMORY_UNIT_LENGTH 0x0040 -#define REV_B_CODE_MEMORY_LENGTH (REV_B_CODE_MEMORY_END - REV_B_CODE_MEMORY_BEGIN + 1) +#define REV_B_CODE_MEMORY_BEGIN 0x0000 +#define REV_B_CODE_MEMORY_END 0x0BFF +#define REV_B_CODE_MEMORY_UNIT_LENGTH 0x0040 +#define REV_B_CODE_MEMORY_LENGTH \ + (REV_B_CODE_MEMORY_END - REV_B_CODE_MEMORY_BEGIN + 1) #if (REV_A_CODE_MEMORY_LENGTH % REV_A_CODE_MEMORY_UNIT_LENGTH) #error Assumption about code memory unit length failed. @@ -410,16 +412,18 @@ #error Assumption about code memory unit length failed. #endif -#define REV_A_DATA_MEMORY_BEGIN 0x1000 -#define REV_A_DATA_MEMORY_END 0x2FFF -#define REV_A_DATA_MEMORY_UNIT_LENGTH 0x0080 -#define REV_A_DATA_MEMORY_LENGTH (REV_A_DATA_MEMORY_END - REV_A_DATA_MEMORY_BEGIN + 1) +#define REV_A_DATA_MEMORY_BEGIN 0x1000 +#define REV_A_DATA_MEMORY_END 0x2FFF +#define REV_A_DATA_MEMORY_UNIT_LENGTH 0x0080 +#define REV_A_DATA_MEMORY_LENGTH \ + (REV_A_DATA_MEMORY_END - REV_A_DATA_MEMORY_BEGIN + 1) -#define REV_B_DATA_MEMORY_BEGIN 0x1000 +#define REV_B_DATA_MEMORY_BEGIN 0x1000 /*#define REV_B_DATA_MEMORY_END 0x23FF */ -#define REV_B_DATA_MEMORY_END 0x2BFF -#define REV_B_DATA_MEMORY_UNIT_LENGTH 0x0080 -#define REV_B_DATA_MEMORY_LENGTH (REV_B_DATA_MEMORY_END - REV_B_DATA_MEMORY_BEGIN + 1) +#define REV_B_DATA_MEMORY_END 0x2BFF +#define REV_B_DATA_MEMORY_UNIT_LENGTH 0x0080 +#define REV_B_DATA_MEMORY_LENGTH \ + (REV_B_DATA_MEMORY_END - REV_B_DATA_MEMORY_BEGIN + 1) #if (REV_A_DATA_MEMORY_LENGTH % REV_A_DATA_MEMORY_UNIT_LENGTH) #error Assumption about data memory unit length failed. @@ -428,19 +432,23 @@ #error Assumption about data memory unit length failed. #endif -#define CODE_MEMORY_MAP_LENGTH (64 + 1) -#define DATA_MEMORY_MAP_LENGTH (64 + 1) +#define CODE_MEMORY_MAP_LENGTH (64 + 1) +#define DATA_MEMORY_MAP_LENGTH (64 + 1) -#if (CODE_MEMORY_MAP_LENGTH < ((REV_A_CODE_MEMORY_LENGTH / REV_A_CODE_MEMORY_UNIT_LENGTH) + 1)) +#if (CODE_MEMORY_MAP_LENGTH < \ + ((REV_A_CODE_MEMORY_LENGTH / REV_A_CODE_MEMORY_UNIT_LENGTH) + 1)) #error Code memory map length too short. #endif -#if (DATA_MEMORY_MAP_LENGTH < ((REV_A_DATA_MEMORY_LENGTH / REV_A_DATA_MEMORY_UNIT_LENGTH) + 1)) +#if (DATA_MEMORY_MAP_LENGTH < \ + ((REV_A_DATA_MEMORY_LENGTH / REV_A_DATA_MEMORY_UNIT_LENGTH) + 1)) #error Data memory map length too short. #endif -#if (CODE_MEMORY_MAP_LENGTH < ((REV_B_CODE_MEMORY_LENGTH / REV_B_CODE_MEMORY_UNIT_LENGTH) + 1)) +#if (CODE_MEMORY_MAP_LENGTH < \ + ((REV_B_CODE_MEMORY_LENGTH / REV_B_CODE_MEMORY_UNIT_LENGTH) + 1)) #error Code memory map length too short. #endif -#if (DATA_MEMORY_MAP_LENGTH < ((REV_B_DATA_MEMORY_LENGTH / REV_B_DATA_MEMORY_UNIT_LENGTH) + 1)) +#if (DATA_MEMORY_MAP_LENGTH < \ + ((REV_B_DATA_MEMORY_LENGTH / REV_B_DATA_MEMORY_UNIT_LENGTH) + 1)) #error Data memory map length too short. #endif @@ -448,173 +456,173 @@ * Kernel code memory definition */ -#define KCODE_VECTORS_BEGIN 0x0000 -#define KCODE_VECTORS_END 0x002F -#define KCODE_VECTORS_UNIT_LENGTH 0x0002 -#define KCODE_VECTORS_LENGTH (KCODE_VECTORS_END - KCODE_VECTORS_BEGIN + 1) +#define KCODE_VECTORS_BEGIN 0x0000 +#define KCODE_VECTORS_END 0x002F +#define KCODE_VECTORS_UNIT_LENGTH 0x0002 +#define KCODE_VECTORS_LENGTH (KCODE_VECTORS_END - KCODE_VECTORS_BEGIN + 1) /* * Kernel data memory definition */ -#define KDATA_BASE_ADDR 0x1000 -#define KDATA_BASE_ADDR2 0x1080 - -#define KDATA_TASK0 (KDATA_BASE_ADDR + 0x0000) -#define KDATA_TASK1 (KDATA_BASE_ADDR + 0x0001) -#define KDATA_TASK2 (KDATA_BASE_ADDR + 0x0002) -#define KDATA_TASK3 (KDATA_BASE_ADDR + 0x0003) -#define KDATA_TASK4 (KDATA_BASE_ADDR + 0x0004) -#define KDATA_TASK5 (KDATA_BASE_ADDR + 0x0005) -#define KDATA_TASK6 (KDATA_BASE_ADDR + 0x0006) -#define KDATA_TASK7 (KDATA_BASE_ADDR + 0x0007) -#define KDATA_TASK_ENDMARK (KDATA_BASE_ADDR + 0x0008) - -#define KDATA_CURRENT_TASK (KDATA_BASE_ADDR + 0x0009) -#define KDATA_TASK_SWITCH (KDATA_BASE_ADDR + 0x000A) - -#define KDATA_INSTANCE0_POS3D (KDATA_BASE_ADDR + 0x000B) -#define KDATA_INSTANCE1_POS3D (KDATA_BASE_ADDR + 0x000C) -#define KDATA_INSTANCE2_POS3D (KDATA_BASE_ADDR + 0x000D) -#define KDATA_INSTANCE3_POS3D (KDATA_BASE_ADDR + 0x000E) -#define KDATA_INSTANCE4_POS3D (KDATA_BASE_ADDR + 0x000F) -#define KDATA_INSTANCE5_POS3D (KDATA_BASE_ADDR + 0x0010) -#define KDATA_INSTANCE6_POS3D (KDATA_BASE_ADDR + 0x0011) -#define KDATA_INSTANCE7_POS3D (KDATA_BASE_ADDR + 0x0012) -#define KDATA_INSTANCE8_POS3D (KDATA_BASE_ADDR + 0x0013) -#define KDATA_INSTANCE_POS3D_ENDMARK (KDATA_BASE_ADDR + 0x0014) - -#define KDATA_INSTANCE0_SPKVIRT (KDATA_BASE_ADDR + 0x0015) -#define KDATA_INSTANCE_SPKVIRT_ENDMARK (KDATA_BASE_ADDR + 0x0016) - -#define KDATA_INSTANCE0_SPDIF (KDATA_BASE_ADDR + 0x0017) -#define KDATA_INSTANCE_SPDIF_ENDMARK (KDATA_BASE_ADDR + 0x0018) - -#define KDATA_INSTANCE0_MODEM (KDATA_BASE_ADDR + 0x0019) -#define KDATA_INSTANCE_MODEM_ENDMARK (KDATA_BASE_ADDR + 0x001A) - -#define KDATA_INSTANCE0_SRC (KDATA_BASE_ADDR + 0x001B) -#define KDATA_INSTANCE1_SRC (KDATA_BASE_ADDR + 0x001C) -#define KDATA_INSTANCE_SRC_ENDMARK (KDATA_BASE_ADDR + 0x001D) - -#define KDATA_INSTANCE0_MINISRC (KDATA_BASE_ADDR + 0x001E) -#define KDATA_INSTANCE1_MINISRC (KDATA_BASE_ADDR + 0x001F) -#define KDATA_INSTANCE2_MINISRC (KDATA_BASE_ADDR + 0x0020) -#define KDATA_INSTANCE3_MINISRC (KDATA_BASE_ADDR + 0x0021) -#define KDATA_INSTANCE_MINISRC_ENDMARK (KDATA_BASE_ADDR + 0x0022) - -#define KDATA_INSTANCE0_CPYTHRU (KDATA_BASE_ADDR + 0x0023) -#define KDATA_INSTANCE1_CPYTHRU (KDATA_BASE_ADDR + 0x0024) -#define KDATA_INSTANCE_CPYTHRU_ENDMARK (KDATA_BASE_ADDR + 0x0025) - -#define KDATA_CURRENT_DMA (KDATA_BASE_ADDR + 0x0026) -#define KDATA_DMA_SWITCH (KDATA_BASE_ADDR + 0x0027) -#define KDATA_DMA_ACTIVE (KDATA_BASE_ADDR + 0x0028) - -#define KDATA_DMA_XFER0 (KDATA_BASE_ADDR + 0x0029) -#define KDATA_DMA_XFER1 (KDATA_BASE_ADDR + 0x002A) -#define KDATA_DMA_XFER2 (KDATA_BASE_ADDR + 0x002B) -#define KDATA_DMA_XFER3 (KDATA_BASE_ADDR + 0x002C) -#define KDATA_DMA_XFER4 (KDATA_BASE_ADDR + 0x002D) -#define KDATA_DMA_XFER5 (KDATA_BASE_ADDR + 0x002E) -#define KDATA_DMA_XFER6 (KDATA_BASE_ADDR + 0x002F) -#define KDATA_DMA_XFER7 (KDATA_BASE_ADDR + 0x0030) -#define KDATA_DMA_XFER8 (KDATA_BASE_ADDR + 0x0031) -#define KDATA_DMA_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0032) - -#define KDATA_I2S_SAMPLE_COUNT (KDATA_BASE_ADDR + 0x0033) -#define KDATA_I2S_INT_METER (KDATA_BASE_ADDR + 0x0034) -#define KDATA_I2S_ACTIVE (KDATA_BASE_ADDR + 0x0035) - -#define KDATA_TIMER_COUNT_RELOAD (KDATA_BASE_ADDR + 0x0036) -#define KDATA_TIMER_COUNT_CURRENT (KDATA_BASE_ADDR + 0x0037) - -#define KDATA_HALT_SYNCH_CLIENT (KDATA_BASE_ADDR + 0x0038) -#define KDATA_HALT_SYNCH_DMA (KDATA_BASE_ADDR + 0x0039) -#define KDATA_HALT_ACKNOWLEDGE (KDATA_BASE_ADDR + 0x003A) - -#define KDATA_ADC1_XFER0 (KDATA_BASE_ADDR + 0x003B) -#define KDATA_ADC1_XFER_ENDMARK (KDATA_BASE_ADDR + 0x003C) -#define KDATA_ADC1_LEFT_VOLUME (KDATA_BASE_ADDR + 0x003D) -#define KDATA_ADC1_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x003E) -#define KDATA_ADC1_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x003F) -#define KDATA_ADC1_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x0040) - -#define KDATA_ADC2_XFER0 (KDATA_BASE_ADDR + 0x0041) -#define KDATA_ADC2_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0042) -#define KDATA_ADC2_LEFT_VOLUME (KDATA_BASE_ADDR + 0x0043) -#define KDATA_ADC2_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x0044) -#define KDATA_ADC2_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x0045) -#define KDATA_ADC2_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x0046) - -#define KDATA_CD_XFER0 (KDATA_BASE_ADDR + 0x0047) -#define KDATA_CD_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0048) -#define KDATA_CD_LEFT_VOLUME (KDATA_BASE_ADDR + 0x0049) -#define KDATA_CD_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x004A) -#define KDATA_CD_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x004B) -#define KDATA_CD_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x004C) - -#define KDATA_MIC_XFER0 (KDATA_BASE_ADDR + 0x004D) -#define KDATA_MIC_XFER_ENDMARK (KDATA_BASE_ADDR + 0x004E) -#define KDATA_MIC_VOLUME (KDATA_BASE_ADDR + 0x004F) -#define KDATA_MIC_SUR_VOL (KDATA_BASE_ADDR + 0x0050) - -#define KDATA_I2S_XFER0 (KDATA_BASE_ADDR + 0x0051) -#define KDATA_I2S_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0052) - -#define KDATA_CHI_XFER0 (KDATA_BASE_ADDR + 0x0053) -#define KDATA_CHI_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0054) - -#define KDATA_SPDIF_XFER (KDATA_BASE_ADDR + 0x0055) -#define KDATA_SPDIF_CURRENT_FRAME (KDATA_BASE_ADDR + 0x0056) -#define KDATA_SPDIF_FRAME0 (KDATA_BASE_ADDR + 0x0057) -#define KDATA_SPDIF_FRAME1 (KDATA_BASE_ADDR + 0x0058) -#define KDATA_SPDIF_FRAME2 (KDATA_BASE_ADDR + 0x0059) - -#define KDATA_SPDIF_REQUEST (KDATA_BASE_ADDR + 0x005A) -#define KDATA_SPDIF_TEMP (KDATA_BASE_ADDR + 0x005B) +#define KDATA_BASE_ADDR 0x1000 +#define KDATA_BASE_ADDR2 0x1080 + +#define KDATA_TASK0 (KDATA_BASE_ADDR + 0x0000) +#define KDATA_TASK1 (KDATA_BASE_ADDR + 0x0001) +#define KDATA_TASK2 (KDATA_BASE_ADDR + 0x0002) +#define KDATA_TASK3 (KDATA_BASE_ADDR + 0x0003) +#define KDATA_TASK4 (KDATA_BASE_ADDR + 0x0004) +#define KDATA_TASK5 (KDATA_BASE_ADDR + 0x0005) +#define KDATA_TASK6 (KDATA_BASE_ADDR + 0x0006) +#define KDATA_TASK7 (KDATA_BASE_ADDR + 0x0007) +#define KDATA_TASK_ENDMARK (KDATA_BASE_ADDR + 0x0008) + +#define KDATA_CURRENT_TASK (KDATA_BASE_ADDR + 0x0009) +#define KDATA_TASK_SWITCH (KDATA_BASE_ADDR + 0x000A) + +#define KDATA_INSTANCE0_POS3D (KDATA_BASE_ADDR + 0x000B) +#define KDATA_INSTANCE1_POS3D (KDATA_BASE_ADDR + 0x000C) +#define KDATA_INSTANCE2_POS3D (KDATA_BASE_ADDR + 0x000D) +#define KDATA_INSTANCE3_POS3D (KDATA_BASE_ADDR + 0x000E) +#define KDATA_INSTANCE4_POS3D (KDATA_BASE_ADDR + 0x000F) +#define KDATA_INSTANCE5_POS3D (KDATA_BASE_ADDR + 0x0010) +#define KDATA_INSTANCE6_POS3D (KDATA_BASE_ADDR + 0x0011) +#define KDATA_INSTANCE7_POS3D (KDATA_BASE_ADDR + 0x0012) +#define KDATA_INSTANCE8_POS3D (KDATA_BASE_ADDR + 0x0013) +#define KDATA_INSTANCE_POS3D_ENDMARK (KDATA_BASE_ADDR + 0x0014) + +#define KDATA_INSTANCE0_SPKVIRT (KDATA_BASE_ADDR + 0x0015) +#define KDATA_INSTANCE_SPKVIRT_ENDMARK (KDATA_BASE_ADDR + 0x0016) + +#define KDATA_INSTANCE0_SPDIF (KDATA_BASE_ADDR + 0x0017) +#define KDATA_INSTANCE_SPDIF_ENDMARK (KDATA_BASE_ADDR + 0x0018) + +#define KDATA_INSTANCE0_MODEM (KDATA_BASE_ADDR + 0x0019) +#define KDATA_INSTANCE_MODEM_ENDMARK (KDATA_BASE_ADDR + 0x001A) + +#define KDATA_INSTANCE0_SRC (KDATA_BASE_ADDR + 0x001B) +#define KDATA_INSTANCE1_SRC (KDATA_BASE_ADDR + 0x001C) +#define KDATA_INSTANCE_SRC_ENDMARK (KDATA_BASE_ADDR + 0x001D) + +#define KDATA_INSTANCE0_MINISRC (KDATA_BASE_ADDR + 0x001E) +#define KDATA_INSTANCE1_MINISRC (KDATA_BASE_ADDR + 0x001F) +#define KDATA_INSTANCE2_MINISRC (KDATA_BASE_ADDR + 0x0020) +#define KDATA_INSTANCE3_MINISRC (KDATA_BASE_ADDR + 0x0021) +#define KDATA_INSTANCE_MINISRC_ENDMARK (KDATA_BASE_ADDR + 0x0022) + +#define KDATA_INSTANCE0_CPYTHRU (KDATA_BASE_ADDR + 0x0023) +#define KDATA_INSTANCE1_CPYTHRU (KDATA_BASE_ADDR + 0x0024) +#define KDATA_INSTANCE_CPYTHRU_ENDMARK (KDATA_BASE_ADDR + 0x0025) + +#define KDATA_CURRENT_DMA (KDATA_BASE_ADDR + 0x0026) +#define KDATA_DMA_SWITCH (KDATA_BASE_ADDR + 0x0027) +#define KDATA_DMA_ACTIVE (KDATA_BASE_ADDR + 0x0028) + +#define KDATA_DMA_XFER0 (KDATA_BASE_ADDR + 0x0029) +#define KDATA_DMA_XFER1 (KDATA_BASE_ADDR + 0x002A) +#define KDATA_DMA_XFER2 (KDATA_BASE_ADDR + 0x002B) +#define KDATA_DMA_XFER3 (KDATA_BASE_ADDR + 0x002C) +#define KDATA_DMA_XFER4 (KDATA_BASE_ADDR + 0x002D) +#define KDATA_DMA_XFER5 (KDATA_BASE_ADDR + 0x002E) +#define KDATA_DMA_XFER6 (KDATA_BASE_ADDR + 0x002F) +#define KDATA_DMA_XFER7 (KDATA_BASE_ADDR + 0x0030) +#define KDATA_DMA_XFER8 (KDATA_BASE_ADDR + 0x0031) +#define KDATA_DMA_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0032) + +#define KDATA_I2S_SAMPLE_COUNT (KDATA_BASE_ADDR + 0x0033) +#define KDATA_I2S_INT_METER (KDATA_BASE_ADDR + 0x0034) +#define KDATA_I2S_ACTIVE (KDATA_BASE_ADDR + 0x0035) + +#define KDATA_TIMER_COUNT_RELOAD (KDATA_BASE_ADDR + 0x0036) +#define KDATA_TIMER_COUNT_CURRENT (KDATA_BASE_ADDR + 0x0037) + +#define KDATA_HALT_SYNCH_CLIENT (KDATA_BASE_ADDR + 0x0038) +#define KDATA_HALT_SYNCH_DMA (KDATA_BASE_ADDR + 0x0039) +#define KDATA_HALT_ACKNOWLEDGE (KDATA_BASE_ADDR + 0x003A) + +#define KDATA_ADC1_XFER0 (KDATA_BASE_ADDR + 0x003B) +#define KDATA_ADC1_XFER_ENDMARK (KDATA_BASE_ADDR + 0x003C) +#define KDATA_ADC1_LEFT_VOLUME (KDATA_BASE_ADDR + 0x003D) +#define KDATA_ADC1_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x003E) +#define KDATA_ADC1_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x003F) +#define KDATA_ADC1_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x0040) + +#define KDATA_ADC2_XFER0 (KDATA_BASE_ADDR + 0x0041) +#define KDATA_ADC2_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0042) +#define KDATA_ADC2_LEFT_VOLUME (KDATA_BASE_ADDR + 0x0043) +#define KDATA_ADC2_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x0044) +#define KDATA_ADC2_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x0045) +#define KDATA_ADC2_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x0046) + +#define KDATA_CD_XFER0 (KDATA_BASE_ADDR + 0x0047) +#define KDATA_CD_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0048) +#define KDATA_CD_LEFT_VOLUME (KDATA_BASE_ADDR + 0x0049) +#define KDATA_CD_RIGHT_VOLUME (KDATA_BASE_ADDR + 0x004A) +#define KDATA_CD_LEFT_SUR_VOL (KDATA_BASE_ADDR + 0x004B) +#define KDATA_CD_RIGHT_SUR_VOL (KDATA_BASE_ADDR + 0x004C) + +#define KDATA_MIC_XFER0 (KDATA_BASE_ADDR + 0x004D) +#define KDATA_MIC_XFER_ENDMARK (KDATA_BASE_ADDR + 0x004E) +#define KDATA_MIC_VOLUME (KDATA_BASE_ADDR + 0x004F) +#define KDATA_MIC_SUR_VOL (KDATA_BASE_ADDR + 0x0050) + +#define KDATA_I2S_XFER0 (KDATA_BASE_ADDR + 0x0051) +#define KDATA_I2S_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0052) + +#define KDATA_CHI_XFER0 (KDATA_BASE_ADDR + 0x0053) +#define KDATA_CHI_XFER_ENDMARK (KDATA_BASE_ADDR + 0x0054) + +#define KDATA_SPDIF_XFER (KDATA_BASE_ADDR + 0x0055) +#define KDATA_SPDIF_CURRENT_FRAME (KDATA_BASE_ADDR + 0x0056) +#define KDATA_SPDIF_FRAME0 (KDATA_BASE_ADDR + 0x0057) +#define KDATA_SPDIF_FRAME1 (KDATA_BASE_ADDR + 0x0058) +#define KDATA_SPDIF_FRAME2 (KDATA_BASE_ADDR + 0x0059) + +#define KDATA_SPDIF_REQUEST (KDATA_BASE_ADDR + 0x005A) +#define KDATA_SPDIF_TEMP (KDATA_BASE_ADDR + 0x005B) /*AY SPDIF IN */ -#define KDATA_SPDIFIN_XFER0 (KDATA_BASE_ADDR + 0x005C) -#define KDATA_SPDIFIN_XFER_ENDMARK (KDATA_BASE_ADDR + 0x005D) -#define KDATA_SPDIFIN_INT_METER (KDATA_BASE_ADDR + 0x005E) - -#define KDATA_DSP_RESET_COUNT (KDATA_BASE_ADDR + 0x005F) -#define KDATA_DEBUG_OUTPUT (KDATA_BASE_ADDR + 0x0060) - -#define KDATA_KERNEL_ISR_LIST (KDATA_BASE_ADDR + 0x0061) - -#define KDATA_KERNEL_ISR_CBSR1 (KDATA_BASE_ADDR + 0x0062) -#define KDATA_KERNEL_ISR_CBER1 (KDATA_BASE_ADDR + 0x0063) -#define KDATA_KERNEL_ISR_CBCR (KDATA_BASE_ADDR + 0x0064) -#define KDATA_KERNEL_ISR_AR0 (KDATA_BASE_ADDR + 0x0065) -#define KDATA_KERNEL_ISR_AR1 (KDATA_BASE_ADDR + 0x0066) -#define KDATA_KERNEL_ISR_AR2 (KDATA_BASE_ADDR + 0x0067) -#define KDATA_KERNEL_ISR_AR3 (KDATA_BASE_ADDR + 0x0068) -#define KDATA_KERNEL_ISR_AR4 (KDATA_BASE_ADDR + 0x0069) -#define KDATA_KERNEL_ISR_AR5 (KDATA_BASE_ADDR + 0x006A) -#define KDATA_KERNEL_ISR_BRCR (KDATA_BASE_ADDR + 0x006B) -#define KDATA_KERNEL_ISR_PASR (KDATA_BASE_ADDR + 0x006C) -#define KDATA_KERNEL_ISR_PAER (KDATA_BASE_ADDR + 0x006D) - -#define KDATA_CLIENT_SCRATCH0 (KDATA_BASE_ADDR + 0x006E) -#define KDATA_CLIENT_SCRATCH1 (KDATA_BASE_ADDR + 0x006F) -#define KDATA_KERNEL_SCRATCH (KDATA_BASE_ADDR + 0x0070) -#define KDATA_KERNEL_ISR_SCRATCH (KDATA_BASE_ADDR + 0x0071) - -#define KDATA_OUEUE_LEFT (KDATA_BASE_ADDR + 0x0072) -#define KDATA_QUEUE_RIGHT (KDATA_BASE_ADDR + 0x0073) - -#define KDATA_ADC1_REQUEST (KDATA_BASE_ADDR + 0x0074) -#define KDATA_ADC2_REQUEST (KDATA_BASE_ADDR + 0x0075) -#define KDATA_CD_REQUEST (KDATA_BASE_ADDR + 0x0076) -#define KDATA_MIC_REQUEST (KDATA_BASE_ADDR + 0x0077) - -#define KDATA_ADC1_MIXER_REQUEST (KDATA_BASE_ADDR + 0x0078) -#define KDATA_ADC2_MIXER_REQUEST (KDATA_BASE_ADDR + 0x0079) -#define KDATA_CD_MIXER_REQUEST (KDATA_BASE_ADDR + 0x007A) -#define KDATA_MIC_MIXER_REQUEST (KDATA_BASE_ADDR + 0x007B) -#define KDATA_MIC_SYNC_COUNTER (KDATA_BASE_ADDR + 0x007C) +#define KDATA_SPDIFIN_XFER0 (KDATA_BASE_ADDR + 0x005C) +#define KDATA_SPDIFIN_XFER_ENDMARK (KDATA_BASE_ADDR + 0x005D) +#define KDATA_SPDIFIN_INT_METER (KDATA_BASE_ADDR + 0x005E) + +#define KDATA_DSP_RESET_COUNT (KDATA_BASE_ADDR + 0x005F) +#define KDATA_DEBUG_OUTPUT (KDATA_BASE_ADDR + 0x0060) + +#define KDATA_KERNEL_ISR_LIST (KDATA_BASE_ADDR + 0x0061) + +#define KDATA_KERNEL_ISR_CBSR1 (KDATA_BASE_ADDR + 0x0062) +#define KDATA_KERNEL_ISR_CBER1 (KDATA_BASE_ADDR + 0x0063) +#define KDATA_KERNEL_ISR_CBCR (KDATA_BASE_ADDR + 0x0064) +#define KDATA_KERNEL_ISR_AR0 (KDATA_BASE_ADDR + 0x0065) +#define KDATA_KERNEL_ISR_AR1 (KDATA_BASE_ADDR + 0x0066) +#define KDATA_KERNEL_ISR_AR2 (KDATA_BASE_ADDR + 0x0067) +#define KDATA_KERNEL_ISR_AR3 (KDATA_BASE_ADDR + 0x0068) +#define KDATA_KERNEL_ISR_AR4 (KDATA_BASE_ADDR + 0x0069) +#define KDATA_KERNEL_ISR_AR5 (KDATA_BASE_ADDR + 0x006A) +#define KDATA_KERNEL_ISR_BRCR (KDATA_BASE_ADDR + 0x006B) +#define KDATA_KERNEL_ISR_PASR (KDATA_BASE_ADDR + 0x006C) +#define KDATA_KERNEL_ISR_PAER (KDATA_BASE_ADDR + 0x006D) + +#define KDATA_CLIENT_SCRATCH0 (KDATA_BASE_ADDR + 0x006E) +#define KDATA_CLIENT_SCRATCH1 (KDATA_BASE_ADDR + 0x006F) +#define KDATA_KERNEL_SCRATCH (KDATA_BASE_ADDR + 0x0070) +#define KDATA_KERNEL_ISR_SCRATCH (KDATA_BASE_ADDR + 0x0071) + +#define KDATA_OUEUE_LEFT (KDATA_BASE_ADDR + 0x0072) +#define KDATA_QUEUE_RIGHT (KDATA_BASE_ADDR + 0x0073) + +#define KDATA_ADC1_REQUEST (KDATA_BASE_ADDR + 0x0074) +#define KDATA_ADC2_REQUEST (KDATA_BASE_ADDR + 0x0075) +#define KDATA_CD_REQUEST (KDATA_BASE_ADDR + 0x0076) +#define KDATA_MIC_REQUEST (KDATA_BASE_ADDR + 0x0077) + +#define KDATA_ADC1_MIXER_REQUEST (KDATA_BASE_ADDR + 0x0078) +#define KDATA_ADC2_MIXER_REQUEST (KDATA_BASE_ADDR + 0x0079) +#define KDATA_CD_MIXER_REQUEST (KDATA_BASE_ADDR + 0x007A) +#define KDATA_MIC_MIXER_REQUEST (KDATA_BASE_ADDR + 0x007B) +#define KDATA_MIC_SYNC_COUNTER (KDATA_BASE_ADDR + 0x007C) /* * second segment @@ -622,167 +630,168 @@ /* smart mixer buffer */ -#define KDATA_MIXER_WORD0 (KDATA_BASE_ADDR2 + 0x0000) -#define KDATA_MIXER_WORD1 (KDATA_BASE_ADDR2 + 0x0001) -#define KDATA_MIXER_WORD2 (KDATA_BASE_ADDR2 + 0x0002) -#define KDATA_MIXER_WORD3 (KDATA_BASE_ADDR2 + 0x0003) -#define KDATA_MIXER_WORD4 (KDATA_BASE_ADDR2 + 0x0004) -#define KDATA_MIXER_WORD5 (KDATA_BASE_ADDR2 + 0x0005) -#define KDATA_MIXER_WORD6 (KDATA_BASE_ADDR2 + 0x0006) -#define KDATA_MIXER_WORD7 (KDATA_BASE_ADDR2 + 0x0007) -#define KDATA_MIXER_WORD8 (KDATA_BASE_ADDR2 + 0x0008) -#define KDATA_MIXER_WORD9 (KDATA_BASE_ADDR2 + 0x0009) -#define KDATA_MIXER_WORDA (KDATA_BASE_ADDR2 + 0x000A) -#define KDATA_MIXER_WORDB (KDATA_BASE_ADDR2 + 0x000B) -#define KDATA_MIXER_WORDC (KDATA_BASE_ADDR2 + 0x000C) -#define KDATA_MIXER_WORDD (KDATA_BASE_ADDR2 + 0x000D) -#define KDATA_MIXER_WORDE (KDATA_BASE_ADDR2 + 0x000E) -#define KDATA_MIXER_WORDF (KDATA_BASE_ADDR2 + 0x000F) - -#define KDATA_MIXER_XFER0 (KDATA_BASE_ADDR2 + 0x0010) -#define KDATA_MIXER_XFER1 (KDATA_BASE_ADDR2 + 0x0011) -#define KDATA_MIXER_XFER2 (KDATA_BASE_ADDR2 + 0x0012) -#define KDATA_MIXER_XFER3 (KDATA_BASE_ADDR2 + 0x0013) -#define KDATA_MIXER_XFER4 (KDATA_BASE_ADDR2 + 0x0014) -#define KDATA_MIXER_XFER5 (KDATA_BASE_ADDR2 + 0x0015) -#define KDATA_MIXER_XFER6 (KDATA_BASE_ADDR2 + 0x0016) -#define KDATA_MIXER_XFER7 (KDATA_BASE_ADDR2 + 0x0017) -#define KDATA_MIXER_XFER8 (KDATA_BASE_ADDR2 + 0x0018) -#define KDATA_MIXER_XFER9 (KDATA_BASE_ADDR2 + 0x0019) -#define KDATA_MIXER_XFER_ENDMARK (KDATA_BASE_ADDR2 + 0x001A) - -#define KDATA_MIXER_TASK_NUMBER (KDATA_BASE_ADDR2 + 0x001B) -#define KDATA_CURRENT_MIXER (KDATA_BASE_ADDR2 + 0x001C) -#define KDATA_MIXER_ACTIVE (KDATA_BASE_ADDR2 + 0x001D) -#define KDATA_MIXER_BANK_STATUS (KDATA_BASE_ADDR2 + 0x001E) -#define KDATA_DAC_LEFT_VOLUME (KDATA_BASE_ADDR2 + 0x001F) -#define KDATA_DAC_RIGHT_VOLUME (KDATA_BASE_ADDR2 + 0x0020) +#define KDATA_MIXER_WORD0 (KDATA_BASE_ADDR2 + 0x0000) +#define KDATA_MIXER_WORD1 (KDATA_BASE_ADDR2 + 0x0001) +#define KDATA_MIXER_WORD2 (KDATA_BASE_ADDR2 + 0x0002) +#define KDATA_MIXER_WORD3 (KDATA_BASE_ADDR2 + 0x0003) +#define KDATA_MIXER_WORD4 (KDATA_BASE_ADDR2 + 0x0004) +#define KDATA_MIXER_WORD5 (KDATA_BASE_ADDR2 + 0x0005) +#define KDATA_MIXER_WORD6 (KDATA_BASE_ADDR2 + 0x0006) +#define KDATA_MIXER_WORD7 (KDATA_BASE_ADDR2 + 0x0007) +#define KDATA_MIXER_WORD8 (KDATA_BASE_ADDR2 + 0x0008) +#define KDATA_MIXER_WORD9 (KDATA_BASE_ADDR2 + 0x0009) +#define KDATA_MIXER_WORDA (KDATA_BASE_ADDR2 + 0x000A) +#define KDATA_MIXER_WORDB (KDATA_BASE_ADDR2 + 0x000B) +#define KDATA_MIXER_WORDC (KDATA_BASE_ADDR2 + 0x000C) +#define KDATA_MIXER_WORDD (KDATA_BASE_ADDR2 + 0x000D) +#define KDATA_MIXER_WORDE (KDATA_BASE_ADDR2 + 0x000E) +#define KDATA_MIXER_WORDF (KDATA_BASE_ADDR2 + 0x000F) + +#define KDATA_MIXER_XFER0 (KDATA_BASE_ADDR2 + 0x0010) +#define KDATA_MIXER_XFER1 (KDATA_BASE_ADDR2 + 0x0011) +#define KDATA_MIXER_XFER2 (KDATA_BASE_ADDR2 + 0x0012) +#define KDATA_MIXER_XFER3 (KDATA_BASE_ADDR2 + 0x0013) +#define KDATA_MIXER_XFER4 (KDATA_BASE_ADDR2 + 0x0014) +#define KDATA_MIXER_XFER5 (KDATA_BASE_ADDR2 + 0x0015) +#define KDATA_MIXER_XFER6 (KDATA_BASE_ADDR2 + 0x0016) +#define KDATA_MIXER_XFER7 (KDATA_BASE_ADDR2 + 0x0017) +#define KDATA_MIXER_XFER8 (KDATA_BASE_ADDR2 + 0x0018) +#define KDATA_MIXER_XFER9 (KDATA_BASE_ADDR2 + 0x0019) +#define KDATA_MIXER_XFER_ENDMARK (KDATA_BASE_ADDR2 + 0x001A) + +#define KDATA_MIXER_TASK_NUMBER (KDATA_BASE_ADDR2 + 0x001B) +#define KDATA_CURRENT_MIXER (KDATA_BASE_ADDR2 + 0x001C) +#define KDATA_MIXER_ACTIVE (KDATA_BASE_ADDR2 + 0x001D) +#define KDATA_MIXER_BANK_STATUS (KDATA_BASE_ADDR2 + 0x001E) +#define KDATA_DAC_LEFT_VOLUME (KDATA_BASE_ADDR2 + 0x001F) +#define KDATA_DAC_RIGHT_VOLUME (KDATA_BASE_ADDR2 + 0x0020) /* * Client data memory definition */ -#define CDATA_INSTANCE_READY 0x00 +#define CDATA_INSTANCE_READY 0x00 -#define CDATA_HOST_SRC_ADDRL 0x01 -#define CDATA_HOST_SRC_ADDRH 0x02 -#define CDATA_HOST_SRC_END_PLUS_1L 0x03 -#define CDATA_HOST_SRC_END_PLUS_1H 0x04 -#define CDATA_HOST_SRC_CURRENTL 0x05 -#define CDATA_HOST_SRC_CURRENTH 0x06 +#define CDATA_HOST_SRC_ADDRL 0x01 +#define CDATA_HOST_SRC_ADDRH 0x02 +#define CDATA_HOST_SRC_END_PLUS_1L 0x03 +#define CDATA_HOST_SRC_END_PLUS_1H 0x04 +#define CDATA_HOST_SRC_CURRENTL 0x05 +#define CDATA_HOST_SRC_CURRENTH 0x06 -#define CDATA_IN_BUF_CONNECT 0x07 -#define CDATA_OUT_BUF_CONNECT 0x08 +#define CDATA_IN_BUF_CONNECT 0x07 +#define CDATA_OUT_BUF_CONNECT 0x08 -#define CDATA_IN_BUF_BEGIN 0x09 -#define CDATA_IN_BUF_END_PLUS_1 0x0A -#define CDATA_IN_BUF_HEAD 0x0B -#define CDATA_IN_BUF_TAIL 0x0C +#define CDATA_IN_BUF_BEGIN 0x09 +#define CDATA_IN_BUF_END_PLUS_1 0x0A +#define CDATA_IN_BUF_HEAD 0x0B +#define CDATA_IN_BUF_TAIL 0x0C -#define CDATA_OUT_BUF_BEGIN 0x0D -#define CDATA_OUT_BUF_END_PLUS_1 0x0E -#define CDATA_OUT_BUF_HEAD 0x0F -#define CDATA_OUT_BUF_TAIL 0x10 +#define CDATA_OUT_BUF_BEGIN 0x0D +#define CDATA_OUT_BUF_END_PLUS_1 0x0E +#define CDATA_OUT_BUF_HEAD 0x0F +#define CDATA_OUT_BUF_TAIL 0x10 -#define CDATA_DMA_CONTROL 0x11 -#define CDATA_RESERVED 0x12 +#define CDATA_DMA_CONTROL 0x11 +#define CDATA_RESERVED 0x12 -#define CDATA_FREQUENCY 0x13 -#define CDATA_LEFT_VOLUME 0x14 -#define CDATA_RIGHT_VOLUME 0x15 -#define CDATA_LEFT_SUR_VOL 0x16 -#define CDATA_RIGHT_SUR_VOL 0x17 +#define CDATA_FREQUENCY 0x13 +#define CDATA_LEFT_VOLUME 0x14 +#define CDATA_RIGHT_VOLUME 0x15 +#define CDATA_LEFT_SUR_VOL 0x16 +#define CDATA_RIGHT_SUR_VOL 0x17 /* These are from Allegro hckernel.h */ -#define CDATA_HEADER_LEN 0x18 -#define SRC3_DIRECTION_OFFSET CDATA_HEADER_LEN -#define SRC3_MODE_OFFSET CDATA_HEADER_LEN + 1 -#define SRC3_WORD_LENGTH_OFFSET CDATA_HEADER_LEN + 2 -#define SRC3_PARAMETER_OFFSET CDATA_HEADER_LEN + 3 -#define SRC3_COEFF_ADDR_OFFSET CDATA_HEADER_LEN + 8 -#define SRC3_FILTAP_ADDR_OFFSET CDATA_HEADER_LEN + 10 -#define SRC3_TEMP_INBUF_ADDR_OFFSET CDATA_HEADER_LEN + 16 -#define SRC3_TEMP_OUTBUF_ADDR_OFFSET CDATA_HEADER_LEN + 17 -#define FOR_FUTURE_USE 10 /* for storing temporary variable in future */ +#define CDATA_HEADER_LEN 0x18 +#define SRC3_DIRECTION_OFFSET CDATA_HEADER_LEN +#define SRC3_MODE_OFFSET CDATA_HEADER_LEN + 1 +#define SRC3_WORD_LENGTH_OFFSET CDATA_HEADER_LEN + 2 +#define SRC3_PARAMETER_OFFSET CDATA_HEADER_LEN + 3 +#define SRC3_COEFF_ADDR_OFFSET CDATA_HEADER_LEN + 8 +#define SRC3_FILTAP_ADDR_OFFSET CDATA_HEADER_LEN + 10 +#define SRC3_TEMP_INBUF_ADDR_OFFSET CDATA_HEADER_LEN + 16 +#define SRC3_TEMP_OUTBUF_ADDR_OFFSET CDATA_HEADER_LEN + 17 +#define FOR_FUTURE_USE 10 /* for storing temporary variable in future */ /* * DMA control definition */ -#define DMACONTROL_BLOCK_MASK 0x000F -#define DMAC_BLOCK0_SELECTOR 0x0000 -#define DMAC_BLOCK1_SELECTOR 0x0001 -#define DMAC_BLOCK2_SELECTOR 0x0002 -#define DMAC_BLOCK3_SELECTOR 0x0003 -#define DMAC_BLOCK4_SELECTOR 0x0004 -#define DMAC_BLOCK5_SELECTOR 0x0005 -#define DMAC_BLOCK6_SELECTOR 0x0006 -#define DMAC_BLOCK7_SELECTOR 0x0007 -#define DMAC_BLOCK8_SELECTOR 0x0008 -#define DMAC_BLOCK9_SELECTOR 0x0009 -#define DMAC_BLOCKA_SELECTOR 0x000A -#define DMAC_BLOCKB_SELECTOR 0x000B -#define DMAC_BLOCKC_SELECTOR 0x000C -#define DMAC_BLOCKD_SELECTOR 0x000D -#define DMAC_BLOCKE_SELECTOR 0x000E -#define DMAC_BLOCKF_SELECTOR 0x000F -#define DMACONTROL_PAGE_MASK 0x00F0 -#define DMAC_PAGE0_SELECTOR 0x0030 -#define DMAC_PAGE1_SELECTOR 0x0020 -#define DMAC_PAGE2_SELECTOR 0x0010 -#define DMAC_PAGE3_SELECTOR 0x0000 -#define DMACONTROL_AUTOREPEAT 0x1000 -#define DMACONTROL_STOPPED 0x2000 -#define DMACONTROL_DIRECTION 0x0100 +#define DMACONTROL_BLOCK_MASK 0x000F +#define DMAC_BLOCK0_SELECTOR 0x0000 +#define DMAC_BLOCK1_SELECTOR 0x0001 +#define DMAC_BLOCK2_SELECTOR 0x0002 +#define DMAC_BLOCK3_SELECTOR 0x0003 +#define DMAC_BLOCK4_SELECTOR 0x0004 +#define DMAC_BLOCK5_SELECTOR 0x0005 +#define DMAC_BLOCK6_SELECTOR 0x0006 +#define DMAC_BLOCK7_SELECTOR 0x0007 +#define DMAC_BLOCK8_SELECTOR 0x0008 +#define DMAC_BLOCK9_SELECTOR 0x0009 +#define DMAC_BLOCKA_SELECTOR 0x000A +#define DMAC_BLOCKB_SELECTOR 0x000B +#define DMAC_BLOCKC_SELECTOR 0x000C +#define DMAC_BLOCKD_SELECTOR 0x000D +#define DMAC_BLOCKE_SELECTOR 0x000E +#define DMAC_BLOCKF_SELECTOR 0x000F +#define DMACONTROL_PAGE_MASK 0x00F0 +#define DMAC_PAGE0_SELECTOR 0x0030 +#define DMAC_PAGE1_SELECTOR 0x0020 +#define DMAC_PAGE2_SELECTOR 0x0010 +#define DMAC_PAGE3_SELECTOR 0x0000 +#define DMACONTROL_AUTOREPEAT 0x1000 +#define DMACONTROL_STOPPED 0x2000 +#define DMACONTROL_DIRECTION 0x0100 /* * Kernel/client memory allocation */ -#define NUM_UNITS_KERNEL_CODE 16 -#define NUM_UNITS_KERNEL_DATA 2 +#define NUM_UNITS_KERNEL_CODE 16 +#define NUM_UNITS_KERNEL_DATA 2 #define NUM_UNITS_KERNEL_CODE_WITH_HSP 16 #ifdef M3_MODEL -#define NUM_UNITS_KERNEL_DATA_WITH_HSP 5 +#define NUM_UNITS_KERNEL_DATA_WITH_HSP 5 #else -#define NUM_UNITS_KERNEL_DATA_WITH_HSP 4 +#define NUM_UNITS_KERNEL_DATA_WITH_HSP 4 #endif -#define NUM_UNITS( BYTES, UNITLEN ) ((((BYTES+1)>>1) + (UNITLEN-1)) / UNITLEN) +#define NUM_UNITS(BYTES, UNITLEN) \ + ((((BYTES + 1) >> 1) + (UNITLEN - 1)) / UNITLEN) /* * DSP hardware */ -#define DSP_PORT_TIMER_COUNT 0x06 -#define DSP_PORT_MEMORY_INDEX 0x80 -#define DSP_PORT_MEMORY_TYPE 0x82 -#define DSP_PORT_MEMORY_DATA 0x84 -#define DSP_PORT_CONTROL_REG_A 0xA2 -#define DSP_PORT_CONTROL_REG_B 0xA4 -#define DSP_PORT_CONTROL_REG_C 0xA6 +#define DSP_PORT_TIMER_COUNT 0x06 +#define DSP_PORT_MEMORY_INDEX 0x80 +#define DSP_PORT_MEMORY_TYPE 0x82 +#define DSP_PORT_MEMORY_DATA 0x84 +#define DSP_PORT_CONTROL_REG_A 0xA2 +#define DSP_PORT_CONTROL_REG_B 0xA4 +#define DSP_PORT_CONTROL_REG_C 0xA6 -#define MEMTYPE_INTERNAL_CODE 0x0002 -#define MEMTYPE_INTERNAL_DATA 0x0003 -#define MEMTYPE_MASK 0x0003 +#define MEMTYPE_INTERNAL_CODE 0x0002 +#define MEMTYPE_INTERNAL_DATA 0x0003 +#define MEMTYPE_MASK 0x0003 -#define REGB_ENABLE_RESET 0x01 -#define REGB_STOP_CLOCK 0x10 +#define REGB_ENABLE_RESET 0x01 +#define REGB_STOP_CLOCK 0x10 -#define REGC_DISABLE_FM_MAPPING 0x02 +#define REGC_DISABLE_FM_MAPPING 0x02 -#define DP_SHIFT_COUNT 7 +#define DP_SHIFT_COUNT 7 -#define DMA_BLOCK_LENGTH 32 +#define DMA_BLOCK_LENGTH 32 /* These are from Allegro srcmgr.h */ -#define MINISRC_BIQUAD_STAGE 2 -#define MINISRC_IN_BUFFER_SIZE ( 0x50 * 2 ) -#define MINISRC_OUT_BUFFER_SIZE ( 0x50 * 2 * 2) -#define MINISRC_TMP_BUFFER_SIZE ( 112 + ( MINISRC_BIQUAD_STAGE * 3 + 4 ) * 2 * 2 ) -#define MINISRC_BIQUAD_STAGE 2 +#define MINISRC_BIQUAD_STAGE 2 +#define MINISRC_IN_BUFFER_SIZE (0x50 * 2) +#define MINISRC_OUT_BUFFER_SIZE (0x50 * 2 * 2) +#define MINISRC_TMP_BUFFER_SIZE (112 + (MINISRC_BIQUAD_STAGE * 3 + 4) * 2 * 2) +#define MINISRC_BIQUAD_STAGE 2 /* M. SRC LPF coefficient could be changed in the DSP code */ -#define MINISRC_COEF_LOC 0X175 +#define MINISRC_COEF_LOC 0X175 -#endif /* !_DEV_SOUND_PCI_ALLEGRO_REG_H */ +#endif /* !_DEV_SOUND_PCI_ALLEGRO_REG_H */ Index: sys/dev/sound/pci/als4000.h =================================================================== --- sys/dev/sound/pci/als4000.h +++ sys/dev/sound/pci/als4000.h @@ -26,70 +26,70 @@ * SUCH DAMAGE. */ -#define ALS_PCI_ID0 0x40004005 -#define ALS_PCI_POWERREG 0xe0 +#define ALS_PCI_ID0 0x40004005 +#define ALS_PCI_POWERREG 0xe0 -#define ALS_CONFIG_SPACE_BYTES 128 +#define ALS_CONFIG_SPACE_BYTES 128 -#define ALS_GCR_DATA 0x08 -#define ALS_GCR_INDEX 0x0c -# define ALS_GCR_MISC 0x8c -# define ALS_GCR_TEST 0x90 -# define ALS_GCR_DMA0_START 0x91 -# define ALS_GCR_DMA0_MODE 0x92 -# define ALS_GCR_DMA1_START 0x93 -# define ALS_GCR_DMA1_MODE 0x94 -# define ALS_GCR_DMA3_START 0x95 -# define ALS_GCR_DMA3_MODE 0x96 -# define ALS_GCR_DMA_EMULATION 0x99 -# define ALS_GCR_FIFO0_CURRENT 0xa0 -# define ALS_GCR_FIFO0_STATUS 0xa1 -# define ALS_GCR_FIFO1_START 0xa2 -# define ALS_GCR_FIFO1_COUNT 0xa3 -# define ALS_GCR_FIFO1_CURRENT 0xa4 -# define ALS_GCR_FIFO1_STATUS 0xa5 -# define ALS_GCR_POWER 0xa6 -# define ALS_GCR_PIC_ACCESS 0xa7 +#define ALS_GCR_DATA 0x08 +#define ALS_GCR_INDEX 0x0c +#define ALS_GCR_MISC 0x8c +#define ALS_GCR_TEST 0x90 +#define ALS_GCR_DMA0_START 0x91 +#define ALS_GCR_DMA0_MODE 0x92 +#define ALS_GCR_DMA1_START 0x93 +#define ALS_GCR_DMA1_MODE 0x94 +#define ALS_GCR_DMA3_START 0x95 +#define ALS_GCR_DMA3_MODE 0x96 +#define ALS_GCR_DMA_EMULATION 0x99 +#define ALS_GCR_FIFO0_CURRENT 0xa0 +#define ALS_GCR_FIFO0_STATUS 0xa1 +#define ALS_GCR_FIFO1_START 0xa2 +#define ALS_GCR_FIFO1_COUNT 0xa3 +#define ALS_GCR_FIFO1_CURRENT 0xa4 +#define ALS_GCR_FIFO1_STATUS 0xa5 +#define ALS_GCR_POWER 0xa6 +#define ALS_GCR_PIC_ACCESS 0xa7 -#define ALS_SB_MPU_IRQ 0x0e +#define ALS_SB_MPU_IRQ 0x0e -#define ALS_MIXER_DATA 0x15 -#define ALS_MIXER_INDEX 0x14 -# define ALS_SB16_RESET 0x00 -# define ALS_SB16_DMA_SETUP 0x81 -# define ALS_CONTROL 0xc0 -# define ALS_SB16_CONFIG ALS_CONTROL + 0x00 -# define ALS_MISC_CONTROL ALS_CONTROL + 0x02 -# define ALS_FIFO1_LENGTH_LO ALS_CONTROL + 0x1c -# define ALS_FIFO1_LENGTH_HI ALS_CONTROL + 0x1d -# define ALS_FIFO1_CONTROL ALS_CONTROL + 0x1e -# define ALS_FIFO1_STOP 0x00 -# define ALS_FIFO1_RUN 0x80 -# define ALS_FIFO1_PAUSE 0x40 -# define ALS_FIFO1_STEREO 0x20 -# define ALS_FIFO1_SIGNED 0x10 -# define ALS_FIFO1_8BIT 0x04 +#define ALS_MIXER_DATA 0x15 +#define ALS_MIXER_INDEX 0x14 +#define ALS_SB16_RESET 0x00 +#define ALS_SB16_DMA_SETUP 0x81 +#define ALS_CONTROL 0xc0 +#define ALS_SB16_CONFIG ALS_CONTROL + 0x00 +#define ALS_MISC_CONTROL ALS_CONTROL + 0x02 +#define ALS_FIFO1_LENGTH_LO ALS_CONTROL + 0x1c +#define ALS_FIFO1_LENGTH_HI ALS_CONTROL + 0x1d +#define ALS_FIFO1_CONTROL ALS_CONTROL + 0x1e +#define ALS_FIFO1_STOP 0x00 +#define ALS_FIFO1_RUN 0x80 +#define ALS_FIFO1_PAUSE 0x40 +#define ALS_FIFO1_STEREO 0x20 +#define ALS_FIFO1_SIGNED 0x10 +#define ALS_FIFO1_8BIT 0x04 -#define ALS_ESP_RST 0x16 -#define ALS_CR1E_ACK_PORT 0x16 +#define ALS_ESP_RST 0x16 +#define ALS_CR1E_ACK_PORT 0x16 -#define ALS_ESP_RD_DATA 0x1a -#define ALS_ESP_WR_DATA 0x1c -#define ALS_ESP_WR_STATUS 0x1c -#define ALS_ESP_RD_STATUS8 0x1e -#define ALS_ESP_RD_STATUS16 0x1f -# define ALS_ESP_SAMPLE_RATE 0x41 +#define ALS_ESP_RD_DATA 0x1a +#define ALS_ESP_WR_DATA 0x1c +#define ALS_ESP_WR_STATUS 0x1c +#define ALS_ESP_RD_STATUS8 0x1e +#define ALS_ESP_RD_STATUS16 0x1f +#define ALS_ESP_SAMPLE_RATE 0x41 -#define ALS_MIDI_DATA 0x30 -#define ALS_MIDI_STATUS 0x31 +#define ALS_MIDI_DATA 0x30 +#define ALS_MIDI_STATUS 0x31 /* Interrupt masks */ -#define ALS_IRQ_STATUS8 0x01 -#define ALS_IRQ_STATUS16 0x02 -#define ALS_IRQ_MPUIN 0x04 -#define ALS_IRQ_CR1E 0x20 +#define ALS_IRQ_STATUS8 0x01 +#define ALS_IRQ_STATUS16 0x02 +#define ALS_IRQ_MPUIN 0x04 +#define ALS_IRQ_CR1E 0x20 /* Sample Rate Locks */ -#define ALS_RATE_LOCK_PLAYBACK 0x01 -#define ALS_RATE_LOCK_CAPTURE 0x02 -#define ALS_RATE_LOCK 0x03 +#define ALS_RATE_LOCK_PLAYBACK 0x01 +#define ALS_RATE_LOCK_CAPTURE 0x02 +#define ALS_RATE_LOCK 0x03 Index: sys/dev/sound/pci/als4000.c =================================================================== --- sys/dev/sound/pci/als4000.c +++ sys/dev/sound/pci/als4000.c @@ -39,20 +39,19 @@ #include "opt_snd.h" #endif -#include -#include -#include - #include #include +#include +#include +#include #include "mixer_if.h" /* Debugging macro's */ #undef DEB #ifndef DEB -#define DEB(x) /* x */ -#endif /* DEB */ +#define DEB(x) /* x */ +#endif /* DEB */ #define ALS_DEFAULT_BUFSZ 16384 @@ -62,38 +61,34 @@ struct sc_info; struct sc_chinfo { - struct sc_info *parent; - struct pcm_channel *channel; - struct snd_dbuf *buffer; - u_int32_t format, speed, phys_buf, bps; - u_int32_t dma_active:1, dma_was_active:1; - u_int8_t gcr_fifo_status; - int dir; + struct sc_info *parent; + struct pcm_channel *channel; + struct snd_dbuf *buffer; + u_int32_t format, speed, phys_buf, bps; + u_int32_t dma_active : 1, dma_was_active : 1; + u_int8_t gcr_fifo_status; + int dir; }; struct sc_info { - device_t dev; - bus_space_tag_t st; - bus_space_handle_t sh; - bus_dma_tag_t parent_dmat; - struct resource *reg, *irq; - int regid, irqid; - void *ih; - struct mtx *lock; - - unsigned int bufsz; - struct sc_chinfo pch, rch; + device_t dev; + bus_space_tag_t st; + bus_space_handle_t sh; + bus_dma_tag_t parent_dmat; + struct resource *reg, *irq; + int regid, irqid; + void *ih; + struct mtx *lock; + + unsigned int bufsz; + struct sc_chinfo pch, rch; }; /* Channel caps */ -static u_int32_t als_format[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; +static u_int32_t als_format[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; /* * I don't believe this rotten soundcard can do 48k, really, @@ -147,7 +142,7 @@ static void als_esp_wr(struct sc_info *sc, u_int8_t data) { - u_int32_t tries, v; + u_int32_t tries, v; tries = 1000; do { @@ -166,7 +161,7 @@ static int als_esp_reset(struct sc_info *sc) { - u_int32_t tries, u, v; + u_int32_t tries, u, v; bus_space_write_1(sc->st, sc->sh, ALS_ESP_RST, 1); DELAY(10); @@ -202,11 +197,11 @@ /* Common pcm channel implementation */ static void * -alschan_init(kobj_t obj, void *devinfo, - struct snd_dbuf *b, struct pcm_channel *c, int dir) +alschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { - struct sc_info *sc = devinfo; - struct sc_chinfo *ch; + struct sc_info *sc = devinfo; + struct sc_chinfo *ch; snd_mtxlock(sc->lock); if (dir == PCMDIR_PLAY) { @@ -234,7 +229,7 @@ static int alschan_setformat(kobj_t obj, void *data, u_int32_t format) { - struct sc_chinfo *ch = data; + struct sc_chinfo *ch = data; ch->format = format; return 0; @@ -243,8 +238,8 @@ static u_int32_t alschan_setspeed(kobj_t obj, void *data, u_int32_t speed) { - struct sc_chinfo *ch = data, *other; - struct sc_info *sc = ch->parent; + struct sc_chinfo *ch = data, *other; + struct sc_info *sc = ch->parent; other = (ch->dir == PCMDIR_PLAY) ? &sc->rch : &sc->pch; @@ -261,8 +256,8 @@ static u_int32_t alschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; if (blocksize > sc->bufsz / 2) { blocksize = sc->bufsz / 2; @@ -281,11 +276,11 @@ snd_mtxlock(sc->lock); pos = als_gcr_rd(ch->parent, ch->gcr_fifo_status) & 0xffff; snd_mtxunlock(sc->lock); - sz = sndbuf_getsize(ch->buffer); + sz = sndbuf_getsize(ch->buffer); return (2 * sz - pos - 1) % sz; } -static struct pcmchan_caps* +static struct pcmchan_caps * alschan_getcaps(kobj_t obj, void *data) { return &als_caps; @@ -303,21 +298,27 @@ als_esp_wr(sc, ch->speed >> 8); als_esp_wr(sc, ch->speed & 0xff); } else { - DEB(printf("speed locked at %d (tried %d)\n", - other->speed, ch->speed)); + DEB(printf("speed locked at %d (tried %d)\n", other->speed, + ch->speed)); } } /* ------------------------------------------------------------------------- */ /* Playback channel implementation */ -#define ALS_8BIT_CMD(x, y) { (x), (y), DSP_DMA8, DSP_CMD_DMAPAUSE_8 } -#define ALS_16BIT_CMD(x, y) { (x), (y), DSP_DMA16, DSP_CMD_DMAPAUSE_16 } +#define ALS_8BIT_CMD(x, y) \ + { \ + (x), (y), DSP_DMA8, DSP_CMD_DMAPAUSE_8 \ + } +#define ALS_16BIT_CMD(x, y) \ + { \ + (x), (y), DSP_DMA16, DSP_CMD_DMAPAUSE_16 \ + } struct playback_command { - u_int32_t pcm_format; /* newpcm format */ - u_int8_t format_val; /* sb16 format value */ - u_int8_t dma_prog; /* sb16 dma program */ - u_int8_t dma_stop; /* sb16 stop register */ + u_int32_t pcm_format; /* newpcm format */ + u_int8_t format_val; /* sb16 format value */ + u_int8_t dma_prog; /* sb16 dma program */ + u_int8_t dma_stop; /* sb16 stop register */ } static const playback_cmds[] = { ALS_8BIT_CMD(SND_FORMAT(AFMT_U8, 1, 0), DSP_MODE_U8MONO), ALS_8BIT_CMD(SND_FORMAT(AFMT_U8, 2, 0), DSP_MODE_U8STEREO), @@ -325,7 +326,7 @@ ALS_16BIT_CMD(SND_FORMAT(AFMT_S16_LE, 2, 0), DSP_MODE_S16STEREO), }; -static const struct playback_command* +static const struct playback_command * als_get_playback_command(u_int32_t format) { u_int32_t i, n; @@ -337,7 +338,7 @@ } } DEB(printf("als_get_playback_command: invalid format 0x%08x\n", - format)); + format)); return &playback_cmds[0]; } @@ -345,8 +346,8 @@ als_playback_start(struct sc_chinfo *ch) { const struct playback_command *p; - struct sc_info *sc = ch->parent; - u_int32_t buf, bufsz, count, dma_prog; + struct sc_info *sc = ch->parent; + u_int32_t buf, bufsz, count, dma_prog; buf = sndbuf_getbufaddr(ch->buffer); bufsz = sndbuf_getsize(ch->buffer); @@ -391,14 +392,14 @@ static int alspchan_trigger(kobj_t obj, void *data, int go) { - struct sc_chinfo *ch = data; + struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; if (!PCMTRIG_COMMON(go)) return 0; snd_mtxlock(sc->lock); - switch(go) { + switch (go) { case PCMTRIG_START: als_playback_start(ch); break; @@ -413,16 +414,14 @@ return 0; } -static kobj_method_t alspchan_methods[] = { - KOBJMETHOD(channel_init, alschan_init), - KOBJMETHOD(channel_setformat, alschan_setformat), - KOBJMETHOD(channel_setspeed, alschan_setspeed), - KOBJMETHOD(channel_setblocksize, alschan_setblocksize), - KOBJMETHOD(channel_trigger, alspchan_trigger), - KOBJMETHOD(channel_getptr, alschan_getptr), - KOBJMETHOD(channel_getcaps, alschan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t alspchan_methods[] = { KOBJMETHOD(channel_init, + alschan_init), + KOBJMETHOD(channel_setformat, alschan_setformat), + KOBJMETHOD(channel_setspeed, alschan_setspeed), + KOBJMETHOD(channel_setblocksize, alschan_setblocksize), + KOBJMETHOD(channel_trigger, alspchan_trigger), + KOBJMETHOD(channel_getptr, alschan_getptr), + KOBJMETHOD(channel_getcaps, alschan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(alspchan); /* ------------------------------------------------------------------------- */ @@ -448,8 +447,8 @@ static void als_capture_start(struct sc_chinfo *ch) { - struct sc_info *sc = ch->parent; - u_int32_t buf, bufsz, count, dma_prog; + struct sc_info *sc = ch->parent; + u_int32_t buf, bufsz, count, dma_prog; buf = sndbuf_getbufaddr(ch->buffer); bufsz = sndbuf_getsize(ch->buffer); @@ -490,11 +489,11 @@ static int alsrchan_trigger(kobj_t obj, void *data, int go) { - struct sc_chinfo *ch = data; + struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; snd_mtxlock(sc->lock); - switch(go) { + switch (go) { case PCMTRIG_START: als_capture_start(ch); break; @@ -507,16 +506,14 @@ return 0; } -static kobj_method_t alsrchan_methods[] = { - KOBJMETHOD(channel_init, alschan_init), - KOBJMETHOD(channel_setformat, alschan_setformat), - KOBJMETHOD(channel_setspeed, alschan_setspeed), - KOBJMETHOD(channel_setblocksize, alschan_setblocksize), - KOBJMETHOD(channel_trigger, alsrchan_trigger), - KOBJMETHOD(channel_getptr, alschan_getptr), - KOBJMETHOD(channel_getcaps, alschan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t alsrchan_methods[] = { KOBJMETHOD(channel_init, + alschan_init), + KOBJMETHOD(channel_setformat, alschan_setformat), + KOBJMETHOD(channel_setspeed, alschan_setspeed), + KOBJMETHOD(channel_setblocksize, alschan_setblocksize), + KOBJMETHOD(channel_trigger, alsrchan_trigger), + KOBJMETHOD(channel_getptr, alschan_getptr), + KOBJMETHOD(channel_getcaps, alschan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(alsrchan); /* ------------------------------------------------------------------------- */ @@ -533,20 +530,19 @@ u_int8_t bits; u_int8_t oselect; u_int8_t iselect; /* left input mask */ -} static const amt[SOUND_MIXER_NRDEVICES] = { - [SOUND_MIXER_VOLUME] = { 0x30, 0x31, 5, 0x00, 0x00 }, - [SOUND_MIXER_PCM] = { 0x32, 0x33, 5, 0x00, 0x00 }, - [SOUND_MIXER_SYNTH] = { 0x34, 0x35, 5, 0x60, 0x40 }, - [SOUND_MIXER_CD] = { 0x36, 0x37, 5, 0x06, 0x04 }, - [SOUND_MIXER_LINE] = { 0x38, 0x39, 5, 0x18, 0x10 }, - [SOUND_MIXER_MIC] = { 0x3a, 0x00, 5, 0x01, 0x01 }, +} static const amt[SOUND_MIXER_NRDEVICES] = { [SOUND_MIXER_VOLUME] = { 0x30, + 0x31, 5, 0x00, 0x00 }, + [SOUND_MIXER_PCM] = { 0x32, 0x33, 5, 0x00, 0x00 }, + [SOUND_MIXER_SYNTH] = { 0x34, 0x35, 5, 0x60, 0x40 }, + [SOUND_MIXER_CD] = { 0x36, 0x37, 5, 0x06, 0x04 }, + [SOUND_MIXER_LINE] = { 0x38, 0x39, 5, 0x18, 0x10 }, + [SOUND_MIXER_MIC] = { 0x3a, 0x00, 5, 0x01, 0x01 }, [SOUND_MIXER_SPEAKER] = { 0x3b, 0x00, 2, 0x00, 0x00 }, - [SOUND_MIXER_IGAIN] = { 0x3f, 0x40, 2, 0x00, 0x00 }, - [SOUND_MIXER_OGAIN] = { 0x41, 0x42, 2, 0x00, 0x00 }, + [SOUND_MIXER_IGAIN] = { 0x3f, 0x40, 2, 0x00, 0x00 }, + [SOUND_MIXER_OGAIN] = { 0x41, 0x42, 2, 0x00, 0x00 }, /* The following have register values but no h/w implementation */ - [SOUND_MIXER_TREBLE] = { 0x44, 0x45, 4, 0x00, 0x00 }, - [SOUND_MIXER_BASS] = { 0x46, 0x47, 4, 0x00, 0x00 } -}; + [SOUND_MIXER_TREBLE] = { 0x44, 0x45, 4, 0x00, 0x00 }, + [SOUND_MIXER_BASS] = { 0x46, 0x47, 4, 0x00, 0x00 } }; static int alsmix_init(struct snd_mixer *m) @@ -554,12 +550,14 @@ u_int32_t i, v; for (i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { - if (amt[i].bits) v |= 1 << i; + if (amt[i].bits) + v |= 1 << i; } mix_setdevs(m, v); for (i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { - if (amt[i].iselect) v |= 1 << i; + if (amt[i].iselect) + v |= 1 << i; } mix_setrecdevs(m, v); return 0; @@ -605,7 +603,7 @@ for (i = l = r = 0; i < SOUND_MIXER_NRDEVICES; i++) { if (src & (1 << i)) { - if (amt[i].iselect == 1) { /* microphone */ + if (amt[i].iselect == 1) { /* microphone */ l |= amt[i].iselect; r |= amt[i].iselect; } else { @@ -621,10 +619,8 @@ } static kobj_method_t als_mixer_methods[] = { - KOBJMETHOD(mixer_init, alsmix_init), - KOBJMETHOD(mixer_set, alsmix_set), - KOBJMETHOD(mixer_setrecsrc, alsmix_setrecsrc), - KOBJMETHOD_END + KOBJMETHOD(mixer_init, alsmix_init), KOBJMETHOD(mixer_set, alsmix_set), + KOBJMETHOD(mixer_setrecsrc, alsmix_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(als_mixer); @@ -695,7 +691,7 @@ als_mix_wr(sc, ALS_SB16_CONFIG, v & 0x7f); /* Enable interrupts */ - v = als_gcr_rd(sc, ALS_GCR_MISC); + v = als_gcr_rd(sc, ALS_GCR_MISC); als_gcr_wr(sc, ALS_GCR_MISC, v | 0x28000); /* Black out GCR DMA registers */ @@ -760,7 +756,7 @@ { sc->regid = PCIR_BAR(0); sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &sc->regid, - RF_ACTIVE); + RF_ACTIVE); if (sc->reg == NULL) { device_printf(dev, "unable to allocate register space\n"); goto bad; @@ -769,34 +765,33 @@ sc->sh = rman_get_bushandle(sc->reg); sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, - RF_ACTIVE | RF_SHAREABLE); + RF_ACTIVE | RF_SHAREABLE); if (sc->irq == NULL) { device_printf(dev, "unable to allocate interrupt\n"); goto bad; } - if (snd_setup_intr(dev, sc->irq, INTR_MPSAFE, als_intr, - sc, &sc->ih)) { + if (snd_setup_intr(dev, sc->irq, INTR_MPSAFE, als_intr, sc, &sc->ih)) { device_printf(dev, "unable to setup interrupt\n"); goto bad; } sc->bufsz = pcm_getbuffersize(dev, 4096, ALS_DEFAULT_BUFSZ, 65536); - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), - /*alignment*/2, /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_24BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/sc->bufsz, - /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, - /*lockarg*/NULL, &sc->parent_dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), + /*alignment*/ 2, /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_24BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ sc->bufsz, + /*nsegments*/ 1, /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, + /*lockarg*/ NULL, &sc->parent_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } return 0; - bad: +bad: als_resource_free(dev, sc); return ENXIO; } @@ -814,13 +809,15 @@ pci_enable_busmaster(dev); /* * By default the power to the various components on the - * ALS4000 is entirely controlled by the pci powerstate. We - * could attempt finer grained control by setting GCR6.31. + * ALS4000 is entirely controlled by the pci powerstate. We + * could attempt finer grained control by setting GCR6.31. */ if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { /* Reset the power state. */ - device_printf(dev, "chip is in D%d power mode " - "-- setting to D0\n", pci_get_powerstate(dev)); + device_printf(dev, + "chip is in D%d power mode " + "-- setting to D0\n", + pci_get_powerstate(dev)); pci_set_powerstate(dev, PCI_POWERSTATE_D0); } @@ -845,15 +842,15 @@ } pcm_addchan(dev, PCMDIR_PLAY, &alspchan_class, sc); - pcm_addchan(dev, PCMDIR_REC, &alsrchan_class, sc); + pcm_addchan(dev, PCMDIR_REC, &alsrchan_class, sc); snprintf(status, SND_STATUSLEN, "port 0x%jx irq %jd on %s", - rman_get_start(sc->reg), rman_get_start(sc->irq), - device_get_nameunit(device_get_parent(dev))); + rman_get_start(sc->reg), rman_get_start(sc->irq), + device_get_nameunit(device_get_parent(dev))); pcm_setstatus(dev, status); return 0; - bad_attach: +bad_attach: als_resource_free(dev, sc); free(sc, M_DEVBUF); return ENXIO; @@ -921,12 +918,11 @@ static device_method_t als_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, als_pci_probe), - DEVMETHOD(device_attach, als_pci_attach), - DEVMETHOD(device_detach, als_pci_detach), - DEVMETHOD(device_suspend, als_pci_suspend), - DEVMETHOD(device_resume, als_pci_resume), - { 0, 0 } + DEVMETHOD(device_probe, als_pci_probe), + DEVMETHOD(device_attach, als_pci_attach), + DEVMETHOD(device_detach, als_pci_detach), + DEVMETHOD(device_suspend, als_pci_suspend), + DEVMETHOD(device_resume, als_pci_resume), { 0, 0 } }; static driver_t als_driver = { Index: sys/dev/sound/pci/atiixp.h =================================================================== --- sys/dev/sound/pci/atiixp.h +++ sys/dev/sound/pci/atiixp.h @@ -34,26 +34,26 @@ */ /* Number of playback / recording channel */ -#define ATI_IXP_NPCHAN 1 -#define ATI_IXP_NRCHAN 1 -#define ATI_IXP_NCHANS (ATI_IXP_NPCHAN + ATI_IXP_NRCHAN) +#define ATI_IXP_NPCHAN 1 +#define ATI_IXP_NRCHAN 1 +#define ATI_IXP_NCHANS (ATI_IXP_NPCHAN + ATI_IXP_NRCHAN) /* * Maximum segments/descriptors is 256, but 2 for * each channel should be more than enough for us. */ -#define ATI_IXP_DMA_CHSEGS 2 -#define ATI_IXP_DMA_CHSEGS_MIN 2 -#define ATI_IXP_DMA_CHSEGS_MAX 256 +#define ATI_IXP_DMA_CHSEGS 2 +#define ATI_IXP_DMA_CHSEGS_MIN 2 +#define ATI_IXP_DMA_CHSEGS_MAX 256 -#define ATI_VENDOR_ID 0x1002 /* ATI Technologies */ +#define ATI_VENDOR_ID 0x1002 /* ATI Technologies */ -#define ATI_IXP_200_ID 0x4341 -#define ATI_IXP_300_ID 0x4361 -#define ATI_IXP_400_ID 0x4370 -#define ATI_IXP_SB600_ID 0x4382 +#define ATI_IXP_200_ID 0x4341 +#define ATI_IXP_300_ID 0x4361 +#define ATI_IXP_400_ID 0x4370 +#define ATI_IXP_SB600_ID 0x4382 -#define ATI_IXP_BASE_RATE 48000 +#define ATI_IXP_BASE_RATE 48000 /* * Register definitions for ATI IXP @@ -63,141 +63,141 @@ #define ATI_IXP_CODECS 3 -#define ATI_REG_ISR 0x00 /* interrupt source */ -#define ATI_REG_ISR_IN_XRUN (1U<<0) -#define ATI_REG_ISR_IN_STATUS (1U<<1) -#define ATI_REG_ISR_OUT_XRUN (1U<<2) -#define ATI_REG_ISR_OUT_STATUS (1U<<3) -#define ATI_REG_ISR_SPDF_XRUN (1U<<4) -#define ATI_REG_ISR_SPDF_STATUS (1U<<5) -#define ATI_REG_ISR_PHYS_INTR (1U<<8) -#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9) -#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10) -#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11) -#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12) -#define ATI_REG_ISR_NEW_FRAME (1U<<13) - -#define ATI_REG_IER 0x04 /* interrupt enable */ -#define ATI_REG_IER_IN_XRUN_EN (1U<<0) -#define ATI_REG_IER_IO_STATUS_EN (1U<<1) -#define ATI_REG_IER_OUT_XRUN_EN (1U<<2) -#define ATI_REG_IER_OUT_XRUN_COND (1U<<3) -#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4) -#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5) -#define ATI_REG_IER_PHYS_INTR_EN (1U<<8) -#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9) -#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10) -#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11) -#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12) -#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO) */ -#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */ - -#define ATI_REG_CMD 0x08 /* command */ -#define ATI_REG_CMD_POWERDOWN (1U<<0) -#define ATI_REG_CMD_RECEIVE_EN (1U<<1) -#define ATI_REG_CMD_SEND_EN (1U<<2) -#define ATI_REG_CMD_STATUS_MEM (1U<<3) -#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4) -#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5) -#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6) -#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6 -#define ATI_REG_CMD_IN_DMA_EN (1U<<8) -#define ATI_REG_CMD_OUT_DMA_EN (1U<<9) -#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10) -#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11) -#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12) -#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12) -#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12) -#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12) -#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12) -#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16) -#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20) -#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21) -#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22) -#define ATI_REG_CMD_LOOPBACK_EN (1U<<23) -#define ATI_REG_CMD_PACKED_DIS (1U<<24) -#define ATI_REG_CMD_BURST_EN (1U<<25) -#define ATI_REG_CMD_PANIC_EN (1U<<26) -#define ATI_REG_CMD_MODEM_PRESENT (1U<<27) -#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28) -#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29) -#define ATI_REG_CMD_AC_SYNC (1U<<30) -#define ATI_REG_CMD_AC_RESET (1U<<31) - -#define ATI_REG_PHYS_OUT_ADDR 0x0c -#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0) -#define ATI_REG_PHYS_OUT_RW (1U<<2) -#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8) -#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9 -#define ATI_REG_PHYS_OUT_DATA_SHIFT 16 - -#define ATI_REG_PHYS_IN_ADDR 0x10 -#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8) -#define ATI_REG_PHYS_IN_ADDR_SHIFT 9 -#define ATI_REG_PHYS_IN_DATA_SHIFT 16 - -#define ATI_REG_SLOTREQ 0x14 - -#define ATI_REG_COUNTER 0x18 -#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */ -#define ATI_REG_COUNTER_BITCLOCK (31U<<8) - -#define ATI_REG_IN_FIFO_THRESHOLD 0x1c - -#define ATI_REG_IN_DMA_LINKPTR 0x20 -#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */ -#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */ -#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */ -#define ATI_REG_IN_DMA_DT_SIZE 0x30 - -#define ATI_REG_OUT_DMA_SLOT 0x34 -#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3)) -#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff -#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800 -#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11 - -#define ATI_REG_OUT_DMA_LINKPTR 0x38 -#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */ -#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */ -#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */ -#define ATI_REG_OUT_DMA_DT_SIZE 0x48 - -#define ATI_REG_SPDF_CMD 0x4c -#define ATI_REG_SPDF_CMD_LFSR (1U<<4) -#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5) -#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */ - -#define ATI_REG_SPDF_DMA_LINKPTR 0x50 -#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */ -#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */ -#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */ -#define ATI_REG_SPDF_DMA_DT_SIZE 0x60 - -#define ATI_REG_MODEM_MIRROR 0x7c -#define ATI_REG_AUDIO_MIRROR 0x80 - -#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */ -#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */ - -#define ATI_REG_FIFO_FLUSH 0x88 -#define ATI_REG_FIFO_OUT_FLUSH (1U<<0) -#define ATI_REG_FIFO_IN_FLUSH (1U<<1) +#define ATI_REG_ISR 0x00 /* interrupt source */ +#define ATI_REG_ISR_IN_XRUN (1U << 0) +#define ATI_REG_ISR_IN_STATUS (1U << 1) +#define ATI_REG_ISR_OUT_XRUN (1U << 2) +#define ATI_REG_ISR_OUT_STATUS (1U << 3) +#define ATI_REG_ISR_SPDF_XRUN (1U << 4) +#define ATI_REG_ISR_SPDF_STATUS (1U << 5) +#define ATI_REG_ISR_PHYS_INTR (1U << 8) +#define ATI_REG_ISR_PHYS_MISMATCH (1U << 9) +#define ATI_REG_ISR_CODEC0_NOT_READY (1U << 10) +#define ATI_REG_ISR_CODEC1_NOT_READY (1U << 11) +#define ATI_REG_ISR_CODEC2_NOT_READY (1U << 12) +#define ATI_REG_ISR_NEW_FRAME (1U << 13) + +#define ATI_REG_IER 0x04 /* interrupt enable */ +#define ATI_REG_IER_IN_XRUN_EN (1U << 0) +#define ATI_REG_IER_IO_STATUS_EN (1U << 1) +#define ATI_REG_IER_OUT_XRUN_EN (1U << 2) +#define ATI_REG_IER_OUT_XRUN_COND (1U << 3) +#define ATI_REG_IER_SPDF_XRUN_EN (1U << 4) +#define ATI_REG_IER_SPDF_STATUS_EN (1U << 5) +#define ATI_REG_IER_PHYS_INTR_EN (1U << 8) +#define ATI_REG_IER_PHYS_MISMATCH_EN (1U << 9) +#define ATI_REG_IER_CODEC0_INTR_EN (1U << 10) +#define ATI_REG_IER_CODEC1_INTR_EN (1U << 11) +#define ATI_REG_IER_CODEC2_INTR_EN (1U << 12) +#define ATI_REG_IER_NEW_FRAME_EN (1U << 13) /* (RO) */ +#define ATI_REG_IER_SET_BUS_BUSY (1U << 14) /* (WO) audio is running */ + +#define ATI_REG_CMD 0x08 /* command */ +#define ATI_REG_CMD_POWERDOWN (1U << 0) +#define ATI_REG_CMD_RECEIVE_EN (1U << 1) +#define ATI_REG_CMD_SEND_EN (1U << 2) +#define ATI_REG_CMD_STATUS_MEM (1U << 3) +#define ATI_REG_CMD_SPDF_OUT_EN (1U << 4) +#define ATI_REG_CMD_SPDF_STATUS_MEM (1U << 5) +#define ATI_REG_CMD_SPDF_THRESHOLD (3U << 6) +#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6 +#define ATI_REG_CMD_IN_DMA_EN (1U << 8) +#define ATI_REG_CMD_OUT_DMA_EN (1U << 9) +#define ATI_REG_CMD_SPDF_DMA_EN (1U << 10) +#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U << 11) +#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U << 12) +#define ATI_REG_CMD_SPDF_CONFIG_34 (1U << 12) +#define ATI_REG_CMD_SPDF_CONFIG_78 (2U << 12) +#define ATI_REG_CMD_SPDF_CONFIG_69 (3U << 12) +#define ATI_REG_CMD_SPDF_CONFIG_01 (4U << 12) +#define ATI_REG_CMD_INTERLEAVE_SPDF (1U << 16) +#define ATI_REG_CMD_AUDIO_PRESENT (1U << 20) +#define ATI_REG_CMD_INTERLEAVE_IN (1U << 21) +#define ATI_REG_CMD_INTERLEAVE_OUT (1U << 22) +#define ATI_REG_CMD_LOOPBACK_EN (1U << 23) +#define ATI_REG_CMD_PACKED_DIS (1U << 24) +#define ATI_REG_CMD_BURST_EN (1U << 25) +#define ATI_REG_CMD_PANIC_EN (1U << 26) +#define ATI_REG_CMD_MODEM_PRESENT (1U << 27) +#define ATI_REG_CMD_ACLINK_ACTIVE (1U << 28) +#define ATI_REG_CMD_AC_SOFT_RESET (1U << 29) +#define ATI_REG_CMD_AC_SYNC (1U << 30) +#define ATI_REG_CMD_AC_RESET (1U << 31) + +#define ATI_REG_PHYS_OUT_ADDR 0x0c +#define ATI_REG_PHYS_OUT_CODEC_MASK (3U << 0) +#define ATI_REG_PHYS_OUT_RW (1U << 2) +#define ATI_REG_PHYS_OUT_ADDR_EN (1U << 8) +#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9 +#define ATI_REG_PHYS_OUT_DATA_SHIFT 16 + +#define ATI_REG_PHYS_IN_ADDR 0x10 +#define ATI_REG_PHYS_IN_READ_FLAG (1U << 8) +#define ATI_REG_PHYS_IN_ADDR_SHIFT 9 +#define ATI_REG_PHYS_IN_DATA_SHIFT 16 + +#define ATI_REG_SLOTREQ 0x14 + +#define ATI_REG_COUNTER 0x18 +#define ATI_REG_COUNTER_SLOT (3U << 0) /* slot # */ +#define ATI_REG_COUNTER_BITCLOCK (31U << 8) + +#define ATI_REG_IN_FIFO_THRESHOLD 0x1c + +#define ATI_REG_IN_DMA_LINKPTR 0x20 +#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */ +#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */ +#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */ +#define ATI_REG_IN_DMA_DT_SIZE 0x30 + +#define ATI_REG_OUT_DMA_SLOT 0x34 +#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x)-3)) +#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff +#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800 +#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11 + +#define ATI_REG_OUT_DMA_LINKPTR 0x38 +#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */ +#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */ +#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */ +#define ATI_REG_OUT_DMA_DT_SIZE 0x48 + +#define ATI_REG_SPDF_CMD 0x4c +#define ATI_REG_SPDF_CMD_LFSR (1U << 4) +#define ATI_REG_SPDF_CMD_SINGLE_CH (1U << 5) +#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff << 8) /* RO */ + +#define ATI_REG_SPDF_DMA_LINKPTR 0x50 +#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */ +#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */ +#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */ +#define ATI_REG_SPDF_DMA_DT_SIZE 0x60 + +#define ATI_REG_MODEM_MIRROR 0x7c +#define ATI_REG_AUDIO_MIRROR 0x80 + +#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */ +#define ATI_REG_6CH_REORDER_EN (1U << 0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */ + +#define ATI_REG_FIFO_FLUSH 0x88 +#define ATI_REG_FIFO_OUT_FLUSH (1U << 0) +#define ATI_REG_FIFO_IN_FLUSH (1U << 1) /* LINKPTR */ -#define ATI_REG_LINKPTR_EN (1U<<0) +#define ATI_REG_LINKPTR_EN (1U << 0) /* [INT|OUT|SPDIF]_DMA_DT_SIZE */ -#define ATI_REG_DMA_DT_SIZE (0xffffU<<0) -#define ATI_REG_DMA_FIFO_USED (0x1fU<<16) -#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21) -#define ATI_REG_DMA_STATE (7U<<26) +#define ATI_REG_DMA_DT_SIZE (0xffffU << 0) +#define ATI_REG_DMA_FIFO_USED (0x1fU << 16) +#define ATI_REG_DMA_FIFO_FREE (0x1fU << 21) +#define ATI_REG_DMA_STATE (7U << 26) -#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */ +#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */ /* codec detection constant indicating the interrupt flags */ -#define ALL_CODECS_NOT_READY \ - (ATI_REG_ISR_CODEC0_NOT_READY | ATI_REG_ISR_CODEC1_NOT_READY |\ - ATI_REG_ISR_CODEC2_NOT_READY) -#define CODEC_CHECK_BITS (ALL_CODECS_NOT_READY|ATI_REG_ISR_NEW_FRAME) +#define ALL_CODECS_NOT_READY \ + (ATI_REG_ISR_CODEC0_NOT_READY | ATI_REG_ISR_CODEC1_NOT_READY | \ + ATI_REG_ISR_CODEC2_NOT_READY) +#define CODEC_CHECK_BITS (ALL_CODECS_NOT_READY | ATI_REG_ISR_NEW_FRAME) #endif Index: sys/dev/sound/pci/atiixp.c =================================================================== --- sys/dev/sound/pci/atiixp.c +++ sys/dev/sound/pci/atiixp.c @@ -59,27 +59,26 @@ #include "opt_snd.h" #endif -#include -#include +#include +#include #include #include -#include -#include - #include +#include +#include -#define ATI_IXP_DMA_RETRY_MAX 100 +#define ATI_IXP_DMA_RETRY_MAX 100 -#define ATI_IXP_BUFSZ_MIN 4096 -#define ATI_IXP_BUFSZ_MAX 65536 -#define ATI_IXP_BUFSZ_DEFAULT 16384 +#define ATI_IXP_BUFSZ_MIN 4096 +#define ATI_IXP_BUFSZ_MAX 65536 +#define ATI_IXP_BUFSZ_DEFAULT 16384 -#define ATI_IXP_BLK_MIN 32 -#define ATI_IXP_BLK_ALIGN (~(ATI_IXP_BLK_MIN - 1)) +#define ATI_IXP_BLK_MIN 32 +#define ATI_IXP_BLK_ALIGN (~(ATI_IXP_BLK_MIN - 1)) -#define ATI_IXP_CHN_RUNNING 0x00000001 -#define ATI_IXP_CHN_SUSPEND 0x00000002 +#define ATI_IXP_CHN_RUNNING 0x00000001 +#define ATI_IXP_CHN_SUSPEND 0x00000002 struct atiixp_dma_op { volatile uint32_t addr; @@ -134,42 +133,29 @@ int poll_ticks, polling; }; -#define atiixp_rd(_sc, _reg) \ - bus_space_read_4((_sc)->st, (_sc)->sh, _reg) -#define atiixp_wr(_sc, _reg, _val) \ - bus_space_write_4((_sc)->st, (_sc)->sh, _reg, _val) +#define atiixp_rd(_sc, _reg) bus_space_read_4((_sc)->st, (_sc)->sh, _reg) +#define atiixp_wr(_sc, _reg, _val) \ + bus_space_write_4((_sc)->st, (_sc)->sh, _reg, _val) -#define atiixp_lock(_sc) snd_mtxlock((_sc)->lock) -#define atiixp_unlock(_sc) snd_mtxunlock((_sc)->lock) -#define atiixp_assert(_sc) snd_mtxassert((_sc)->lock) +#define atiixp_lock(_sc) snd_mtxlock((_sc)->lock) +#define atiixp_unlock(_sc) snd_mtxunlock((_sc)->lock) +#define atiixp_assert(_sc) snd_mtxassert((_sc)->lock) -static uint32_t atiixp_fmt_32bit[] = { - SND_FORMAT(AFMT_S16_LE, 2, 0), - SND_FORMAT(AFMT_S32_LE, 2, 0), - 0 -}; +static uint32_t atiixp_fmt_32bit[] = { SND_FORMAT(AFMT_S16_LE, 2, 0), + SND_FORMAT(AFMT_S32_LE, 2, 0), 0 }; -static uint32_t atiixp_fmt[] = { - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; +static uint32_t atiixp_fmt[] = { SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; -static struct pcmchan_caps atiixp_caps_32bit = { - ATI_IXP_BASE_RATE, - ATI_IXP_BASE_RATE, - atiixp_fmt_32bit, 0 -}; +static struct pcmchan_caps atiixp_caps_32bit = { ATI_IXP_BASE_RATE, + ATI_IXP_BASE_RATE, atiixp_fmt_32bit, 0 }; -static struct pcmchan_caps atiixp_caps = { - ATI_IXP_BASE_RATE, - ATI_IXP_BASE_RATE, - atiixp_fmt, 0 -}; +static struct pcmchan_caps atiixp_caps = { ATI_IXP_BASE_RATE, ATI_IXP_BASE_RATE, + atiixp_fmt, 0 }; static const struct { uint16_t vendor; uint16_t devid; - char *desc; + char *desc; } atiixp_hw[] = { { ATI_VENDOR_ID, ATI_IXP_200_ID, "ATI IXP 200" }, { ATI_VENDOR_ID, ATI_IXP_300_ID, "ATI IXP 300" }, @@ -188,16 +174,16 @@ static int atiixp_rdcd(kobj_t, void *, int); static int atiixp_wrcd(kobj_t, void *, int, uint32_t); -static void *atiixp_chan_init(kobj_t, void *, struct snd_dbuf *, - struct pcm_channel *, int); -static int atiixp_chan_setformat(kobj_t, void *, uint32_t); -static uint32_t atiixp_chan_setspeed(kobj_t, void *, uint32_t); -static int atiixp_chan_setfragments(kobj_t, void *, uint32_t, uint32_t); -static uint32_t atiixp_chan_setblocksize(kobj_t, void *, uint32_t); -static void atiixp_buildsgdt(struct atiixp_chinfo *); -static int atiixp_chan_trigger(kobj_t, void *, int); +static void *atiixp_chan_init(kobj_t, void *, struct snd_dbuf *, + struct pcm_channel *, int); +static int atiixp_chan_setformat(kobj_t, void *, uint32_t); +static uint32_t atiixp_chan_setspeed(kobj_t, void *, uint32_t); +static int atiixp_chan_setfragments(kobj_t, void *, uint32_t, uint32_t); +static uint32_t atiixp_chan_setblocksize(kobj_t, void *, uint32_t); +static void atiixp_buildsgdt(struct atiixp_chinfo *); +static int atiixp_chan_trigger(kobj_t, void *, int); static __inline uint32_t atiixp_dmapos(struct atiixp_chinfo *); -static uint32_t atiixp_chan_getptr(kobj_t, void *); +static uint32_t atiixp_chan_getptr(kobj_t, void *); static struct pcmchan_caps *atiixp_chan_getcaps(kobj_t, void *); static void atiixp_intr(void *); @@ -205,11 +191,11 @@ static void atiixp_chip_pre_init(struct atiixp_info *); static void atiixp_chip_post_init(void *); static void atiixp_release_resource(struct atiixp_info *); -static int atiixp_pci_probe(device_t); -static int atiixp_pci_attach(device_t); -static int atiixp_pci_detach(device_t); -static int atiixp_pci_suspend(device_t); -static int atiixp_pci_resume(device_t); +static int atiixp_pci_probe(device_t); +static int atiixp_pci_attach(device_t); +static int atiixp_pci_detach(device_t); +static int atiixp_pci_suspend(device_t); +static int atiixp_pci_resume(device_t); /* * ATI IXP helper functions @@ -272,16 +258,16 @@ } /* perform a soft reset */ - value = atiixp_rd(sc, ATI_REG_CMD); + value = atiixp_rd(sc, ATI_REG_CMD); value |= ATI_REG_CMD_AC_SOFT_RESET; atiixp_wr(sc, ATI_REG_CMD, value); /* need to read the CMD reg and wait aprox. 10 usec to init */ - value = atiixp_rd(sc, ATI_REG_CMD); + value = atiixp_rd(sc, ATI_REG_CMD); DELAY(20); /* clear soft reset flag again */ - value = atiixp_rd(sc, ATI_REG_CMD); + value = atiixp_rd(sc, ATI_REG_CMD); value &= ~ATI_REG_CMD_AC_SOFT_RESET; atiixp_wr(sc, ATI_REG_CMD, value); @@ -295,7 +281,7 @@ /* dip aclink reset but keep the acsync */ value &= ~ATI_REG_CMD_AC_RESET; - value |= ATI_REG_CMD_AC_SYNC; + value |= ATI_REG_CMD_AC_SYNC; atiixp_wr(sc, ATI_REG_CMD, value); /* need to read CMD again and wait again (clocking in issue?) */ @@ -304,7 +290,7 @@ /* assert aclink reset again */ value = atiixp_rd(sc, ATI_REG_CMD); - value |= ATI_REG_CMD_AC_RESET; + value |= ATI_REG_CMD_AC_RESET; atiixp_wr(sc, ATI_REG_CMD, value); /* check if its active now */ @@ -319,7 +305,7 @@ #endif /* assert reset and sync for safety */ - value = atiixp_rd(sc, ATI_REG_CMD); + value = atiixp_rd(sc, ATI_REG_CMD); value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET; atiixp_wr(sc, ATI_REG_CMD, value); } @@ -364,7 +350,7 @@ do { if ((atiixp_rd(sc, ATI_REG_PHYS_OUT_ADDR) & - ATI_REG_PHYS_OUT_ADDR_EN) == 0) + ATI_REG_PHYS_OUT_ADDR_EN) == 0) return (0); DELAY(1); } while (--timeout); @@ -382,8 +368,8 @@ if (atiixp_waitready_codec(sc)) return (-1); - data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | - ATI_REG_PHYS_OUT_ADDR_EN | ATI_REG_PHYS_OUT_RW | sc->codec_idx; + data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | ATI_REG_PHYS_OUT_ADDR_EN | + ATI_REG_PHYS_OUT_RW | sc->codec_idx; atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data); @@ -421,11 +407,9 @@ return (0); } -static kobj_method_t atiixp_ac97_methods[] = { - KOBJMETHOD(ac97_read, atiixp_rdcd), - KOBJMETHOD(ac97_write, atiixp_wrcd), - KOBJMETHOD_END -}; +static kobj_method_t atiixp_ac97_methods[] = { KOBJMETHOD(ac97_read, + atiixp_rdcd), + KOBJMETHOD(ac97_write, atiixp_wrcd), KOBJMETHOD_END }; AC97_DECLARE(atiixp_ac97); /* @@ -433,7 +417,7 @@ */ static void * atiixp_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, - struct pcm_channel *c, int dir) + struct pcm_channel *c, int dir) { struct atiixp_info *sc = devinfo; struct atiixp_chinfo *ch; @@ -474,8 +458,8 @@ atiixp_lock(sc); num = sc->registered_channels++; ch->sgd_table = &sc->sgd_table[num * ATI_IXP_DMA_CHSEGS_MAX]; - ch->sgd_addr = sc->sgd_addr + (num * ATI_IXP_DMA_CHSEGS_MAX * - sizeof(struct atiixp_dma_op)); + ch->sgd_addr = sc->sgd_addr + + (num * ATI_IXP_DMA_CHSEGS_MAX * sizeof(struct atiixp_dma_op)); atiixp_disable_dma(ch); atiixp_unlock(sc); @@ -527,8 +511,8 @@ } static int -atiixp_chan_setfragments(kobj_t obj, void *data, - uint32_t blksz, uint32_t blkcnt) +atiixp_chan_setfragments(kobj_t obj, void *data, uint32_t blksz, + uint32_t blkcnt) { struct atiixp_chinfo *ch = data; struct atiixp_info *sc = ch->parent; @@ -554,7 +538,7 @@ } if ((sndbuf_getblksz(ch->buffer) != blksz || - sndbuf_getblkcnt(ch->buffer) != blkcnt) && + sndbuf_getblkcnt(ch->buffer) != blkcnt) && sndbuf_resize(ch->buffer, blkcnt, blksz) != 0) device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n", __func__, blksz, blkcnt); @@ -681,8 +665,8 @@ return (1); } -#define atiixp_chan_active(sc) (((sc)->pch.flags | (sc)->rch.flags) & \ - ATI_IXP_CHN_RUNNING) +#define atiixp_chan_active(sc) \ + (((sc)->pch.flags | (sc)->rch.flags) & ATI_IXP_CHN_RUNNING) static void atiixp_poll_callback(void *arg) @@ -703,7 +687,7 @@ trigger |= (atiixp_poll_channel(&sc->rch) != 0) ? 2 : 0; /* XXX */ - callout_reset(&sc->poll_timer, 1/*sc->poll_ticks*/, + callout_reset(&sc->poll_timer, 1 /*sc->poll_ticks*/, atiixp_poll_callback, sc); atiixp_unlock(sc); @@ -740,7 +724,7 @@ ch->prevptr = 0; pollticks = ((uint64_t)hz * ch->blksz) / ((uint64_t)sndbuf_getalign(ch->buffer) * - sndbuf_getspd(ch->buffer)); + sndbuf_getspd(ch->buffer)); pollticks >>= 2; if (pollticks > hz) pollticks = hz; @@ -782,7 +766,7 @@ ch = &sc->rch; pollticks = ((uint64_t)hz * ch->blksz) / ((uint64_t)sndbuf_getalign(ch->buffer) * - sndbuf_getspd(ch->buffer)); + sndbuf_getspd(ch->buffer)); pollticks >>= 2; if (pollticks > hz) pollticks = hz; @@ -795,9 +779,8 @@ __func__, sc->poll_ticks, pollticks); sc->poll_ticks = pollticks; - callout_reset(&sc->poll_timer, - 1, atiixp_poll_callback, - sc); + callout_reset(&sc->poll_timer, 1, + atiixp_poll_callback, sc); } } } @@ -810,8 +793,9 @@ /* Update bus busy status */ value = atiixp_rd(sc, ATI_REG_IER); - if (atiixp_rd(sc, ATI_REG_CMD) & (ATI_REG_CMD_SEND_EN | - ATI_REG_CMD_RECEIVE_EN | ATI_REG_CMD_SPDF_OUT_EN)) + if (atiixp_rd(sc, ATI_REG_CMD) & + (ATI_REG_CMD_SEND_EN | ATI_REG_CMD_RECEIVE_EN | + ATI_REG_CMD_SPDF_OUT_EN)) value |= ATI_REG_IER_SET_BUS_BUSY; else value &= ~ATI_REG_IER_SET_BUS_BUSY; @@ -849,17 +833,15 @@ return (&atiixp_caps); } -static kobj_method_t atiixp_chan_methods[] = { - KOBJMETHOD(channel_init, atiixp_chan_init), - KOBJMETHOD(channel_setformat, atiixp_chan_setformat), - KOBJMETHOD(channel_setspeed, atiixp_chan_setspeed), - KOBJMETHOD(channel_setblocksize, atiixp_chan_setblocksize), - KOBJMETHOD(channel_setfragments, atiixp_chan_setfragments), - KOBJMETHOD(channel_trigger, atiixp_chan_trigger), - KOBJMETHOD(channel_getptr, atiixp_chan_getptr), - KOBJMETHOD(channel_getcaps, atiixp_chan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t atiixp_chan_methods[] = { KOBJMETHOD(channel_init, + atiixp_chan_init), + KOBJMETHOD(channel_setformat, atiixp_chan_setformat), + KOBJMETHOD(channel_setspeed, atiixp_chan_setspeed), + KOBJMETHOD(channel_setblocksize, atiixp_chan_setblocksize), + KOBJMETHOD(channel_setfragments, atiixp_chan_setfragments), + KOBJMETHOD(channel_trigger, atiixp_chan_trigger), + KOBJMETHOD(channel_getptr, atiixp_chan_getptr), + KOBJMETHOD(channel_getcaps, atiixp_chan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(atiixp_chan); /* @@ -908,7 +890,7 @@ sc->codec_not_ready_bits |= detected_codecs; /* disable detected interrupt sources */ - enable = atiixp_rd(sc, ATI_REG_IER); + enable = atiixp_rd(sc, ATI_REG_IER); enable &= ~detected_codecs; atiixp_wr(sc, ATI_REG_IER, enable); wakeup(sc); @@ -944,7 +926,7 @@ /* clear all DMA enables (preserving rest of settings) */ value = atiixp_rd(sc, ATI_REG_CMD); value &= ~(ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_OUT_DMA_EN | - ATI_REG_CMD_SPDF_OUT_EN ); + ATI_REG_CMD_SPDF_OUT_EN); atiixp_wr(sc, ATI_REG_CMD, value); /* reset aclink */ @@ -1031,8 +1013,8 @@ if (sc->codec_not_ready_bits == 0 && timeout == 0) { device_printf(sc->dev, - "WARNING: timeout during codec detection; " - "codecs might be present but haven't interrupted\n"); + "WARNING: timeout during codec detection; " + "codecs might be present but haven't interrupted\n"); atiixp_unlock(sc); goto postinitbad; } @@ -1073,10 +1055,10 @@ subdev = (pci_get_subdevice(sc->dev) << 16) | pci_get_subvendor(sc->dev); switch (subdev) { - case 0x11831043: /* ASUS A6R */ - case 0x2043161f: /* Maxselect x710s - http://maxselect.ru/ */ - ac97_setflags(sc->codec, ac97_getflags(sc->codec) | - AC97_F_EAPD_INV); + case 0x11831043: /* ASUS A6R */ + case 0x2043161f: /* Maxselect x710s - http://maxselect.ru/ */ + ac97_setflags(sc->codec, + ac97_getflags(sc->codec) | AC97_F_EAPD_INV); break; default: break; @@ -1198,7 +1180,8 @@ sc->poll_ticks = 1; if (resource_int_value(device_get_name(sc->dev), - device_get_unit(sc->dev), "polling", &i) == 0 && i != 0) + device_get_unit(sc->dev), "polling", &i) == 0 && + i != 0) sc->polling = 1; else sc->polling = 0; @@ -1207,8 +1190,8 @@ sc->regid = PCIR_BAR(0); sc->regtype = SYS_RES_MEMORY; - sc->reg = bus_alloc_resource_any(dev, sc->regtype, - &sc->regid, RF_ACTIVE); + sc->reg = bus_alloc_resource_any(dev, sc->regtype, &sc->regid, + RF_ACTIVE); if (!sc->reg) { device_printf(dev, "unable to allocate register space\n"); @@ -1224,8 +1207,9 @@ sc->irqid = 0; sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, RF_ACTIVE | RF_SHAREABLE); - if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE, - atiixp_intr, sc, &sc->ih)) { + if (!sc->irq || + snd_setup_intr(dev, sc->irq, INTR_MPSAFE, atiixp_intr, sc, + &sc->ih)) { device_printf(dev, "unable to map interrupt\n"); goto bad; } @@ -1233,8 +1217,9 @@ /* * Let the user choose the best DMA segments. */ - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "blocksize", &i) == 0 && i > 0) { + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "blocksize", &i) == 0 && + i > 0) { i &= ATI_IXP_BLK_ALIGN; if (i < ATI_IXP_BLK_MIN) i = ATI_IXP_BLK_MIN; @@ -1254,47 +1239,47 @@ /* * DMA tag for scatter-gather buffers and link pointers */ - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, - /*lockarg*/NULL, &sc->parent_dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ sc->bufsz, /*nsegments*/ 1, /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, + /*lockarg*/ NULL, &sc->parent_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS * - sizeof(struct atiixp_dma_op), - /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, - /*lockarg*/NULL, &sc->sgd_dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS * + sizeof(struct atiixp_dma_op), + /*nsegments*/ 1, /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, + /*lockarg*/ NULL, &sc->sgd_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } if (bus_dmamem_alloc(sc->sgd_dmat, (void **)&sc->sgd_table, - BUS_DMA_NOWAIT, &sc->sgd_dmamap) == -1) + BUS_DMA_NOWAIT, &sc->sgd_dmamap) == -1) goto bad; if (bus_dmamap_load(sc->sgd_dmat, sc->sgd_dmamap, sc->sgd_table, - ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS * - sizeof(struct atiixp_dma_op), atiixp_dma_cb, sc, 0)) + ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS * + sizeof(struct atiixp_dma_op), + atiixp_dma_cb, sc, 0)) goto bad; atiixp_chip_pre_init(sc); sc->delayed_attach.ich_func = atiixp_chip_post_init; sc->delayed_attach.ich_arg = sc; - if (cold == 0 || - config_intrhook_establish(&sc->delayed_attach) != 0) { + if (cold == 0 || config_intrhook_establish(&sc->delayed_attach) != 0) { sc->delayed_attach.ich_func = NULL; atiixp_chip_post_init(sc); } @@ -1400,14 +1385,12 @@ return (0); } -static device_method_t atiixp_methods[] = { - DEVMETHOD(device_probe, atiixp_pci_probe), - DEVMETHOD(device_attach, atiixp_pci_attach), - DEVMETHOD(device_detach, atiixp_pci_detach), - DEVMETHOD(device_suspend, atiixp_pci_suspend), - DEVMETHOD(device_resume, atiixp_pci_resume), - { 0, 0 } -}; +static device_method_t atiixp_methods[] = { DEVMETHOD(device_probe, + atiixp_pci_probe), + DEVMETHOD(device_attach, atiixp_pci_attach), + DEVMETHOD(device_detach, atiixp_pci_detach), + DEVMETHOD(device_suspend, atiixp_pci_suspend), + DEVMETHOD(device_resume, atiixp_pci_resume), { 0, 0 } }; static driver_t atiixp_driver = { "pcm", Index: sys/dev/sound/pci/cmi.c =================================================================== --- sys/dev/sound/pci/cmi.c +++ sys/dev/sound/pci/cmi.c @@ -48,50 +48,49 @@ #include "opt_snd.h" #endif -#include -#include -#include +#include #include #include - -#include +#include #include +#include +#include #include "mixer_if.h" #include "mpufoi_if.h" /* Supported chip ID's */ -#define CMI8338A_PCI_ID 0x010013f6 -#define CMI8338B_PCI_ID 0x010113f6 -#define CMI8738_PCI_ID 0x011113f6 -#define CMI8738B_PCI_ID 0x011213f6 -#define CMI120_USB_ID 0x01030d8c +#define CMI8338A_PCI_ID 0x010013f6 +#define CMI8338B_PCI_ID 0x010113f6 +#define CMI8738_PCI_ID 0x011113f6 +#define CMI8738B_PCI_ID 0x011213f6 +#define CMI120_USB_ID 0x01030d8c /* Buffer size max is 64k for permitted DMA boundaries */ -#define CMI_DEFAULT_BUFSZ 16384 +#define CMI_DEFAULT_BUFSZ 16384 /* Interrupts per length of buffer */ -#define CMI_INTR_PER_BUFFER 2 +#define CMI_INTR_PER_BUFFER 2 /* Clarify meaning of named defines in cmireg.h */ -#define CMPCI_REG_DMA0_MAX_SAMPLES CMPCI_REG_DMA0_BYTES +#define CMPCI_REG_DMA0_MAX_SAMPLES CMPCI_REG_DMA0_BYTES #define CMPCI_REG_DMA0_INTR_SAMPLES CMPCI_REG_DMA0_SAMPLES -#define CMPCI_REG_DMA1_MAX_SAMPLES CMPCI_REG_DMA1_BYTES +#define CMPCI_REG_DMA1_MAX_SAMPLES CMPCI_REG_DMA1_BYTES #define CMPCI_REG_DMA1_INTR_SAMPLES CMPCI_REG_DMA1_SAMPLES /* Our indication of custom mixer control */ -#define CMPCI_NON_SB16_CONTROL 0xff +#define CMPCI_NON_SB16_CONTROL 0xff /* Debugging macro's */ #undef DEB #ifndef DEB #define DEB(x) /* x */ -#endif /* DEB */ +#endif /* DEB */ #ifndef DEBMIX #define DEBMIX(x) /* x */ -#endif /* DEBMIX */ +#endif /* DEBMIX */ /* ------------------------------------------------------------------------- */ /* Structures */ @@ -99,48 +98,44 @@ struct sc_info; struct sc_chinfo { - struct sc_info *parent; - struct pcm_channel *channel; - struct snd_dbuf *buffer; - u_int32_t fmt, spd, phys_buf, bps; - u_int32_t dma_active:1, dma_was_active:1; - int dir; + struct sc_info *parent; + struct pcm_channel *channel; + struct snd_dbuf *buffer; + u_int32_t fmt, spd, phys_buf, bps; + u_int32_t dma_active : 1, dma_was_active : 1; + int dir; }; struct sc_info { - device_t dev; - - bus_space_tag_t st; - bus_space_handle_t sh; - bus_dma_tag_t parent_dmat; - struct resource *reg, *irq; - int regid, irqid; - void *ih; - struct mtx *lock; - - int spdif_enabled; - unsigned int bufsz; - struct sc_chinfo pch, rch; - - struct mpu401 *mpu; - mpu401_intr_t *mpu_intr; + device_t dev; + + bus_space_tag_t st; + bus_space_handle_t sh; + bus_dma_tag_t parent_dmat; + struct resource *reg, *irq; + int regid, irqid; + void *ih; + struct mtx *lock; + + int spdif_enabled; + unsigned int bufsz; + struct sc_chinfo pch, rch; + + struct mpu401 *mpu; + mpu401_intr_t *mpu_intr; struct resource *mpu_reg; int mpu_regid; - bus_space_tag_t mpu_bt; - bus_space_handle_t mpu_bh; + bus_space_tag_t mpu_bt; + bus_space_handle_t mpu_bh; }; /* Channel caps */ -static u_int32_t cmi_fmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; +static u_int32_t cmi_fmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; -static struct pcmchan_caps cmi_caps = {5512, 48000, cmi_fmt, 0}; +static struct pcmchan_caps cmi_caps = { 5512, 48000, cmi_fmt, 0 }; /* ------------------------------------------------------------------------- */ /* Register Utilities */ @@ -178,8 +173,8 @@ } static void -cmi_partial_wr4(struct sc_info *sc, - int reg, int shift, u_int32_t mask, u_int32_t val) +cmi_partial_wr4(struct sc_info *sc, int reg, int shift, u_int32_t mask, + u_int32_t val) { u_int32_t r; @@ -212,9 +207,9 @@ /* ------------------------------------------------------------------------- */ /* Rate Mapping */ -static int cmi_rates[] = {5512, 8000, 11025, 16000, - 22050, 32000, 44100, 48000}; -#define NUM_CMI_RATES (sizeof(cmi_rates)/sizeof(cmi_rates[0])) +static int cmi_rates[] = { 5512, 8000, 11025, 16000, 22050, 32000, 44100, + 48000 }; +#define NUM_CMI_RATES (sizeof(cmi_rates) / sizeof(cmi_rates[0])) /* cmpci_rate_to_regvalue returns sampling freq selector for FCR1 * register - reg order is 5k,11k,22k,44k,8k,16k,32k,48k */ @@ -224,7 +219,7 @@ { int i, r; - for(i = 0; i < NUM_CMI_RATES - 1; i++) { + for (i = 0; i < NUM_CMI_RATES - 1; i++) { if (rate < ((cmi_rates[i] + cmi_rates[i + 1]) / 2)) { break; } @@ -273,8 +268,7 @@ cmi_dma_prog(sc, ch, CMPCI_REG_DMA0_BASE); cmi_set4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); - cmi_set4(sc, CMPCI_REG_INTR_CTRL, - CMPCI_REG_CH0_INTR_ENABLE); + cmi_set4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); ch->dma_active = 1; } @@ -286,8 +280,8 @@ cmi_clr4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); cmi_clr4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE); - cmi_set4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); - cmi_clr4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); + cmi_set4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); + cmi_clr4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET); ch->dma_active = 0; return r; } @@ -298,8 +292,7 @@ cmi_dma_prog(sc, ch, CMPCI_REG_DMA1_BASE); cmi_set4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); /* Enable Interrupts */ - cmi_set4(sc, CMPCI_REG_INTR_CTRL, - CMPCI_REG_CH1_INTR_ENABLE); + cmi_set4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); DEB(printf("cmi_ch1_start: dma prog\n")); ch->dma_active = 1; } @@ -311,49 +304,50 @@ cmi_clr4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); cmi_clr4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE); - cmi_set4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); - cmi_clr4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); + cmi_set4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); + cmi_clr4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET); ch->dma_active = 0; return r; } static void -cmi_spdif_speed(struct sc_info *sc, int speed) { +cmi_spdif_speed(struct sc_info *sc, int speed) +{ u_int32_t fcr1, lcr, mcr; if (speed >= 44100) { fcr1 = CMPCI_REG_SPDIF0_ENABLE; - lcr = CMPCI_REG_XSPDIF_ENABLE; - mcr = (speed == 48000) ? - CMPCI_REG_W_SPDIF_48L | CMPCI_REG_SPDIF_48K : 0; + lcr = CMPCI_REG_XSPDIF_ENABLE; + mcr = (speed == 48000) ? + CMPCI_REG_W_SPDIF_48L | CMPCI_REG_SPDIF_48K : + 0; } else { fcr1 = mcr = lcr = 0; } cmi_partial_wr4(sc, CMPCI_REG_MISC, 0, - CMPCI_REG_W_SPDIF_48L | CMPCI_REG_SPDIF_48K, mcr); - cmi_partial_wr4(sc, CMPCI_REG_FUNC_1, 0, - CMPCI_REG_SPDIF0_ENABLE, fcr1); - cmi_partial_wr4(sc, CMPCI_REG_LEGACY_CTRL, 0, - CMPCI_REG_XSPDIF_ENABLE, lcr); + CMPCI_REG_W_SPDIF_48L | CMPCI_REG_SPDIF_48K, mcr); + cmi_partial_wr4(sc, CMPCI_REG_FUNC_1, 0, CMPCI_REG_SPDIF0_ENABLE, fcr1); + cmi_partial_wr4(sc, CMPCI_REG_LEGACY_CTRL, 0, CMPCI_REG_XSPDIF_ENABLE, + lcr); } /* ------------------------------------------------------------------------- */ /* Channel Interface implementation */ static void * -cmichan_init(kobj_t obj, void *devinfo, - struct snd_dbuf *b, struct pcm_channel *c, int dir) +cmichan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { - struct sc_info *sc = devinfo; + struct sc_info *sc = devinfo; struct sc_chinfo *ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch; - ch->parent = sc; - ch->channel = c; - ch->bps = 1; - ch->fmt = SND_FORMAT(AFMT_U8, 1, 0); - ch->spd = DSP_DEFAULT_SPEED; - ch->buffer = b; + ch->parent = sc; + ch->channel = c; + ch->bps = 1; + ch->fmt = SND_FORMAT(AFMT_U8, 1, 0); + ch->spd = DSP_DEFAULT_SPEED; + ch->buffer = b; ch->dma_active = 0; if (sndbuf_alloc(ch->buffer, sc->parent_dmat, 0, sc->bufsz) != 0) { DEB(printf("cmichan_init failed\n")); @@ -376,7 +370,7 @@ cmichan_setformat(kobj_t obj, void *data, u_int32_t format) { struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; + struct sc_info *sc = ch->parent; u_int32_t f; if (format & AFMT_S16_LE) { @@ -396,17 +390,11 @@ snd_mtxlock(sc->lock); if (ch->dir == PCMDIR_PLAY) { - cmi_partial_wr4(ch->parent, - CMPCI_REG_CHANNEL_FORMAT, - CMPCI_REG_CH0_FORMAT_SHIFT, - CMPCI_REG_CH0_FORMAT_MASK, - f); + cmi_partial_wr4(ch->parent, CMPCI_REG_CHANNEL_FORMAT, + CMPCI_REG_CH0_FORMAT_SHIFT, CMPCI_REG_CH0_FORMAT_MASK, f); } else { - cmi_partial_wr4(ch->parent, - CMPCI_REG_CHANNEL_FORMAT, - CMPCI_REG_CH1_FORMAT_SHIFT, - CMPCI_REG_CH1_FORMAT_MASK, - f); + cmi_partial_wr4(ch->parent, CMPCI_REG_CHANNEL_FORMAT, + CMPCI_REG_CH1_FORMAT_SHIFT, CMPCI_REG_CH1_FORMAT_MASK, f); } snd_mtxunlock(sc->lock); ch->fmt = format; @@ -418,7 +406,7 @@ cmichan_setspeed(kobj_t obj, void *data, u_int32_t speed) { struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; + struct sc_info *sc = ch->parent; u_int32_t r, rsp __unused; r = cmpci_rate_to_regvalue(speed); @@ -428,34 +416,28 @@ /* disable if req before rate change */ cmi_spdif_speed(ch->parent, speed); } - cmi_partial_wr4(ch->parent, - CMPCI_REG_FUNC_1, - CMPCI_REG_DAC_FS_SHIFT, - CMPCI_REG_DAC_FS_MASK, - r); + cmi_partial_wr4(ch->parent, CMPCI_REG_FUNC_1, + CMPCI_REG_DAC_FS_SHIFT, CMPCI_REG_DAC_FS_MASK, r); if (speed >= 44100 && ch->parent->spdif_enabled) { /* enable if req after rate change */ cmi_spdif_speed(ch->parent, speed); } rsp = cmi_rd(ch->parent, CMPCI_REG_FUNC_1, 4); rsp >>= CMPCI_REG_DAC_FS_SHIFT; - rsp &= CMPCI_REG_DAC_FS_MASK; + rsp &= CMPCI_REG_DAC_FS_MASK; } else { - cmi_partial_wr4(ch->parent, - CMPCI_REG_FUNC_1, - CMPCI_REG_ADC_FS_SHIFT, - CMPCI_REG_ADC_FS_MASK, - r); + cmi_partial_wr4(ch->parent, CMPCI_REG_FUNC_1, + CMPCI_REG_ADC_FS_SHIFT, CMPCI_REG_ADC_FS_MASK, r); rsp = cmi_rd(ch->parent, CMPCI_REG_FUNC_1, 4); rsp >>= CMPCI_REG_ADC_FS_SHIFT; - rsp &= CMPCI_REG_ADC_FS_MASK; + rsp &= CMPCI_REG_ADC_FS_MASK; } snd_mtxunlock(sc->lock); ch->spd = cmpci_regvalue_to_rate(r); DEB(printf("cmichan_setspeed (%s) %d -> %d (%d)\n", - (ch->dir == PCMDIR_PLAY) ? "play" : "rec", - speed, ch->spd, cmpci_regvalue_to_rate(rsp))); + (ch->dir == PCMDIR_PLAY) ? "play" : "rec", speed, ch->spd, + cmpci_regvalue_to_rate(rsp))); return ch->spd; } @@ -464,7 +446,7 @@ cmichan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) { struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; + struct sc_info *sc = ch->parent; /* user has requested interrupts every blocksize bytes */ if (blocksize > sc->bufsz / CMI_INTR_PER_BUFFER) { @@ -478,15 +460,15 @@ static int cmichan_trigger(kobj_t obj, void *data, int go) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; if (!PCMTRIG_COMMON(go)) return 0; snd_mtxlock(sc->lock); if (ch->dir == PCMDIR_PLAY) { - switch(go) { + switch (go) { case PCMTRIG_START: cmi_ch0_start(sc, ch); break; @@ -496,7 +478,7 @@ break; } } else { - switch(go) { + switch (go) { case PCMTRIG_START: cmi_ch1_start(sc, ch); break; @@ -513,8 +495,8 @@ static u_int32_t cmichan_getptr(kobj_t obj, void *data) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; u_int32_t physptr, bufptr, sz; snd_mtxlock(sc->lock); @@ -544,12 +526,14 @@ toclear = 0; if (intrstat & CMPCI_REG_CH0_INTR) { toclear |= CMPCI_REG_CH0_INTR_ENABLE; - //cmi_clr4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE); + // cmi_clr4(sc, CMPCI_REG_INTR_CTRL, + // CMPCI_REG_CH0_INTR_ENABLE); } if (intrstat & CMPCI_REG_CH1_INTR) { toclear |= CMPCI_REG_CH1_INTR_ENABLE; - //cmi_clr4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE); + // cmi_clr4(sc, CMPCI_REG_INTR_CTRL, + // CMPCI_REG_CH1_INTR_ENABLE); } if (toclear) { @@ -569,7 +553,7 @@ cmi_set4(sc, CMPCI_REG_INTR_CTRL, toclear); } } - if(sc->mpu_intr) { + if (sc->mpu_intr) { (sc->mpu_intr)(sc->mpu); } snd_mtxunlock(sc->lock); @@ -582,16 +566,14 @@ return &cmi_caps; } -static kobj_method_t cmichan_methods[] = { - KOBJMETHOD(channel_init, cmichan_init), - KOBJMETHOD(channel_setformat, cmichan_setformat), - KOBJMETHOD(channel_setspeed, cmichan_setspeed), - KOBJMETHOD(channel_setblocksize, cmichan_setblocksize), - KOBJMETHOD(channel_trigger, cmichan_trigger), - KOBJMETHOD(channel_getptr, cmichan_getptr), - KOBJMETHOD(channel_getcaps, cmichan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t cmichan_methods[] = { KOBJMETHOD(channel_init, + cmichan_init), + KOBJMETHOD(channel_setformat, cmichan_setformat), + KOBJMETHOD(channel_setspeed, cmichan_setspeed), + KOBJMETHOD(channel_setblocksize, cmichan_setblocksize), + KOBJMETHOD(channel_trigger, cmichan_trigger), + KOBJMETHOD(channel_getptr, cmichan_getptr), + KOBJMETHOD(channel_getcaps, cmichan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(cmichan); /* ------------------------------------------------------------------------- */ @@ -612,35 +594,35 @@ } struct sb16props { - u_int8_t rreg; /* right reg chan register */ - u_int8_t stereo:1; /* (no explanation needed, honest) */ - u_int8_t rec:1; /* recording source */ - u_int8_t bits:3; /* num bits to represent maximum gain rep */ - u_int8_t oselect; /* output select mask */ - u_int8_t iselect; /* right input select mask */ + u_int8_t rreg; /* right reg chan register */ + u_int8_t stereo : 1; /* (no explanation needed, honest) */ + u_int8_t rec : 1; /* recording source */ + u_int8_t bits : 3; /* num bits to represent maximum gain rep */ + u_int8_t oselect; /* output select mask */ + u_int8_t iselect; /* right input select mask */ } static const cmt[SOUND_MIXER_NRDEVICES] = { - [SOUND_MIXER_SYNTH] = {CMPCI_SB16_MIXER_FM_R, 1, 1, 5, - CMPCI_SB16_SW_FM, CMPCI_SB16_MIXER_FM_SRC_R}, - [SOUND_MIXER_CD] = {CMPCI_SB16_MIXER_CDDA_R, 1, 1, 5, - CMPCI_SB16_SW_CD, CMPCI_SB16_MIXER_CD_SRC_R}, - [SOUND_MIXER_LINE] = {CMPCI_SB16_MIXER_LINE_R, 1, 1, 5, - CMPCI_SB16_SW_LINE, CMPCI_SB16_MIXER_LINE_SRC_R}, - [SOUND_MIXER_MIC] = {CMPCI_SB16_MIXER_MIC, 0, 1, 5, - CMPCI_SB16_SW_MIC, CMPCI_SB16_MIXER_MIC_SRC}, - [SOUND_MIXER_SPEAKER] = {CMPCI_SB16_MIXER_SPEAKER, 0, 0, 2, 0, 0}, - [SOUND_MIXER_PCM] = {CMPCI_SB16_MIXER_VOICE_R, 1, 0, 5, 0, 0}, - [SOUND_MIXER_VOLUME] = {CMPCI_SB16_MIXER_MASTER_R, 1, 0, 5, 0, 0}, + [SOUND_MIXER_SYNTH] = { CMPCI_SB16_MIXER_FM_R, 1, 1, 5, + CMPCI_SB16_SW_FM, CMPCI_SB16_MIXER_FM_SRC_R }, + [SOUND_MIXER_CD] = { CMPCI_SB16_MIXER_CDDA_R, 1, 1, 5, CMPCI_SB16_SW_CD, + CMPCI_SB16_MIXER_CD_SRC_R }, + [SOUND_MIXER_LINE] = { CMPCI_SB16_MIXER_LINE_R, 1, 1, 5, + CMPCI_SB16_SW_LINE, CMPCI_SB16_MIXER_LINE_SRC_R }, + [SOUND_MIXER_MIC] = { CMPCI_SB16_MIXER_MIC, 0, 1, 5, CMPCI_SB16_SW_MIC, + CMPCI_SB16_MIXER_MIC_SRC }, + [SOUND_MIXER_SPEAKER] = { CMPCI_SB16_MIXER_SPEAKER, 0, 0, 2, 0, 0 }, + [SOUND_MIXER_PCM] = { CMPCI_SB16_MIXER_VOICE_R, 1, 0, 5, 0, 0 }, + [SOUND_MIXER_VOLUME] = { CMPCI_SB16_MIXER_MASTER_R, 1, 0, 5, 0, 0 }, /* These controls are not implemented in CMI8738, but maybe at a future date. They are not documented in C-Media documentation, though appear in other drivers for future h/w (ALSA, Linux, NetBSD). */ - [SOUND_MIXER_IGAIN] = {CMPCI_SB16_MIXER_INGAIN_R, 1, 0, 2, 0, 0}, - [SOUND_MIXER_OGAIN] = {CMPCI_SB16_MIXER_OUTGAIN_R, 1, 0, 2, 0, 0}, - [SOUND_MIXER_BASS] = {CMPCI_SB16_MIXER_BASS_R, 1, 0, 4, 0, 0}, - [SOUND_MIXER_TREBLE] = {CMPCI_SB16_MIXER_TREBLE_R, 1, 0, 4, 0, 0}, + [SOUND_MIXER_IGAIN] = { CMPCI_SB16_MIXER_INGAIN_R, 1, 0, 2, 0, 0 }, + [SOUND_MIXER_OGAIN] = { CMPCI_SB16_MIXER_OUTGAIN_R, 1, 0, 2, 0, 0 }, + [SOUND_MIXER_BASS] = { CMPCI_SB16_MIXER_BASS_R, 1, 0, 4, 0, 0 }, + [SOUND_MIXER_TREBLE] = { CMPCI_SB16_MIXER_TREBLE_R, 1, 0, 4, 0, 0 }, /* The mic pre-amp is implemented with non-SB16 compatible registers. */ - [SOUND_MIXER_MONITOR] = {CMPCI_NON_SB16_CONTROL, 0, 1, 4, 0}, + [SOUND_MIXER_MONITOR] = { CMPCI_NON_SB16_CONTROL, 0, 1, 4, 0 }, }; #define MIXER_GAIN_REG_RTOL(r) (r - 1) @@ -648,16 +630,18 @@ static int cmimix_init(struct snd_mixer *m) { - struct sc_info *sc = mix_getdevinfo(m); - u_int32_t i,v; + struct sc_info *sc = mix_getdevinfo(m); + u_int32_t i, v; - for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { - if (cmt[i].bits) v |= 1 << i; + for (i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { + if (cmt[i].bits) + v |= 1 << i; } mix_setdevs(m, v); - for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { - if (cmt[i].rec) v |= 1 << i; + for (i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { + if (cmt[i].rec) + v |= 1 << i; } mix_setrecdevs(m, v); @@ -665,7 +649,7 @@ cmimix_wr(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0); cmimix_wr(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0); cmimix_wr(sc, CMPCI_SB16_MIXER_OUTMIX, - CMPCI_SB16_SW_CD | CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); + CMPCI_SB16_SW_CD | CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE); return 0; } @@ -674,7 +658,7 @@ { struct sc_info *sc = mix_getdevinfo(m); u_int32_t r, l, max; - u_int8_t v; + u_int8_t v; max = (1 << cmt[dev].bits) - 1; @@ -689,20 +673,20 @@ return 0; } - l = (left * max / 100) << (8 - cmt[dev].bits); + l = (left * max / 100) << (8 - cmt[dev].bits); if (cmt[dev].stereo) { r = (right * max / 100) << (8 - cmt[dev].bits); cmimix_wr(sc, MIXER_GAIN_REG_RTOL(cmt[dev].rreg), l); cmimix_wr(sc, cmt[dev].rreg, r); - DEBMIX(printf("Mixer stereo write dev %d reg 0x%02x "\ + DEBMIX(printf("Mixer stereo write dev %d reg 0x%02x " "value 0x%02x:0x%02x\n", - dev, MIXER_GAIN_REG_RTOL(cmt[dev].rreg), l, r)); + dev, MIXER_GAIN_REG_RTOL(cmt[dev].rreg), l, r)); } else { r = l; cmimix_wr(sc, cmt[dev].rreg, l); - DEBMIX(printf("Mixer mono write dev %d reg 0x%02x " \ + DEBMIX(printf("Mixer mono write dev %d reg 0x%02x " "value 0x%02x:0x%02x\n", - dev, cmt[dev].rreg, l, l)); + dev, cmt[dev].rreg, l, l)); } /* Zero gain does not mute channel from output, but this does... */ @@ -712,7 +696,7 @@ } else { v |= cmt[dev].oselect; } - cmimix_wr(sc, CMPCI_SB16_MIXER_OUTMIX, v); + cmimix_wr(sc, CMPCI_SB16_MIXER_OUTMIX, v); return 0; } @@ -724,8 +708,8 @@ u_int32_t i, ml, sl; ml = sl = 0; - for(i = 0; i < SOUND_MIXER_NRDEVICES; i++) { - if ((1< */ SYSCTL_ADD_INT(device_get_sysctl_ctx(sc->dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), - OID_AUTO, "spdif_enabled", CTLFLAG_RW, - &sc->spdif_enabled, 0, - "enable SPDIF output at 44.1 kHz and above"); + SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, + "spdif_enabled", CTLFLAG_RW, &sc->spdif_enabled, 0, + "enable SPDIF output at 44.1 kHz and above"); return 0; } /* ------------------------------------------------------------------------- */ static kobj_method_t cmi_mixer_methods[] = { - KOBJMETHOD(mixer_init, cmimix_init), - KOBJMETHOD(mixer_set, cmimix_set), - KOBJMETHOD(mixer_setrecsrc, cmimix_setrecsrc), - KOBJMETHOD_END + KOBJMETHOD(mixer_init, cmimix_init), KOBJMETHOD(mixer_set, cmimix_set), + KOBJMETHOD(mixer_setrecsrc, cmimix_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(cmi_mixer); @@ -781,9 +762,9 @@ { unsigned int d; - d = bus_space_read_1(0,0, 0x330 + reg); + d = bus_space_read_1(0, 0, 0x330 + reg); /* printf("cmi_mread: reg %x %x\n",reg, d); - */ + */ return d; } @@ -791,7 +772,7 @@ cmi_mwrite(struct mpu401 *arg, void *sc, int reg, unsigned char b) { - bus_space_write_1(0,0,0x330 + reg , b); + bus_space_write_1(0, 0, 0x330 + reg, b); } static int @@ -807,34 +788,31 @@ return 0; } -static kobj_method_t cmi_mpu_methods[] = { - KOBJMETHOD(mpufoi_read, cmi_mread), - KOBJMETHOD(mpufoi_write, cmi_mwrite), - KOBJMETHOD(mpufoi_uninit, cmi_muninit), - KOBJMETHOD_END -}; +static kobj_method_t cmi_mpu_methods[] = { KOBJMETHOD(mpufoi_read, cmi_mread), + KOBJMETHOD(mpufoi_write, cmi_mwrite), + KOBJMETHOD(mpufoi_uninit, cmi_muninit), KOBJMETHOD_END }; static DEFINE_CLASS(cmi_mpu, cmi_mpu_methods, 0); static void -cmi_midiattach(struct sc_info *sc) { -/* - const struct { - int port,bits; - } *p, ports[] = { - {0x330,0}, - {0x320,1}, - {0x310,2}, - {0x300,3}, - {0,0} } ; - Notes, CMPCI_REG_VMPUSEL sets the io port for the mpu. Does - anyone know how to bus_space tag? -*/ +cmi_midiattach(struct sc_info *sc) +{ + /* + const struct { + int port,bits; + } *p, ports[] = { + {0x330,0}, + {0x320,1}, + {0x310,2}, + {0x300,3}, + {0,0} } ; + Notes, CMPCI_REG_VMPUSEL sets the io port for the mpu. Does + anyone know how to bus_space tag? + */ cmi_clr4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_UART_ENABLE); cmi_clr4(sc, CMPCI_REG_LEGACY_CTRL, - CMPCI_REG_VMPUSEL_MASK << CMPCI_REG_VMPUSEL_SHIFT); - cmi_set4(sc, CMPCI_REG_LEGACY_CTRL, - 0 << CMPCI_REG_VMPUSEL_SHIFT ); + CMPCI_REG_VMPUSEL_MASK << CMPCI_REG_VMPUSEL_SHIFT); + cmi_set4(sc, CMPCI_REG_LEGACY_CTRL, 0 << CMPCI_REG_VMPUSEL_SHIFT); cmi_set4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_UART_ENABLE); sc->mpu = mpu401_init(&cmi_mpu_class, sc, cmi_intr, &sc->mpu_intr); } @@ -866,9 +844,9 @@ /* Disable interrupts and channels */ cmi_clr4(sc, CMPCI_REG_FUNC_0, - CMPCI_REG_CH0_ENABLE | CMPCI_REG_CH1_ENABLE); + CMPCI_REG_CH0_ENABLE | CMPCI_REG_CH1_ENABLE); cmi_clr4(sc, CMPCI_REG_INTR_CTRL, - CMPCI_REG_CH0_INTR_ENABLE | CMPCI_REG_CH1_INTR_ENABLE); + CMPCI_REG_CH0_INTR_ENABLE | CMPCI_REG_CH1_INTR_ENABLE); /* Configure DMA channels, ch0 = play, ch1 = capture */ cmi_clr4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); @@ -889,14 +867,13 @@ { /* Disable interrupts and channels */ cmi_clr4(sc, CMPCI_REG_INTR_CTRL, - CMPCI_REG_CH0_INTR_ENABLE | - CMPCI_REG_CH1_INTR_ENABLE | - CMPCI_REG_TDMA_INTR_ENABLE); + CMPCI_REG_CH0_INTR_ENABLE | CMPCI_REG_CH1_INTR_ENABLE | + CMPCI_REG_TDMA_INTR_ENABLE); cmi_clr4(sc, CMPCI_REG_FUNC_0, - CMPCI_REG_CH0_ENABLE | CMPCI_REG_CH1_ENABLE); + CMPCI_REG_CH0_ENABLE | CMPCI_REG_CH1_ENABLE); cmi_clr4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_UART_ENABLE); - if( sc->mpu ) + if (sc->mpu) sc->mpu_intr = NULL; } @@ -905,7 +882,7 @@ static int cmi_probe(device_t dev) { - switch(pci_get_devid(dev)) { + switch (pci_get_devid(dev)) { case CMI8338A_PCI_ID: device_set_desc(dev, "CMedia CMI8338A"); return BUS_PROBE_DEFAULT; @@ -919,8 +896,8 @@ device_set_desc(dev, "CMedia CMI8738B"); return BUS_PROBE_DEFAULT; case CMI120_USB_ID: - device_set_desc(dev, "CMedia CMI120"); - return BUS_PROBE_DEFAULT; + device_set_desc(dev, "CMedia CMI120"); + return BUS_PROBE_DEFAULT; default: return ENXIO; } @@ -929,8 +906,8 @@ static int cmi_attach(device_t dev) { - struct sc_info *sc; - char status[SND_STATUSLEN]; + struct sc_info *sc; + char status[SND_STATUSLEN]; sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); sc->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_cmi softc"); @@ -939,9 +916,10 @@ sc->dev = dev; sc->regid = PCIR_BAR(0); sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &sc->regid, - RF_ACTIVE); + RF_ACTIVE); if (!sc->reg) { - device_printf(dev, "cmi_attach: Cannot allocate bus resource\n"); + device_printf(dev, + "cmi_attach: Cannot allocate bus resource\n"); goto bad; } sc->st = rman_get_bustag(sc->reg); @@ -951,8 +929,8 @@ cmi_midiattach(sc); sc->irqid = 0; - sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, - RF_ACTIVE | RF_SHAREABLE); + sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, + RF_ACTIVE | RF_SHAREABLE); if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE, cmi_intr, sc, &sc->ih)) { device_printf(dev, "cmi_attach: Unable to map interrupt\n"); @@ -961,16 +939,15 @@ sc->bufsz = pcm_getbuffersize(dev, 4096, CMI_DEFAULT_BUFSZ, 65536); - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/sc->bufsz, /*nsegments*/1, - /*maxsegz*/0x3ffff, /*flags*/0, - /*lockfunc*/NULL, - /*lockfunc*/NULL, - &sc->parent_dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ sc->bufsz, /*nsegments*/ 1, + /*maxsegz*/ 0x3ffff, /*flags*/ 0, + /*lockfunc*/ NULL, + /*lockfunc*/ NULL, &sc->parent_dmat) != 0) { device_printf(dev, "cmi_attach: Unable to create dma tag\n"); goto bad; } @@ -991,14 +968,14 @@ pcm_addchan(dev, PCMDIR_REC, &cmichan_class, sc); snprintf(status, SND_STATUSLEN, "port 0x%jx irq %jd on %s", - rman_get_start(sc->reg), rman_get_start(sc->irq), - device_get_nameunit(device_get_parent(dev))); + rman_get_start(sc->reg), rman_get_start(sc->irq), + device_get_nameunit(device_get_parent(dev))); pcm_setstatus(dev, status); DEB(printf("cmi_attach: succeeded\n")); return 0; - bad: +bad: if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); if (sc->ih) @@ -1022,7 +999,8 @@ int r; r = pcm_unregister(dev); - if (r) return r; + if (r) + return r; sc = pcm_getdevinfo(dev); cmi_uninit(sc); @@ -1031,11 +1009,12 @@ bus_dma_tag_destroy(sc->parent_dmat); bus_teardown_intr(dev, sc->irq, sc->ih); bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); - if(sc->mpu) + if (sc->mpu) mpu401_uninit(sc->mpu); bus_release_resource(dev, SYS_RES_IOPORT, sc->regid, sc->reg); if (sc->mpu_reg) - bus_release_resource(dev, SYS_RES_IOPORT, sc->mpu_regid, sc->mpu_reg); + bus_release_resource(dev, SYS_RES_IOPORT, sc->mpu_regid, + sc->mpu_reg); snd_mtxfree(sc->lock); free(sc, M_DEVBUF); @@ -1072,8 +1051,8 @@ if (mixer_reinit(dev) == -1) { device_printf(dev, "unable to reinitialize the mixer\n"); snd_mtxunlock(sc->lock); - return ENXIO; - } + return ENXIO; + } if (sc->pch.dma_was_active) { cmichan_setspeed(NULL, &sc->pch, sc->pch.spd); @@ -1090,22 +1069,15 @@ return 0; } -static device_method_t cmi_methods[] = { - DEVMETHOD(device_probe, cmi_probe), - DEVMETHOD(device_attach, cmi_attach), - DEVMETHOD(device_detach, cmi_detach), - DEVMETHOD(device_resume, cmi_resume), - DEVMETHOD(device_suspend, cmi_suspend), - { 0, 0 } -}; +static device_method_t cmi_methods[] = { DEVMETHOD(device_probe, cmi_probe), + DEVMETHOD(device_attach, cmi_attach), + DEVMETHOD(device_detach, cmi_detach), + DEVMETHOD(device_resume, cmi_resume), + DEVMETHOD(device_suspend, cmi_suspend), { 0, 0 } }; -static driver_t cmi_driver = { - "pcm", - cmi_methods, - PCM_SOFTC_SIZE -}; +static driver_t cmi_driver = { "pcm", cmi_methods, PCM_SOFTC_SIZE }; DRIVER_MODULE(snd_cmi, pci, cmi_driver, 0, 0); MODULE_DEPEND(snd_cmi, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); -MODULE_DEPEND(snd_cmi, midi, 1,1,1); +MODULE_DEPEND(snd_cmi, midi, 1, 1, 1); MODULE_VERSION(snd_cmi, 1); Index: sys/dev/sound/pci/cmireg.h =================================================================== --- sys/dev/sound/pci/cmireg.h +++ sys/dev/sound/pci/cmireg.h @@ -38,172 +38,172 @@ * PCI Configuration Registers */ -#define CMPCI_PCI_IOBASEREG (PCI_MAPREG_START) +#define CMPCI_PCI_IOBASEREG (PCI_MAPREG_START) /* * I/O Space */ -#define CMPCI_REG_FUNC_0 0x00 -# define CMPCI_REG_CH0_DIR 0x00000001 -# define CMPCI_REG_CH1_DIR 0x00000002 -# define CMPCI_REG_CH0_PAUSE 0x00000004 -# define CMPCI_REG_CH1_PAUSE 0x00000008 -# define CMPCI_REG_CH0_ENABLE 0x00010000 -# define CMPCI_REG_CH1_ENABLE 0x00020000 -# define CMPCI_REG_CH0_RESET 0x00040000 -# define CMPCI_REG_CH1_RESET 0x00080000 - -#define CMPCI_REG_FUNC_1 0x04 -# define CMPCI_REG_JOY_ENABLE 0x00000002 -# define CMPCI_REG_UART_ENABLE 0x00000004 -# define CMPCI_REG_LEGACY_ENABLE 0x00000008 -# define CMPCI_REG_BREQ 0x00000010 -# define CMPCI_REG_MCBINTR_ENABLE 0x00000020 -# define CMPCI_REG_SPDIFOUT_DAC 0x00000040 -# define CMPCI_REG_SPDIF_LOOP 0x00000080 -# define CMPCI_REG_SPDIF0_ENABLE 0x00000100 -# define CMPCI_REG_SPDIF1_ENABLE 0x00000200 -# define CMPCI_REG_DAC_FS_SHIFT 10 -# define CMPCI_REG_DAC_FS_MASK 0x00000007 -# define CMPCI_REG_ADC_FS_SHIFT 13 -# define CMPCI_REG_ADC_FS_MASK 0x00000007 - -#define CMPCI_REG_CHANNEL_FORMAT 0x08 -# define CMPCI_REG_CH0_FORMAT_SHIFT 0 -# define CMPCI_REG_CH0_FORMAT_MASK 0x00000003 -# define CMPCI_REG_CH1_FORMAT_SHIFT 2 -# define CMPCI_REG_CH1_FORMAT_MASK 0x00000003 -# define CMPCI_REG_FORMAT_MONO 0x00000000 -# define CMPCI_REG_FORMAT_STEREO 0x00000001 -# define CMPCI_REG_FORMAT_8BIT 0x00000000 -# define CMPCI_REG_FORMAT_16BIT 0x00000002 - -#define CMPCI_REG_INTR_CTRL 0x0c -# define CMPCI_REG_CH0_INTR_ENABLE 0x00010000 -# define CMPCI_REG_CH1_INTR_ENABLE 0x00020000 -# define CMPCI_REG_TDMA_INTR_ENABLE 0x00040000 - -#define CMPCI_REG_INTR_STATUS 0x10 -# define CMPCI_REG_CH0_INTR 0x00000001 -# define CMPCI_REG_CH1_INTR 0x00000002 -# define CMPCI_REG_CH0_BUSY 0x00000004 -# define CMPCI_REG_CH1_BUSY 0x00000008 -# define CMPCI_REG_LEGACY_STEREO 0x00000010 -# define CMPCI_REG_LEGACY_HDMA 0x00000020 -# define CMPCI_REG_DMASTAT 0x00000040 -# define CMPCI_REG_XDO46 0x00000080 -# define CMPCI_REG_HTDMA_INTR 0x00004000 -# define CMPCI_REG_LTDMA_INTR 0x00008000 -# define CMPCI_REG_UART_INTR 0x00010000 -# define CMPCI_REG_MCB_INTR 0x04000000 -# define CMPCI_REG_VCO 0x08000000 -# define CMPCI_REG_ANY_INTR 0x80000000 - -#define CMPCI_REG_LEGACY_CTRL 0x14 -# define CMPCI_REG_LEGACY_SPDIF_ENABLE 0x00200000 -# define CMPCI_REG_SPDIF_COPYRIGHT 0x00400000 -# define CMPCI_REG_XSPDIF_ENABLE 0x00800000 -# define CMPCI_REG_FMSEL_SHIFT 24 -# define CMPCI_REG_FMSEL_MASK 0x00000003 -# define CMPCI_REG_VSBSEL_SHIFT 26 -# define CMPCI_REG_VSBSEL_MASK 0x00000003 -# define CMPCI_REG_VMPUSEL_SHIFT 29 -# define CMPCI_REG_VMPUSEL_MASK 0x00000003 - -#define CMPCI_REG_MISC 0x18 -# define CMPCI_REG_POWER_DOWN 0x80000000 -# define CMPCI_REG_BUS_AND_DSP_RESET 0x40000000 -# define CMPCI_REG_N4SPK3D 0x04000000 -# define CMPCI_REG_W_SPDIF_48L 0x01000000 -# define CMPCI_REG_XCHGDAC 0x00400000 -# define CMPCI_REG_FM_ENABLE 0x00080000 -# define CMPCI_REG_SPDIF_48K 0x00008000 - -#define CMPCI_REG_SBDATA 0x22 -#define CMPCI_REG_SBADDR 0x23 -# define CMPCI_SB16_MIXER_RESET 0x00 -# define CMPCI_SB16_MIXER_MASTER_L 0x30 -# define CMPCI_SB16_MIXER_MASTER_R 0x31 -# define CMPCI_SB16_MIXER_VOICE_L 0x32 -# define CMPCI_SB16_MIXER_VOICE_R 0x33 -# define CMPCI_SB16_MIXER_FM_L 0x34 -# define CMPCI_SB16_MIXER_FM_R 0x35 -# define CMPCI_SB16_MIXER_CDDA_L 0x36 -# define CMPCI_SB16_MIXER_CDDA_R 0x37 -# define CMPCI_SB16_MIXER_LINE_L 0x38 -# define CMPCI_SB16_MIXER_LINE_R 0x39 -# define CMPCI_SB16_MIXER_MIC 0x3A -# define CMPCI_SB16_MIXER_SPEAKER 0x3B -# define CMPCI_SB16_MIXER_OUTMIX 0x3C -# define CMPCI_SB16_SW_MIC 0x01 -# define CMPCI_SB16_SW_CD_R 0x02 -# define CMPCI_SB16_SW_CD_L 0x04 -# define CMPCI_SB16_SW_CD (CMPCI_SB16_SW_CD_L|CMPCI_SB16_SW_CD_R) -# define CMPCI_SB16_SW_LINE_R 0x08 -# define CMPCI_SB16_SW_LINE_L 0x10 -# define CMPCI_SB16_SW_LINE (CMPCI_SB16_SW_LINE_L|CMPCI_SB16_SW_LINE_R) -# define CMPCI_SB16_SW_FM_R 0x20 -# define CMPCI_SB16_SW_FM_L 0x40 -# define CMPCI_SB16_SW_FM (CMPCI_SB16_SW_FM_L|CMPCI_SB16_SW_FM_R) -# define CMPCI_SB16_MIXER_ADCMIX_L 0x3D -# define CMPCI_SB16_MIXER_ADCMIX_R 0x3E -# define CMPCI_SB16_MIXER_FM_SRC_R 0x20 -# define CMPCI_SB16_MIXER_LINE_SRC_R 0x08 -# define CMPCI_SB16_MIXER_CD_SRC_R 0x02 -# define CMPCI_SB16_MIXER_MIC_SRC 0x01 -# define CMPCI_SB16_MIXER_SRC_R_TO_L(v) ((v) << 1) - -# define CMPCI_SB16_MIXER_INGAIN_L 0x3F -# define CMPCI_SB16_MIXER_INGAIN_R 0x40 -# define CMPCI_SB16_MIXER_OUTGAIN_L 0x41 -# define CMPCI_SB16_MIXER_OUTGAIN_R 0x42 -# define CMPCI_SB16_MIXER_AGC 0x43 -# define CMPCI_SB16_MIXER_TREBLE_L 0x44 -# define CMPCI_SB16_MIXER_TREBLE_R 0x45 -# define CMPCI_SB16_MIXER_BASS_L 0x46 -# define CMPCI_SB16_MIXER_BASS_R 0x47 -# define CMPCI_SB16_MIXER_L_TO_R(addr) ((addr)+1) - -# define CMPCI_ADJUST_MIC_GAIN(sc, x) cmpci_adjust((x), 0xf8) -# define CMPCI_ADJUST_GAIN(sc, x) cmpci_adjust((x), 0xf8) -# define CMPCI_ADJUST_2_GAIN(sc, x) cmpci_adjust((x), 0xc0) - -#define CMPCI_REG_MIXER1 0x24 -# define CMPCI_SPK4 0x20 -# define CMPCI_REAR2FRONT 0x10 -# define CMPCI_X3DEN 0x02 - -#define CMPCI_REG_MPU_BASE 0x40 -#define CMPCI_REG_MPU_SIZE 0x10 -#define CMPCI_REG_FM_BASE 0x50 -#define CMPCI_REG_FM_SIZE 0x10 - -#define CMPCI_REG_AUX_MIC 0x25 -# define CMPCI_AUX_SELECT_R 0x80 -# define CMPCI_AUX_SELECT_L 0x40 -# define CMPCI_AUX_MUTE_R 0x20 -# define CMPCI_AUX_MUTE_L 0x10 -# define CMPCI_VAD_MIC 0x0e -# define CMPCI_MIC_QUIET 0x01 - -#define CMPCI_REG_DMA0_BASE 0x80 -#define CMPCI_REG_DMA0_BYTES 0x84 -#define CMPCI_REG_DMA0_SAMPLES 0x86 -#define CMPCI_REG_DMA1_BASE 0x88 -#define CMPCI_REG_DMA1_BYTES 0x8C -#define CMPCI_REG_DMA1_SAMPLES 0x8E +#define CMPCI_REG_FUNC_0 0x00 +#define CMPCI_REG_CH0_DIR 0x00000001 +#define CMPCI_REG_CH1_DIR 0x00000002 +#define CMPCI_REG_CH0_PAUSE 0x00000004 +#define CMPCI_REG_CH1_PAUSE 0x00000008 +#define CMPCI_REG_CH0_ENABLE 0x00010000 +#define CMPCI_REG_CH1_ENABLE 0x00020000 +#define CMPCI_REG_CH0_RESET 0x00040000 +#define CMPCI_REG_CH1_RESET 0x00080000 + +#define CMPCI_REG_FUNC_1 0x04 +#define CMPCI_REG_JOY_ENABLE 0x00000002 +#define CMPCI_REG_UART_ENABLE 0x00000004 +#define CMPCI_REG_LEGACY_ENABLE 0x00000008 +#define CMPCI_REG_BREQ 0x00000010 +#define CMPCI_REG_MCBINTR_ENABLE 0x00000020 +#define CMPCI_REG_SPDIFOUT_DAC 0x00000040 +#define CMPCI_REG_SPDIF_LOOP 0x00000080 +#define CMPCI_REG_SPDIF0_ENABLE 0x00000100 +#define CMPCI_REG_SPDIF1_ENABLE 0x00000200 +#define CMPCI_REG_DAC_FS_SHIFT 10 +#define CMPCI_REG_DAC_FS_MASK 0x00000007 +#define CMPCI_REG_ADC_FS_SHIFT 13 +#define CMPCI_REG_ADC_FS_MASK 0x00000007 + +#define CMPCI_REG_CHANNEL_FORMAT 0x08 +#define CMPCI_REG_CH0_FORMAT_SHIFT 0 +#define CMPCI_REG_CH0_FORMAT_MASK 0x00000003 +#define CMPCI_REG_CH1_FORMAT_SHIFT 2 +#define CMPCI_REG_CH1_FORMAT_MASK 0x00000003 +#define CMPCI_REG_FORMAT_MONO 0x00000000 +#define CMPCI_REG_FORMAT_STEREO 0x00000001 +#define CMPCI_REG_FORMAT_8BIT 0x00000000 +#define CMPCI_REG_FORMAT_16BIT 0x00000002 + +#define CMPCI_REG_INTR_CTRL 0x0c +#define CMPCI_REG_CH0_INTR_ENABLE 0x00010000 +#define CMPCI_REG_CH1_INTR_ENABLE 0x00020000 +#define CMPCI_REG_TDMA_INTR_ENABLE 0x00040000 + +#define CMPCI_REG_INTR_STATUS 0x10 +#define CMPCI_REG_CH0_INTR 0x00000001 +#define CMPCI_REG_CH1_INTR 0x00000002 +#define CMPCI_REG_CH0_BUSY 0x00000004 +#define CMPCI_REG_CH1_BUSY 0x00000008 +#define CMPCI_REG_LEGACY_STEREO 0x00000010 +#define CMPCI_REG_LEGACY_HDMA 0x00000020 +#define CMPCI_REG_DMASTAT 0x00000040 +#define CMPCI_REG_XDO46 0x00000080 +#define CMPCI_REG_HTDMA_INTR 0x00004000 +#define CMPCI_REG_LTDMA_INTR 0x00008000 +#define CMPCI_REG_UART_INTR 0x00010000 +#define CMPCI_REG_MCB_INTR 0x04000000 +#define CMPCI_REG_VCO 0x08000000 +#define CMPCI_REG_ANY_INTR 0x80000000 + +#define CMPCI_REG_LEGACY_CTRL 0x14 +#define CMPCI_REG_LEGACY_SPDIF_ENABLE 0x00200000 +#define CMPCI_REG_SPDIF_COPYRIGHT 0x00400000 +#define CMPCI_REG_XSPDIF_ENABLE 0x00800000 +#define CMPCI_REG_FMSEL_SHIFT 24 +#define CMPCI_REG_FMSEL_MASK 0x00000003 +#define CMPCI_REG_VSBSEL_SHIFT 26 +#define CMPCI_REG_VSBSEL_MASK 0x00000003 +#define CMPCI_REG_VMPUSEL_SHIFT 29 +#define CMPCI_REG_VMPUSEL_MASK 0x00000003 + +#define CMPCI_REG_MISC 0x18 +#define CMPCI_REG_POWER_DOWN 0x80000000 +#define CMPCI_REG_BUS_AND_DSP_RESET 0x40000000 +#define CMPCI_REG_N4SPK3D 0x04000000 +#define CMPCI_REG_W_SPDIF_48L 0x01000000 +#define CMPCI_REG_XCHGDAC 0x00400000 +#define CMPCI_REG_FM_ENABLE 0x00080000 +#define CMPCI_REG_SPDIF_48K 0x00008000 + +#define CMPCI_REG_SBDATA 0x22 +#define CMPCI_REG_SBADDR 0x23 +#define CMPCI_SB16_MIXER_RESET 0x00 +#define CMPCI_SB16_MIXER_MASTER_L 0x30 +#define CMPCI_SB16_MIXER_MASTER_R 0x31 +#define CMPCI_SB16_MIXER_VOICE_L 0x32 +#define CMPCI_SB16_MIXER_VOICE_R 0x33 +#define CMPCI_SB16_MIXER_FM_L 0x34 +#define CMPCI_SB16_MIXER_FM_R 0x35 +#define CMPCI_SB16_MIXER_CDDA_L 0x36 +#define CMPCI_SB16_MIXER_CDDA_R 0x37 +#define CMPCI_SB16_MIXER_LINE_L 0x38 +#define CMPCI_SB16_MIXER_LINE_R 0x39 +#define CMPCI_SB16_MIXER_MIC 0x3A +#define CMPCI_SB16_MIXER_SPEAKER 0x3B +#define CMPCI_SB16_MIXER_OUTMIX 0x3C +#define CMPCI_SB16_SW_MIC 0x01 +#define CMPCI_SB16_SW_CD_R 0x02 +#define CMPCI_SB16_SW_CD_L 0x04 +#define CMPCI_SB16_SW_CD (CMPCI_SB16_SW_CD_L | CMPCI_SB16_SW_CD_R) +#define CMPCI_SB16_SW_LINE_R 0x08 +#define CMPCI_SB16_SW_LINE_L 0x10 +#define CMPCI_SB16_SW_LINE (CMPCI_SB16_SW_LINE_L | CMPCI_SB16_SW_LINE_R) +#define CMPCI_SB16_SW_FM_R 0x20 +#define CMPCI_SB16_SW_FM_L 0x40 +#define CMPCI_SB16_SW_FM (CMPCI_SB16_SW_FM_L | CMPCI_SB16_SW_FM_R) +#define CMPCI_SB16_MIXER_ADCMIX_L 0x3D +#define CMPCI_SB16_MIXER_ADCMIX_R 0x3E +#define CMPCI_SB16_MIXER_FM_SRC_R 0x20 +#define CMPCI_SB16_MIXER_LINE_SRC_R 0x08 +#define CMPCI_SB16_MIXER_CD_SRC_R 0x02 +#define CMPCI_SB16_MIXER_MIC_SRC 0x01 +#define CMPCI_SB16_MIXER_SRC_R_TO_L(v) ((v) << 1) + +#define CMPCI_SB16_MIXER_INGAIN_L 0x3F +#define CMPCI_SB16_MIXER_INGAIN_R 0x40 +#define CMPCI_SB16_MIXER_OUTGAIN_L 0x41 +#define CMPCI_SB16_MIXER_OUTGAIN_R 0x42 +#define CMPCI_SB16_MIXER_AGC 0x43 +#define CMPCI_SB16_MIXER_TREBLE_L 0x44 +#define CMPCI_SB16_MIXER_TREBLE_R 0x45 +#define CMPCI_SB16_MIXER_BASS_L 0x46 +#define CMPCI_SB16_MIXER_BASS_R 0x47 +#define CMPCI_SB16_MIXER_L_TO_R(addr) ((addr) + 1) + +#define CMPCI_ADJUST_MIC_GAIN(sc, x) cmpci_adjust((x), 0xf8) +#define CMPCI_ADJUST_GAIN(sc, x) cmpci_adjust((x), 0xf8) +#define CMPCI_ADJUST_2_GAIN(sc, x) cmpci_adjust((x), 0xc0) + +#define CMPCI_REG_MIXER1 0x24 +#define CMPCI_SPK4 0x20 +#define CMPCI_REAR2FRONT 0x10 +#define CMPCI_X3DEN 0x02 + +#define CMPCI_REG_MPU_BASE 0x40 +#define CMPCI_REG_MPU_SIZE 0x10 +#define CMPCI_REG_FM_BASE 0x50 +#define CMPCI_REG_FM_SIZE 0x10 + +#define CMPCI_REG_AUX_MIC 0x25 +#define CMPCI_AUX_SELECT_R 0x80 +#define CMPCI_AUX_SELECT_L 0x40 +#define CMPCI_AUX_MUTE_R 0x20 +#define CMPCI_AUX_MUTE_L 0x10 +#define CMPCI_VAD_MIC 0x0e +#define CMPCI_MIC_QUIET 0x01 + +#define CMPCI_REG_DMA0_BASE 0x80 +#define CMPCI_REG_DMA0_BYTES 0x84 +#define CMPCI_REG_DMA0_SAMPLES 0x86 +#define CMPCI_REG_DMA1_BASE 0x88 +#define CMPCI_REG_DMA1_BYTES 0x8C +#define CMPCI_REG_DMA1_SAMPLES 0x8E /* sample rate */ -#define CMPCI_REG_RATE_5512 0 -#define CMPCI_REG_RATE_11025 1 -#define CMPCI_REG_RATE_22050 2 -#define CMPCI_REG_RATE_44100 3 -#define CMPCI_REG_RATE_8000 4 -#define CMPCI_REG_RATE_16000 5 -#define CMPCI_REG_RATE_32000 6 -#define CMPCI_REG_RATE_48000 7 -#define CMPCI_REG_NUMRATE 8 +#define CMPCI_REG_RATE_5512 0 +#define CMPCI_REG_RATE_11025 1 +#define CMPCI_REG_RATE_22050 2 +#define CMPCI_REG_RATE_44100 3 +#define CMPCI_REG_RATE_8000 4 +#define CMPCI_REG_RATE_16000 5 +#define CMPCI_REG_RATE_32000 6 +#define CMPCI_REG_RATE_48000 7 +#define CMPCI_REG_NUMRATE 8 #endif /* _DEV_PCI_CMPCIREG_H_ */ Index: sys/dev/sound/pci/cs4281.h =================================================================== --- sys/dev/sound/pci/cs4281.h +++ sys/dev/sound/pci/cs4281.h @@ -29,177 +29,177 @@ #ifndef _CS4281_H_ #define _CS4281_H_ -#define CS4281_PCI_ID 0x60051013 +#define CS4281_PCI_ID 0x60051013 /* Ball Parks */ -#define CS4281PCI_BA0_SIZE 4096 -#define CS4281PCI_BA1_SIZE 65536 +#define CS4281PCI_BA0_SIZE 4096 +#define CS4281PCI_BA1_SIZE 65536 /* Register values */ -#define CS4281PCI_HISR 0x000 -# define CS4281PCI_HISR_DMAI 0x00040000 -# define CS4281PCI_HISR_DMA(x) (0x0100 << (x)) - -#define CS4281PCI_HICR 0x008 -# define CS4281PCI_HICR_EOI 0x00000003 - -#define CS4281PCI_HIMR 0x00c -# define CS4281PCI_HIMR_DMAI 0x00040000 -# define CS4281PCI_HIMR_DMA(x) (0x0100 << (x)) - -#define CS4281PCI_IIER 0x010 - -#define CS4281PCI_HDSR(x) (0x0f0 + (x)*0x004) -# define CS4281PCI_HDSR_CH1P 0x02000000 -# define CS4281PCI_HDSR_CH2P 0x01000000 -# define CS4281PCI_HDSR_HDTC 0x00020000 -# define CS4281PCI_HDSR_DTC 0x00010000 -# define CS4281PCI_HDSR_DRUN 0x00008000 -# define CS4281PCI_HDSR_RQ 0x00000080 - -#define CS4281PCI_DCA(x) (0x110 + (x) * 0x010) -#define CS4281PCI_DCC(x) (0x114 + (x) * 0x010) -#define CS4281PCI_DBA(x) (0x118 + (x) * 0x010) -#define CS4281PCI_DBC(x) (0x11c + (x) * 0x010) - -#define CS4281PCI_DMR(x) (0x150 + (x) * 0x008) -# define CS4281PCI_DMR_DMA 0x20000000 -# define CS4281PCI_DMR_POLL 0x10000000 -# define CS4281PCI_DMR_TBC 0x02000000 -# define CS4281PCI_DMR_CBC 0x01000000 -# define CS4281PCI_DMR_SWAPC 0x00400000 -# define CS4281PCI_DMR_SIZE20 0x00100000 -# define CS4281PCI_DMR_USIGN 0x00080000 -# define CS4281PCI_DMR_BEND 0x00040000 -# define CS4281PCI_DMR_MONO 0x00020000 -# define CS4281PCI_DMR_SIZE8 0x00010000 -# define CS4281PCI_DMR_TYPE_DEMAND 0x00000000 -# define CS4281PCI_DMR_TYPE_SINGLE 0x00000040 -# define CS4281PCI_DMR_TYPE_BLOCK 0x00000080 -# define CS4281PCI_DMR_TYPE_CASCADE 0x000000c0 -# define CS4281PCI_DMR_DEC 0x00000020 -# define CS4281PCI_DMR_AUTO 0x00000010 -# define CS4281PCI_DMR_TR_PLAY 0x00000008 -# define CS4281PCI_DMR_TR_REC 0x00000004 - -#define CS4281PCI_DCR(x) (0x154 + (x) * 0x008) -# define CS4281PCI_DCR_HTCIE 0x00020000 -# define CS4281PCI_DCR_TCIE 0x00010000 -# define CS4281PCI_DCR_MSK 0x00000001 - -#define CS4281PCI_FCR(x) (0x180 + (x) * 0x004) -# define CS4281PCI_FCR_FEN 0x80000000 -# define CS4281PCI_FCR_DACZ 0x40000000 -# define CS4281PCI_FCR_PSH 0x20000000 -# define CS4281PCI_FCR_RS(x) ((x) << 24) -# define CS4281PCI_FCR_LS(x) ((x) << 16) -# define CS4281PCI_FCR_SZ(x) ((x) << 8) -# define CS4281PCI_FCR_OF(x) (x) - -#define CS4281PCI_FPDR(x) (0x190 + (x) * 0x004) - -#define CS4281PCI_FCHS 0x20c -#define CS4281PCI_FSIC(x) (0x210 + (x) * 0x004) - -#define CS4281PCI_PMCS 0x344 -# define CS4281PCI_PMCS_PS_MASK 0x00000003 -#define CS4281PCI_PMCS_OFFSET (CS4281PCI_PMCS - 0x300) - -#define CS4281PCI_CWPR 0x3e0 -# define CS4281PCI_CWPR_MAGIC 0x00004281 - -#define CS4281PCI_EPPMC 0x3e4 -# define CS4281PCI_EPPMC_FPDN 0x00004000 -#define CS4281PCI_GPIOR 0x3e8 - -#define CS4281PCI_SPMC 0x3ec -# define CS4281PCI_SPMC_RSTN 0x00000001 -# define CS4281PCI_SPMC_ASYN 0x00000002 -# define CS4281PCI_SPMC_WUP1 0x00000004 -# define CS4281PCI_SPMC_WUP2 0x00000008 -# define CS4281PCI_SPMC_ASDO 0x00000080 -# define CS4281PCI_SPMC_ASDI2E 0x00000100 -# define CS4281PCI_SPMC_EESPD 0x00000200 -# define CS4281PCI_SPMC_GISPEN 0x00004000 -# define CS4281PCI_SPMC_GIPPEN 0x00008000 - -#define CS4281PCI_CFLR 0x3f0 -#define CS4281PCI_IISR 0x3f4 -#define CS4281PCI_TMS 0x3f8 -#define CS4281PCI_SSVID 0x3fc - -#define CS4281PCI_CLKCR1 0x400 -# define CS_4281PCI_CLKCR1_DLLSS_MASK 0x0000000c -# define CS_4281PCI_CLKCR1_DLLSS_AC97 0x00000004 -# define CS4281PCI_CLKCR1_DLLP 0x00000010 -# define CS4281PCI_CLKCR1_SWCE 0x00000020 -# define CS4281PCI_CLKCR1_DLLOS 0x00000040 -# define CS4281PCI_CLKCR1_CKRA 0x00010000 -# define CS4281PCI_CLKCR1_DLLRDY 0x01000000 -# define CS4281PCI_CLKCR1_CLKON 0x02000000 - -#define CS4281PCI_FRR 0x410 - -#define CS4281PCI_SLT12O 0x41c -#define CS4281PCI_SERMC 0x420 -# define CS4281PCI_SERMC_PTC_AC97 0x00000002 -# define CS4281PCI_SERMC_PTC_MASK 0x0000000e -# define CS4281PCI_SERMC_ODSEN1 0x01000000 -# define CS4281PCI_SERMC_ODSEN2 0x02000000 -#define CS4281PCI_SERC1 0x428 -#define CS4281PCI_SERC2 0x42c - -#define CS4281PCI_SLT12M 0x45c -#define CS4281PCI_ACCTL 0x460 -# define CS4281PCI_ACCTL_ESYN 0x00000002 -# define CS4281PCI_ACCTL_VFRM 0x00000004 -# define CS4281PCI_ACCTL_DCV 0x00000008 -# define CS4281PCI_ACCTL_CRW 0x00000010 -# define CS4281PCI_ACCTL_TC 0x00000040 - -#define CS4281PCI_ACSTS 0x464 -# define CS4281PCI_ACSTS_CRDY 0x00000001 -# define CS4281PCI_ACSTS_VSTS 0x00000002 - -#define CS4281PCI_ACOSV 0x468 -# define CS4281PCI_ACOSV_SLV(x) (1 << (x - 3)) -#define CS4281PCI_ACCAD 0x46c -#define CS4281PCI_ACCDA 0x470 -#define CS4281PCI_ACISV 0x474 -# define CS4281PCI_ACISV_ISV(x) (1 << (x - 3)) -#define CS4281PCI_ACSAD 0x478 -#define CS4281PCI_ACSDA 0x47c -#define CS4281PCI_JSPT 0x480 -#define CS4281PCI_JSCTL 0x484 - -#define CS4281PCI_SSPM 0x740 -# define CS4281PCI_SSPM_MIXEN 0x00000040 -# define CS4281PCI_SSPM_CSRCEN 0x00000020 -# define CS4281PCI_SSPM_PSRCEN 0x00000010 -# define CS4281PCI_SSPM_JSEN 0x00000008 -# define CS4281PCI_SSPM_ACLEN 0x00000004 -# define CS4281PCI_SSPM_FMEN 0x00000002 - -#define CS4281PCI_DACSR 0x744 -#define CS4281PCI_ADCSR 0x748 -#define CS4281PCI_SSCR 0x74c - -#define CS4281PCI_SRCSA 0x75c -# define CS4281PCI_SRCSA_PLSS(x) (x) -# define CS4281PCI_SRCSA_PRSS(x) ((x) << 8) -# define CS4281PCI_SRCSA_CLSS(x) ((x) << 16) -# define CS4281PCI_SRCSA_CRSS(x) ((x) << 24) - -#define CS4281PCI_PPLVC 0x760 -#define CS4281PCI_PPRVC 0x764 +#define CS4281PCI_HISR 0x000 +#define CS4281PCI_HISR_DMAI 0x00040000 +#define CS4281PCI_HISR_DMA(x) (0x0100 << (x)) + +#define CS4281PCI_HICR 0x008 +#define CS4281PCI_HICR_EOI 0x00000003 + +#define CS4281PCI_HIMR 0x00c +#define CS4281PCI_HIMR_DMAI 0x00040000 +#define CS4281PCI_HIMR_DMA(x) (0x0100 << (x)) + +#define CS4281PCI_IIER 0x010 + +#define CS4281PCI_HDSR(x) (0x0f0 + (x) * 0x004) +#define CS4281PCI_HDSR_CH1P 0x02000000 +#define CS4281PCI_HDSR_CH2P 0x01000000 +#define CS4281PCI_HDSR_HDTC 0x00020000 +#define CS4281PCI_HDSR_DTC 0x00010000 +#define CS4281PCI_HDSR_DRUN 0x00008000 +#define CS4281PCI_HDSR_RQ 0x00000080 + +#define CS4281PCI_DCA(x) (0x110 + (x) * 0x010) +#define CS4281PCI_DCC(x) (0x114 + (x) * 0x010) +#define CS4281PCI_DBA(x) (0x118 + (x) * 0x010) +#define CS4281PCI_DBC(x) (0x11c + (x) * 0x010) + +#define CS4281PCI_DMR(x) (0x150 + (x) * 0x008) +#define CS4281PCI_DMR_DMA 0x20000000 +#define CS4281PCI_DMR_POLL 0x10000000 +#define CS4281PCI_DMR_TBC 0x02000000 +#define CS4281PCI_DMR_CBC 0x01000000 +#define CS4281PCI_DMR_SWAPC 0x00400000 +#define CS4281PCI_DMR_SIZE20 0x00100000 +#define CS4281PCI_DMR_USIGN 0x00080000 +#define CS4281PCI_DMR_BEND 0x00040000 +#define CS4281PCI_DMR_MONO 0x00020000 +#define CS4281PCI_DMR_SIZE8 0x00010000 +#define CS4281PCI_DMR_TYPE_DEMAND 0x00000000 +#define CS4281PCI_DMR_TYPE_SINGLE 0x00000040 +#define CS4281PCI_DMR_TYPE_BLOCK 0x00000080 +#define CS4281PCI_DMR_TYPE_CASCADE 0x000000c0 +#define CS4281PCI_DMR_DEC 0x00000020 +#define CS4281PCI_DMR_AUTO 0x00000010 +#define CS4281PCI_DMR_TR_PLAY 0x00000008 +#define CS4281PCI_DMR_TR_REC 0x00000004 + +#define CS4281PCI_DCR(x) (0x154 + (x) * 0x008) +#define CS4281PCI_DCR_HTCIE 0x00020000 +#define CS4281PCI_DCR_TCIE 0x00010000 +#define CS4281PCI_DCR_MSK 0x00000001 + +#define CS4281PCI_FCR(x) (0x180 + (x) * 0x004) +#define CS4281PCI_FCR_FEN 0x80000000 +#define CS4281PCI_FCR_DACZ 0x40000000 +#define CS4281PCI_FCR_PSH 0x20000000 +#define CS4281PCI_FCR_RS(x) ((x) << 24) +#define CS4281PCI_FCR_LS(x) ((x) << 16) +#define CS4281PCI_FCR_SZ(x) ((x) << 8) +#define CS4281PCI_FCR_OF(x) (x) + +#define CS4281PCI_FPDR(x) (0x190 + (x) * 0x004) + +#define CS4281PCI_FCHS 0x20c +#define CS4281PCI_FSIC(x) (0x210 + (x) * 0x004) + +#define CS4281PCI_PMCS 0x344 +#define CS4281PCI_PMCS_PS_MASK 0x00000003 +#define CS4281PCI_PMCS_OFFSET (CS4281PCI_PMCS - 0x300) + +#define CS4281PCI_CWPR 0x3e0 +#define CS4281PCI_CWPR_MAGIC 0x00004281 + +#define CS4281PCI_EPPMC 0x3e4 +#define CS4281PCI_EPPMC_FPDN 0x00004000 +#define CS4281PCI_GPIOR 0x3e8 + +#define CS4281PCI_SPMC 0x3ec +#define CS4281PCI_SPMC_RSTN 0x00000001 +#define CS4281PCI_SPMC_ASYN 0x00000002 +#define CS4281PCI_SPMC_WUP1 0x00000004 +#define CS4281PCI_SPMC_WUP2 0x00000008 +#define CS4281PCI_SPMC_ASDO 0x00000080 +#define CS4281PCI_SPMC_ASDI2E 0x00000100 +#define CS4281PCI_SPMC_EESPD 0x00000200 +#define CS4281PCI_SPMC_GISPEN 0x00004000 +#define CS4281PCI_SPMC_GIPPEN 0x00008000 + +#define CS4281PCI_CFLR 0x3f0 +#define CS4281PCI_IISR 0x3f4 +#define CS4281PCI_TMS 0x3f8 +#define CS4281PCI_SSVID 0x3fc + +#define CS4281PCI_CLKCR1 0x400 +#define CS_4281PCI_CLKCR1_DLLSS_MASK 0x0000000c +#define CS_4281PCI_CLKCR1_DLLSS_AC97 0x00000004 +#define CS4281PCI_CLKCR1_DLLP 0x00000010 +#define CS4281PCI_CLKCR1_SWCE 0x00000020 +#define CS4281PCI_CLKCR1_DLLOS 0x00000040 +#define CS4281PCI_CLKCR1_CKRA 0x00010000 +#define CS4281PCI_CLKCR1_DLLRDY 0x01000000 +#define CS4281PCI_CLKCR1_CLKON 0x02000000 + +#define CS4281PCI_FRR 0x410 + +#define CS4281PCI_SLT12O 0x41c +#define CS4281PCI_SERMC 0x420 +#define CS4281PCI_SERMC_PTC_AC97 0x00000002 +#define CS4281PCI_SERMC_PTC_MASK 0x0000000e +#define CS4281PCI_SERMC_ODSEN1 0x01000000 +#define CS4281PCI_SERMC_ODSEN2 0x02000000 +#define CS4281PCI_SERC1 0x428 +#define CS4281PCI_SERC2 0x42c + +#define CS4281PCI_SLT12M 0x45c +#define CS4281PCI_ACCTL 0x460 +#define CS4281PCI_ACCTL_ESYN 0x00000002 +#define CS4281PCI_ACCTL_VFRM 0x00000004 +#define CS4281PCI_ACCTL_DCV 0x00000008 +#define CS4281PCI_ACCTL_CRW 0x00000010 +#define CS4281PCI_ACCTL_TC 0x00000040 + +#define CS4281PCI_ACSTS 0x464 +#define CS4281PCI_ACSTS_CRDY 0x00000001 +#define CS4281PCI_ACSTS_VSTS 0x00000002 + +#define CS4281PCI_ACOSV 0x468 +#define CS4281PCI_ACOSV_SLV(x) (1 << (x - 3)) +#define CS4281PCI_ACCAD 0x46c +#define CS4281PCI_ACCDA 0x470 +#define CS4281PCI_ACISV 0x474 +#define CS4281PCI_ACISV_ISV(x) (1 << (x - 3)) +#define CS4281PCI_ACSAD 0x478 +#define CS4281PCI_ACSDA 0x47c +#define CS4281PCI_JSPT 0x480 +#define CS4281PCI_JSCTL 0x484 + +#define CS4281PCI_SSPM 0x740 +#define CS4281PCI_SSPM_MIXEN 0x00000040 +#define CS4281PCI_SSPM_CSRCEN 0x00000020 +#define CS4281PCI_SSPM_PSRCEN 0x00000010 +#define CS4281PCI_SSPM_JSEN 0x00000008 +#define CS4281PCI_SSPM_ACLEN 0x00000004 +#define CS4281PCI_SSPM_FMEN 0x00000002 + +#define CS4281PCI_DACSR 0x744 +#define CS4281PCI_ADCSR 0x748 +#define CS4281PCI_SSCR 0x74c + +#define CS4281PCI_SRCSA 0x75c +#define CS4281PCI_SRCSA_PLSS(x) (x) +#define CS4281PCI_SRCSA_PRSS(x) ((x) << 8) +#define CS4281PCI_SRCSA_CLSS(x) ((x) << 16) +#define CS4281PCI_SRCSA_CRSS(x) ((x) << 24) + +#define CS4281PCI_PPLVC 0x760 +#define CS4281PCI_PPRVC 0x764 /* Slot definitions (minimal) */ -#define CS4281PCI_LPCM_PLAY_SLOT 0x00 -#define CS4281PCI_RPCM_PLAY_SLOT 0x01 +#define CS4281PCI_LPCM_PLAY_SLOT 0x00 +#define CS4281PCI_RPCM_PLAY_SLOT 0x01 -#define CS4281PCI_LPCM_REC_SLOT 0x0a -#define CS4281PCI_RPCM_REC_SLOT 0x0b +#define CS4281PCI_LPCM_REC_SLOT 0x0a +#define CS4281PCI_RPCM_REC_SLOT 0x0b -#define CS4281PCI_DISABLED_SLOT 0x1f +#define CS4281PCI_DISABLED_SLOT 0x1f #endif /* _CS4281_H_ */ Index: sys/dev/sound/pci/cs4281.c =================================================================== --- sys/dev/sound/pci/cs4281.c +++ sys/dev/sound/pci/cs4281.c @@ -37,13 +37,11 @@ #include "opt_snd.h" #endif -#include -#include - #include #include - #include +#include +#include #define CS4281_DEFAULT_BUFSZ 16384 @@ -52,7 +50,7 @@ /* DMA Engine Indices */ #define CS4281_DMA_PLAY 0 -#define CS4281_DMA_REC 1 +#define CS4281_DMA_REC 1 /* Misc */ @@ -60,7 +58,7 @@ #ifndef DEB #define DEB(x) /* x */ -#endif /* DEB */ +#endif /* DEB */ /* ------------------------------------------------------------------------- */ /* Structures */ @@ -69,33 +67,33 @@ /* channel registers */ struct sc_chinfo { - struct sc_info *parent; + struct sc_info *parent; - struct snd_dbuf *buffer; - struct pcm_channel *channel; + struct snd_dbuf *buffer; + struct pcm_channel *channel; - u_int32_t spd, fmt, bps, blksz; + u_int32_t spd, fmt, bps, blksz; - int dma_setup, dma_active, dma_chan; + int dma_setup, dma_active, dma_chan; }; /* device private data */ struct sc_info { - device_t dev; - u_int32_t type; + device_t dev; + u_int32_t type; - bus_space_tag_t st; - bus_space_handle_t sh; - bus_dma_tag_t parent_dmat; + bus_space_tag_t st; + bus_space_handle_t sh; + bus_dma_tag_t parent_dmat; - struct resource *reg, *irq, *mem; - int regtype, regid, irqid, memid; - void *ih; + struct resource *reg, *irq, *mem; + int regtype, regid, irqid, memid; + void *ih; - int power; - unsigned long bufsz; - struct sc_chinfo pch; - struct sc_chinfo rch; + int power; + unsigned long bufsz; + struct sc_chinfo pch; + struct sc_chinfo rch; }; /* -------------------------------------------------------------------- */ @@ -103,42 +101,34 @@ /* ADC/DAC control */ static u_int32_t adcdac_go(struct sc_chinfo *ch, u_int32_t go); -static void adcdac_prog(struct sc_chinfo *ch); +static void adcdac_prog(struct sc_chinfo *ch); /* power management and interrupt control */ -static void cs4281_intr(void *); -static int cs4281_power(struct sc_info *, int); -static int cs4281_init(struct sc_info *); +static void cs4281_intr(void *); +static int cs4281_power(struct sc_info *, int); +static int cs4281_init(struct sc_info *); /* talk to the card */ static u_int32_t cs4281_rd(struct sc_info *, int); -static void cs4281_wr(struct sc_info *, int, u_int32_t); +static void cs4281_wr(struct sc_info *, int, u_int32_t); /* misc */ -static u_int8_t cs4281_rate_to_rv(u_int32_t); +static u_int8_t cs4281_rate_to_rv(u_int32_t); static u_int32_t cs4281_format_to_dmr(u_int32_t); static u_int32_t cs4281_format_to_bps(u_int32_t); /* -------------------------------------------------------------------- */ /* formats (do not add formats without editing cs_fmt_tab) */ -static u_int32_t cs4281_fmts[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S8, 1, 0), - SND_FORMAT(AFMT_S8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - SND_FORMAT(AFMT_U16_LE, 1, 0), - SND_FORMAT(AFMT_U16_LE, 2, 0), - SND_FORMAT(AFMT_S16_BE, 1, 0), - SND_FORMAT(AFMT_S16_BE, 2, 0), - SND_FORMAT(AFMT_U16_BE, 1, 0), - SND_FORMAT(AFMT_U16_BE, 2, 0), - 0 -}; +static u_int32_t cs4281_fmts[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S8, 1, 0), + SND_FORMAT(AFMT_S8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), SND_FORMAT(AFMT_U16_LE, 1, 0), + SND_FORMAT(AFMT_U16_LE, 2, 0), SND_FORMAT(AFMT_S16_BE, 1, 0), + SND_FORMAT(AFMT_S16_BE, 2, 0), SND_FORMAT(AFMT_U16_BE, 1, 0), + SND_FORMAT(AFMT_U16_BE, 2, 0), 0 }; -static struct pcmchan_caps cs4281_caps = {6024, 48000, cs4281_fmts, 0}; +static struct pcmchan_caps cs4281_caps = { 6024, 48000, cs4281_fmts, 0 }; /* -------------------------------------------------------------------- */ /* Hardware */ @@ -146,106 +136,115 @@ static inline u_int32_t cs4281_rd(struct sc_info *sc, int regno) { - return bus_space_read_4(sc->st, sc->sh, regno); + return bus_space_read_4(sc->st, sc->sh, regno); } static inline void cs4281_wr(struct sc_info *sc, int regno, u_int32_t data) { - bus_space_write_4(sc->st, sc->sh, regno, data); - DELAY(100); + bus_space_write_4(sc->st, sc->sh, regno, data); + DELAY(100); } static inline void cs4281_clr4(struct sc_info *sc, int regno, u_int32_t mask) { - u_int32_t r; - r = cs4281_rd(sc, regno); - cs4281_wr(sc, regno, r & ~mask); + u_int32_t r; + r = cs4281_rd(sc, regno); + cs4281_wr(sc, regno, r & ~mask); } static inline void cs4281_set4(struct sc_info *sc, int regno, u_int32_t mask) { - u_int32_t v; - v = cs4281_rd(sc, regno); - cs4281_wr(sc, regno, v | mask); + u_int32_t v; + v = cs4281_rd(sc, regno); + cs4281_wr(sc, regno, v | mask); } static int cs4281_waitset(struct sc_info *sc, int regno, u_int32_t mask, int tries) { - u_int32_t v; - - while (tries > 0) { - DELAY(100); - v = cs4281_rd(sc, regno); - if ((v & mask) == mask) break; - tries --; - } - return tries; + u_int32_t v; + + while (tries > 0) { + DELAY(100); + v = cs4281_rd(sc, regno); + if ((v & mask) == mask) + break; + tries--; + } + return tries; } static int cs4281_waitclr(struct sc_info *sc, int regno, u_int32_t mask, int tries) { - u_int32_t v; - - while (tries > 0) { - DELAY(100); - v = ~ cs4281_rd(sc, regno); - if (v & mask) break; - tries --; - } - return tries; + u_int32_t v; + + while (tries > 0) { + DELAY(100); + v = ~cs4281_rd(sc, regno); + if (v & mask) + break; + tries--; + } + return tries; } /* ------------------------------------------------------------------------- */ /* Register value mapping functions */ -static u_int32_t cs4281_rates[] = {48000, 44100, 22050, 16000, 11025, 8000}; -#define CS4281_NUM_RATES sizeof(cs4281_rates)/sizeof(cs4281_rates[0]) +static u_int32_t cs4281_rates[] = { 48000, 44100, 22050, 16000, 11025, 8000 }; +#define CS4281_NUM_RATES sizeof(cs4281_rates) / sizeof(cs4281_rates[0]) static u_int8_t cs4281_rate_to_rv(u_int32_t rate) { - u_int32_t v; + u_int32_t v; - for (v = 0; v < CS4281_NUM_RATES; v++) { - if (rate == cs4281_rates[v]) return v; - } + for (v = 0; v < CS4281_NUM_RATES; v++) { + if (rate == cs4281_rates[v]) + return v; + } - v = 1536000 / rate; - if (v > 255 || v < 32) v = 5; /* default to 8k */ - return v; + v = 1536000 / rate; + if (v > 255 || v < 32) + v = 5; /* default to 8k */ + return v; } static u_int32_t cs4281_rv_to_rate(u_int8_t rv) { - u_int32_t r; + u_int32_t r; - if (rv < CS4281_NUM_RATES) return cs4281_rates[rv]; - r = 1536000 / rv; - return r; + if (rv < CS4281_NUM_RATES) + return cs4281_rates[rv]; + r = 1536000 / rv; + return r; } static inline u_int32_t cs4281_format_to_dmr(u_int32_t format) { - u_int32_t dmr = 0; - if (AFMT_8BIT & format) dmr |= CS4281PCI_DMR_SIZE8; - if (AFMT_CHANNEL(format) < 2) dmr |= CS4281PCI_DMR_MONO; - if (AFMT_BIGENDIAN & format) dmr |= CS4281PCI_DMR_BEND; - if (!(AFMT_SIGNED & format)) dmr |= CS4281PCI_DMR_USIGN; - return dmr; + u_int32_t dmr = 0; + if (AFMT_8BIT & format) + dmr |= CS4281PCI_DMR_SIZE8; + if (AFMT_CHANNEL(format) < 2) + dmr |= CS4281PCI_DMR_MONO; + if (AFMT_BIGENDIAN & format) + dmr |= CS4281PCI_DMR_BEND; + if (!(AFMT_SIGNED & format)) + dmr |= CS4281PCI_DMR_USIGN; + return dmr; } static inline u_int32_t cs4281_format_to_bps(u_int32_t format) { - return ((AFMT_8BIT & format) ? 1 : 2) * - ((AFMT_CHANNEL(format) > 1) ? 2 : 1); + return ((AFMT_8BIT & format) ? 1 : 2) * + ((AFMT_CHANNEL(format) > 1) ? 2 : 1); } /* -------------------------------------------------------------------- */ @@ -254,210 +253,212 @@ static int cs4281_rdcd(kobj_t obj, void *devinfo, int regno) { - struct sc_info *sc = (struct sc_info *)devinfo; + struct sc_info *sc = (struct sc_info *)devinfo; - regno &= 0xff; + regno &= 0xff; - /* Remove old state */ - cs4281_rd(sc, CS4281PCI_ACSDA); + /* Remove old state */ + cs4281_rd(sc, CS4281PCI_ACSDA); - /* Fill in AC97 register value request form */ - cs4281_wr(sc, CS4281PCI_ACCAD, regno); - cs4281_wr(sc, CS4281PCI_ACCDA, 0); - cs4281_wr(sc, CS4281PCI_ACCTL, CS4281PCI_ACCTL_ESYN | - CS4281PCI_ACCTL_VFRM | CS4281PCI_ACCTL_DCV | - CS4281PCI_ACCTL_CRW); + /* Fill in AC97 register value request form */ + cs4281_wr(sc, CS4281PCI_ACCAD, regno); + cs4281_wr(sc, CS4281PCI_ACCDA, 0); + cs4281_wr(sc, CS4281PCI_ACCTL, + CS4281PCI_ACCTL_ESYN | CS4281PCI_ACCTL_VFRM | CS4281PCI_ACCTL_DCV | + CS4281PCI_ACCTL_CRW); - /* Wait for read to complete */ - if (cs4281_waitclr(sc, CS4281PCI_ACCTL, CS4281PCI_ACCTL_DCV, 250) == 0) { - device_printf(sc->dev, "cs4281_rdcd: DCV did not go\n"); - return -1; - } + /* Wait for read to complete */ + if (cs4281_waitclr(sc, CS4281PCI_ACCTL, CS4281PCI_ACCTL_DCV, 250) == + 0) { + device_printf(sc->dev, "cs4281_rdcd: DCV did not go\n"); + return -1; + } - /* Wait for valid status */ - if (cs4281_waitset(sc, CS4281PCI_ACSTS, CS4281PCI_ACSTS_VSTS, 250) == 0) { - device_printf(sc->dev,"cs4281_rdcd: VSTS did not come\n"); - return -1; - } + /* Wait for valid status */ + if (cs4281_waitset(sc, CS4281PCI_ACSTS, CS4281PCI_ACSTS_VSTS, 250) == + 0) { + device_printf(sc->dev, "cs4281_rdcd: VSTS did not come\n"); + return -1; + } - return cs4281_rd(sc, CS4281PCI_ACSDA); + return cs4281_rd(sc, CS4281PCI_ACSDA); } static int cs4281_wrcd(kobj_t obj, void *devinfo, int regno, u_int32_t data) { - struct sc_info *sc = (struct sc_info *)devinfo; + struct sc_info *sc = (struct sc_info *)devinfo; - regno &= 0xff; + regno &= 0xff; - cs4281_wr(sc, CS4281PCI_ACCAD, regno); - cs4281_wr(sc, CS4281PCI_ACCDA, data); - cs4281_wr(sc, CS4281PCI_ACCTL, CS4281PCI_ACCTL_ESYN | - CS4281PCI_ACCTL_VFRM | CS4281PCI_ACCTL_DCV); + cs4281_wr(sc, CS4281PCI_ACCAD, regno); + cs4281_wr(sc, CS4281PCI_ACCDA, data); + cs4281_wr(sc, CS4281PCI_ACCTL, + CS4281PCI_ACCTL_ESYN | CS4281PCI_ACCTL_VFRM | CS4281PCI_ACCTL_DCV); - if (cs4281_waitclr(sc, CS4281PCI_ACCTL, CS4281PCI_ACCTL_DCV, 250) == 0) { - device_printf(sc->dev,"cs4281_wrcd: DCV did not go\n"); - } + if (cs4281_waitclr(sc, CS4281PCI_ACCTL, CS4281PCI_ACCTL_DCV, 250) == + 0) { + device_printf(sc->dev, "cs4281_wrcd: DCV did not go\n"); + } - return 0; + return 0; } -static kobj_method_t cs4281_ac97_methods[] = { - KOBJMETHOD(ac97_read, cs4281_rdcd), - KOBJMETHOD(ac97_write, cs4281_wrcd), - KOBJMETHOD_END -}; +static kobj_method_t cs4281_ac97_methods[] = { KOBJMETHOD(ac97_read, + cs4281_rdcd), + KOBJMETHOD(ac97_write, cs4281_wrcd), KOBJMETHOD_END }; AC97_DECLARE(cs4281_ac97); /* ------------------------------------------------------------------------- */ /* shared rec/play channel interface */ static void * -cs4281chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +cs4281chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { - struct sc_info *sc = devinfo; - struct sc_chinfo *ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch; + struct sc_info *sc = devinfo; + struct sc_chinfo *ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch; - ch->buffer = b; - if (sndbuf_alloc(ch->buffer, sc->parent_dmat, 0, sc->bufsz) != 0) { - return NULL; - } - ch->parent = sc; - ch->channel = c; + ch->buffer = b; + if (sndbuf_alloc(ch->buffer, sc->parent_dmat, 0, sc->bufsz) != 0) { + return NULL; + } + ch->parent = sc; + ch->channel = c; - ch->fmt = SND_FORMAT(AFMT_U8, 1, 0); - ch->spd = DSP_DEFAULT_SPEED; - ch->bps = 1; - ch->blksz = sndbuf_getsize(ch->buffer); + ch->fmt = SND_FORMAT(AFMT_U8, 1, 0); + ch->spd = DSP_DEFAULT_SPEED; + ch->bps = 1; + ch->blksz = sndbuf_getsize(ch->buffer); - ch->dma_chan = (dir == PCMDIR_PLAY) ? CS4281_DMA_PLAY : CS4281_DMA_REC; - ch->dma_setup = 0; + ch->dma_chan = (dir == PCMDIR_PLAY) ? CS4281_DMA_PLAY : CS4281_DMA_REC; + ch->dma_setup = 0; - adcdac_go(ch, 0); - adcdac_prog(ch); + adcdac_go(ch, 0); + adcdac_prog(ch); - return ch; + return ch; } static u_int32_t cs4281chan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - u_int32_t go; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; + u_int32_t go; - go = adcdac_go(ch, 0); + go = adcdac_go(ch, 0); - /* 2 interrupts are possible and used in buffer (half-empty,empty), - * hence factor of 2. */ - ch->blksz = MIN(blocksize, sc->bufsz / 2); - sndbuf_resize(ch->buffer, 2, ch->blksz); - ch->dma_setup = 0; - adcdac_prog(ch); - adcdac_go(ch, go); + /* 2 interrupts are possible and used in buffer (half-empty,empty), + * hence factor of 2. */ + ch->blksz = MIN(blocksize, sc->bufsz / 2); + sndbuf_resize(ch->buffer, 2, ch->blksz); + ch->dma_setup = 0; + adcdac_prog(ch); + adcdac_go(ch, go); - DEB(printf("cs4281chan_setblocksize: blksz %d Setting %d\n", blocksize, ch->blksz)); + DEB(printf("cs4281chan_setblocksize: blksz %d Setting %d\n", blocksize, + ch->blksz)); - return ch->blksz; + return ch->blksz; } static u_int32_t cs4281chan_setspeed(kobj_t obj, void *data, u_int32_t speed) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - u_int32_t go, v, r; - - go = adcdac_go(ch, 0); /* pause */ - r = (ch->dma_chan == CS4281_DMA_PLAY) ? CS4281PCI_DACSR : CS4281PCI_ADCSR; - v = cs4281_rate_to_rv(speed); - cs4281_wr(sc, r, v); - adcdac_go(ch, go); /* unpause */ - - ch->spd = cs4281_rv_to_rate(v); - return ch->spd; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; + u_int32_t go, v, r; + + go = adcdac_go(ch, 0); /* pause */ + r = (ch->dma_chan == CS4281_DMA_PLAY) ? CS4281PCI_DACSR : + CS4281PCI_ADCSR; + v = cs4281_rate_to_rv(speed); + cs4281_wr(sc, r, v); + adcdac_go(ch, go); /* unpause */ + + ch->spd = cs4281_rv_to_rate(v); + return ch->spd; } static int cs4281chan_setformat(kobj_t obj, void *data, u_int32_t format) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - u_int32_t v, go; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; + u_int32_t v, go; - go = adcdac_go(ch, 0); /* pause */ + go = adcdac_go(ch, 0); /* pause */ - if (ch->dma_chan == CS4281_DMA_PLAY) - v = CS4281PCI_DMR_TR_PLAY; - else - v = CS4281PCI_DMR_TR_REC; - v |= CS4281PCI_DMR_DMA | CS4281PCI_DMR_AUTO; - v |= cs4281_format_to_dmr(format); - cs4281_wr(sc, CS4281PCI_DMR(ch->dma_chan), v); + if (ch->dma_chan == CS4281_DMA_PLAY) + v = CS4281PCI_DMR_TR_PLAY; + else + v = CS4281PCI_DMR_TR_REC; + v |= CS4281PCI_DMR_DMA | CS4281PCI_DMR_AUTO; + v |= cs4281_format_to_dmr(format); + cs4281_wr(sc, CS4281PCI_DMR(ch->dma_chan), v); - adcdac_go(ch, go); /* unpause */ + adcdac_go(ch, go); /* unpause */ - ch->fmt = format; - ch->bps = cs4281_format_to_bps(format); - ch->dma_setup = 0; + ch->fmt = format; + ch->bps = cs4281_format_to_bps(format); + ch->dma_setup = 0; - return 0; + return 0; } static u_int32_t cs4281chan_getptr(kobj_t obj, void *data) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - u_int32_t dba, dca, ptr; - int sz; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; + u_int32_t dba, dca, ptr; + int sz; - sz = sndbuf_getsize(ch->buffer); - dba = cs4281_rd(sc, CS4281PCI_DBA(ch->dma_chan)); - dca = cs4281_rd(sc, CS4281PCI_DCA(ch->dma_chan)); - ptr = (dca - dba + sz) % sz; + sz = sndbuf_getsize(ch->buffer); + dba = cs4281_rd(sc, CS4281PCI_DBA(ch->dma_chan)); + dca = cs4281_rd(sc, CS4281PCI_DCA(ch->dma_chan)); + ptr = (dca - dba + sz) % sz; - return ptr; + return ptr; } static int cs4281chan_trigger(kobj_t obj, void *data, int go) { - struct sc_chinfo *ch = data; - - switch(go) { - case PCMTRIG_START: - adcdac_prog(ch); - adcdac_go(ch, 1); - break; - case PCMTRIG_STOP: - case PCMTRIG_ABORT: - adcdac_go(ch, 0); - break; - default: - break; - } + struct sc_chinfo *ch = data; + + switch (go) { + case PCMTRIG_START: + adcdac_prog(ch); + adcdac_go(ch, 1); + break; + case PCMTRIG_STOP: + case PCMTRIG_ABORT: + adcdac_go(ch, 0); + break; + default: + break; + } - /* return 0 if ok */ - return 0; + /* return 0 if ok */ + return 0; } static struct pcmchan_caps * cs4281chan_getcaps(kobj_t obj, void *data) { - return &cs4281_caps; + return &cs4281_caps; } -static kobj_method_t cs4281chan_methods[] = { - KOBJMETHOD(channel_init, cs4281chan_init), - KOBJMETHOD(channel_setformat, cs4281chan_setformat), - KOBJMETHOD(channel_setspeed, cs4281chan_setspeed), - KOBJMETHOD(channel_setblocksize, cs4281chan_setblocksize), - KOBJMETHOD(channel_trigger, cs4281chan_trigger), - KOBJMETHOD(channel_getptr, cs4281chan_getptr), - KOBJMETHOD(channel_getcaps, cs4281chan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t cs4281chan_methods[] = { KOBJMETHOD(channel_init, + cs4281chan_init), + KOBJMETHOD(channel_setformat, cs4281chan_setformat), + KOBJMETHOD(channel_setspeed, cs4281chan_setspeed), + KOBJMETHOD(channel_setblocksize, cs4281chan_setblocksize), + KOBJMETHOD(channel_trigger, cs4281chan_trigger), + KOBJMETHOD(channel_getptr, cs4281chan_getptr), + KOBJMETHOD(channel_getcaps, cs4281chan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(cs4281chan); /* -------------------------------------------------------------------- */ @@ -469,36 +470,37 @@ static u_int32_t adcdac_go(struct sc_chinfo *ch, u_int32_t go) { - struct sc_info *sc = ch->parent; - u_int32_t going; + struct sc_info *sc = ch->parent; + u_int32_t going; - going = !(cs4281_rd(sc, CS4281PCI_DCR(ch->dma_chan)) & CS4281PCI_DCR_MSK); + going = !( + cs4281_rd(sc, CS4281PCI_DCR(ch->dma_chan)) & CS4281PCI_DCR_MSK); - if (go) - cs4281_clr4(sc, CS4281PCI_DCR(ch->dma_chan), CS4281PCI_DCR_MSK); - else - cs4281_set4(sc, CS4281PCI_DCR(ch->dma_chan), CS4281PCI_DCR_MSK); + if (go) + cs4281_clr4(sc, CS4281PCI_DCR(ch->dma_chan), CS4281PCI_DCR_MSK); + else + cs4281_set4(sc, CS4281PCI_DCR(ch->dma_chan), CS4281PCI_DCR_MSK); - cs4281_wr(sc, CS4281PCI_HICR, CS4281PCI_HICR_EOI); + cs4281_wr(sc, CS4281PCI_HICR, CS4281PCI_HICR_EOI); - return going; + return going; } static void adcdac_prog(struct sc_chinfo *ch) { - struct sc_info *sc = ch->parent; - u_int32_t go; - - if (!ch->dma_setup) { - go = adcdac_go(ch, 0); - cs4281_wr(sc, CS4281PCI_DBA(ch->dma_chan), - sndbuf_getbufaddr(ch->buffer)); - cs4281_wr(sc, CS4281PCI_DBC(ch->dma_chan), - sndbuf_getsize(ch->buffer) / ch->bps - 1); - ch->dma_setup = 1; - adcdac_go(ch, go); - } + struct sc_info *sc = ch->parent; + u_int32_t go; + + if (!ch->dma_setup) { + go = adcdac_go(ch, 0); + cs4281_wr(sc, CS4281PCI_DBA(ch->dma_chan), + sndbuf_getbufaddr(ch->buffer)); + cs4281_wr(sc, CS4281PCI_DBC(ch->dma_chan), + sndbuf_getsize(ch->buffer) / ch->bps - 1); + ch->dma_setup = 1; + adcdac_go(ch, go); + } } /* -------------------------------------------------------------------- */ @@ -507,25 +509,28 @@ static void cs4281_intr(void *p) { - struct sc_info *sc = (struct sc_info *)p; - u_int32_t hisr; + struct sc_info *sc = (struct sc_info *)p; + u_int32_t hisr; - hisr = cs4281_rd(sc, CS4281PCI_HISR); + hisr = cs4281_rd(sc, CS4281PCI_HISR); - if (hisr == 0) return; + if (hisr == 0) + return; - if (hisr & CS4281PCI_HISR_DMA(CS4281_DMA_PLAY)) { - chn_intr(sc->pch.channel); - cs4281_rd(sc, CS4281PCI_HDSR(CS4281_DMA_PLAY)); /* Clear interrupt */ - } + if (hisr & CS4281PCI_HISR_DMA(CS4281_DMA_PLAY)) { + chn_intr(sc->pch.channel); + cs4281_rd(sc, + CS4281PCI_HDSR(CS4281_DMA_PLAY)); /* Clear interrupt */ + } - if (hisr & CS4281PCI_HISR_DMA(CS4281_DMA_REC)) { - chn_intr(sc->rch.channel); - cs4281_rd(sc, CS4281PCI_HDSR(CS4281_DMA_REC)); /* Clear interrupt */ - } + if (hisr & CS4281PCI_HISR_DMA(CS4281_DMA_REC)) { + chn_intr(sc->rch.channel); + cs4281_rd(sc, + CS4281PCI_HDSR(CS4281_DMA_REC)); /* Clear interrupt */ + } - /* Signal End-of-Interrupt */ - cs4281_wr(sc, CS4281PCI_HICR, CS4281PCI_HICR_EOI); + /* Signal End-of-Interrupt */ + cs4281_wr(sc, CS4281PCI_HICR, CS4281PCI_HICR_EOI); } /* -------------------------------------------------------------------- */ @@ -535,201 +540,187 @@ cs4281_power(struct sc_info *sc, int state) { - switch (state) { - case 0: - /* Permit r/w access to all BA0 registers */ - cs4281_wr(sc, CS4281PCI_CWPR, CS4281PCI_CWPR_MAGIC); - /* Power on */ - cs4281_clr4(sc, CS4281PCI_EPPMC, CS4281PCI_EPPMC_FPDN); - break; - case 3: - /* Power off card and codec */ - cs4281_set4(sc, CS4281PCI_EPPMC, CS4281PCI_EPPMC_FPDN); - cs4281_clr4(sc, CS4281PCI_SPMC, CS4281PCI_SPMC_RSTN); - break; - } - - DEB(printf("cs4281_power %d -> %d\n", sc->power, state)); - sc->power = state; - - return 0; + switch (state) { + case 0: + /* Permit r/w access to all BA0 registers */ + cs4281_wr(sc, CS4281PCI_CWPR, CS4281PCI_CWPR_MAGIC); + /* Power on */ + cs4281_clr4(sc, CS4281PCI_EPPMC, CS4281PCI_EPPMC_FPDN); + break; + case 3: + /* Power off card and codec */ + cs4281_set4(sc, CS4281PCI_EPPMC, CS4281PCI_EPPMC_FPDN); + cs4281_clr4(sc, CS4281PCI_SPMC, CS4281PCI_SPMC_RSTN); + break; + } + + DEB(printf("cs4281_power %d -> %d\n", sc->power, state)); + sc->power = state; + + return 0; } static int cs4281_init(struct sc_info *sc) { - u_int32_t i, v; - - /* (0) Blast clock register and serial port */ - cs4281_wr(sc, CS4281PCI_CLKCR1, 0); - cs4281_wr(sc, CS4281PCI_SERMC, 0); - - /* (1) Make ESYN 0 to turn sync pulse on AC97 link */ - cs4281_wr(sc, CS4281PCI_ACCTL, 0); - DELAY(50); - - /* (2) Effect Reset */ - cs4281_wr(sc, CS4281PCI_SPMC, 0); - DELAY(100); - cs4281_wr(sc, CS4281PCI_SPMC, CS4281PCI_SPMC_RSTN); - /* Wait 50ms for ABITCLK to become stable */ - DELAY(50000); - - /* (3) Enable Sound System Clocks */ - cs4281_wr(sc, CS4281PCI_CLKCR1, CS4281PCI_CLKCR1_DLLP); - DELAY(50000); /* Wait for PLL to stabilize */ - cs4281_wr(sc, CS4281PCI_CLKCR1, - CS4281PCI_CLKCR1_DLLP | CS4281PCI_CLKCR1_SWCE); - - /* (4) Power Up - this combination is essential. */ - cs4281_set4(sc, CS4281PCI_SSPM, - CS4281PCI_SSPM_ACLEN | CS4281PCI_SSPM_PSRCEN | + u_int32_t i, v; + + /* (0) Blast clock register and serial port */ + cs4281_wr(sc, CS4281PCI_CLKCR1, 0); + cs4281_wr(sc, CS4281PCI_SERMC, 0); + + /* (1) Make ESYN 0 to turn sync pulse on AC97 link */ + cs4281_wr(sc, CS4281PCI_ACCTL, 0); + DELAY(50); + + /* (2) Effect Reset */ + cs4281_wr(sc, CS4281PCI_SPMC, 0); + DELAY(100); + cs4281_wr(sc, CS4281PCI_SPMC, CS4281PCI_SPMC_RSTN); + /* Wait 50ms for ABITCLK to become stable */ + DELAY(50000); + + /* (3) Enable Sound System Clocks */ + cs4281_wr(sc, CS4281PCI_CLKCR1, CS4281PCI_CLKCR1_DLLP); + DELAY(50000); /* Wait for PLL to stabilize */ + cs4281_wr(sc, CS4281PCI_CLKCR1, + CS4281PCI_CLKCR1_DLLP | CS4281PCI_CLKCR1_SWCE); + + /* (4) Power Up - this combination is essential. */ + cs4281_set4(sc, CS4281PCI_SSPM, + CS4281PCI_SSPM_ACLEN | CS4281PCI_SSPM_PSRCEN | CS4281PCI_SSPM_CSRCEN | CS4281PCI_SSPM_MIXEN); - /* (5) Wait for clock stabilization */ - if (cs4281_waitset(sc, - CS4281PCI_CLKCR1, - CS4281PCI_CLKCR1_DLLRDY, - 250) == 0) { - device_printf(sc->dev, "Clock stabilization failed\n"); - return -1; - } - - /* (6) Enable ASYNC generation. */ - cs4281_wr(sc, CS4281PCI_ACCTL,CS4281PCI_ACCTL_ESYN); - - /* Wait to allow AC97 to start generating clock bit */ - DELAY(50000); - - /* Set AC97 timing */ - cs4281_wr(sc, CS4281PCI_SERMC, CS4281PCI_SERMC_PTC_AC97); - - /* (7) Wait for AC97 ready signal */ - if (cs4281_waitset(sc, CS4281PCI_ACSTS, CS4281PCI_ACSTS_CRDY, 250) == 0) { - device_printf(sc->dev, "codec did not avail\n"); - return -1; - } - - /* (8) Assert valid frame signal to begin sending commands to - * AC97 codec */ - cs4281_wr(sc, - CS4281PCI_ACCTL, - CS4281PCI_ACCTL_VFRM | CS4281PCI_ACCTL_ESYN); - - /* (9) Wait for codec calibration */ - for(i = 0 ; i < 1000; i++) { - DELAY(10000); - v = cs4281_rdcd(0, sc, AC97_REG_POWER); - if ((v & 0x0f) == 0x0f) { - break; + /* (5) Wait for clock stabilization */ + if (cs4281_waitset(sc, CS4281PCI_CLKCR1, CS4281PCI_CLKCR1_DLLRDY, + 250) == 0) { + device_printf(sc->dev, "Clock stabilization failed\n"); + return -1; } - } - if (i == 1000) { - device_printf(sc->dev, "codec failed to calibrate\n"); - return -1; - } - - /* (10) Set AC97 timing */ - cs4281_wr(sc, CS4281PCI_SERMC, CS4281PCI_SERMC_PTC_AC97); - - /* (11) Wait for valid data to arrive */ - if (cs4281_waitset(sc, - CS4281PCI_ACISV, - CS4281PCI_ACISV_ISV(3) | CS4281PCI_ACISV_ISV(4), - 10000) == 0) { - device_printf(sc->dev, "cs4281 never got valid data\n"); - return -1; - } - - /* (12) Start digital data transfer of audio data to codec */ - cs4281_wr(sc, - CS4281PCI_ACOSV, - CS4281PCI_ACOSV_SLV(3) | CS4281PCI_ACOSV_SLV(4)); - - /* Set Master and headphone to max */ - cs4281_wrcd(0, sc, AC97_MIX_AUXOUT, 0); - cs4281_wrcd(0, sc, AC97_MIX_MASTER, 0); - - /* Power on the DAC */ - v = cs4281_rdcd(0, sc, AC97_REG_POWER) & 0xfdff; - cs4281_wrcd(0, sc, AC97_REG_POWER, v); - - /* Wait until DAC state ready */ - for(i = 0; i < 320; i++) { - DELAY(100); - v = cs4281_rdcd(0, sc, AC97_REG_POWER); - if (v & 0x02) break; - } - /* Power on the ADC */ - v = cs4281_rdcd(0, sc, AC97_REG_POWER) & 0xfeff; - cs4281_wrcd(0, sc, AC97_REG_POWER, v); + /* (6) Enable ASYNC generation. */ + cs4281_wr(sc, CS4281PCI_ACCTL, CS4281PCI_ACCTL_ESYN); - /* Wait until ADC state ready */ - for(i = 0; i < 320; i++) { - DELAY(100); - v = cs4281_rdcd(0, sc, AC97_REG_POWER); - if (v & 0x01) break; - } - - /* FIFO configuration (driver is DMA orientated, implicit FIFO) */ - /* Play FIFO */ - - v = CS4281PCI_FCR_RS(CS4281PCI_RPCM_PLAY_SLOT) | - CS4281PCI_FCR_LS(CS4281PCI_LPCM_PLAY_SLOT) | - CS4281PCI_FCR_SZ(CS4281_FIFO_SIZE)| - CS4281PCI_FCR_OF(0); - cs4281_wr(sc, CS4281PCI_FCR(CS4281_DMA_PLAY), v); - - cs4281_wr(sc, CS4281PCI_FCR(CS4281_DMA_PLAY), v | CS4281PCI_FCR_FEN); - - /* Record FIFO */ - v = CS4281PCI_FCR_RS(CS4281PCI_RPCM_REC_SLOT) | - CS4281PCI_FCR_LS(CS4281PCI_LPCM_REC_SLOT) | - CS4281PCI_FCR_SZ(CS4281_FIFO_SIZE)| - CS4281PCI_FCR_OF(CS4281_FIFO_SIZE + 1); - cs4281_wr(sc, CS4281PCI_FCR(CS4281_DMA_REC), v | CS4281PCI_FCR_PSH); - cs4281_wr(sc, CS4281PCI_FCR(CS4281_DMA_REC), v | CS4281PCI_FCR_FEN); - - /* Match AC97 slots to FIFOs */ - v = CS4281PCI_SRCSA_PLSS(CS4281PCI_LPCM_PLAY_SLOT) | - CS4281PCI_SRCSA_PRSS(CS4281PCI_RPCM_PLAY_SLOT) | - CS4281PCI_SRCSA_CLSS(CS4281PCI_LPCM_REC_SLOT) | - CS4281PCI_SRCSA_CRSS(CS4281PCI_RPCM_REC_SLOT); - cs4281_wr(sc, CS4281PCI_SRCSA, v); - - /* Set Auto-Initialize and set directions */ - cs4281_wr(sc, - CS4281PCI_DMR(CS4281_DMA_PLAY), - CS4281PCI_DMR_DMA | - CS4281PCI_DMR_AUTO | - CS4281PCI_DMR_TR_PLAY); - cs4281_wr(sc, - CS4281PCI_DMR(CS4281_DMA_REC), - CS4281PCI_DMR_DMA | - CS4281PCI_DMR_AUTO | - CS4281PCI_DMR_TR_REC); - - /* Enable half and empty buffer interrupts keeping DMA paused */ - cs4281_wr(sc, - CS4281PCI_DCR(CS4281_DMA_PLAY), - CS4281PCI_DCR_TCIE | CS4281PCI_DCR_HTCIE | CS4281PCI_DCR_MSK); - cs4281_wr(sc, - CS4281PCI_DCR(CS4281_DMA_REC), - CS4281PCI_DCR_TCIE | CS4281PCI_DCR_HTCIE | CS4281PCI_DCR_MSK); - - /* Enable Interrupts */ - cs4281_clr4(sc, - CS4281PCI_HIMR, - CS4281PCI_HIMR_DMAI | - CS4281PCI_HIMR_DMA(CS4281_DMA_PLAY) | + /* Wait to allow AC97 to start generating clock bit */ + DELAY(50000); + + /* Set AC97 timing */ + cs4281_wr(sc, CS4281PCI_SERMC, CS4281PCI_SERMC_PTC_AC97); + + /* (7) Wait for AC97 ready signal */ + if (cs4281_waitset(sc, CS4281PCI_ACSTS, CS4281PCI_ACSTS_CRDY, 250) == + 0) { + device_printf(sc->dev, "codec did not avail\n"); + return -1; + } + + /* (8) Assert valid frame signal to begin sending commands to + * AC97 codec */ + cs4281_wr(sc, CS4281PCI_ACCTL, + CS4281PCI_ACCTL_VFRM | CS4281PCI_ACCTL_ESYN); + + /* (9) Wait for codec calibration */ + for (i = 0; i < 1000; i++) { + DELAY(10000); + v = cs4281_rdcd(0, sc, AC97_REG_POWER); + if ((v & 0x0f) == 0x0f) { + break; + } + } + if (i == 1000) { + device_printf(sc->dev, "codec failed to calibrate\n"); + return -1; + } + + /* (10) Set AC97 timing */ + cs4281_wr(sc, CS4281PCI_SERMC, CS4281PCI_SERMC_PTC_AC97); + + /* (11) Wait for valid data to arrive */ + if (cs4281_waitset(sc, CS4281PCI_ACISV, + CS4281PCI_ACISV_ISV(3) | CS4281PCI_ACISV_ISV(4), 10000) == 0) { + device_printf(sc->dev, "cs4281 never got valid data\n"); + return -1; + } + + /* (12) Start digital data transfer of audio data to codec */ + cs4281_wr(sc, CS4281PCI_ACOSV, + CS4281PCI_ACOSV_SLV(3) | CS4281PCI_ACOSV_SLV(4)); + + /* Set Master and headphone to max */ + cs4281_wrcd(0, sc, AC97_MIX_AUXOUT, 0); + cs4281_wrcd(0, sc, AC97_MIX_MASTER, 0); + + /* Power on the DAC */ + v = cs4281_rdcd(0, sc, AC97_REG_POWER) & 0xfdff; + cs4281_wrcd(0, sc, AC97_REG_POWER, v); + + /* Wait until DAC state ready */ + for (i = 0; i < 320; i++) { + DELAY(100); + v = cs4281_rdcd(0, sc, AC97_REG_POWER); + if (v & 0x02) + break; + } + + /* Power on the ADC */ + v = cs4281_rdcd(0, sc, AC97_REG_POWER) & 0xfeff; + cs4281_wrcd(0, sc, AC97_REG_POWER, v); + + /* Wait until ADC state ready */ + for (i = 0; i < 320; i++) { + DELAY(100); + v = cs4281_rdcd(0, sc, AC97_REG_POWER); + if (v & 0x01) + break; + } + + /* FIFO configuration (driver is DMA orientated, implicit FIFO) */ + /* Play FIFO */ + + v = CS4281PCI_FCR_RS(CS4281PCI_RPCM_PLAY_SLOT) | + CS4281PCI_FCR_LS(CS4281PCI_LPCM_PLAY_SLOT) | + CS4281PCI_FCR_SZ(CS4281_FIFO_SIZE) | CS4281PCI_FCR_OF(0); + cs4281_wr(sc, CS4281PCI_FCR(CS4281_DMA_PLAY), v); + + cs4281_wr(sc, CS4281PCI_FCR(CS4281_DMA_PLAY), v | CS4281PCI_FCR_FEN); + + /* Record FIFO */ + v = CS4281PCI_FCR_RS(CS4281PCI_RPCM_REC_SLOT) | + CS4281PCI_FCR_LS(CS4281PCI_LPCM_REC_SLOT) | + CS4281PCI_FCR_SZ(CS4281_FIFO_SIZE) | + CS4281PCI_FCR_OF(CS4281_FIFO_SIZE + 1); + cs4281_wr(sc, CS4281PCI_FCR(CS4281_DMA_REC), v | CS4281PCI_FCR_PSH); + cs4281_wr(sc, CS4281PCI_FCR(CS4281_DMA_REC), v | CS4281PCI_FCR_FEN); + + /* Match AC97 slots to FIFOs */ + v = CS4281PCI_SRCSA_PLSS(CS4281PCI_LPCM_PLAY_SLOT) | + CS4281PCI_SRCSA_PRSS(CS4281PCI_RPCM_PLAY_SLOT) | + CS4281PCI_SRCSA_CLSS(CS4281PCI_LPCM_REC_SLOT) | + CS4281PCI_SRCSA_CRSS(CS4281PCI_RPCM_REC_SLOT); + cs4281_wr(sc, CS4281PCI_SRCSA, v); + + /* Set Auto-Initialize and set directions */ + cs4281_wr(sc, CS4281PCI_DMR(CS4281_DMA_PLAY), + CS4281PCI_DMR_DMA | CS4281PCI_DMR_AUTO | CS4281PCI_DMR_TR_PLAY); + cs4281_wr(sc, CS4281PCI_DMR(CS4281_DMA_REC), + CS4281PCI_DMR_DMA | CS4281PCI_DMR_AUTO | CS4281PCI_DMR_TR_REC); + + /* Enable half and empty buffer interrupts keeping DMA paused */ + cs4281_wr(sc, CS4281PCI_DCR(CS4281_DMA_PLAY), + CS4281PCI_DCR_TCIE | CS4281PCI_DCR_HTCIE | CS4281PCI_DCR_MSK); + cs4281_wr(sc, CS4281PCI_DCR(CS4281_DMA_REC), + CS4281PCI_DCR_TCIE | CS4281PCI_DCR_HTCIE | CS4281PCI_DCR_MSK); + + /* Enable Interrupts */ + cs4281_clr4(sc, CS4281PCI_HIMR, + CS4281PCI_HIMR_DMAI | CS4281PCI_HIMR_DMA(CS4281_DMA_PLAY) | CS4281PCI_HIMR_DMA(CS4281_DMA_REC)); - /* Set playback volume */ - cs4281_wr(sc, CS4281PCI_PPLVC, 7); - cs4281_wr(sc, CS4281PCI_PPRVC, 7); + /* Set playback volume */ + cs4281_wr(sc, CS4281PCI_PPLVC, 7); + cs4281_wr(sc, CS4281PCI_PPRVC, 7); - return 0; + return 0; } /* -------------------------------------------------------------------- */ @@ -738,229 +729,232 @@ static int cs4281_pci_probe(device_t dev) { - char *s = NULL; + char *s = NULL; - switch (pci_get_devid(dev)) { - case CS4281_PCI_ID: - s = "Crystal Semiconductor CS4281"; - break; - } + switch (pci_get_devid(dev)) { + case CS4281_PCI_ID: + s = "Crystal Semiconductor CS4281"; + break; + } - if (s) - device_set_desc(dev, s); - return s ? BUS_PROBE_DEFAULT : ENXIO; + if (s) + device_set_desc(dev, s); + return s ? BUS_PROBE_DEFAULT : ENXIO; } static int cs4281_pci_attach(device_t dev) { - struct sc_info *sc; - struct ac97_info *codec = NULL; - char status[SND_STATUSLEN]; + struct sc_info *sc; + struct ac97_info *codec = NULL; + char status[SND_STATUSLEN]; - sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); - sc->dev = dev; - sc->type = pci_get_devid(dev); + sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); + sc->dev = dev; + sc->type = pci_get_devid(dev); - pci_enable_busmaster(dev); + pci_enable_busmaster(dev); - if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { - /* Reset the power state. */ - device_printf(dev, "chip is in D%d power mode " - "-- setting to D0\n", pci_get_powerstate(dev)); + if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { + /* Reset the power state. */ + device_printf(dev, + "chip is in D%d power mode " + "-- setting to D0\n", + pci_get_powerstate(dev)); - pci_set_powerstate(dev, PCI_POWERSTATE_D0); - } + pci_set_powerstate(dev, PCI_POWERSTATE_D0); + } - sc->regid = PCIR_BAR(0); - sc->regtype = SYS_RES_MEMORY; - sc->reg = bus_alloc_resource_any(dev, sc->regtype, &sc->regid, RF_ACTIVE); - if (!sc->reg) { - sc->regtype = SYS_RES_IOPORT; + sc->regid = PCIR_BAR(0); + sc->regtype = SYS_RES_MEMORY; sc->reg = bus_alloc_resource_any(dev, sc->regtype, &sc->regid, - RF_ACTIVE); + RF_ACTIVE); if (!sc->reg) { - device_printf(dev, "unable to allocate register space\n"); - goto bad; + sc->regtype = SYS_RES_IOPORT; + sc->reg = bus_alloc_resource_any(dev, sc->regtype, &sc->regid, + RF_ACTIVE); + if (!sc->reg) { + device_printf(dev, + "unable to allocate register space\n"); + goto bad; + } + } + sc->st = rman_get_bustag(sc->reg); + sc->sh = rman_get_bushandle(sc->reg); + + sc->memid = PCIR_BAR(1); + sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->memid, + RF_ACTIVE); + if (sc->mem == NULL) { + device_printf(dev, "unable to allocate fifo space\n"); + goto bad; + } + + sc->irqid = 0; + sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, + RF_ACTIVE | RF_SHAREABLE); + if (!sc->irq) { + device_printf(dev, "unable to allocate interrupt\n"); + goto bad; + } + + if (snd_setup_intr(dev, sc->irq, 0, cs4281_intr, sc, &sc->ih)) { + device_printf(dev, "unable to setup interrupt\n"); + goto bad; + } + + sc->bufsz = pcm_getbuffersize(dev, 4096, CS4281_DEFAULT_BUFSZ, 65536); + + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ sc->bufsz, /*nsegments*/ 1, + /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, /*lockarg*/ NULL, + &sc->parent_dmat) != 0) { + device_printf(dev, "unable to create dma tag\n"); + goto bad; + } + + /* power up */ + cs4281_power(sc, 0); + + /* init chip */ + if (cs4281_init(sc) == -1) { + device_printf(dev, "unable to initialize the card\n"); + goto bad; } - } - sc->st = rman_get_bustag(sc->reg); - sc->sh = rman_get_bushandle(sc->reg); - - sc->memid = PCIR_BAR(1); - sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->memid, - RF_ACTIVE); - if (sc->mem == NULL) { - device_printf(dev, "unable to allocate fifo space\n"); - goto bad; - } - - sc->irqid = 0; - sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, - RF_ACTIVE | RF_SHAREABLE); - if (!sc->irq) { - device_printf(dev, "unable to allocate interrupt\n"); - goto bad; - } - - if (snd_setup_intr(dev, sc->irq, 0, cs4281_intr, sc, &sc->ih)) { - device_printf(dev, "unable to setup interrupt\n"); - goto bad; - } - - sc->bufsz = pcm_getbuffersize(dev, 4096, CS4281_DEFAULT_BUFSZ, 65536); - - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/sc->bufsz, /*nsegments*/1, - /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, /*lockarg*/NULL, - &sc->parent_dmat) != 0) { - device_printf(dev, "unable to create dma tag\n"); - goto bad; - } - - /* power up */ - cs4281_power(sc, 0); - - /* init chip */ - if (cs4281_init(sc) == -1) { - device_printf(dev, "unable to initialize the card\n"); - goto bad; - } - - /* create/init mixer */ - codec = AC97_CREATE(dev, sc, cs4281_ac97); - if (codec == NULL) - goto bad; - - mixer_init(dev, ac97_getmixerclass(), codec); - - if (pcm_register(dev, sc, 1, 1)) - goto bad; - - pcm_addchan(dev, PCMDIR_PLAY, &cs4281chan_class, sc); - pcm_addchan(dev, PCMDIR_REC, &cs4281chan_class, sc); - - snprintf(status, SND_STATUSLEN, "%s 0x%jx irq %jd on %s", - (sc->regtype == SYS_RES_IOPORT)? "port" : "mem", - rman_get_start(sc->reg), rman_get_start(sc->irq), - device_get_nameunit(device_get_parent(dev))); - pcm_setstatus(dev, status); - - return 0; - - bad: - if (codec) - ac97_destroy(codec); - if (sc->reg) - bus_release_resource(dev, sc->regtype, sc->regid, sc->reg); - if (sc->mem) - bus_release_resource(dev, SYS_RES_MEMORY, sc->memid, sc->mem); - if (sc->ih) - bus_teardown_intr(dev, sc->irq, sc->ih); - if (sc->irq) - bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); - if (sc->parent_dmat) - bus_dma_tag_destroy(sc->parent_dmat); - free(sc, M_DEVBUF); - return ENXIO; + /* create/init mixer */ + codec = AC97_CREATE(dev, sc, cs4281_ac97); + if (codec == NULL) + goto bad; + + mixer_init(dev, ac97_getmixerclass(), codec); + + if (pcm_register(dev, sc, 1, 1)) + goto bad; + + pcm_addchan(dev, PCMDIR_PLAY, &cs4281chan_class, sc); + pcm_addchan(dev, PCMDIR_REC, &cs4281chan_class, sc); + + snprintf(status, SND_STATUSLEN, "%s 0x%jx irq %jd on %s", + (sc->regtype == SYS_RES_IOPORT) ? "port" : "mem", + rman_get_start(sc->reg), rman_get_start(sc->irq), + device_get_nameunit(device_get_parent(dev))); + pcm_setstatus(dev, status); + + return 0; + +bad: + if (codec) + ac97_destroy(codec); + if (sc->reg) + bus_release_resource(dev, sc->regtype, sc->regid, sc->reg); + if (sc->mem) + bus_release_resource(dev, SYS_RES_MEMORY, sc->memid, sc->mem); + if (sc->ih) + bus_teardown_intr(dev, sc->irq, sc->ih); + if (sc->irq) + bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); + if (sc->parent_dmat) + bus_dma_tag_destroy(sc->parent_dmat); + free(sc, M_DEVBUF); + + return ENXIO; } static int cs4281_pci_detach(device_t dev) { - int r; - struct sc_info *sc; + int r; + struct sc_info *sc; - r = pcm_unregister(dev); - if (r) - return r; + r = pcm_unregister(dev); + if (r) + return r; - sc = pcm_getdevinfo(dev); + sc = pcm_getdevinfo(dev); - /* power off */ - cs4281_power(sc, 3); + /* power off */ + cs4281_power(sc, 3); - bus_release_resource(dev, sc->regtype, sc->regid, sc->reg); - bus_release_resource(dev, SYS_RES_MEMORY, sc->memid, sc->mem); - bus_teardown_intr(dev, sc->irq, sc->ih); - bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); - bus_dma_tag_destroy(sc->parent_dmat); - free(sc, M_DEVBUF); + bus_release_resource(dev, sc->regtype, sc->regid, sc->reg); + bus_release_resource(dev, SYS_RES_MEMORY, sc->memid, sc->mem); + bus_teardown_intr(dev, sc->irq, sc->ih); + bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); + bus_dma_tag_destroy(sc->parent_dmat); + free(sc, M_DEVBUF); - return 0; + return 0; } static int cs4281_pci_suspend(device_t dev) { - struct sc_info *sc; + struct sc_info *sc; - sc = pcm_getdevinfo(dev); + sc = pcm_getdevinfo(dev); - sc->rch.dma_active = adcdac_go(&sc->rch, 0); - sc->pch.dma_active = adcdac_go(&sc->pch, 0); + sc->rch.dma_active = adcdac_go(&sc->rch, 0); + sc->pch.dma_active = adcdac_go(&sc->pch, 0); - cs4281_power(sc, 3); + cs4281_power(sc, 3); - return 0; + return 0; } static int cs4281_pci_resume(device_t dev) { - struct sc_info *sc; + struct sc_info *sc; - sc = pcm_getdevinfo(dev); + sc = pcm_getdevinfo(dev); - /* power up */ - cs4281_power(sc, 0); + /* power up */ + cs4281_power(sc, 0); - /* initialize chip */ - if (cs4281_init(sc) == -1) { - device_printf(dev, "unable to reinitialize the card\n"); - return ENXIO; - } + /* initialize chip */ + if (cs4281_init(sc) == -1) { + device_printf(dev, "unable to reinitialize the card\n"); + return ENXIO; + } - /* restore mixer state */ - if (mixer_reinit(dev) == -1) { - device_printf(dev, "unable to reinitialize the mixer\n"); - return ENXIO; - } + /* restore mixer state */ + if (mixer_reinit(dev) == -1) { + device_printf(dev, "unable to reinitialize the mixer\n"); + return ENXIO; + } - /* restore chip state */ - cs4281chan_setspeed(NULL, &sc->rch, sc->rch.spd); - cs4281chan_setblocksize(NULL, &sc->rch, sc->rch.blksz); - cs4281chan_setformat(NULL, &sc->rch, sc->rch.fmt); - adcdac_go(&sc->rch, sc->rch.dma_active); + /* restore chip state */ + cs4281chan_setspeed(NULL, &sc->rch, sc->rch.spd); + cs4281chan_setblocksize(NULL, &sc->rch, sc->rch.blksz); + cs4281chan_setformat(NULL, &sc->rch, sc->rch.fmt); + adcdac_go(&sc->rch, sc->rch.dma_active); - cs4281chan_setspeed(NULL, &sc->pch, sc->pch.spd); - cs4281chan_setblocksize(NULL, &sc->pch, sc->pch.blksz); - cs4281chan_setformat(NULL, &sc->pch, sc->pch.fmt); - adcdac_go(&sc->pch, sc->pch.dma_active); + cs4281chan_setspeed(NULL, &sc->pch, sc->pch.spd); + cs4281chan_setblocksize(NULL, &sc->pch, sc->pch.blksz); + cs4281chan_setformat(NULL, &sc->pch, sc->pch.fmt); + adcdac_go(&sc->pch, sc->pch.dma_active); - return 0; + return 0; } static device_method_t cs4281_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, cs4281_pci_probe), - DEVMETHOD(device_attach, cs4281_pci_attach), - DEVMETHOD(device_detach, cs4281_pci_detach), - DEVMETHOD(device_suspend, cs4281_pci_suspend), - DEVMETHOD(device_resume, cs4281_pci_resume), - { 0, 0 } + /* Device interface */ + DEVMETHOD(device_probe, cs4281_pci_probe), + DEVMETHOD(device_attach, cs4281_pci_attach), + DEVMETHOD(device_detach, cs4281_pci_detach), + DEVMETHOD(device_suspend, cs4281_pci_suspend), + DEVMETHOD(device_resume, cs4281_pci_resume), { 0, 0 } }; static driver_t cs4281_driver = { - "pcm", - cs4281_methods, - PCM_SOFTC_SIZE, + "pcm", + cs4281_methods, + PCM_SOFTC_SIZE, }; DRIVER_MODULE(snd_cs4281, pci, cs4281_driver, 0, 0); Index: sys/dev/sound/pci/cs461x_dsp.h =================================================================== --- sys/dev/sound/pci/cs461x_dsp.h +++ sys/dev/sound/pci/cs461x_dsp.h @@ -35,3464 +35,2773 @@ #define _DEV_SOUND_PCI_CS461X_DSP_H struct cs461x_firmware_struct cs461x_firmware = { - {{0x00000000, 0x00003000}, {0x00010000, 0x00003800}, - {0x00020000, 0x00007000}}, - {0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000163, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00200040, 0x00008010, 0x00000000, - 0x00000000, 0x80000001, 0x00000001, 0x00060000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00900080, 0x00000173, 0x00000000, - 0x00000000, 0x00000010, 0x00800000, 0x00900000, - 0xf2c0000f, 0x00000200, 0x00000000, 0x00010600, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000163, 0x330300c2, - 0x06000000, 0x00000000, 0x80008000, 0x80008000, - 0x3fc0000f, 0x00000301, 0x00010400, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00b00000, 0x00d0806d, 0x330480c3, - 0x04800000, 0x00000001, 0x00800001, 0x0000ffff, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x066a0130, 0x06350070, 0x0000929d, 0x929d929d, - 0x00000000, 0x0000735a, 0x00000600, 0x00000000, - 0x929d735a, 0x00000000, 0x00010000, 0x735a735a, - 0xa431ac75, 0xa431ac75, 0xa431ac75, 0xa431ac75, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x000000f0, 0x0000804f, 0x000000c3, - 0x05000000, 0x00a00010, 0x00000000, 0x80008000, - 0x00000000, 0x00000000, 0x00000700, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000080, 0x00a00000, 0x0000809a, 0x000000c2, - 0x07400000, 0x00000000, 0x80008000, 0xffffffff, - 0x00c80028, 0x00005555, 0x00000000, 0x000107a0, - 0x00c80028, 0x000000c2, 0x06800000, 0x00000000, - 0x06e00080, 0x00300000, 0x000080bb, 0x000000c9, - 0x07a00000, 0x04000000, 0x80008000, 0xffffffff, - 0x00c80028, 0x00005555, 0x00000000, 0x00000780, - 0x00c80028, 0x000000c5, 0xff800000, 0x00000000, - 0x00640080, 0x00c00000, 0x00008197, 0x000000c9, - 0x07800000, 0x04000000, 0x80008000, 0xffffffff, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x0000805e, 0x000000c1, - 0x00000000, 0x00800000, 0x80008000, 0x80008000, - 0x00020000, 0x0000ffff, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x07c00000, 0x00900000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x0000018e, 0x000000c2, - 0x07c00000, 0x00000000, 0x80008000, 0xffffffff, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00e00100, 0x00000173, 0x00000000, - 0x00000000, 0x00400010, 0x00800000, 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0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }; -#endif /* !_DEV_SOUND_PCI_CS461X_DSP_H */ +#endif /* !_DEV_SOUND_PCI_CS461X_DSP_H */ Index: sys/dev/sound/pci/csa.c =================================================================== --- sys/dev/sound/pci/csa.c +++ sys/dev/sound/pci/csa.c @@ -32,27 +32,26 @@ #include #include -#include #include +#include #include #include -#include -#include #include +#include +#include + #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include -#include -#include -#include - #include #include - +#include #include +#include +#include +#include /* This is the pci device id. */ #define CS4610_PCI_ID 0x60011013 @@ -62,15 +61,15 @@ /* Here is the parameter structure per a device. */ struct csa_softc { device_t dev; /* device */ - csa_res res; /* resources */ + csa_res res; /* resources */ - device_t pcm; /* pcm device */ - driver_intr_t* pcmintr; /* pcm intr */ - void *pcmintr_arg; /* pcm intr arg */ - device_t midi; /* midi device */ - driver_intr_t* midiintr; /* midi intr */ - void *midiintr_arg; /* midi intr arg */ - void *ih; /* cookie */ + device_t pcm; /* pcm device */ + driver_intr_t *pcmintr; /* pcm intr */ + void *pcmintr_arg; /* pcm intr arg */ + device_t midi; /* midi device */ + driver_intr_t *midiintr; /* midi intr */ + void *midiintr_arg; /* midi intr arg */ + void *ih; /* cookie */ struct csa_card *card; struct csa_bridgeinfo binfo; /* The state of this bridge. */ @@ -80,20 +79,21 @@ static int csa_probe(device_t dev); static int csa_attach(device_t dev); -static struct resource *csa_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, - rman_res_t count, u_int flags); -static int csa_release_resource(device_t bus, device_t child, struct resource *r); -static int csa_setup_intr(device_t bus, device_t child, - struct resource *irq, int flags, - driver_filter_t *filter, - driver_intr_t *intr, void *arg, void **cookiep); -static int csa_teardown_intr(device_t bus, device_t child, - struct resource *irq, void *cookie); +static struct resource *csa_alloc_resource(device_t bus, device_t child, + int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, + u_int flags); +static int csa_release_resource(device_t bus, device_t child, + struct resource *r); +static int csa_setup_intr(device_t bus, device_t child, struct resource *irq, + int flags, driver_filter_t *filter, driver_intr_t *intr, void *arg, + void **cookiep); +static int csa_teardown_intr(device_t bus, device_t child, struct resource *irq, + void *cookie); static driver_intr_t csa_intr; static int csa_initialize(sc_p scp); static int csa_downloadimage(csa_res *resp); -static int csa_transferimage(csa_res *resp, u_int32_t *src, u_long dest, u_long len); +static int csa_transferimage(csa_res *resp, u_int32_t *src, u_long dest, + u_long len); static void amp_none(void) @@ -109,12 +109,12 @@ clkrun_hack(int run) { #ifdef __i386__ - devclass_t pci_devclass; - device_t *pci_devices, *pci_children, *busp, *childp; - int pci_count = 0, pci_childcount = 0; - int i, j, port; - u_int16_t control; - bus_space_tag_t btag; + devclass_t pci_devclass; + device_t *pci_devices, *pci_children, *busp, *childp; + int pci_count = 0, pci_childcount = 0; + int i, j, port; + u_int16_t control; + bus_space_tag_t btag; if ((pci_devclass = devclass_find("pci")) == NULL) { return ENXIO; @@ -126,15 +126,19 @@ pci_childcount = 0; if (device_get_children(*busp, &pci_children, &pci_childcount)) continue; - for (j = 0, childp = pci_children; j < pci_childcount; j++, childp++) { - if (pci_get_vendor(*childp) == 0x8086 && pci_get_device(*childp) == 0x7113) { - port = (pci_read_config(*childp, 0x41, 1) << 8) + 0x10; + for (j = 0, childp = pci_children; j < pci_childcount; + j++, childp++) { + if (pci_get_vendor(*childp) == 0x8086 && + pci_get_device(*childp) == 0x7113) { + port = (pci_read_config(*childp, 0x41, 1) + << 8) + + 0x10; /* XXX */ btag = X86_BUS_SPACE_IO; control = bus_space_read_2(btag, 0x0, port); control &= ~0x2000; - control |= run? 0 : 0x2000; + control |= run ? 0 : 0x2000; bus_space_write_2(btag, 0x0, port, control); free(pci_devices, M_TEMP); free(pci_children, M_TEMP); @@ -152,27 +156,30 @@ } static struct csa_card cards_4610[] = { - {0, 0, "Unknown/invalid SSID (CS4610)", NULL, NULL, NULL, 0}, + { 0, 0, "Unknown/invalid SSID (CS4610)", NULL, NULL, NULL, 0 }, }; static struct csa_card cards_4614[] = { - {0x1489, 0x7001, "Genius Soundmaker 128 value", amp_none, NULL, NULL, 0}, - {0x5053, 0x3357, "Turtle Beach Santa Cruz", amp_voyetra, NULL, NULL, 1}, - {0x1071, 0x6003, "Mitac MI6020/21", amp_voyetra, NULL, NULL, 0}, - {0x14AF, 0x0050, "Hercules Game Theatre XP", NULL, NULL, NULL, 0}, - {0x1681, 0x0050, "Hercules Game Theatre XP", NULL, NULL, NULL, 0}, - {0x1014, 0x0132, "Thinkpad 570", amp_none, NULL, NULL, 0}, - {0x1014, 0x0153, "Thinkpad 600X/A20/T20", amp_none, NULL, clkrun_hack, 0}, - {0x1014, 0x1010, "Thinkpad 600E (unsupported)", NULL, NULL, NULL, 0}, - {0x153b, 0x1136, "Terratec SiXPack 5.1+", NULL, NULL, NULL, 0}, - {0, 0, "Unknown/invalid SSID (CS4614)", NULL, NULL, NULL, 0}, + { 0x1489, 0x7001, "Genius Soundmaker 128 value", amp_none, NULL, NULL, + 0 }, + { 0x5053, 0x3357, "Turtle Beach Santa Cruz", amp_voyetra, NULL, NULL, + 1 }, + { 0x1071, 0x6003, "Mitac MI6020/21", amp_voyetra, NULL, NULL, 0 }, + { 0x14AF, 0x0050, "Hercules Game Theatre XP", NULL, NULL, NULL, 0 }, + { 0x1681, 0x0050, "Hercules Game Theatre XP", NULL, NULL, NULL, 0 }, + { 0x1014, 0x0132, "Thinkpad 570", amp_none, NULL, NULL, 0 }, + { 0x1014, 0x0153, "Thinkpad 600X/A20/T20", amp_none, NULL, clkrun_hack, + 0 }, + { 0x1014, 0x1010, "Thinkpad 600E (unsupported)", NULL, NULL, NULL, 0 }, + { 0x153b, 0x1136, "Terratec SiXPack 5.1+", NULL, NULL, NULL, 0 }, + { 0, 0, "Unknown/invalid SSID (CS4614)", NULL, NULL, NULL, 0 }, }; static struct csa_card cards_4615[] = { - {0, 0, "Unknown/invalid SSID (CS4615)", NULL, NULL, NULL, 0}, + { 0, 0, "Unknown/invalid SSID (CS4615)", NULL, NULL, NULL, 0 }, }; -static struct csa_card nocard = {0, 0, "unknown", NULL, NULL, NULL, 0}; +static struct csa_card nocard = { 0, 0, "unknown", NULL, NULL, NULL, 0 }; struct card_type { u_int32_t devid; @@ -181,10 +188,10 @@ }; static struct card_type cards[] = { - {CS4610_PCI_ID, "CS4610/CS4611", cards_4610}, - {CS4614_PCI_ID, "CS4280/CS4614/CS4622/CS4624/CS4630", cards_4614}, - {CS4615_PCI_ID, "CS4615", cards_4615}, - {0, NULL, NULL}, + { CS4610_PCI_ID, "CS4610/CS4611", cards_4610 }, + { CS4614_PCI_ID, "CS4280/CS4614/CS4622/CS4624/CS4630", cards_4614 }, + { CS4615_PCI_ID, "CS4615", cards_4615 }, + { 0, NULL, NULL }, }; static struct card_type * @@ -214,8 +221,8 @@ subcard = card->cards; i = 0; while (subcard[i].subvendor != 0) { - if (pci_get_subvendor(dev) == subcard[i].subvendor - && pci_get_subdevice(dev) == subcard[i].subdevice) { + if (pci_get_subvendor(dev) == subcard[i].subvendor && + pci_get_subdevice(dev) == subcard[i].subdevice) { return &subcard[i]; } i++; @@ -258,18 +265,18 @@ scp->binfo.card = scp->card; printf("csa: card is %s\n", scp->card->name); resp->io_rid = PCIR_BAR(0); - resp->io = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &resp->io_rid, RF_ACTIVE); + resp->io = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &resp->io_rid, + RF_ACTIVE); if (resp->io == NULL) return (ENXIO); resp->mem_rid = PCIR_BAR(1); - resp->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &resp->mem_rid, RF_ACTIVE); + resp->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &resp->mem_rid, + RF_ACTIVE); if (resp->mem == NULL) goto err_io; resp->irq_rid = 0; - resp->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &resp->irq_rid, RF_ACTIVE | RF_SHAREABLE); + resp->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &resp->irq_rid, + RF_ACTIVE | RF_SHAREABLE); if (resp->irq == NULL) goto err_mem; @@ -395,7 +402,7 @@ static struct resource * csa_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) + rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { sc_p scp; csa_res *resp; @@ -444,10 +451,8 @@ */ static int -csa_setup_intr(device_t bus, device_t child, - struct resource *irq, int flags, - driver_filter_t *filter, - driver_intr_t *intr, void *arg, void **cookiep) +csa_setup_intr(device_t bus, device_t child, struct resource *irq, int flags, + driver_filter_t *filter, driver_intr_t *intr, void *arg, void **cookiep) { sc_p scp; csa_res *resp; @@ -490,8 +495,8 @@ } static int -csa_teardown_intr(device_t bus, device_t child, - struct resource *irq, void *cookie) +csa_teardown_intr(device_t bus, device_t child, struct resource *irq, + void *cookie) { sc_p scp; csa_res *resp; @@ -574,21 +579,25 @@ resp = &scp->res; /* - * First, blast the clock control register to zero so that the PLL starts - * out in a known state, and blast the master serial port control register - * to zero so that the serial ports also start out in a known state. + * First, blast the clock control register to zero so that the PLL + * starts out in a known state, and blast the master serial port control + * register to zero so that the serial ports also start out in a known + * state. */ csa_writeio(resp, BA0_CLKCR1, 0); csa_writeio(resp, BA0_SERMC1, 0); /* - * If we are in AC97 mode, then we must set the part to a host controlled - * AC-link. Otherwise, we won't be able to bring up the link. + * If we are in AC97 mode, then we must set the part to a host + * controlled AC-link. Otherwise, we won't be able to bring up the + * link. */ #if 1 - csa_writeio(resp, BA0_SERACC, SERACC_HSP | SERACC_CODEC_TYPE_1_03); /* 1.03 codec */ + csa_writeio(resp, BA0_SERACC, + SERACC_HSP | SERACC_CODEC_TYPE_1_03); /* 1.03 codec */ #else - csa_writeio(resp, BA0_SERACC, SERACC_HSP | SERACC_CODEC_TYPE_2_0); /* 2.0 codec */ + csa_writeio(resp, BA0_SERACC, + SERACC_HSP | SERACC_CODEC_TYPE_2_0); /* 2.0 codec */ #endif /* 1 */ /* @@ -625,11 +634,12 @@ DELAY(700000); /* - * Write the selected clock control setup to the hardware. Do not turn on - * SWCE yet (if requested), so that the devices clocked by the output of - * PLL are not clocked until the PLL is stable. + * Write the selected clock control setup to the hardware. Do not turn + * on SWCE yet (if requested), so that the devices clocked by the output + * of PLL are not clocked until the PLL is stable. */ - csa_writeio(resp, BA0_PLLCC, PLLCC_LPF_1050_2780_KHZ | PLLCC_CDR_73_104_MHZ); + csa_writeio(resp, BA0_PLLCC, + PLLCC_LPF_1050_2780_KHZ | PLLCC_CDR_73_104_MHZ); csa_writeio(resp, BA0_PLLM, 0x3a); csa_writeio(resp, BA0_CLKCR2, CLKCR2_PDIVS_8); @@ -646,7 +656,8 @@ /* * Turn on clocking of the core so that we can setup the serial ports. */ - csa_writeio(resp, BA0_CLKCR1, csa_readio(resp, BA0_CLKCR1) | CLKCR1_SWCE); + csa_writeio(resp, BA0_CLKCR1, + csa_readio(resp, BA0_CLKCR1) | CLKCR1_SWCE); /* * Fill the serial port FIFOs with silence. @@ -672,16 +683,16 @@ * Wait for the codec ready signal from the AC97 codec. */ acsts = 0; - for (i = 0 ; i < 1000 ; i++) { + for (i = 0; i < 1000; i++) { /* - * First, lets wait a short while to let things settle out a bit, - * and to prevent retrying the read too quickly. + * First, lets wait a short while to let things settle out a + * bit, and to prevent retrying the read too quickly. */ DELAY(125); /* - * Read the AC97 status register to see if we've seen a CODEC READY - * signal from the AC97 codec. + * Read the AC97 status register to see if we've seen a CODEC + * READY signal from the AC97 codec. */ acsts = csa_readio(resp, BA0_ACSTS); if ((acsts & ACSTS_CRDY) != 0) @@ -705,10 +716,10 @@ * the codec is pumping ADC data across the AC-link. */ acisv = 0; - for (i = 0 ; i < 2000 ; i++) { + for (i = 0; i < 2000; i++) { /* - * First, lets wait a short while to let things settle out a bit, - * and to prevent retrying the read too quickly. + * First, lets wait a short while to let things settle out a + * bit, and to prevent retrying the read too quickly. */ #ifdef notdef DELAY(10000000L); /* clw */ @@ -716,11 +727,12 @@ DELAY(1000); #endif /* notdef */ /* - * Read the input slot valid register and see if input slots 3 and - * 4 are valid yet. + * Read the input slot valid register and see if input slots 3 + * and 4 are valid yet. */ acisv = csa_readio(resp, BA0_ACISV); - if ((acisv & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4)) + if ((acisv & (ACISV_ISV3 | ACISV_ISV4)) == + (ACISV_ISV3 | ACISV_ISV4)) break; } /* @@ -745,8 +757,8 @@ #endif /* notdef */ /* - * Turn off the Processor by turning off the software clock enable flag in - * the clock control register. + * Turn off the Processor by turning off the software clock enable flag + * in the clock control register. */ #ifdef notdef clkcr1 = csa_readio(resp, BA0_CLKCR1) & ~CLKCR1_SWCE; @@ -770,8 +782,8 @@ u_int8_t clkcr1, serbst; /* - * See if the devices are powered down. If so, we must power them up first - * or they will not respond. + * See if the devices are powered down. If so, we must power them up + * first or they will not respond. */ pwr = 1; clkcr1 = csa_readio(resp, BA0_CLKCR1); @@ -782,16 +794,16 @@ /* * We want to clear out the serial port FIFOs so we don't end up playing - * whatever random garbage happens to be in them. We fill the sample FIFOs - * with zero (silence). + * whatever random garbage happens to be in them. We fill the sample + * FIFOs with zero (silence). */ csa_writeio(resp, BA0_SERBWP, 0); /* Fill all 256 sample FIFO locations. */ serbst = 0; - for (i = 0 ; i < 256 ; i++) { + for (i = 0; i < 256; i++) { /* Make sure the previous FIFO write operation has completed. */ - for (j = 0 ; j < 5 ; j++) { + for (j = 0; j < 5; j++) { DELAY(100); serbst = csa_readio(resp, BA0_SERBST); if ((serbst & SERBST_WBSY) == 0) @@ -803,7 +815,8 @@ } /* Write the serial port FIFO index. */ csa_writeio(resp, BA0_SERBAD, i); - /* Tell the serial port to load the new value into the FIFO location. */ + /* Tell the serial port to load the new value into the FIFO + * location. */ csa_writeio(resp, BA0_SERBCM, SERBCM_WRC); } /* @@ -832,7 +845,7 @@ /* * Clear the trap registers. */ - for (i = 0 ; i < 8 ; i++) { + for (i = 0; i < 8; i++) { csa_writemem(resp, BA1_DREG, DREG_REGID_TRAP_SELECT + i); csa_writemem(resp, BA1_TWPR, 0xffff); } @@ -850,13 +863,12 @@ int ret; u_long ul, offset; - for (ul = 0, offset = 0 ; ul < INKY_MEMORY_COUNT ; ul++) { - /* - * DMA this block from host memory to the appropriate - * memory on the CSDevice. - */ - ret = csa_transferimage(resp, - cs461x_firmware.BA1Array + offset, + for (ul = 0, offset = 0; ul < INKY_MEMORY_COUNT; ul++) { + /* + * DMA this block from host memory to the appropriate + * memory on the CSDevice. + */ + ret = csa_transferimage(resp, cs461x_firmware.BA1Array + offset, cs461x_firmware.MemoryStat[ul].ulDestAddr, cs461x_firmware.MemoryStat[ul].ulSourceSize); if (ret) @@ -872,10 +884,10 @@ u_long ul; /* - * We do not allow DMAs from host memory to host memory (although the DMA - * can do it) and we do not allow DMAs which are not a multiple of 4 bytes - * in size (because that DMA can not do that). Return an error if either - * of these conditions exist. + * We do not allow DMAs from host memory to host memory (although the + * DMA can do it) and we do not allow DMAs which are not a multiple of 4 + * bytes in size (because that DMA can not do that). Return an error if + * either of these conditions exist. */ if ((len & 0x3) != 0) return (EINVAL); @@ -885,7 +897,7 @@ return (EINVAL); /* Write the buffer out. */ - for (ul = 0 ; ul < len ; ul += 4) + for (ul = 0; ul < len; ul += 4) csa_writemem(resp, dest + ul, src[ul >> 2]); return (0); } @@ -920,13 +932,14 @@ */ csa_writeio(resp, BA0_ACCAD, offset - BA0_AC97_RESET); csa_writeio(resp, BA0_ACCDA, 0); - csa_writeio(resp, BA0_ACCTL, ACCTL_DCV | ACCTL_CRW | ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN); + csa_writeio(resp, BA0_ACCTL, + ACCTL_DCV | ACCTL_CRW | ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN); /* * Wait for the read to occur. */ acctl = 0; - for (i = 0 ; i < 10 ; i++) { + for (i = 0; i < 10; i++) { /* * First, we want to wait for a short time. */ @@ -951,7 +964,7 @@ * Wait for the valid status bit to go active. */ acsts = 0; - for (i = 0 ; i < 10 ; i++) { + for (i = 0; i < 10; i++) { /* * Read the AC97 status register. * ACSTS = Status Register = 464h @@ -966,7 +979,7 @@ /* * Wait for a short while. */ - DELAY(25); + DELAY(25); } /* @@ -1007,13 +1020,14 @@ */ csa_writeio(resp, BA0_ACCAD, offset - BA0_AC97_RESET); csa_writeio(resp, BA0_ACCDA, data); - csa_writeio(resp, BA0_ACCTL, ACCTL_DCV | ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN); + csa_writeio(resp, BA0_ACCTL, + ACCTL_DCV | ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN); /* * Wait for the write to occur. */ acctl = 0; - for (i = 0 ; i < 10 ; i++) { + for (i = 0; i < 10; i++) { /* * First, we want to wait for a short time. */ @@ -1043,7 +1057,9 @@ u_int32_t ul; if (offset < BA0_AC97_RESET) - return bus_space_read_4(rman_get_bustag(resp->io), rman_get_bushandle(resp->io), offset) & 0xffffffff; + return bus_space_read_4(rman_get_bustag(resp->io), + rman_get_bushandle(resp->io), offset) & + 0xffffffff; else { if (csa_readcodec(resp, offset, &ul)) ul = 0; @@ -1055,7 +1071,8 @@ csa_writeio(csa_res *resp, u_long offset, u_int32_t data) { if (offset < BA0_AC97_RESET) - bus_space_write_4(rman_get_bustag(resp->io), rman_get_bushandle(resp->io), offset, data); + bus_space_write_4(rman_get_bustag(resp->io), + rman_get_bushandle(resp->io), offset, data); else csa_writecodec(resp, offset, data); } @@ -1063,31 +1080,33 @@ u_int32_t csa_readmem(csa_res *resp, u_long offset) { - return bus_space_read_4(rman_get_bustag(resp->mem), rman_get_bushandle(resp->mem), offset); + return bus_space_read_4(rman_get_bustag(resp->mem), + rman_get_bushandle(resp->mem), offset); } void csa_writemem(csa_res *resp, u_long offset, u_int32_t data) { - bus_space_write_4(rman_get_bustag(resp->mem), rman_get_bushandle(resp->mem), offset, data); + bus_space_write_4(rman_get_bustag(resp->mem), + rman_get_bushandle(resp->mem), offset, data); } static device_method_t csa_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, csa_probe), - DEVMETHOD(device_attach, csa_attach), - DEVMETHOD(device_detach, csa_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, csa_resume), + DEVMETHOD(device_probe, csa_probe), + DEVMETHOD(device_attach, csa_attach), + DEVMETHOD(device_detach, csa_detach), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + DEVMETHOD(device_suspend, bus_generic_suspend), + DEVMETHOD(device_resume, csa_resume), /* Bus interface */ - DEVMETHOD(bus_alloc_resource, csa_alloc_resource), - DEVMETHOD(bus_release_resource, csa_release_resource), + DEVMETHOD(bus_alloc_resource, csa_alloc_resource), + DEVMETHOD(bus_release_resource, csa_release_resource), DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, csa_setup_intr), - DEVMETHOD(bus_teardown_intr, csa_teardown_intr), + DEVMETHOD(bus_setup_intr, csa_setup_intr), + DEVMETHOD(bus_teardown_intr, csa_teardown_intr), DEVMETHOD_END }; Index: sys/dev/sound/pci/csamidi.c =================================================================== --- sys/dev/sound/pci/csamidi.c +++ sys/dev/sound/pci/csamidi.c @@ -26,15 +26,16 @@ * SUCH DAMAGE. */ -#include #include -#include -#include -#include +#include #include +#include #include #include #include +#include + +#include #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" @@ -42,40 +43,37 @@ #include #include - #include -#include - #include #include - #include #include +#include #include "mpufoi_if.h" /* pulled from mpu401.c */ -#define MPU_DATAPORT 0 -#define MPU_CMDPORT 1 -#define MPU_STATPORT 1 -#define MPU_RESET 0xff -#define MPU_UART 0x3f -#define MPU_ACK 0xfe -#define MPU_STATMASK 0xc0 -#define MPU_OUTPUTBUSY 0x40 -#define MPU_INPUTBUSY 0x80 +#define MPU_DATAPORT 0 +#define MPU_CMDPORT 1 +#define MPU_STATPORT 1 +#define MPU_RESET 0xff +#define MPU_UART 0x3f +#define MPU_ACK 0xfe +#define MPU_STATMASK 0xc0 +#define MPU_OUTPUTBUSY 0x40 +#define MPU_INPUTBUSY 0x80 /* device private data */ struct csa_midi_softc { /* hardware resources */ - int io_rid; /* io rid */ - struct resource *io; /* io */ - - struct mtx mtx; - device_t dev; - struct mpu401 *mpu; - mpu401_intr_t *mpu_intr; - int mflags; /* MIDI flags */ + int io_rid; /* io rid */ + struct resource *io; /* io */ + + struct mtx mtx; + device_t dev; + struct mpu401 *mpu; + mpu401_intr_t *mpu_intr; + int mflags; /* MIDI flags */ }; static struct kobj_class csamidi_mpu_class; @@ -84,7 +82,9 @@ csamidi_readio(struct csa_midi_softc *scp, u_long offset) { if (offset < BA0_AC97_RESET) - return bus_space_read_4(rman_get_bustag(scp->io), rman_get_bushandle(scp->io), offset) & 0xffffffff; + return bus_space_read_4(rman_get_bustag(scp->io), + rman_get_bushandle(scp->io), offset) & + 0xffffffff; else return (0); } @@ -93,7 +93,8 @@ csamidi_writeio(struct csa_midi_softc *scp, u_long offset, u_int32_t data) { if (offset < BA0_AC97_RESET) - bus_space_write_4(rman_get_bustag(scp->io), rman_get_bushandle(scp->io), offset, data); + bus_space_write_4(rman_get_bustag(scp->io), + rman_get_bushandle(scp->io), offset, data); } static void @@ -118,7 +119,7 @@ case MPU_STATPORT: uart_stat = csamidi_readio(scp, BA0_MIDSR); if (uart_stat & MIDSR_TBF) - rc |= MPU_OUTPUTBUSY; /* Tx buffer full */ + rc |= MPU_OUTPUTBUSY; /* Tx buffer full */ if (uart_stat & MIDSR_RBE) rc |= MPU_INPUTBUSY; break; @@ -133,15 +134,15 @@ } static void -csamidi_mwrite(struct mpu401 *arg __unused, void *cookie, int reg, unsigned char b) +csamidi_mwrite(struct mpu401 *arg __unused, void *cookie, int reg, + unsigned char b) { struct csa_midi_softc *scp = cookie; unsigned int val; switch (reg) { case MPU_CMDPORT: - switch (b) - { + switch (b) { case MPU_RESET: /* preserve current operation mode */ val = csamidi_readio(scp, BA0_MIDCR); @@ -208,8 +209,8 @@ /* allocate the required resources */ scp->io_rid = PCIR_BAR(0); - scp->io = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &scp->io_rid, RF_ACTIVE); + scp->io = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &scp->io_rid, + RF_ACTIVE); if (scp->io == NULL) goto err0; @@ -221,8 +222,7 @@ goto err1; } - mtx_init(&scp->mtx, device_get_nameunit(dev), "csamidi softc", - MTX_DEF); + mtx_init(&scp->mtx, device_get_nameunit(dev), "csamidi softc", MTX_DEF); /* reset the MIDI port */ csamidi_writeio(scp, BA0_MIDCR, MIDCR_MRST); @@ -249,30 +249,26 @@ if (rc) return (rc); if (scp->io != NULL) { - bus_release_resource(dev, SYS_RES_MEMORY, scp->io_rid, - scp->io); + bus_release_resource(dev, SYS_RES_MEMORY, scp->io_rid, scp->io); scp->io = NULL; } mtx_destroy(&scp->mtx); return (rc); } -static kobj_method_t csamidi_mpu_methods[] = { - KOBJMETHOD(mpufoi_read, csamidi_mread), +static kobj_method_t csamidi_mpu_methods[] = { KOBJMETHOD(mpufoi_read, + csamidi_mread), KOBJMETHOD(mpufoi_write, csamidi_mwrite), - KOBJMETHOD(mpufoi_uninit, csamidi_muninit), - KOBJMETHOD_END -}; + KOBJMETHOD(mpufoi_uninit, csamidi_muninit), KOBJMETHOD_END }; static DEFINE_CLASS(csamidi_mpu, csamidi_mpu_methods, 0); -static device_method_t midicsa_methods[] = { - DEVMETHOD(device_probe, midicsa_probe), +static device_method_t midicsa_methods[] = { DEVMETHOD(device_probe, + midicsa_probe), DEVMETHOD(device_attach, midicsa_attach), DEVMETHOD(device_detach, midicsa_detach), - DEVMETHOD_END -}; + DEVMETHOD_END }; static driver_t midicsa_driver = { "midi", Index: sys/dev/sound/pci/csapcm.c =================================================================== --- sys/dev/sound/pci/csapcm.c +++ sys/dev/sound/pci/csapcm.c @@ -34,17 +34,16 @@ #include "opt_snd.h" #endif -#include -#include +#include +#include #include #include #include - -#include -#include +#include +#include /* Buffer size on dma transfer. Fixed for CS416x. */ -#define CS461x_BUFFSIZE (4 * 1024) +#define CS461x_BUFFSIZE (4 * 1024) #define GOF_PER_SEC 200 @@ -61,60 +60,51 @@ }; struct csa_info { - csa_res res; /* resource */ - void *ih; /* Interrupt cookie */ - bus_dma_tag_t parent_dmat; /* DMA tag */ + csa_res res; /* resource */ + void *ih; /* Interrupt cookie */ + bus_dma_tag_t parent_dmat; /* DMA tag */ struct csa_bridgeinfo *binfo; /* The state of the parent. */ struct csa_card *card; int active; /* Contents of board's registers */ - u_long pfie; - u_long pctl; - u_long cctl; + u_long pfie; + u_long pctl; + u_long cctl; struct csa_chinfo pch, rch; - u_int32_t ac97[CS461x_AC97_NUMBER_RESTORE_REGS]; - u_int32_t ac97_powerdown; - u_int32_t ac97_general_purpose; + u_int32_t ac97[CS461x_AC97_NUMBER_RESTORE_REGS]; + u_int32_t ac97_powerdown; + u_int32_t ac97_general_purpose; }; /* -------------------------------------------------------------------- */ /* prototypes */ -static int csa_init(struct csa_info *); -static void csa_intr(void *); -static void csa_setplaysamplerate(csa_res *resp, u_long ulInRate); -static void csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate); -static void csa_startplaydma(struct csa_info *csa); -static void csa_startcapturedma(struct csa_info *csa); -static void csa_stopplaydma(struct csa_info *csa); -static void csa_stopcapturedma(struct csa_info *csa); -static int csa_startdsp(csa_res *resp); -static int csa_stopdsp(csa_res *resp); -static int csa_allocres(struct csa_info *scp, device_t dev); -static void csa_releaseres(struct csa_info *scp, device_t dev); -static void csa_ac97_suspend(struct csa_info *csa); -static void csa_ac97_resume(struct csa_info *csa); - -static u_int32_t csa_playfmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S8, 1, 0), - SND_FORMAT(AFMT_S8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - SND_FORMAT(AFMT_S16_BE, 1, 0), - SND_FORMAT(AFMT_S16_BE, 2, 0), - 0 -}; -static struct pcmchan_caps csa_playcaps = {8000, 48000, csa_playfmt, 0}; - -static u_int32_t csa_recfmt[] = { - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps csa_reccaps = {11025, 48000, csa_recfmt, 0}; +static int csa_init(struct csa_info *); +static void csa_intr(void *); +static void csa_setplaysamplerate(csa_res *resp, u_long ulInRate); +static void csa_setcapturesamplerate(csa_res *resp, u_long ulOutRate); +static void csa_startplaydma(struct csa_info *csa); +static void csa_startcapturedma(struct csa_info *csa); +static void csa_stopplaydma(struct csa_info *csa); +static void csa_stopcapturedma(struct csa_info *csa); +static int csa_startdsp(csa_res *resp); +static int csa_stopdsp(csa_res *resp); +static int csa_allocres(struct csa_info *scp, device_t dev); +static void csa_releaseres(struct csa_info *scp, device_t dev); +static void csa_ac97_suspend(struct csa_info *csa); +static void csa_ac97_resume(struct csa_info *csa); + +static u_int32_t csa_playfmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S8, 1, 0), + SND_FORMAT(AFMT_S8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), SND_FORMAT(AFMT_S16_BE, 1, 0), + SND_FORMAT(AFMT_S16_BE, 2, 0), 0 }; +static struct pcmchan_caps csa_playcaps = { 8000, 48000, csa_playfmt, 0 }; + +static u_int32_t csa_recfmt[] = { SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; +static struct pcmchan_caps csa_reccaps = { 11025, 48000, csa_recfmt, 0 }; /* -------------------------------------------------------------------- */ @@ -163,11 +153,8 @@ return 0; } -static kobj_method_t csa_ac97_methods[] = { - KOBJMETHOD(ac97_read, csa_rdcd), - KOBJMETHOD(ac97_write, csa_wrcd), - KOBJMETHOD_END -}; +static kobj_method_t csa_ac97_methods[] = { KOBJMETHOD(ac97_read, csa_rdcd), + KOBJMETHOD(ac97_write, csa_wrcd), KOBJMETHOD_END }; AC97_DECLARE(csa_ac97); static void @@ -212,7 +199,9 @@ /* * Fill in the SampleRateConverter control block. */ - csa_writemem(resp, BA1_PSRC, ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF)); + csa_writemem(resp, BA1_PSRC, + ((ulCorrectionPerSec << 16) & 0xFFFF0000) | + (ulCorrectionPerGOF & 0xFFFF)); csa_writemem(resp, BA1_PPI, ulPhiIncr); } @@ -230,14 +219,14 @@ * We can only decimate by up to a factor of 1/9th the hardware rate. * Return an error if an attempt is made to stray outside that limit. */ - if((ulOutRate * 9) < ulInRate) + if ((ulOutRate * 9) < ulInRate) return; /* * We can not capture at at rate greater than the Input Rate (48000). * Return an error if an attempt is made to stray outside that limit. */ - if(ulOutRate > ulInRate) + if (ulOutRate > ulInRate) return; /* @@ -286,36 +275,30 @@ * Fill in the VariDecimate control block. */ csa_writemem(resp, BA1_CSRC, - ((ulCorrectionPerSec << 16) & 0xFFFF0000) | (ulCorrectionPerGOF & 0xFFFF)); + ((ulCorrectionPerSec << 16) & 0xFFFF0000) | + (ulCorrectionPerGOF & 0xFFFF)); csa_writemem(resp, BA1_CCI, ulCoeffIncr); csa_writemem(resp, BA1_CD, - (((BA1_VARIDEC_BUF_1 + (ulInitialDelay << 2)) << 16) & 0xFFFF0000) | 0x80); + (((BA1_VARIDEC_BUF_1 + (ulInitialDelay << 2)) << 16) & 0xFFFF0000) | + 0x80); csa_writemem(resp, BA1_CPI, ulPhiIncr); /* - * Figure out the frame group length for the write back task. Basically, + * Figure out the frame group length for the write back task. Basically, * this is just the factors of 24000 (2^6*3*5^3) that are not present in * the output sample rate. */ dwFrameGroupLength = 1; - for(dwCnt = 2; dwCnt <= 64; dwCnt *= 2) - { - if(((ulOutRate / dwCnt) * dwCnt) != - ulOutRate) - { + for (dwCnt = 2; dwCnt <= 64; dwCnt *= 2) { + if (((ulOutRate / dwCnt) * dwCnt) != ulOutRate) { dwFrameGroupLength *= 2; } } - if(((ulOutRate / 3) * 3) != - ulOutRate) - { + if (((ulOutRate / 3) * 3) != ulOutRate) { dwFrameGroupLength *= 3; } - for(dwCnt = 5; dwCnt <= 125; dwCnt *= 5) - { - if(((ulOutRate / dwCnt) * dwCnt) != - ulOutRate) - { + for (dwCnt = 5; dwCnt <= 125; dwCnt *= 5) { + if (((ulOutRate / dwCnt) * dwCnt) != ulOutRate) { dwFrameGroupLength *= 5; } } @@ -428,8 +411,8 @@ csa_writemem(resp, BA1_FRMT, 0xadf); /* - * Turn on the run, run at frame, and DMA enable bits in the local copy of - * the SP control register. + * Turn on the run, run at frame, and DMA enable bits in the local copy + * of the SP control register. */ csa_writemem(resp, BA1_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN); @@ -438,9 +421,10 @@ * register. */ ul = 0; - for (i = 0 ; i < 25 ; i++) { + for (i = 0; i < 25; i++) { /* - * Wait a little bit, so we don't issue PCI reads too frequently. + * Wait a little bit, so we don't issue PCI reads too + * frequently. */ DELAY(50); /* @@ -451,13 +435,13 @@ /* * If the run at frame bit has reset, then stop waiting. */ - if((ul & SPCR_RUNFR) == 0) + if ((ul & SPCR_RUNFR) == 0) break; } /* * If the run at frame bit never reset, then return an error. */ - if((ul & SPCR_RUNFR) != 0) + if ((ul & SPCR_RUNFR) != 0) return (EAGAIN); return (0); @@ -516,7 +500,8 @@ csa_writemem(resp, BA1_CBA, sndbuf_getbufaddr(ch->buffer)); /* format */ - csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001); + csa_writemem(resp, BA1_CIE, + (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001); /* rate */ csa_setcapturesamplerate(resp, ch->spd); @@ -528,10 +513,11 @@ /* channel interface */ static void * -csachan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +csachan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { struct csa_info *csa = devinfo; - struct csa_chinfo *ch = (dir == PCMDIR_PLAY)? &csa->pch : &csa->rch; + struct csa_chinfo *ch = (dir == PCMDIR_PLAY) ? &csa->pch : &csa->rch; ch->parent = csa; ch->channel = c; @@ -603,11 +589,13 @@ resp = &csa->res; if (ch->dir == PCMDIR_PLAY) { - ptr = csa_readmem(resp, BA1_PBA) - sndbuf_getbufaddr(ch->buffer); + ptr = csa_readmem(resp, BA1_PBA) - + sndbuf_getbufaddr(ch->buffer); if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0) ptr >>= 1; } else { - ptr = csa_readmem(resp, BA1_CBA) - sndbuf_getbufaddr(ch->buffer); + ptr = csa_readmem(resp, BA1_CBA) - + sndbuf_getbufaddr(ch->buffer); if ((ch->fmt & AFMT_U8) != 0 || (ch->fmt & AFMT_S8) != 0) ptr >>= 1; } @@ -619,19 +607,17 @@ csachan_getcaps(kobj_t obj, void *data) { struct csa_chinfo *ch = data; - return (ch->dir == PCMDIR_PLAY)? &csa_playcaps : &csa_reccaps; + return (ch->dir == PCMDIR_PLAY) ? &csa_playcaps : &csa_reccaps; } -static kobj_method_t csachan_methods[] = { - KOBJMETHOD(channel_init, csachan_init), - KOBJMETHOD(channel_setformat, csachan_setformat), - KOBJMETHOD(channel_setspeed, csachan_setspeed), - KOBJMETHOD(channel_setblocksize, csachan_setblocksize), - KOBJMETHOD(channel_trigger, csachan_trigger), - KOBJMETHOD(channel_getptr, csachan_getptr), - KOBJMETHOD(channel_getcaps, csachan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t csachan_methods[] = { KOBJMETHOD(channel_init, + csachan_init), + KOBJMETHOD(channel_setformat, csachan_setformat), + KOBJMETHOD(channel_setspeed, csachan_setspeed), + KOBJMETHOD(channel_setblocksize, csachan_setblocksize), + KOBJMETHOD(channel_trigger, csachan_trigger), + KOBJMETHOD(channel_getptr, csachan_getptr), + KOBJMETHOD(channel_getcaps, csachan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(csachan); /* -------------------------------------------------------------------- */ @@ -674,10 +660,10 @@ csa_writeio(resp, BA0_EGPIODR, EGPIODR_GPOE0); csa_writeio(resp, BA0_EGPIOPTR, EGPIOPTR_GPPT0); /* Power up amplifier */ - csa_writeio(resp, BA0_EGPIODR, csa_readio(resp, BA0_EGPIODR) | - EGPIODR_GPOE2); - csa_writeio(resp, BA0_EGPIOPTR, csa_readio(resp, BA0_EGPIOPTR) | - EGPIOPTR_GPPT2); + csa_writeio(resp, BA0_EGPIODR, + csa_readio(resp, BA0_EGPIODR) | EGPIODR_GPOE2); + csa_writeio(resp, BA0_EGPIOPTR, + csa_readio(resp, BA0_EGPIOPTR) | EGPIOPTR_GPPT2); return 0; } @@ -691,31 +677,32 @@ resp = &csa->res; if (resp->io == NULL) { resp->io = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &resp->io_rid, RF_ACTIVE); + &resp->io_rid, RF_ACTIVE); if (resp->io == NULL) return (1); } if (resp->mem == NULL) { resp->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &resp->mem_rid, RF_ACTIVE); + &resp->mem_rid, RF_ACTIVE); if (resp->mem == NULL) return (1); } if (resp->irq == NULL) { resp->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &resp->irq_rid, RF_ACTIVE | RF_SHAREABLE); + &resp->irq_rid, RF_ACTIVE | RF_SHAREABLE); if (resp->irq == NULL) return (1); } - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), - /*alignment*/CS461x_BUFFSIZE, - /*boundary*/CS461x_BUFFSIZE, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/CS461x_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, /*lockarg*/NULL, - &csa->parent_dmat) != 0) + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), + /*alignment*/ CS461x_BUFFSIZE, + /*boundary*/ CS461x_BUFFSIZE, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ CS461x_BUFFSIZE, /*nsegments*/ 1, + /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, /*lockarg*/ NULL, + &csa->parent_dmat) != 0) return (1); return (0); @@ -733,15 +720,18 @@ if (resp->irq != NULL) { if (csa->ih) bus_teardown_intr(dev, resp->irq, csa->ih); - bus_release_resource(dev, SYS_RES_IRQ, resp->irq_rid, resp->irq); + bus_release_resource(dev, SYS_RES_IRQ, resp->irq_rid, + resp->irq); resp->irq = NULL; } if (resp->io != NULL) { - bus_release_resource(dev, SYS_RES_MEMORY, resp->io_rid, resp->io); + bus_release_resource(dev, SYS_RES_MEMORY, resp->io_rid, + resp->io); resp->io = NULL; } if (resp->mem != NULL) { - bus_release_resource(dev, SYS_RES_MEMORY, resp->mem_rid, resp->mem); + bus_release_resource(dev, SYS_RES_MEMORY, resp->mem_rid, + resp->mem); resp->mem = NULL; } if (csa->parent_dmat != NULL) { @@ -820,8 +810,8 @@ } snprintf(status, SND_STATUSLEN, "irq %jd on %s", - rman_get_start(resp->irq), - device_get_nameunit(device_get_parent(dev))); + rman_get_start(resp->irq), + device_get_nameunit(device_get_parent(dev))); /* Enable interrupt. */ if (snd_setup_intr(dev, resp->irq, 0, csa_intr, csa, &csa->ih)) { @@ -830,7 +820,8 @@ return (ENXIO); } csa_writemem(resp, BA1_PFIE, csa_readmem(resp, BA1_PFIE) & ~0x0000f03f); - csa_writemem(resp, BA1_CIE, (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001); + csa_writemem(resp, BA1_CIE, + (csa_readmem(resp, BA1_CIE) & ~0x0000003f) | 0x00000001); csa_active(csa, -1); if (pcm_register(dev, csa, 1, 1)) { @@ -867,10 +858,9 @@ int count, i; uint32_t tmp; - for (count = 0x2, i=0; - (count <= CS461x_AC97_HIGHESTREGTORESTORE) && - (i < CS461x_AC97_NUMBER_RESTORE_REGS); - count += 2, i++) + for (count = 0x2, i = 0; (count <= CS461x_AC97_HIGHESTREGTORESTORE) && + (i < CS461x_AC97_NUMBER_RESTORE_REGS); + count += 2, i++) csa_readcodec(&csa->res, BA0_AC97_RESET + count, &csa->ac97[i]); /* mute the outputs */ @@ -929,10 +919,9 @@ * Restore just the first set of registers, from register number * 0x02 to the register number that ulHighestRegToRestore specifies. */ - for (count = 0x2, i=0; - (count <= CS461x_AC97_HIGHESTREGTORESTORE) && - (i < CS461x_AC97_NUMBER_RESTORE_REGS); - count += 2, i++) + for (count = 0x2, i = 0; (count <= CS461x_AC97_HIGHESTREGTORESTORE) && + (i < CS461x_AC97_NUMBER_RESTORE_REGS); + count += 2, i++) csa_writecodec(&csa->res, BA0_AC97_RESET + count, csa->ac97[i]); } @@ -1019,7 +1008,7 @@ static device_method_t pcmcsa_methods[] = { /* Device interface */ - DEVMETHOD(device_probe , pcmcsa_probe ), + DEVMETHOD(device_probe, pcmcsa_probe), DEVMETHOD(device_attach, pcmcsa_attach), DEVMETHOD(device_detach, pcmcsa_detach), DEVMETHOD(device_suspend, pcmcsa_suspend), Index: sys/dev/sound/pci/csareg.h =================================================================== --- sys/dev/sound/pci/csareg.h +++ sys/dev/sound/pci/csareg.h @@ -44,128 +44,128 @@ * register zero on the CS461x part. * *****************************************************************************/ -#define BA0_HISR 0x00000000L -#define BA0_HSR0 0x00000004L -#define BA0_HICR 0x00000008L -#define BA0_DMSR 0x00000100L -#define BA0_HSAR 0x00000110L -#define BA0_HDAR 0x00000114L -#define BA0_HDMR 0x00000118L -#define BA0_HDCR 0x0000011CL -#define BA0_PFMC 0x00000200L -#define BA0_PFCV1 0x00000204L -#define BA0_PFCV2 0x00000208L -#define BA0_PCICFG00 0x00000300L -#define BA0_PCICFG04 0x00000304L -#define BA0_PCICFG08 0x00000308L -#define BA0_PCICFG0C 0x0000030CL -#define BA0_PCICFG10 0x00000310L -#define BA0_PCICFG14 0x00000314L -#define BA0_PCICFG18 0x00000318L -#define BA0_PCICFG1C 0x0000031CL -#define BA0_PCICFG20 0x00000320L -#define BA0_PCICFG24 0x00000324L -#define BA0_PCICFG28 0x00000328L -#define BA0_PCICFG2C 0x0000032CL -#define BA0_PCICFG30 0x00000330L -#define BA0_PCICFG34 0x00000334L -#define BA0_PCICFG38 0x00000338L -#define BA0_PCICFG3C 0x0000033CL -#define BA0_CLKCR1 0x00000400L -#define BA0_CLKCR2 0x00000404L -#define BA0_PLLM 0x00000408L -#define BA0_PLLCC 0x0000040CL -#define BA0_FRR 0x00000410L -#define BA0_CFL1 0x00000414L -#define BA0_CFL2 0x00000418L -#define BA0_SERMC1 0x00000420L -#define BA0_SERMC2 0x00000424L -#define BA0_SERC1 0x00000428L -#define BA0_SERC2 0x0000042CL -#define BA0_SERC3 0x00000430L -#define BA0_SERC4 0x00000434L -#define BA0_SERC5 0x00000438L -#define BA0_SERBSP 0x0000043CL -#define BA0_SERBST 0x00000440L -#define BA0_SERBCM 0x00000444L -#define BA0_SERBAD 0x00000448L -#define BA0_SERBCF 0x0000044CL -#define BA0_SERBWP 0x00000450L -#define BA0_SERBRP 0x00000454L +#define BA0_HISR 0x00000000L +#define BA0_HSR0 0x00000004L +#define BA0_HICR 0x00000008L +#define BA0_DMSR 0x00000100L +#define BA0_HSAR 0x00000110L +#define BA0_HDAR 0x00000114L +#define BA0_HDMR 0x00000118L +#define BA0_HDCR 0x0000011CL +#define BA0_PFMC 0x00000200L +#define BA0_PFCV1 0x00000204L +#define BA0_PFCV2 0x00000208L +#define BA0_PCICFG00 0x00000300L +#define BA0_PCICFG04 0x00000304L +#define BA0_PCICFG08 0x00000308L +#define BA0_PCICFG0C 0x0000030CL +#define BA0_PCICFG10 0x00000310L +#define BA0_PCICFG14 0x00000314L +#define BA0_PCICFG18 0x00000318L +#define BA0_PCICFG1C 0x0000031CL +#define BA0_PCICFG20 0x00000320L +#define BA0_PCICFG24 0x00000324L +#define BA0_PCICFG28 0x00000328L +#define BA0_PCICFG2C 0x0000032CL +#define BA0_PCICFG30 0x00000330L +#define BA0_PCICFG34 0x00000334L +#define BA0_PCICFG38 0x00000338L +#define BA0_PCICFG3C 0x0000033CL +#define BA0_CLKCR1 0x00000400L +#define BA0_CLKCR2 0x00000404L +#define BA0_PLLM 0x00000408L +#define BA0_PLLCC 0x0000040CL +#define BA0_FRR 0x00000410L +#define BA0_CFL1 0x00000414L +#define BA0_CFL2 0x00000418L +#define BA0_SERMC1 0x00000420L +#define BA0_SERMC2 0x00000424L +#define BA0_SERC1 0x00000428L +#define BA0_SERC2 0x0000042CL +#define BA0_SERC3 0x00000430L +#define BA0_SERC4 0x00000434L +#define BA0_SERC5 0x00000438L +#define BA0_SERBSP 0x0000043CL +#define BA0_SERBST 0x00000440L +#define BA0_SERBCM 0x00000444L +#define BA0_SERBAD 0x00000448L +#define BA0_SERBCF 0x0000044CL +#define BA0_SERBWP 0x00000450L +#define BA0_SERBRP 0x00000454L #ifndef NO_CS4612 -#define BA0_ASER_FADDR 0x00000458L +#define BA0_ASER_FADDR 0x00000458L #endif -#define BA0_ACCTL 0x00000460L -#define BA0_ACSTS 0x00000464L -#define BA0_ACOSV 0x00000468L -#define BA0_ACCAD 0x0000046CL -#define BA0_ACCDA 0x00000470L -#define BA0_ACISV 0x00000474L -#define BA0_ACSAD 0x00000478L -#define BA0_ACSDA 0x0000047CL -#define BA0_JSPT 0x00000480L -#define BA0_JSCTL 0x00000484L -#define BA0_JSC1 0x00000488L -#define BA0_JSC2 0x0000048CL -#define BA0_MIDCR 0x00000490L -#define BA0_MIDSR 0x00000494L -#define BA0_MIDWP 0x00000498L -#define BA0_MIDRP 0x0000049CL -#define BA0_JSIO 0x000004A0L +#define BA0_ACCTL 0x00000460L +#define BA0_ACSTS 0x00000464L +#define BA0_ACOSV 0x00000468L +#define BA0_ACCAD 0x0000046CL +#define BA0_ACCDA 0x00000470L +#define BA0_ACISV 0x00000474L +#define BA0_ACSAD 0x00000478L +#define BA0_ACSDA 0x0000047CL +#define BA0_JSPT 0x00000480L +#define BA0_JSCTL 0x00000484L +#define BA0_JSC1 0x00000488L +#define BA0_JSC2 0x0000048CL +#define BA0_MIDCR 0x00000490L +#define BA0_MIDSR 0x00000494L +#define BA0_MIDWP 0x00000498L +#define BA0_MIDRP 0x0000049CL +#define BA0_JSIO 0x000004A0L #ifndef NO_CS4612 -#define BA0_ASER_MASTER 0x000004A4L +#define BA0_ASER_MASTER 0x000004A4L #endif -#define BA0_CFGI 0x000004B0L -#define BA0_SSVID 0x000004B4L -#define BA0_GPIOR 0x000004B8L +#define BA0_CFGI 0x000004B0L +#define BA0_SSVID 0x000004B4L +#define BA0_GPIOR 0x000004B8L #ifndef NO_CS4612 -#define BA0_EGPIODR 0x000004BCL -#define BA0_EGPIOPTR 0x000004C0L -#define BA0_EGPIOTR 0x000004C4L -#define BA0_EGPIOWR 0x000004C8L -#define BA0_EGPIOSR 0x000004CCL -#define BA0_SERC6 0x000004D0L -#define BA0_SERC7 0x000004D4L -#define BA0_SERACC 0x000004D8L -#define BA0_ACCTL2 0x000004E0L -#define BA0_ACSTS2 0x000004E4L -#define BA0_ACOSV2 0x000004E8L -#define BA0_ACCAD2 0x000004ECL -#define BA0_ACCDA2 0x000004F0L -#define BA0_ACISV2 0x000004F4L -#define BA0_ACSAD2 0x000004F8L -#define BA0_ACSDA2 0x000004FCL -#define BA0_IOTAC0 0x00000500L -#define BA0_IOTAC1 0x00000504L -#define BA0_IOTAC2 0x00000508L -#define BA0_IOTAC3 0x0000050CL -#define BA0_IOTAC4 0x00000510L -#define BA0_IOTAC5 0x00000514L -#define BA0_IOTAC6 0x00000518L -#define BA0_IOTAC7 0x0000051CL -#define BA0_IOTAC8 0x00000520L -#define BA0_IOTAC9 0x00000524L -#define BA0_IOTAC10 0x00000528L -#define BA0_IOTAC11 0x0000052CL -#define BA0_IOTFR0 0x00000540L -#define BA0_IOTFR1 0x00000544L -#define BA0_IOTFR2 0x00000548L -#define BA0_IOTFR3 0x0000054CL -#define BA0_IOTFR4 0x00000550L -#define BA0_IOTFR5 0x00000554L -#define BA0_IOTFR6 0x00000558L -#define BA0_IOTFR7 0x0000055CL -#define BA0_IOTFIFO 0x00000580L -#define BA0_IOTRRD 0x00000584L -#define BA0_IOTFP 0x00000588L -#define BA0_IOTCR 0x0000058CL -#define BA0_DPCID 0x00000590L -#define BA0_DPCIA 0x00000594L -#define BA0_DPCIC 0x00000598L -#define BA0_PCPCIR 0x00000600L -#define BA0_PCPCIG 0x00000604L -#define BA0_PCPCIEN 0x00000608L -#define BA0_EPCIPMC 0x00000610L +#define BA0_EGPIODR 0x000004BCL +#define BA0_EGPIOPTR 0x000004C0L +#define BA0_EGPIOTR 0x000004C4L +#define BA0_EGPIOWR 0x000004C8L +#define BA0_EGPIOSR 0x000004CCL +#define BA0_SERC6 0x000004D0L +#define BA0_SERC7 0x000004D4L +#define BA0_SERACC 0x000004D8L +#define BA0_ACCTL2 0x000004E0L +#define BA0_ACSTS2 0x000004E4L +#define BA0_ACOSV2 0x000004E8L +#define BA0_ACCAD2 0x000004ECL +#define BA0_ACCDA2 0x000004F0L +#define BA0_ACISV2 0x000004F4L +#define BA0_ACSAD2 0x000004F8L +#define BA0_ACSDA2 0x000004FCL +#define BA0_IOTAC0 0x00000500L +#define BA0_IOTAC1 0x00000504L +#define BA0_IOTAC2 0x00000508L +#define BA0_IOTAC3 0x0000050CL +#define BA0_IOTAC4 0x00000510L +#define BA0_IOTAC5 0x00000514L +#define BA0_IOTAC6 0x00000518L +#define BA0_IOTAC7 0x0000051CL +#define BA0_IOTAC8 0x00000520L +#define BA0_IOTAC9 0x00000524L +#define BA0_IOTAC10 0x00000528L +#define BA0_IOTAC11 0x0000052CL +#define BA0_IOTFR0 0x00000540L +#define BA0_IOTFR1 0x00000544L +#define BA0_IOTFR2 0x00000548L +#define BA0_IOTFR3 0x0000054CL +#define BA0_IOTFR4 0x00000550L +#define BA0_IOTFR5 0x00000554L +#define BA0_IOTFR6 0x00000558L +#define BA0_IOTFR7 0x0000055CL +#define BA0_IOTFIFO 0x00000580L +#define BA0_IOTRRD 0x00000584L +#define BA0_IOTFP 0x00000588L +#define BA0_IOTCR 0x0000058CL +#define BA0_DPCID 0x00000590L +#define BA0_DPCIA 0x00000594L +#define BA0_DPCIC 0x00000598L +#define BA0_PCPCIR 0x00000600L +#define BA0_PCPCIG 0x00000604L +#define BA0_PCPCIEN 0x00000608L +#define BA0_EPCIPMC 0x00000610L #endif /***************************************************************************** @@ -174,70 +174,70 @@ * as a virtual extension to the base address register zero memory range. * *****************************************************************************/ -#define BA0_AC97_RESET 0x00001000L -#define BA0_AC97_MASTER_VOLUME 0x00001002L -#define BA0_AC97_HEADPHONE_VOLUME 0x00001004L -#define BA0_AC97_MASTER_VOLUME_MONO 0x00001006L -#define BA0_AC97_MASTER_TONE 0x00001008L -#define BA0_AC97_PC_BEEP_VOLUME 0x0000100AL -#define BA0_AC97_PHONE_VOLUME 0x0000100CL -#define BA0_AC97_MIC_VOLUME 0x0000100EL -#define BA0_AC97_LINE_IN_VOLUME 0x00001010L -#define BA0_AC97_CD_VOLUME 0x00001012L -#define BA0_AC97_VIDEO_VOLUME 0x00001014L -#define BA0_AC97_AUX_VOLUME 0x00001016L -#define BA0_AC97_PCM_OUT_VOLUME 0x00001018L -#define BA0_AC97_RECORD_SELECT 0x0000101AL -#define BA0_AC97_RECORD_GAIN 0x0000101CL -#define BA0_AC97_RECORD_GAIN_MIC 0x0000101EL -#define BA0_AC97_GENERAL_PURPOSE 0x00001020L -#define BA0_AC97_3D_CONTROL 0x00001022L -#define BA0_AC97_MODEM_RATE 0x00001024L -#define BA0_AC97_POWERDOWN 0x00001026L -#define BA0_AC97_RESERVED_28 0x00001028L -#define BA0_AC97_RESERVED_2A 0x0000102AL -#define BA0_AC97_RESERVED_2C 0x0000102CL -#define BA0_AC97_RESERVED_2E 0x0000102EL -#define BA0_AC97_RESERVED_30 0x00001030L -#define BA0_AC97_RESERVED_32 0x00001032L -#define BA0_AC97_RESERVED_34 0x00001034L -#define BA0_AC97_RESERVED_36 0x00001036L -#define BA0_AC97_RESERVED_38 0x00001038L -#define BA0_AC97_RESERVED_3A 0x0000103AL -#define BA0_AC97_RESERVED_3C 0x0000103CL -#define BA0_AC97_RESERVED_3E 0x0000103EL -#define BA0_AC97_RESERVED_40 0x00001040L -#define BA0_AC97_RESERVED_42 0x00001042L -#define BA0_AC97_RESERVED_44 0x00001044L -#define BA0_AC97_RESERVED_46 0x00001046L -#define BA0_AC97_RESERVED_48 0x00001048L -#define BA0_AC97_RESERVED_4A 0x0000104AL -#define BA0_AC97_RESERVED_4C 0x0000104CL -#define BA0_AC97_RESERVED_4E 0x0000104EL -#define BA0_AC97_RESERVED_50 0x00001050L -#define BA0_AC97_RESERVED_52 0x00001052L -#define BA0_AC97_RESERVED_54 0x00001054L -#define BA0_AC97_RESERVED_56 0x00001056L -#define BA0_AC97_RESERVED_58 0x00001058L -#define BA0_AC97_VENDOR_RESERVED_5A 0x0000105AL -#define BA0_AC97_VENDOR_RESERVED_5C 0x0000105CL -#define BA0_AC97_VENDOR_RESERVED_5E 0x0000105EL -#define BA0_AC97_VENDOR_RESERVED_60 0x00001060L -#define BA0_AC97_VENDOR_RESERVED_62 0x00001062L -#define BA0_AC97_VENDOR_RESERVED_64 0x00001064L -#define BA0_AC97_VENDOR_RESERVED_66 0x00001066L -#define BA0_AC97_VENDOR_RESERVED_68 0x00001068L -#define BA0_AC97_VENDOR_RESERVED_6A 0x0000106AL -#define BA0_AC97_VENDOR_RESERVED_6C 0x0000106CL -#define BA0_AC97_VENDOR_RESERVED_6E 0x0000106EL -#define BA0_AC97_VENDOR_RESERVED_70 0x00001070L -#define BA0_AC97_VENDOR_RESERVED_72 0x00001072L -#define BA0_AC97_VENDOR_RESERVED_74 0x00001074L -#define BA0_AC97_VENDOR_RESERVED_76 0x00001076L -#define BA0_AC97_VENDOR_RESERVED_78 0x00001078L -#define BA0_AC97_VENDOR_RESERVED_7A 0x0000107AL -#define BA0_AC97_VENDOR_ID1 0x0000107CL -#define BA0_AC97_VENDOR_ID2 0x0000107EL +#define BA0_AC97_RESET 0x00001000L +#define BA0_AC97_MASTER_VOLUME 0x00001002L +#define BA0_AC97_HEADPHONE_VOLUME 0x00001004L +#define BA0_AC97_MASTER_VOLUME_MONO 0x00001006L +#define BA0_AC97_MASTER_TONE 0x00001008L +#define BA0_AC97_PC_BEEP_VOLUME 0x0000100AL +#define BA0_AC97_PHONE_VOLUME 0x0000100CL +#define BA0_AC97_MIC_VOLUME 0x0000100EL +#define BA0_AC97_LINE_IN_VOLUME 0x00001010L +#define BA0_AC97_CD_VOLUME 0x00001012L +#define BA0_AC97_VIDEO_VOLUME 0x00001014L +#define BA0_AC97_AUX_VOLUME 0x00001016L +#define BA0_AC97_PCM_OUT_VOLUME 0x00001018L +#define BA0_AC97_RECORD_SELECT 0x0000101AL +#define BA0_AC97_RECORD_GAIN 0x0000101CL +#define BA0_AC97_RECORD_GAIN_MIC 0x0000101EL +#define BA0_AC97_GENERAL_PURPOSE 0x00001020L +#define BA0_AC97_3D_CONTROL 0x00001022L +#define BA0_AC97_MODEM_RATE 0x00001024L +#define BA0_AC97_POWERDOWN 0x00001026L +#define BA0_AC97_RESERVED_28 0x00001028L +#define BA0_AC97_RESERVED_2A 0x0000102AL +#define BA0_AC97_RESERVED_2C 0x0000102CL +#define BA0_AC97_RESERVED_2E 0x0000102EL +#define BA0_AC97_RESERVED_30 0x00001030L +#define BA0_AC97_RESERVED_32 0x00001032L +#define BA0_AC97_RESERVED_34 0x00001034L +#define BA0_AC97_RESERVED_36 0x00001036L +#define BA0_AC97_RESERVED_38 0x00001038L +#define BA0_AC97_RESERVED_3A 0x0000103AL +#define BA0_AC97_RESERVED_3C 0x0000103CL +#define BA0_AC97_RESERVED_3E 0x0000103EL +#define BA0_AC97_RESERVED_40 0x00001040L +#define BA0_AC97_RESERVED_42 0x00001042L +#define BA0_AC97_RESERVED_44 0x00001044L +#define BA0_AC97_RESERVED_46 0x00001046L +#define BA0_AC97_RESERVED_48 0x00001048L +#define BA0_AC97_RESERVED_4A 0x0000104AL +#define BA0_AC97_RESERVED_4C 0x0000104CL +#define BA0_AC97_RESERVED_4E 0x0000104EL +#define BA0_AC97_RESERVED_50 0x00001050L +#define BA0_AC97_RESERVED_52 0x00001052L +#define BA0_AC97_RESERVED_54 0x00001054L +#define BA0_AC97_RESERVED_56 0x00001056L +#define BA0_AC97_RESERVED_58 0x00001058L +#define BA0_AC97_VENDOR_RESERVED_5A 0x0000105AL +#define BA0_AC97_VENDOR_RESERVED_5C 0x0000105CL +#define BA0_AC97_VENDOR_RESERVED_5E 0x0000105EL +#define BA0_AC97_VENDOR_RESERVED_60 0x00001060L +#define BA0_AC97_VENDOR_RESERVED_62 0x00001062L +#define BA0_AC97_VENDOR_RESERVED_64 0x00001064L +#define BA0_AC97_VENDOR_RESERVED_66 0x00001066L +#define BA0_AC97_VENDOR_RESERVED_68 0x00001068L +#define BA0_AC97_VENDOR_RESERVED_6A 0x0000106AL +#define BA0_AC97_VENDOR_RESERVED_6C 0x0000106CL +#define BA0_AC97_VENDOR_RESERVED_6E 0x0000106EL +#define BA0_AC97_VENDOR_RESERVED_70 0x00001070L +#define BA0_AC97_VENDOR_RESERVED_72 0x00001072L +#define BA0_AC97_VENDOR_RESERVED_74 0x00001074L +#define BA0_AC97_VENDOR_RESERVED_76 0x00001076L +#define BA0_AC97_VENDOR_RESERVED_78 0x00001078L +#define BA0_AC97_VENDOR_RESERVED_7A 0x0000107AL +#define BA0_AC97_VENDOR_ID1 0x0000107CL +#define BA0_AC97_VENDOR_ID2 0x0000107EL /***************************************************************************** * @@ -245,36 +245,36 @@ * base address register one on the CS461x part. * *****************************************************************************/ -#define BA1_SP_DMEM0 0x00000000L -#define BA1_SP_DMEM1 0x00010000L -#define BA1_SP_PMEM 0x00020000L -#define BA1_SPCR 0x00030000L -#define BA1_DREG 0x00030004L -#define BA1_DSRWP 0x00030008L -#define BA1_TWPR 0x0003000CL -#define BA1_SPWR 0x00030010L -#define BA1_SPIR 0x00030014L -#define BA1_FGR1 0x00030020L -#define BA1_SPCS 0x00030028L -#define BA1_SDSR 0x0003002CL -#define BA1_FRMT 0x00030030L -#define BA1_FRCC 0x00030034L -#define BA1_FRSC 0x00030038L -#define BA1_OMNI_MEM 0x000E0000L +#define BA1_SP_DMEM0 0x00000000L +#define BA1_SP_DMEM1 0x00010000L +#define BA1_SP_PMEM 0x00020000L +#define BA1_SPCR 0x00030000L +#define BA1_DREG 0x00030004L +#define BA1_DSRWP 0x00030008L +#define BA1_TWPR 0x0003000CL +#define BA1_SPWR 0x00030010L +#define BA1_SPIR 0x00030014L +#define BA1_FGR1 0x00030020L +#define BA1_SPCS 0x00030028L +#define BA1_SDSR 0x0003002CL +#define BA1_FRMT 0x00030030L +#define BA1_FRCC 0x00030034L +#define BA1_FRSC 0x00030038L +#define BA1_OMNI_MEM 0x000E0000L /***************************************************************************** * * The following defines are for the flags in the PCI interrupt register. * *****************************************************************************/ -#define PI_LINE_MASK 0x000000FFL -#define PI_PIN_MASK 0x0000FF00L -#define PI_MIN_GRANT_MASK 0x00FF0000L -#define PI_MAX_LATENCY_MASK 0xFF000000L -#define PI_LINE_SHIFT 0L -#define PI_PIN_SHIFT 8L -#define PI_MIN_GRANT_SHIFT 16L -#define PI_MAX_LATENCY_SHIFT 24L +#define PI_LINE_MASK 0x000000FFL +#define PI_PIN_MASK 0x0000FF00L +#define PI_MIN_GRANT_MASK 0x00FF0000L +#define PI_MAX_LATENCY_MASK 0xFF000000L +#define PI_LINE_SHIFT 0L +#define PI_PIN_SHIFT 8L +#define PI_MIN_GRANT_SHIFT 16L +#define PI_MAX_LATENCY_SHIFT 24L /***************************************************************************** * @@ -282,75 +282,75 @@ * register. * *****************************************************************************/ -#define HISR_VC_MASK 0x0000FFFFL -#define HISR_VC0 0x00000001L -#define HISR_VC1 0x00000002L -#define HISR_VC2 0x00000004L -#define HISR_VC3 0x00000008L -#define HISR_VC4 0x00000010L -#define HISR_VC5 0x00000020L -#define HISR_VC6 0x00000040L -#define HISR_VC7 0x00000080L -#define HISR_VC8 0x00000100L -#define HISR_VC9 0x00000200L -#define HISR_VC10 0x00000400L -#define HISR_VC11 0x00000800L -#define HISR_VC12 0x00001000L -#define HISR_VC13 0x00002000L -#define HISR_VC14 0x00004000L -#define HISR_VC15 0x00008000L -#define HISR_INT0 0x00010000L -#define HISR_INT1 0x00020000L -#define HISR_DMAI 0x00040000L -#define HISR_FROVR 0x00080000L -#define HISR_MIDI 0x00100000L +#define HISR_VC_MASK 0x0000FFFFL +#define HISR_VC0 0x00000001L +#define HISR_VC1 0x00000002L +#define HISR_VC2 0x00000004L +#define HISR_VC3 0x00000008L +#define HISR_VC4 0x00000010L +#define HISR_VC5 0x00000020L +#define HISR_VC6 0x00000040L +#define HISR_VC7 0x00000080L +#define HISR_VC8 0x00000100L +#define HISR_VC9 0x00000200L +#define HISR_VC10 0x00000400L +#define HISR_VC11 0x00000800L +#define HISR_VC12 0x00001000L +#define HISR_VC13 0x00002000L +#define HISR_VC14 0x00004000L +#define HISR_VC15 0x00008000L +#define HISR_INT0 0x00010000L +#define HISR_INT1 0x00020000L +#define HISR_DMAI 0x00040000L +#define HISR_FROVR 0x00080000L +#define HISR_MIDI 0x00100000L #ifdef NO_CS4612 -#define HISR_RESERVED 0x0FE00000L +#define HISR_RESERVED 0x0FE00000L #else -#define HISR_SBINT 0x00200000L -#define HISR_RESERVED 0x0FC00000L +#define HISR_SBINT 0x00200000L +#define HISR_RESERVED 0x0FC00000L #endif -#define HISR_H0P 0x40000000L -#define HISR_INTENA 0x80000000L +#define HISR_H0P 0x40000000L +#define HISR_INTENA 0x80000000L /***************************************************************************** * * The following defines are for the flags in the host signal register 0. * *****************************************************************************/ -#define HSR0_VC_MASK 0xFFFFFFFFL -#define HSR0_VC16 0x00000001L -#define HSR0_VC17 0x00000002L -#define HSR0_VC18 0x00000004L -#define HSR0_VC19 0x00000008L -#define HSR0_VC20 0x00000010L -#define HSR0_VC21 0x00000020L -#define HSR0_VC22 0x00000040L -#define HSR0_VC23 0x00000080L -#define HSR0_VC24 0x00000100L -#define HSR0_VC25 0x00000200L -#define HSR0_VC26 0x00000400L -#define HSR0_VC27 0x00000800L -#define HSR0_VC28 0x00001000L -#define HSR0_VC29 0x00002000L -#define HSR0_VC30 0x00004000L -#define HSR0_VC31 0x00008000L -#define HSR0_VC32 0x00010000L -#define HSR0_VC33 0x00020000L -#define HSR0_VC34 0x00040000L -#define HSR0_VC35 0x00080000L -#define HSR0_VC36 0x00100000L -#define HSR0_VC37 0x00200000L -#define HSR0_VC38 0x00400000L -#define HSR0_VC39 0x00800000L -#define HSR0_VC40 0x01000000L -#define HSR0_VC41 0x02000000L -#define HSR0_VC42 0x04000000L -#define HSR0_VC43 0x08000000L -#define HSR0_VC44 0x10000000L -#define HSR0_VC45 0x20000000L -#define HSR0_VC46 0x40000000L -#define HSR0_VC47 0x80000000L +#define HSR0_VC_MASK 0xFFFFFFFFL +#define HSR0_VC16 0x00000001L +#define HSR0_VC17 0x00000002L +#define HSR0_VC18 0x00000004L +#define HSR0_VC19 0x00000008L +#define HSR0_VC20 0x00000010L +#define HSR0_VC21 0x00000020L +#define HSR0_VC22 0x00000040L +#define HSR0_VC23 0x00000080L +#define HSR0_VC24 0x00000100L +#define HSR0_VC25 0x00000200L +#define HSR0_VC26 0x00000400L +#define HSR0_VC27 0x00000800L +#define HSR0_VC28 0x00001000L +#define HSR0_VC29 0x00002000L +#define HSR0_VC30 0x00004000L +#define HSR0_VC31 0x00008000L +#define HSR0_VC32 0x00010000L +#define HSR0_VC33 0x00020000L +#define HSR0_VC34 0x00040000L +#define HSR0_VC35 0x00080000L +#define HSR0_VC36 0x00100000L +#define HSR0_VC37 0x00200000L +#define HSR0_VC38 0x00400000L +#define HSR0_VC39 0x00800000L +#define HSR0_VC40 0x01000000L +#define HSR0_VC41 0x02000000L +#define HSR0_VC42 0x04000000L +#define HSR0_VC43 0x08000000L +#define HSR0_VC44 0x10000000L +#define HSR0_VC45 0x20000000L +#define HSR0_VC46 0x40000000L +#define HSR0_VC47 0x80000000L /***************************************************************************** * @@ -358,18 +358,18 @@ * register. * *****************************************************************************/ -#define HICR_IEV 0x00000001L -#define HICR_CHGM 0x00000002L +#define HICR_IEV 0x00000001L +#define HICR_CHGM 0x00000002L /***************************************************************************** * * The following defines are for the flags in the DMA status register. * *****************************************************************************/ -#define DMSR_HP 0x00000001L -#define DMSR_HR 0x00000002L -#define DMSR_SP 0x00000004L -#define DMSR_SR 0x00000008L +#define DMSR_HP 0x00000001L +#define DMSR_HR 0x00000002L +#define DMSR_SP 0x00000004L +#define DMSR_SR 0x00000008L /***************************************************************************** * @@ -377,16 +377,16 @@ * register. * *****************************************************************************/ -#define HSAR_HOST_ADDR_MASK 0xFFFFFFFFL -#define HSAR_DSP_ADDR_MASK 0x0000FFFFL -#define HSAR_MEMID_MASK 0x000F0000L -#define HSAR_MEMID_SP_DMEM0 0x00000000L -#define HSAR_MEMID_SP_DMEM1 0x00010000L -#define HSAR_MEMID_SP_PMEM 0x00020000L -#define HSAR_MEMID_SP_DEBUG 0x00030000L -#define HSAR_MEMID_OMNI_MEM 0x000E0000L -#define HSAR_END 0x40000000L -#define HSAR_ERR 0x80000000L +#define HSAR_HOST_ADDR_MASK 0xFFFFFFFFL +#define HSAR_DSP_ADDR_MASK 0x0000FFFFL +#define HSAR_MEMID_MASK 0x000F0000L +#define HSAR_MEMID_SP_DMEM0 0x00000000L +#define HSAR_MEMID_SP_DMEM1 0x00010000L +#define HSAR_MEMID_SP_PMEM 0x00020000L +#define HSAR_MEMID_SP_DEBUG 0x00030000L +#define HSAR_MEMID_OMNI_MEM 0x000E0000L +#define HSAR_END 0x40000000L +#define HSAR_ERR 0x80000000L /***************************************************************************** * @@ -394,59 +394,59 @@ * register. * *****************************************************************************/ -#define HDAR_HOST_ADDR_MASK 0xFFFFFFFFL -#define HDAR_DSP_ADDR_MASK 0x0000FFFFL -#define HDAR_MEMID_MASK 0x000F0000L -#define HDAR_MEMID_SP_DMEM0 0x00000000L -#define HDAR_MEMID_SP_DMEM1 0x00010000L -#define HDAR_MEMID_SP_PMEM 0x00020000L -#define HDAR_MEMID_SP_DEBUG 0x00030000L -#define HDAR_MEMID_OMNI_MEM 0x000E0000L -#define HDAR_END 0x40000000L -#define HDAR_ERR 0x80000000L +#define HDAR_HOST_ADDR_MASK 0xFFFFFFFFL +#define HDAR_DSP_ADDR_MASK 0x0000FFFFL +#define HDAR_MEMID_MASK 0x000F0000L +#define HDAR_MEMID_SP_DMEM0 0x00000000L +#define HDAR_MEMID_SP_DMEM1 0x00010000L +#define HDAR_MEMID_SP_PMEM 0x00020000L +#define HDAR_MEMID_SP_DEBUG 0x00030000L +#define HDAR_MEMID_OMNI_MEM 0x000E0000L +#define HDAR_END 0x40000000L +#define HDAR_ERR 0x80000000L /***************************************************************************** * * The following defines are for the flags in the host DMA control register. * *****************************************************************************/ -#define HDMR_AC_MASK 0x0000F000L -#define HDMR_AC_8_16 0x00001000L -#define HDMR_AC_M_S 0x00002000L -#define HDMR_AC_B_L 0x00004000L -#define HDMR_AC_S_U 0x00008000L +#define HDMR_AC_MASK 0x0000F000L +#define HDMR_AC_8_16 0x00001000L +#define HDMR_AC_M_S 0x00002000L +#define HDMR_AC_B_L 0x00004000L +#define HDMR_AC_S_U 0x00008000L /***************************************************************************** * * The following defines are for the flags in the host DMA control register. * *****************************************************************************/ -#define HDCR_COUNT_MASK 0x000003FFL -#define HDCR_DONE 0x00004000L -#define HDCR_OPT 0x00008000L -#define HDCR_WBD 0x00400000L -#define HDCR_WBS 0x00800000L -#define HDCR_DMS_MASK 0x07000000L -#define HDCR_DMS_LINEAR 0x00000000L -#define HDCR_DMS_16_DWORDS 0x01000000L -#define HDCR_DMS_32_DWORDS 0x02000000L -#define HDCR_DMS_64_DWORDS 0x03000000L -#define HDCR_DMS_128_DWORDS 0x04000000L -#define HDCR_DMS_256_DWORDS 0x05000000L -#define HDCR_DMS_512_DWORDS 0x06000000L -#define HDCR_DMS_1024_DWORDS 0x07000000L -#define HDCR_DH 0x08000000L -#define HDCR_SMS_MASK 0x70000000L -#define HDCR_SMS_LINEAR 0x00000000L -#define HDCR_SMS_16_DWORDS 0x10000000L -#define HDCR_SMS_32_DWORDS 0x20000000L -#define HDCR_SMS_64_DWORDS 0x30000000L -#define HDCR_SMS_128_DWORDS 0x40000000L -#define HDCR_SMS_256_DWORDS 0x50000000L -#define HDCR_SMS_512_DWORDS 0x60000000L -#define HDCR_SMS_1024_DWORDS 0x70000000L -#define HDCR_SH 0x80000000L -#define HDCR_COUNT_SHIFT 0L +#define HDCR_COUNT_MASK 0x000003FFL +#define HDCR_DONE 0x00004000L +#define HDCR_OPT 0x00008000L +#define HDCR_WBD 0x00400000L +#define HDCR_WBS 0x00800000L +#define HDCR_DMS_MASK 0x07000000L +#define HDCR_DMS_LINEAR 0x00000000L +#define HDCR_DMS_16_DWORDS 0x01000000L +#define HDCR_DMS_32_DWORDS 0x02000000L +#define HDCR_DMS_64_DWORDS 0x03000000L +#define HDCR_DMS_128_DWORDS 0x04000000L +#define HDCR_DMS_256_DWORDS 0x05000000L +#define HDCR_DMS_512_DWORDS 0x06000000L +#define HDCR_DMS_1024_DWORDS 0x07000000L +#define HDCR_DH 0x08000000L +#define HDCR_SMS_MASK 0x70000000L +#define HDCR_SMS_LINEAR 0x00000000L +#define HDCR_SMS_16_DWORDS 0x10000000L +#define HDCR_SMS_32_DWORDS 0x20000000L +#define HDCR_SMS_64_DWORDS 0x30000000L +#define HDCR_SMS_128_DWORDS 0x40000000L +#define HDCR_SMS_256_DWORDS 0x50000000L +#define HDCR_SMS_512_DWORDS 0x60000000L +#define HDCR_SMS_1024_DWORDS 0x70000000L +#define HDCR_SH 0x80000000L +#define HDCR_COUNT_SHIFT 0L /***************************************************************************** * @@ -454,28 +454,28 @@ * register. * *****************************************************************************/ -#define PFMC_C1SS_MASK 0x0000001FL -#define PFMC_C1EV 0x00000020L -#define PFMC_C1RS 0x00008000L -#define PFMC_C2SS_MASK 0x001F0000L -#define PFMC_C2EV 0x00200000L -#define PFMC_C2RS 0x80000000L -#define PFMC_C1SS_SHIFT 0L -#define PFMC_C2SS_SHIFT 16L -#define PFMC_BUS_GRANT 0L -#define PFMC_GRANT_AFTER_REQ 1L -#define PFMC_TRANSACTION 2L -#define PFMC_DWORD_TRANSFER 3L -#define PFMC_SLAVE_READ 4L -#define PFMC_SLAVE_WRITE 5L -#define PFMC_PREEMPTION 6L -#define PFMC_DISCONNECT_RETRY 7L -#define PFMC_INTERRUPT 8L -#define PFMC_BUS_OWNERSHIP 9L -#define PFMC_TRANSACTION_LAG 10L -#define PFMC_PCI_CLOCK 11L -#define PFMC_SERIAL_CLOCK 12L -#define PFMC_SP_CLOCK 13L +#define PFMC_C1SS_MASK 0x0000001FL +#define PFMC_C1EV 0x00000020L +#define PFMC_C1RS 0x00008000L +#define PFMC_C2SS_MASK 0x001F0000L +#define PFMC_C2EV 0x00200000L +#define PFMC_C2RS 0x80000000L +#define PFMC_C1SS_SHIFT 0L +#define PFMC_C2SS_SHIFT 16L +#define PFMC_BUS_GRANT 0L +#define PFMC_GRANT_AFTER_REQ 1L +#define PFMC_TRANSACTION 2L +#define PFMC_DWORD_TRANSFER 3L +#define PFMC_SLAVE_READ 4L +#define PFMC_SLAVE_WRITE 5L +#define PFMC_PREEMPTION 6L +#define PFMC_DISCONNECT_RETRY 7L +#define PFMC_INTERRUPT 8L +#define PFMC_BUS_OWNERSHIP 9L +#define PFMC_TRANSACTION_LAG 10L +#define PFMC_PCI_CLOCK 11L +#define PFMC_SERIAL_CLOCK 12L +#define PFMC_SP_CLOCK 13L /***************************************************************************** * @@ -483,8 +483,8 @@ * register. * *****************************************************************************/ -#define PFCV1_PC1V_MASK 0xFFFFFFFFL -#define PFCV1_PC1V_SHIFT 0L +#define PFCV1_PC1V_MASK 0xFFFFFFFFL +#define PFCV1_PC1V_SHIFT 0L /***************************************************************************** * @@ -492,45 +492,45 @@ * register. * *****************************************************************************/ -#define PFCV2_PC2V_MASK 0xFFFFFFFFL -#define PFCV2_PC2V_SHIFT 0L +#define PFCV2_PC2V_MASK 0xFFFFFFFFL +#define PFCV2_PC2V_SHIFT 0L /***************************************************************************** * * The following defines are for the flags in the clock control register 1. * *****************************************************************************/ -#define CLKCR1_OSCS 0x00000001L -#define CLKCR1_OSCP 0x00000002L -#define CLKCR1_PLLSS_MASK 0x0000000CL -#define CLKCR1_PLLSS_SERIAL 0x00000000L -#define CLKCR1_PLLSS_CRYSTAL 0x00000004L -#define CLKCR1_PLLSS_PCI 0x00000008L -#define CLKCR1_PLLSS_RESERVED 0x0000000CL -#define CLKCR1_PLLP 0x00000010L -#define CLKCR1_SWCE 0x00000020L -#define CLKCR1_PLLOS 0x00000040L +#define CLKCR1_OSCS 0x00000001L +#define CLKCR1_OSCP 0x00000002L +#define CLKCR1_PLLSS_MASK 0x0000000CL +#define CLKCR1_PLLSS_SERIAL 0x00000000L +#define CLKCR1_PLLSS_CRYSTAL 0x00000004L +#define CLKCR1_PLLSS_PCI 0x00000008L +#define CLKCR1_PLLSS_RESERVED 0x0000000CL +#define CLKCR1_PLLP 0x00000010L +#define CLKCR1_SWCE 0x00000020L +#define CLKCR1_PLLOS 0x00000040L /***************************************************************************** * * The following defines are for the flags in the clock control register 2. * *****************************************************************************/ -#define CLKCR2_PDIVS_MASK 0x0000000FL -#define CLKCR2_PDIVS_1 0x00000001L -#define CLKCR2_PDIVS_2 0x00000002L -#define CLKCR2_PDIVS_4 0x00000004L -#define CLKCR2_PDIVS_7 0x00000007L -#define CLKCR2_PDIVS_8 0x00000008L -#define CLKCR2_PDIVS_16 0x00000000L +#define CLKCR2_PDIVS_MASK 0x0000000FL +#define CLKCR2_PDIVS_1 0x00000001L +#define CLKCR2_PDIVS_2 0x00000002L +#define CLKCR2_PDIVS_4 0x00000004L +#define CLKCR2_PDIVS_7 0x00000007L +#define CLKCR2_PDIVS_8 0x00000008L +#define CLKCR2_PDIVS_16 0x00000000L /***************************************************************************** * * The following defines are for the flags in the PLL multiplier register. * *****************************************************************************/ -#define PLLM_MASK 0x000000FFL -#define PLLM_SHIFT 0L +#define PLLM_MASK 0x000000FFL +#define PLLM_SHIFT 0L /***************************************************************************** * @@ -538,43 +538,43 @@ * register. * *****************************************************************************/ -#define PLLCC_CDR_MASK 0x00000007L +#define PLLCC_CDR_MASK 0x00000007L #ifndef NO_CS4610 -#define PLLCC_CDR_240_350_MHZ 0x00000000L -#define PLLCC_CDR_184_265_MHZ 0x00000001L -#define PLLCC_CDR_144_205_MHZ 0x00000002L -#define PLLCC_CDR_111_160_MHZ 0x00000003L -#define PLLCC_CDR_87_123_MHZ 0x00000004L -#define PLLCC_CDR_67_96_MHZ 0x00000005L -#define PLLCC_CDR_52_74_MHZ 0x00000006L -#define PLLCC_CDR_45_58_MHZ 0x00000007L +#define PLLCC_CDR_240_350_MHZ 0x00000000L +#define PLLCC_CDR_184_265_MHZ 0x00000001L +#define PLLCC_CDR_144_205_MHZ 0x00000002L +#define PLLCC_CDR_111_160_MHZ 0x00000003L +#define PLLCC_CDR_87_123_MHZ 0x00000004L +#define PLLCC_CDR_67_96_MHZ 0x00000005L +#define PLLCC_CDR_52_74_MHZ 0x00000006L +#define PLLCC_CDR_45_58_MHZ 0x00000007L #endif #ifndef NO_CS4612 -#define PLLCC_CDR_271_398_MHZ 0x00000000L -#define PLLCC_CDR_227_330_MHZ 0x00000001L -#define PLLCC_CDR_167_239_MHZ 0x00000002L -#define PLLCC_CDR_150_215_MHZ 0x00000003L -#define PLLCC_CDR_107_154_MHZ 0x00000004L -#define PLLCC_CDR_98_140_MHZ 0x00000005L -#define PLLCC_CDR_73_104_MHZ 0x00000006L -#define PLLCC_CDR_63_90_MHZ 0x00000007L +#define PLLCC_CDR_271_398_MHZ 0x00000000L +#define PLLCC_CDR_227_330_MHZ 0x00000001L +#define PLLCC_CDR_167_239_MHZ 0x00000002L +#define PLLCC_CDR_150_215_MHZ 0x00000003L +#define PLLCC_CDR_107_154_MHZ 0x00000004L +#define PLLCC_CDR_98_140_MHZ 0x00000005L +#define PLLCC_CDR_73_104_MHZ 0x00000006L +#define PLLCC_CDR_63_90_MHZ 0x00000007L #endif -#define PLLCC_LPF_MASK 0x000000F8L +#define PLLCC_LPF_MASK 0x000000F8L #ifndef NO_CS4610 -#define PLLCC_LPF_23850_60000_KHZ 0x00000000L -#define PLLCC_LPF_7960_26290_KHZ 0x00000008L -#define PLLCC_LPF_4160_10980_KHZ 0x00000018L -#define PLLCC_LPF_1740_4580_KHZ 0x00000038L -#define PLLCC_LPF_724_1910_KHZ 0x00000078L -#define PLLCC_LPF_317_798_KHZ 0x000000F8L +#define PLLCC_LPF_23850_60000_KHZ 0x00000000L +#define PLLCC_LPF_7960_26290_KHZ 0x00000008L +#define PLLCC_LPF_4160_10980_KHZ 0x00000018L +#define PLLCC_LPF_1740_4580_KHZ 0x00000038L +#define PLLCC_LPF_724_1910_KHZ 0x00000078L +#define PLLCC_LPF_317_798_KHZ 0x000000F8L #endif #ifndef NO_CS4612 -#define PLLCC_LPF_25580_64530_KHZ 0x00000000L -#define PLLCC_LPF_14360_37270_KHZ 0x00000008L -#define PLLCC_LPF_6100_16020_KHZ 0x00000018L -#define PLLCC_LPF_2540_6690_KHZ 0x00000038L -#define PLLCC_LPF_1050_2780_KHZ 0x00000078L -#define PLLCC_LPF_450_1160_KHZ 0x000000F8L +#define PLLCC_LPF_25580_64530_KHZ 0x00000000L +#define PLLCC_LPF_14360_37270_KHZ 0x00000008L +#define PLLCC_LPF_6100_16020_KHZ 0x00000018L +#define PLLCC_LPF_2540_6690_KHZ 0x00000038L +#define PLLCC_LPF_1050_2780_KHZ 0x00000078L +#define PLLCC_LPF_450_1160_KHZ 0x000000F8L #endif /***************************************************************************** @@ -582,22 +582,22 @@ * The following defines are for the flags in the feature reporting register. * *****************************************************************************/ -#define FRR_FAB_MASK 0x00000003L -#define FRR_MASK_MASK 0x0000001CL +#define FRR_FAB_MASK 0x00000003L +#define FRR_MASK_MASK 0x0000001CL #ifdef NO_CS4612 -#define FRR_CFOP_MASK 0x000000E0L +#define FRR_CFOP_MASK 0x000000E0L #else -#define FRR_CFOP_MASK 0x00000FE0L +#define FRR_CFOP_MASK 0x00000FE0L #endif -#define FRR_CFOP_NOT_DVD 0x00000020L -#define FRR_CFOP_A3D 0x00000040L -#define FRR_CFOP_128_PIN 0x00000080L +#define FRR_CFOP_NOT_DVD 0x00000020L +#define FRR_CFOP_A3D 0x00000040L +#define FRR_CFOP_128_PIN 0x00000080L #ifndef NO_CS4612 -#define FRR_CFOP_CS4280 0x00000800L +#define FRR_CFOP_CS4280 0x00000800L #endif -#define FRR_FAB_SHIFT 0L -#define FRR_MASK_SHIFT 2L -#define FRR_CFOP_SHIFT 5L +#define FRR_FAB_SHIFT 0L +#define FRR_MASK_SHIFT 2L +#define FRR_CFOP_SHIFT 5L /***************************************************************************** * @@ -605,12 +605,12 @@ * register. * *****************************************************************************/ -#define CFL1_CLOCK_SOURCE_MASK 0x00000003L -#define CFL1_CLOCK_SOURCE_CS423X 0x00000000L -#define CFL1_CLOCK_SOURCE_AC97 0x00000001L -#define CFL1_CLOCK_SOURCE_CRYSTAL 0x00000002L -#define CFL1_CLOCK_SOURCE_DUAL_AC97 0x00000003L -#define CFL1_VALID_DATA_MASK 0x000000FFL +#define CFL1_CLOCK_SOURCE_MASK 0x00000003L +#define CFL1_CLOCK_SOURCE_CS423X 0x00000000L +#define CFL1_CLOCK_SOURCE_AC97 0x00000001L +#define CFL1_CLOCK_SOURCE_CRYSTAL 0x00000002L +#define CFL1_CLOCK_SOURCE_DUAL_AC97 0x00000003L +#define CFL1_VALID_DATA_MASK 0x000000FFL /***************************************************************************** * @@ -618,7 +618,7 @@ * register. * *****************************************************************************/ -#define CFL2_VALID_DATA_MASK 0x000000FFL +#define CFL2_VALID_DATA_MASK 0x000000FFL /***************************************************************************** * @@ -626,13 +626,13 @@ * register 1. * *****************************************************************************/ -#define SERMC1_MSPE 0x00000001L -#define SERMC1_PTC_MASK 0x0000000EL -#define SERMC1_PTC_CS423X 0x00000000L -#define SERMC1_PTC_AC97 0x00000002L -#define SERMC1_PTC_DAC 0x00000004L -#define SERMC1_PLB 0x00000010L -#define SERMC1_XLB 0x00000020L +#define SERMC1_MSPE 0x00000001L +#define SERMC1_PTC_MASK 0x0000000EL +#define SERMC1_PTC_CS423X 0x00000000L +#define SERMC1_PTC_AC97 0x00000002L +#define SERMC1_PTC_DAC 0x00000004L +#define SERMC1_PLB 0x00000010L +#define SERMC1_XLB 0x00000020L /***************************************************************************** * @@ -640,9 +640,9 @@ * register 2. * *****************************************************************************/ -#define SERMC2_LROE 0x00000001L -#define SERMC2_MCOE 0x00000002L -#define SERMC2_MCDIV 0x00000004L +#define SERMC2_LROE 0x00000001L +#define SERMC2_MCOE 0x00000002L +#define SERMC2_MCDIV 0x00000004L /***************************************************************************** * @@ -650,12 +650,12 @@ * register. * *****************************************************************************/ -#define SERC1_SO1EN 0x00000001L -#define SERC1_SO1F_MASK 0x0000000EL -#define SERC1_SO1F_CS423X 0x00000000L -#define SERC1_SO1F_AC97 0x00000002L -#define SERC1_SO1F_DAC 0x00000004L -#define SERC1_SO1F_SPDIF 0x00000006L +#define SERC1_SO1EN 0x00000001L +#define SERC1_SO1F_MASK 0x0000000EL +#define SERC1_SO1F_CS423X 0x00000000L +#define SERC1_SO1F_AC97 0x00000002L +#define SERC1_SO1F_DAC 0x00000004L +#define SERC1_SO1F_SPDIF 0x00000006L /***************************************************************************** * @@ -663,12 +663,12 @@ * register. * *****************************************************************************/ -#define SERC2_SI1EN 0x00000001L -#define SERC2_SI1F_MASK 0x0000000EL -#define SERC2_SI1F_CS423X 0x00000000L -#define SERC2_SI1F_AC97 0x00000002L -#define SERC2_SI1F_ADC 0x00000004L -#define SERC2_SI1F_SPDIF 0x00000006L +#define SERC2_SI1EN 0x00000001L +#define SERC2_SI1F_MASK 0x0000000EL +#define SERC2_SI1F_CS423X 0x00000000L +#define SERC2_SI1F_AC97 0x00000002L +#define SERC2_SI1F_ADC 0x00000004L +#define SERC2_SI1F_SPDIF 0x00000006L /***************************************************************************** * @@ -676,10 +676,10 @@ * register. * *****************************************************************************/ -#define SERC3_SO2EN 0x00000001L -#define SERC3_SO2F_MASK 0x00000006L -#define SERC3_SO2F_DAC 0x00000000L -#define SERC3_SO2F_SPDIF 0x00000002L +#define SERC3_SO2EN 0x00000001L +#define SERC3_SO2F_MASK 0x00000006L +#define SERC3_SO2F_DAC 0x00000000L +#define SERC3_SO2F_SPDIF 0x00000002L /***************************************************************************** * @@ -687,10 +687,10 @@ * register. * *****************************************************************************/ -#define SERC4_SO3EN 0x00000001L -#define SERC4_SO3F_MASK 0x00000006L -#define SERC4_SO3F_DAC 0x00000000L -#define SERC4_SO3F_SPDIF 0x00000002L +#define SERC4_SO3EN 0x00000001L +#define SERC4_SO3F_MASK 0x00000006L +#define SERC4_SO3F_DAC 0x00000000L +#define SERC4_SO3F_SPDIF 0x00000002L /***************************************************************************** * @@ -698,10 +698,10 @@ * register. * *****************************************************************************/ -#define SERC5_SI2EN 0x00000001L -#define SERC5_SI2F_MASK 0x00000006L -#define SERC5_SI2F_ADC 0x00000000L -#define SERC5_SI2F_SPDIF 0x00000002L +#define SERC5_SI2EN 0x00000001L +#define SERC5_SI2F_MASK 0x00000006L +#define SERC5_SI2F_ADC 0x00000000L +#define SERC5_SI2F_SPDIF 0x00000002L /***************************************************************************** * @@ -709,8 +709,8 @@ * pointer register. * *****************************************************************************/ -#define SERBSP_FSP_MASK 0x0000000FL -#define SERBSP_FSP_SHIFT 0L +#define SERBSP_FSP_MASK 0x0000000FL +#define SERBSP_FSP_SHIFT 0L /***************************************************************************** * @@ -718,8 +718,8 @@ * register. * *****************************************************************************/ -#define SERBST_RRDY 0x00000001L -#define SERBST_WBSY 0x00000002L +#define SERBST_RRDY 0x00000001L +#define SERBST_WBSY 0x00000002L /***************************************************************************** * @@ -727,8 +727,8 @@ * register. * *****************************************************************************/ -#define SERBCM_RDC 0x00000001L -#define SERBCM_WRC 0x00000002L +#define SERBCM_RDC 0x00000001L +#define SERBCM_WRC 0x00000002L /***************************************************************************** * @@ -737,11 +737,11 @@ * *****************************************************************************/ #ifdef NO_CS4612 -#define SERBAD_FAD_MASK 0x000000FFL +#define SERBAD_FAD_MASK 0x000000FFL #else -#define SERBAD_FAD_MASK 0x000001FFL +#define SERBAD_FAD_MASK 0x000001FFL #endif -#define SERBAD_FAD_SHIFT 0L +#define SERBAD_FAD_SHIFT 0L /***************************************************************************** * @@ -749,7 +749,7 @@ * configuration register. * *****************************************************************************/ -#define SERBCF_HBP 0x00000001L +#define SERBCF_HBP 0x00000001L /***************************************************************************** * @@ -757,8 +757,8 @@ * port register. * *****************************************************************************/ -#define SERBWP_FWD_MASK 0x000FFFFFL -#define SERBWP_FWD_SHIFT 0L +#define SERBWP_FWD_MASK 0x000FFFFFL +#define SERBWP_FWD_SHIFT 0L /***************************************************************************** * @@ -766,8 +766,8 @@ * port register. * *****************************************************************************/ -#define SERBRP_FRD_MASK 0x000FFFFFL -#define SERBRP_FRD_SHIFT 0L +#define SERBRP_FRD_MASK 0x000FFFFFL +#define SERBRP_FRD_SHIFT 0L /***************************************************************************** * @@ -775,12 +775,12 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define ASER_FADDR_A1_MASK 0x000001FFL -#define ASER_FADDR_EN1 0x00008000L -#define ASER_FADDR_A2_MASK 0x01FF0000L -#define ASER_FADDR_EN2 0x80000000L -#define ASER_FADDR_A1_SHIFT 0L -#define ASER_FADDR_A2_SHIFT 16L +#define ASER_FADDR_A1_MASK 0x000001FFL +#define ASER_FADDR_EN1 0x00008000L +#define ASER_FADDR_A2_MASK 0x01FF0000L +#define ASER_FADDR_EN2 0x80000000L +#define ASER_FADDR_A1_SHIFT 0L +#define ASER_FADDR_A2_SHIFT 16L #endif /***************************************************************************** @@ -788,14 +788,14 @@ * The following defines are for the flags in the AC97 control register. * *****************************************************************************/ -#define ACCTL_RSTN 0x00000001L -#define ACCTL_ESYN 0x00000002L -#define ACCTL_VFRM 0x00000004L -#define ACCTL_DCV 0x00000008L -#define ACCTL_CRW 0x00000010L -#define ACCTL_ASYN 0x00000020L +#define ACCTL_RSTN 0x00000001L +#define ACCTL_ESYN 0x00000002L +#define ACCTL_VFRM 0x00000004L +#define ACCTL_DCV 0x00000008L +#define ACCTL_CRW 0x00000010L +#define ACCTL_ASYN 0x00000020L #ifndef NO_CS4612 -#define ACCTL_TC 0x00000040L +#define ACCTL_TC 0x00000040L #endif /***************************************************************************** @@ -803,10 +803,10 @@ * The following defines are for the flags in the AC97 status register. * *****************************************************************************/ -#define ACSTS_CRDY 0x00000001L -#define ACSTS_VSTS 0x00000002L +#define ACSTS_CRDY 0x00000001L +#define ACSTS_VSTS 0x00000002L #ifndef NO_CS4612 -#define ACSTS_WKUP 0x00000004L +#define ACSTS_WKUP 0x00000004L #endif /***************************************************************************** @@ -815,16 +815,16 @@ * register. * *****************************************************************************/ -#define ACOSV_SLV3 0x00000001L -#define ACOSV_SLV4 0x00000002L -#define ACOSV_SLV5 0x00000004L -#define ACOSV_SLV6 0x00000008L -#define ACOSV_SLV7 0x00000010L -#define ACOSV_SLV8 0x00000020L -#define ACOSV_SLV9 0x00000040L -#define ACOSV_SLV10 0x00000080L -#define ACOSV_SLV11 0x00000100L -#define ACOSV_SLV12 0x00000200L +#define ACOSV_SLV3 0x00000001L +#define ACOSV_SLV4 0x00000002L +#define ACOSV_SLV5 0x00000004L +#define ACOSV_SLV6 0x00000008L +#define ACOSV_SLV7 0x00000010L +#define ACOSV_SLV8 0x00000020L +#define ACOSV_SLV9 0x00000040L +#define ACOSV_SLV10 0x00000080L +#define ACOSV_SLV11 0x00000100L +#define ACOSV_SLV12 0x00000200L /***************************************************************************** * @@ -832,16 +832,16 @@ * register. * *****************************************************************************/ -#define ACCAD_CI_MASK 0x0000007FL -#define ACCAD_CI_SHIFT 0L +#define ACCAD_CI_MASK 0x0000007FL +#define ACCAD_CI_SHIFT 0L /***************************************************************************** * * The following defines are for the flags in the AC97 command data register. * *****************************************************************************/ -#define ACCDA_CD_MASK 0x0000FFFFL -#define ACCDA_CD_SHIFT 0L +#define ACCDA_CD_MASK 0x0000FFFFL +#define ACCDA_CD_SHIFT 0L /***************************************************************************** * @@ -849,16 +849,16 @@ * register. * *****************************************************************************/ -#define ACISV_ISV3 0x00000001L -#define ACISV_ISV4 0x00000002L -#define ACISV_ISV5 0x00000004L -#define ACISV_ISV6 0x00000008L -#define ACISV_ISV7 0x00000010L -#define ACISV_ISV8 0x00000020L -#define ACISV_ISV9 0x00000040L -#define ACISV_ISV10 0x00000080L -#define ACISV_ISV11 0x00000100L -#define ACISV_ISV12 0x00000200L +#define ACISV_ISV3 0x00000001L +#define ACISV_ISV4 0x00000002L +#define ACISV_ISV5 0x00000004L +#define ACISV_ISV6 0x00000008L +#define ACISV_ISV7 0x00000010L +#define ACISV_ISV8 0x00000020L +#define ACISV_ISV9 0x00000040L +#define ACISV_ISV10 0x00000080L +#define ACISV_ISV11 0x00000100L +#define ACISV_ISV12 0x00000200L /***************************************************************************** * @@ -866,16 +866,16 @@ * register. * *****************************************************************************/ -#define ACSAD_SI_MASK 0x0000007FL -#define ACSAD_SI_SHIFT 0L +#define ACSAD_SI_MASK 0x0000007FL +#define ACSAD_SI_SHIFT 0L /***************************************************************************** * * The following defines are for the flags in the AC97 status data register. * *****************************************************************************/ -#define ACSDA_SD_MASK 0x0000FFFFL -#define ACSDA_SD_SHIFT 0L +#define ACSDA_SD_MASK 0x0000FFFFL +#define ACSDA_SD_SHIFT 0L /***************************************************************************** * @@ -883,26 +883,26 @@ * register. * *****************************************************************************/ -#define JSPT_CAX 0x00000001L -#define JSPT_CAY 0x00000002L -#define JSPT_CBX 0x00000004L -#define JSPT_CBY 0x00000008L -#define JSPT_BA1 0x00000010L -#define JSPT_BA2 0x00000020L -#define JSPT_BB1 0x00000040L -#define JSPT_BB2 0x00000080L +#define JSPT_CAX 0x00000001L +#define JSPT_CAY 0x00000002L +#define JSPT_CBX 0x00000004L +#define JSPT_CBY 0x00000008L +#define JSPT_BA1 0x00000010L +#define JSPT_BA2 0x00000020L +#define JSPT_BB1 0x00000040L +#define JSPT_BB2 0x00000080L /***************************************************************************** * * The following defines are for the flags in the joystick control register. * *****************************************************************************/ -#define JSCTL_SP_MASK 0x00000003L -#define JSCTL_SP_SLOW 0x00000000L -#define JSCTL_SP_MEDIUM_SLOW 0x00000001L -#define JSCTL_SP_MEDIUM_FAST 0x00000002L -#define JSCTL_SP_FAST 0x00000003L -#define JSCTL_ARE 0x00000004L +#define JSCTL_SP_MASK 0x00000003L +#define JSCTL_SP_SLOW 0x00000000L +#define JSCTL_SP_MEDIUM_SLOW 0x00000001L +#define JSCTL_SP_MEDIUM_FAST 0x00000002L +#define JSCTL_SP_FAST 0x00000003L +#define JSCTL_ARE 0x00000004L /***************************************************************************** * @@ -910,10 +910,10 @@ * readback register. * *****************************************************************************/ -#define JSC1_Y1V_MASK 0x0000FFFFL -#define JSC1_X1V_MASK 0xFFFF0000L -#define JSC1_Y1V_SHIFT 0L -#define JSC1_X1V_SHIFT 16L +#define JSC1_Y1V_MASK 0x0000FFFFL +#define JSC1_X1V_MASK 0xFFFF0000L +#define JSC1_Y1V_SHIFT 0L +#define JSC1_X1V_SHIFT 16L /***************************************************************************** * @@ -921,60 +921,60 @@ * readback register. * *****************************************************************************/ -#define JSC2_Y2V_MASK 0x0000FFFFL -#define JSC2_X2V_MASK 0xFFFF0000L -#define JSC2_Y2V_SHIFT 0L -#define JSC2_X2V_SHIFT 16L +#define JSC2_Y2V_MASK 0x0000FFFFL +#define JSC2_X2V_MASK 0xFFFF0000L +#define JSC2_Y2V_SHIFT 0L +#define JSC2_X2V_SHIFT 16L /***************************************************************************** * * The following defines are for the flags in the MIDI control register. * *****************************************************************************/ -#define MIDCR_TXE 0x00000001L -#define MIDCR_RXE 0x00000002L -#define MIDCR_RIE 0x00000004L -#define MIDCR_TIE 0x00000008L -#define MIDCR_MLB 0x00000010L -#define MIDCR_MRST 0x00000020L +#define MIDCR_TXE 0x00000001L +#define MIDCR_RXE 0x00000002L +#define MIDCR_RIE 0x00000004L +#define MIDCR_TIE 0x00000008L +#define MIDCR_MLB 0x00000010L +#define MIDCR_MRST 0x00000020L /***************************************************************************** * * The following defines are for the flags in the MIDI status register. * *****************************************************************************/ -#define MIDSR_TBF 0x00000001L -#define MIDSR_RBE 0x00000002L +#define MIDSR_TBF 0x00000001L +#define MIDSR_RBE 0x00000002L /***************************************************************************** * * The following defines are for the flags in the MIDI write port register. * *****************************************************************************/ -#define MIDWP_MWD_MASK 0x000000FFL -#define MIDWP_MWD_SHIFT 0L +#define MIDWP_MWD_MASK 0x000000FFL +#define MIDWP_MWD_SHIFT 0L /***************************************************************************** * * The following defines are for the flags in the MIDI read port register. * *****************************************************************************/ -#define MIDRP_MRD_MASK 0x000000FFL -#define MIDRP_MRD_SHIFT 0L +#define MIDRP_MRD_MASK 0x000000FFL +#define MIDRP_MRD_SHIFT 0L /***************************************************************************** * * The following defines are for the flags in the joystick GPIO register. * *****************************************************************************/ -#define JSIO_DAX 0x00000001L -#define JSIO_DAY 0x00000002L -#define JSIO_DBX 0x00000004L -#define JSIO_DBY 0x00000008L -#define JSIO_AXOE 0x00000010L -#define JSIO_AYOE 0x00000020L -#define JSIO_BXOE 0x00000040L -#define JSIO_BYOE 0x00000080L +#define JSIO_DAX 0x00000001L +#define JSIO_DAY 0x00000002L +#define JSIO_DBX 0x00000004L +#define JSIO_DBY 0x00000008L +#define JSIO_AXOE 0x00000010L +#define JSIO_AYOE 0x00000020L +#define JSIO_BXOE 0x00000040L +#define JSIO_BYOE 0x00000080L /***************************************************************************** * @@ -983,7 +983,7 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define ASER_MASTER_ME 0x00000001L +#define ASER_MASTER_ME 0x00000001L #endif /***************************************************************************** @@ -992,10 +992,10 @@ * register. * *****************************************************************************/ -#define CFGI_CLK 0x00000001L -#define CFGI_DOUT 0x00000002L -#define CFGI_DIN_EEN 0x00000004L -#define CFGI_EELD 0x00000008L +#define CFGI_CLK 0x00000001L +#define CFGI_DOUT 0x00000002L +#define CFGI_DIN_EEN 0x00000004L +#define CFGI_EELD 0x00000008L /***************************************************************************** * @@ -1003,20 +1003,20 @@ * register. * *****************************************************************************/ -#define SSVID_VID_MASK 0x0000FFFFL -#define SSVID_SID_MASK 0xFFFF0000L -#define SSVID_VID_SHIFT 0L -#define SSVID_SID_SHIFT 16L +#define SSVID_VID_MASK 0x0000FFFFL +#define SSVID_SID_MASK 0xFFFF0000L +#define SSVID_VID_SHIFT 0L +#define SSVID_SID_SHIFT 16L /***************************************************************************** * * The following defines are for the flags in the GPIO pin interface register. * *****************************************************************************/ -#define GPIOR_VOLDN 0x00000001L -#define GPIOR_VOLUP 0x00000002L -#define GPIOR_SI2D 0x00000004L -#define GPIOR_SI2OE 0x00000008L +#define GPIOR_VOLDN 0x00000001L +#define GPIOR_VOLUP 0x00000002L +#define GPIOR_SI2D 0x00000004L +#define GPIOR_SI2OE 0x00000008L /***************************************************************************** * @@ -1025,15 +1025,15 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define EGPIODR_GPOE0 0x00000001L -#define EGPIODR_GPOE1 0x00000002L -#define EGPIODR_GPOE2 0x00000004L -#define EGPIODR_GPOE3 0x00000008L -#define EGPIODR_GPOE4 0x00000010L -#define EGPIODR_GPOE5 0x00000020L -#define EGPIODR_GPOE6 0x00000040L -#define EGPIODR_GPOE7 0x00000080L -#define EGPIODR_GPOE8 0x00000100L +#define EGPIODR_GPOE0 0x00000001L +#define EGPIODR_GPOE1 0x00000002L +#define EGPIODR_GPOE2 0x00000004L +#define EGPIODR_GPOE3 0x00000008L +#define EGPIODR_GPOE4 0x00000010L +#define EGPIODR_GPOE5 0x00000020L +#define EGPIODR_GPOE6 0x00000040L +#define EGPIODR_GPOE7 0x00000080L +#define EGPIODR_GPOE8 0x00000100L #endif /***************************************************************************** @@ -1043,15 +1043,15 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define EGPIOPTR_GPPT0 0x00000001L -#define EGPIOPTR_GPPT1 0x00000002L -#define EGPIOPTR_GPPT2 0x00000004L -#define EGPIOPTR_GPPT3 0x00000008L -#define EGPIOPTR_GPPT4 0x00000010L -#define EGPIOPTR_GPPT5 0x00000020L -#define EGPIOPTR_GPPT6 0x00000040L -#define EGPIOPTR_GPPT7 0x00000080L -#define EGPIOPTR_GPPT8 0x00000100L +#define EGPIOPTR_GPPT0 0x00000001L +#define EGPIOPTR_GPPT1 0x00000002L +#define EGPIOPTR_GPPT2 0x00000004L +#define EGPIOPTR_GPPT3 0x00000008L +#define EGPIOPTR_GPPT4 0x00000010L +#define EGPIOPTR_GPPT5 0x00000020L +#define EGPIOPTR_GPPT6 0x00000040L +#define EGPIOPTR_GPPT7 0x00000080L +#define EGPIOPTR_GPPT8 0x00000100L #endif /***************************************************************************** @@ -1061,15 +1061,15 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define EGPIOTR_GPS0 0x00000001L -#define EGPIOTR_GPS1 0x00000002L -#define EGPIOTR_GPS2 0x00000004L -#define EGPIOTR_GPS3 0x00000008L -#define EGPIOTR_GPS4 0x00000010L -#define EGPIOTR_GPS5 0x00000020L -#define EGPIOTR_GPS6 0x00000040L -#define EGPIOTR_GPS7 0x00000080L -#define EGPIOTR_GPS8 0x00000100L +#define EGPIOTR_GPS0 0x00000001L +#define EGPIOTR_GPS1 0x00000002L +#define EGPIOTR_GPS2 0x00000004L +#define EGPIOTR_GPS3 0x00000008L +#define EGPIOTR_GPS4 0x00000010L +#define EGPIOTR_GPS5 0x00000020L +#define EGPIOTR_GPS6 0x00000040L +#define EGPIOTR_GPS7 0x00000080L +#define EGPIOTR_GPS8 0x00000100L #endif /***************************************************************************** @@ -1079,15 +1079,15 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define EGPIOWR_GPW0 0x00000001L -#define EGPIOWR_GPW1 0x00000002L -#define EGPIOWR_GPW2 0x00000004L -#define EGPIOWR_GPW3 0x00000008L -#define EGPIOWR_GPW4 0x00000010L -#define EGPIOWR_GPW5 0x00000020L -#define EGPIOWR_GPW6 0x00000040L -#define EGPIOWR_GPW7 0x00000080L -#define EGPIOWR_GPW8 0x00000100L +#define EGPIOWR_GPW0 0x00000001L +#define EGPIOWR_GPW1 0x00000002L +#define EGPIOWR_GPW2 0x00000004L +#define EGPIOWR_GPW3 0x00000008L +#define EGPIOWR_GPW4 0x00000010L +#define EGPIOWR_GPW5 0x00000020L +#define EGPIOWR_GPW6 0x00000040L +#define EGPIOWR_GPW7 0x00000080L +#define EGPIOWR_GPW8 0x00000100L #endif /***************************************************************************** @@ -1097,15 +1097,15 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define EGPIOSR_GPS0 0x00000001L -#define EGPIOSR_GPS1 0x00000002L -#define EGPIOSR_GPS2 0x00000004L -#define EGPIOSR_GPS3 0x00000008L -#define EGPIOSR_GPS4 0x00000010L -#define EGPIOSR_GPS5 0x00000020L -#define EGPIOSR_GPS6 0x00000040L -#define EGPIOSR_GPS7 0x00000080L -#define EGPIOSR_GPS8 0x00000100L +#define EGPIOSR_GPS0 0x00000001L +#define EGPIOSR_GPS1 0x00000002L +#define EGPIOSR_GPS2 0x00000004L +#define EGPIOSR_GPS3 0x00000008L +#define EGPIOSR_GPS4 0x00000010L +#define EGPIOSR_GPS5 0x00000020L +#define EGPIOSR_GPS6 0x00000040L +#define EGPIOSR_GPS7 0x00000080L +#define EGPIOSR_GPS8 0x00000100L #endif /***************************************************************************** @@ -1115,7 +1115,7 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define SERC6_ASDO2EN 0x00000001L +#define SERC6_ASDO2EN 0x00000001L #endif /***************************************************************************** @@ -1125,11 +1125,11 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define SERC7_ASDI2EN 0x00000001L -#define SERC7_POSILB 0x00000002L -#define SERC7_SIPOLB 0x00000004L -#define SERC7_SOSILB 0x00000008L -#define SERC7_SISOLB 0x00000010L +#define SERC7_ASDI2EN 0x00000001L +#define SERC7_POSILB 0x00000002L +#define SERC7_SIPOLB 0x00000004L +#define SERC7_SOSILB 0x00000008L +#define SERC7_SISOLB 0x00000010L #endif /***************************************************************************** @@ -1139,12 +1139,12 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define SERACC_CODEC_TYPE_MASK 0x00000001L -#define SERACC_CODEC_TYPE_1_03 0x00000000L -#define SERACC_CODEC_TYPE_2_0 0x00000001L -#define SERACC_TWO_CODECS 0x00000002L -#define SERACC_MDM 0x00000004L -#define SERACC_HSP 0x00000008L +#define SERACC_CODEC_TYPE_MASK 0x00000001L +#define SERACC_CODEC_TYPE_1_03 0x00000000L +#define SERACC_CODEC_TYPE_2_0 0x00000001L +#define SERACC_TWO_CODECS 0x00000002L +#define SERACC_MDM 0x00000004L +#define SERACC_HSP 0x00000008L #endif /***************************************************************************** @@ -1153,12 +1153,12 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define ACCTL2_RSTN 0x00000001L -#define ACCTL2_ESYN 0x00000002L -#define ACCTL2_VFRM 0x00000004L -#define ACCTL2_DCV 0x00000008L -#define ACCTL2_CRW 0x00000010L -#define ACCTL2_ASYN 0x00000020L +#define ACCTL2_RSTN 0x00000001L +#define ACCTL2_ESYN 0x00000002L +#define ACCTL2_VFRM 0x00000004L +#define ACCTL2_DCV 0x00000008L +#define ACCTL2_CRW 0x00000010L +#define ACCTL2_ASYN 0x00000020L #endif /***************************************************************************** @@ -1167,8 +1167,8 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define ACSTS2_CRDY 0x00000001L -#define ACSTS2_VSTS 0x00000002L +#define ACSTS2_CRDY 0x00000001L +#define ACSTS2_VSTS 0x00000002L #endif /***************************************************************************** @@ -1178,16 +1178,16 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define ACOSV2_SLV3 0x00000001L -#define ACOSV2_SLV4 0x00000002L -#define ACOSV2_SLV5 0x00000004L -#define ACOSV2_SLV6 0x00000008L -#define ACOSV2_SLV7 0x00000010L -#define ACOSV2_SLV8 0x00000020L -#define ACOSV2_SLV9 0x00000040L -#define ACOSV2_SLV10 0x00000080L -#define ACOSV2_SLV11 0x00000100L -#define ACOSV2_SLV12 0x00000200L +#define ACOSV2_SLV3 0x00000001L +#define ACOSV2_SLV4 0x00000002L +#define ACOSV2_SLV5 0x00000004L +#define ACOSV2_SLV6 0x00000008L +#define ACOSV2_SLV7 0x00000010L +#define ACOSV2_SLV8 0x00000020L +#define ACOSV2_SLV9 0x00000040L +#define ACOSV2_SLV10 0x00000080L +#define ACOSV2_SLV11 0x00000100L +#define ACOSV2_SLV12 0x00000200L #endif /***************************************************************************** @@ -1197,8 +1197,8 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define ACCAD2_CI_MASK 0x0000007FL -#define ACCAD2_CI_SHIFT 0L +#define ACCAD2_CI_MASK 0x0000007FL +#define ACCAD2_CI_SHIFT 0L #endif /***************************************************************************** @@ -1208,8 +1208,8 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define ACCDA2_CD_MASK 0x0000FFFFL -#define ACCDA2_CD_SHIFT 0L +#define ACCDA2_CD_MASK 0x0000FFFFL +#define ACCDA2_CD_SHIFT 0L #endif /***************************************************************************** @@ -1219,16 +1219,16 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define ACISV2_ISV3 0x00000001L -#define ACISV2_ISV4 0x00000002L -#define ACISV2_ISV5 0x00000004L -#define ACISV2_ISV6 0x00000008L -#define ACISV2_ISV7 0x00000010L -#define ACISV2_ISV8 0x00000020L -#define ACISV2_ISV9 0x00000040L -#define ACISV2_ISV10 0x00000080L -#define ACISV2_ISV11 0x00000100L -#define ACISV2_ISV12 0x00000200L +#define ACISV2_ISV3 0x00000001L +#define ACISV2_ISV4 0x00000002L +#define ACISV2_ISV5 0x00000004L +#define ACISV2_ISV6 0x00000008L +#define ACISV2_ISV7 0x00000010L +#define ACISV2_ISV8 0x00000020L +#define ACISV2_ISV9 0x00000040L +#define ACISV2_ISV10 0x00000080L +#define ACISV2_ISV11 0x00000100L +#define ACISV2_ISV12 0x00000200L #endif /***************************************************************************** @@ -1238,8 +1238,8 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define ACSAD2_SI_MASK 0x0000007FL -#define ACSAD2_SI_SHIFT 0L +#define ACSAD2_SI_MASK 0x0000007FL +#define ACSAD2_SI_SHIFT 0L #endif /***************************************************************************** @@ -1248,8 +1248,8 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define ACSDA2_SD_MASK 0x0000FFFFL -#define ACSDA2_SD_SHIFT 0L +#define ACSDA2_SD_MASK 0x0000FFFFL +#define ACSDA2_SD_SHIFT 0L #endif /***************************************************************************** @@ -1259,19 +1259,19 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define IOTAC_SA_MASK 0x0000FFFFL -#define IOTAC_MSK_MASK 0x000F0000L -#define IOTAC_IODC_MASK 0x06000000L -#define IOTAC_IODC_16_BIT 0x00000000L -#define IOTAC_IODC_10_BIT 0x02000000L -#define IOTAC_IODC_12_BIT 0x04000000L -#define IOTAC_WSPI 0x08000000L -#define IOTAC_RSPI 0x10000000L -#define IOTAC_WSE 0x20000000L -#define IOTAC_WE 0x40000000L -#define IOTAC_RE 0x80000000L -#define IOTAC_SA_SHIFT 0L -#define IOTAC_MSK_SHIFT 16L +#define IOTAC_SA_MASK 0x0000FFFFL +#define IOTAC_MSK_MASK 0x000F0000L +#define IOTAC_IODC_MASK 0x06000000L +#define IOTAC_IODC_16_BIT 0x00000000L +#define IOTAC_IODC_10_BIT 0x02000000L +#define IOTAC_IODC_12_BIT 0x04000000L +#define IOTAC_WSPI 0x08000000L +#define IOTAC_RSPI 0x10000000L +#define IOTAC_WSE 0x20000000L +#define IOTAC_WE 0x40000000L +#define IOTAC_RE 0x80000000L +#define IOTAC_SA_SHIFT 0L +#define IOTAC_MSK_SHIFT 16L #endif /***************************************************************************** @@ -1281,14 +1281,14 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define IOTFR_D_MASK 0x0000FFFFL -#define IOTFR_A_MASK 0x000F0000L -#define IOTFR_R_MASK 0x0F000000L -#define IOTFR_ALL 0x40000000L -#define IOTFR_VL 0x80000000L -#define IOTFR_D_SHIFT 0L -#define IOTFR_A_SHIFT 16L -#define IOTFR_R_SHIFT 24L +#define IOTFR_D_MASK 0x0000FFFFL +#define IOTFR_A_MASK 0x000F0000L +#define IOTFR_R_MASK 0x0F000000L +#define IOTFR_ALL 0x40000000L +#define IOTFR_VL 0x80000000L +#define IOTFR_D_SHIFT 0L +#define IOTFR_A_SHIFT 16L +#define IOTFR_R_SHIFT 24L #endif /***************************************************************************** @@ -1297,12 +1297,12 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define IOTFIFO_BA_MASK 0x00003FFFL -#define IOTFIFO_S_MASK 0x00FF0000L -#define IOTFIFO_OF 0x40000000L -#define IOTFIFO_SPIOF 0x80000000L -#define IOTFIFO_BA_SHIFT 0L -#define IOTFIFO_S_SHIFT 16L +#define IOTFIFO_BA_MASK 0x00003FFFL +#define IOTFIFO_S_MASK 0x00FF0000L +#define IOTFIFO_OF 0x40000000L +#define IOTFIFO_SPIOF 0x80000000L +#define IOTFIFO_BA_SHIFT 0L +#define IOTFIFO_S_SHIFT 16L #endif /***************************************************************************** @@ -1312,9 +1312,9 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define IOTRRD_D_MASK 0x0000FFFFL -#define IOTRRD_RDV 0x80000000L -#define IOTRRD_D_SHIFT 0L +#define IOTRRD_D_MASK 0x0000FFFFL +#define IOTRRD_RDV 0x80000000L +#define IOTRRD_D_SHIFT 0L #endif /***************************************************************************** @@ -1324,10 +1324,10 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define IOTFP_CA_MASK 0x00003FFFL -#define IOTFP_PA_MASK 0x3FFF0000L -#define IOTFP_CA_SHIFT 0L -#define IOTFP_PA_SHIFT 16L +#define IOTFP_CA_MASK 0x00003FFFL +#define IOTFP_PA_MASK 0x3FFF0000L +#define IOTFP_CA_SHIFT 0L +#define IOTFP_PA_SHIFT 16L #endif /***************************************************************************** @@ -1336,14 +1336,14 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define IOTCR_ITD 0x00000001L -#define IOTCR_HRV 0x00000002L -#define IOTCR_SRV 0x00000004L -#define IOTCR_DTI 0x00000008L -#define IOTCR_DFI 0x00000010L -#define IOTCR_DDP 0x00000020L -#define IOTCR_JTE 0x00000040L -#define IOTCR_PPE 0x00000080L +#define IOTCR_ITD 0x00000001L +#define IOTCR_HRV 0x00000002L +#define IOTCR_SRV 0x00000004L +#define IOTCR_DTI 0x00000008L +#define IOTCR_DFI 0x00000010L +#define IOTCR_DDP 0x00000020L +#define IOTCR_JTE 0x00000040L +#define IOTCR_PPE 0x00000080L #endif /***************************************************************************** @@ -1352,8 +1352,8 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define DPCID_D_MASK 0xFFFFFFFFL -#define DPCID_D_SHIFT 0L +#define DPCID_D_MASK 0xFFFFFFFFL +#define DPCID_D_SHIFT 0L #endif /***************************************************************************** @@ -1362,8 +1362,8 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define DPCIA_A_MASK 0xFFFFFFFFL -#define DPCIA_A_SHIFT 0L +#define DPCIA_A_MASK 0xFFFFFFFFL +#define DPCIA_A_SHIFT 0L #endif /***************************************************************************** @@ -1372,10 +1372,10 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define DPCIC_C_MASK 0x0000000FL -#define DPCIC_C_IOREAD 0x00000002L -#define DPCIC_C_IOWRITE 0x00000003L -#define DPCIC_BE_MASK 0x000000F0L +#define DPCIC_C_MASK 0x0000000FL +#define DPCIC_C_IOREAD 0x00000002L +#define DPCIC_C_IOWRITE 0x00000003L +#define DPCIC_BE_MASK 0x000000F0L #endif /***************************************************************************** @@ -1384,11 +1384,11 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define PCPCIR_RDC_MASK 0x00000007L -#define PCPCIR_C_MASK 0x00007000L -#define PCPCIR_REQ 0x00008000L -#define PCPCIR_RDC_SHIFT 0L -#define PCPCIR_C_SHIFT 12L +#define PCPCIR_RDC_MASK 0x00000007L +#define PCPCIR_C_MASK 0x00007000L +#define PCPCIR_REQ 0x00008000L +#define PCPCIR_RDC_SHIFT 0L +#define PCPCIR_C_SHIFT 12L #endif /***************************************************************************** @@ -1397,9 +1397,9 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define PCPCIG_GDC_MASK 0x00000007L -#define PCPCIG_VL 0x00008000L -#define PCPCIG_GDC_SHIFT 0L +#define PCPCIG_GDC_MASK 0x00000007L +#define PCPCIG_VL 0x00008000L +#define PCPCIG_GDC_SHIFT 0L #endif /***************************************************************************** @@ -1409,7 +1409,7 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define PCPCIEN_EN 0x00000001L +#define PCPCIEN_EN 0x00000001L #endif /***************************************************************************** @@ -1419,8 +1419,8 @@ * *****************************************************************************/ #ifndef NO_CS4612 -#define EPCIPMC_GWU 0x00000001L -#define EPCIPMC_FSPC 0x00000002L +#define EPCIPMC_GWU 0x00000001L +#define EPCIPMC_FSPC 0x00000002L #endif /***************************************************************************** @@ -1428,17 +1428,17 @@ * The following defines are for the flags in the SP control register. * *****************************************************************************/ -#define SPCR_RUN 0x00000001L -#define SPCR_STPFR 0x00000002L -#define SPCR_RUNFR 0x00000004L -#define SPCR_TICK 0x00000008L -#define SPCR_DRQEN 0x00000020L -#define SPCR_RSTSP 0x00000040L -#define SPCR_OREN 0x00000080L +#define SPCR_RUN 0x00000001L +#define SPCR_STPFR 0x00000002L +#define SPCR_RUNFR 0x00000004L +#define SPCR_TICK 0x00000008L +#define SPCR_DRQEN 0x00000020L +#define SPCR_RSTSP 0x00000040L +#define SPCR_OREN 0x00000080L #ifndef NO_CS4612 -#define SPCR_PCIINT 0x00000100L -#define SPCR_OINTD 0x00000200L -#define SPCR_CRE 0x00008000L +#define SPCR_PCIINT 0x00000100L +#define SPCR_OINTD 0x00000200L +#define SPCR_CRE 0x00008000L #endif /***************************************************************************** @@ -1446,183 +1446,183 @@ * The following defines are for the flags in the debug index register. * *****************************************************************************/ -#define DREG_REGID_MASK 0x0000007FL -#define DREG_DEBUG 0x00000080L -#define DREG_RGBK_MASK 0x00000700L -#define DREG_TRAP 0x00000800L +#define DREG_REGID_MASK 0x0000007FL +#define DREG_DEBUG 0x00000080L +#define DREG_RGBK_MASK 0x00000700L +#define DREG_TRAP 0x00000800L #if !defined(NO_CS4612) #if !defined(NO_CS4615) -#define DREG_TRAPX 0x00001000L +#define DREG_TRAPX 0x00001000L #endif #endif -#define DREG_REGID_SHIFT 0L -#define DREG_RGBK_SHIFT 8L -#define DREG_RGBK_REGID_MASK 0x0000077FL -#define DREG_REGID_R0 0x00000010L -#define DREG_REGID_R1 0x00000011L -#define DREG_REGID_R2 0x00000012L -#define DREG_REGID_R3 0x00000013L -#define DREG_REGID_R4 0x00000014L -#define DREG_REGID_R5 0x00000015L -#define DREG_REGID_R6 0x00000016L -#define DREG_REGID_R7 0x00000017L -#define DREG_REGID_R8 0x00000018L -#define DREG_REGID_R9 0x00000019L -#define DREG_REGID_RA 0x0000001AL -#define DREG_REGID_RB 0x0000001BL -#define DREG_REGID_RC 0x0000001CL -#define DREG_REGID_RD 0x0000001DL -#define DREG_REGID_RE 0x0000001EL -#define DREG_REGID_RF 0x0000001FL -#define DREG_REGID_RA_BUS_LOW 0x00000020L -#define DREG_REGID_RA_BUS_HIGH 0x00000038L -#define DREG_REGID_YBUS_LOW 0x00000050L -#define DREG_REGID_YBUS_HIGH 0x00000058L -#define DREG_REGID_TRAP_0 0x00000100L -#define DREG_REGID_TRAP_1 0x00000101L -#define DREG_REGID_TRAP_2 0x00000102L -#define DREG_REGID_TRAP_3 0x00000103L -#define DREG_REGID_TRAP_4 0x00000104L -#define DREG_REGID_TRAP_5 0x00000105L -#define DREG_REGID_TRAP_6 0x00000106L -#define DREG_REGID_TRAP_7 0x00000107L -#define DREG_REGID_INDIRECT_ADDRESS 0x0000010EL -#define DREG_REGID_TOP_OF_STACK 0x0000010FL +#define DREG_REGID_SHIFT 0L +#define DREG_RGBK_SHIFT 8L +#define DREG_RGBK_REGID_MASK 0x0000077FL +#define DREG_REGID_R0 0x00000010L +#define DREG_REGID_R1 0x00000011L +#define DREG_REGID_R2 0x00000012L +#define DREG_REGID_R3 0x00000013L +#define DREG_REGID_R4 0x00000014L +#define DREG_REGID_R5 0x00000015L +#define DREG_REGID_R6 0x00000016L +#define DREG_REGID_R7 0x00000017L +#define DREG_REGID_R8 0x00000018L +#define DREG_REGID_R9 0x00000019L +#define DREG_REGID_RA 0x0000001AL +#define DREG_REGID_RB 0x0000001BL +#define DREG_REGID_RC 0x0000001CL +#define DREG_REGID_RD 0x0000001DL +#define DREG_REGID_RE 0x0000001EL +#define DREG_REGID_RF 0x0000001FL +#define DREG_REGID_RA_BUS_LOW 0x00000020L +#define DREG_REGID_RA_BUS_HIGH 0x00000038L +#define DREG_REGID_YBUS_LOW 0x00000050L +#define DREG_REGID_YBUS_HIGH 0x00000058L +#define DREG_REGID_TRAP_0 0x00000100L +#define DREG_REGID_TRAP_1 0x00000101L +#define DREG_REGID_TRAP_2 0x00000102L +#define DREG_REGID_TRAP_3 0x00000103L +#define DREG_REGID_TRAP_4 0x00000104L +#define DREG_REGID_TRAP_5 0x00000105L +#define DREG_REGID_TRAP_6 0x00000106L +#define DREG_REGID_TRAP_7 0x00000107L +#define DREG_REGID_INDIRECT_ADDRESS 0x0000010EL +#define DREG_REGID_TOP_OF_STACK 0x0000010FL #if !defined(NO_CS4612) #if !defined(NO_CS4615) -#define DREG_REGID_TRAP_8 0x00000110L -#define DREG_REGID_TRAP_9 0x00000111L -#define DREG_REGID_TRAP_10 0x00000112L -#define DREG_REGID_TRAP_11 0x00000113L -#define DREG_REGID_TRAP_12 0x00000114L -#define DREG_REGID_TRAP_13 0x00000115L -#define DREG_REGID_TRAP_14 0x00000116L -#define DREG_REGID_TRAP_15 0x00000117L -#define DREG_REGID_TRAP_16 0x00000118L -#define DREG_REGID_TRAP_17 0x00000119L -#define DREG_REGID_TRAP_18 0x0000011AL -#define DREG_REGID_TRAP_19 0x0000011BL -#define DREG_REGID_TRAP_20 0x0000011CL -#define DREG_REGID_TRAP_21 0x0000011DL -#define DREG_REGID_TRAP_22 0x0000011EL -#define DREG_REGID_TRAP_23 0x0000011FL +#define DREG_REGID_TRAP_8 0x00000110L +#define DREG_REGID_TRAP_9 0x00000111L +#define DREG_REGID_TRAP_10 0x00000112L +#define DREG_REGID_TRAP_11 0x00000113L +#define DREG_REGID_TRAP_12 0x00000114L +#define DREG_REGID_TRAP_13 0x00000115L +#define DREG_REGID_TRAP_14 0x00000116L +#define DREG_REGID_TRAP_15 0x00000117L +#define DREG_REGID_TRAP_16 0x00000118L +#define DREG_REGID_TRAP_17 0x00000119L +#define DREG_REGID_TRAP_18 0x0000011AL +#define DREG_REGID_TRAP_19 0x0000011BL +#define DREG_REGID_TRAP_20 0x0000011CL +#define DREG_REGID_TRAP_21 0x0000011DL +#define DREG_REGID_TRAP_22 0x0000011EL +#define DREG_REGID_TRAP_23 0x0000011FL #endif #endif -#define DREG_REGID_RSA0_LOW 0x00000200L -#define DREG_REGID_RSA0_HIGH 0x00000201L -#define DREG_REGID_RSA1_LOW 0x00000202L -#define DREG_REGID_RSA1_HIGH 0x00000203L -#define DREG_REGID_RSA2 0x00000204L -#define DREG_REGID_RSA3 0x00000205L -#define DREG_REGID_RSI0_LOW 0x00000206L -#define DREG_REGID_RSI0_HIGH 0x00000207L -#define DREG_REGID_RSI1 0x00000208L -#define DREG_REGID_RSI2 0x00000209L -#define DREG_REGID_SAGUSTATUS 0x0000020AL -#define DREG_REGID_RSCONFIG01_LOW 0x0000020BL -#define DREG_REGID_RSCONFIG01_HIGH 0x0000020CL -#define DREG_REGID_RSCONFIG23_LOW 0x0000020DL -#define DREG_REGID_RSCONFIG23_HIGH 0x0000020EL -#define DREG_REGID_RSDMA01E 0x0000020FL -#define DREG_REGID_RSDMA23E 0x00000210L -#define DREG_REGID_RSD0_LOW 0x00000211L -#define DREG_REGID_RSD0_HIGH 0x00000212L -#define DREG_REGID_RSD1_LOW 0x00000213L -#define DREG_REGID_RSD1_HIGH 0x00000214L -#define DREG_REGID_RSD2_LOW 0x00000215L -#define DREG_REGID_RSD2_HIGH 0x00000216L -#define DREG_REGID_RSD3_LOW 0x00000217L -#define DREG_REGID_RSD3_HIGH 0x00000218L -#define DREG_REGID_SRAR_HIGH 0x0000021AL -#define DREG_REGID_SRAR_LOW 0x0000021BL -#define DREG_REGID_DMA_STATE 0x0000021CL -#define DREG_REGID_CURRENT_DMA_STREAM 0x0000021DL -#define DREG_REGID_NEXT_DMA_STREAM 0x0000021EL -#define DREG_REGID_CPU_STATUS 0x00000300L -#define DREG_REGID_MAC_MODE 0x00000301L -#define DREG_REGID_STACK_AND_REPEAT 0x00000302L -#define DREG_REGID_INDEX0 0x00000304L -#define DREG_REGID_INDEX1 0x00000305L -#define DREG_REGID_DMA_STATE_0_3 0x00000400L -#define DREG_REGID_DMA_STATE_4_7 0x00000404L -#define DREG_REGID_DMA_STATE_8_11 0x00000408L -#define DREG_REGID_DMA_STATE_12_15 0x0000040CL -#define DREG_REGID_DMA_STATE_16_19 0x00000410L -#define DREG_REGID_DMA_STATE_20_23 0x00000414L -#define DREG_REGID_DMA_STATE_24_27 0x00000418L -#define DREG_REGID_DMA_STATE_28_31 0x0000041CL -#define DREG_REGID_DMA_STATE_32_35 0x00000420L -#define DREG_REGID_DMA_STATE_36_39 0x00000424L -#define DREG_REGID_DMA_STATE_40_43 0x00000428L -#define DREG_REGID_DMA_STATE_44_47 0x0000042CL -#define DREG_REGID_DMA_STATE_48_51 0x00000430L -#define DREG_REGID_DMA_STATE_52_55 0x00000434L -#define DREG_REGID_DMA_STATE_56_59 0x00000438L -#define DREG_REGID_DMA_STATE_60_63 0x0000043CL -#define DREG_REGID_DMA_STATE_64_67 0x00000440L -#define DREG_REGID_DMA_STATE_68_71 0x00000444L -#define DREG_REGID_DMA_STATE_72_75 0x00000448L -#define DREG_REGID_DMA_STATE_76_79 0x0000044CL -#define DREG_REGID_DMA_STATE_80_83 0x00000450L -#define DREG_REGID_DMA_STATE_84_87 0x00000454L -#define DREG_REGID_DMA_STATE_88_91 0x00000458L -#define DREG_REGID_DMA_STATE_92_95 0x0000045CL -#define DREG_REGID_TRAP_SELECT 0x00000500L -#define DREG_REGID_TRAP_WRITE_0 0x00000500L -#define DREG_REGID_TRAP_WRITE_1 0x00000501L -#define DREG_REGID_TRAP_WRITE_2 0x00000502L -#define DREG_REGID_TRAP_WRITE_3 0x00000503L -#define DREG_REGID_TRAP_WRITE_4 0x00000504L -#define DREG_REGID_TRAP_WRITE_5 0x00000505L -#define DREG_REGID_TRAP_WRITE_6 0x00000506L -#define DREG_REGID_TRAP_WRITE_7 0x00000507L +#define DREG_REGID_RSA0_LOW 0x00000200L +#define DREG_REGID_RSA0_HIGH 0x00000201L +#define DREG_REGID_RSA1_LOW 0x00000202L +#define DREG_REGID_RSA1_HIGH 0x00000203L +#define DREG_REGID_RSA2 0x00000204L +#define DREG_REGID_RSA3 0x00000205L +#define DREG_REGID_RSI0_LOW 0x00000206L +#define DREG_REGID_RSI0_HIGH 0x00000207L +#define DREG_REGID_RSI1 0x00000208L +#define DREG_REGID_RSI2 0x00000209L +#define DREG_REGID_SAGUSTATUS 0x0000020AL +#define DREG_REGID_RSCONFIG01_LOW 0x0000020BL +#define DREG_REGID_RSCONFIG01_HIGH 0x0000020CL +#define DREG_REGID_RSCONFIG23_LOW 0x0000020DL +#define DREG_REGID_RSCONFIG23_HIGH 0x0000020EL +#define DREG_REGID_RSDMA01E 0x0000020FL +#define DREG_REGID_RSDMA23E 0x00000210L +#define DREG_REGID_RSD0_LOW 0x00000211L +#define DREG_REGID_RSD0_HIGH 0x00000212L +#define DREG_REGID_RSD1_LOW 0x00000213L +#define DREG_REGID_RSD1_HIGH 0x00000214L +#define DREG_REGID_RSD2_LOW 0x00000215L +#define DREG_REGID_RSD2_HIGH 0x00000216L +#define DREG_REGID_RSD3_LOW 0x00000217L +#define DREG_REGID_RSD3_HIGH 0x00000218L +#define DREG_REGID_SRAR_HIGH 0x0000021AL +#define DREG_REGID_SRAR_LOW 0x0000021BL +#define DREG_REGID_DMA_STATE 0x0000021CL +#define DREG_REGID_CURRENT_DMA_STREAM 0x0000021DL +#define DREG_REGID_NEXT_DMA_STREAM 0x0000021EL +#define DREG_REGID_CPU_STATUS 0x00000300L +#define DREG_REGID_MAC_MODE 0x00000301L +#define DREG_REGID_STACK_AND_REPEAT 0x00000302L +#define DREG_REGID_INDEX0 0x00000304L +#define DREG_REGID_INDEX1 0x00000305L +#define DREG_REGID_DMA_STATE_0_3 0x00000400L +#define DREG_REGID_DMA_STATE_4_7 0x00000404L +#define DREG_REGID_DMA_STATE_8_11 0x00000408L +#define DREG_REGID_DMA_STATE_12_15 0x0000040CL +#define DREG_REGID_DMA_STATE_16_19 0x00000410L +#define DREG_REGID_DMA_STATE_20_23 0x00000414L +#define DREG_REGID_DMA_STATE_24_27 0x00000418L +#define DREG_REGID_DMA_STATE_28_31 0x0000041CL +#define DREG_REGID_DMA_STATE_32_35 0x00000420L +#define DREG_REGID_DMA_STATE_36_39 0x00000424L +#define DREG_REGID_DMA_STATE_40_43 0x00000428L +#define DREG_REGID_DMA_STATE_44_47 0x0000042CL +#define DREG_REGID_DMA_STATE_48_51 0x00000430L +#define DREG_REGID_DMA_STATE_52_55 0x00000434L +#define DREG_REGID_DMA_STATE_56_59 0x00000438L +#define DREG_REGID_DMA_STATE_60_63 0x0000043CL +#define DREG_REGID_DMA_STATE_64_67 0x00000440L +#define DREG_REGID_DMA_STATE_68_71 0x00000444L +#define DREG_REGID_DMA_STATE_72_75 0x00000448L +#define DREG_REGID_DMA_STATE_76_79 0x0000044CL +#define DREG_REGID_DMA_STATE_80_83 0x00000450L +#define DREG_REGID_DMA_STATE_84_87 0x00000454L +#define DREG_REGID_DMA_STATE_88_91 0x00000458L +#define DREG_REGID_DMA_STATE_92_95 0x0000045CL +#define DREG_REGID_TRAP_SELECT 0x00000500L +#define DREG_REGID_TRAP_WRITE_0 0x00000500L +#define DREG_REGID_TRAP_WRITE_1 0x00000501L +#define DREG_REGID_TRAP_WRITE_2 0x00000502L +#define DREG_REGID_TRAP_WRITE_3 0x00000503L +#define DREG_REGID_TRAP_WRITE_4 0x00000504L +#define DREG_REGID_TRAP_WRITE_5 0x00000505L +#define DREG_REGID_TRAP_WRITE_6 0x00000506L +#define DREG_REGID_TRAP_WRITE_7 0x00000507L #if !defined(NO_CS4612) #if !defined(NO_CS4615) -#define DREG_REGID_TRAP_WRITE_8 0x00000510L -#define DREG_REGID_TRAP_WRITE_9 0x00000511L -#define DREG_REGID_TRAP_WRITE_10 0x00000512L -#define DREG_REGID_TRAP_WRITE_11 0x00000513L -#define DREG_REGID_TRAP_WRITE_12 0x00000514L -#define DREG_REGID_TRAP_WRITE_13 0x00000515L -#define DREG_REGID_TRAP_WRITE_14 0x00000516L -#define DREG_REGID_TRAP_WRITE_15 0x00000517L -#define DREG_REGID_TRAP_WRITE_16 0x00000518L -#define DREG_REGID_TRAP_WRITE_17 0x00000519L -#define DREG_REGID_TRAP_WRITE_18 0x0000051AL -#define DREG_REGID_TRAP_WRITE_19 0x0000051BL -#define DREG_REGID_TRAP_WRITE_20 0x0000051CL -#define DREG_REGID_TRAP_WRITE_21 0x0000051DL -#define DREG_REGID_TRAP_WRITE_22 0x0000051EL -#define DREG_REGID_TRAP_WRITE_23 0x0000051FL +#define DREG_REGID_TRAP_WRITE_8 0x00000510L +#define DREG_REGID_TRAP_WRITE_9 0x00000511L +#define DREG_REGID_TRAP_WRITE_10 0x00000512L +#define DREG_REGID_TRAP_WRITE_11 0x00000513L +#define DREG_REGID_TRAP_WRITE_12 0x00000514L +#define DREG_REGID_TRAP_WRITE_13 0x00000515L +#define DREG_REGID_TRAP_WRITE_14 0x00000516L +#define DREG_REGID_TRAP_WRITE_15 0x00000517L +#define DREG_REGID_TRAP_WRITE_16 0x00000518L +#define DREG_REGID_TRAP_WRITE_17 0x00000519L +#define DREG_REGID_TRAP_WRITE_18 0x0000051AL +#define DREG_REGID_TRAP_WRITE_19 0x0000051BL +#define DREG_REGID_TRAP_WRITE_20 0x0000051CL +#define DREG_REGID_TRAP_WRITE_21 0x0000051DL +#define DREG_REGID_TRAP_WRITE_22 0x0000051EL +#define DREG_REGID_TRAP_WRITE_23 0x0000051FL #endif #endif -#define DREG_REGID_MAC0_ACC0_LOW 0x00000600L -#define DREG_REGID_MAC0_ACC1_LOW 0x00000601L -#define DREG_REGID_MAC0_ACC2_LOW 0x00000602L -#define DREG_REGID_MAC0_ACC3_LOW 0x00000603L -#define DREG_REGID_MAC1_ACC0_LOW 0x00000604L -#define DREG_REGID_MAC1_ACC1_LOW 0x00000605L -#define DREG_REGID_MAC1_ACC2_LOW 0x00000606L -#define DREG_REGID_MAC1_ACC3_LOW 0x00000607L -#define DREG_REGID_MAC0_ACC0_MID 0x00000608L -#define DREG_REGID_MAC0_ACC1_MID 0x00000609L -#define DREG_REGID_MAC0_ACC2_MID 0x0000060AL -#define DREG_REGID_MAC0_ACC3_MID 0x0000060BL -#define DREG_REGID_MAC1_ACC0_MID 0x0000060CL -#define DREG_REGID_MAC1_ACC1_MID 0x0000060DL -#define DREG_REGID_MAC1_ACC2_MID 0x0000060EL -#define DREG_REGID_MAC1_ACC3_MID 0x0000060FL -#define DREG_REGID_MAC0_ACC0_HIGH 0x00000610L -#define DREG_REGID_MAC0_ACC1_HIGH 0x00000611L -#define DREG_REGID_MAC0_ACC2_HIGH 0x00000612L -#define DREG_REGID_MAC0_ACC3_HIGH 0x00000613L -#define DREG_REGID_MAC1_ACC0_HIGH 0x00000614L -#define DREG_REGID_MAC1_ACC1_HIGH 0x00000615L -#define DREG_REGID_MAC1_ACC2_HIGH 0x00000616L -#define DREG_REGID_MAC1_ACC3_HIGH 0x00000617L -#define DREG_REGID_RSHOUT_LOW 0x00000620L -#define DREG_REGID_RSHOUT_MID 0x00000628L -#define DREG_REGID_RSHOUT_HIGH 0x00000630L +#define DREG_REGID_MAC0_ACC0_LOW 0x00000600L +#define DREG_REGID_MAC0_ACC1_LOW 0x00000601L +#define DREG_REGID_MAC0_ACC2_LOW 0x00000602L +#define DREG_REGID_MAC0_ACC3_LOW 0x00000603L +#define DREG_REGID_MAC1_ACC0_LOW 0x00000604L +#define DREG_REGID_MAC1_ACC1_LOW 0x00000605L +#define DREG_REGID_MAC1_ACC2_LOW 0x00000606L +#define DREG_REGID_MAC1_ACC3_LOW 0x00000607L +#define DREG_REGID_MAC0_ACC0_MID 0x00000608L +#define DREG_REGID_MAC0_ACC1_MID 0x00000609L +#define DREG_REGID_MAC0_ACC2_MID 0x0000060AL +#define DREG_REGID_MAC0_ACC3_MID 0x0000060BL +#define DREG_REGID_MAC1_ACC0_MID 0x0000060CL +#define DREG_REGID_MAC1_ACC1_MID 0x0000060DL +#define DREG_REGID_MAC1_ACC2_MID 0x0000060EL +#define DREG_REGID_MAC1_ACC3_MID 0x0000060FL +#define DREG_REGID_MAC0_ACC0_HIGH 0x00000610L +#define DREG_REGID_MAC0_ACC1_HIGH 0x00000611L +#define DREG_REGID_MAC0_ACC2_HIGH 0x00000612L +#define DREG_REGID_MAC0_ACC3_HIGH 0x00000613L +#define DREG_REGID_MAC1_ACC0_HIGH 0x00000614L +#define DREG_REGID_MAC1_ACC1_HIGH 0x00000615L +#define DREG_REGID_MAC1_ACC2_HIGH 0x00000616L +#define DREG_REGID_MAC1_ACC3_HIGH 0x00000617L +#define DREG_REGID_RSHOUT_LOW 0x00000620L +#define DREG_REGID_RSHOUT_MID 0x00000628L +#define DREG_REGID_RSHOUT_HIGH 0x00000630L /***************************************************************************** * @@ -1630,22 +1630,22 @@ * port register. * *****************************************************************************/ -#define DSRWP_DSR_MASK 0x0000000FL -#define DSRWP_DSR_BG_RQ 0x00000001L -#define DSRWP_DSR_PRIORITY_MASK 0x00000006L -#define DSRWP_DSR_PRIORITY_0 0x00000000L -#define DSRWP_DSR_PRIORITY_1 0x00000002L -#define DSRWP_DSR_PRIORITY_2 0x00000004L -#define DSRWP_DSR_PRIORITY_3 0x00000006L -#define DSRWP_DSR_RQ_PENDING 0x00000008L +#define DSRWP_DSR_MASK 0x0000000FL +#define DSRWP_DSR_BG_RQ 0x00000001L +#define DSRWP_DSR_PRIORITY_MASK 0x00000006L +#define DSRWP_DSR_PRIORITY_0 0x00000000L +#define DSRWP_DSR_PRIORITY_1 0x00000002L +#define DSRWP_DSR_PRIORITY_2 0x00000004L +#define DSRWP_DSR_PRIORITY_3 0x00000006L +#define DSRWP_DSR_RQ_PENDING 0x00000008L /***************************************************************************** * * The following defines are for the flags in the trap write port register. * *****************************************************************************/ -#define TWPR_TW_MASK 0x0000FFFFL -#define TWPR_TW_SHIFT 0L +#define TWPR_TW_MASK 0x0000FFFFL +#define TWPR_TW_SHIFT 0L /***************************************************************************** * @@ -1653,51 +1653,51 @@ * register. * *****************************************************************************/ -#define SPWR_STKP_MASK 0x0000000FL -#define SPWR_STKP_SHIFT 0L +#define SPWR_STKP_MASK 0x0000000FL +#define SPWR_STKP_SHIFT 0L /***************************************************************************** * * The following defines are for the flags in the SP interrupt register. * *****************************************************************************/ -#define SPIR_FRI 0x00000001L -#define SPIR_DOI 0x00000002L -#define SPIR_GPI2 0x00000004L -#define SPIR_GPI3 0x00000008L -#define SPIR_IP0 0x00000010L -#define SPIR_IP1 0x00000020L -#define SPIR_IP2 0x00000040L -#define SPIR_IP3 0x00000080L +#define SPIR_FRI 0x00000001L +#define SPIR_DOI 0x00000002L +#define SPIR_GPI2 0x00000004L +#define SPIR_GPI3 0x00000008L +#define SPIR_IP0 0x00000010L +#define SPIR_IP1 0x00000020L +#define SPIR_IP2 0x00000040L +#define SPIR_IP3 0x00000080L /***************************************************************************** * * The following defines are for the flags in the functional group 1 register. * *****************************************************************************/ -#define FGR1_F1S_MASK 0x0000FFFFL -#define FGR1_F1S_SHIFT 0L +#define FGR1_F1S_MASK 0x0000FFFFL +#define FGR1_F1S_SHIFT 0L /***************************************************************************** * * The following defines are for the flags in the SP clock status register. * *****************************************************************************/ -#define SPCS_FRI 0x00000001L -#define SPCS_DOI 0x00000002L -#define SPCS_GPI2 0x00000004L -#define SPCS_GPI3 0x00000008L -#define SPCS_IP0 0x00000010L -#define SPCS_IP1 0x00000020L -#define SPCS_IP2 0x00000040L -#define SPCS_IP3 0x00000080L -#define SPCS_SPRUN 0x00000100L -#define SPCS_SLEEP 0x00000200L -#define SPCS_FG 0x00000400L -#define SPCS_ORUN 0x00000800L -#define SPCS_IRQ 0x00001000L -#define SPCS_FGN_MASK 0x0000E000L -#define SPCS_FGN_SHIFT 13L +#define SPCS_FRI 0x00000001L +#define SPCS_DOI 0x00000002L +#define SPCS_GPI2 0x00000004L +#define SPCS_GPI3 0x00000008L +#define SPCS_IP0 0x00000010L +#define SPCS_IP1 0x00000020L +#define SPCS_IP2 0x00000040L +#define SPCS_IP3 0x00000080L +#define SPCS_SPRUN 0x00000100L +#define SPCS_SLEEP 0x00000200L +#define SPCS_FG 0x00000400L +#define SPCS_ORUN 0x00000800L +#define SPCS_IRQ 0x00001000L +#define SPCS_FGN_MASK 0x0000E000L +#define SPCS_FGN_SHIFT 13L /***************************************************************************** * @@ -1705,17 +1705,17 @@ * register. * *****************************************************************************/ -#define SDSR_DCS_MASK 0x000000FFL -#define SDSR_DCS_SHIFT 0L -#define SDSR_DCS_NONE 0x00000007L +#define SDSR_DCS_MASK 0x000000FFL +#define SDSR_DCS_SHIFT 0L +#define SDSR_DCS_NONE 0x00000007L /***************************************************************************** * * The following defines are for the flags in the frame timer register. * *****************************************************************************/ -#define FRMT_FTV_MASK 0x0000FFFFL -#define FRMT_FTV_SHIFT 0L +#define FRMT_FTV_MASK 0x0000FFFFL +#define FRMT_FTV_SHIFT 0L /***************************************************************************** * @@ -1723,8 +1723,8 @@ * register. * *****************************************************************************/ -#define FRCC_FCC_MASK 0x0000FFFFL -#define FRCC_FCC_SHIFT 0L +#define FRCC_FCC_MASK 0x0000FFFFL +#define FRCC_FCC_SHIFT 0L /***************************************************************************** * @@ -1732,8 +1732,8 @@ * register. * *****************************************************************************/ -#define FRSC_FCS_MASK 0x0000FFFFL -#define FRSC_FCS_SHIFT 0L +#define FRSC_FCS_MASK 0x0000FFFFL +#define FRSC_FCS_SHIFT 0L /***************************************************************************** * @@ -1741,14 +1741,14 @@ * descriptors. * *****************************************************************************/ -#define DMA_SG_NEXT_ENTRY_MASK 0x00000FF8L -#define DMA_SG_SAMPLE_END_MASK 0x0FFF0000L -#define DMA_SG_SAMPLE_END_FLAG 0x10000000L -#define DMA_SG_LOOP_END_FLAG 0x20000000L -#define DMA_SG_SIGNAL_END_FLAG 0x40000000L -#define DMA_SG_SIGNAL_PAGE_FLAG 0x80000000L -#define DMA_SG_NEXT_ENTRY_SHIFT 3L -#define DMA_SG_SAMPLE_END_SHIFT 16L +#define DMA_SG_NEXT_ENTRY_MASK 0x00000FF8L +#define DMA_SG_SAMPLE_END_MASK 0x0FFF0000L +#define DMA_SG_SAMPLE_END_FLAG 0x10000000L +#define DMA_SG_LOOP_END_FLAG 0x20000000L +#define DMA_SG_SIGNAL_END_FLAG 0x40000000L +#define DMA_SG_SIGNAL_PAGE_FLAG 0x80000000L +#define DMA_SG_NEXT_ENTRY_SHIFT 3L +#define DMA_SG_SAMPLE_END_SHIFT 16L /***************************************************************************** * @@ -1756,15 +1756,15 @@ * DMA requestor. * *****************************************************************************/ -#define DMA_RQ_CONTROL1 0x00000000L -#define DMA_RQ_CONTROL2 0x00000004L -#define DMA_RQ_SOURCE_ADDR 0x00000008L -#define DMA_RQ_DESTINATION_ADDR 0x0000000CL -#define DMA_RQ_NEXT_PAGE_ADDR 0x00000010L -#define DMA_RQ_NEXT_PAGE_SGDESC 0x00000014L -#define DMA_RQ_LOOP_START_ADDR 0x00000018L -#define DMA_RQ_POST_LOOP_ADDR 0x0000001CL -#define DMA_RQ_PAGE_MAP_ADDR 0x00000020L +#define DMA_RQ_CONTROL1 0x00000000L +#define DMA_RQ_CONTROL2 0x00000004L +#define DMA_RQ_SOURCE_ADDR 0x00000008L +#define DMA_RQ_DESTINATION_ADDR 0x0000000CL +#define DMA_RQ_NEXT_PAGE_ADDR 0x00000010L +#define DMA_RQ_NEXT_PAGE_SGDESC 0x00000014L +#define DMA_RQ_LOOP_START_ADDR 0x00000018L +#define DMA_RQ_POST_LOOP_ADDR 0x0000001CL +#define DMA_RQ_PAGE_MAP_ADDR 0x00000020L /***************************************************************************** * @@ -1772,49 +1772,49 @@ * on-chip generic DMA requestor. * *****************************************************************************/ -#define DMA_RQ_C1_COUNT_MASK 0x000003FFL -#define DMA_RQ_C1_DESTINATION_SCATTER 0x00001000L -#define DMA_RQ_C1_SOURCE_GATHER 0x00002000L -#define DMA_RQ_C1_DONE_FLAG 0x00004000L -#define DMA_RQ_C1_OPTIMIZE_STATE 0x00008000L -#define DMA_RQ_C1_SAMPLE_END_STATE_MASK 0x00030000L -#define DMA_RQ_C1_FULL_PAGE 0x00000000L -#define DMA_RQ_C1_BEFORE_SAMPLE_END 0x00010000L -#define DMA_RQ_C1_PAGE_MAP_ERROR 0x00020000L -#define DMA_RQ_C1_AT_SAMPLE_END 0x00030000L -#define DMA_RQ_C1_LOOP_END_STATE_MASK 0x000C0000L -#define DMA_RQ_C1_NOT_LOOP_END 0x00000000L -#define DMA_RQ_C1_BEFORE_LOOP_END 0x00040000L -#define DMA_RQ_C1_2PAGE_LOOP_BEGIN 0x00080000L -#define DMA_RQ_C1_LOOP_BEGIN 0x000C0000L -#define DMA_RQ_C1_PAGE_MAP_MASK 0x00300000L -#define DMA_RQ_C1_PM_NONE_PENDING 0x00000000L -#define DMA_RQ_C1_PM_NEXT_PENDING 0x00100000L -#define DMA_RQ_C1_PM_RESERVED 0x00200000L -#define DMA_RQ_C1_PM_LOOP_NEXT_PENDING 0x00300000L -#define DMA_RQ_C1_WRITEBACK_DEST_FLAG 0x00400000L -#define DMA_RQ_C1_WRITEBACK_SRC_FLAG 0x00800000L -#define DMA_RQ_C1_DEST_SIZE_MASK 0x07000000L -#define DMA_RQ_C1_DEST_LINEAR 0x00000000L -#define DMA_RQ_C1_DEST_MOD16 0x01000000L -#define DMA_RQ_C1_DEST_MOD32 0x02000000L -#define DMA_RQ_C1_DEST_MOD64 0x03000000L -#define DMA_RQ_C1_DEST_MOD128 0x04000000L -#define DMA_RQ_C1_DEST_MOD256 0x05000000L -#define DMA_RQ_C1_DEST_MOD512 0x06000000L -#define DMA_RQ_C1_DEST_MOD1024 0x07000000L -#define DMA_RQ_C1_DEST_ON_HOST 0x08000000L -#define DMA_RQ_C1_SOURCE_SIZE_MASK 0x70000000L -#define DMA_RQ_C1_SOURCE_LINEAR 0x00000000L -#define DMA_RQ_C1_SOURCE_MOD16 0x10000000L -#define DMA_RQ_C1_SOURCE_MOD32 0x20000000L -#define DMA_RQ_C1_SOURCE_MOD64 0x30000000L -#define DMA_RQ_C1_SOURCE_MOD128 0x40000000L -#define DMA_RQ_C1_SOURCE_MOD256 0x50000000L -#define DMA_RQ_C1_SOURCE_MOD512 0x60000000L -#define DMA_RQ_C1_SOURCE_MOD1024 0x70000000L -#define DMA_RQ_C1_SOURCE_ON_HOST 0x80000000L -#define DMA_RQ_C1_COUNT_SHIFT 0L +#define DMA_RQ_C1_COUNT_MASK 0x000003FFL +#define DMA_RQ_C1_DESTINATION_SCATTER 0x00001000L +#define DMA_RQ_C1_SOURCE_GATHER 0x00002000L +#define DMA_RQ_C1_DONE_FLAG 0x00004000L +#define DMA_RQ_C1_OPTIMIZE_STATE 0x00008000L +#define DMA_RQ_C1_SAMPLE_END_STATE_MASK 0x00030000L +#define DMA_RQ_C1_FULL_PAGE 0x00000000L +#define DMA_RQ_C1_BEFORE_SAMPLE_END 0x00010000L +#define DMA_RQ_C1_PAGE_MAP_ERROR 0x00020000L +#define DMA_RQ_C1_AT_SAMPLE_END 0x00030000L +#define DMA_RQ_C1_LOOP_END_STATE_MASK 0x000C0000L +#define DMA_RQ_C1_NOT_LOOP_END 0x00000000L +#define DMA_RQ_C1_BEFORE_LOOP_END 0x00040000L +#define DMA_RQ_C1_2PAGE_LOOP_BEGIN 0x00080000L +#define DMA_RQ_C1_LOOP_BEGIN 0x000C0000L +#define DMA_RQ_C1_PAGE_MAP_MASK 0x00300000L +#define DMA_RQ_C1_PM_NONE_PENDING 0x00000000L +#define DMA_RQ_C1_PM_NEXT_PENDING 0x00100000L +#define DMA_RQ_C1_PM_RESERVED 0x00200000L +#define DMA_RQ_C1_PM_LOOP_NEXT_PENDING 0x00300000L +#define DMA_RQ_C1_WRITEBACK_DEST_FLAG 0x00400000L +#define DMA_RQ_C1_WRITEBACK_SRC_FLAG 0x00800000L +#define DMA_RQ_C1_DEST_SIZE_MASK 0x07000000L +#define DMA_RQ_C1_DEST_LINEAR 0x00000000L +#define DMA_RQ_C1_DEST_MOD16 0x01000000L +#define DMA_RQ_C1_DEST_MOD32 0x02000000L +#define DMA_RQ_C1_DEST_MOD64 0x03000000L +#define DMA_RQ_C1_DEST_MOD128 0x04000000L +#define DMA_RQ_C1_DEST_MOD256 0x05000000L +#define DMA_RQ_C1_DEST_MOD512 0x06000000L +#define DMA_RQ_C1_DEST_MOD1024 0x07000000L +#define DMA_RQ_C1_DEST_ON_HOST 0x08000000L +#define DMA_RQ_C1_SOURCE_SIZE_MASK 0x70000000L +#define DMA_RQ_C1_SOURCE_LINEAR 0x00000000L +#define DMA_RQ_C1_SOURCE_MOD16 0x10000000L +#define DMA_RQ_C1_SOURCE_MOD32 0x20000000L +#define DMA_RQ_C1_SOURCE_MOD64 0x30000000L +#define DMA_RQ_C1_SOURCE_MOD128 0x40000000L +#define DMA_RQ_C1_SOURCE_MOD256 0x50000000L +#define DMA_RQ_C1_SOURCE_MOD512 0x60000000L +#define DMA_RQ_C1_SOURCE_MOD1024 0x70000000L +#define DMA_RQ_C1_SOURCE_ON_HOST 0x80000000L +#define DMA_RQ_C1_COUNT_SHIFT 0L /***************************************************************************** * @@ -1822,28 +1822,28 @@ * on-chip generic DMA requestor. * *****************************************************************************/ -#define DMA_RQ_C2_VIRTUAL_CHANNEL_MASK 0x0000003FL -#define DMA_RQ_C2_VIRTUAL_SIGNAL_MASK 0x00000300L -#define DMA_RQ_C2_NO_VIRTUAL_SIGNAL 0x00000000L -#define DMA_RQ_C2_SIGNAL_EVERY_DMA 0x00000100L -#define DMA_RQ_C2_SIGNAL_SOURCE_PINGPONG 0x00000200L -#define DMA_RQ_C2_SIGNAL_DEST_PINGPONG 0x00000300L -#define DMA_RQ_C2_AUDIO_CONVERT_MASK 0x0000F000L -#define DMA_RQ_C2_AC_NONE 0x00000000L -#define DMA_RQ_C2_AC_8_TO_16_BIT 0x00001000L -#define DMA_RQ_C2_AC_MONO_TO_STEREO 0x00002000L -#define DMA_RQ_C2_AC_ENDIAN_CONVERT 0x00004000L -#define DMA_RQ_C2_AC_SIGNED_CONVERT 0x00008000L -#define DMA_RQ_C2_LOOP_END_MASK 0x0FFF0000L -#define DMA_RQ_C2_LOOP_MASK 0x30000000L -#define DMA_RQ_C2_NO_LOOP 0x00000000L -#define DMA_RQ_C2_ONE_PAGE_LOOP 0x10000000L -#define DMA_RQ_C2_TWO_PAGE_LOOP 0x20000000L -#define DMA_RQ_C2_MULTI_PAGE_LOOP 0x30000000L -#define DMA_RQ_C2_SIGNAL_LOOP_BACK 0x40000000L -#define DMA_RQ_C2_SIGNAL_POST_BEGIN_PAGE 0x80000000L -#define DMA_RQ_C2_VIRTUAL_CHANNEL_SHIFT 0L -#define DMA_RQ_C2_LOOP_END_SHIFT 16L +#define DMA_RQ_C2_VIRTUAL_CHANNEL_MASK 0x0000003FL +#define DMA_RQ_C2_VIRTUAL_SIGNAL_MASK 0x00000300L +#define DMA_RQ_C2_NO_VIRTUAL_SIGNAL 0x00000000L +#define DMA_RQ_C2_SIGNAL_EVERY_DMA 0x00000100L +#define DMA_RQ_C2_SIGNAL_SOURCE_PINGPONG 0x00000200L +#define DMA_RQ_C2_SIGNAL_DEST_PINGPONG 0x00000300L +#define DMA_RQ_C2_AUDIO_CONVERT_MASK 0x0000F000L +#define DMA_RQ_C2_AC_NONE 0x00000000L +#define DMA_RQ_C2_AC_8_TO_16_BIT 0x00001000L +#define DMA_RQ_C2_AC_MONO_TO_STEREO 0x00002000L +#define DMA_RQ_C2_AC_ENDIAN_CONVERT 0x00004000L +#define DMA_RQ_C2_AC_SIGNED_CONVERT 0x00008000L +#define DMA_RQ_C2_LOOP_END_MASK 0x0FFF0000L +#define DMA_RQ_C2_LOOP_MASK 0x30000000L +#define DMA_RQ_C2_NO_LOOP 0x00000000L +#define DMA_RQ_C2_ONE_PAGE_LOOP 0x10000000L +#define DMA_RQ_C2_TWO_PAGE_LOOP 0x20000000L +#define DMA_RQ_C2_MULTI_PAGE_LOOP 0x30000000L +#define DMA_RQ_C2_SIGNAL_LOOP_BACK 0x40000000L +#define DMA_RQ_C2_SIGNAL_POST_BEGIN_PAGE 0x80000000L +#define DMA_RQ_C2_VIRTUAL_CHANNEL_SHIFT 0L +#define DMA_RQ_C2_LOOP_END_SHIFT 16L /***************************************************************************** * @@ -1851,16 +1851,16 @@ * of the on-chip generic DMA requestor. * *****************************************************************************/ -#define DMA_RQ_SD_ADDRESS_MASK 0x0000FFFFL -#define DMA_RQ_SD_MEMORY_ID_MASK 0x000F0000L -#define DMA_RQ_SD_SP_PARAM_ADDR 0x00000000L -#define DMA_RQ_SD_SP_SAMPLE_ADDR 0x00010000L -#define DMA_RQ_SD_SP_PROGRAM_ADDR 0x00020000L -#define DMA_RQ_SD_SP_DEBUG_ADDR 0x00030000L -#define DMA_RQ_SD_OMNIMEM_ADDR 0x000E0000L -#define DMA_RQ_SD_END_FLAG 0x40000000L -#define DMA_RQ_SD_ERROR_FLAG 0x80000000L -#define DMA_RQ_SD_ADDRESS_SHIFT 0L +#define DMA_RQ_SD_ADDRESS_MASK 0x0000FFFFL +#define DMA_RQ_SD_MEMORY_ID_MASK 0x000F0000L +#define DMA_RQ_SD_SP_PARAM_ADDR 0x00000000L +#define DMA_RQ_SD_SP_SAMPLE_ADDR 0x00010000L +#define DMA_RQ_SD_SP_PROGRAM_ADDR 0x00020000L +#define DMA_RQ_SD_SP_DEBUG_ADDR 0x00030000L +#define DMA_RQ_SD_OMNIMEM_ADDR 0x000E0000L +#define DMA_RQ_SD_END_FLAG 0x40000000L +#define DMA_RQ_SD_ERROR_FLAG 0x80000000L +#define DMA_RQ_SD_ADDRESS_SHIFT 0L /***************************************************************************** * @@ -1868,10 +1868,10 @@ * on-chip generic DMA requestor. * *****************************************************************************/ -#define DMA_RQ_PMA_LOOP_THIRD_PAGE_ENTRY_MASK 0x00000FF8L -#define DMA_RQ_PMA_PAGE_TABLE_MASK 0xFFFFF000L -#define DMA_RQ_PMA_LOOP_THIRD_PAGE_ENTRY_SHIFT 3L -#define DMA_RQ_PMA_PAGE_TABLE_SHIFT 12L +#define DMA_RQ_PMA_LOOP_THIRD_PAGE_ENTRY_MASK 0x00000FF8L +#define DMA_RQ_PMA_PAGE_TABLE_MASK 0xFFFFF000L +#define DMA_RQ_PMA_LOOP_THIRD_PAGE_ENTRY_SHIFT 3L +#define DMA_RQ_PMA_PAGE_TABLE_SHIFT 12L /***************************************************************************** * @@ -1879,74 +1879,75 @@ * the SP. * *****************************************************************************/ -#define RSCONFIG_MODULO_SIZE_MASK 0x0000000FL -#define RSCONFIG_MODULO_16 0x00000001L -#define RSCONFIG_MODULO_32 0x00000002L -#define RSCONFIG_MODULO_64 0x00000003L -#define RSCONFIG_MODULO_128 0x00000004L -#define RSCONFIG_MODULO_256 0x00000005L -#define RSCONFIG_MODULO_512 0x00000006L -#define RSCONFIG_MODULO_1024 0x00000007L -#define RSCONFIG_MODULO_4 0x00000008L -#define RSCONFIG_MODULO_8 0x00000009L -#define RSCONFIG_SAMPLE_SIZE_MASK 0x000000C0L -#define RSCONFIG_SAMPLE_8MONO 0x00000000L -#define RSCONFIG_SAMPLE_8STEREO 0x00000040L -#define RSCONFIG_SAMPLE_16MONO 0x00000080L -#define RSCONFIG_SAMPLE_16STEREO 0x000000C0L -#define RSCONFIG_UNDERRUN_ZERO 0x00004000L -#define RSCONFIG_DMA_TO_HOST 0x00008000L -#define RSCONFIG_STREAM_NUM_MASK 0x00FF0000L -#define RSCONFIG_MAX_DMA_SIZE_MASK 0x1F000000L -#define RSCONFIG_DMA_ENABLE 0x20000000L -#define RSCONFIG_PRIORITY_MASK 0xC0000000L -#define RSCONFIG_PRIORITY_HIGH 0x00000000L -#define RSCONFIG_PRIORITY_MEDIUM_HIGH 0x40000000L -#define RSCONFIG_PRIORITY_MEDIUM_LOW 0x80000000L -#define RSCONFIG_PRIORITY_LOW 0xC0000000L -#define RSCONFIG_STREAM_NUM_SHIFT 16L -#define RSCONFIG_MAX_DMA_SIZE_SHIFT 24L - -#define BA1_VARIDEC_BUF_1 0x000 - -#define BA1_PDTC 0x0c0 /* BA1_PLAY_DMA_TRANSACTION_COUNT_REG */ -#define BA1_PFIE 0x0c4 /* BA1_PLAY_FORMAT_&_INTERRUPT_ENABLE_REG */ -#define BA1_PBA 0x0c8 /* BA1_PLAY_BUFFER_ADDRESS */ -#define BA1_PVOL 0x0f8 /* BA1_PLAY_VOLUME_REG */ -#define BA1_PSRC 0x288 /* BA1_PLAY_SAMPLE_RATE_CORRECTION_REG */ -#define BA1_PCTL 0x2a4 /* BA1_PLAY_CONTROL_REG */ -#define BA1_PPI 0x2b4 /* BA1_PLAY_PHASE_INCREMENT_REG */ - -#define BA1_CCTL 0x064 /* BA1_CAPTURE_CONTROL_REG */ -#define BA1_CIE 0x104 /* BA1_CAPTURE_INTERRUPT_ENABLE_REG */ -#define BA1_CBA 0x10c /* BA1_CAPTURE_BUFFER_ADDRESS */ -#define BA1_CSRC 0x2c8 /* BA1_CAPTURE_SAMPLE_RATE_CORRECTION_REG */ -#define BA1_CCI 0x2d8 /* BA1_CAPTURE_COEFFICIENT_INCREMENT_REG */ -#define BA1_CD 0x2e0 /* BA1_CAPTURE_DELAY_REG */ -#define BA1_CPI 0x2f4 /* BA1_CAPTURE_PHASE_INCREMENT_REG */ -#define BA1_CVOL 0x2f8 /* BA1_CAPTURE_VOLUME_REG */ - -#define BA1_CFG1 0x134 /* BA1_CAPTURE_FRAME_GROUP_1_REG */ -#define BA1_CFG2 0x138 /* BA1_CAPTURE_FRAME_GROUP_2_REG */ -#define BA1_CCST 0x13c /* BA1_CAPTURE_CONSTANT_REG */ -#define BA1_CSPB 0x340 /* BA1_CAPTURE_SPB_ADDRESS */ +#define RSCONFIG_MODULO_SIZE_MASK 0x0000000FL +#define RSCONFIG_MODULO_16 0x00000001L +#define RSCONFIG_MODULO_32 0x00000002L +#define RSCONFIG_MODULO_64 0x00000003L +#define RSCONFIG_MODULO_128 0x00000004L +#define RSCONFIG_MODULO_256 0x00000005L +#define RSCONFIG_MODULO_512 0x00000006L +#define RSCONFIG_MODULO_1024 0x00000007L +#define RSCONFIG_MODULO_4 0x00000008L +#define RSCONFIG_MODULO_8 0x00000009L +#define RSCONFIG_SAMPLE_SIZE_MASK 0x000000C0L +#define RSCONFIG_SAMPLE_8MONO 0x00000000L +#define RSCONFIG_SAMPLE_8STEREO 0x00000040L +#define RSCONFIG_SAMPLE_16MONO 0x00000080L +#define RSCONFIG_SAMPLE_16STEREO 0x000000C0L +#define RSCONFIG_UNDERRUN_ZERO 0x00004000L +#define RSCONFIG_DMA_TO_HOST 0x00008000L +#define RSCONFIG_STREAM_NUM_MASK 0x00FF0000L +#define RSCONFIG_MAX_DMA_SIZE_MASK 0x1F000000L +#define RSCONFIG_DMA_ENABLE 0x20000000L +#define RSCONFIG_PRIORITY_MASK 0xC0000000L +#define RSCONFIG_PRIORITY_HIGH 0x00000000L +#define RSCONFIG_PRIORITY_MEDIUM_HIGH 0x40000000L +#define RSCONFIG_PRIORITY_MEDIUM_LOW 0x80000000L +#define RSCONFIG_PRIORITY_LOW 0xC0000000L +#define RSCONFIG_STREAM_NUM_SHIFT 16L +#define RSCONFIG_MAX_DMA_SIZE_SHIFT 24L + +#define BA1_VARIDEC_BUF_1 0x000 + +#define BA1_PDTC 0x0c0 /* BA1_PLAY_DMA_TRANSACTION_COUNT_REG */ +#define BA1_PFIE 0x0c4 /* BA1_PLAY_FORMAT_&_INTERRUPT_ENABLE_REG */ +#define BA1_PBA 0x0c8 /* BA1_PLAY_BUFFER_ADDRESS */ +#define BA1_PVOL 0x0f8 /* BA1_PLAY_VOLUME_REG */ +#define BA1_PSRC 0x288 /* BA1_PLAY_SAMPLE_RATE_CORRECTION_REG */ +#define BA1_PCTL 0x2a4 /* BA1_PLAY_CONTROL_REG */ +#define BA1_PPI 0x2b4 /* BA1_PLAY_PHASE_INCREMENT_REG */ + +#define BA1_CCTL 0x064 /* BA1_CAPTURE_CONTROL_REG */ +#define BA1_CIE 0x104 /* BA1_CAPTURE_INTERRUPT_ENABLE_REG */ +#define BA1_CBA 0x10c /* BA1_CAPTURE_BUFFER_ADDRESS */ +#define BA1_CSRC 0x2c8 /* BA1_CAPTURE_SAMPLE_RATE_CORRECTION_REG */ +#define BA1_CCI 0x2d8 /* BA1_CAPTURE_COEFFICIENT_INCREMENT_REG */ +#define BA1_CD 0x2e0 /* BA1_CAPTURE_DELAY_REG */ +#define BA1_CPI 0x2f4 /* BA1_CAPTURE_PHASE_INCREMENT_REG */ +#define BA1_CVOL 0x2f8 /* BA1_CAPTURE_VOLUME_REG */ + +#define BA1_CFG1 0x134 /* BA1_CAPTURE_FRAME_GROUP_1_REG */ +#define BA1_CFG2 0x138 /* BA1_CAPTURE_FRAME_GROUP_2_REG */ +#define BA1_CCST 0x13c /* BA1_CAPTURE_CONSTANT_REG */ +#define BA1_CSPB 0x340 /* BA1_CAPTURE_SPB_ADDRESS */ /* PM state definitions */ -#define CS461x_AC97_HIGHESTREGTORESTORE 0x26 -#define CS461x_AC97_NUMBER_RESTORE_REGS (CS461x_AC97_HIGHESTREGTORESTORE/2-1) - -#define CS_POWER_DAC 0x0001 -#define CS_POWER_ADC 0x0002 -#define CS_POWER_MIXVON 0x0004 -#define CS_POWER_MIXVOFF 0x0008 -#define CS_AC97_POWER_CONTROL_ON 0xf000 /* always on bits (inverted) */ -#define CS_AC97_POWER_CONTROL_ADC 0x0100 -#define CS_AC97_POWER_CONTROL_DAC 0x0200 -#define CS_AC97_POWER_CONTROL_MIXVON 0x0400 -#define CS_AC97_POWER_CONTROL_MIXVOFF 0x0800 -#define CS_AC97_POWER_CONTROL_ADC_ON 0x0001 -#define CS_AC97_POWER_CONTROL_DAC_ON 0x0002 -#define CS_AC97_POWER_CONTROL_MIXVON_ON 0x0004 +#define CS461x_AC97_HIGHESTREGTORESTORE 0x26 +#define CS461x_AC97_NUMBER_RESTORE_REGS \ + (CS461x_AC97_HIGHESTREGTORESTORE / 2 - 1) + +#define CS_POWER_DAC 0x0001 +#define CS_POWER_ADC 0x0002 +#define CS_POWER_MIXVON 0x0004 +#define CS_POWER_MIXVOFF 0x0008 +#define CS_AC97_POWER_CONTROL_ON 0xf000 /* always on bits (inverted) */ +#define CS_AC97_POWER_CONTROL_ADC 0x0100 +#define CS_AC97_POWER_CONTROL_DAC 0x0200 +#define CS_AC97_POWER_CONTROL_MIXVON 0x0400 +#define CS_AC97_POWER_CONTROL_MIXVOFF 0x0800 +#define CS_AC97_POWER_CONTROL_ADC_ON 0x0001 +#define CS_AC97_POWER_CONTROL_DAC_ON 0x0002 +#define CS_AC97_POWER_CONTROL_MIXVON_ON 0x0004 #define CS_AC97_POWER_CONTROL_MIXVOFF_ON 0x0008 /* @@ -1955,14 +1956,12 @@ */ /* The following struct holds the initialization array. */ -#define INKY_BA1_DWORD_SIZE (13*1024+512) +#define INKY_BA1_DWORD_SIZE (13 * 1024 + 512) /* this is parameter, sample, and code */ -#define INKY_MEMORY_COUNT 3 +#define INKY_MEMORY_COUNT 3 -struct cs461x_firmware_struct -{ - struct - { +struct cs461x_firmware_struct { + struct { u_int32_t ulDestAddr, ulSourceSize; } MemoryStat[INKY_MEMORY_COUNT]; Index: sys/dev/sound/pci/csavar.h =================================================================== --- sys/dev/sound/pci/csavar.h +++ sys/dev/sound/pci/csavar.h @@ -39,11 +39,11 @@ /* Resources. */ struct csa_res { - int io_rid; /* io rid */ - struct resource *io; /* io */ - int mem_rid; /* memory rid */ + int io_rid; /* io rid */ + struct resource *io; /* io */ + int mem_rid; /* memory rid */ struct resource *mem; /* memory */ - int irq_rid; /* irq rid */ + int irq_rid; /* irq rid */ struct resource *irq; /* irq */ }; typedef struct csa_res csa_res; Index: sys/dev/sound/pci/emu10k1.c =================================================================== --- sys/dev/sound/pci/emu10k1.c +++ sys/dev/sound/pci/emu10k1.c @@ -32,128 +32,129 @@ #include "opt_snd.h" #endif -#include -#include -#include +#include #include #include -#include - #include +#include +#include +#include + #include "mpufoi_if.h" /* -------------------------------------------------------------------- */ -#define NUM_G 64 /* use all channels */ -#define WAVEOUT_MAXBUFSIZE 32768 -#define EMUPAGESIZE 4096 /* don't change */ -#define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE) -#define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */ -#define EMU10K2_PCI_ID 0x00041102 -#define EMU10K3_PCI_ID 0x00081102 -#define EMU_DEFAULT_BUFSZ 4096 -#define EMU_MAX_CHANS 8 -#define EMU_CHANS 4 - -#define MAXREQVOICES 8 -#define RESERVED 0 -#define NUM_MIDI 16 -#define NUM_FXSENDS 4 - -#define TMEMSIZE 256*1024 -#define TMEMSIZEREG 4 - -#define ENABLE 0xffffffff -#define DISABLE 0x00000000 -#define ENV_ON EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK -#define ENV_OFF 0x00 /* XXX: should this be 1? */ - -#define EMU_A_IOCFG_GPOUT_A 0x40 -#define EMU_A_IOCFG_GPOUT_D 0x04 -#define EMU_A_IOCFG_GPOUT_AD (EMU_A_IOCFG_GPOUT_A|EMU_A_IOCFG_GPOUT_D) /* EMU_A_IOCFG_GPOUT0 */ - -#define EMU_HCFG_GPOUT1 0x00000800 +#define NUM_G 64 /* use all channels */ +#define WAVEOUT_MAXBUFSIZE 32768 +#define EMUPAGESIZE 4096 /* don't change */ +#define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE) +#define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */ +#define EMU10K2_PCI_ID 0x00041102 +#define EMU10K3_PCI_ID 0x00081102 +#define EMU_DEFAULT_BUFSZ 4096 +#define EMU_MAX_CHANS 8 +#define EMU_CHANS 4 + +#define MAXREQVOICES 8 +#define RESERVED 0 +#define NUM_MIDI 16 +#define NUM_FXSENDS 4 + +#define TMEMSIZE 256 * 1024 +#define TMEMSIZEREG 4 + +#define ENABLE 0xffffffff +#define DISABLE 0x00000000 +#define ENV_ON EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK +#define ENV_OFF 0x00 /* XXX: should this be 1? */ + +#define EMU_A_IOCFG_GPOUT_A 0x40 +#define EMU_A_IOCFG_GPOUT_D 0x04 +#define EMU_A_IOCFG_GPOUT_AD \ + (EMU_A_IOCFG_GPOUT_A | EMU_A_IOCFG_GPOUT_D) /* EMU_A_IOCFG_GPOUT0 */ + +#define EMU_HCFG_GPOUT1 0x00000800 /* instruction set */ -#define iACC3 0x06 +#define iACC3 0x06 #define iMACINT0 0x04 -#define iINTERP 0x0e +#define iINTERP 0x0e -#define C_00000000 0x40 -#define C_00000001 0x41 -#define C_00000004 0x44 -#define C_40000000 0x4d +#define C_00000000 0x40 +#define C_00000001 0x41 +#define C_00000004 0x44 +#define C_40000000 0x4d /* Audigy constants */ -#define A_C_00000000 0xc0 -#define A_C_40000000 0xcd +#define A_C_00000000 0xc0 +#define A_C_40000000 0xcd /* GPRs */ -#define FXBUS(x) (0x00 + (x)) -#define EXTIN(x) (0x10 + (x)) -#define EXTOUT(x) (0x20 + (x)) +#define FXBUS(x) (0x00 + (x)) +#define EXTIN(x) (0x10 + (x)) +#define EXTOUT(x) (0x20 + (x)) -#define GPR(x) (EMU_FXGPREGBASE + (x)) -#define A_EXTIN(x) (0x40 + (x)) -#define A_FXBUS(x) (0x00 + (x)) -#define A_EXTOUT(x) (0x60 + (x)) -#define A_GPR(x) (EMU_A_FXGPREGBASE + (x)) +#define GPR(x) (EMU_FXGPREGBASE + (x)) +#define A_EXTIN(x) (0x40 + (x)) +#define A_FXBUS(x) (0x00 + (x)) +#define A_EXTOUT(x) (0x60 + (x)) +#define A_GPR(x) (EMU_A_FXGPREGBASE + (x)) /* FX buses */ -#define FXBUS_PCM_LEFT 0x00 -#define FXBUS_PCM_RIGHT 0x01 -#define FXBUS_MIDI_LEFT 0x04 -#define FXBUS_MIDI_RIGHT 0x05 -#define FXBUS_MIDI_REVERB 0x0c -#define FXBUS_MIDI_CHORUS 0x0d +#define FXBUS_PCM_LEFT 0x00 +#define FXBUS_PCM_RIGHT 0x01 +#define FXBUS_MIDI_LEFT 0x04 +#define FXBUS_MIDI_RIGHT 0x05 +#define FXBUS_MIDI_REVERB 0x0c +#define FXBUS_MIDI_CHORUS 0x0d /* Inputs */ -#define EXTIN_AC97_L 0x00 -#define EXTIN_AC97_R 0x01 -#define EXTIN_SPDIF_CD_L 0x02 -#define EXTIN_SPDIF_CD_R 0x03 -#define EXTIN_TOSLINK_L 0x06 -#define EXTIN_TOSLINK_R 0x07 -#define EXTIN_COAX_SPDIF_L 0x0a -#define EXTIN_COAX_SPDIF_R 0x0b +#define EXTIN_AC97_L 0x00 +#define EXTIN_AC97_R 0x01 +#define EXTIN_SPDIF_CD_L 0x02 +#define EXTIN_SPDIF_CD_R 0x03 +#define EXTIN_TOSLINK_L 0x06 +#define EXTIN_TOSLINK_R 0x07 +#define EXTIN_COAX_SPDIF_L 0x0a +#define EXTIN_COAX_SPDIF_R 0x0b /* Audigy Inputs */ -#define A_EXTIN_AC97_L 0x00 -#define A_EXTIN_AC97_R 0x01 +#define A_EXTIN_AC97_L 0x00 +#define A_EXTIN_AC97_R 0x01 /* Outputs */ -#define EXTOUT_AC97_L 0x00 -#define EXTOUT_AC97_R 0x01 -#define EXTOUT_TOSLINK_L 0x02 -#define EXTOUT_TOSLINK_R 0x03 +#define EXTOUT_AC97_L 0x00 +#define EXTOUT_AC97_R 0x01 +#define EXTOUT_TOSLINK_L 0x02 +#define EXTOUT_TOSLINK_R 0x03 #define EXTOUT_AC97_CENTER 0x04 -#define EXTOUT_AC97_LFE 0x05 +#define EXTOUT_AC97_LFE 0x05 #define EXTOUT_HEADPHONE_L 0x06 #define EXTOUT_HEADPHONE_R 0x07 -#define EXTOUT_REAR_L 0x08 -#define EXTOUT_REAR_R 0x09 -#define EXTOUT_ADC_CAP_L 0x0a -#define EXTOUT_ADC_CAP_R 0x0b -#define EXTOUT_ACENTER 0x11 -#define EXTOUT_ALFE 0x12 +#define EXTOUT_REAR_L 0x08 +#define EXTOUT_REAR_R 0x09 +#define EXTOUT_ADC_CAP_L 0x0a +#define EXTOUT_ADC_CAP_R 0x0b +#define EXTOUT_ACENTER 0x11 +#define EXTOUT_ALFE 0x12 /* Audigy Outputs */ -#define A_EXTOUT_FRONT_L 0x00 -#define A_EXTOUT_FRONT_R 0x01 -#define A_EXTOUT_CENTER 0x02 -#define A_EXTOUT_LFE 0x03 -#define A_EXTOUT_HEADPHONE_L 0x04 -#define A_EXTOUT_HEADPHONE_R 0x05 -#define A_EXTOUT_REAR_L 0x06 -#define A_EXTOUT_REAR_R 0x07 -#define A_EXTOUT_AFRONT_L 0x08 -#define A_EXTOUT_AFRONT_R 0x09 -#define A_EXTOUT_ACENTER 0x0a -#define A_EXTOUT_ALFE 0x0b -#define A_EXTOUT_AREAR_L 0x0e -#define A_EXTOUT_AREAR_R 0x0f -#define A_EXTOUT_AC97_L 0x10 -#define A_EXTOUT_AC97_R 0x11 -#define A_EXTOUT_ADC_CAP_L 0x16 -#define A_EXTOUT_ADC_CAP_R 0x17 +#define A_EXTOUT_FRONT_L 0x00 +#define A_EXTOUT_FRONT_R 0x01 +#define A_EXTOUT_CENTER 0x02 +#define A_EXTOUT_LFE 0x03 +#define A_EXTOUT_HEADPHONE_L 0x04 +#define A_EXTOUT_HEADPHONE_R 0x05 +#define A_EXTOUT_REAR_L 0x06 +#define A_EXTOUT_REAR_R 0x07 +#define A_EXTOUT_AFRONT_L 0x08 +#define A_EXTOUT_AFRONT_R 0x09 +#define A_EXTOUT_ACENTER 0x0a +#define A_EXTOUT_ALFE 0x0b +#define A_EXTOUT_AREAR_L 0x0e +#define A_EXTOUT_AREAR_R 0x0f +#define A_EXTOUT_AC97_L 0x10 +#define A_EXTOUT_AC97_R 0x11 +#define A_EXTOUT_ADC_CAP_L 0x16 +#define A_EXTOUT_ADC_CAP_R 0x17 struct emu_memblk { SLIST_ENTRY(emu_memblk) link; @@ -176,11 +177,11 @@ struct emu_voice { int vnum; - unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1; + unsigned int b16 : 1, stereo : 1, busy : 1, running : 1, ismaster : 1; int speed; int start, end, vol; - int fxrt1; /* FX routing */ - int fxrt2; /* FX routing (only for audigy) */ + int fxrt1; /* FX routing */ + int fxrt2; /* FX routing (only for audigy) */ u_int32_t buf; struct emu_voice *slave; struct pcm_channel *channel; @@ -207,18 +208,18 @@ /* device private data */ struct sc_info { - device_t dev; - u_int32_t type, rev; - u_int32_t tos_link:1, APS:1, audigy:1, audigy2:1; - u_int32_t addrmask; /* wider if audigy */ + device_t dev; + u_int32_t type, rev; + u_int32_t tos_link : 1, APS : 1, audigy : 1, audigy2 : 1; + u_int32_t addrmask; /* wider if audigy */ bus_space_tag_t st; bus_space_handle_t sh; bus_dma_tag_t parent_dmat; struct resource *reg, *irq; - void *ih; - struct mtx *lock; + void *ih; + struct mtx *lock; unsigned int bufsz; int timer, timerinterval; @@ -228,8 +229,8 @@ struct emu_voice voice[64]; struct sc_pchinfo pch[EMU_MAX_CHANS]; struct sc_rchinfo rch[3]; - struct mpu401 *mpu; - mpu401_intr_t *mpu_intr; + struct mpu401 *mpu; + mpu401_intr_t *mpu_intr; int mputx; }; @@ -242,7 +243,8 @@ /* stuff */ static int emu_init(struct sc_info *); static void emu_intr(void *); -static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr, bus_dmamap_t *map); +static void *emu_malloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr, + bus_dmamap_t *map); static void *emu_memalloc(struct sc_info *sc, u_int32_t sz, bus_addr_t *addr); static int emu_memfree(struct sc_info *sc, void *buf); static int emu_memstart(struct sc_info *sc, void *buf); @@ -256,43 +258,30 @@ /* -------------------------------------------------------------------- */ -static u_int32_t emu_rfmt_ac97[] = { - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; +static u_int32_t emu_rfmt_ac97[] = { SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; -static u_int32_t emu_rfmt_mic[] = { - SND_FORMAT(AFMT_U8, 1, 0), - 0 -}; +static u_int32_t emu_rfmt_mic[] = { SND_FORMAT(AFMT_U8, 1, 0), 0 }; -static u_int32_t emu_rfmt_efx[] = { - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; +static u_int32_t emu_rfmt_efx[] = { SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; static struct pcmchan_caps emu_reccaps[3] = { - {8000, 48000, emu_rfmt_ac97, 0}, - {8000, 8000, emu_rfmt_mic, 0}, - {48000, 48000, emu_rfmt_efx, 0}, + { 8000, 48000, emu_rfmt_ac97, 0 }, + { 8000, 8000, emu_rfmt_mic, 0 }, + { 48000, 48000, emu_rfmt_efx, 0 }, }; -static u_int32_t emu_pfmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; +static u_int32_t emu_pfmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; -static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0}; +static struct pcmchan_caps emu_playcaps = { 4000, 48000, emu_pfmt, 0 }; -static int adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000}; +static int adcspeed[8] = { 48000, 44100, 32000, 24000, 22050, 16000, 11025, + 8000 }; /* audigy supports 12kHz. */ -static int audigy_adcspeed[9] = { - 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000 -}; +static int audigy_adcspeed[9] = { 48000, 44100, 32000, 24000, 22050, 16000, + 12000, 11025, 8000 }; /* -------------------------------------------------------------------- */ /* Hardware */ @@ -393,11 +382,8 @@ return 0; } -static kobj_method_t emu_ac97_methods[] = { - KOBJMETHOD(ac97_read, emu_rdcd), - KOBJMETHOD(ac97_write, emu_wrcd), - KOBJMETHOD_END -}; +static kobj_method_t emu_ac97_methods[] = { KOBJMETHOD(ac97_read, emu_rdcd), + KOBJMETHOD(ac97_write, emu_wrcd), KOBJMETHOD_END }; AC97_DECLARE(emu_ac97); /* -------------------------------------------------------------------- */ @@ -413,8 +399,8 @@ for (i = 0; i < sc->nchans; i++) { pch = &sc->pch[i]; if (pch->buffer) { - tmp = (pch->spd * sndbuf_getalign(pch->buffer)) - / pch->blksz; + tmp = (pch->spd * sndbuf_getalign(pch->buffer)) / + pch->blksz; if (tmp > rate) rate = tmp; } @@ -423,8 +409,8 @@ for (i = 0; i < 3; i++) { rch = &sc->rch[i]; if (rch->buffer) { - tmp = (rch->spd * sndbuf_getalign(rch->buffer)) - / rch->blksz; + tmp = (rch->spd * sndbuf_getalign(rch->buffer)) / + rch->blksz; if (tmp > rate) rate = tmp; } @@ -466,7 +452,8 @@ } static int -emu_recval(int speed) { +emu_recval(int speed) +{ int val; val = 0; @@ -476,7 +463,8 @@ } static int -audigy_recval(int speed) { +audigy_recval(int speed) +{ int val; val = 0; @@ -488,58 +476,55 @@ static u_int32_t emu_rate_to_pitch(u_int32_t rate) { - static u_int32_t logMagTable[128] = { - 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, - 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, - 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, - 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, - 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, - 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, - 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, - 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, - 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, - 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, - 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, - 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, - 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, - 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, - 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, - 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df - }; - static char logSlopeTable[128] = { - 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, - 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, - 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, - 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, - 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, - 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, - 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, - 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, - 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, - 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, - 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, - 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, - 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, - 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, - 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, - 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f - }; + static u_int32_t logMagTable[128] = { 0x00000, 0x02dfc, 0x05b9e, + 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 0x1663f, 0x1918a, + 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 0x2b803, + 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, + 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, + 0x50191, 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, + 0x60029, 0x623a7, 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, + 0x6f43c, 0x7164b, 0x73829, 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, + 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, 0x86082, 0x88089, 0x8a064, + 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 0x95c01, 0x97ab4, + 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 0xa4d3c, + 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, + 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, + 0xbf899, 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, + 0xcb5ed, 0xcd07c, 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, + 0xd6d60, 0xd8720, 0xda0c3, 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, + 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, 0xe829f, 0xe9b31, 0xeb3a9, + 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 0xf4463, 0xf5c2a, + 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df }; + static char logSlopeTable[128] = { 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, + 0x58, 0x58, 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, + 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 0x4e, 0x4d, + 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 0x4a, 0x4a, 0x49, 0x49, + 0x48, 0x48, 0x47, 0x47, 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, + 0x44, 0x44, 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, + 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 0x3e, 0x3e, + 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 0x3b, 0x3b, 0x3b, 0x3b, + 0x3a, 0x3a, 0x3a, 0x39, 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, + 0x38, 0x37, 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, + 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 0x33, 0x33, + 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 0x32, 0x31, 0x31, 0x31, + 0x31, 0x31, 0x30, 0x30, 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, + 0x2f, 0x2f }; int i; if (rate == 0) - return 0; /* Bail out if no leading "1" */ - rate *= 11185; /* Scale 48000 to 0x20002380 */ + return 0; /* Bail out if no leading "1" */ + rate *= 11185; /* Scale 48000 to 0x20002380 */ for (i = 31; i > 0; i--) { - if (rate & 0x80000000) { /* Detect leading "1" */ - return (((u_int32_t) (i - 15) << 20) + + if (rate & 0x80000000) { /* Detect leading "1" */ + return (((u_int32_t)(i - 15) << 20) + logMagTable[0x7f & (rate >> 24)] + (0x7f & (rate >> 17)) * - logSlopeTable[0x7f & (rate >> 24)]); + logSlopeTable[0x7f & (rate >> 24)]); } rate <<= 1; } - return 0; /* Should never reach this point */ + return 0; /* Should never reach this point */ } static u_int32_t @@ -556,7 +541,8 @@ int i; v = NULL; - for (i = 0; i < 64 && sc->voice[i].busy; i++); + for (i = 0; i < 64 && sc->voice[i].busy; i++) + ; if (i < 64) { v = &sc->voice[i]; v->busy = 1; @@ -566,7 +552,7 @@ static int emu_vinit(struct sc_info *sc, struct emu_voice *m, struct emu_voice *s, - u_int32_t sz, struct snd_dbuf *b) + u_int32_t sz, struct snd_dbuf *b) { void *buf; bus_addr_t tmp_addr; @@ -590,7 +576,7 @@ if (sc->audigy) { m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 8 | FXBUS_PCM_LEFT << 16 | FXBUS_MIDI_REVERB << 24; - m->fxrt2 = 0x3f3f3f3f; /* No effects on second route */ + m->fxrt2 = 0x3f3f3f3f; /* No effects on second route */ } else { m->fxrt1 = FXBUS_MIDI_CHORUS | FXBUS_PCM_RIGHT << 4 | FXBUS_PCM_LEFT << 8 | FXBUS_MIDI_REVERB << 12; @@ -653,7 +639,8 @@ r = v->ismaster ? 0 : r; } - emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, v->stereo ? EMU_CHAN_CPF_STEREO_MASK : 0); + emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, + v->stereo ? EMU_CHAN_CPF_STEREO_MASK : 0); val = v->stereo ? 28 : 30; val *= v->b16 ? 1 : 2; start = sa + val; @@ -662,27 +649,28 @@ emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, v->fxrt1); emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, v->fxrt2); emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, 0); - } - else + } else emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, v->fxrt1 << 16); emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (x << 8) | r); emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, ea | (y << 24)); emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, sa | (l << 24)); - emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); + emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, + start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0); emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0); - silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1) - | EMU_CHAN_MAP_PTI_MASK; + silent_page = ((u_int32_t)(sc->mem.silent_page_addr) << 1) | + EMU_CHAN_MAP_PTI_MASK; emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page); emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page); emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK); emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK); emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0); - emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK); + emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, + EMU_CHAN_DCYSUSM_DECAYTIME_MASK); emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000); emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000); emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0); @@ -751,7 +739,8 @@ int s, ptr; s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); - ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s; + ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) + << s; return ptr & ~0x0000001f; } @@ -759,20 +748,14 @@ static void emu_vdump(struct sc_info *sc, struct emu_voice *v) { - char *regname[] = { - "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl", - "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL, - "envvol", "atkhldv", "dcysusv", "lfoval1", - "envval", "atkhldm", "dcysusm", "lfoval2", - "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2", - "tempenv" - }; - char *regname2[] = { - "mudata1", "mustat1", "mudata2", "mustat2", - "fxwc1", "fxwc2", "spdrate", NULL, NULL, - NULL, NULL, NULL, "fxrt2", "sndamnt", "fxrt1", - NULL, NULL - }; + char *regname[] = { "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", + "dsl", "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL, NULL, + "envvol", "atkhldv", "dcysusv", "lfoval1", "envval", "atkhldm", + "dcysusm", "lfoval2", "ip", "ifatn", "pefe", "fmmod", "tremfrq", + "fmfrq2", "tempenv" }; + char *regname2[] = { "mudata1", "mustat1", "mudata2", "mustat2", + "fxwc1", "fxwc2", "spdrate", NULL, NULL, NULL, NULL, NULL, + "fxrt2", "sndamnt", "fxrt1", NULL, NULL }; int i, x; printf("voice number %d\n", v->vnum); @@ -793,7 +776,7 @@ continue; printf("%s\t[%08x]", regname2[i], emu_rdptr(sc, v->vnum, i + 0x70)); - printf("%s", (x == 2)? "\n" : "\t"); + printf("%s", (x == 2) ? "\n" : "\t"); x++; if (x > 2) x = 0; @@ -824,8 +807,9 @@ ch->master = emu_valloc(sc); ch->slave = emu_valloc(sc); snd_mtxunlock(sc->lock); - r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer)) - ? NULL : ch; + r = (emu_vinit(sc, ch->master, ch->slave, sc->bufsz, ch->buffer)) ? + NULL : + ch; return r; } @@ -891,10 +875,8 @@ emu_settimer(sc); emu_enatimer(sc, 1); #ifdef EMUDEBUG - printf("start [%d bit, %s, %d hz]\n", - ch->master->b16 ? 16 : 8, - ch->master->stereo ? "stereo" : "mono", - ch->master->speed); + printf("start [%d bit, %s, %d hz]\n", ch->master->b16 ? 16 : 8, + ch->master->stereo ? "stereo" : "mono", ch->master->speed); emu_vdump(sc, ch->master); emu_vdump(sc, ch->slave); #endif @@ -925,17 +907,15 @@ return &emu_playcaps; } -static kobj_method_t emupchan_methods[] = { - KOBJMETHOD(channel_init, emupchan_init), - KOBJMETHOD(channel_free, emupchan_free), - KOBJMETHOD(channel_setformat, emupchan_setformat), - KOBJMETHOD(channel_setspeed, emupchan_setspeed), - KOBJMETHOD(channel_setblocksize, emupchan_setblocksize), - KOBJMETHOD(channel_trigger, emupchan_trigger), - KOBJMETHOD(channel_getptr, emupchan_getptr), - KOBJMETHOD(channel_getcaps, emupchan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t emupchan_methods[] = { KOBJMETHOD(channel_init, + emupchan_init), + KOBJMETHOD(channel_free, emupchan_free), + KOBJMETHOD(channel_setformat, emupchan_setformat), + KOBJMETHOD(channel_setspeed, emupchan_setspeed), + KOBJMETHOD(channel_setblocksize, emupchan_setblocksize), + KOBJMETHOD(channel_trigger, emupchan_trigger), + KOBJMETHOD(channel_getptr, emupchan_getptr), + KOBJMETHOD(channel_getcaps, emupchan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(emupchan); /* channel interface */ @@ -955,7 +935,7 @@ ch->fmt = SND_FORMAT(AFMT_U8, 1, 0); ch->spd = 8000; ch->num = sc->rnum; - switch(sc->rnum) { + switch (sc->rnum) { case 0: ch->idxreg = sc->audigy ? EMU_A_ADCIDX : EMU_ADCIDX; ch->basereg = EMU_ADCBA; @@ -1044,7 +1024,7 @@ if (!PCMTRIG_COMMON(go)) return 0; - switch(sc->bufsz) { + switch (sc->bufsz) { case 4096: sz = EMU_RECBS_BUFSIZE_4096; break; @@ -1070,7 +1050,7 @@ } snd_mtxlock(sc->lock); - switch(go) { + switch (go) { case PCMTRIG_START: ch->run = 1; emu_wrptr(sc, 0, ch->sizereg, sz); @@ -1138,16 +1118,14 @@ return &emu_reccaps[ch->num]; } -static kobj_method_t emurchan_methods[] = { - KOBJMETHOD(channel_init, emurchan_init), - KOBJMETHOD(channel_setformat, emurchan_setformat), - KOBJMETHOD(channel_setspeed, emurchan_setspeed), - KOBJMETHOD(channel_setblocksize, emurchan_setblocksize), - KOBJMETHOD(channel_trigger, emurchan_trigger), - KOBJMETHOD(channel_getptr, emurchan_getptr), - KOBJMETHOD(channel_getcaps, emurchan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t emurchan_methods[] = { KOBJMETHOD(channel_init, + emurchan_init), + KOBJMETHOD(channel_setformat, emurchan_setformat), + KOBJMETHOD(channel_setspeed, emurchan_setspeed), + KOBJMETHOD(channel_setblocksize, emurchan_setblocksize), + KOBJMETHOD(channel_trigger, emurchan_trigger), + KOBJMETHOD(channel_getptr, emurchan_getptr), + KOBJMETHOD(channel_getcaps, emurchan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(emurchan); static unsigned char @@ -1178,12 +1156,9 @@ return 0; } -static kobj_method_t emu_mpu_methods[] = { - KOBJMETHOD(mpufoi_read, emu_mread), - KOBJMETHOD(mpufoi_write, emu_mwrite), - KOBJMETHOD(mpufoi_uninit, emu_muninit), - KOBJMETHOD_END -}; +static kobj_method_t emu_mpu_methods[] = { KOBJMETHOD(mpufoi_read, emu_mread), + KOBJMETHOD(mpufoi_write, emu_mwrite), + KOBJMETHOD(mpufoi_uninit, emu_muninit), KOBJMETHOD_END }; static DEFINE_CLASS(emu_mpu, emu_mpu_methods, 0); @@ -1193,7 +1168,7 @@ struct sc_info *sc = (struct sc_info *)p; if (sc->mpu_intr) - (sc->mpu_intr)(sc->mpu); + (sc->mpu_intr)(sc->mpu); } static void @@ -1228,18 +1203,22 @@ ack |= EMU_IPR_INTERVALTIMER; if (stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) - ack |= stat & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL); + ack |= stat & + (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL); if (stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) - ack |= stat & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL); + ack |= stat & + (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL); if (stat & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL)) - ack |= stat & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL); + ack |= stat & + (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL); if (stat & EMU_PCIERROR) { ack |= EMU_PCIERROR; device_printf(sc->dev, "pci error\n"); - /* we still get an nmi with ecc ram even if we ack this */ + /* we still get an nmi with ecc ram even if we ack this + */ } if (stat & EMU_IPR_RATETRCHANGE) { ack |= EMU_IPR_RATETRCHANGE; @@ -1252,7 +1231,8 @@ if (stat & EMU_IPR_MIDIRECVBUFE) { if (sc->mpu_intr) { (sc->mpu_intr)(sc->mpu); - ack |= EMU_IPR_MIDIRECVBUFE | EMU_IPR_MIDITRANSBUFE; + ack |= EMU_IPR_MIDIRECVBUFE | + EMU_IPR_MIDITRANSBUFE; } } if (stat & ~ack) @@ -1276,15 +1256,18 @@ emu_enatimer(sc, 0); } - if (ack & (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) { + if (ack & + (EMU_IPR_ADCBUFFULL | EMU_IPR_ADCBUFHALFFULL)) { if (sc->rch[0].channel) chn_intr(sc->rch[0].channel); } - if (ack & (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) { + if (ack & + (EMU_IPR_EFXBUFFULL | EMU_IPR_EFXBUFHALFFULL)) { if (sc->rch[1].channel) chn_intr(sc->rch[1].channel); } - if (ack & (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL)) { + if (ack & + (EMU_IPR_MICBUFFULL | EMU_IPR_MICBUFHALFFULL)) { if (sc->rch[2].channel) chn_intr(sc->rch[2].channel); } @@ -1321,7 +1304,8 @@ if (bus_dmamem_alloc(sc->parent_dmat, &buf, BUS_DMA_NOWAIT, map)) return NULL; if (bus_dmamap_load(sc->parent_dmat, *map, buf, sz, emu_setmap, addr, - BUS_DMA_NOWAIT) || !*addr) { + BUS_DMA_NOWAIT) || + !*addr) { bus_dmamem_free(sc->parent_dmat, buf, *map); return NULL; } @@ -1372,8 +1356,8 @@ blk->pte_start = start; blk->pte_size = blksz; #ifdef EMUDEBUG - printf("buf %p, pte_start %d, pte_size %d\n", blk->buf, - blk->pte_start, blk->pte_size); + printf("buf %p, pte_start %d, pte_size %d\n", blk->buf, blk->pte_start, + blk->pte_size); #endif ofs = 0; for (idx = start; idx < start + blksz; idx++) { @@ -1398,7 +1382,7 @@ struct emu_memblk *blk, *i; blk = NULL; - SLIST_FOREACH(i, &mem->blocks, link) { + SLIST_FOREACH (i, &mem->blocks, link) { if (i->buf == buf) blk = i; } @@ -1407,7 +1391,8 @@ SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); emu_free(sc, buf, blk->buf_map); tmp = (u_int32_t)(sc->mem.silent_page_addr) << 1; - for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { + for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; + idx++) { mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); mem->ptb_pages[idx] = tmp | idx; } @@ -1422,7 +1407,7 @@ struct emu_memblk *blk, *i; blk = NULL; - SLIST_FOREACH(i, &mem->blocks, link) { + SLIST_FOREACH (i, &mem->blocks, link) { if (i->buf == buf) blk = i; } @@ -1514,52 +1499,52 @@ /* AC97Output[l/r] = FXBus PCM[l/r] */ audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_L), A_C_00000000, - A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc); + A_C_00000000, A_FXBUS(FXBUS_PCM_LEFT), &pc); audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AC97_R), A_C_00000000, - A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc); + A_C_00000000, A_FXBUS(FXBUS_PCM_RIGHT), &pc); /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */ - audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000, - A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_L), &pc); - audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000, - A_C_00000000, A_EXTIN(EXTIN_COAX_SPDIF_R), &pc); + audigy_addefxop(sc, iACC3, A_GPR(0), A_C_00000000, A_C_00000000, + A_EXTIN(EXTIN_COAX_SPDIF_L), &pc); + audigy_addefxop(sc, iACC3, A_GPR(1), A_C_00000000, A_C_00000000, + A_EXTIN(EXTIN_COAX_SPDIF_R), &pc); /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */ - audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1), - A_C_40000000, A_GPR(0), &pc); + audigy_addefxop(sc, iINTERP, A_GPR(2), A_GPR(1), A_C_40000000, A_GPR(0), + &pc); /* Headphones[l/r] = GPR[0/1] */ - audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L), - A_C_00000000, A_C_00000000, A_GPR(0), &pc); - audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R), - A_C_00000000, A_C_00000000, A_GPR(1), &pc); + audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_L), A_C_00000000, + A_C_00000000, A_GPR(0), &pc); + audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_HEADPHONE_R), A_C_00000000, + A_C_00000000, A_GPR(1), &pc); /* Analog Front[l/r] = GPR[0/1] */ audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_L), A_C_00000000, - A_C_00000000, A_GPR(0), &pc); + A_C_00000000, A_GPR(0), &pc); audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AFRONT_R), A_C_00000000, - A_C_00000000, A_GPR(1), &pc); + A_C_00000000, A_GPR(1), &pc); /* Digital Front[l/r] = GPR[0/1] */ audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L), A_C_00000000, - A_C_00000000, A_GPR(0), &pc); + A_C_00000000, A_GPR(0), &pc); audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_FRONT_R), A_C_00000000, - A_C_00000000, A_GPR(1), &pc); + A_C_00000000, A_GPR(1), &pc); /* Center and Subwoofer configuration */ /* Analog Center = GPR[0] + GPR[2] */ audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ACENTER), A_C_00000000, - A_GPR(0), A_GPR(2), &pc); + A_GPR(0), A_GPR(2), &pc); /* Analog Sub = GPR[1] + GPR[2] */ audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ALFE), A_C_00000000, - A_GPR(1), A_GPR(2), &pc); + A_GPR(1), A_GPR(2), &pc); /* Digital Center = GPR[0] + GPR[2] */ audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_CENTER), A_C_00000000, - A_GPR(0), A_GPR(2), &pc); + A_GPR(0), A_GPR(2), &pc); /* Digital Sub = GPR[1] + GPR[2] */ audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_LFE), A_C_00000000, - A_GPR(1), A_GPR(2), &pc); + A_GPR(1), A_GPR(2), &pc); #if 0 /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */ @@ -1582,22 +1567,22 @@ /* Analog Rear[l/r] = GPR[0/1] */ audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_L), A_C_00000000, - A_C_00000000, A_GPR(0), &pc); + A_C_00000000, A_GPR(0), &pc); audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_AREAR_R), A_C_00000000, - A_C_00000000, A_GPR(1), &pc); + A_C_00000000, A_GPR(1), &pc); /* Digital Rear[l/r] = GPR[0/1] */ audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_L), A_C_00000000, - A_C_00000000, A_GPR(0), &pc); + A_C_00000000, A_GPR(0), &pc); audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_REAR_R), A_C_00000000, - A_C_00000000, A_GPR(1), &pc); + A_C_00000000, A_GPR(1), &pc); #endif /* ADC Recording buffer[l/r] = AC97Input[l/r] */ audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_L), A_C_00000000, - A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc); + A_C_00000000, A_EXTIN(A_EXTIN_AC97_L), &pc); audigy_addefxop(sc, iACC3, A_EXTOUT(A_EXTOUT_ADC_CAP_R), A_C_00000000, - A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc); + A_C_00000000, A_EXTIN(A_EXTIN_AC97_R), &pc); /* resume normal operations */ emu_wrptr(sc, 0, EMU_A_DBG, 0); @@ -1665,21 +1650,21 @@ /* GPR[0/1] = FX * 4 + SPDIF-in */ emu_addefxop(sc, iMACINT0, GPR(0), EXTIN(EXTIN_SPDIF_CD_L), - FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc); + FXBUS(FXBUS_PCM_LEFT), C_00000004, &pc); emu_addefxop(sc, iMACINT0, GPR(1), EXTIN(EXTIN_SPDIF_CD_R), - FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc); + FXBUS(FXBUS_PCM_RIGHT), C_00000004, &pc); /* GPR[0/1] += APS-input */ emu_addefxop(sc, iACC3, GPR(0), GPR(0), C_00000000, - sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc); + sc->APS ? EXTIN(EXTIN_TOSLINK_L) : C_00000000, &pc); emu_addefxop(sc, iACC3, GPR(1), GPR(1), C_00000000, - sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc); + sc->APS ? EXTIN(EXTIN_TOSLINK_R) : C_00000000, &pc); /* FrontOut (AC97) = GPR[0/1] */ - emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000, - C_00000000, GPR(0), &pc); - emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000, - C_00000001, GPR(1), &pc); + emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_L), C_00000000, C_00000000, + GPR(0), &pc); + emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_R), C_00000000, C_00000001, + GPR(1), &pc); /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */ emu_addefxop(sc, iINTERP, GPR(2), GPR(1), C_40000000, GPR(0), &pc); @@ -1697,43 +1682,43 @@ */ /* Rear[l/r] = GPR[0/1] */ - emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000, - C_00000000, GPR(0), &pc); - emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000, - C_00000000, GPR(1), &pc); + emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_L), C_00000000, C_00000000, + GPR(0), &pc); + emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_REAR_R), C_00000000, C_00000000, + GPR(1), &pc); #endif /* TOS out[l/r] = GPR[0/1] */ emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_L), C_00000000, - C_00000000, GPR(0), &pc); + C_00000000, GPR(0), &pc); emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_TOSLINK_R), C_00000000, - C_00000000, GPR(1), &pc); + C_00000000, GPR(1), &pc); /* Center and Subwoofer configuration */ /* Analog Center = GPR[0] + GPR[2] */ - emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000, - GPR(0), GPR(2), &pc); + emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ACENTER), C_00000000, GPR(0), + GPR(2), &pc); /* Analog Sub = GPR[1] + GPR[2] */ - emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000, - GPR(1), GPR(2), &pc); + emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ALFE), C_00000000, GPR(1), GPR(2), + &pc); /* Digital Center = GPR[0] + GPR[2] */ - emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_CENTER), C_00000000, - GPR(0), GPR(2), &pc); + emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_CENTER), C_00000000, GPR(0), + GPR(2), &pc); /* Digital Sub = GPR[1] + GPR[2] */ - emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_LFE), C_00000000, - GPR(1), GPR(2), &pc); + emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_AC97_LFE), C_00000000, GPR(1), + GPR(2), &pc); /* Headphones[l/r] = GPR[0/1] */ emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_L), C_00000000, - C_00000000, GPR(0), &pc); + C_00000000, GPR(0), &pc); emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_HEADPHONE_R), C_00000000, - C_00000000, GPR(1), &pc); + C_00000000, GPR(1), &pc); /* ADC Recording buffer[l/r] = AC97Input[l/r] */ emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_L), C_00000000, - C_00000000, EXTIN(EXTIN_AC97_L), &pc); + C_00000000, EXTIN(EXTIN_AC97_L), &pc); emu_addefxop(sc, iACC3, EXTOUT(EXTOUT_ADC_CAP_R), C_00000000, - C_00000000, EXTIN(EXTIN_AC97_R), &pc); + C_00000000, EXTIN(EXTIN_AC97_R), &pc); /* resume normal operations */ emu_wrptr(sc, 0, EMU_DBG, 0); @@ -1747,12 +1732,14 @@ if (sc->audigy) { /* enable additional AC97 slots */ - emu_wrptr(sc, 0, EMU_AC97SLOT, EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE); + emu_wrptr(sc, 0, EMU_AC97SLOT, + EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE); } /* disable audio and lock cache */ emu_wr(sc, EMU_HCFG, - EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, + EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | + EMU_HCFG_MUTEBUTTONENABLE, 4); /* reset recording buffers */ @@ -1765,7 +1752,8 @@ /* disable channel interrupt */ emu_wr(sc, EMU_INTE, - EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, + EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | + EMU_INTE_PCIERRENABLE, 4); emu_wrptr(sc, 0, EMU_CLIEL, 0); emu_wrptr(sc, 0, EMU_CLIEH, 0); @@ -1800,8 +1788,8 @@ emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff); emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0); emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0); - emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */ - emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */ + emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */ + emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */ emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0); /*** these are last so OFF prevents writing ***/ @@ -1861,7 +1849,7 @@ if (!sc->audigy) emu_initefx(sc); - else if (sc->audigy2) { /* Audigy 2 */ + else if (sc->audigy2) { /* Audigy 2 */ /* from ALSA initialization code: */ /* Hack for Alice3 to work independent of haP16V driver */ @@ -1899,8 +1887,8 @@ sc->mem.ptb_pages[i] = tmp | i; emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr)); - emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */ - emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */ + emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */ + emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */ for (ch = 0; ch < NUM_G; ch++) { emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK); @@ -1933,8 +1921,9 @@ if (sc->audigy) { tmp = EMU_HCFG_AUTOMUTE | EMU_HCFG_JOYENABLE; - if (sc->audigy2) /* Audigy 2 */ - tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AC3ENABLE_CDSPDIF | + if (sc->audigy2) /* Audigy 2 */ + tmp = EMU_HCFG_AUDIOENABLE | + EMU_HCFG_AC3ENABLE_CDSPDIF | EMU_HCFG_AC3ENABLE_GPSPDIF; emu_wr(sc, EMU_HCFG, tmp, 4); @@ -1943,22 +1932,24 @@ /* from ALSA initialization code: */ /* enable audio and disable both audio/digital outputs */ - emu_wr(sc, EMU_HCFG, emu_rd(sc, EMU_HCFG, 4) | EMU_HCFG_AUDIOENABLE, 4); - emu_wr(sc, EMU_A_IOCFG, emu_rd(sc, EMU_A_IOCFG, 4) & ~EMU_A_IOCFG_GPOUT_AD, - 4); - if (sc->audigy2) { /* Audigy 2 */ + emu_wr(sc, EMU_HCFG, + emu_rd(sc, EMU_HCFG, 4) | EMU_HCFG_AUDIOENABLE, 4); + emu_wr(sc, EMU_A_IOCFG, + emu_rd(sc, EMU_A_IOCFG, 4) & ~EMU_A_IOCFG_GPOUT_AD, 4); + if (sc->audigy2) { /* Audigy 2 */ /* Unmute Analog. * Set GPO6 to 1 for Apollo. This has to be done after * init Alice3 I2SOut beyond 48kHz. * So, sequence is important. */ emu_wr(sc, EMU_A_IOCFG, - emu_rd(sc, EMU_A_IOCFG, 4) | EMU_A_IOCFG_GPOUT_A, 4); + emu_rd(sc, EMU_A_IOCFG, 4) | EMU_A_IOCFG_GPOUT_A, + 4); } } else { /* EMU10K1 initialization code */ - tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_LOCKTANKCACHE_MASK - | EMU_HCFG_AUTOMUTE; + tmp = EMU_HCFG_AUDIOENABLE | EMU_HCFG_LOCKTANKCACHE_MASK | + EMU_HCFG_AUTOMUTE; if (sc->rev >= 6) tmp |= EMU_HCFG_JOYENABLE; @@ -1970,7 +1961,8 @@ if (tmp & (EMU_HCFG_GPINPUT0 | EMU_HCFG_GPINPUT1)) { emu_wr(sc, EMU_HCFG, tmp | EMU_HCFG_GPOUT1, 4); DELAY(50); - if (tmp != (emu_rd(sc, EMU_HCFG, 4) & ~EMU_HCFG_GPOUT1)) { + if (tmp != + (emu_rd(sc, EMU_HCFG, 4) & ~EMU_HCFG_GPOUT1)) { sc->tos_link = 1; emu_wr(sc, EMU_HCFG, tmp, 4); } @@ -1995,13 +1987,14 @@ emu_wrptr(sc, ch, EMU_CHAN_CPF, 0); } - if (sc->audigy) { /* stop fx processor */ + if (sc->audigy) { /* stop fx processor */ emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP); } /* disable audio and lock cache */ emu_wr(sc, EMU_HCFG, - EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, + EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | + EMU_HCFG_MUTEBUTTONENABLE, 4); emu_wrptr(sc, 0, EMU_PTB, 0); @@ -2028,8 +2021,8 @@ emu_free(sc, sc->mem.ptb_pages, sc->mem.ptb_map); emu_free(sc, sc->mem.silent_page, sc->mem.silent_map); - if(sc->mpu) - mpu401_uninit(sc->mpu); + if (sc->mpu) + mpu401_uninit(sc->mpu); return 0; } @@ -2093,13 +2086,13 @@ sc->bufsz = pcm_getbuffersize(dev, 4096, EMU_DEFAULT_BUFSZ, 65536); - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/(1U << 31) - 1, /* can only access 0-2gb */ - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, /*lockarg*/NULL, + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ (1U << 31) - 1, /* can only access 0-2gb */ + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ sc->bufsz, /*nsegments*/ 1, /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, /*lockarg*/ NULL, &sc->parent_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; @@ -2111,9 +2104,11 @@ } codec = AC97_CREATE(dev, sc, emu_ac97); - if (codec == NULL) goto bad; + if (codec == NULL) + goto bad; gotmic = (ac97_getcaps(codec) & AC97_CAP_MICCHANNEL) ? 1 : 0; - if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad; + if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) + goto bad; emu_midiattach(sc); @@ -2130,7 +2125,8 @@ rman_get_start(sc->reg), rman_get_start(sc->irq), device_get_nameunit(device_get_parent(dev))); - if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) goto bad; + if (pcm_register(dev, sc, sc->nchans, gotmic ? 3 : 2)) + goto bad; for (i = 0; i < sc->nchans; i++) pcm_addchan(dev, PCMDIR_PLAY, &emupchan_class, sc); for (i = 0; i < (gotmic ? 3 : 2); i++) @@ -2141,12 +2137,18 @@ return 0; bad: - if (codec) ac97_destroy(codec); - if (sc->reg) bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); - if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); - if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); - if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); - if (sc->lock) snd_mtxfree(sc->lock); + if (codec) + ac97_destroy(codec); + if (sc->reg) + bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg); + if (sc->ih) + bus_teardown_intr(dev, sc->irq, sc->ih); + if (sc->irq) + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq); + if (sc->parent_dmat) + bus_dma_tag_destroy(sc->parent_dmat); + if (sc->lock) + snd_mtxfree(sc->lock); free(sc, M_DEVBUF); return ENXIO; } @@ -2178,9 +2180,9 @@ /* add suspend, resume */ static device_method_t emu_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, emu_pci_probe), - DEVMETHOD(device_attach, emu_pci_attach), - DEVMETHOD(device_detach, emu_pci_detach), + DEVMETHOD(device_probe, emu_pci_probe), + DEVMETHOD(device_attach, emu_pci_attach), + DEVMETHOD(device_detach, emu_pci_detach), DEVMETHOD_END }; @@ -2213,7 +2215,8 @@ break; } - if (s) device_set_desc(dev, s); + if (s) + device_set_desc(dev, s); return s ? -1000 : ENXIO; } @@ -2231,18 +2234,15 @@ return 0; } -static device_method_t emujoy_methods[] = { - DEVMETHOD(device_probe, emujoy_pci_probe), - DEVMETHOD(device_attach, emujoy_pci_attach), - DEVMETHOD(device_detach, emujoy_pci_detach), +static device_method_t emujoy_methods[] = { DEVMETHOD(device_probe, + emujoy_pci_probe), + DEVMETHOD(device_attach, emujoy_pci_attach), + DEVMETHOD(device_detach, emujoy_pci_detach), - DEVMETHOD_END -}; + DEVMETHOD_END }; static driver_t emujoy_driver = { - "emujoy", - emujoy_methods, - 1 /* no softc */ + "emujoy", emujoy_methods, 1 /* no softc */ }; DRIVER_MODULE(emujoy, pci, emujoy_driver, NULL, NULL); Index: sys/dev/sound/pci/emu10kx-midi.c =================================================================== --- sys/dev/sound/pci/emu10kx-midi.c +++ sys/dev/sound/pci/emu10kx-midi.c @@ -28,44 +28,44 @@ * SUCH DAMAGE. */ -#include #include -#include -#include -#include +#include #include -#include -#include +#include #include #include +#include +#include +#include + +#include #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif #include -#include - #include #include -#include "mpufoi_if.h" - -#include #include +#include +#include + +#include "mpufoi_if.h" struct emu_midi_softc { - struct mtx mtx; - device_t dev; - struct mpu401 *mpu; - mpu401_intr_t *mpu_intr; + struct mtx mtx; + device_t dev; + struct mpu401 *mpu; + mpu401_intr_t *mpu_intr; struct emu_sc_info *card; - int port; /* I/O port or I/O ptr reg */ - int is_emu10k1; - int fflags; /* File flags */ - int ihandle; /* interrupt manager handle */ + int port; /* I/O port or I/O ptr reg */ + int is_emu10k1; + int fflags; /* File flags */ + int ihandle; /* interrupt manager handle */ }; -static uint32_t emu_midi_card_intr(void *p, uint32_t arg); +static uint32_t emu_midi_card_intr(void *p, uint32_t arg); static unsigned char emu_mread(struct mpu401 *arg __unused, void *cookie, int reg) @@ -105,12 +105,9 @@ return (0); } -static kobj_method_t emu_mpu_methods[] = { - KOBJMETHOD(mpufoi_read, emu_mread), +static kobj_method_t emu_mpu_methods[] = { KOBJMETHOD(mpufoi_read, emu_mread), KOBJMETHOD(mpufoi_write, emu_mwrite), - KOBJMETHOD(mpufoi_uninit, emu_muninit), - KOBJMETHOD_END -}; + KOBJMETHOD(mpufoi_uninit, emu_muninit), KOBJMETHOD_END }; static DEFINE_CLASS(emu_mpu, emu_mpu_methods, 0); static uint32_t @@ -118,12 +115,14 @@ { struct emu_midi_softc *sc = (struct emu_midi_softc *)p; if (sc->mpu_intr) - (sc->mpu_intr) (sc->mpu); + (sc->mpu_intr)(sc->mpu); if (sc->mpu_intr == NULL) { /* We should read MIDI event to unlock card after * interrupt. XXX - check, why this happens. */ if (bootverbose) - device_printf(sc->dev, "midi interrupt %08x without interrupt handler, force mread!\n", intr_status); + device_printf(sc->dev, + "midi interrupt %08x without interrupt handler, force mread!\n", + intr_status); (void)emu_mread((void *)(NULL), sc, 0); } return (intr_status); /* Acknowledge everything */ @@ -147,7 +146,8 @@ scp = device_get_softc(dev); bzero(scp, sizeof(*scp)); - BUS_READ_IVAR(device_get_parent(dev), dev, EMU_VAR_ISEMU10K1, &is_emu10k1); + BUS_READ_IVAR(device_get_parent(dev), dev, EMU_VAR_ISEMU10K1, + &is_emu10k1); scp->is_emu10k1 = is_emu10k1 ? 1 : 0; device_set_desc(dev, "EMU10Kx MIDI Interface"); @@ -157,7 +157,7 @@ static int emu_midi_attach(device_t dev) { - struct emu_midi_softc * scp; + struct emu_midi_softc *scp; struct sndcard_func *func; struct emu_midiinfo *midiinfo; uint32_t inte_val, ipr_val; @@ -197,9 +197,11 @@ } } - scp->ihandle = emu_intr_register(scp->card, inte_val, ipr_val, &emu_midi_card_intr, scp); + scp->ihandle = emu_intr_register(scp->card, inte_val, ipr_val, + &emu_midi_card_intr, scp); /* Init the interface. */ - scp->mpu = mpu401_init(&emu_mpu_class, scp, emu_midi_intr, &scp->mpu_intr); + scp->mpu = mpu401_init(&emu_mpu_class, scp, emu_midi_intr, + &scp->mpu_intr); if (scp->mpu == NULL) { emu_intr_unregister(scp->card, scp->ihandle); mtx_destroy(&scp->mtx); @@ -232,13 +234,12 @@ return (0); } -static device_method_t emu_midi_methods[] = { - DEVMETHOD(device_probe, emu_midi_probe), +static device_method_t emu_midi_methods[] = { DEVMETHOD(device_probe, + emu_midi_probe), DEVMETHOD(device_attach, emu_midi_attach), DEVMETHOD(device_detach, emu_midi_detach), - DEVMETHOD_END -}; + DEVMETHOD_END }; static driver_t emu_midi_driver = { "midi", @@ -246,6 +247,8 @@ sizeof(struct emu_midi_softc), }; DRIVER_MODULE(snd_emu10kx_midi, emu10kx, emu_midi_driver, 0, 0); -MODULE_DEPEND(snd_emu10kx_midi, snd_emu10kx, SND_EMU10KX_MINVER, SND_EMU10KX_PREFVER, SND_EMU10KX_MAXVER); -MODULE_DEPEND(snd_emu10kx_midi, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); +MODULE_DEPEND(snd_emu10kx_midi, snd_emu10kx, SND_EMU10KX_MINVER, + SND_EMU10KX_PREFVER, SND_EMU10KX_MAXVER); +MODULE_DEPEND(snd_emu10kx_midi, sound, SOUND_MINVER, SOUND_PREFVER, + SOUND_MAXVER); MODULE_VERSION(snd_emu10kx_midi, SND_EMU10KX_PREFVER); Index: sys/dev/sound/pci/emu10kx-pcm.c =================================================================== --- sys/dev/sound/pci/emu10kx-pcm.c +++ sys/dev/sound/pci/emu10kx-pcm.c @@ -27,181 +27,162 @@ * SUCH DAMAGE. */ -#include #include -#include -#include -#include -#include -#include -#include +#include #include +#include #include #include +#include +#include +#include + +#include #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif #include -#include +#include +#include #include +#include #include "mixer_if.h" -#include -#include - struct emu_pcm_pchinfo { - int spd; - int fmt; - unsigned int blksz; - int run; + int spd; + int fmt; + unsigned int blksz; + int run; struct emu_voice *master; struct emu_voice *slave; - struct snd_dbuf *buffer; + struct snd_dbuf *buffer; struct pcm_channel *channel; struct emu_pcm_info *pcm; - int timer; + int timer; }; struct emu_pcm_rchinfo { - int spd; - int fmt; - unsigned int blksz; - int run; - uint32_t idxreg; - uint32_t basereg; - uint32_t sizereg; - uint32_t setupreg; - uint32_t irqmask; - uint32_t iprmask; - int ihandle; - struct snd_dbuf *buffer; + int spd; + int fmt; + unsigned int blksz; + int run; + uint32_t idxreg; + uint32_t basereg; + uint32_t sizereg; + uint32_t setupreg; + uint32_t irqmask; + uint32_t iprmask; + int ihandle; + struct snd_dbuf *buffer; struct pcm_channel *channel; struct emu_pcm_info *pcm; - int timer; + int timer; }; /* XXX Hardware playback channels */ -#define MAX_CHANNELS 4 +#define MAX_CHANNELS 4 #if MAX_CHANNELS > 13 -#error Too many hardware channels defined. 13 is the maximum +#error Too many hardware channels defined. 13 is the maximum #endif struct emu_pcm_info { - struct mtx *lock; - device_t dev; /* device information */ - struct emu_sc_info *card; - struct emu_pcm_pchinfo pch[MAX_CHANNELS]; /* hardware channels */ - int pnum; /* next free channel number */ - struct emu_pcm_rchinfo rch_adc; - struct emu_pcm_rchinfo rch_efx; - struct emu_route rt; - struct emu_route rt_mono; - int route; - int ihandle; /* interrupt handler */ - unsigned int bufsz; - int is_emu10k1; - struct ac97_info *codec; - uint32_t ac97_state[0x7F]; - kobj_class_t ac97_mixerclass; - uint32_t ac97_recdevs; - uint32_t ac97_playdevs; - struct snd_mixer *sm; - int mch_disabled; - unsigned int emu10k1_volcache[2][2]; + struct mtx *lock; + device_t dev; /* device information */ + struct emu_sc_info *card; + struct emu_pcm_pchinfo pch[MAX_CHANNELS]; /* hardware channels */ + int pnum; /* next free channel number */ + struct emu_pcm_rchinfo rch_adc; + struct emu_pcm_rchinfo rch_efx; + struct emu_route rt; + struct emu_route rt_mono; + int route; + int ihandle; /* interrupt handler */ + unsigned int bufsz; + int is_emu10k1; + struct ac97_info *codec; + uint32_t ac97_state[0x7F]; + kobj_class_t ac97_mixerclass; + uint32_t ac97_recdevs; + uint32_t ac97_playdevs; + struct snd_mixer *sm; + int mch_disabled; + unsigned int emu10k1_volcache[2][2]; }; -static uint32_t emu_rfmt_adc[] = { - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps emu_reccaps_adc = { - 8000, 48000, emu_rfmt_adc, 0 -}; +static uint32_t emu_rfmt_adc[] = { SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; +static struct pcmchan_caps emu_reccaps_adc = { 8000, 48000, emu_rfmt_adc, 0 }; -static uint32_t emu_rfmt_efx[] = { - SND_FORMAT(AFMT_S16_LE, 1, 0), - 0 -}; +static uint32_t emu_rfmt_efx[] = { SND_FORMAT(AFMT_S16_LE, 1, 0), 0 }; -static struct pcmchan_caps emu_reccaps_efx_live = { - 48000*32, 48000*32, emu_rfmt_efx, 0 -}; +static struct pcmchan_caps emu_reccaps_efx_live = { 48000 * 32, 48000 * 32, + emu_rfmt_efx, 0 }; -static struct pcmchan_caps emu_reccaps_efx_audigy = { - 48000*64, 48000*64, emu_rfmt_efx, 0 -}; +static struct pcmchan_caps emu_reccaps_efx_audigy = { 48000 * 64, 48000 * 64, + emu_rfmt_efx, 0 }; -static int emu_rates_live[] = { - 48000*32 -}; +static int emu_rates_live[] = { 48000 * 32 }; -static int emu_rates_audigy[] = { - 48000*64 -}; +static int emu_rates_audigy[] = { 48000 * 64 }; -static uint32_t emu_pfmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; -static uint32_t emu_pfmt_mono[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - 0 -}; +static uint32_t emu_pfmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; +static uint32_t emu_pfmt_mono[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_S16_LE, 1, 0), 0 }; -static struct pcmchan_caps emu_playcaps = {4000, 48000, emu_pfmt, 0}; -static struct pcmchan_caps emu_playcaps_mono = {4000, 48000, emu_pfmt_mono, 0}; +static struct pcmchan_caps emu_playcaps = { 4000, 48000, emu_pfmt, 0 }; +static struct pcmchan_caps emu_playcaps_mono = { 4000, 48000, emu_pfmt_mono, + 0 }; -static int emu10k1_adcspeed[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000}; +static int emu10k1_adcspeed[8] = { 48000, 44100, 32000, 24000, 22050, 16000, + 11025, 8000 }; /* audigy supports 12kHz. */ -static int emu10k2_adcspeed[9] = {48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000}; +static int emu10k2_adcspeed[9] = { 48000, 44100, 32000, 24000, 22050, 16000, + 12000, 11025, 8000 }; static uint32_t emu_pcm_intr(void *pcm, uint32_t stat); static const struct emu_dspmix_props_k1 { - uint8_t present; - uint8_t recdev; - int8_t input; -} dspmix_k1 [SOUND_MIXER_NRDEVICES] = { - /* no mixer device for ac97 */ /* in0 AC97 */ - [SOUND_MIXER_DIGITAL1] = {1, 1, 1}, /* in1 CD SPDIF */ - /* not connected */ /* in2 (zoom) */ - [SOUND_MIXER_DIGITAL2] = {1, 1, 3}, /* in3 toslink */ - [SOUND_MIXER_LINE2] = {1, 1, 4}, /* in4 Line-In2 */ - [SOUND_MIXER_DIGITAL3] = {1, 1, 5}, /* in5 on-card SPDIF */ - [SOUND_MIXER_LINE3] = {1, 1, 6}, /* in6 AUX2 */ - /* not connected */ /* in7 */ + uint8_t present; + uint8_t recdev; + int8_t input; +} dspmix_k1[SOUND_MIXER_NRDEVICES] = { + /* no mixer device for ac97 */ /* in0 AC97 */ + [SOUND_MIXER_DIGITAL1] = { 1, 1, 1 }, /* in1 CD SPDIF */ + /* not connected */ /* in2 (zoom) */ + [SOUND_MIXER_DIGITAL2] = { 1, 1, 3 }, /* in3 toslink */ + [SOUND_MIXER_LINE2] = { 1, 1, 4 }, /* in4 Line-In2 */ + [SOUND_MIXER_DIGITAL3] = { 1, 1, 5 }, /* in5 on-card SPDIF */ + [SOUND_MIXER_LINE3] = { 1, 1, 6 }, /* in6 AUX2 */ + /* not connected */ /* in7 */ }; static const struct emu_dspmix_props_k2 { - uint8_t present; - uint8_t recdev; - int8_t input; -} dspmix_k2 [SOUND_MIXER_NRDEVICES] = { - [SOUND_MIXER_VOLUME] = {1, 0, (-1)}, - [SOUND_MIXER_PCM] = {1, 0, (-1)}, - - /* no mixer device */ /* in0 AC97 */ - [SOUND_MIXER_DIGITAL1] = {1, 1, 1}, /* in1 CD SPDIF */ - [SOUND_MIXER_DIGITAL2] = {1, 1, 2}, /* in2 COAX SPDIF */ - /* not connected */ /* in3 */ - [SOUND_MIXER_LINE2] = {1, 1, 4}, /* in4 Line-In2 */ - [SOUND_MIXER_DIGITAL3] = {1, 1, 5}, /* in5 on-card SPDIF */ - [SOUND_MIXER_LINE3] = {1, 1, 6}, /* in6 AUX2 */ - /* not connected */ /* in7 */ + uint8_t present; + uint8_t recdev; + int8_t input; +} dspmix_k2[SOUND_MIXER_NRDEVICES] = { + [SOUND_MIXER_VOLUME] = { 1, 0, (-1) }, + [SOUND_MIXER_PCM] = { 1, 0, (-1) }, + + /* no mixer device */ /* in0 AC97 */ + [SOUND_MIXER_DIGITAL1] = { 1, 1, 1 }, /* in1 CD SPDIF */ + [SOUND_MIXER_DIGITAL2] = { 1, 1, 2 }, /* in2 COAX SPDIF */ + /* not connected */ /* in3 */ + [SOUND_MIXER_LINE2] = { 1, 1, 4 }, /* in4 Line-In2 */ + [SOUND_MIXER_DIGITAL3] = { 1, 1, 5 }, /* in5 on-card SPDIF */ + [SOUND_MIXER_LINE3] = { 1, 1, 6 }, /* in6 AUX2 */ + /* not connected */ /* in7 */ }; static int emu_dspmixer_init(struct snd_mixer *m) { - struct emu_pcm_info *sc; + struct emu_pcm_info *sc; int i; int p, r; @@ -213,7 +194,8 @@ if (sc->route == RT_FRONT) { /* create submixer for AC97 codec */ if ((sc->ac97_mixerclass != NULL) && (sc->codec != NULL)) { - sc->sm = mixer_create(sc->dev, sc->ac97_mixerclass, sc->codec, "ac97"); + sc->sm = mixer_create(sc->dev, sc->ac97_mixerclass, + sc->codec, "ac97"); if (sc->sm != NULL) { p = mix_getdevs(sc->sm); r = mix_getrecdevs(sc->sm); @@ -255,7 +237,7 @@ static int emu_dspmixer_uninit(struct snd_mixer *m) { - struct emu_pcm_info *sc; + struct emu_pcm_info *sc; int err = 0; /* drop submixer for AC97 codec */ @@ -270,7 +252,8 @@ } static int -emu_dspmixer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) +emu_dspmixer_set(struct snd_mixer *m, unsigned dev, unsigned left, + unsigned right) { struct emu_pcm_info *sc; @@ -284,21 +267,30 @@ mix_set(sc->sm, dev, left, right); if (sc->mch_disabled) { /* In emu10k1 case PCM volume does not affect - sound routed to rear & center/sub (it is connected - to AC97 codec). Calculate it manually. */ + sound routed to rear & center/sub (it is + connected to AC97 codec). Calculate it + manually. */ /* This really should belong to emu10kx.c */ if (sc->is_emu10k1) { sc->emu10k1_volcache[0][0] = left; - left = left * sc->emu10k1_volcache[1][0] / 100; + left = left * + sc->emu10k1_volcache[1][0] / 100; sc->emu10k1_volcache[0][1] = right; - right = right * sc->emu10k1_volcache[1][1] / 100; + right = right * + sc->emu10k1_volcache[1][1] / 100; } - emumix_set_volume(sc->card, M_MASTER_REAR_L, left); - emumix_set_volume(sc->card, M_MASTER_REAR_R, right); + emumix_set_volume(sc->card, M_MASTER_REAR_L, + left); + emumix_set_volume(sc->card, M_MASTER_REAR_R, + right); if (!sc->is_emu10k1) { - emumix_set_volume(sc->card, M_MASTER_CENTER, (left+right)/2); - emumix_set_volume(sc->card, M_MASTER_SUBWOOFER, (left+right)/2); + emumix_set_volume(sc->card, + M_MASTER_CENTER, + (left + right) / 2); + emumix_set_volume(sc->card, + M_MASTER_SUBWOOFER, + (left + right) / 2); /* XXX side */ } } /* mch disabled */ @@ -308,10 +300,12 @@ emumix_set_volume(sc->card, M_MASTER_REAR_R, right); break; case RT_CENTER: - emumix_set_volume(sc->card, M_MASTER_CENTER, (left+right)/2); + emumix_set_volume(sc->card, M_MASTER_CENTER, + (left + right) / 2); break; case RT_SUB: - emumix_set_volume(sc->card, M_MASTER_SUBWOOFER, (left+right)/2); + emumix_set_volume(sc->card, M_MASTER_SUBWOOFER, + (left + right) / 2); break; } break; @@ -324,16 +318,24 @@ /* See SOUND_MIXER_VOLUME case */ if (sc->is_emu10k1) { sc->emu10k1_volcache[1][0] = left; - left = left * sc->emu10k1_volcache[0][0] / 100; + left = left * + sc->emu10k1_volcache[0][0] / 100; sc->emu10k1_volcache[1][1] = right; - right = right * sc->emu10k1_volcache[0][1] / 100; + right = right * + sc->emu10k1_volcache[0][1] / 100; } - emumix_set_volume(sc->card, M_MASTER_REAR_L, left); - emumix_set_volume(sc->card, M_MASTER_REAR_R, right); + emumix_set_volume(sc->card, M_MASTER_REAR_L, + left); + emumix_set_volume(sc->card, M_MASTER_REAR_R, + right); if (!sc->is_emu10k1) { - emumix_set_volume(sc->card, M_MASTER_CENTER, (left+right)/2); - emumix_set_volume(sc->card, M_MASTER_SUBWOOFER, (left+right)/2); + emumix_set_volume(sc->card, + M_MASTER_CENTER, + (left + right) / 2); + emumix_set_volume(sc->card, + M_MASTER_SUBWOOFER, + (left + right) / 2); /* XXX side */ } } /* mch_disabled */ @@ -343,39 +345,41 @@ emumix_set_volume(sc->card, M_FX3_REAR_R, right); break; case RT_CENTER: - emumix_set_volume(sc->card, M_FX4_CENTER, (left+right)/2); + emumix_set_volume(sc->card, M_FX4_CENTER, + (left + right) / 2); break; case RT_SUB: - emumix_set_volume(sc->card, M_FX5_SUBWOOFER, (left+right)/2); + emumix_set_volume(sc->card, M_FX5_SUBWOOFER, + (left + right) / 2); break; } break; - case SOUND_MIXER_DIGITAL1: /* CD SPDIF, in1 */ - emumix_set_volume(sc->card, M_IN1_FRONT_L, left); - emumix_set_volume(sc->card, M_IN1_FRONT_R, right); + case SOUND_MIXER_DIGITAL1: /* CD SPDIF, in1 */ + emumix_set_volume(sc->card, M_IN1_FRONT_L, left); + emumix_set_volume(sc->card, M_IN1_FRONT_R, right); break; case SOUND_MIXER_DIGITAL2: - if (sc->is_emu10k1) { - /* TOSLink, in3 */ - emumix_set_volume(sc->card, M_IN3_FRONT_L, left); - emumix_set_volume(sc->card, M_IN3_FRONT_R, right); - } else { - /* COAX SPDIF, in2 */ - emumix_set_volume(sc->card, M_IN2_FRONT_L, left); - emumix_set_volume(sc->card, M_IN2_FRONT_R, right); - } + if (sc->is_emu10k1) { + /* TOSLink, in3 */ + emumix_set_volume(sc->card, M_IN3_FRONT_L, left); + emumix_set_volume(sc->card, M_IN3_FRONT_R, right); + } else { + /* COAX SPDIF, in2 */ + emumix_set_volume(sc->card, M_IN2_FRONT_L, left); + emumix_set_volume(sc->card, M_IN2_FRONT_R, right); + } break; - case SOUND_MIXER_LINE2: /* Line-In2, in4 */ - emumix_set_volume(sc->card, M_IN4_FRONT_L, left); - emumix_set_volume(sc->card, M_IN4_FRONT_R, right); + case SOUND_MIXER_LINE2: /* Line-In2, in4 */ + emumix_set_volume(sc->card, M_IN4_FRONT_L, left); + emumix_set_volume(sc->card, M_IN4_FRONT_R, right); break; - case SOUND_MIXER_DIGITAL3: /* on-card SPDIF, in5 */ - emumix_set_volume(sc->card, M_IN5_FRONT_L, left); - emumix_set_volume(sc->card, M_IN5_FRONT_R, right); + case SOUND_MIXER_DIGITAL3: /* on-card SPDIF, in5 */ + emumix_set_volume(sc->card, M_IN5_FRONT_L, left); + emumix_set_volume(sc->card, M_IN5_FRONT_R, right); break; - case SOUND_MIXER_LINE3: /* AUX2, in6 */ - emumix_set_volume(sc->card, M_IN6_FRONT_L, left); - emumix_set_volume(sc->card, M_IN6_FRONT_R, right); + case SOUND_MIXER_LINE3: /* AUX2, in6 */ + emumix_set_volume(sc->card, M_IN6_FRONT_L, left); + emumix_set_volume(sc->card, M_IN6_FRONT_R, right); break; default: if (sc->sm != NULL) { @@ -384,9 +388,10 @@ emumix_set_volume(sc->card, M_IN0_FRONT_R, 100); mix_set(sc->sm, dev, left, right); } else - device_printf(sc->dev, "mixer error: unknown device %d\n", dev); + device_printf(sc->dev, + "mixer error: unknown device %d\n", dev); } - return (0); + return (0); } static u_int32_t @@ -395,16 +400,17 @@ struct emu_pcm_info *sc; int i; u_int32_t recmask; - int input[8]; + int input[8]; sc = mix_getdevinfo(m); recmask = 0; - for (i=0; i < 8; i++) - input[i]=0; + for (i = 0; i < 8; i++) + input[i] = 0; if (sc->sm != NULL) - if ((src & sc->ac97_recdevs) !=0) - if (mix_setrecsrc(sc->sm, src & sc->ac97_recdevs) == 0) { + if ((src & sc->ac97_recdevs) != 0) + if (mix_setrecsrc(sc->sm, src & sc->ac97_recdevs) == + 0) { recmask |= (src & sc->ac97_recdevs); /* Recording from AC97 codec. Enable AC97 route to rec on DSP */ @@ -414,18 +420,18 @@ for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { if (dspmix_k1[i].recdev) if ((src & (1 << i)) == ((uint32_t)1 << i)) { - recmask |= (1 << i); - /* enable device i */ - input[dspmix_k1[i].input] = 1; + recmask |= (1 << i); + /* enable device i */ + input[dspmix_k1[i].input] = 1; } } } else { for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { if (dspmix_k2[i].recdev) if ((src & (1 << i)) == ((uint32_t)1 << i)) { - recmask |= (1 << i); - /* enable device i */ - input[dspmix_k2[i].input] = 1; + recmask |= (1 << i); + /* enable device i */ + input[dspmix_k2[i].input] = 1; } } } @@ -436,13 +442,17 @@ emumix_set_volume(sc->card, M_IN1_REC_R, input[1] == 1 ? 100 : 0); if (!sc->is_emu10k1) { - emumix_set_volume(sc->card, M_IN2_REC_L, input[2] == 1 ? 100 : 0); - emumix_set_volume(sc->card, M_IN2_REC_R, input[2] == 1 ? 100 : 0); + emumix_set_volume(sc->card, M_IN2_REC_L, + input[2] == 1 ? 100 : 0); + emumix_set_volume(sc->card, M_IN2_REC_R, + input[2] == 1 ? 100 : 0); } if (sc->is_emu10k1) { - emumix_set_volume(sc->card, M_IN3_REC_L, input[3] == 1 ? 100 : 0); - emumix_set_volume(sc->card, M_IN3_REC_R, input[3] == 1 ? 100 : 0); + emumix_set_volume(sc->card, M_IN3_REC_L, + input[3] == 1 ? 100 : 0); + emumix_set_volume(sc->card, M_IN3_REC_R, + input[3] == 1 ? 100 : 0); } emumix_set_volume(sc->card, M_IN4_REC_L, input[4] == 1 ? 100 : 0); @@ -456,8 +466,10 @@ /* XXX check for K1/k2 differences? */ if ((src & (1 << SOUND_MIXER_PCM)) == (1 << SOUND_MIXER_PCM)) { - emumix_set_volume(sc->card, M_FX0_REC_L, emumix_get_volume(sc->card, M_FX0_FRONT_L)); - emumix_set_volume(sc->card, M_FX1_REC_R, emumix_get_volume(sc->card, M_FX1_FRONT_R)); + emumix_set_volume(sc->card, M_FX0_REC_L, + emumix_get_volume(sc->card, M_FX0_FRONT_L)); + emumix_set_volume(sc->card, M_FX1_REC_R, + emumix_get_volume(sc->card, M_FX1_FRONT_R)); } else { emumix_set_volume(sc->card, M_FX0_REC_L, 0); emumix_set_volume(sc->card, M_FX1_REC_R, 0); @@ -466,13 +478,11 @@ return (recmask); } -static kobj_method_t emudspmixer_methods[] = { - KOBJMETHOD(mixer_init, emu_dspmixer_init), - KOBJMETHOD(mixer_uninit, emu_dspmixer_uninit), - KOBJMETHOD(mixer_set, emu_dspmixer_set), - KOBJMETHOD(mixer_setrecsrc, emu_dspmixer_setrecsrc), - KOBJMETHOD_END -}; +static kobj_method_t emudspmixer_methods[] = { KOBJMETHOD(mixer_init, + emu_dspmixer_init), + KOBJMETHOD(mixer_uninit, emu_dspmixer_uninit), + KOBJMETHOD(mixer_set, emu_dspmixer_set), + KOBJMETHOD(mixer_setrecsrc, emu_dspmixer_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(emudspmixer); static int @@ -484,10 +494,12 @@ } static int -emu_efxmixer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) +emu_efxmixer_set(struct snd_mixer *m, unsigned dev, unsigned left, + unsigned right) { - if (left + right == 200) return (0); - return (0); + if (left + right == 200) + return (0); + return (0); } static u_int32_t @@ -496,12 +508,10 @@ return (SOUND_MASK_MONITOR); } -static kobj_method_t emuefxmixer_methods[] = { - KOBJMETHOD(mixer_init, emu_efxmixer_init), - KOBJMETHOD(mixer_set, emu_efxmixer_set), - KOBJMETHOD(mixer_setrecsrc, emu_efxmixer_setrecsrc), - KOBJMETHOD_END -}; +static kobj_method_t emuefxmixer_methods[] = { KOBJMETHOD(mixer_init, + emu_efxmixer_init), + KOBJMETHOD(mixer_set, emu_efxmixer_set), + KOBJMETHOD(mixer_setrecsrc, emu_efxmixer_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(emuefxmixer); /* @@ -515,16 +525,17 @@ * We also keep some parts of AC97 disabled to get better sound quality */ -#define AC97LEFT(x) ((x & 0x7F00)>>8) -#define AC97RIGHT(x) (x & 0x007F) -#define AC97MUTE(x) ((x & 0x8000)>>15) -#define BIT4_TO100(x) (100-(x)*100/(0x0f)) -#define BIT6_TO100(x) (100-(x)*100/(0x3f)) -#define BIT4_TO255(x) (255-(x)*255/(0x0f)) -#define BIT6_TO255(x) (255-(x)*255/(0x3f)) -#define V100_TOBIT6(x) (0x3f*(100-x)/100) -#define V100_TOBIT4(x) (0x0f*(100-x)/100) -#define AC97ENCODE(x_muted, x_left, x_right) (((x_muted & 1)<<15) | ((x_left & 0x3f)<<8) | (x_right & 0x3f)) +#define AC97LEFT(x) ((x & 0x7F00) >> 8) +#define AC97RIGHT(x) (x & 0x007F) +#define AC97MUTE(x) ((x & 0x8000) >> 15) +#define BIT4_TO100(x) (100 - (x) * 100 / (0x0f)) +#define BIT6_TO100(x) (100 - (x) * 100 / (0x3f)) +#define BIT4_TO255(x) (255 - (x) * 255 / (0x0f)) +#define BIT6_TO255(x) (255 - (x) * 255 / (0x3f)) +#define V100_TOBIT6(x) (0x3f * (100 - x) / 100) +#define V100_TOBIT4(x) (0x0f * (100 - x) / 100) +#define AC97ENCODE(x_muted, x_left, x_right) \ + (((x_muted & 1) << 15) | ((x_left & 0x3f) << 8) | (x_right & 0x3f)) static int emu_ac97_read_emulation(struct emu_pcm_info *sc, int regno) @@ -575,7 +586,7 @@ write_ac97 = 1; left = AC97LEFT(data); - emu_left = BIT6_TO100(left); /* We show us as 6-bit AC97 mixer */ + emu_left = BIT6_TO100(left); /* We show us as 6-bit AC97 mixer */ right = AC97RIGHT(data); emu_right = BIT6_TO100(right); is_mute = AC97MUTE(data); @@ -588,13 +599,13 @@ emumix_set_volume(sc->card, M_MASTER_FRONT_L, emu_left); emumix_set_volume(sc->card, M_MASTER_FRONT_R, emu_right); sc->ac97_state[AC97_MIX_MASTER] = data & (0x8000 | 0x3f3f); - data = 0x8000; /* Mute AC97 main out */ + data = 0x8000; /* Mute AC97 main out */ break; - case AC97_MIX_PCM: /* PCM OUT VOL */ + case AC97_MIX_PCM: /* PCM OUT VOL */ emumix_set_volume(sc->card, M_FX0_FRONT_L, emu_left); emumix_set_volume(sc->card, M_FX1_FRONT_R, emu_right); sc->ac97_state[AC97_MIX_PCM] = data & (0x8000 | 0x3f3f); - data = 0x8000; /* Mute AC97 PCM out */ + data = 0x8000; /* Mute AC97 PCM out */ break; case AC97_REG_RECSEL: /* @@ -605,11 +616,11 @@ */ data = 0x0505; break; - case AC97_MIX_RGAIN: /* RECORD GAIN */ - emu_left = BIT4_TO100(left); /* rgain is 4-bit */ + case AC97_MIX_RGAIN: /* RECORD GAIN */ + emu_left = BIT4_TO100(left); /* rgain is 4-bit */ emu_right = BIT4_TO100(right); - emumix_set_volume(sc->card, M_MASTER_REC_L, 100-emu_left); - emumix_set_volume(sc->card, M_MASTER_REC_R, 100-emu_right); + emumix_set_volume(sc->card, M_MASTER_REC_L, 100 - emu_left); + emumix_set_volume(sc->card, M_MASTER_REC_R, 100 - emu_right); /* * Record gain on AC97 should stay zero to get AC97 sound on * AC97_[RL] connectors on EMU10K2 chip. AC97 on Audigy is not @@ -643,11 +654,8 @@ return (0); } -static kobj_method_t emu_eac97_methods[] = { - KOBJMETHOD(ac97_read, emu_erdcd), - KOBJMETHOD(ac97_write, emu_ewrcd), - KOBJMETHOD_END -}; +static kobj_method_t emu_eac97_methods[] = { KOBJMETHOD(ac97_read, emu_erdcd), + KOBJMETHOD(ac97_write, emu_ewrcd), KOBJMETHOD_END }; AC97_DECLARE(emu_eac97); /* real ac97 codec */ @@ -674,11 +682,8 @@ return (0); } -static kobj_method_t emu_ac97_methods[] = { - KOBJMETHOD(ac97_read, emu_rdcd), - KOBJMETHOD(ac97_write, emu_wrcd), - KOBJMETHOD_END -}; +static kobj_method_t emu_ac97_methods[] = { KOBJMETHOD(ac97_read, emu_rdcd), + KOBJMETHOD(ac97_write, emu_wrcd), KOBJMETHOD_END }; AC97_DECLARE(emu_ac97); static int @@ -704,7 +709,8 @@ } static void * -emupchan_init(kobj_t obj __unused, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir __unused) +emupchan_init(kobj_t obj __unused, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir __unused) { struct emu_pcm_info *sc = devinfo; struct emu_pcm_pchinfo *ch; @@ -729,7 +735,10 @@ */ ch->slave = emu_valloc(sc->card); ch->timer = emu_timer_create(sc->card); - r = (emu_vinit(sc->card, ch->master, ch->slave, EMU_PLAY_BUFSZ, ch->buffer)) ? NULL : ch; + r = (emu_vinit(sc->card, ch->master, ch->slave, EMU_PLAY_BUFSZ, + ch->buffer)) ? + NULL : + ch; return (r); } @@ -774,7 +783,8 @@ blocksize = ch->pcm->bufsz; snd_mtxlock(sc->lock); ch->blksz = blocksize; - emu_timer_set(sc->card, ch->timer, ch->blksz / sndbuf_getalign(ch->buffer)); + emu_timer_set(sc->card, ch->timer, + ch->blksz / sndbuf_getalign(ch->buffer)); snd_mtxunlock(sc->lock); return (ch->blksz); } @@ -796,7 +806,8 @@ else emu_vroute(sc->card, &(sc->rt_mono), ch->master); emu_vwrite(sc->card, ch->master); - emu_timer_set(sc->card, ch->timer, ch->blksz / sndbuf_getalign(ch->buffer)); + emu_timer_set(sc->card, ch->timer, + ch->blksz / sndbuf_getalign(ch->buffer)); emu_timer_enable(sc->card, ch->timer, 1); } /* PCM interrupt handler will handle PCMTRIG_STOP event */ @@ -841,21 +852,20 @@ return (NULL); } -static kobj_method_t emupchan_methods[] = { - KOBJMETHOD(channel_init, emupchan_init), +static kobj_method_t emupchan_methods[] = { KOBJMETHOD(channel_init, + emupchan_init), KOBJMETHOD(channel_free, emupchan_free), KOBJMETHOD(channel_setformat, emupchan_setformat), KOBJMETHOD(channel_setspeed, emupchan_setspeed), KOBJMETHOD(channel_setblocksize, emupchan_setblocksize), KOBJMETHOD(channel_trigger, emupchan_trigger), KOBJMETHOD(channel_getptr, emupchan_getptr), - KOBJMETHOD(channel_getcaps, emupchan_getcaps), - KOBJMETHOD_END -}; + KOBJMETHOD(channel_getcaps, emupchan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(emupchan); static void * -emurchan_init(kobj_t obj __unused, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir __unused) +emurchan_init(kobj_t obj __unused, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir __unused) { struct emu_pcm_info *sc = devinfo; struct emu_pcm_rchinfo *ch; @@ -879,8 +889,9 @@ return (NULL); else { ch->timer = emu_timer_create(sc->card); - emu_wrptr(sc->card, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer)); - emu_wrptr(sc->card, 0, ch->sizereg, 0); /* off */ + emu_wrptr(sc->card, 0, ch->basereg, + sndbuf_getbufaddr(ch->buffer)); + emu_wrptr(sc->card, 0, ch->sizereg, 0); /* off */ return (ch); } } @@ -931,7 +942,8 @@ * (and use) timer interrupts. Otherwise channel will be marked dead. */ if (ch->blksz < (ch->pcm->bufsz / 2)) { - emu_timer_set(sc->card, ch->timer, ch->blksz / sndbuf_getalign(ch->buffer)); + emu_timer_set(sc->card, ch->timer, + ch->blksz / sndbuf_getalign(ch->buffer)); emu_timer_enable(sc->card, ch->timer, 1); } else { emu_timer_enable(sc->card, ch->timer, 0); @@ -974,13 +986,17 @@ case PCMTRIG_START: ch->run = 1; emu_wrptr(sc->card, 0, ch->sizereg, sz); - val = sc->is_emu10k1 ? EMU_ADCCR_LCHANENABLE : EMU_A_ADCCR_LCHANENABLE; + val = sc->is_emu10k1 ? EMU_ADCCR_LCHANENABLE : + EMU_A_ADCCR_LCHANENABLE; if (AFMT_CHANNEL(ch->fmt) > 1) - val |= sc->is_emu10k1 ? EMU_ADCCR_RCHANENABLE : EMU_A_ADCCR_RCHANENABLE; - val |= sc->is_emu10k1 ? emu_k1_recval(ch->spd) : emu_k2_recval(ch->spd); + val |= sc->is_emu10k1 ? EMU_ADCCR_RCHANENABLE : + EMU_A_ADCCR_RCHANENABLE; + val |= sc->is_emu10k1 ? emu_k1_recval(ch->spd) : + emu_k2_recval(ch->spd); emu_wrptr(sc->card, 0, ch->setupreg, 0); emu_wrptr(sc->card, 0, ch->setupreg, val); - ch->ihandle = emu_intr_register(sc->card, ch->irqmask, ch->iprmask, &emu_pcm_intr, sc); + ch->ihandle = emu_intr_register(sc->card, ch->irqmask, + ch->iprmask, &emu_pcm_intr, sc); break; case PCMTRIG_STOP: /* FALLTHROUGH */ @@ -1021,32 +1037,32 @@ return (&emu_reccaps_adc); } -static kobj_method_t emurchan_methods[] = { - KOBJMETHOD(channel_init, emurchan_init), +static kobj_method_t emurchan_methods[] = { KOBJMETHOD(channel_init, + emurchan_init), KOBJMETHOD(channel_free, emurchan_free), KOBJMETHOD(channel_setformat, emurchan_setformat), KOBJMETHOD(channel_setspeed, emurchan_setspeed), KOBJMETHOD(channel_setblocksize, emurchan_setblocksize), KOBJMETHOD(channel_trigger, emurchan_trigger), KOBJMETHOD(channel_getptr, emurchan_getptr), - KOBJMETHOD(channel_getcaps, emurchan_getcaps), - KOBJMETHOD_END -}; + KOBJMETHOD(channel_getcaps, emurchan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(emurchan); static void * -emufxrchan_init(kobj_t obj __unused, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir __unused) +emufxrchan_init(kobj_t obj __unused, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir __unused) { struct emu_pcm_info *sc = devinfo; struct emu_pcm_rchinfo *ch; KASSERT(dir == PCMDIR_REC, ("emurchan_init: bad direction")); - if (sc == NULL) return (NULL); + if (sc == NULL) + return (NULL); ch = &(sc->rch_efx); ch->fmt = SND_FORMAT(AFMT_S16_LE, 1, 0); - ch->spd = sc->is_emu10k1 ? 48000*32 : 48000 * 64; + ch->spd = sc->is_emu10k1 ? 48000 * 32 : 48000 * 64; ch->idxreg = EMU_FXIDX; ch->basereg = EMU_FXBA; ch->sizereg = EMU_FXBS; @@ -1060,16 +1076,19 @@ if (sndbuf_alloc(ch->buffer, emu_gettag(sc->card), 0, sc->bufsz) != 0) return (NULL); else { - emu_wrptr(sc->card, 0, ch->basereg, sndbuf_getbufaddr(ch->buffer)); - emu_wrptr(sc->card, 0, ch->sizereg, 0); /* off */ + emu_wrptr(sc->card, 0, ch->basereg, + sndbuf_getbufaddr(ch->buffer)); + emu_wrptr(sc->card, 0, ch->sizereg, 0); /* off */ return (ch); } } static int -emufxrchan_setformat(kobj_t obj __unused, void *c_devinfo __unused, uint32_t format) +emufxrchan_setformat(kobj_t obj __unused, void *c_devinfo __unused, + uint32_t format) { - if (format == SND_FORMAT(AFMT_S16_LE, 1, 0)) return (0); + if (format == SND_FORMAT(AFMT_S16_LE, 1, 0)) + return (0); return (EINVAL); } @@ -1083,7 +1102,8 @@ } static uint32_t -emufxrchan_setblocksize(kobj_t obj __unused, void *c_devinfo, uint32_t blocksize) +emufxrchan_setblocksize(kobj_t obj __unused, void *c_devinfo, + uint32_t blocksize) { struct emu_pcm_rchinfo *ch = c_devinfo; @@ -1134,7 +1154,8 @@ case PCMTRIG_START: ch->run = 1; emu_wrptr(sc->card, 0, ch->sizereg, sz); - ch->ihandle = emu_intr_register(sc->card, ch->irqmask, ch->iprmask, &emu_pcm_intr, sc); + ch->ihandle = emu_intr_register(sc->card, ch->irqmask, + ch->iprmask, &emu_pcm_intr, sc); /* * SB Live! is limited to 32 mono channels. Audigy * has 64 mono channels. Channels are enabled @@ -1194,7 +1215,6 @@ if (sc->is_emu10k1) return (&emu_reccaps_efx_live); return (&emu_reccaps_efx_audigy); - } static int @@ -1211,17 +1231,15 @@ return 1; } -static kobj_method_t emufxrchan_methods[] = { - KOBJMETHOD(channel_init, emufxrchan_init), +static kobj_method_t emufxrchan_methods[] = { KOBJMETHOD(channel_init, + emufxrchan_init), KOBJMETHOD(channel_setformat, emufxrchan_setformat), KOBJMETHOD(channel_setspeed, emufxrchan_setspeed), KOBJMETHOD(channel_setblocksize, emufxrchan_setblocksize), KOBJMETHOD(channel_trigger, emufxrchan_trigger), KOBJMETHOD(channel_getptr, emufxrchan_getptr), KOBJMETHOD(channel_getcaps, emufxrchan_getcaps), - KOBJMETHOD(channel_getrates, emufxrchan_getrates), - KOBJMETHOD_END -}; + KOBJMETHOD(channel_getrates, emufxrchan_getrates), KOBJMETHOD_END }; CHANNEL_DECLARE(emufxrchan); static uint32_t @@ -1244,7 +1262,8 @@ chn_intr(sc->pch[i].channel); snd_mtxlock(sc->lock); } else - emu_timer_enable(sc->card, sc->pch[i].timer, 0); + emu_timer_enable(sc->card, + sc->pch[i].timer, 0); } /* ADC may install timer to get low-latency interrupts */ if ((sc->rch_adc.channel) && (sc->rch_adc.run)) { @@ -1283,7 +1302,8 @@ static int emu_pcm_init(struct emu_pcm_info *sc) { - sc->bufsz = pcm_getbuffersize(sc->dev, EMUPAGESIZE, EMU_REC_BUFSZ, EMU_MAX_BUFSZ); + sc->bufsz = pcm_getbuffersize(sc->dev, EMUPAGESIZE, EMU_REC_BUFSZ, + EMU_MAX_BUFSZ); return (0); } @@ -1341,14 +1361,16 @@ uintptr_t route, ivar; sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); - sc->card = (struct emu_sc_info *)(device_get_softc(device_get_parent(dev))); + sc->card = (struct emu_sc_info *)(device_get_softc( + device_get_parent(dev))); if (sc->card == NULL) { device_printf(dev, "cannot get bridge conf\n"); free(sc, M_DEVBUF); return (ENXIO); } - sc->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_emu10kx pcm softc"); + sc->lock = snd_mtxcreate(device_get_nameunit(dev), + "snd_emu10kx pcm softc"); sc->dev = dev; BUS_READ_IVAR(device_get_parent(dev), dev, EMU_VAR_ISEMU10K1, &ivar); @@ -1449,7 +1471,8 @@ sc->ihandle = emu_intr_register(sc->card, inte, ipr, &emu_pcm_intr, sc); if (emu_pcm_init(sc) == -1) { - device_printf(dev, "unable to initialize PCM part of the card\n"); + device_printf(dev, + "unable to initialize PCM part of the card\n"); goto bad; } @@ -1460,7 +1483,8 @@ pcm_setflags(dev, pcm_getflags(dev) | SD_F_MPSAFE); /* XXX we should better get number of available channels from parent */ - if (pcm_register(dev, sc, (route == RT_FRONT) ? MAX_CHANNELS : 1, (route == RT_FRONT) ? 1 : 0)) { + if (pcm_register(dev, sc, (route == RT_FRONT) ? MAX_CHANNELS : 1, + (route == RT_FRONT) ? 1 : 0)) { device_printf(dev, "can't register PCM channels!\n"); goto bad; } @@ -1500,7 +1524,8 @@ r = pcm_unregister(dev); - if (r) return (r); + if (r) + return (r); emu_pcm_uninit(sc); @@ -1511,23 +1536,18 @@ return (0); } -static device_method_t emu_pcm_methods[] = { - DEVMETHOD(device_probe, emu_pcm_probe), +static device_method_t emu_pcm_methods[] = { DEVMETHOD(device_probe, + emu_pcm_probe), DEVMETHOD(device_attach, emu_pcm_attach), DEVMETHOD(device_detach, emu_pcm_detach), - DEVMETHOD_END -}; + DEVMETHOD_END }; -static driver_t emu_pcm_driver = { - "pcm", - emu_pcm_methods, - PCM_SOFTC_SIZE, - NULL, - 0, - NULL -}; +static driver_t emu_pcm_driver = { "pcm", emu_pcm_methods, PCM_SOFTC_SIZE, NULL, + 0, NULL }; DRIVER_MODULE(snd_emu10kx_pcm, emu10kx, emu_pcm_driver, 0, 0); -MODULE_DEPEND(snd_emu10kx_pcm, snd_emu10kx, SND_EMU10KX_MINVER, SND_EMU10KX_PREFVER, SND_EMU10KX_MAXVER); -MODULE_DEPEND(snd_emu10kx_pcm, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); +MODULE_DEPEND(snd_emu10kx_pcm, snd_emu10kx, SND_EMU10KX_MINVER, + SND_EMU10KX_PREFVER, SND_EMU10KX_MAXVER); +MODULE_DEPEND(snd_emu10kx_pcm, sound, SOUND_MINVER, SOUND_PREFVER, + SOUND_MAXVER); MODULE_VERSION(snd_emu10kx_pcm, SND_EMU10KX_PREFVER); Index: sys/dev/sound/pci/emu10kx.h =================================================================== --- sys/dev/sound/pci/emu10kx.h +++ sys/dev/sound/pci/emu10kx.h @@ -28,163 +28,168 @@ */ #ifndef EMU10KX_H -#define EMU10KX_H +#define EMU10KX_H -#define SND_EMU10KX_MINVER 1 -#define SND_EMU10KX_PREFVER 1 -#define SND_EMU10KX_MAXVER 1 +#define SND_EMU10KX_MINVER 1 +#define SND_EMU10KX_PREFVER 1 +#define SND_EMU10KX_MAXVER 1 #ifdef _KERNEL -#define EMUPAGESIZE 4096 -#define NUM_G 64 +#define EMUPAGESIZE 4096 +#define NUM_G 64 /* XXX some (empty) samples are played when play buffer is > EMUPAGESIZE */ -#define EMU_PLAY_BUFSZ EMUPAGESIZE +#define EMU_PLAY_BUFSZ EMUPAGESIZE /* Recording is limited by EMUPAGESIZE*16=64K buffer */ -#define EMU_REC_BUFSZ EMUPAGESIZE*16 -#define EMU_MAX_BUFSZ EMUPAGESIZE*16 -#define EMU_MAXPAGES 8192 - -#define EMU_VAR_FUNC 0 -#define EMU_VAR_ROUTE 1 -#define EMU_VAR_ISEMU10K1 2 -#define EMU_VAR_MCH_DISABLED 3 -#define EMU_VAR_MCH_REC 4 - -#define EMU_A_IOCFG_DISABLE_ANALOG 0x0040 /* = 'enable' for Audigy2 */ -#define EMU_A_IOCFG_GPOUT2 0x0001 -#define EMU_AC97SLOT_REAR_RIGHT 0x01 -#define EMU_AC97SLOT_REAR_LEFT 0x02 -#define EMU_HCFG_GPOUT0 0x00001000 -#define EMU_HCFG_GPOUT1 0x00000800 -#define EMU_HCFG_GPOUT2 0x00000400 - -#define RT_FRONT 0 -#define RT_REAR 1 -#define RT_CENTER 2 -#define RT_SUB 3 -#define RT_SIDE 4 -#define RT_MCHRECORD 5 -#define RT_COUNT 6 +#define EMU_REC_BUFSZ EMUPAGESIZE * 16 +#define EMU_MAX_BUFSZ EMUPAGESIZE * 16 +#define EMU_MAXPAGES 8192 + +#define EMU_VAR_FUNC 0 +#define EMU_VAR_ROUTE 1 +#define EMU_VAR_ISEMU10K1 2 +#define EMU_VAR_MCH_DISABLED 3 +#define EMU_VAR_MCH_REC 4 + +#define EMU_A_IOCFG_DISABLE_ANALOG 0x0040 /* = 'enable' for Audigy2 */ +#define EMU_A_IOCFG_GPOUT2 0x0001 +#define EMU_AC97SLOT_REAR_RIGHT 0x01 +#define EMU_AC97SLOT_REAR_LEFT 0x02 +#define EMU_HCFG_GPOUT0 0x00001000 +#define EMU_HCFG_GPOUT1 0x00000800 +#define EMU_HCFG_GPOUT2 0x00000400 + +#define RT_FRONT 0 +#define RT_REAR 1 +#define RT_CENTER 2 +#define RT_SUB 3 +#define RT_SIDE 4 +#define RT_MCHRECORD 5 +#define RT_COUNT 6 /* mixer controls */ /* fx play */ -#define M_FX0_FRONT_L 0 -#define M_FX1_FRONT_R 1 -#define M_FX2_REAR_L 2 -#define M_FX3_REAR_R 3 -#define M_FX4_CENTER 4 -#define M_FX5_SUBWOOFER 5 -#define M_FX6_SIDE_L 6 -#define M_FX7_SIDE_R 7 +#define M_FX0_FRONT_L 0 +#define M_FX1_FRONT_R 1 +#define M_FX2_REAR_L 2 +#define M_FX3_REAR_R 3 +#define M_FX4_CENTER 4 +#define M_FX5_SUBWOOFER 5 +#define M_FX6_SIDE_L 6 +#define M_FX7_SIDE_R 7 /* fx rec */ -#define M_FX0_REC_L 8 -#define M_FX1_REC_R 9 +#define M_FX0_REC_L 8 +#define M_FX1_REC_R 9 /* inputs play */ -#define M_IN0_FRONT_L 10 -#define M_IN0_FRONT_R 11 -#define M_IN1_FRONT_L 12 -#define M_IN1_FRONT_R 13 -#define M_IN2_FRONT_L 14 -#define M_IN2_FRONT_R 15 -#define M_IN3_FRONT_L 16 -#define M_IN3_FRONT_R 17 -#define M_IN4_FRONT_L 18 -#define M_IN4_FRONT_R 19 -#define M_IN5_FRONT_L 20 -#define M_IN5_FRONT_R 21 -#define M_IN6_FRONT_L 22 -#define M_IN6_FRONT_R 23 -#define M_IN7_FRONT_L 24 -#define M_IN7_FRONT_R 25 +#define M_IN0_FRONT_L 10 +#define M_IN0_FRONT_R 11 +#define M_IN1_FRONT_L 12 +#define M_IN1_FRONT_R 13 +#define M_IN2_FRONT_L 14 +#define M_IN2_FRONT_R 15 +#define M_IN3_FRONT_L 16 +#define M_IN3_FRONT_R 17 +#define M_IN4_FRONT_L 18 +#define M_IN4_FRONT_R 19 +#define M_IN5_FRONT_L 20 +#define M_IN5_FRONT_R 21 +#define M_IN6_FRONT_L 22 +#define M_IN6_FRONT_R 23 +#define M_IN7_FRONT_L 24 +#define M_IN7_FRONT_R 25 /* inputs rec */ -#define M_IN0_REC_L 26 -#define M_IN0_REC_R 27 -#define M_IN1_REC_L 28 -#define M_IN1_REC_R 29 -#define M_IN2_REC_L 30 -#define M_IN2_REC_R 31 -#define M_IN3_REC_L 32 -#define M_IN3_REC_R 33 -#define M_IN4_REC_L 34 -#define M_IN4_REC_R 35 -#define M_IN5_REC_L 36 -#define M_IN5_REC_R 37 -#define M_IN6_REC_L 38 -#define M_IN6_REC_R 39 -#define M_IN7_REC_L 40 -#define M_IN7_REC_R 41 +#define M_IN0_REC_L 26 +#define M_IN0_REC_R 27 +#define M_IN1_REC_L 28 +#define M_IN1_REC_R 29 +#define M_IN2_REC_L 30 +#define M_IN2_REC_R 31 +#define M_IN3_REC_L 32 +#define M_IN3_REC_R 33 +#define M_IN4_REC_L 34 +#define M_IN4_REC_R 35 +#define M_IN5_REC_L 36 +#define M_IN5_REC_R 37 +#define M_IN6_REC_L 38 +#define M_IN6_REC_R 39 +#define M_IN7_REC_L 40 +#define M_IN7_REC_R 41 /* master volume */ -#define M_MASTER_FRONT_L 42 -#define M_MASTER_FRONT_R 43 -#define M_MASTER_REAR_L 44 -#define M_MASTER_REAR_R 45 -#define M_MASTER_CENTER 46 -#define M_MASTER_SUBWOOFER 47 -#define M_MASTER_SIDE_L 48 -#define M_MASTER_SIDE_R 49 +#define M_MASTER_FRONT_L 42 +#define M_MASTER_FRONT_R 43 +#define M_MASTER_REAR_L 44 +#define M_MASTER_REAR_R 45 +#define M_MASTER_CENTER 46 +#define M_MASTER_SUBWOOFER 47 +#define M_MASTER_SIDE_L 48 +#define M_MASTER_SIDE_R 49 /* master rec volume */ -#define M_MASTER_REC_L 50 -#define M_MASTER_REC_R 51 +#define M_MASTER_REC_L 50 +#define M_MASTER_REC_R 51 -#define NUM_MIXERS 52 +#define NUM_MIXERS 52 struct emu_sc_info; /* MIDI device parameters */ struct emu_midiinfo { struct emu_sc_info *card; - int port; - int portnr; + int port; + int portnr; }; /* PCM device parameters */ struct emu_pcminfo { struct emu_sc_info *card; - int route; + int route; }; -int emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc); -int emu_intr_unregister(struct emu_sc_info *sc, int ihandle); +int emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, + uint32_t intr_mask, uint32_t (*func)(void *softc, uint32_t irq), void *isc); +int emu_intr_unregister(struct emu_sc_info *sc, int ihandle); uint32_t emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size); -void emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size); +void emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, + unsigned int size); uint32_t emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg); -void emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data); +void emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, + uint32_t data); uint32_t emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg); -void emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data); +void emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, + uint32_t data); -int emu_timer_create(struct emu_sc_info *sc); -int emu_timer_set(struct emu_sc_info *sc, int timer, int delay); -int emu_timer_enable(struct emu_sc_info *sc, int timer, int go); -int emu_timer_clear(struct emu_sc_info *sc, int timer); +int emu_timer_create(struct emu_sc_info *sc); +int emu_timer_set(struct emu_sc_info *sc, int timer, int delay); +int emu_timer_enable(struct emu_sc_info *sc, int timer, int go); +int emu_timer_clear(struct emu_sc_info *sc, int timer); struct emu_voice; struct emu_route { - int routing_left[8]; - int amounts_left[8]; - int routing_right[8]; - int amounts_right[8]; + int routing_left[8]; + int amounts_left[8]; + int routing_right[8]; + int amounts_right[8]; }; -struct emu_voice* emu_valloc(struct emu_sc_info *sc); -void emu_vfree(struct emu_sc_info *sc, struct emu_voice *v); -int emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s, +struct emu_voice *emu_valloc(struct emu_sc_info *sc); +void emu_vfree(struct emu_sc_info *sc, struct emu_voice *v); +int emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s, uint32_t sz, struct snd_dbuf *b); -void emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v); -void emu_vsetup(struct emu_voice *v, int fmt, int spd); -void emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v); -void emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go); -int emu_vpos(struct emu_sc_info *sc, struct emu_voice *v); +void emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, + struct emu_voice *v); +void emu_vsetup(struct emu_voice *v, int fmt, int spd); +void emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v); +void emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go); +int emu_vpos(struct emu_sc_info *sc, struct emu_voice *v); bus_dma_tag_t emu_gettag(struct emu_sc_info *sc); -void emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume); -int emumix_get_volume(struct emu_sc_info *sc, int mixer_idx); +void emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume); +int emumix_get_volume(struct emu_sc_info *sc, int mixer_idx); -void emu_enable_ir(struct emu_sc_info *sc); -#endif /* _KERNEL */ -#endif /* EMU10K1_H */ +void emu_enable_ir(struct emu_sc_info *sc); +#endif /* _KERNEL */ +#endif /* EMU10K1_H */ Index: sys/dev/sound/pci/emu10kx.c =================================================================== --- sys/dev/sound/pci/emu10kx.c +++ sys/dev/sound/pci/emu10kx.c @@ -27,239 +27,238 @@ * SUCH DAMAGE. */ -#include #include -#include -#include -#include +#include #include -#include -#include +#include +#include #include #include +#include +#include +#include #include -#include + +#include +#include /* for DELAY */ #include #include -#include /* for DELAY */ - #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif #include -#include -#include - -#include #include +#include +#include +#include /* hw flags */ -#define HAS_51 0x0001 -#define HAS_71 0x0002 -#define HAS_AC97 0x0004 - -#define IS_EMU10K1 0x0008 -#define IS_EMU10K2 0x0010 -#define IS_CA0102 0x0020 -#define IS_CA0108 0x0040 -#define IS_UNKNOWN 0x0080 - -#define BROKEN_DIGITAL 0x0100 -#define DIGITAL_ONLY 0x0200 - -#define IS_CARDBUS 0x0400 - -#define MODE_ANALOG 1 -#define MODE_DIGITAL 2 -#define SPDIF_MODE_PCM 1 -#define SPDIF_MODE_AC3 2 - -#define MACS 0x0 -#define MACS1 0x1 -#define MACW 0x2 -#define MACW1 0x3 -#define MACINTS 0x4 -#define MACINTW 0x5 -#define ACC3 0x6 -#define MACMV 0x7 -#define ANDXOR 0x8 -#define TSTNEG 0x9 -#define LIMIT 0xA -#define LIMIT1 0xB -#define LOG 0xC -#define EXP 0xD -#define INTERP 0xE -#define SKIP 0xF - -#define GPR(i) (sc->gpr_base+(i)) -#define INP(i) (sc->input_base+(i)) -#define OUTP(i) (sc->output_base+(i)) -#define FX(i) (i) -#define FX2(i) (sc->efxc_base+(i)) -#define DSP_CONST(i) (sc->dsp_zero+(i)) - -#define COND_NORMALIZED DSP_CONST(0x1) -#define COND_BORROW DSP_CONST(0x2) -#define COND_MINUS DSP_CONST(0x3) -#define COND_LESS_ZERO DSP_CONST(0x4) -#define COND_EQ_ZERO DSP_CONST(0x5) -#define COND_SATURATION DSP_CONST(0x6) -#define COND_NEQ_ZERO DSP_CONST(0x8) - -#define DSP_ACCUM DSP_CONST(0x16) -#define DSP_CCR DSP_CONST(0x17) +#define HAS_51 0x0001 +#define HAS_71 0x0002 +#define HAS_AC97 0x0004 + +#define IS_EMU10K1 0x0008 +#define IS_EMU10K2 0x0010 +#define IS_CA0102 0x0020 +#define IS_CA0108 0x0040 +#define IS_UNKNOWN 0x0080 + +#define BROKEN_DIGITAL 0x0100 +#define DIGITAL_ONLY 0x0200 + +#define IS_CARDBUS 0x0400 + +#define MODE_ANALOG 1 +#define MODE_DIGITAL 2 +#define SPDIF_MODE_PCM 1 +#define SPDIF_MODE_AC3 2 + +#define MACS 0x0 +#define MACS1 0x1 +#define MACW 0x2 +#define MACW1 0x3 +#define MACINTS 0x4 +#define MACINTW 0x5 +#define ACC3 0x6 +#define MACMV 0x7 +#define ANDXOR 0x8 +#define TSTNEG 0x9 +#define LIMIT 0xA +#define LIMIT1 0xB +#define LOG 0xC +#define EXP 0xD +#define INTERP 0xE +#define SKIP 0xF + +#define GPR(i) (sc->gpr_base + (i)) +#define INP(i) (sc->input_base + (i)) +#define OUTP(i) (sc->output_base + (i)) +#define FX(i) (i) +#define FX2(i) (sc->efxc_base + (i)) +#define DSP_CONST(i) (sc->dsp_zero + (i)) + +#define COND_NORMALIZED DSP_CONST(0x1) +#define COND_BORROW DSP_CONST(0x2) +#define COND_MINUS DSP_CONST(0x3) +#define COND_LESS_ZERO DSP_CONST(0x4) +#define COND_EQ_ZERO DSP_CONST(0x5) +#define COND_SATURATION DSP_CONST(0x6) +#define COND_NEQ_ZERO DSP_CONST(0x8) + +#define DSP_ACCUM DSP_CONST(0x16) +#define DSP_CCR DSP_CONST(0x17) /* Live! Inputs */ -#define IN_AC97_L 0x00 -#define IN_AC97_R 0x01 -#define IN_AC97 IN_AC97_L -#define IN_SPDIF_CD_L 0x02 -#define IN_SPDIF_CD_R 0x03 -#define IN_SPDIF_CD IN_SPDIF_CD_L -#define IN_ZOOM_L 0x04 -#define IN_ZOOM_R 0x05 -#define IN_ZOOM IN_ZOOM_L -#define IN_TOSLINK_L 0x06 -#define IN_TOSLINK_R 0x07 -#define IN_TOSLINK IN_TOSLINK_L -#define IN_LINE1_L 0x08 -#define IN_LINE1_R 0x09 -#define IN_LINE1 IN_LINE1_L -#define IN_COAX_SPDIF_L 0x0a -#define IN_COAX_SPDIF_R 0x0b -#define IN_COAX_SPDIF IN_COAX_SPDIF_L -#define IN_LINE2_L 0x0c -#define IN_LINE2_R 0x0d -#define IN_LINE2 IN_LINE2_L -#define IN_0E 0x0e -#define IN_0F 0x0f +#define IN_AC97_L 0x00 +#define IN_AC97_R 0x01 +#define IN_AC97 IN_AC97_L +#define IN_SPDIF_CD_L 0x02 +#define IN_SPDIF_CD_R 0x03 +#define IN_SPDIF_CD IN_SPDIF_CD_L +#define IN_ZOOM_L 0x04 +#define IN_ZOOM_R 0x05 +#define IN_ZOOM IN_ZOOM_L +#define IN_TOSLINK_L 0x06 +#define IN_TOSLINK_R 0x07 +#define IN_TOSLINK IN_TOSLINK_L +#define IN_LINE1_L 0x08 +#define IN_LINE1_R 0x09 +#define IN_LINE1 IN_LINE1_L +#define IN_COAX_SPDIF_L 0x0a +#define IN_COAX_SPDIF_R 0x0b +#define IN_COAX_SPDIF IN_COAX_SPDIF_L +#define IN_LINE2_L 0x0c +#define IN_LINE2_R 0x0d +#define IN_LINE2 IN_LINE2_L +#define IN_0E 0x0e +#define IN_0F 0x0f /* Outputs */ -#define OUT_AC97_L 0x00 -#define OUT_AC97_R 0x01 -#define OUT_AC97 OUT_AC97_L -#define OUT_A_FRONT OUT_AC97 -#define OUT_TOSLINK_L 0x02 -#define OUT_TOSLINK_R 0x03 -#define OUT_TOSLINK OUT_TOSLINK_L -#define OUT_D_CENTER 0x04 -#define OUT_D_SUB 0x05 -#define OUT_HEADPHONE_L 0x06 -#define OUT_HEADPHONE_R 0x07 -#define OUT_HEADPHONE OUT_HEADPHONE_L -#define OUT_REAR_L 0x08 -#define OUT_REAR_R 0x09 -#define OUT_REAR OUT_REAR_L -#define OUT_ADC_REC_L 0x0a -#define OUT_ADC_REC_R 0x0b -#define OUT_ADC_REC OUT_ADC_REC_L -#define OUT_MIC_CAP 0x0c +#define OUT_AC97_L 0x00 +#define OUT_AC97_R 0x01 +#define OUT_AC97 OUT_AC97_L +#define OUT_A_FRONT OUT_AC97 +#define OUT_TOSLINK_L 0x02 +#define OUT_TOSLINK_R 0x03 +#define OUT_TOSLINK OUT_TOSLINK_L +#define OUT_D_CENTER 0x04 +#define OUT_D_SUB 0x05 +#define OUT_HEADPHONE_L 0x06 +#define OUT_HEADPHONE_R 0x07 +#define OUT_HEADPHONE OUT_HEADPHONE_L +#define OUT_REAR_L 0x08 +#define OUT_REAR_R 0x09 +#define OUT_REAR OUT_REAR_L +#define OUT_ADC_REC_L 0x0a +#define OUT_ADC_REC_R 0x0b +#define OUT_ADC_REC OUT_ADC_REC_L +#define OUT_MIC_CAP 0x0c /* Live! 5.1 Digital, non-standard 5.1 (center & sub) outputs */ -#define OUT_A_CENTER 0x11 -#define OUT_A_SUB 0x12 +#define OUT_A_CENTER 0x11 +#define OUT_A_SUB 0x12 /* Audigy Inputs */ -#define A_IN_AC97_L 0x00 -#define A_IN_AC97_R 0x01 -#define A_IN_AC97 A_IN_AC97_L -#define A_IN_SPDIF_CD_L 0x02 -#define A_IN_SPDIF_CD_R 0x03 -#define A_IN_SPDIF_CD A_IN_SPDIF_CD_L -#define A_IN_O_SPDIF_L 0x04 -#define A_IN_O_SPDIF_R 0x05 -#define A_IN_O_SPDIF A_IN_O_SPDIF_L -#define A_IN_LINE2_L 0x08 -#define A_IN_LINE2_R 0x09 -#define A_IN_LINE2 A_IN_LINE2_L -#define A_IN_R_SPDIF_L 0x0a -#define A_IN_R_SPDIF_R 0x0b -#define A_IN_R_SPDIF A_IN_R_SPDIF_L -#define A_IN_AUX2_L 0x0c -#define A_IN_AUX2_R 0x0d -#define A_IN_AUX2 A_IN_AUX2_L +#define A_IN_AC97_L 0x00 +#define A_IN_AC97_R 0x01 +#define A_IN_AC97 A_IN_AC97_L +#define A_IN_SPDIF_CD_L 0x02 +#define A_IN_SPDIF_CD_R 0x03 +#define A_IN_SPDIF_CD A_IN_SPDIF_CD_L +#define A_IN_O_SPDIF_L 0x04 +#define A_IN_O_SPDIF_R 0x05 +#define A_IN_O_SPDIF A_IN_O_SPDIF_L +#define A_IN_LINE2_L 0x08 +#define A_IN_LINE2_R 0x09 +#define A_IN_LINE2 A_IN_LINE2_L +#define A_IN_R_SPDIF_L 0x0a +#define A_IN_R_SPDIF_R 0x0b +#define A_IN_R_SPDIF A_IN_R_SPDIF_L +#define A_IN_AUX2_L 0x0c +#define A_IN_AUX2_R 0x0d +#define A_IN_AUX2 A_IN_AUX2_L /* Audigy Outputs */ -#define A_OUT_D_FRONT_L 0x00 -#define A_OUT_D_FRONT_R 0x01 -#define A_OUT_D_FRONT A_OUT_D_FRONT_L -#define A_OUT_D_CENTER 0x02 -#define A_OUT_D_SUB 0x03 -#define A_OUT_D_SIDE_L 0x04 -#define A_OUT_D_SIDE_R 0x05 -#define A_OUT_D_SIDE A_OUT_D_SIDE_L -#define A_OUT_D_REAR_L 0x06 -#define A_OUT_D_REAR_R 0x07 -#define A_OUT_D_REAR A_OUT_D_REAR_L +#define A_OUT_D_FRONT_L 0x00 +#define A_OUT_D_FRONT_R 0x01 +#define A_OUT_D_FRONT A_OUT_D_FRONT_L +#define A_OUT_D_CENTER 0x02 +#define A_OUT_D_SUB 0x03 +#define A_OUT_D_SIDE_L 0x04 +#define A_OUT_D_SIDE_R 0x05 +#define A_OUT_D_SIDE A_OUT_D_SIDE_L +#define A_OUT_D_REAR_L 0x06 +#define A_OUT_D_REAR_R 0x07 +#define A_OUT_D_REAR A_OUT_D_REAR_L /* on Audigy Platinum only */ -#define A_OUT_HPHONE_L 0x04 -#define A_OUT_HPHONE_R 0x05 -#define A_OUT_HPHONE A_OUT_HPHONE_L - -#define A_OUT_A_FRONT_L 0x08 -#define A_OUT_A_FRONT_R 0x09 -#define A_OUT_A_FRONT A_OUT_A_FRONT_L -#define A_OUT_A_CENTER 0x0a -#define A_OUT_A_SUB 0x0b -#define A_OUT_A_SIDE_L 0x0c -#define A_OUT_A_SIDE_R 0x0d -#define A_OUT_A_SIDE A_OUT_A_SIDE_L -#define A_OUT_A_REAR_L 0x0e -#define A_OUT_A_REAR_R 0x0f -#define A_OUT_A_REAR A_OUT_A_REAR_L -#define A_OUT_AC97_L 0x10 -#define A_OUT_AC97_R 0x11 -#define A_OUT_AC97 A_OUT_AC97_L -#define A_OUT_ADC_REC_L 0x16 -#define A_OUT_ADC_REC_R 0x17 -#define A_OUT_ADC_REC A_OUT_ADC_REC_L - -#define EMU_DATA2 0x24 -#define EMU_IPR2 0x28 -#define EMU_INTE2 0x2c -#define EMU_IPR3 0x38 -#define EMU_INTE3 0x3c - -#define EMU_A2_SRCSel 0x60 -#define EMU_A2_SRCMULTI_ENABLE 0x6e - -#define EMU_A_I2S_CAPTURE_96000 0x00000400 - -#define EMU_A2_MIXER_I2S_ENABLE 0x7B -#define EMU_A2_MIXER_SPDIF_ENABLE 0x7A - -#define C_FRONT_L 0 -#define C_FRONT_R 1 -#define C_REC_L 2 -#define C_REC_R 3 -#define C_REAR_L 4 -#define C_REAR_R 5 -#define C_CENTER 6 -#define C_SUB 7 -#define C_SIDE_L 8 -#define C_SIDE_R 9 -#define NUM_CACHES 10 - -#define CDSPDIFMUTE 0 -#define ANALOGMUTE 1 -#define NUM_MUTE 2 - -#define EMU_MAX_GPR 512 -#define EMU_MAX_IRQ_CONSUMERS 32 +#define A_OUT_HPHONE_L 0x04 +#define A_OUT_HPHONE_R 0x05 +#define A_OUT_HPHONE A_OUT_HPHONE_L + +#define A_OUT_A_FRONT_L 0x08 +#define A_OUT_A_FRONT_R 0x09 +#define A_OUT_A_FRONT A_OUT_A_FRONT_L +#define A_OUT_A_CENTER 0x0a +#define A_OUT_A_SUB 0x0b +#define A_OUT_A_SIDE_L 0x0c +#define A_OUT_A_SIDE_R 0x0d +#define A_OUT_A_SIDE A_OUT_A_SIDE_L +#define A_OUT_A_REAR_L 0x0e +#define A_OUT_A_REAR_R 0x0f +#define A_OUT_A_REAR A_OUT_A_REAR_L +#define A_OUT_AC97_L 0x10 +#define A_OUT_AC97_R 0x11 +#define A_OUT_AC97 A_OUT_AC97_L +#define A_OUT_ADC_REC_L 0x16 +#define A_OUT_ADC_REC_R 0x17 +#define A_OUT_ADC_REC A_OUT_ADC_REC_L + +#define EMU_DATA2 0x24 +#define EMU_IPR2 0x28 +#define EMU_INTE2 0x2c +#define EMU_IPR3 0x38 +#define EMU_INTE3 0x3c + +#define EMU_A2_SRCSel 0x60 +#define EMU_A2_SRCMULTI_ENABLE 0x6e + +#define EMU_A_I2S_CAPTURE_96000 0x00000400 + +#define EMU_A2_MIXER_I2S_ENABLE 0x7B +#define EMU_A2_MIXER_SPDIF_ENABLE 0x7A + +#define C_FRONT_L 0 +#define C_FRONT_R 1 +#define C_REC_L 2 +#define C_REC_R 3 +#define C_REAR_L 4 +#define C_REAR_R 5 +#define C_CENTER 6 +#define C_SUB 7 +#define C_SIDE_L 8 +#define C_SIDE_R 9 +#define NUM_CACHES 10 + +#define CDSPDIFMUTE 0 +#define ANALOGMUTE 1 +#define NUM_MUTE 2 + +#define EMU_MAX_GPR 512 +#define EMU_MAX_IRQ_CONSUMERS 32 struct emu_voice { - int vnum; - unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1; - int speed; - int start; - int end; - int vol; + int vnum; + unsigned int b16 : 1, stereo : 1, busy : 1, running : 1, ismaster : 1; + int speed; + int start; + int end; + int vol; uint32_t buf; - void *vbuf; + void *vbuf; struct emu_voice *slave; uint32_t sa; uint32_t ea; @@ -268,23 +267,23 @@ }; struct emu_memblk { - SLIST_ENTRY(emu_memblk) link; - void *buf; - char owner[16]; - bus_addr_t buf_addr; - uint32_t pte_start, pte_size; - bus_dmamap_t buf_map; + SLIST_ENTRY(emu_memblk) link; + void *buf; + char owner[16]; + bus_addr_t buf_addr; + uint32_t pte_start, pte_size; + bus_dmamap_t buf_map; }; struct emu_mem { - uint8_t bmap[EMU_MAXPAGES / 8]; - uint32_t *ptb_pages; - void *silent_page; - bus_addr_t ptb_pages_addr; - bus_addr_t silent_page_addr; - bus_dmamap_t ptb_map; - bus_dmamap_t silent_map; - bus_dma_tag_t dmat; + uint8_t bmap[EMU_MAXPAGES / 8]; + uint32_t *ptb_pages; + void *silent_page; + bus_addr_t ptb_pages_addr; + bus_addr_t silent_page_addr; + bus_dmamap_t ptb_map; + bus_dmamap_t silent_map; + bus_dma_tag_t dmat; struct emu_sc_info *card; SLIST_HEAD(, emu_memblk) blocks; }; @@ -292,240 +291,288 @@ /* rm */ struct emu_rm { struct emu_sc_info *card; - struct mtx gpr_lock; - signed int allocmap[EMU_MAX_GPR]; - int num_gprs; - int last_free_gpr; - int num_used; + struct mtx gpr_lock; + signed int allocmap[EMU_MAX_GPR]; + int num_gprs; + int last_free_gpr; + int num_used; }; struct emu_intr_handler { - void* softc; - uint32_t intr_mask; - uint32_t inte_mask; - uint32_t(*irq_func) (void *softc, uint32_t irq); + void *softc; + uint32_t intr_mask; + uint32_t inte_mask; + uint32_t (*irq_func)(void *softc, uint32_t irq); }; struct emu_sc_info { - struct mtx lock; - struct mtx rw; /* Hardware exclusive access lock */ + struct mtx lock; + struct mtx rw; /* Hardware exclusive access lock */ /* Hardware and subdevices */ - device_t dev; - device_t pcm[RT_COUNT]; - device_t midi[2]; - uint32_t type; - uint32_t rev; + device_t dev; + device_t pcm[RT_COUNT]; + device_t midi[2]; + uint32_t type; + uint32_t rev; - bus_space_tag_t st; + bus_space_tag_t st; bus_space_handle_t sh; - struct cdev *cdev; /* /dev/emu10k character device */ - struct mtx emu10kx_lock; - int emu10kx_isopen; - struct sbuf emu10kx_sbuf; - int emu10kx_bufptr; + struct cdev *cdev; /* /dev/emu10k character device */ + struct mtx emu10kx_lock; + int emu10kx_isopen; + struct sbuf emu10kx_sbuf; + int emu10kx_bufptr; /* Resources */ - struct resource *reg; - struct resource *irq; - void *ih; + struct resource *reg; + struct resource *irq; + void *ih; /* IRQ handlers */ struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS]; /* Card HW configuration */ - unsigned int mode; /* analog / digital */ - unsigned int mchannel_fx; - unsigned int dsp_zero; - unsigned int code_base; - unsigned int code_size; - unsigned int gpr_base; - unsigned int num_gprs; - unsigned int input_base; - unsigned int output_base; - unsigned int efxc_base; - unsigned int opcode_shift; - unsigned int high_operand_shift; - unsigned int address_mask; - uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1, - has_ac97:1, has_51:1, has_71:1, - enable_ir:1, - broken_digital:1, is_cardbus:1; - - signed int mch_disabled, mch_rec, dbg_level; - signed int num_inputs; - unsigned int num_outputs; - unsigned int num_fxbuses; - unsigned int routing_code_start; - unsigned int routing_code_end; + unsigned int mode; /* analog / digital */ + unsigned int mchannel_fx; + unsigned int dsp_zero; + unsigned int code_base; + unsigned int code_size; + unsigned int gpr_base; + unsigned int num_gprs; + unsigned int input_base; + unsigned int output_base; + unsigned int efxc_base; + unsigned int opcode_shift; + unsigned int high_operand_shift; + unsigned int address_mask; + uint32_t is_emu10k1 : 1, is_emu10k2, is_ca0102, is_ca0108 : 1, + has_ac97 : 1, has_51 : 1, has_71 : 1, enable_ir : 1, + broken_digital : 1, is_cardbus : 1; + + signed int mch_disabled, mch_rec, dbg_level; + signed int num_inputs; + unsigned int num_outputs; + unsigned int num_fxbuses; + unsigned int routing_code_start; + unsigned int routing_code_end; /* HW resources */ - struct emu_voice voice[NUM_G]; /* Hardware voices */ - uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */ - int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */ - int timerinterval; - struct emu_rm *rm; - struct emu_mem mem; /* memory */ + struct emu_voice voice[NUM_G]; /* Hardware voices */ + uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */ + int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */ + int timerinterval; + struct emu_rm *rm; + struct emu_mem mem; /* memory */ /* Mixer */ - int mixer_gpr[NUM_MIXERS]; - int mixer_volcache[NUM_MIXERS]; - int cache_gpr[NUM_CACHES]; - int dummy_gpr; - int mute_gpr[NUM_MUTE]; - struct sysctl_ctx_list *ctx; - struct sysctl_oid *root; + int mixer_gpr[NUM_MIXERS]; + int mixer_volcache[NUM_MIXERS]; + int cache_gpr[NUM_CACHES]; + int dummy_gpr; + int mute_gpr[NUM_MUTE]; + struct sysctl_ctx_list *ctx; + struct sysctl_oid *root; }; -static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error); -static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, bus_dmamap_t *map); -static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map); -static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner); -static int emu_memfree(struct emu_mem *mem, void *membuf); -static int emu_memstart(struct emu_mem *mem, void *membuf); +static void emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error); +static void *emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t *addr, + bus_dmamap_t *map); +static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map); +static void *emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t *addr, + const char *owner); +static int emu_memfree(struct emu_mem *mem, void *membuf); +static int emu_memstart(struct emu_mem *mem, void *membuf); /* /dev */ -static int emu10kx_dev_init(struct emu_sc_info *sc); -static int emu10kx_dev_uninit(struct emu_sc_info *sc); -static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s); +static int emu10kx_dev_init(struct emu_sc_info *sc); +static int emu10kx_dev_uninit(struct emu_sc_info *sc); +static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s); -static void emumix_set_mode(struct emu_sc_info *sc, int mode); -static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode); -static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol); -static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val); -static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS); +static void emumix_set_mode(struct emu_sc_info *sc, int mode); +static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode); +static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol); +static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val); +static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS); -static int emu_rm_init(struct emu_sc_info *sc); -static int emu_rm_uninit(struct emu_sc_info *sc); -static int emu_rm_gpr_alloc(struct emu_rm *rm, int count); +static int emu_rm_init(struct emu_sc_info *sc); +static int emu_rm_uninit(struct emu_sc_info *sc); +static int emu_rm_gpr_alloc(struct emu_rm *rm, int count); static unsigned int emu_getcard(device_t dev); -static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size); -static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size); -static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data); - -static void emu_vstop(struct emu_sc_info *sc, char channel, int enable); - -static void emu_intr(void *p); -static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data); -static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc); -static void emu_initefx(struct emu_sc_info *sc); - -static int emu_cardbus_init(struct emu_sc_info *sc); -static int emu_init(struct emu_sc_info *sc); -static int emu_uninit(struct emu_sc_info *sc); - -static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result); -static int emu_write_ivar(device_t bus __unused, device_t dev __unused, +static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, + unsigned int size); +static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, + uint32_t data, unsigned int size); +static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data); + +static void emu_vstop(struct emu_sc_info *sc, char channel, int enable); + +static void emu_intr(void *p); +static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, + unsigned int data); +static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, + unsigned int z, unsigned int w, unsigned int x, unsigned int y, + uint32_t *pc); +static void emu_initefx(struct emu_sc_info *sc); + +static int emu_cardbus_init(struct emu_sc_info *sc); +static int emu_init(struct emu_sc_info *sc); +static int emu_uninit(struct emu_sc_info *sc); + +static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, + uintptr_t *result); +static int emu_write_ivar(device_t bus __unused, device_t dev __unused, int ivar_index, uintptr_t value __unused); -static int emu_pci_probe(device_t dev); -static int emu_pci_attach(device_t dev); -static int emu_pci_detach(device_t dev); -static int emu_modevent(module_t mod __unused, int cmd, void *data __unused); - -#ifdef SND_EMU10KX_DEBUG - -#define EMU_MTX_DEBUG() do { \ - if (mtx_owned(&sc->rw)) { \ - printf("RW owned in %s line %d for %s\n", __func__, \ - __LINE__ , device_get_nameunit(sc->dev)); \ - printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \ - printf("rw lock: value %x thread %x\n", \ - ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \ - (uintptr_t)curthread); \ - printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\ - db_show_mtx(&sc->rw); \ - } \ +static int emu_pci_probe(device_t dev); +static int emu_pci_attach(device_t dev); +static int emu_pci_detach(device_t dev); +static int emu_modevent(module_t mod __unused, int cmd, void *data __unused); + +#ifdef SND_EMU10KX_DEBUG + +#define EMU_MTX_DEBUG() \ + do { \ + if (mtx_owned(&sc->rw)) { \ + printf("RW owned in %s line %d for %s\n", __func__, \ + __LINE__, device_get_nameunit(sc->dev)); \ + printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \ + printf("rw lock: value %x thread %x\n", \ + ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \ + (uintptr_t)curthread); \ + printf("rw lock: recursed %d\n", \ + mtx_recursed(&sc->rw)); \ + db_show_mtx(&sc->rw); \ + } \ } while (0) #else -#define EMU_MTX_DEBUG() do { \ +#define EMU_MTX_DEBUG() \ + do { \ } while (0) #endif -#define EMU_RWLOCK() do { \ - EMU_MTX_DEBUG(); \ - mtx_lock(&(sc->rw)); \ +#define EMU_RWLOCK() \ + do { \ + EMU_MTX_DEBUG(); \ + mtx_lock(&(sc->rw)); \ } while (0) -#define EMU_RWUNLOCK() do { \ - mtx_unlock(&(sc->rw)); \ - EMU_MTX_DEBUG(); \ +#define EMU_RWUNLOCK() \ + do { \ + mtx_unlock(&(sc->rw)); \ + EMU_MTX_DEBUG(); \ } while (0) /* Supported cards */ struct emu_hwinfo { - uint16_t vendor; - uint16_t device; - uint16_t subvendor; - uint16_t subdevice; - char SBcode[8]; - char desc[32]; - int flags; + uint16_t vendor; + uint16_t device; + uint16_t subvendor; + uint16_t subdevice; + char SBcode[8]; + char desc[32]; + int flags; }; static struct emu_hwinfo emu_cards[] = { - {0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0}, + { 0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", + 0 }, /* 0x0020..0x002f 4.0 EMU10K1 cards */ - {0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1}, + { 0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", + HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", + HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x002f, "CT????", + "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1 }, /* (range unknown) 5.1 EMU10K1 cards */ - {0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, + { 0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", + HAS_AC97 | HAS_51 | IS_EMU10K1 }, /* 0x80??..0x805? 4.0 EMU10K1 cards */ - {0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1}, + { 0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", + HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", + HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", + HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8025, "CT????", + "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", + HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", + HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", + HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", + HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", + HAS_AC97 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", + HAS_AC97 | IS_EMU10K1 }, /* 0x8061..0x???? 5.1 EMU10K1 cards */ - {0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1}, - {0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1}, + { 0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", + HAS_AC97 | HAS_51 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", + HAS_AC97 | HAS_51 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", + HAS_AC97 | HAS_51 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", + HAS_AC97 | HAS_51 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", + HAS_AC97 | HAS_51 | IS_EMU10K1 }, + { 0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", + HAS_AC97 | HAS_51 | IS_EMU10K1 }, /* Generic SB Live! */ - {0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1}, + { 0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", + HAS_AC97 | IS_EMU10K1 }, /* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */ /* 0x0051..0x0051 5.1 CA0100-IAF cards */ - {0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2}, + { 0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", + HAS_AC97 | HAS_51 | IS_EMU10K2 }, /* ES is CA0100-IDF chip that don't work in digital mode */ - {0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL}, + { 0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", + HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL }, /* 0x0053..0x005C 5.1 CA0101-NAF cards */ - {0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, - {0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2}, + { 0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", + HAS_AC97 | HAS_51 | IS_EMU10K2 }, + { 0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", + HAS_AC97 | HAS_51 | IS_EMU10K2 }, /* 0x1002..0x1009 5.1 CA0102-IAT cards */ - {0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102}, - {0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102}, - {0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102}, + { 0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", + HAS_51 | IS_CA0102 }, + { 0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", + HAS_51 | IS_CA0102 }, + { 0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", + HAS_AC97 | HAS_51 | IS_CA0102 }, /* 0x2001..0x2003 7.1 CA0102-ICT cards */ - {0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, - {0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, + { 0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", + HAS_AC97 | HAS_71 | IS_CA0102 }, + { 0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", + HAS_AC97 | HAS_71 | IS_CA0102 }, /* XXX No reports about 0x2003 & 0x2004 cards */ - {0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, - {0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, - {0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102}, + { 0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", + HAS_AC97 | HAS_71 | IS_CA0102 }, + { 0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", + HAS_AC97 | HAS_71 | IS_CA0102 }, + { 0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", + HAS_AC97 | HAS_71 | IS_CA0102 }, /* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */ - {0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102}, + { 0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", + HAS_AC97 | HAS_71 | IS_CA0102 }, /* Generic Audigy or Audigy 2 */ - {0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2}, + { 0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", + HAS_AC97 | HAS_51 | IS_EMU10K2 }, /* We don't support CA0103-DAT (Audigy LS) cards */ /* There is NO CA0104-xxx cards */ @@ -534,25 +581,31 @@ /* There is NO CA0107-xxx cards */ /* 0x1000..0x1001 7.1 CA0108-IAT cards */ - {0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY}, - {0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, - {0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY}, - - {0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS}, - - {0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108}, + { 0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", + HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY }, + { 0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", + HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY }, + { 0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", + HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY }, + + { 0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", + HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS }, + + { 0x1102, 0x0008, 0x0000, 0x0000, "SB????", + "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108 }, }; /* Unsupported cards */ static struct emu_hwinfo emu_bad_cards[] = { /* APS cards should be possible to support */ - {0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0}, - {0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0}, - {0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0}, + { 0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0 }, + { 0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0 }, + { 0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0 }, /* Similar-named ("Live!" or "Audigy") cards on different chipsets */ - {0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0}, - {0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0}, - {0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0}, + { 0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0 }, + { 0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", + 0 }, + { 0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0 }, }; /* @@ -594,7 +647,7 @@ } if (0x0000 == emu_bad_cards[i].subdevice) { thiscard = 0; - break; /* we avoid all this cards */ + break; /* we avoid all this cards */ } } } @@ -622,7 +675,8 @@ } static void -emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) +emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, + unsigned int size) { KASSERT(sc != NULL, ("emu_rd: NULL sc")); @@ -671,7 +725,8 @@ } void -emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data) +emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, + uint32_t data) { uint32_t ptr, mask, size, offset; @@ -716,7 +771,8 @@ } void -emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data) +emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, + uint32_t data) { EMU_RWLOCK(); @@ -740,18 +796,20 @@ emu_rd_nolock(sc, 0x38, 4); emu_wr_nolock(sc, 0x38, data, 4); emu_rd_nolock(sc, 0x38, 4); - } /* * Direct hardware register access - * Assume that it is never used to access EMU_PTR-based registers and can run unlocked. + * Assume that it is never used to access EMU_PTR-based registers and can run + * unlocked. */ void -emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size) +emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, + unsigned int size) { KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR")); - KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR")); + KASSERT(regno != EMU_A2_PTR, + ("emu_wr: attempt to write to EMU_A2_PTR")); emu_wr_nolock(sc, regno, data, size); } @@ -781,7 +839,8 @@ iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2); emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2); DELAY(500); - emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2); + emu_wr_nolock(sc, EMU_A_IOCFG, + iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2); DELAY(500); emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2); DELAY(100); @@ -793,7 +852,8 @@ iocfg = emu_rd_nolock(sc, EMU_HCFG, 4); emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4); DELAY(500); - emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4); + emu_wr_nolock(sc, EMU_HCFG, + iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4); DELAY(100); emu_wr_nolock(sc, EMU_HCFG, iocfg, 4); device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n"); @@ -814,7 +874,7 @@ mtx_lock(&sc->lock); for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) if (sc->timer[i] == 0) { - sc->timer[i] = -1; /* disable it */ + sc->timer[i] = -1; /* disable it */ timer = i; mtx_unlock(&sc->lock); return (timer); @@ -833,7 +893,7 @@ return (-1); RANGE(delay, 16, 1024); - RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); + RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS - 1); mtx_lock(&sc->lock); sc->timer[timer] = delay; @@ -858,7 +918,7 @@ if (timer < 0) return (-1); - RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); + RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS - 1); mtx_lock(&sc->lock); @@ -896,7 +956,7 @@ if (timer < 0) return (-1); - RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1); + RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS - 1); emu_timer_enable(sc, timer, 0); @@ -912,7 +972,8 @@ * emu_intr_ - HW interrupt handler management */ int -emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc) +emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, + uint32_t intr_mask, uint32_t (*func)(void *softc, uint32_t irq), void *isc) { int i; uint32_t x; @@ -929,7 +990,8 @@ emu_wr(sc, EMU_INTE, x, 4); mtx_unlock(&sc->lock); if (sc->dbg_level > 1) - device_printf(sc->dev, "ihandle %d registered\n", i); + device_printf(sc->dev, + "ihandle %d registered\n", i); return (i); } @@ -988,13 +1050,16 @@ for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) { if ((((sc->ihandler[i].intr_mask) & stat) != 0) && (((void *)sc->ihandler[i].irq_func) != NULL)) { - ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc, + ack |= sc->ihandler[i].irq_func( + sc->ihandler[i].softc, (sc->ihandler[i].intr_mask) & stat); } } - if (sc->dbg_level > 1) - if (stat & (~ack)) - device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack)); + if (sc->dbg_level > 1) + if (stat & (~ack)) + device_printf(sc->dev, + "Unhandled interrupt: %08x\n", + stat & (~ack)); } if ((sc->is_ca0102) || (sc->is_ca0108)) @@ -1005,10 +1070,11 @@ break; emu_wr(sc, EMU_IPR2, stat, 4); if (sc->dbg_level > 1) - device_printf(sc->dev, "EMU_IPR2: %08x\n", stat); + device_printf(sc->dev, "EMU_IPR2: %08x\n", + stat); - break; /* to avoid infinite loop. should be removed - * after completion of P16V interface. */ + break; /* to avoid infinite loop. should be removed + * after completion of P16V interface. */ } if (sc->is_ca0102) @@ -1019,10 +1085,11 @@ break; emu_wr(sc, EMU_IPR3, stat, 4); if (sc->dbg_level > 1) - device_printf(sc->dev, "EMU_IPR3: %08x\n", stat); + device_printf(sc->dev, "EMU_IPR3: %08x\n", + stat); - break; /* to avoid infinite loop. should be removed - * after completion of S/PDIF interface */ + break; /* to avoid infinite loop. should be removed + * after completion of S/PDIF interface */ } } @@ -1037,11 +1104,11 @@ } static void -emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error) +emu_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) { - bus_addr_t *phys = (bus_addr_t *) arg; + bus_addr_t *phys = (bus_addr_t *)arg; - *phys = error ? 0 : (bus_addr_t) segs->ds_addr; + *phys = error ? 0 : (bus_addr_t)segs->ds_addr; if (bootverbose) { printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n", @@ -1051,24 +1118,30 @@ } static void * -emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, +emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t *addr, bus_dmamap_t *map) { void *dmabuf; int error; *addr = 0; - if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, map))) { + if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, + map))) { if (mem->card->dbg_level > 2) - device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error); + device_printf(mem->card->dev, + "emu_malloc: failed to alloc DMA map: %d\n", error); return (NULL); - } - if ((error = bus_dmamap_load(mem->dmat, *map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) { + } + if ((error = bus_dmamap_load(mem->dmat, *map, dmabuf, sz, emu_setmap, + addr, 0)) || + !*addr) { if (mem->card->dbg_level > 2) - device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error); + device_printf(mem->card->dev, + "emu_malloc: failed to load DMA memory: %d\n", + error); bus_dmamem_free(mem->dmat, dmabuf, *map); return (NULL); - } + } return (dmabuf); } @@ -1080,7 +1153,8 @@ } static void * -emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner) +emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t *addr, + const char *owner) { uint32_t blksz, start, idx, ofs, tmp, found; struct emu_memblk *blk; @@ -1091,9 +1165,10 @@ blksz++; if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) { if (mem->card->dbg_level > 2) - device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n"); + device_printf(mem->card->dev, + "emu_memalloc: memory request tool large\n"); return (NULL); - } + } /* find a free block in the bitmap */ found = 0; start = 1; @@ -1107,21 +1182,24 @@ } if (!found) { if (mem->card->dbg_level > 2) - device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n"); + device_printf(mem->card->dev, + "emu_memalloc: no free space in bitmap\n"); return (NULL); - } + } blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT); if (blk == NULL) { if (mem->card->dbg_level > 2) - device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n"); + device_printf(mem->card->dev, + "emu_memalloc: buffer allocation failed\n"); return (NULL); - } + } bzero(blk, sizeof(*blk)); membuf = emu_malloc(mem, sz, &blk->buf_addr, &blk->buf_map); *addr = blk->buf_addr; if (membuf == NULL) { if (mem->card->dbg_level > 2) - device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n"); + device_printf(mem->card->dev, + "emu_memalloc: can't setup HW memory\n"); free(blk, M_DEVBUF); return (NULL); } @@ -1133,7 +1211,7 @@ ofs = 0; for (idx = start; idx < start + blksz; idx++) { mem->bmap[idx >> 3] |= 1 << (idx & 7); - tmp = (uint32_t) (blk->buf_addr + ofs); + tmp = (uint32_t)(blk->buf_addr + ofs); mem->ptb_pages[idx] = (tmp << 1) | idx; ofs += EMUPAGESIZE; } @@ -1148,7 +1226,7 @@ struct emu_memblk *blk, *i; blk = NULL; - SLIST_FOREACH(i, &mem->blocks, link) { + SLIST_FOREACH (i, &mem->blocks, link) { if (i->buf == membuf) blk = i; } @@ -1156,8 +1234,9 @@ return (EINVAL); SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link); emu_free(mem, membuf, blk->buf_map); - tmp = (uint32_t) (mem->silent_page_addr) << 1; - for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) { + tmp = (uint32_t)(mem->silent_page_addr) << 1; + for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; + idx++) { mem->bmap[idx >> 3] &= ~(1 << (idx & 7)); mem->ptb_pages[idx] = tmp | idx; } @@ -1171,7 +1250,7 @@ struct emu_memblk *blk, *i; blk = NULL; - SLIST_FOREACH(i, &mem->blocks, link) { + SLIST_FOREACH (i, &mem->blocks, link) { if (i->buf == membuf) blk = i; } @@ -1183,53 +1262,50 @@ static uint32_t emu_rate_to_pitch(uint32_t rate) { - static uint32_t logMagTable[128] = { - 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, - 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, - 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, - 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, - 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7, - 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829, - 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e, - 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26, - 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, - 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, - 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, - 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c, - 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3, - 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3, - 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83, - 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df - }; - static char logSlopeTable[128] = { - 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58, - 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, - 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, - 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, - 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47, - 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44, - 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, - 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, - 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, - 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, - 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37, - 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, - 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, - 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, - 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30, - 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f - }; + static uint32_t logMagTable[128] = { 0x00000, 0x02dfc, 0x05b9e, 0x088e6, + 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2, 0x1663f, 0x1918a, 0x1bc84, + 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5, 0x2b803, 0x2e0e8, + 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081, 0x3f782, + 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191, + 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, + 0x623a7, 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, + 0x7164b, 0x73829, 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, + 0x7ff5e, 0x81fed, 0x8404e, 0x86082, 0x88089, 0x8a064, 0x8c014, + 0x8df98, 0x8fef1, 0x91e20, 0x93d26, 0x95c01, 0x97ab4, 0x9993e, + 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d, 0xa4d3c, 0xa6ab5, + 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885, 0xb3500, + 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899, + 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, + 0xcd07c, 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, + 0xd8720, 0xda0c3, 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, + 0xe384a, 0xe512c, 0xe69f3, 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, + 0xee44c, 0xefc78, 0xf148a, 0xf2c83, 0xf4463, 0xf5c2a, 0xf73da, + 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df }; + static char logSlopeTable[128] = { 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, + 0x58, 0x58, 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53, + 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f, 0x4e, 0x4d, + 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b, 0x4a, 0x4a, 0x49, 0x49, + 0x48, 0x48, 0x47, 0x47, 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, + 0x44, 0x44, 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41, + 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e, 0x3e, 0x3e, + 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c, 0x3b, 0x3b, 0x3b, 0x3b, + 0x3a, 0x3a, 0x3a, 0x39, 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, + 0x38, 0x37, 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35, + 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34, 0x33, 0x33, + 0x33, 0x33, 0x32, 0x32, 0x32, 0x32, 0x32, 0x31, 0x31, 0x31, + 0x31, 0x31, 0x30, 0x30, 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, + 0x2f, 0x2f }; int i; if (rate == 0) return (0); - rate *= 11185; /* Scale 48000 to 0x20002380 */ + rate *= 11185; /* Scale 48000 to 0x20002380 */ for (i = 31; i > 0; i--) { - if (rate & 0x80000000) { /* Detect leading "1" */ - return (((uint32_t) (i - 15) << 20) + + if (rate & 0x80000000) { /* Detect leading "1" */ + return (((uint32_t)(i - 15) << 20) + logMagTable[0x7f & (rate >> 24)] + (0x7f & (rate >> 17)) * - logSlopeTable[0x7f & (rate >> 24)]); + logSlopeTable[0x7f & (rate >> 24)]); } rate <<= 1; } @@ -1252,7 +1328,8 @@ v = NULL; mtx_lock(&sc->lock); - for (i = 0; i < NUM_G && sc->voice[i].busy; i++); + for (i = 0; i < NUM_G && sc->voice[i].busy; i++) + ; if (i < NUM_G) { v = &sc->voice[i]; v->busy = 1; @@ -1290,16 +1367,18 @@ vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit"); if (vbuf == NULL) { - if(sc->dbg_level > 2) - device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n"); + if (sc->dbg_level > 2) + device_printf(sc->dev, + "emu_memalloc returns NULL in enu_vinit\n"); return (ENOMEM); - } + } if (b != NULL) sndbuf_setup(b, vbuf, sz); m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE; if (m->start < 0) { - if(sc->dbg_level > 2) - device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n"); + if (sc->dbg_level > 2) + device_printf(sc->dev, + "emu_memstart returns (-1) in enu_vinit\n"); emu_memfree(&sc->mem, vbuf); return (ENOMEM); } @@ -1348,7 +1427,7 @@ } void -emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v) +emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v) { int i; @@ -1387,40 +1466,41 @@ start = v->sa + val; if (sc->is_emu10k1) { - emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) | - (v->routing[2] << 8) | - (v->routing[1] << 4) | - (v->routing[0] << 0)) << 16); + emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, + ((v->routing[3] << 12) | (v->routing[2] << 8) | + (v->routing[1] << 4) | (v->routing[0] << 0)) + << 16); } else { - emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) | - (v->routing[2] << 16) | - (v->routing[1] << 8) | - (v->routing[0] << 0)); - emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) | - (v->routing[6] << 16) | - (v->routing[5] << 8) | - (v->routing[4] << 0)); - emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) | - (v->amounts[6] << 26) | - (v->amounts[5] << 8) | - (v->amounts[4] << 0)); - } - emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0)); + emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, + (v->routing[3] << 24) | (v->routing[2] << 16) | + (v->routing[1] << 8) | (v->routing[0] << 0)); + emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, + (v->routing[7] << 24) | (v->routing[6] << 16) | + (v->routing[5] << 8) | (v->routing[4] << 0)); + emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, + (v->amounts[7] << 24) | (v->amounts[6] << 26) | + (v->amounts[5] << 8) | (v->amounts[4] << 0)); + } + emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, + (v->amounts[0] << 8) | (v->amounts[1] << 0)); emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24)); emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24)); - emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); + emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, + start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0); emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0); - silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK; + silent_page = ((uint32_t)(sc->mem.silent_page_addr) << 1) | + EMU_CHAN_MAP_PTI_MASK; emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page); emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page); emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK); emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK); emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0); - emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK); + emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, + EMU_CHAN_DCYSUSM_DECAYTIME_MASK); emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000); emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000); emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0); @@ -1428,7 +1508,8 @@ emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0); emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000); - emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK); + emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, + EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK); emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000); emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f); @@ -1498,7 +1579,8 @@ int s, ptr; s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0); - ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s; + ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) + << s; return (ptr & ~0x0000001f); } @@ -1510,14 +1592,18 @@ } static void -emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc) +emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, + unsigned int w, unsigned int x, unsigned int y, uint32_t *pc) { if ((*pc) + 1 > sc->code_size) { - device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc)); + device_printf(sc->dev, + "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", + (*pc)); return; } emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y); - emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w); + emu_wrefx(sc, (*pc) * 2 + 1, + (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w); (*pc)++; } @@ -1525,9 +1611,9 @@ sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS) { struct emu_sc_info *sc; - int mixer_id; - int new_vol; - int err; + int mixer_id; + int new_vol; + int err; sc = arg1; mixer_id = arg2; @@ -1545,10 +1631,11 @@ } static int -emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume) +emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, + uint32_t defvolume) { int volgpr; - char sysctl_name[32]; + char sysctl_name[32]; volgpr = emu_rm_gpr_alloc(sc->rm, 1); emumix_set_fxvol(sc, volgpr, defvolume); @@ -1563,10 +1650,9 @@ * discussion around 2006-05-24. */ snprintf(sysctl_name, 32, "_%s", mix_name); - SYSCTL_ADD_PROC(sc->ctx, - SYSCTL_CHILDREN(sc->root), OID_AUTO, sysctl_name, - CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, mix_id, - sysctl_emu_mixer_control, "I", ""); + SYSCTL_ADD_PROC(sc->ctx, SYSCTL_CHILDREN(sc->root), OID_AUTO, + sysctl_name, CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, + mix_id, sysctl_emu_mixer_control, "I", ""); } return (volgpr); @@ -1576,8 +1662,8 @@ sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS) { struct emu_sc_info *sc; - int new_val; - int err; + int new_val; + int err; sc = arg1; @@ -1590,12 +1676,12 @@ return (EINVAL); switch (new_val) { - case 0: - emumix_set_mode(sc, MODE_ANALOG); - break; - case 1: - emumix_set_mode(sc, MODE_DIGITAL); - break; + case 0: + emumix_set_mode(sc, MODE_ANALOG); + break; + case 1: + emumix_set_mode(sc, MODE_DIGITAL); + break; } return (0); } @@ -1605,9 +1691,8 @@ { /* XXX temporary? */ SYSCTL_ADD_PROC(sc->ctx, SYSCTL_CHILDREN(sc->root), OID_AUTO, - "_digital", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, - sc, 0, sysctl_emu_digitalswitch_control, "I", - "Enable digital output"); + "_digital", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0, + sysctl_emu_digitalswitch_control, "I", "Enable digital output"); return; } @@ -1616,74 +1701,58 @@ * Allocate cache GPRs that will hold mixed output channels * and clear it on every DSP run. */ -#define EFX_CACHE(CACHE_IDX) do { \ - sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \ - emu_addefxop(sc, ACC3, \ - GPR(sc->cache_gpr[CACHE_IDX]), \ - DSP_CONST(0), \ - DSP_CONST(0), \ - DSP_CONST(0), \ - &pc); \ -} while (0) +#define EFX_CACHE(CACHE_IDX) \ + do { \ + sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \ + emu_addefxop(sc, ACC3, GPR(sc->cache_gpr[CACHE_IDX]), \ + DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc); \ + } while (0) /* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */ -#define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \ - sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \ - sc->mixer_volcache[IN_GPR_IDX] = DEF; \ - emu_addefxop(sc, MACS, \ - GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ - GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ - INP_NR, \ - GPR(sc->mixer_gpr[IN_GPR_IDX]), \ - &pc); \ -} while (0) +#define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) \ + do { \ + sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, \ + IN_GPR_IDX, DEF); \ + sc->mixer_volcache[IN_GPR_IDX] = DEF; \ + emu_addefxop(sc, MACS, GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ + GPR(sc->cache_gpr[OUT_CACHE_IDX]), INP_NR, \ + GPR(sc->mixer_gpr[IN_GPR_IDX]), &pc); \ + } while (0) /* allocate GPR, OUT = IN * VOL */ -#define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \ - sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \ - sc->mixer_volcache[OUT_GPR_IDX] = DEF; \ - emu_addefxop(sc, MACS, \ - OUTP(OUTP_NR), \ - DSP_CONST(0), \ - GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ - GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ - &pc); \ -} while (0) +#define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) \ + do { \ + sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, \ + OUT_GPR_IDX, DEF); \ + sc->mixer_volcache[OUT_GPR_IDX] = DEF; \ + emu_addefxop(sc, MACS, OUTP(OUTP_NR), DSP_CONST(0), \ + GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ + GPR(sc->mixer_gpr[OUT_GPR_IDX]), &pc); \ + } while (0) /* like EFX_OUTPUT, but don't allocate mixer gpr */ -#define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do { \ - emu_addefxop(sc, MACS, \ - OUTP(OUTP_NR), \ - DSP_CONST(0), \ - GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ - GPR(sc->mixer_gpr[OUT_GPR_IDX]), \ - &pc); \ -} while (0) +#define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) \ + do { \ + emu_addefxop(sc, MACS, OUTP(OUTP_NR), DSP_CONST(0), \ + GPR(sc->cache_gpr[OUT_CACHE_IDX]), \ + GPR(sc->mixer_gpr[OUT_GPR_IDX]), &pc); \ + } while (0) /* skip next OPCOUNT instructions if FLAG != 0 */ -#define EFX_SKIP(OPCOUNT, FLAG_GPR) do { \ - emu_addefxop(sc, MACS, \ - DSP_CONST(0), \ - GPR(sc->mute_gpr[FLAG_GPR]), \ - DSP_CONST(0), \ - DSP_CONST(0), \ - &pc); \ - emu_addefxop(sc, SKIP, \ - DSP_CCR, \ - DSP_CCR, \ - COND_NEQ_ZERO, \ - OPCOUNT, \ - &pc); \ -} while (0) - -#define EFX_COPY(TO, FROM) do { \ - emu_addefxop(sc, ACC3, \ - TO, \ - DSP_CONST(0), \ - DSP_CONST(0), \ - FROM, \ - &pc); \ -} while (0) +#define EFX_SKIP(OPCOUNT, FLAG_GPR) \ + do { \ + emu_addefxop(sc, MACS, DSP_CONST(0), \ + GPR(sc->mute_gpr[FLAG_GPR]), DSP_CONST(0), DSP_CONST(0), \ + &pc); \ + emu_addefxop(sc, SKIP, DSP_CCR, DSP_CCR, COND_NEQ_ZERO, \ + OPCOUNT, &pc); \ + } while (0) + +#define EFX_COPY(TO, FROM) \ + do { \ + emu_addefxop(sc, ACC3, TO, DSP_CONST(0), DSP_CONST(0), FROM, \ + &pc); \ + } while (0) static void emu_initefx(struct emu_sc_info *sc) @@ -1702,9 +1771,11 @@ pc = 0; for (i = 0; i < sc->code_size; i++) { if (sc->is_emu10k1) { - emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc); + emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), + DSP_CONST(0x0), DSP_CONST(0x0), &pc); } else { - emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc); + emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), + DSP_CONST(0xf), DSP_CONST(0x0), &pc); } } @@ -1726,8 +1797,9 @@ */ /* clean outputs */ - for (i = 0; i < 16 ; i++) { - emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc); + for (i = 0; i < 16; i++) { + emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), + DSP_CONST(0), &pc); } if (sc->is_emu10k1) { @@ -1743,25 +1815,35 @@ EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); /* in0, from AC97 codec output */ - EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0); - EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0); - EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); - EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); + EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, + C_FRONT_L, 0); + EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, + C_FRONT_R, 0); + EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, + 0); + EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, + 0); /* in1, from CD S/PDIF */ /* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */ EFX_SKIP(4, CDSPDIFMUTE); - EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); - EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); + EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, + 0); + EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, + 0); EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); if (sc->dbg_level > 0) { /* in2, ZoomVide (???) */ - EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0); - EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0); - EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0); - EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0); + EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, + C_FRONT_L, 0); + EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, + C_FRONT_R, 0); + EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, + C_REC_L, 0); + EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, + C_REC_R, 0); } /* in3, TOSLink */ @@ -1776,8 +1858,10 @@ EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0); /* in5, on-card S/PDIF */ - EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); - EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); + EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, + 0); + EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, + 0); EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); @@ -1789,15 +1873,21 @@ if (sc->dbg_level > 0) { /* in7, unknown */ - EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); - EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); - EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); - EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); + EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, + C_FRONT_L, 0); + EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, + C_FRONT_R, 0); + EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, + 0); + EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, + 0); } /* analog and digital */ - EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100); - EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100); + EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, + OUT_AC97_L, 100); + EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, + OUT_AC97_R, 100); /* S/PDIF */ EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L); EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R); @@ -1806,8 +1896,10 @@ EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R); /* rec output to "ADC" */ - EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100); - EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100); + EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, + OUT_ADC_REC_L, 100); + EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, + OUT_ADC_REC_R, 100); if (!(sc->mch_disabled)) { /* @@ -1821,33 +1913,45 @@ EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); - EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100); - EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100); + EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, + 100); + EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, + 100); if (sc->has_51) { /* fx4 (pcm2) to center */ EFX_CACHE(C_CENTER); - EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); - EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100); - - /* XXX in digital mode (default) this should be muted because - this output is shared with digital out */ + EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, + 100); + EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, + OUT_D_CENTER, 100); + + /* XXX in digital mode (default) this should be + muted because this output is shared with digital + out */ EFX_SKIP(1, ANALOGMUTE); - EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER); + EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, + OUT_A_CENTER); /* fx5 (pcm3) to sub */ EFX_CACHE(C_SUB); - EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); - EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100); - - /* XXX in digital mode (default) this should be muted because - this output is shared with digital out */ + EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, + 100); + EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, + OUT_D_SUB, 100); + + /* XXX in digital mode (default) this should be + muted because this output is shared with digital + out */ EFX_SKIP(1, ANALOGMUTE); - EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB); + EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, + OUT_A_SUB); } } else { /* SND_EMU10KX_MULTICHANNEL_DISABLED */ - EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */ - EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */ + EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, + 57); /* 75%*75% */ + EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, + 57); /* 75%*75% */ #if 0 /* XXX 5.1 does not work */ @@ -1901,33 +2005,34 @@ } /* !mch_disabled */ if (sc->mch_rec) { /* - * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots - * are used as outputs and already filled with data + * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 + * slots are used as outputs and already filled with + * data */ /* - * XXX On Live! cards stream does not begin at zero offset. - * It can be HW, driver or sound buffering problem. - * Use sync substream (offset 0x3E) to let userland find - * correct data. + * XXX On Live! cards stream does not begin at zero + * offset. It can be HW, driver or sound buffering + * problem. Use sync substream (offset 0x3E) to let + * userland find correct data. */ /* - * Substream map (in byte offsets, each substream is 2 bytes): - * 0x00..0x1E - outputs - * 0x20..0x3E - FX, inputs and sync stream + * Substream map (in byte offsets, each substream is 2 + *bytes): 0x00..0x1E - outputs 0x20..0x3E - FX, inputs + *and sync stream */ /* First 2 channels (offset 0x20,0x22) are empty */ - for(i = (sc->has_51 ? 2 : 0); i < 2; i++) + for (i = (sc->has_51 ? 2 : 0); i < 2; i++) EFX_COPY(FX2(i), DSP_CONST(0)); /* PCM Playback monitoring, offset 0x24..0x2A */ - for(i = 0; i < 4; i++) - EFX_COPY(FX2(i+2), FX(i)); + for (i = 0; i < 4; i++) + EFX_COPY(FX2(i + 2), FX(i)); /* Copy of some inputs, offset 0x2C..0x3C */ - for(i = 0; i < 9; i++) - EFX_COPY(FX2(i+8), INP(i)); + for (i = 0; i < 9; i++) + EFX_COPY(FX2(i + 8), INP(i)); /* sync data (0xc0de, offset 0x3E) */ sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1); @@ -1952,30 +2057,40 @@ EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0); /* in0, from AC97 codec output */ - EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100); - EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100); + EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, + 100); + EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, + 100); EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0); EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0); /* in1, from CD S/PDIF */ - EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0); - EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0); + EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, + 0); + EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, + 0); EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0); EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0); /* in2, optical & coax S/PDIF on AudigyDrive*/ /* XXX Should be muted when GPRSCS valid stream == 0 */ - EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0); - EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0); + EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, + 0); + EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, + 0); EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0); EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0); if (sc->dbg_level > 0) { /* in3, unknown */ - EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0); - EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0); - EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0); - EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0); + EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, + C_FRONT_L, 0); + EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, + C_FRONT_R, 0); + EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, + 0); + EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, + 0); } /* in4, LineIn 2 on AudigyDrive */ @@ -1985,8 +2100,10 @@ EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0); /* in5, on-card S/PDIF */ - EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0); - EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0); + EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, + 0); + EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, + 0); EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0); EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0); @@ -1998,16 +2115,22 @@ if (sc->dbg_level > 0) { /* in7, unknown */ - EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0); - EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0); - EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0); - EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0); + EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, + C_FRONT_L, 0); + EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, + C_FRONT_R, 0); + EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, + 0); + EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, + 0); } /* front output to headphones and alog and digital *front */ /* volume controlled by AC97 emulation */ - EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100); - EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100); + EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, + 100); + EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, + 100); EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L); EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R); EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L); @@ -2030,15 +2153,18 @@ EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100); EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100); - EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100); - EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100); + EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, + A_OUT_A_REAR_L, 100); + EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, + A_OUT_A_REAR_R, 100); EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L); EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R); /* fx4 (pcm2) to center */ EFX_CACHE(C_CENTER); EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100); - EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); + EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, + A_OUT_D_CENTER, 100); #if 0 /* * XXX in digital mode (default) this should be muted @@ -2049,7 +2175,8 @@ /* fx5 (pcm3) to sub */ EFX_CACHE(C_SUB); EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100); - EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); + EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, + 100); #if 0 /* * XXX in digital mode (default) this should be muted @@ -2058,68 +2185,81 @@ EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); #endif if (sc->has_71) { - /* XXX this will broke headphones on AudigyDrive */ + /* XXX this will broke headphones on AudigyDrive + */ /* fx6/7 (pcm4) to side */ EFX_CACHE(C_SIDE_L); EFX_CACHE(C_SIDE_R); - EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100); - EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100); - EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100); - EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100); - EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L); - EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R); + EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, + 100); + EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, + 100); + EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, + A_OUT_A_SIDE_L, 100); + EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, + A_OUT_A_SIDE_R, 100); + EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, + A_OUT_D_SIDE_L); + EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, + A_OUT_D_SIDE_R); } - } else { /* mch_disabled */ - EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L); - EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R); + } else { /* mch_disabled */ + EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, + A_OUT_A_REAR_L); + EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, + A_OUT_A_REAR_R); - EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L); - EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R); + EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, + A_OUT_D_REAR_L); + EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, + A_OUT_D_REAR_R); if (sc->has_51) { /* (fx0+fx1)/2 to center */ EFX_CACHE(C_CENTER); emu_addefxop(sc, MACS, - GPR(sc->cache_gpr[C_CENTER]), - GPR(sc->cache_gpr[C_CENTER]), - DSP_CONST(0xd), /* = 1/2 */ - GPR(sc->cache_gpr[C_FRONT_L]), - &pc); + GPR(sc->cache_gpr[C_CENTER]), + GPR(sc->cache_gpr[C_CENTER]), + DSP_CONST(0xd), /* = 1/2 */ + GPR(sc->cache_gpr[C_FRONT_L]), &pc); emu_addefxop(sc, MACS, - GPR(sc->cache_gpr[C_CENTER]), - GPR(sc->cache_gpr[C_CENTER]), - DSP_CONST(0xd), /* = 1/2 */ - GPR(sc->cache_gpr[C_FRONT_R]), - &pc); - EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100); - - /* XXX in digital mode (default) this should be muted because - this output is shared with digital out */ + GPR(sc->cache_gpr[C_CENTER]), + GPR(sc->cache_gpr[C_CENTER]), + DSP_CONST(0xd), /* = 1/2 */ + GPR(sc->cache_gpr[C_FRONT_R]), &pc); + EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, + A_OUT_D_CENTER, 100); + + /* XXX in digital mode (default) this should be + muted because this output is shared with digital + out */ EFX_SKIP(1, ANALOGMUTE); - EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER); + EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, + A_OUT_A_CENTER); /* (fx0+fx1)/2 to sub */ EFX_CACHE(C_SUB); emu_addefxop(sc, MACS, - GPR(sc->cache_gpr[C_SUB]), - GPR(sc->cache_gpr[C_SUB]), - DSP_CONST(0xd), /* = 1/2 */ - GPR(sc->cache_gpr[C_FRONT_L]), - &pc); + GPR(sc->cache_gpr[C_SUB]), + GPR(sc->cache_gpr[C_SUB]), + DSP_CONST(0xd), /* = 1/2 */ + GPR(sc->cache_gpr[C_FRONT_L]), &pc); emu_addefxop(sc, MACS, - GPR(sc->cache_gpr[C_SUB]), - GPR(sc->cache_gpr[C_SUB]), - DSP_CONST(0xd), /* = 1/2 */ - GPR(sc->cache_gpr[C_FRONT_R]), - &pc); + GPR(sc->cache_gpr[C_SUB]), + GPR(sc->cache_gpr[C_SUB]), + DSP_CONST(0xd), /* = 1/2 */ + GPR(sc->cache_gpr[C_FRONT_R]), &pc); /* XXX add lowpass filter here */ - EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100); + EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, + A_OUT_D_SUB, 100); - /* XXX in digital mode (default) this should be muted because - this output is shared with digital out */ + /* XXX in digital mode (default) this should be + muted because this output is shared with digital + out */ EFX_SKIP(1, ANALOGMUTE); - EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB); + EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, + A_OUT_A_SUB); } } /* mch_disabled */ if (sc->mch_rec) { @@ -2139,12 +2279,12 @@ */ /* PCM Playback monitoring, offsets 0x40..0x5E */ - for(i = 0; i < 16; i++) + for (i = 0; i < 16; i++) EFX_COPY(FX2(i), FX(i)); /* Copy of all inputs, offsets 0x60..0x7E */ - for(i = 0; i < 16; i++) - EFX_COPY(FX2(i+16), INP(i)); + for (i = 0; i < 16; i++) + EFX_COPY(FX2(i + 16), INP(i)); #if 0 /* XXX Audigy seems to work correct and does not need this */ /* sync data (0xc0de), offset 0x7E */ @@ -2166,20 +2306,21 @@ } /* /dev/em10kx */ -static d_open_t emu10kx_open; -static d_close_t emu10kx_close; -static d_read_t emu10kx_read; +static d_open_t emu10kx_open; +static d_close_t emu10kx_close; +static d_read_t emu10kx_read; static struct cdevsw emu10kx_cdevsw = { - .d_open = emu10kx_open, - .d_close = emu10kx_close, - .d_read = emu10kx_read, - .d_name = "emu10kx", - .d_version = D_VERSION, + .d_open = emu10kx_open, + .d_close = emu10kx_close, + .d_read = emu10kx_read, + .d_name = "emu10kx", + .d_version = D_VERSION, }; static int -emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) +emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, + struct thread *td __unused) { int error; struct emu_sc_info *sc; @@ -2208,7 +2349,8 @@ } static int -emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused) +emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, + struct thread *td __unused) { struct emu_sc_info *sc; @@ -2240,8 +2382,11 @@ } mtx_unlock(&sc->emu10kx_lock); - l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr); - err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0; + l = min(buf->uio_resid, + sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr); + err = (l > 0) ? + uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : + 0; sc->emu10kx_bufptr += l; return (err); @@ -2254,8 +2399,10 @@ sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n"); sbuf_printf(s, "\nHardware resource usage:\n"); - sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs); - sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size); + sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", + sc->rm->num_used, sc->rm->num_gprs); + sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", + sc->routing_code_end, sc->code_size); sbuf_printf(s, "Card supports"); if (sc->has_ac97) { sbuf_printf(s, " AC97 codec"); @@ -2283,22 +2430,28 @@ for (i = 0; i < RT_COUNT; i++) if (sc->pcm[i] != NULL) if (device_is_attached(sc->pcm[i])) { - sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i])); + sbuf_printf(s, "%s on %s\n", + device_get_desc(sc->pcm[i]), + device_get_nameunit(sc->pcm[i])); } if (sc->midi[0] != NULL) if (device_is_attached(sc->midi[0])) { sbuf_printf(s, "EMU10Kx MIDI Interface\n"); - sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0])); + sbuf_printf(s, "\tOn-card connector on %s\n", + device_get_nameunit(sc->midi[0])); } if (sc->midi[1] != NULL) if (device_is_attached(sc->midi[1])) { - sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1])); + sbuf_printf(s, "\tOn-Drive connector on %s\n", + device_get_nameunit(sc->midi[1])); } if (sc->midi[0] != NULL) if (device_is_attached(sc->midi[0])) { - sbuf_printf(s, "\tIR receiver MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled"); + sbuf_printf(s, "\tIR receiver MIDI events %s\n", + sc->enable_ir ? "enabled" : "disabled"); } - sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital"); + sbuf_printf(s, "Card is in %s mode\n", + (sc->mode == MODE_ANALOG) ? "analog" : "digital"); sbuf_finish(s); return (sbuf_len(s)); @@ -2310,10 +2463,12 @@ { int unit; - mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", 0); + mtx_init(&sc->emu10kx_lock, device_get_nameunit(sc->dev), "kxdevlock", + 0); unit = device_get_unit(sc->dev); - sc->cdev = make_dev(&emu10kx_cdevsw, PCMMINOR(unit), UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit); + sc->cdev = make_dev(&emu10kx_cdevsw, PCMMINOR(unit), UID_ROOT, + GID_WHEEL, 0640, "emu10kx%d", unit); if (sc->cdev != NULL) { sc->cdev->si_drv1 = sc; return (0); @@ -2353,7 +2508,8 @@ rm->card = sc; maxcount = sc->num_gprs; rm->num_used = 0; - mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", MTX_DEF); + mtx_init(&(rm->gpr_lock), device_get_nameunit(sc->dev), "gpr alloc", + MTX_DEF); rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR); for (i = 0; i < rm->num_gprs; i++) rm->allocmap[i] = 0; @@ -2373,7 +2529,8 @@ mtx_lock(&(sc->rm->gpr_lock)); for (i = 1; i < sc->rm->last_free_gpr; i++) if (sc->rm->allocmap[i] > 0) - device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i); + device_printf(sc->dev, + "rm: gpr %d not free before uninit\n", i); mtx_unlock(&(sc->rm->gpr_lock)); } @@ -2458,7 +2615,8 @@ if (mode == MODE_DIGITAL) { if (sc->broken_digital) { - device_printf(sc->dev, "Digital mode is reported as broken on this card.\n"); + device_printf(sc->dev, + "Digital mode is reported as broken on this card.\n"); } a_iocfg |= EMU_A_IOCFG_GPOUT1; hcfg |= EMU_HCFG_GPOUT0; @@ -2529,32 +2687,32 @@ emu_wrptr(sc, 0, EMU_SPCS2, spcs); } -#define L2L_POINTS 10 +#define L2L_POINTS 10 static int l2l_df[L2L_POINTS] = { - 0x572C5CA, /* 100..90 */ - 0x3211625, /* 90..80 */ - 0x1CC1A76, /* 80..70 */ - 0x108428F, /* 70..60 */ - 0x097C70A, /* 60..50 */ - 0x0572C5C, /* 50..40 */ - 0x0321162, /* 40..30 */ - 0x01CC1A7, /* 30..20 */ - 0x0108428, /* 20..10 */ - 0x016493D /* 10..0 */ + 0x572C5CA, /* 100..90 */ + 0x3211625, /* 90..80 */ + 0x1CC1A76, /* 80..70 */ + 0x108428F, /* 70..60 */ + 0x097C70A, /* 60..50 */ + 0x0572C5C, /* 50..40 */ + 0x0321162, /* 40..30 */ + 0x01CC1A7, /* 30..20 */ + 0x0108428, /* 20..10 */ + 0x016493D /* 10..0 */ }; static int l2l_f[L2L_POINTS] = { - 0x4984461A, /* 90 */ - 0x2A3968A7, /* 80 */ - 0x18406003, /* 70 */ - 0x0DEDC66D, /* 60 */ - 0x07FFFFFF, /* 50 */ - 0x04984461, /* 40 */ - 0x02A3968A, /* 30 */ - 0x01840600, /* 20 */ - 0x00DEDC66, /* 10 */ - 0x00000000 /* 0 */ + 0x4984461A, /* 90 */ + 0x2A3968A7, /* 80 */ + 0x18406003, /* 70 */ + 0x0DEDC66D, /* 60 */ + 0x07FFFFFF, /* 50 */ + 0x04984461, /* 40 */ + 0x02A3968A, /* 30 */ + 0x01840600, /* 20 */ + 0x00DEDC66, /* 10 */ + 0x00000000 /* 0 */ }; static int @@ -2597,7 +2755,7 @@ kdb_backtrace(); #endif return; - } + } emu_wrptr(sc, 0, GPR(gpr), val); } @@ -2652,7 +2810,10 @@ int i; /* disable audio and lock cache */ - emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); + emu_wr(sc, EMU_HCFG, + EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | + EMU_HCFG_MUTEBUTTONENABLE, + 4); /* reset recording buffers */ emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); @@ -2663,7 +2824,10 @@ emu_wrptr(sc, 0, EMU_ADCBA, 0); /* disable channel interrupt */ - emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4); + emu_wr(sc, EMU_INTE, + EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | + EMU_INTE_PCIERRENABLE, + 4); emu_wrptr(sc, 0, EMU_CLIEL, 0); emu_wrptr(sc, 0, EMU_CLIEH, 0); emu_wrptr(sc, 0, EMU_SOLEL, 0); @@ -2681,23 +2845,25 @@ if (sc->has_51) ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE; if (sc->has_71) - ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT; + ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | + EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT; if (sc->is_emu10k2) ac97slot |= 0x40; emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot); - if (sc->is_emu10k2) /* XXX for later cards? */ - emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if - * we write 1 here? */ - - if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev), - /* alignment */ 2, /* boundary */ 0, - /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */ - /* highaddr */ BUS_SPACE_MAXADDR, - /* filter */ NULL, /* filterarg */ NULL, - /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff, - /* flags */ 0, /* lockfunc */NULL, /* lockarg */NULL, - &sc->mem.dmat) != 0) { + if (sc->is_emu10k2) /* XXX for later cards? */ + emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if + * we write 1 here? */ + + if (bus_dma_tag_create(/* parent */ bus_get_dma_tag(sc->dev), + /* alignment */ 2, /* boundary */ 0, + /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */ + /* highaddr */ BUS_SPACE_MAXADDR, + /* filter */ NULL, /* filterarg */ NULL, + /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, + /* maxsegz */ 0x3ffff, + /* flags */ 0, /* lockfunc */ NULL, /* lockarg */ NULL, + &sc->mem.dmat) != 0) { device_printf(sc->dev, "unable to create dma tag\n"); bus_dma_tag_destroy(sc->mem.dmat); return (ENOMEM); @@ -2705,18 +2871,21 @@ sc->mem.card = sc; SLIST_INIT(&sc->mem.blocks); - sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr, &sc->mem.ptb_map); + sc->mem.ptb_pages = emu_malloc(&sc->mem, + EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr, + &sc->mem.ptb_map); if (sc->mem.ptb_pages == NULL) return (ENOMEM); - sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr, &sc->mem.silent_map); + sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, + &sc->mem.silent_page_addr, &sc->mem.silent_map); if (sc->mem.silent_page == NULL) { emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); return (ENOMEM); } /* Clear page with silence & setup all pointers to this page */ bzero(sc->mem.silent_page, EMUPAGESIZE); - tmp = (uint32_t) (sc->mem.silent_page_addr) << 1; + tmp = (uint32_t)(sc->mem.silent_page_addr) << 1; for (i = 0; i < EMU_MAXPAGES; i++) sc->mem.ptb_pages[i] = tmp | i; @@ -2725,8 +2894,8 @@ emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK); } emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr)); - emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */ - emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */ + emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */ + emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */ /* init envelope engine */ for (ch = 0; ch < NUM_G; ch++) { @@ -2750,8 +2919,8 @@ emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff); emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0); emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0); - emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */ - emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */ + emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */ + emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */ emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0); /*** these are last so OFF prevents writing ***/ @@ -2794,10 +2963,13 @@ /* Setup P16v/P17v sound routing */ if (sc->is_ca0102) - emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, 0xFF00FF00); + emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, + 0xFF00FF00); else { - emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, 0xFF000000); - emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, 0xFF000000); + emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, + 0xFF000000); + emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, + 0xFF000000); tmp = emu_rd(sc, EMU_A_IOCFG, 2); emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2); @@ -2808,16 +2980,20 @@ def_mode = MODE_ANALOG; if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) def_mode = MODE_DIGITAL; - if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) { - device_printf(sc->dev, "Audigy card initialized in analog mode.\n"); + if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && + (sc->broken_digital)) { + device_printf(sc->dev, + "Audigy card initialized in analog mode.\n"); def_mode = MODE_ANALOG; } emumix_set_mode(sc, def_mode); if (bootverbose) { tmp = emu_rd(sc, EMU_HCFG, 4); - device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp); - device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n", + device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", + tmp); + device_printf(sc->dev, + "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n", (tmp & 0x80000000 ? "[Legacy MPIC] " : ""), (tmp & 0x40000000 ? "[0x40] " : ""), (tmp & 0x20000000 ? "[0x20] " : ""), @@ -2826,7 +3002,8 @@ (tmp & 0x04000000 ? "[0x04] " : ""), (tmp & 0x02000000 ? "[0x02] " : ""), (tmp & 0x01000000 ? "[0x01]" : " ")); - device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n", + device_printf(sc->dev, + "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n", (tmp & 0x00800000 ? "[0x80] " : ""), (tmp & 0x00400000 ? "[0x40] " : ""), (tmp & 0x00200000 ? "[Legacy INT] " : ""), @@ -2835,7 +3012,8 @@ (tmp & 0x00040000 ? "[Codec4] " : ""), (tmp & 0x00020000 ? "[Codec2] " : ""), (tmp & 0x00010000 ? "[I2S Codec]" : " ")); - device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n", + device_printf(sc->dev, + "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n", (tmp & 0x00008000 ? "[0x80] " : ""), (tmp & 0x00004000 ? "[GPINPUT0] " : ""), (tmp & 0x00002000 ? "[GPINPUT1] " : ""), @@ -2844,7 +3022,8 @@ (tmp & 0x00000400 ? "[GPOUT2] " : ""), (tmp & 0x00000200 ? "[Joystick] " : ""), (tmp & 0x00000100 ? "[0x01]" : " ")); - device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n", + device_printf(sc->dev, + "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n", (tmp & 0x00000080 ? "[0x80] " : ""), (tmp & 0x00000040 ? "[0x40] " : ""), (tmp & 0x00000020 ? "[0x20] " : ""), @@ -2856,8 +3035,10 @@ if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) { tmp = emu_rd(sc, EMU_A_IOCFG, 2); - device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp); - device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )"); + device_printf(sc->dev, + "Audigy Card Configuration ( 0x%04x )\n", tmp); + device_printf(sc->dev, + "Audigy Card Configuration ( & 0xff00 )"); printf(" : %s%s%s%s%s%s%s%s\n", (tmp & 0x8000 ? "[Rear Speakers] " : ""), (tmp & 0x4000 ? "[Front Speakers] " : ""), @@ -2867,7 +3048,8 @@ (tmp & 0x0400 ? "[0x04] " : ""), (tmp & 0x0200 ? "[0x02] " : ""), (tmp & 0x0100 ? "[AudigyDrive Phones]" : " ")); - device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )"); + device_printf(sc->dev, + "Audigy Card Configuration ( & 0x00ff )"); printf(" : %s%s%s%s%s%s%s%s\n", (tmp & 0x0080 ? "[0x80] " : ""), (tmp & 0x0040 ? "[Mute AnalogOut] " : ""), @@ -2877,8 +3059,8 @@ (tmp & 0x0004 ? "[GPOUT0] " : ""), (tmp & 0x0002 ? "[GPOUT1] " : ""), (tmp & 0x0001 ? "[GPOUT2]" : " ")); - } /* is_emu10k2 or ca* */ - } /* bootverbose */ + } /* is_emu10k2 or ca* */ + } /* bootverbose */ return (0); } @@ -2899,7 +3081,10 @@ } /* disable audio and lock cache */ - emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4); + emu_wr(sc, EMU_HCFG, + EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | + EMU_HCFG_MUTEBUTTONENABLE, + 4); emu_wrptr(sc, 0, EMU_PTB, 0); /* reset recording buffers */ @@ -2922,9 +3107,10 @@ if (!SLIST_EMPTY(&sc->mem.blocks)) device_printf(sc->dev, "warning: memblock list not empty\n"); - SLIST_FOREACH(blk, &sc->mem.blocks, link) + SLIST_FOREACH (blk, &sc->mem.blocks, link) if (blk != NULL) - device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner); + device_printf(sc->dev, "lost %d for %s\n", + blk->pte_size, blk->owner); emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map); emu_free(&sc->mem, sc->mem.silent_page, sc->mem.silent_map); @@ -2933,12 +3119,12 @@ } static int -emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result) +emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t *result) { struct sndcard_func *func = device_get_ivars(dev); struct emu_sc_info *sc = device_get_softc(bus); - if (func==NULL) + if (func == NULL) return (ENOMEM); if (sc == NULL) return (ENOMEM); @@ -2969,12 +3155,12 @@ } static int -emu_write_ivar(device_t bus __unused, device_t dev __unused, - int ivar_index, uintptr_t value __unused) +emu_write_ivar(device_t bus __unused, device_t dev __unused, int ivar_index, + uintptr_t value __unused) { switch (ivar_index) { - case 0: + case 0: return (EINVAL); default: @@ -2990,14 +3176,14 @@ vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2); if (vendor != 0x1102) - return (ENXIO); /* Not Creative */ + return (ENXIO); /* Not Creative */ thiscard = emu_getcard(dev); if (thiscard == 0) return (ENXIO); - device_set_descf(dev, "Creative %s [%s]", - emu_cards[thiscard].desc, emu_cards[thiscard].SBcode); + device_set_descf(dev, "Creative %s [%s]", emu_cards[thiscard].desc, + emu_cards[thiscard].SBcode); return (BUS_PROBE_DEFAULT); } @@ -3029,23 +3215,27 @@ if (sc->root == NULL) goto bad; - if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled))) + if (resource_int_value("emu10kx", unit, "multichannel_disabled", + &(sc->mch_disabled))) RANGE(sc->mch_disabled, 0, 1); SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, + "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, + "Multichannel playback setting"); - if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec))) + if (resource_int_value("emu10kx", unit, "multichannel_recording", + &(sc->mch_rec))) RANGE(sc->mch_rec, 0, 1); SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, "Multichannel recording setting"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, + "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, + "Multichannel recording setting"); if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level))) RANGE(sc->mch_rec, 0, 2); SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "debug", + CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level"); /* Fill in the softc. */ mtx_init(&sc->lock, device_get_nameunit(dev), "bridge conf", MTX_DEF); @@ -3081,13 +3271,14 @@ sc->is_ca0108 = 1; if ((sc->is_emu10k2) && (sc->rev == 4)) { sc->is_emu10k2 = 0; - sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */ + sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */ } if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1)) if (device_flags & IS_CARDBUS) sc->is_cardbus = 1; - if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) { + if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != + 1) { device_printf(sc->dev, "Unable to detect HW chipset\n"); goto bad; } @@ -3101,23 +3292,23 @@ sc->opcode_shift = 24; sc->high_operand_shift = 12; - /* DSP map */ - /* sc->fx_base = 0x0 */ + /* DSP map */ + /* sc->fx_base = 0x0 */ sc->input_base = 0x40; - /* sc->p16vinput_base = 0x50; */ + /* sc->p16vinput_base = 0x50; */ sc->output_base = 0x60; sc->efxc_base = 0x80; - /* sc->output32h_base = 0xa0; */ - /* sc->output32l_base = 0xb0; */ + /* sc->output32h_base = 0xa0; */ + /* sc->output32l_base = 0xb0; */ sc->dsp_zero = 0xc0; - /* 0xe0...0x100 are unknown */ - /* sc->tram_base = 0x200 */ - /* sc->tram_addr_base = 0x300 */ + /* 0xe0...0x100 are unknown */ + /* sc->tram_base = 0x200 */ + /* sc->tram_addr_base = 0x300 */ sc->gpr_base = EMU_A_FXGPREGBASE; sc->num_gprs = 0x200; sc->code_base = EMU_A_MICROCODEBASE; - sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words, - * 1024 instructions */ + sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words, + * 1024 instructions */ sc->mchannel_fx = 8; sc->num_fxbuses = 16; @@ -3126,12 +3317,12 @@ sc->address_mask = EMU_A_PTR_ADDR_MASK; } if (sc->is_emu10k1) { - sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */ + sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */ sc->opcode_shift = 20; sc->high_operand_shift = 10; sc->code_base = EMU_MICROCODEBASE; - sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words, - * 512 instructions */ + sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words, + * 512 instructions */ sc->gpr_base = EMU_FXGPREGBASE; sc->num_gprs = 0x100; sc->input_base = 0x10; @@ -3164,13 +3355,14 @@ sc->sh = rman_get_bushandle(sc->reg); for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) - sc->timer[i] = 0; /* disable it */ + sc->timer[i] = 0; /* disable it */ i = 0; - sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE); - if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, - NULL, - emu_intr, sc, &sc->ih)) { + sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, + RF_ACTIVE | RF_SHAREABLE); + if ((sc->irq == NULL) || + bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, NULL, + emu_intr, sc, &sc->ih)) { device_printf(dev, "unable to map interrupt\n"); goto bad; } @@ -3180,7 +3372,8 @@ } if (sc->is_cardbus) if (emu_cardbus_init(sc) != 0) { - device_printf(dev, "unable to initialize CardBus interface\n"); + device_printf(dev, + "unable to initialize CardBus interface\n"); goto bad; } if (emu_init(sc) != 0) { @@ -3191,7 +3384,8 @@ device_printf(dev, "unable to create control device\n"); goto bad; } - snprintf(status, 255, "rev %d at io 0x%jx irq %jd", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq)); + snprintf(status, 255, "rev %d at io 0x%jx irq %jd", sc->rev, + rman_get_start(sc->reg), rman_get_start(sc->irq)); /* Voices */ for (i = 0; i < NUM_G; i++) { @@ -3217,7 +3411,8 @@ error = ENOMEM; goto bad; } - pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); + pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, + M_NOWAIT | M_ZERO); if (pcminfo == NULL) { error = ENOMEM; goto bad; @@ -3232,12 +3427,14 @@ if (!(sc->mch_disabled)) { /* REAR */ - func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); + func = malloc(sizeof(struct sndcard_func), M_DEVBUF, + M_NOWAIT | M_ZERO); if (func == NULL) { error = ENOMEM; goto bad; } - pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); + pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, + M_NOWAIT | M_ZERO); if (pcminfo == NULL) { error = ENOMEM; goto bad; @@ -3251,12 +3448,14 @@ device_set_ivars(sc->pcm[RT_REAR], func); if (sc->has_51) { /* CENTER */ - func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); + func = malloc(sizeof(struct sndcard_func), M_DEVBUF, + M_NOWAIT | M_ZERO); if (func == NULL) { error = ENOMEM; goto bad; } - pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); + pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, + M_NOWAIT | M_ZERO); if (pcminfo == NULL) { error = ENOMEM; goto bad; @@ -3269,12 +3468,14 @@ sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1); device_set_ivars(sc->pcm[RT_CENTER], func); /* SUB */ - func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); + func = malloc(sizeof(struct sndcard_func), M_DEVBUF, + M_NOWAIT | M_ZERO); if (func == NULL) { error = ENOMEM; goto bad; } - pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); + pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, + M_NOWAIT | M_ZERO); if (pcminfo == NULL) { error = ENOMEM; goto bad; @@ -3289,12 +3490,14 @@ } if (sc->has_71) { /* SIDE */ - func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); + func = malloc(sizeof(struct sndcard_func), M_DEVBUF, + M_NOWAIT | M_ZERO); if (func == NULL) { error = ENOMEM; goto bad; } - pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); + pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, + M_NOWAIT | M_ZERO); if (pcminfo == NULL) { error = ENOMEM; goto bad; @@ -3310,12 +3513,14 @@ } /* mch_disabled */ if (sc->mch_rec) { - func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO); + func = malloc(sizeof(struct sndcard_func), M_DEVBUF, + M_NOWAIT | M_ZERO); if (func == NULL) { error = ENOMEM; goto bad; } - pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); + pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, + M_NOWAIT | M_ZERO); if (pcminfo == NULL) { error = ENOMEM; goto bad; @@ -3332,7 +3537,8 @@ for (i = 0; i < 2; i++) sc->midi[i] = NULL; - /* MIDI has some memory mangament and (possible) locking problems */ + /* MIDI has some memory mangament and (possible) locking + * problems */ #if 0 /* Midi Interface 1: Live!, Audigy, Audigy 2 */ if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) { @@ -3422,7 +3628,8 @@ free(func, M_DEVBUF); } r = device_delete_child(dev, sc->pcm[i]); - if (r) return (r); + if (r) + return (r); } } @@ -3434,7 +3641,8 @@ free(func, M_DEVBUF); } r = device_delete_child(dev, sc->midi[0]); - if (r) return (r); + if (r) + return (r); } if (sc->midi[1] != NULL) { @@ -3445,14 +3653,18 @@ free(func, M_DEVBUF); } r = device_delete_child(dev, sc->midi[1]); - if (r) return (r); + if (r) + return (r); } if (device_get_children(dev, &childlist, &devcount) == 0) for (i = 0; i < devcount - 1; i++) { - device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i])); + device_printf(dev, + "removing stale child %d (unit %d)\n", i, + device_get_unit(childlist[i])); func = device_get_ivars(childlist[i]); - if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) { + if (func != NULL && + (func->func == SCF_MIDI || func->func == SCF_PCM)) { device_set_ivars(childlist[i], NULL); free(func->varinfo, M_DEVBUF); free(func, M_DEVBUF); @@ -3495,14 +3707,8 @@ DEVMETHOD_END }; -static driver_t emu_driver = { - "emu10kx", - emu_methods, - sizeof(struct emu_sc_info), - NULL, - 0, - NULL -}; +static driver_t emu_driver = { "emu10kx", emu_methods, + sizeof(struct emu_sc_info), NULL, 0, NULL }; static int emu_modevent(module_t mod __unused, int cmd, void *data __unused) @@ -3511,14 +3717,14 @@ switch (cmd) { case MOD_LOAD: - break; /* Success */ + break; /* Success */ case MOD_UNLOAD: case MOD_SHUTDOWN: /* XXX Should we check state of pcm & midi subdevices here? */ - break; /* Success */ + break; /* Success */ default: err = EINVAL; @@ -3526,7 +3732,6 @@ } return (err); - } DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_modevent, NULL); Index: sys/dev/sound/pci/emuxkireg.h =================================================================== --- sys/dev/sound/pci/emuxkireg.h +++ sys/dev/sound/pci/emuxkireg.h @@ -45,600 +45,600 @@ * Audigy2 specific registers contain an '_A2_' */ -#define EMU_MKSUBREG(sz, idx, reg) (((sz) << 24) | ((idx) << 16) | (reg)) - -#define EMU_PTR 0x00 -#define EMU_PTR_CHNO_MASK 0x0000003f -#define EMU_PTR_ADDR_MASK 0x07ff0000 -#define EMU_A_PTR_ADDR_MASK 0x0fff0000 - -#define EMU_DATA 0x04 - -#define EMU_IPR 0x08 -#define EMU_IPR_RATETRCHANGE 0x01000000 -#define EMU_IPR_FXDSP 0x00800000 -#define EMU_IPR_FORCEINT 0x00400000 -#define EMU_PCIERROR 0x00200000 -#define EMU_IPR_VOLINCR 0x00100000 -#define EMU_IPR_VOLDECR 0x00080000 -#define EMU_IPR_MUTE 0x00040000 -#define EMU_IPR_MICBUFFULL 0x00020000 -#define EMU_IPR_MICBUFHALFFULL 0x00010000 -#define EMU_IPR_ADCBUFFULL 0x00008000 -#define EMU_IPR_ADCBUFHALFFULL 0x00004000 -#define EMU_IPR_EFXBUFFULL 0x00002000 -#define EMU_IPR_EFXBUFHALFFULL 0x00001000 -#define EMU_IPR_GPSPDIFSTCHANGE 0x00000800 -#define EMU_IPR_CDROMSTCHANGE 0x00000400 -#define EMU_IPR_INTERVALTIMER 0x00000200 -#define EMU_IPR_MIDITRANSBUFE 0x00000100 -#define EMU_IPR_MIDIRECVBUFE 0x00000080 -#define EMU_IPR_A_MIDITRANSBUFE2 0x10000000 -#define EMU_IPR_A_MIDIRECBUFE2 0x08000000 -#define EMU_IPR_CHANNELLOOP 0x00000040 -#define EMU_IPR_CHNOMASK 0x0000003f - -#define EMU_INTE 0x0c - -#define EMU_INTE_VSB_MASK 0xc0000000 -#define EMU_INTE_VSB_220 0x00000000 -#define EMU_INTE_VSB_240 0x40000000 -#define EMU_INTE_VSB_260 0x80000000 -#define EMU_INTE_VSB_280 0xc0000000 - -#define EMU_INTE_VMPU_MASK 0x30000000 -#define EMU_INTE_VMPU_300 0x00000000 -#define EMU_INTE_VMPU_310 0x10000000 -#define EMU_INTE_VMPU_320 0x20000000 -#define EMU_INTE_VMPU_330 0x30000000 -#define EMU_INTE_MDMAENABLE 0x08000000 -#define EMU_INTE_SDMAENABLE 0x04000000 -#define EMU_INTE_MPICENABLE 0x02000000 -#define EMU_INTE_SPICENABLE 0x01000000 -#define EMU_INTE_VSBENABLE 0x00800000 -#define EMU_INTE_ADLIBENABLE 0x00400000 -#define EMU_INTE_MPUENABLE 0x00200000 -#define EMU_INTE_FORCEINT 0x00100000 -#define EMU_INTE_MRHANDENABLE 0x00080000 -#define EMU_INTE_SAMPLERATER 0x00002000 -#define EMU_INTE_FXDSPENABLE 0x00001000 -#define EMU_INTE_PCIERRENABLE 0x00000800 -#define EMU_INTE_VOLINCRENABLE 0x00000400 -#define EMU_INTE_VOLDECRENABLE 0x00000200 -#define EMU_INTE_MUTEENABLE 0x00000100 -#define EMU_INTE_MICBUFENABLE 0x00000080 -#define EMU_INTE_ADCBUFENABLE 0x00000040 -#define EMU_INTE_EFXBUFENABLE 0x00000020 -#define EMU_INTE_GPSPDIFENABLE 0x00000010 -#define EMU_INTE_CDSPDIFENABLE 0x00000008 -#define EMU_INTE_INTERTIMERENB 0x00000004 -#define EMU_INTE_MIDITXENABLE 0x00000002 -#define EMU_INTE_MIDIRXENABLE 0x00000001 -#define EMU_INTE_A_MIDITXENABLE2 0x00020000 -#define EMU_INTE_A_MIDIRXENABLE2 0x00010000 - -#define EMU_WC 0x10 -#define EMU_WC_SAMPLECOUNTER_MASK 0x03FFFFC0 -#define EMU_WC_SAMPLECOUNTER EMU_MKSUBREG(20, 6, EMU_WC) -#define EMU_WC_CURRENTCHANNEL 0x0000003F - -#define EMU_HCFG 0x14 -#define EMU_HCFG_LEGACYFUNC_MASK 0xe0000000 -#define EMU_HCFG_LEGACYFUNC_MPU 0x00000000 -#define EMU_HCFG_LEGACYFUNC_SB 0x40000000 -#define EMU_HCFG_LEGACYFUNC_AD 0x60000000 -#define EMU_HCFG_LEGACYFUNC_MPIC 0x80000000 -#define EMU_HCFG_LEGACYFUNC_MDMA 0xa0000000 -#define EMU_HCFG_LEGACYFUNC_SPCI 0xc0000000 -#define EMU_HCFG_LEGACYFUNC_SDMA 0xe0000000 -#define EMU_HCFG_IOCAPTUREADDR 0x1f000000 -#define EMU_HCFG_LEGACYWRITE 0x00800000 -#define EMU_HCFG_LEGACYWORD 0x00400000 -#define EMU_HCFG_LEGACYINT 0x00200000 - -#define EMU_HCFG_CODECFMT_MASK 0x00070000 -#define EMU_HCFG_CODECFMT_AC97 0x00000000 -#define EMU_HCFG_CODECFMT_I2S 0x00010000 -#define EMU_HCFG_GPINPUT0 0x00004000 -#define EMU_HCFG_GPINPUT1 0x00002000 -#define EMU_HCFG_GPOUTPUT_MASK 0x00001c00 -#define EMU_HCFG_JOYENABLE 0x00000200 -#define EMU_HCFG_PHASETRACKENABLE 0x00000100 -#define EMU_HCFG_AC3ENABLE_MASK 0x000000e0 -#define EMU_HCFG_AC3ENABLE_ZVIDEO 0x00000080 -#define EMU_HCFG_AC3ENABLE_CDSPDIF 0x00000040 -#define EMU_HCFG_AC3ENABLE_GPSPDIF 0x00000020 -#define EMU_HCFG_AUTOMUTE 0x00000010 -#define EMU_HCFG_LOCKSOUNDCACHE 0x00000008 -#define EMU_HCFG_LOCKTANKCACHE_MASK 0x00000004 -#define EMU_HCFG_LOCKTANKCACHE EMU_MKSUBREG(1, 2, EMU_HCFG) -#define EMU_HCFG_MUTEBUTTONENABLE 0x00000002 -#define EMU_HCFG_AUDIOENABLE 0x00000001 - -#define EMU_MUDATA 0x18 -#define EMU_MUCMD 0x19 -#define EMU_MUCMD_RESET 0xff -#define EMU_MUCMD_ENTERUARTMODE 0x3f - -#define EMU_MUSTAT EMU_MUCMD -#define EMU_MUSTAT_IRDYN 0x80 -#define EMU_MUSTAT_ORDYN 0x40 - -#define EMU_A_IOCFG 0x18 -#define EMU_A_GPINPUT_MASK 0xff00 -#define EMU_A_GPOUTPUT_MASK 0x00ff -#define EMU_A_IOCFG_GPOUT0 0x0044 -#define EMU_A_IOCFG_GPOUT1 0x0002 - -#define EMU_TIMER 0x1a -#define EMU_TIMER_RATE_MASK 0x000003ff -#define EMU_TIMER_RATE EMU_MKSUBREG(10, 0, EMU_TIMER) - -#define EMU_AC97DATA 0x1c -#define EMU_AC97ADDR 0x1e -#define EMU_AC97ADDR_RDY 0x80 -#define EMU_AC97ADDR_ADDR 0x7f - -#define EMU_A2_PTR 0x20 -#define EMU_A2_DATA 0x24 - -#define EMU_A2_SRCSEL 0x600000 -#define EMU_A2_SRCSEL_ENABLE_SPDIF 0x00000004 -#define EMU_A2_SRCSEL_ENABLE_SRCMULTI 0x00000010 -#define EMU_A2_SRCMULTI 0x6e0000 -#define EMU_A2_SRCMULTI_ENABLE_INPUT 0xff00ff00 +#define EMU_MKSUBREG(sz, idx, reg) (((sz) << 24) | ((idx) << 16) | (reg)) + +#define EMU_PTR 0x00 +#define EMU_PTR_CHNO_MASK 0x0000003f +#define EMU_PTR_ADDR_MASK 0x07ff0000 +#define EMU_A_PTR_ADDR_MASK 0x0fff0000 + +#define EMU_DATA 0x04 + +#define EMU_IPR 0x08 +#define EMU_IPR_RATETRCHANGE 0x01000000 +#define EMU_IPR_FXDSP 0x00800000 +#define EMU_IPR_FORCEINT 0x00400000 +#define EMU_PCIERROR 0x00200000 +#define EMU_IPR_VOLINCR 0x00100000 +#define EMU_IPR_VOLDECR 0x00080000 +#define EMU_IPR_MUTE 0x00040000 +#define EMU_IPR_MICBUFFULL 0x00020000 +#define EMU_IPR_MICBUFHALFFULL 0x00010000 +#define EMU_IPR_ADCBUFFULL 0x00008000 +#define EMU_IPR_ADCBUFHALFFULL 0x00004000 +#define EMU_IPR_EFXBUFFULL 0x00002000 +#define EMU_IPR_EFXBUFHALFFULL 0x00001000 +#define EMU_IPR_GPSPDIFSTCHANGE 0x00000800 +#define EMU_IPR_CDROMSTCHANGE 0x00000400 +#define EMU_IPR_INTERVALTIMER 0x00000200 +#define EMU_IPR_MIDITRANSBUFE 0x00000100 +#define EMU_IPR_MIDIRECVBUFE 0x00000080 +#define EMU_IPR_A_MIDITRANSBUFE2 0x10000000 +#define EMU_IPR_A_MIDIRECBUFE2 0x08000000 +#define EMU_IPR_CHANNELLOOP 0x00000040 +#define EMU_IPR_CHNOMASK 0x0000003f + +#define EMU_INTE 0x0c + +#define EMU_INTE_VSB_MASK 0xc0000000 +#define EMU_INTE_VSB_220 0x00000000 +#define EMU_INTE_VSB_240 0x40000000 +#define EMU_INTE_VSB_260 0x80000000 +#define EMU_INTE_VSB_280 0xc0000000 + +#define EMU_INTE_VMPU_MASK 0x30000000 +#define EMU_INTE_VMPU_300 0x00000000 +#define EMU_INTE_VMPU_310 0x10000000 +#define EMU_INTE_VMPU_320 0x20000000 +#define EMU_INTE_VMPU_330 0x30000000 +#define EMU_INTE_MDMAENABLE 0x08000000 +#define EMU_INTE_SDMAENABLE 0x04000000 +#define EMU_INTE_MPICENABLE 0x02000000 +#define EMU_INTE_SPICENABLE 0x01000000 +#define EMU_INTE_VSBENABLE 0x00800000 +#define EMU_INTE_ADLIBENABLE 0x00400000 +#define EMU_INTE_MPUENABLE 0x00200000 +#define EMU_INTE_FORCEINT 0x00100000 +#define EMU_INTE_MRHANDENABLE 0x00080000 +#define EMU_INTE_SAMPLERATER 0x00002000 +#define EMU_INTE_FXDSPENABLE 0x00001000 +#define EMU_INTE_PCIERRENABLE 0x00000800 +#define EMU_INTE_VOLINCRENABLE 0x00000400 +#define EMU_INTE_VOLDECRENABLE 0x00000200 +#define EMU_INTE_MUTEENABLE 0x00000100 +#define EMU_INTE_MICBUFENABLE 0x00000080 +#define EMU_INTE_ADCBUFENABLE 0x00000040 +#define EMU_INTE_EFXBUFENABLE 0x00000020 +#define EMU_INTE_GPSPDIFENABLE 0x00000010 +#define EMU_INTE_CDSPDIFENABLE 0x00000008 +#define EMU_INTE_INTERTIMERENB 0x00000004 +#define EMU_INTE_MIDITXENABLE 0x00000002 +#define EMU_INTE_MIDIRXENABLE 0x00000001 +#define EMU_INTE_A_MIDITXENABLE2 0x00020000 +#define EMU_INTE_A_MIDIRXENABLE2 0x00010000 + +#define EMU_WC 0x10 +#define EMU_WC_SAMPLECOUNTER_MASK 0x03FFFFC0 +#define EMU_WC_SAMPLECOUNTER EMU_MKSUBREG(20, 6, EMU_WC) +#define EMU_WC_CURRENTCHANNEL 0x0000003F + +#define EMU_HCFG 0x14 +#define EMU_HCFG_LEGACYFUNC_MASK 0xe0000000 +#define EMU_HCFG_LEGACYFUNC_MPU 0x00000000 +#define EMU_HCFG_LEGACYFUNC_SB 0x40000000 +#define EMU_HCFG_LEGACYFUNC_AD 0x60000000 +#define EMU_HCFG_LEGACYFUNC_MPIC 0x80000000 +#define EMU_HCFG_LEGACYFUNC_MDMA 0xa0000000 +#define EMU_HCFG_LEGACYFUNC_SPCI 0xc0000000 +#define EMU_HCFG_LEGACYFUNC_SDMA 0xe0000000 +#define EMU_HCFG_IOCAPTUREADDR 0x1f000000 +#define EMU_HCFG_LEGACYWRITE 0x00800000 +#define EMU_HCFG_LEGACYWORD 0x00400000 +#define EMU_HCFG_LEGACYINT 0x00200000 + +#define EMU_HCFG_CODECFMT_MASK 0x00070000 +#define EMU_HCFG_CODECFMT_AC97 0x00000000 +#define EMU_HCFG_CODECFMT_I2S 0x00010000 +#define EMU_HCFG_GPINPUT0 0x00004000 +#define EMU_HCFG_GPINPUT1 0x00002000 +#define EMU_HCFG_GPOUTPUT_MASK 0x00001c00 +#define EMU_HCFG_JOYENABLE 0x00000200 +#define EMU_HCFG_PHASETRACKENABLE 0x00000100 +#define EMU_HCFG_AC3ENABLE_MASK 0x000000e0 +#define EMU_HCFG_AC3ENABLE_ZVIDEO 0x00000080 +#define EMU_HCFG_AC3ENABLE_CDSPDIF 0x00000040 +#define EMU_HCFG_AC3ENABLE_GPSPDIF 0x00000020 +#define EMU_HCFG_AUTOMUTE 0x00000010 +#define EMU_HCFG_LOCKSOUNDCACHE 0x00000008 +#define EMU_HCFG_LOCKTANKCACHE_MASK 0x00000004 +#define EMU_HCFG_LOCKTANKCACHE EMU_MKSUBREG(1, 2, EMU_HCFG) +#define EMU_HCFG_MUTEBUTTONENABLE 0x00000002 +#define EMU_HCFG_AUDIOENABLE 0x00000001 + +#define EMU_MUDATA 0x18 +#define EMU_MUCMD 0x19 +#define EMU_MUCMD_RESET 0xff +#define EMU_MUCMD_ENTERUARTMODE 0x3f + +#define EMU_MUSTAT EMU_MUCMD +#define EMU_MUSTAT_IRDYN 0x80 +#define EMU_MUSTAT_ORDYN 0x40 + +#define EMU_A_IOCFG 0x18 +#define EMU_A_GPINPUT_MASK 0xff00 +#define EMU_A_GPOUTPUT_MASK 0x00ff +#define EMU_A_IOCFG_GPOUT0 0x0044 +#define EMU_A_IOCFG_GPOUT1 0x0002 + +#define EMU_TIMER 0x1a +#define EMU_TIMER_RATE_MASK 0x000003ff +#define EMU_TIMER_RATE EMU_MKSUBREG(10, 0, EMU_TIMER) + +#define EMU_AC97DATA 0x1c +#define EMU_AC97ADDR 0x1e +#define EMU_AC97ADDR_RDY 0x80 +#define EMU_AC97ADDR_ADDR 0x7f + +#define EMU_A2_PTR 0x20 +#define EMU_A2_DATA 0x24 + +#define EMU_A2_SRCSEL 0x600000 +#define EMU_A2_SRCSEL_ENABLE_SPDIF 0x00000004 +#define EMU_A2_SRCSEL_ENABLE_SRCMULTI 0x00000010 +#define EMU_A2_SRCMULTI 0x6e0000 +#define EMU_A2_SRCMULTI_ENABLE_INPUT 0xff00ff00 /* -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- */ -#define EMU_CHAN_CPF 0x00 - -#define EMU_CHAN_CPF_PITCH_MASK 0xffff0000 -#define EMU_CHAN_CPF_PITCH EMU_MKSUBREG(16, 16, EMU_CHAN_CPF) -#define EMU_CHAN_CPF_STEREO_MASK 0x00008000 -#define EMU_CHAN_CPF_STEREO EMU_MKSUBREG(1, 15, EMU_CHAN_CPF) -#define EMU_CHAN_CPF_STOP_MASK 0x00004000 -#define EMU_CHAN_CPF_FRACADDRESS_MASK 0x00003fff - -#define EMU_CHAN_PTRX 0x01 -#define EMU_CHAN_PTRX_PITCHTARGET_MASK 0xffff0000 -#define EMU_CHAN_PTRX_PITCHTARGET EMU_MKSUBREG(16, 16, EMU_CHAN_PTRX) -#define EMU_CHAN_PTRX_FXSENDAMOUNT_A_MASK 0x0000ff00 -#define EMU_CHAN_PTRX_FXSENDAMOUNT_A EMU_MKSUBREG(8, 8, EMU_CHAN_PTRX) -#define EMU_CHAN_PTRX_FXSENDAMOUNT_B_MASK 0x000000ff -#define EMU_CHAN_PTRX_FXSENDAMOUNT_B EMU_MKSUBREG(8, 0, EMU_CHAN_PTRX) - -#define EMU_CHAN_CVCF 0x02 -#define EMU_CHAN_CVCF_CURRVOL_MASK 0xffff0000 -#define EMU_CHAN_CVCF_CURRVOL EMU_MKSUBREG(16, 16, EMU_CHAN_CVCF) -#define EMU_CHAN_CVCF_CURRFILTER_MASK 0x0000ffff -#define EMU_CHAN_CVCF_CURRFILTER EMU_MKSUBREG(16, 0, EMU_CHAN_CVCF) - -#define EMU_CHAN_VTFT 0x03 -#define EMU_CHAN_VTFT_VOLUMETARGET_MASK 0xffff0000 -#define EMU_CHAN_VTFT_VOLUMETARGET EMU_MKSUBREG(16, 16, EMU_CHAN_VTFT) -#define EMU_CHAN_VTFT_FILTERTARGET_MASK 0x0000ffff -#define EMU_CHAN_VTFT_FILTERTARGET EMU_MKSUBREG(16, 0, EMU_CHAN_VTFT) - -#define EMU_CHAN_Z1 0x05 -#define EMU_CHAN_Z2 0x04 - -#define EMU_CHAN_PSST 0x06 -#define EMU_CHAN_PSST_FXSENDAMOUNT_C_MASK 0xff000000 -#define EMU_CHAN_PSST_FXSENDAMOUNT_C EMU_MKSUBREG(8, 24, EMU_CHAN_PSST) -#define EMU_CHAN_PSST_LOOPSTARTADDR_MASK 0x00ffffff -#define EMU_CHAN_PSST_LOOPSTARTADDR EMU_MKSUBREG(24, 0, EMU_CHAN_PSST) - -#define EMU_CHAN_DSL 0x07 -#define EMU_CHAN_DSL_FXSENDAMOUNT_D_MASK 0xff000000 -#define EMU_CHAN_DSL_FXSENDAMOUNT_D EMU_MKSUBREG(8, 24, EMU_CHAN_DSL) -#define EMU_CHAN_DSL_LOOPENDADDR_MASK 0x00ffffff -#define EMU_CHAN_DSL_LOOPENDADDR EMU_MKSUBREG(24, 0, EMU_CHAN_DSL) - -#define EMU_CHAN_CCCA 0x08 -#define EMU_CHAN_CCCA_RESONANCE 0xf0000000 -#define EMU_CHAN_CCCA_INTERPROMMASK 0x0e000000 -#define EMU_CHAN_CCCA_INTERPROM_0 0x00000000 -#define EMU_CHAN_CCCA_INTERPROM_1 0x02000000 -#define EMU_CHAN_CCCA_INTERPROM_2 0x04000000 -#define EMU_CHAN_CCCA_INTERPROM_3 0x06000000 -#define EMU_CHAN_CCCA_INTERPROM_4 0x08000000 -#define EMU_CHAN_CCCA_INTERPROM_5 0x0a000000 -#define EMU_CHAN_CCCA_INTERPROM_6 0x0c000000 -#define EMU_CHAN_CCCA_INTERPROM_7 0x0e000000 -#define EMU_CHAN_CCCA_8BITSELECT 0x01000000 -#define EMU_CHAN_CCCA_CURRADDR_MASK 0x00ffffff -#define EMU_CHAN_CCCA_CURRADDR EMU_MKSUBREG(24, 0, EMU_CHAN_CCCA) - -#define EMU_CHAN_CCR 0x09 -#define EMU_CHAN_CCR_CACHEINVALIDSIZE_MASK 0xfe000000 -#define EMU_CHAN_CCR_CACHEINVALIDSIZE EMU_MKSUBREG(7, 25, EMU_CHAN_CCR) -#define EMU_CHAN_CCR_CACHELOOPFLAG 0x01000000 -#define EMU_CHAN_CCR_INTERLEAVEDSAMPLES 0x00800000 -#define EMU_CHAN_CCR_WORDSIZEDSAMPLES 0x00400000 -#define EMU_CHAN_CCR_READADDRESS_MASK 0x003f0000 -#define EMU_CHAN_CCR_READADDRESS EMU_MKSUBREG(6, 16, EMU_CHAN_CCR) -#define EMU_CHAN_CCR_LOOPINVALSIZE 0x0000fe00 -#define EMU_CHAN_CCR_LOOPFLAG 0x00000100 -#define EMU_CHAN_CCR_CACHELOOPADDRHI 0x000000ff - -#define EMU_CHAN_CLP 0x0a -#define EMU_CHAN_CLP_CACHELOOPADDR 0x0000ffff - -#define EMU_CHAN_FXRT 0x0b -#define EMU_CHAN_FXRT_CHANNELA 0x000f0000 -#define EMU_CHAN_FXRT_CHANNELB 0x00f00000 -#define EMU_CHAN_FXRT_CHANNELC 0x0f000000 -#define EMU_CHAN_FXRT_CHANNELD 0xf0000000 - -#define EMU_CHAN_MAPA 0x0c -#define EMU_CHAN_MAPB 0x0d - -#define EMU_CHAN_MAP_PTE_MASK 0xffffe000 -#define EMU_CHAN_MAP_PTI_MASK 0x00001fff - -#define EMU_CHAN_ENVVOL 0x10 -#define EMU_CHAN_ENVVOL_MASK 0x0000ffff +#define EMU_CHAN_CPF 0x00 + +#define EMU_CHAN_CPF_PITCH_MASK 0xffff0000 +#define EMU_CHAN_CPF_PITCH EMU_MKSUBREG(16, 16, EMU_CHAN_CPF) +#define EMU_CHAN_CPF_STEREO_MASK 0x00008000 +#define EMU_CHAN_CPF_STEREO EMU_MKSUBREG(1, 15, EMU_CHAN_CPF) +#define EMU_CHAN_CPF_STOP_MASK 0x00004000 +#define EMU_CHAN_CPF_FRACADDRESS_MASK 0x00003fff + +#define EMU_CHAN_PTRX 0x01 +#define EMU_CHAN_PTRX_PITCHTARGET_MASK 0xffff0000 +#define EMU_CHAN_PTRX_PITCHTARGET EMU_MKSUBREG(16, 16, EMU_CHAN_PTRX) +#define EMU_CHAN_PTRX_FXSENDAMOUNT_A_MASK 0x0000ff00 +#define EMU_CHAN_PTRX_FXSENDAMOUNT_A EMU_MKSUBREG(8, 8, EMU_CHAN_PTRX) +#define EMU_CHAN_PTRX_FXSENDAMOUNT_B_MASK 0x000000ff +#define EMU_CHAN_PTRX_FXSENDAMOUNT_B EMU_MKSUBREG(8, 0, EMU_CHAN_PTRX) + +#define EMU_CHAN_CVCF 0x02 +#define EMU_CHAN_CVCF_CURRVOL_MASK 0xffff0000 +#define EMU_CHAN_CVCF_CURRVOL EMU_MKSUBREG(16, 16, EMU_CHAN_CVCF) +#define EMU_CHAN_CVCF_CURRFILTER_MASK 0x0000ffff +#define EMU_CHAN_CVCF_CURRFILTER EMU_MKSUBREG(16, 0, EMU_CHAN_CVCF) + +#define EMU_CHAN_VTFT 0x03 +#define EMU_CHAN_VTFT_VOLUMETARGET_MASK 0xffff0000 +#define EMU_CHAN_VTFT_VOLUMETARGET EMU_MKSUBREG(16, 16, EMU_CHAN_VTFT) +#define EMU_CHAN_VTFT_FILTERTARGET_MASK 0x0000ffff +#define EMU_CHAN_VTFT_FILTERTARGET EMU_MKSUBREG(16, 0, EMU_CHAN_VTFT) + +#define EMU_CHAN_Z1 0x05 +#define EMU_CHAN_Z2 0x04 + +#define EMU_CHAN_PSST 0x06 +#define EMU_CHAN_PSST_FXSENDAMOUNT_C_MASK 0xff000000 +#define EMU_CHAN_PSST_FXSENDAMOUNT_C EMU_MKSUBREG(8, 24, EMU_CHAN_PSST) +#define EMU_CHAN_PSST_LOOPSTARTADDR_MASK 0x00ffffff +#define EMU_CHAN_PSST_LOOPSTARTADDR EMU_MKSUBREG(24, 0, EMU_CHAN_PSST) + +#define EMU_CHAN_DSL 0x07 +#define EMU_CHAN_DSL_FXSENDAMOUNT_D_MASK 0xff000000 +#define EMU_CHAN_DSL_FXSENDAMOUNT_D EMU_MKSUBREG(8, 24, EMU_CHAN_DSL) +#define EMU_CHAN_DSL_LOOPENDADDR_MASK 0x00ffffff +#define EMU_CHAN_DSL_LOOPENDADDR EMU_MKSUBREG(24, 0, EMU_CHAN_DSL) + +#define EMU_CHAN_CCCA 0x08 +#define EMU_CHAN_CCCA_RESONANCE 0xf0000000 +#define EMU_CHAN_CCCA_INTERPROMMASK 0x0e000000 +#define EMU_CHAN_CCCA_INTERPROM_0 0x00000000 +#define EMU_CHAN_CCCA_INTERPROM_1 0x02000000 +#define EMU_CHAN_CCCA_INTERPROM_2 0x04000000 +#define EMU_CHAN_CCCA_INTERPROM_3 0x06000000 +#define EMU_CHAN_CCCA_INTERPROM_4 0x08000000 +#define EMU_CHAN_CCCA_INTERPROM_5 0x0a000000 +#define EMU_CHAN_CCCA_INTERPROM_6 0x0c000000 +#define EMU_CHAN_CCCA_INTERPROM_7 0x0e000000 +#define EMU_CHAN_CCCA_8BITSELECT 0x01000000 +#define EMU_CHAN_CCCA_CURRADDR_MASK 0x00ffffff +#define EMU_CHAN_CCCA_CURRADDR EMU_MKSUBREG(24, 0, EMU_CHAN_CCCA) + +#define EMU_CHAN_CCR 0x09 +#define EMU_CHAN_CCR_CACHEINVALIDSIZE_MASK 0xfe000000 +#define EMU_CHAN_CCR_CACHEINVALIDSIZE EMU_MKSUBREG(7, 25, EMU_CHAN_CCR) +#define EMU_CHAN_CCR_CACHELOOPFLAG 0x01000000 +#define EMU_CHAN_CCR_INTERLEAVEDSAMPLES 0x00800000 +#define EMU_CHAN_CCR_WORDSIZEDSAMPLES 0x00400000 +#define EMU_CHAN_CCR_READADDRESS_MASK 0x003f0000 +#define EMU_CHAN_CCR_READADDRESS EMU_MKSUBREG(6, 16, EMU_CHAN_CCR) +#define EMU_CHAN_CCR_LOOPINVALSIZE 0x0000fe00 +#define EMU_CHAN_CCR_LOOPFLAG 0x00000100 +#define EMU_CHAN_CCR_CACHELOOPADDRHI 0x000000ff + +#define EMU_CHAN_CLP 0x0a +#define EMU_CHAN_CLP_CACHELOOPADDR 0x0000ffff + +#define EMU_CHAN_FXRT 0x0b +#define EMU_CHAN_FXRT_CHANNELA 0x000f0000 +#define EMU_CHAN_FXRT_CHANNELB 0x00f00000 +#define EMU_CHAN_FXRT_CHANNELC 0x0f000000 +#define EMU_CHAN_FXRT_CHANNELD 0xf0000000 + +#define EMU_CHAN_MAPA 0x0c +#define EMU_CHAN_MAPB 0x0d + +#define EMU_CHAN_MAP_PTE_MASK 0xffffe000 +#define EMU_CHAN_MAP_PTI_MASK 0x00001fff + +#define EMU_CHAN_ENVVOL 0x10 +#define EMU_CHAN_ENVVOL_MASK 0x0000ffff #define EMU_CHAN_ATKHLDV 0x11 -#define EMU_CHAN_ATKHLDV_PHASE0 0x00008000 -#define EMU_CHAN_ATKHLDV_HOLDTIME_MASK 0x00007f00 -#define EMU_CHAN_ATKHLDV_ATTACKTIME_MASK 0x0000007f - -#define EMU_CHAN_DCYSUSV 0x12 -#define EMU_CHAN_DCYSUSV_PHASE1_MASK 0x00008000 -#define EMU_CHAN_DCYSUSV_SUSTAINLEVEL_MASK 0x00007f00 -#define EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK 0x00000080 -#define EMU_CHAN_DCYSUSV_DECAYTIME_MASK 0x0000007f - -#define EMU_CHAN_LFOVAL1 0x13 -#define EMU_CHAN_LFOVAL_MASK 0x0000ffff - -#define EMU_CHAN_ENVVAL 0x14 -#define EMU_CHAN_ENVVAL_MASK 0x0000ffff - -#define EMU_CHAN_ATKHLDM 0x15 -#define EMU_CHAN_ATKHLDM_PHASE0 0x00008000 -#define EMU_CHAN_ATKHLDM_HOLDTIME 0x00007f00 -#define EMU_CHAN_ATKHLDM_ATTACKTIME 0x0000007f - -#define EMU_CHAN_DCYSUSM 0x16 -#define EMU_CHAN_DCYSUSM_PHASE1_MASK 0x00008000 -#define EMU_CHAN_DCYSUSM_SUSTAINLEVEL_MASK 0x00007f00 -#define EMU_CHAN_DCYSUSM_DECAYTIME_MASK 0x0000007f - -#define EMU_CHAN_LFOVAL2 0x17 -#define EMU_CHAN_LFOVAL2_MASK 0x0000ffff - -#define EMU_CHAN_IP 0x18 -#define EMU_CHAN_IP_MASK 0x0000ffff -#define EMU_CHAN_IP_UNITY 0x0000e000 - -#define EMU_CHAN_IFATN 0x19 -#define EMU_CHAN_IFATN_FILTERCUTOFF_MASK 0x0000ff00 -#define EMU_CHAN_IFATN_FILTERCUTOFF EMU_MKSUBREG(8, 8, EMU_CHAN_IFATN) -#define EMU_CHAN_IFATN_ATTENUATION_MASK 0x000000ff -#define EMU_CHAN_IFATN_ATTENUATION EMU_MKSUBREG(8, 0, EMU_CHAN_IFATN) - -#define EMU_CHAN_PEFE 0x1a -#define EMU_CHAN_PEFE_PITCHAMOUNT_MASK 0x0000ff00 -#define EMU_CHAN_PEFE_PITCHAMOUNT EMU_MKSUBREG(8, 8, EMU_CHAN_PEFE) -#define EMU_CHAN_PEFE_FILTERAMOUNT_MASK 0x000000ff -#define EMU_CHAN_PEFE_FILTERAMOUNT EMU_MKSUBREG(8, 0, EMU_CHAN_PEFE) - -#define EMU_CHAN_FMMOD 0x1b -#define EMU_CHAN_FMMOD_MODVIBRATO 0x0000ff00 -#define EMU_CHAN_FMMOD_MOFILTER 0x000000ff - -#define EMU_CHAN_TREMFRQ 0x1c -#define EMU_CHAN_TREMFRQ_DEPTH 0x0000ff00 - -#define EMU_CHAN_FM2FRQ2 0x1d -#define EMU_CHAN_FM2FRQ2_DEPTH 0x0000ff00 -#define EMU_CHAN_FM2FRQ2_FREQUENCY 0x000000ff - -#define EMU_CHAN_TEMPENV 0x1e -#define EMU_CHAN_TEMPENV_MASK 0x0000ffff - -#define EMU_CHAN_CD0 0x20 -#define EMU_CHAN_CD1 0x21 -#define EMU_CHAN_CD2 0x22 -#define EMU_CHAN_CD3 0x23 -#define EMU_CHAN_CD4 0x24 -#define EMU_CHAN_CD5 0x25 -#define EMU_CHAN_CD6 0x26 -#define EMU_CHAN_CD7 0x27 -#define EMU_CHAN_CD8 0x28 -#define EMU_CHAN_CD9 0x29 -#define EMU_CHAN_CDA 0x2a -#define EMU_CHAN_CDB 0x2b -#define EMU_CHAN_CDC 0x2c -#define EMU_CHAN_CDD 0x2d -#define EMU_CHAN_CDE 0x2e -#define EMU_CHAN_CDF 0x2f +#define EMU_CHAN_ATKHLDV_PHASE0 0x00008000 +#define EMU_CHAN_ATKHLDV_HOLDTIME_MASK 0x00007f00 +#define EMU_CHAN_ATKHLDV_ATTACKTIME_MASK 0x0000007f + +#define EMU_CHAN_DCYSUSV 0x12 +#define EMU_CHAN_DCYSUSV_PHASE1_MASK 0x00008000 +#define EMU_CHAN_DCYSUSV_SUSTAINLEVEL_MASK 0x00007f00 +#define EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK 0x00000080 +#define EMU_CHAN_DCYSUSV_DECAYTIME_MASK 0x0000007f + +#define EMU_CHAN_LFOVAL1 0x13 +#define EMU_CHAN_LFOVAL_MASK 0x0000ffff + +#define EMU_CHAN_ENVVAL 0x14 +#define EMU_CHAN_ENVVAL_MASK 0x0000ffff + +#define EMU_CHAN_ATKHLDM 0x15 +#define EMU_CHAN_ATKHLDM_PHASE0 0x00008000 +#define EMU_CHAN_ATKHLDM_HOLDTIME 0x00007f00 +#define EMU_CHAN_ATKHLDM_ATTACKTIME 0x0000007f + +#define EMU_CHAN_DCYSUSM 0x16 +#define EMU_CHAN_DCYSUSM_PHASE1_MASK 0x00008000 +#define EMU_CHAN_DCYSUSM_SUSTAINLEVEL_MASK 0x00007f00 +#define EMU_CHAN_DCYSUSM_DECAYTIME_MASK 0x0000007f + +#define EMU_CHAN_LFOVAL2 0x17 +#define EMU_CHAN_LFOVAL2_MASK 0x0000ffff + +#define EMU_CHAN_IP 0x18 +#define EMU_CHAN_IP_MASK 0x0000ffff +#define EMU_CHAN_IP_UNITY 0x0000e000 + +#define EMU_CHAN_IFATN 0x19 +#define EMU_CHAN_IFATN_FILTERCUTOFF_MASK 0x0000ff00 +#define EMU_CHAN_IFATN_FILTERCUTOFF EMU_MKSUBREG(8, 8, EMU_CHAN_IFATN) +#define EMU_CHAN_IFATN_ATTENUATION_MASK 0x000000ff +#define EMU_CHAN_IFATN_ATTENUATION EMU_MKSUBREG(8, 0, EMU_CHAN_IFATN) + +#define EMU_CHAN_PEFE 0x1a +#define EMU_CHAN_PEFE_PITCHAMOUNT_MASK 0x0000ff00 +#define EMU_CHAN_PEFE_PITCHAMOUNT EMU_MKSUBREG(8, 8, EMU_CHAN_PEFE) +#define EMU_CHAN_PEFE_FILTERAMOUNT_MASK 0x000000ff +#define EMU_CHAN_PEFE_FILTERAMOUNT EMU_MKSUBREG(8, 0, EMU_CHAN_PEFE) + +#define EMU_CHAN_FMMOD 0x1b +#define EMU_CHAN_FMMOD_MODVIBRATO 0x0000ff00 +#define EMU_CHAN_FMMOD_MOFILTER 0x000000ff + +#define EMU_CHAN_TREMFRQ 0x1c +#define EMU_CHAN_TREMFRQ_DEPTH 0x0000ff00 + +#define EMU_CHAN_FM2FRQ2 0x1d +#define EMU_CHAN_FM2FRQ2_DEPTH 0x0000ff00 +#define EMU_CHAN_FM2FRQ2_FREQUENCY 0x000000ff + +#define EMU_CHAN_TEMPENV 0x1e +#define EMU_CHAN_TEMPENV_MASK 0x0000ffff + +#define EMU_CHAN_CD0 0x20 +#define EMU_CHAN_CD1 0x21 +#define EMU_CHAN_CD2 0x22 +#define EMU_CHAN_CD3 0x23 +#define EMU_CHAN_CD4 0x24 +#define EMU_CHAN_CD5 0x25 +#define EMU_CHAN_CD6 0x26 +#define EMU_CHAN_CD7 0x27 +#define EMU_CHAN_CD8 0x28 +#define EMU_CHAN_CD9 0x29 +#define EMU_CHAN_CDA 0x2a +#define EMU_CHAN_CDB 0x2b +#define EMU_CHAN_CDC 0x2c +#define EMU_CHAN_CDD 0x2d +#define EMU_CHAN_CDE 0x2e +#define EMU_CHAN_CDF 0x2f /* -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- */ -#define EMU_PTB 0x40 -#define EMU_PTB_MASK 0xfffff000 - -#define EMU_TCB 0x41 -#define EMU_TCB_MASK 0xfffff000 - -#define EMU_ADCCR 0x42 -#define EMU_ADCCR_RCHANENABLE 0x00000010 -#define EMU_A_ADCCR_RCHANENABLE 0x00000020 -#define EMU_ADCCR_LCHANENABLE 0x00000008 -#define EMU_A_ADCCR_LCHANENABLE 0x00000010 -#define EMU_ADCCR_SAMPLERATE_MASK 0x00000007 -#define EMU_A_ADCCR_SAMPLERATE_MASK 0x0000000f -#define EMU_ADCCR_SAMPLERATE_48 0x00000000 -#define EMU_ADCCR_SAMPLERATE_44 0x00000001 -#define EMU_ADCCR_SAMPLERATE_32 0x00000002 -#define EMU_ADCCR_SAMPLERATE_24 0x00000003 -#define EMU_ADCCR_SAMPLERATE_22 0x00000004 -#define EMU_ADCCR_SAMPLERATE_16 0x00000005 -#define EMU_A_ADCCR_SAMPLERATE_12 0x00000006 -#define EMU_ADCCR_SAMPLERATE_11 0x00000006 -#define EMU_A_ADCCR_SAMPLERATE_11 0x00000007 -#define EMU_ADCCR_SAMPLERATE_8 0x00000007 -#define EMU_A_ADCCR_SAMPLERATE_8 0x00000008 - -#define EMU_FXWC 0x43 -#define EMU_TCBS 0x44 -#define EMU_TCBS_MASK 0x00000007 -#define EMU_TCBS_BUFFSIZE_16K 0x00000000 -#define EMU_TCBS_BUFFSIZE_32K 0x00000001 -#define EMU_TCBS_BUFFSIZE_64K 0x00000002 -#define EMU_TCBS_BUFFSIZE_128K 0x00000003 -#define EMU_TCBS_BUFFSIZE_256K 0x00000004 -#define EMU_TCBS_BUFFSIZE_512K 0x00000005 -#define EMU_TCBS_BUFFSIZE_1024K 0x00000006 -#define EMU_TCBS_BUFFSIZE_2048K 0x00000007 - -#define EMU_MICBA 0x45 -#define EMU_ADCBA 0x46 -#define EMU_FXBA 0x47 -#define EMU_RECBA_MASK 0xfffff000 - -#define EMU_MICBS 0x49 -#define EMU_ADCBS 0x4a -#define EMU_FXBS 0x4b -#define EMU_RECBS_BUFSIZE_NONE 0x00000000 -#define EMU_RECBS_BUFSIZE_384 0x00000001 -#define EMU_RECBS_BUFSIZE_448 0x00000002 -#define EMU_RECBS_BUFSIZE_512 0x00000003 -#define EMU_RECBS_BUFSIZE_640 0x00000004 -#define EMU_RECBS_BUFSIZE_768 0x00000005 -#define EMU_RECBS_BUFSIZE_896 0x00000006 -#define EMU_RECBS_BUFSIZE_1024 0x00000007 -#define EMU_RECBS_BUFSIZE_1280 0x00000008 -#define EMU_RECBS_BUFSIZE_1536 0x00000009 -#define EMU_RECBS_BUFSIZE_1792 0x0000000a -#define EMU_RECBS_BUFSIZE_2048 0x0000000b -#define EMU_RECBS_BUFSIZE_2560 0x0000000c -#define EMU_RECBS_BUFSIZE_3072 0x0000000d -#define EMU_RECBS_BUFSIZE_3584 0x0000000e -#define EMU_RECBS_BUFSIZE_4096 0x0000000f -#define EMU_RECBS_BUFSIZE_5120 0x00000010 -#define EMU_RECBS_BUFSIZE_6144 0x00000011 -#define EMU_RECBS_BUFSIZE_7168 0x00000012 -#define EMU_RECBS_BUFSIZE_8192 0x00000013 -#define EMU_RECBS_BUFSIZE_10240 0x00000014 -#define EMU_RECBS_BUFSIZE_12288 0x00000015 -#define EMU_RECBS_BUFSIZE_14366 0x00000016 -#define EMU_RECBS_BUFSIZE_16384 0x00000017 -#define EMU_RECBS_BUFSIZE_20480 0x00000018 -#define EMU_RECBS_BUFSIZE_24576 0x00000019 -#define EMU_RECBS_BUFSIZE_28672 0x0000001a -#define EMU_RECBS_BUFSIZE_32768 0x0000001b -#define EMU_RECBS_BUFSIZE_40960 0x0000001c -#define EMU_RECBS_BUFSIZE_49152 0x0000001d -#define EMU_RECBS_BUFSIZE_57344 0x0000001e -#define EMU_RECBS_BUFSIZE_65536 0x0000001f - -#define EMU_CDCS 0x50 -#define EMU_GPSCS 0x51 - -#define EMU_DBG 0x52 -#define EMU_DBG_ZC 0x80000000 -#define EMU_DBG_SATURATION_OCCURRED 0x02000000 -#define EMU_DBG_SATURATION_ADDR 0x01ff0000 -#define EMU_DBG_SINGLE_STEP 0x00008000 -#define EMU_DBG_STEP 0x00004000 -#define EMU_DBG_CONDITION_CODE 0x00003e00 -#define EMU_DBG_SINGLE_STEP_ADDR 0x000001ff - -#define EMU_A_DBG 0x53 -#define EMU_A_DBG_SINGLE_STEP 0x00020000 -#define EMU_A_DBG_ZC 0x40000000 -#define EMU_A_DBG_STEP_ADDR 0x000003ff -#define EMU_A_DBG_SATURATION_OCCRD 0x20000000 -#define EMU_A_DBG_SATURATION_ADDR 0x0ffc0000 - -#define EMU_SPCS0 0x54 -#define EMU_SPCS1 0x55 -#define EMU_SPCS2 0x56 -#define EMU_SPCS_CLKACCYMASK 0x30000000 -#define EMU_SPCS_CLKACCY_1000PPM 0x00000000 -#define EMU_SPCS_CLKACCY_50PPM 0x10000000 -#define EMU_SPCS_CLKACCY_VARIABLE 0x20000000 -#define EMU_SPCS_SAMPLERATEMASK 0x0f000000 -#define EMU_SPCS_SAMPLERATE_44 0x00000000 -#define EMU_SPCS_SAMPLERATE_48 0x02000000 -#define EMU_SPCS_SAMPLERATE_32 0x03000000 -#define EMU_SPCS_CHANNELNUMMASK 0x00f00000 -#define EMU_SPCS_CHANNELNUM_UNSPEC 0x00000000 -#define EMU_SPCS_CHANNELNUM_LEFT 0x00100000 -#define EMU_SPCS_CHANNELNUM_RIGHT 0x00200000 -#define EMU_SPCS_SOURCENUMMASK 0x000f0000 -#define EMU_SPCS_SOURCENUM_UNSPEC 0x00000000 -#define EMU_SPCS_GENERATIONSTATUS 0x00008000 -#define EMU_SPCS_CATEGORYCODEMASK 0x00007f00 -#define EMU_SPCS_MODEMASK 0x000000c0 -#define EMU_SPCS_EMPHASISMASK 0x00000038 -#define EMU_SPCS_EMPHASIS_NONE 0x00000000 -#define EMU_SPCS_EMPHASIS_50_15 0x00000008 -#define EMU_SPCS_COPYRIGHT 0x00000004 -#define EMU_SPCS_NOTAUDIODATA 0x00000002 -#define EMU_SPCS_PROFESSIONAL 0x00000001 - -#define EMU_CLIEL 0x58 -#define EMU_CLIEH 0x59 -#define EMU_CLIPL 0x5a -#define EMU_CLIPH 0x5b -#define EMU_SOLEL 0x5c -#define EMU_SOLEH 0x5d - -#define EMU_SPBYPASS 0x5e -#define EMU_SPBYPASS_ENABLE 0x00000001 -#define EMU_SPBYPASS_24_BITS 0x00000f00 - -#define EMU_AC97SLOT 0x5f -#define EMU_AC97SLOT_CENTER 0x00000010 -#define EMU_AC97SLOT_LFE 0x00000020 - -#define EMU_CDSRCS 0x60 -#define EMU_GPSRCS 0x61 -#define EMU_ZVSRCS 0x62 -#define EMU_SRCS_SPDIFLOCKED 0x02000000 -#define EMU_SRCS_RATELOCKED 0x01000000 -#define EMU_SRCS_ESTSAMPLERATE 0x0007ffff - -#define EMU_MICIDX 0x63 -#define EMU_A_MICIDX 0x64 -#define EMU_ADCIDX 0x64 -#define EMU_A_ADCIDX 0x63 -#define EMU_FXIDX 0x65 -#define EMU_RECIDX_MASK 0x0000ffff -#define EMU_RECIDX(idxreg) (0x10000000|(idxreg)) +#define EMU_PTB 0x40 +#define EMU_PTB_MASK 0xfffff000 + +#define EMU_TCB 0x41 +#define EMU_TCB_MASK 0xfffff000 + +#define EMU_ADCCR 0x42 +#define EMU_ADCCR_RCHANENABLE 0x00000010 +#define EMU_A_ADCCR_RCHANENABLE 0x00000020 +#define EMU_ADCCR_LCHANENABLE 0x00000008 +#define EMU_A_ADCCR_LCHANENABLE 0x00000010 +#define EMU_ADCCR_SAMPLERATE_MASK 0x00000007 +#define EMU_A_ADCCR_SAMPLERATE_MASK 0x0000000f +#define EMU_ADCCR_SAMPLERATE_48 0x00000000 +#define EMU_ADCCR_SAMPLERATE_44 0x00000001 +#define EMU_ADCCR_SAMPLERATE_32 0x00000002 +#define EMU_ADCCR_SAMPLERATE_24 0x00000003 +#define EMU_ADCCR_SAMPLERATE_22 0x00000004 +#define EMU_ADCCR_SAMPLERATE_16 0x00000005 +#define EMU_A_ADCCR_SAMPLERATE_12 0x00000006 +#define EMU_ADCCR_SAMPLERATE_11 0x00000006 +#define EMU_A_ADCCR_SAMPLERATE_11 0x00000007 +#define EMU_ADCCR_SAMPLERATE_8 0x00000007 +#define EMU_A_ADCCR_SAMPLERATE_8 0x00000008 + +#define EMU_FXWC 0x43 +#define EMU_TCBS 0x44 +#define EMU_TCBS_MASK 0x00000007 +#define EMU_TCBS_BUFFSIZE_16K 0x00000000 +#define EMU_TCBS_BUFFSIZE_32K 0x00000001 +#define EMU_TCBS_BUFFSIZE_64K 0x00000002 +#define EMU_TCBS_BUFFSIZE_128K 0x00000003 +#define EMU_TCBS_BUFFSIZE_256K 0x00000004 +#define EMU_TCBS_BUFFSIZE_512K 0x00000005 +#define EMU_TCBS_BUFFSIZE_1024K 0x00000006 +#define EMU_TCBS_BUFFSIZE_2048K 0x00000007 + +#define EMU_MICBA 0x45 +#define EMU_ADCBA 0x46 +#define EMU_FXBA 0x47 +#define EMU_RECBA_MASK 0xfffff000 + +#define EMU_MICBS 0x49 +#define EMU_ADCBS 0x4a +#define EMU_FXBS 0x4b +#define EMU_RECBS_BUFSIZE_NONE 0x00000000 +#define EMU_RECBS_BUFSIZE_384 0x00000001 +#define EMU_RECBS_BUFSIZE_448 0x00000002 +#define EMU_RECBS_BUFSIZE_512 0x00000003 +#define EMU_RECBS_BUFSIZE_640 0x00000004 +#define EMU_RECBS_BUFSIZE_768 0x00000005 +#define EMU_RECBS_BUFSIZE_896 0x00000006 +#define EMU_RECBS_BUFSIZE_1024 0x00000007 +#define EMU_RECBS_BUFSIZE_1280 0x00000008 +#define EMU_RECBS_BUFSIZE_1536 0x00000009 +#define EMU_RECBS_BUFSIZE_1792 0x0000000a +#define EMU_RECBS_BUFSIZE_2048 0x0000000b +#define EMU_RECBS_BUFSIZE_2560 0x0000000c +#define EMU_RECBS_BUFSIZE_3072 0x0000000d +#define EMU_RECBS_BUFSIZE_3584 0x0000000e +#define EMU_RECBS_BUFSIZE_4096 0x0000000f +#define EMU_RECBS_BUFSIZE_5120 0x00000010 +#define EMU_RECBS_BUFSIZE_6144 0x00000011 +#define EMU_RECBS_BUFSIZE_7168 0x00000012 +#define EMU_RECBS_BUFSIZE_8192 0x00000013 +#define EMU_RECBS_BUFSIZE_10240 0x00000014 +#define EMU_RECBS_BUFSIZE_12288 0x00000015 +#define EMU_RECBS_BUFSIZE_14366 0x00000016 +#define EMU_RECBS_BUFSIZE_16384 0x00000017 +#define EMU_RECBS_BUFSIZE_20480 0x00000018 +#define EMU_RECBS_BUFSIZE_24576 0x00000019 +#define EMU_RECBS_BUFSIZE_28672 0x0000001a +#define EMU_RECBS_BUFSIZE_32768 0x0000001b +#define EMU_RECBS_BUFSIZE_40960 0x0000001c +#define EMU_RECBS_BUFSIZE_49152 0x0000001d +#define EMU_RECBS_BUFSIZE_57344 0x0000001e +#define EMU_RECBS_BUFSIZE_65536 0x0000001f + +#define EMU_CDCS 0x50 +#define EMU_GPSCS 0x51 + +#define EMU_DBG 0x52 +#define EMU_DBG_ZC 0x80000000 +#define EMU_DBG_SATURATION_OCCURRED 0x02000000 +#define EMU_DBG_SATURATION_ADDR 0x01ff0000 +#define EMU_DBG_SINGLE_STEP 0x00008000 +#define EMU_DBG_STEP 0x00004000 +#define EMU_DBG_CONDITION_CODE 0x00003e00 +#define EMU_DBG_SINGLE_STEP_ADDR 0x000001ff + +#define EMU_A_DBG 0x53 +#define EMU_A_DBG_SINGLE_STEP 0x00020000 +#define EMU_A_DBG_ZC 0x40000000 +#define EMU_A_DBG_STEP_ADDR 0x000003ff +#define EMU_A_DBG_SATURATION_OCCRD 0x20000000 +#define EMU_A_DBG_SATURATION_ADDR 0x0ffc0000 + +#define EMU_SPCS0 0x54 +#define EMU_SPCS1 0x55 +#define EMU_SPCS2 0x56 +#define EMU_SPCS_CLKACCYMASK 0x30000000 +#define EMU_SPCS_CLKACCY_1000PPM 0x00000000 +#define EMU_SPCS_CLKACCY_50PPM 0x10000000 +#define EMU_SPCS_CLKACCY_VARIABLE 0x20000000 +#define EMU_SPCS_SAMPLERATEMASK 0x0f000000 +#define EMU_SPCS_SAMPLERATE_44 0x00000000 +#define EMU_SPCS_SAMPLERATE_48 0x02000000 +#define EMU_SPCS_SAMPLERATE_32 0x03000000 +#define EMU_SPCS_CHANNELNUMMASK 0x00f00000 +#define EMU_SPCS_CHANNELNUM_UNSPEC 0x00000000 +#define EMU_SPCS_CHANNELNUM_LEFT 0x00100000 +#define EMU_SPCS_CHANNELNUM_RIGHT 0x00200000 +#define EMU_SPCS_SOURCENUMMASK 0x000f0000 +#define EMU_SPCS_SOURCENUM_UNSPEC 0x00000000 +#define EMU_SPCS_GENERATIONSTATUS 0x00008000 +#define EMU_SPCS_CATEGORYCODEMASK 0x00007f00 +#define EMU_SPCS_MODEMASK 0x000000c0 +#define EMU_SPCS_EMPHASISMASK 0x00000038 +#define EMU_SPCS_EMPHASIS_NONE 0x00000000 +#define EMU_SPCS_EMPHASIS_50_15 0x00000008 +#define EMU_SPCS_COPYRIGHT 0x00000004 +#define EMU_SPCS_NOTAUDIODATA 0x00000002 +#define EMU_SPCS_PROFESSIONAL 0x00000001 + +#define EMU_CLIEL 0x58 +#define EMU_CLIEH 0x59 +#define EMU_CLIPL 0x5a +#define EMU_CLIPH 0x5b +#define EMU_SOLEL 0x5c +#define EMU_SOLEH 0x5d + +#define EMU_SPBYPASS 0x5e +#define EMU_SPBYPASS_ENABLE 0x00000001 +#define EMU_SPBYPASS_24_BITS 0x00000f00 + +#define EMU_AC97SLOT 0x5f +#define EMU_AC97SLOT_CENTER 0x00000010 +#define EMU_AC97SLOT_LFE 0x00000020 + +#define EMU_CDSRCS 0x60 +#define EMU_GPSRCS 0x61 +#define EMU_ZVSRCS 0x62 +#define EMU_SRCS_SPDIFLOCKED 0x02000000 +#define EMU_SRCS_RATELOCKED 0x01000000 +#define EMU_SRCS_ESTSAMPLERATE 0x0007ffff + +#define EMU_MICIDX 0x63 +#define EMU_A_MICIDX 0x64 +#define EMU_ADCIDX 0x64 +#define EMU_A_ADCIDX 0x63 +#define EMU_FXIDX 0x65 +#define EMU_RECIDX_MASK 0x0000ffff +#define EMU_RECIDX(idxreg) (0x10000000 | (idxreg)) /* #define EMU_MICIDX_IDX 0x10000063 #define EMU_ADCIDX_IDX 0x10000064 #define EMU_FXIDX_IDX 0x10000065 */ -#define EMU_A_MUDATA1 0x70 -#define EMU_A_MUCMD1 0x71 -#define EMU_A_MUSTAT1 EMU_A_MUCMD1 -#define EMU_A_MUDATA2 0x72 -#define EMU_A_MUCMD2 0x73 -#define EMU_A_MUSTAT2 EMU_A_MUCMD2 -#define EMU_A_FXWC1 0x74 -#define EMU_A_FXWC2 0x75 -#define EMU_A_SPDIF_SAMPLERATE 0x76 -#define EMU_A_SPDIF_44100 0x00000080 -#define EMU_A_SPDIF_48000 0x00000000 -#define EMU_A_SPDIF_96000 0x00000040 -#define EMU_A2_SPDIF_SAMPLERATE EMU_MKSUBREG(3, 9, EMU_A_SPDIF_SAMPLERATE) -#define EMU_A2_SPDIF_MASK 0x00000e00 -#define EMU_A2_SPDIF_UNKNOWN 0x2 - -#define EMU_A_CHAN_FXRT2 0x7c -#define EMU_A_CHAN_FXRT_CHANNELE 0x0000003f -#define EMU_A_CHAN_FXRT_CHANNELF 0x00003f00 -#define EMU_A_CHAN_FXRT_CHANNELG 0x003f0000 -#define EMU_A_CHAN_FXRT_CHANNELH 0x3f000000 -#define EMU_A_CHAN_SENDAMOUNTS 0x7d -#define EMU_A_CHAN_FXSENDAMOUNTS_E_MASK 0xff000000 -#define EMU_A_CHAN_FXSENDAMOUNTS_F_MASK 0x00ff0000 -#define EMU_A_CHAN_FXSENDAMOUNTS_G_MASK 0x0000ff00 -#define EMU_A_CHAN_FXSENDAMOUNTS_H_MASK 0x000000ff -#define EMU_A_CHAN_FXRT1 0x7e -#define EMU_A_CHAN_FXRT_CHANNELA 0x0000003f -#define EMU_A_CHAN_FXRT_CHANNELB 0x00003f00 -#define EMU_A_CHAN_FXRT_CHANNELC 0x003f0000 -#define EMU_A_CHAN_FXRT_CHANNELD 0x3f000000 - -#define EMU_FXGPREGBASE 0x100 -#define EMU_A_FXGPREGBASE 0x400 - -#define EMU_TANKMEMDATAREGBASE 0x200 -#define EMU_TANKMEMDATAREG_MASK 0x000fffff - -#define EMU_TANKMEMADDRREGBASE 0x300 -#define EMU_TANKMEMADDRREG_ADDR_MASK 0x000fffff -#define EMU_TANKMEMADDRREG_CLEAR 0x00800000 -#define EMU_TANKMEMADDRREG_ALIGN 0x00400000 -#define EMU_TANKMEMADDRREG_WRITE 0x00200000 -#define EMU_TANKMEMADDRREG_READ 0x00100000 - -#define EMU_MICROCODEBASE 0x400 -#define EMU_A_MICROCODEBASE 0x600 -#define EMU_DSP_LOWORD_OPX_MASK 0x000ffc00 -#define EMU_DSP_LOWORD_OPY_MASK 0x000003ff -#define EMU_DSP_HIWORD_OPCODE_MASK 0x00f00000 -#define EMU_DSP_HIWORD_RESULT_MASK 0x000ffc00 -#define EMU_DSP_HIWORD_OPA_MASK 0x000003ff -#define EMU_A_DSP_LOWORD_OPX_MASK 0x007ff000 -#define EMU_A_DSP_LOWORD_OPY_MASK 0x000007ff -#define EMU_A_DSP_HIWORD_OPCODE_MASK 0x0f000000 -#define EMU_A_DSP_HIWORD_RESULT_MASK 0x007ff000 -#define EMU_A_DSP_HIWORD_OPA_MASK 0x000007ff - -#define EMU_DSP_OP_MACS 0x0 -#define EMU_DSP_OP_MACS1 0x1 -#define EMU_DSP_OP_MACW 0x2 -#define EMU_DSP_OP_MACW1 0x3 -#define EMU_DSP_OP_MACINTS 0x4 -#define EMU_DSP_OP_MACINTW 0x5 -#define EMU_DSP_OP_ACC3 0x6 -#define EMU_DSP_OP_MACMV 0x7 -#define EMU_DSP_OP_ANDXOR 0x8 -#define EMU_DSP_OP_TSTNEG 0x9 -#define EMU_DSP_OP_LIMIT 0xA -#define EMU_DSP_OP_LIMIT1 0xB -#define EMU_DSP_OP_LOG 0xC -#define EMU_DSP_OP_EXP 0xD -#define EMU_DSP_OP_INTERP 0xE -#define EMU_DSP_OP_SKIP 0xF - -#define EMU_DSP_FX(num) (num) - -#define EMU_DSP_IOL(base, num) (base + (num << 1)) -#define EMU_DSP_IOR(base, num) (EMU_DSP_IOL(base, num) + 1) - -#define EMU_DSP_INL_BASE 0x010 -#define EMU_DSP_INL(num) (EMU_DSP_IOL(EMU_DSP_INL_BASE, num)) -#define EMU_DSP_INR(num) (EMU_DSP_IOR(EMU_DSP_INL_BASE, num)) -#define EMU_A_DSP_INL_BASE 0x040 -#define EMU_A_DSP_INL(num) (EMU_DSP_IOL(EMU_A_DSP_INL_BASE, num)) -#define EMU_A_DSP_INR(num) (EMU_DSP_IOR(EMU_A_DSP_INL_BASE, num)) -#define EMU_DSP_IN_AC97 0 -#define EMU_DSP_IN_CDSPDIF 1 -#define EMU_DSP_IN_ZOOM 2 -#define EMU_DSP_IN_TOSOPT 3 -#define EMU_DSP_IN_LVDLM1 4 -#define EMU_DSP_IN_LVDCOS 5 -#define EMU_DSP_IN_LVDLM2 6 -#define EMU_DSP_IN_UNKNOWN 7 - -#define EMU_DSP_OUTL_BASE 0x020 -#define EMU_DSP_OUTL(num) (EMU_DSP_IOL(EMU_DSP_OUTL_BASE, num)) -#define EMU_DSP_OUTR(num) (EMU_DSP_IOR(EMU_DSP_OUTL_BASE, num)) -#define EMU_DSP_OUT_A_FRONT 0 -#define EMU_DSP_OUT_D_FRONT 1 -#define EMU_DSP_OUT_D_CENTER 2 -#define EMU_DSP_OUT_DRIVE_HP 3 -#define EMU_DSP_OUT_AD_REAR 4 -#define EMU_DSP_OUT_ADC 5 -#define EMU_DSP_OUTL_MIC 6 - -#define EMU_A_DSP_OUTL_BASE 0x060 -#define EMU_A_DSP_OUTL(num) (EMU_DSP_IOL(EMU_A_DSP_OUTL_BASE, num)) -#define EMU_A_DSP_OUTR(num) (EMU_DSP_IOR(EMU_A_DSP_OUTL_BASE, num)) -#define EMU_A_DSP_OUT_D_FRONT 0 -#define EMU_A_DSP_OUT_D_CENTER 1 -#define EMU_A_DSP_OUT_DRIVE_HP 2 -#define EMU_A_DSP_OUT_DREAR 3 -#define EMU_A_DSP_OUT_A_FRONT 4 -#define EMU_A_DSP_OUT_A_CENTER 5 -#define EMU_A_DSP_OUT_A_REAR 7 -#define EMU_A_DSP_OUT_ADC 11 - -#define EMU_DSP_CST_BASE 0x40 -#define EMU_A_DSP_CST_BASE 0xc0 -#define EMU_DSP_CST(num) (EMU_DSP_CST_BASE + num) -#define EMU_A_DSP_CST(num) (EMU_A_DSP_CST_BASE + num) +#define EMU_A_MUDATA1 0x70 +#define EMU_A_MUCMD1 0x71 +#define EMU_A_MUSTAT1 EMU_A_MUCMD1 +#define EMU_A_MUDATA2 0x72 +#define EMU_A_MUCMD2 0x73 +#define EMU_A_MUSTAT2 EMU_A_MUCMD2 +#define EMU_A_FXWC1 0x74 +#define EMU_A_FXWC2 0x75 +#define EMU_A_SPDIF_SAMPLERATE 0x76 +#define EMU_A_SPDIF_44100 0x00000080 +#define EMU_A_SPDIF_48000 0x00000000 +#define EMU_A_SPDIF_96000 0x00000040 +#define EMU_A2_SPDIF_SAMPLERATE EMU_MKSUBREG(3, 9, EMU_A_SPDIF_SAMPLERATE) +#define EMU_A2_SPDIF_MASK 0x00000e00 +#define EMU_A2_SPDIF_UNKNOWN 0x2 + +#define EMU_A_CHAN_FXRT2 0x7c +#define EMU_A_CHAN_FXRT_CHANNELE 0x0000003f +#define EMU_A_CHAN_FXRT_CHANNELF 0x00003f00 +#define EMU_A_CHAN_FXRT_CHANNELG 0x003f0000 +#define EMU_A_CHAN_FXRT_CHANNELH 0x3f000000 +#define EMU_A_CHAN_SENDAMOUNTS 0x7d +#define EMU_A_CHAN_FXSENDAMOUNTS_E_MASK 0xff000000 +#define EMU_A_CHAN_FXSENDAMOUNTS_F_MASK 0x00ff0000 +#define EMU_A_CHAN_FXSENDAMOUNTS_G_MASK 0x0000ff00 +#define EMU_A_CHAN_FXSENDAMOUNTS_H_MASK 0x000000ff +#define EMU_A_CHAN_FXRT1 0x7e +#define EMU_A_CHAN_FXRT_CHANNELA 0x0000003f +#define EMU_A_CHAN_FXRT_CHANNELB 0x00003f00 +#define EMU_A_CHAN_FXRT_CHANNELC 0x003f0000 +#define EMU_A_CHAN_FXRT_CHANNELD 0x3f000000 + +#define EMU_FXGPREGBASE 0x100 +#define EMU_A_FXGPREGBASE 0x400 + +#define EMU_TANKMEMDATAREGBASE 0x200 +#define EMU_TANKMEMDATAREG_MASK 0x000fffff + +#define EMU_TANKMEMADDRREGBASE 0x300 +#define EMU_TANKMEMADDRREG_ADDR_MASK 0x000fffff +#define EMU_TANKMEMADDRREG_CLEAR 0x00800000 +#define EMU_TANKMEMADDRREG_ALIGN 0x00400000 +#define EMU_TANKMEMADDRREG_WRITE 0x00200000 +#define EMU_TANKMEMADDRREG_READ 0x00100000 + +#define EMU_MICROCODEBASE 0x400 +#define EMU_A_MICROCODEBASE 0x600 +#define EMU_DSP_LOWORD_OPX_MASK 0x000ffc00 +#define EMU_DSP_LOWORD_OPY_MASK 0x000003ff +#define EMU_DSP_HIWORD_OPCODE_MASK 0x00f00000 +#define EMU_DSP_HIWORD_RESULT_MASK 0x000ffc00 +#define EMU_DSP_HIWORD_OPA_MASK 0x000003ff +#define EMU_A_DSP_LOWORD_OPX_MASK 0x007ff000 +#define EMU_A_DSP_LOWORD_OPY_MASK 0x000007ff +#define EMU_A_DSP_HIWORD_OPCODE_MASK 0x0f000000 +#define EMU_A_DSP_HIWORD_RESULT_MASK 0x007ff000 +#define EMU_A_DSP_HIWORD_OPA_MASK 0x000007ff + +#define EMU_DSP_OP_MACS 0x0 +#define EMU_DSP_OP_MACS1 0x1 +#define EMU_DSP_OP_MACW 0x2 +#define EMU_DSP_OP_MACW1 0x3 +#define EMU_DSP_OP_MACINTS 0x4 +#define EMU_DSP_OP_MACINTW 0x5 +#define EMU_DSP_OP_ACC3 0x6 +#define EMU_DSP_OP_MACMV 0x7 +#define EMU_DSP_OP_ANDXOR 0x8 +#define EMU_DSP_OP_TSTNEG 0x9 +#define EMU_DSP_OP_LIMIT 0xA +#define EMU_DSP_OP_LIMIT1 0xB +#define EMU_DSP_OP_LOG 0xC +#define EMU_DSP_OP_EXP 0xD +#define EMU_DSP_OP_INTERP 0xE +#define EMU_DSP_OP_SKIP 0xF + +#define EMU_DSP_FX(num) (num) + +#define EMU_DSP_IOL(base, num) (base + (num << 1)) +#define EMU_DSP_IOR(base, num) (EMU_DSP_IOL(base, num) + 1) + +#define EMU_DSP_INL_BASE 0x010 +#define EMU_DSP_INL(num) (EMU_DSP_IOL(EMU_DSP_INL_BASE, num)) +#define EMU_DSP_INR(num) (EMU_DSP_IOR(EMU_DSP_INL_BASE, num)) +#define EMU_A_DSP_INL_BASE 0x040 +#define EMU_A_DSP_INL(num) (EMU_DSP_IOL(EMU_A_DSP_INL_BASE, num)) +#define EMU_A_DSP_INR(num) (EMU_DSP_IOR(EMU_A_DSP_INL_BASE, num)) +#define EMU_DSP_IN_AC97 0 +#define EMU_DSP_IN_CDSPDIF 1 +#define EMU_DSP_IN_ZOOM 2 +#define EMU_DSP_IN_TOSOPT 3 +#define EMU_DSP_IN_LVDLM1 4 +#define EMU_DSP_IN_LVDCOS 5 +#define EMU_DSP_IN_LVDLM2 6 +#define EMU_DSP_IN_UNKNOWN 7 + +#define EMU_DSP_OUTL_BASE 0x020 +#define EMU_DSP_OUTL(num) (EMU_DSP_IOL(EMU_DSP_OUTL_BASE, num)) +#define EMU_DSP_OUTR(num) (EMU_DSP_IOR(EMU_DSP_OUTL_BASE, num)) +#define EMU_DSP_OUT_A_FRONT 0 +#define EMU_DSP_OUT_D_FRONT 1 +#define EMU_DSP_OUT_D_CENTER 2 +#define EMU_DSP_OUT_DRIVE_HP 3 +#define EMU_DSP_OUT_AD_REAR 4 +#define EMU_DSP_OUT_ADC 5 +#define EMU_DSP_OUTL_MIC 6 + +#define EMU_A_DSP_OUTL_BASE 0x060 +#define EMU_A_DSP_OUTL(num) (EMU_DSP_IOL(EMU_A_DSP_OUTL_BASE, num)) +#define EMU_A_DSP_OUTR(num) (EMU_DSP_IOR(EMU_A_DSP_OUTL_BASE, num)) +#define EMU_A_DSP_OUT_D_FRONT 0 +#define EMU_A_DSP_OUT_D_CENTER 1 +#define EMU_A_DSP_OUT_DRIVE_HP 2 +#define EMU_A_DSP_OUT_DREAR 3 +#define EMU_A_DSP_OUT_A_FRONT 4 +#define EMU_A_DSP_OUT_A_CENTER 5 +#define EMU_A_DSP_OUT_A_REAR 7 +#define EMU_A_DSP_OUT_ADC 11 + +#define EMU_DSP_CST_BASE 0x40 +#define EMU_A_DSP_CST_BASE 0xc0 +#define EMU_DSP_CST(num) (EMU_DSP_CST_BASE + num) +#define EMU_A_DSP_CST(num) (EMU_A_DSP_CST_BASE + num) /* 00 = 0x00000000 01 = 0x00000001 @@ -664,19 +664,19 @@ 15 = 0x00100000 */ -#define EMU_DSP_HWR_ACC 0x056 -#define EMU_DSP_HWR_CCR 0x057 -#define EMU_DSP_HWR_CCR_S 0x04 -#define EMU_DSP_HWR_CCR_Z 0x03 -#define EMU_DSP_HWR_CCR_M 0x02 -#define EMU_DSP_HWR_CCR_N 0x01 -#define EMU_DSP_HWR_CCR_B 0x00 -#define EMU_DSP_HWR_NOISE0 0x058 -#define EMU_DSP_HWR_NOISE1 0x059 -#define EMU_DSP_HWR_INTR 0x05A -#define EMU_DSP_HWR_DBAC 0x05B - -#define EMU_DSP_GPR(num) (EMU_FXGPREGBASE + num) -#define EMU_A_DSP_GPR(num) (EMU_A_FXGPREGBASE + num) +#define EMU_DSP_HWR_ACC 0x056 +#define EMU_DSP_HWR_CCR 0x057 +#define EMU_DSP_HWR_CCR_S 0x04 +#define EMU_DSP_HWR_CCR_Z 0x03 +#define EMU_DSP_HWR_CCR_M 0x02 +#define EMU_DSP_HWR_CCR_N 0x01 +#define EMU_DSP_HWR_CCR_B 0x00 +#define EMU_DSP_HWR_NOISE0 0x058 +#define EMU_DSP_HWR_NOISE1 0x059 +#define EMU_DSP_HWR_INTR 0x05A +#define EMU_DSP_HWR_DBAC 0x05B + +#define EMU_DSP_GPR(num) (EMU_FXGPREGBASE + num) +#define EMU_A_DSP_GPR(num) (EMU_A_FXGPREGBASE + num) #endif /* _DEV_PCI_EMUXKIREG_H_ */ Index: sys/dev/sound/pci/envy24.h =================================================================== --- sys/dev/sound/pci/envy24.h +++ sys/dev/sound/pci/envy24.h @@ -34,128 +34,129 @@ /* PCI Registers */ -#define PCIR_CCS 0x10 /* Controller I/O Base Address */ -#define PCIR_DDMA 0x14 /* DDMA I/O Base Address */ -#define PCIR_DS 0x18 /* DMA Path Registers I/O Base Address */ -#define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */ - -#define PCIR_LAC 0x40 /* Legacy Audio Control */ -#define PCIM_LAC_DISABLE 0x8000 /* Legacy Audio Hardware disabled */ -#define PCIM_LAC_SBDMA0 0x0000 /* SB DMA Channel Select: 0 */ -#define PCIM_LAC_SBDMA1 0x0040 /* SB DMA Channel Select: 1 */ -#define PCIM_LAC_SBDMA3 0x00c0 /* SB DMA Channel Select: 3 */ -#define PCIM_LAC_IOADDR10 0x0020 /* I/O Address Alias Control */ -#define PCIM_LAC_MPU401 0x0008 /* MPU-401 I/O enable */ -#define PCIM_LAC_GAME 0x0004 /* Game Port enable (200h) */ -#define PCIM_LAC_FM 0x0002 /* FM I/O enable (AdLib 388h base) */ -#define PCIM_LAC_SB 0x0001 /* SB I/O enable */ - -#define PCIR_LCC 0x42 /* Legacy Configuration Control */ -#define PCIM_LCC_VINT 0xff00 /* Interrupt vector to be snooped */ -#define PCIM_LCC_SVIDRW 0x0080 /* SVID read/write enable */ -#define PCIM_LCC_SNPSB 0x0040 /* snoop SB 22C/24Ch I/O write cycle */ -#define PCIM_LCC_SNPPIC 0x0020 /* snoop PIC I/O R/W cycle */ -#define PCIM_LCC_SNPPCI 0x0010 /* snoop PCI bus interrupt acknowledge cycle */ -#define PCIM_LCC_SBBASE 0x0008 /* SB base 240h(1)/220h(0) */ -#define PCIM_LCC_MPUBASE 0x0006 /* MPU-401 base 300h-330h */ -#define PCIM_LCC_LDMA 0x0001 /* Legacy DMA enable */ - -#define PCIR_SCFG 0x60 /* System Configuration Register */ -#define PCIM_SCFG_XIN2 0xc0 /* XIN2 Clock Source Configuration */ - /* 00: 22.5792MHz(44.1kHz*512) */ - /* 01: 16.9344MHz(44.1kHz*384) */ - /* 10: from external clock synthesizer chip */ -#define PCIM_SCFG_MPU 0x20 /* 1(0)/2(1) MPU-401 UART(s) */ -#define PCIM_SCFG_AC97 0x10 /* 0: AC'97 codec exist */ - /* 1: AC'97 codec not exist */ -#define PCIM_SCFG_ADC 0x0c /* 1-4 stereo ADC connected */ -#define PCIM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */ - -#define PCIR_ACL 0x61 /* AC-Link Configuration Register */ -#define PCIM_ACL_MTC 0x80 /* Multi-track converter type: 0:AC'97 1:I2S */ -#define PCIM_ACL_OMODE 0x02 /* AC 97 codec SDATA_OUT 0:split 1:packed */ -#define PCIM_ACL_IMODE 0x01 /* AC 97 codec SDATA_IN 0:split 1:packed */ - -#define PCIR_I2S 0x62 /* I2S Converters Features Register */ -#define PCIM_I2S_VOL 0x80 /* I2S codec Volume and mute */ -#define PCIM_I2S_96KHZ 0x40 /* I2S converter 96kHz sampling rate support */ -#define PCIM_I2S_RES 0x30 /* Converter resolution */ -#define PCIM_I2S_16BIT 0x00 /* 16bit */ -#define PCIM_I2S_18BIT 0x10 /* 18bit */ -#define PCIM_I2S_20BIT 0x20 /* 20bit */ -#define PCIM_I2S_24BIT 0x30 /* 24bit */ -#define PCIM_I2S_ID 0x0f /* Other I2S IDs */ - -#define PCIR_SPDIF 0x63 /* S/PDIF Configuration Register */ -#define PCIM_SPDIF_ID 0xfc /* S/PDIF chip ID */ -#define PCIM_SPDIF_IN 0x02 /* S/PDIF Stereo In is present */ -#define PCIM_SPDIF_OUT 0x01 /* S/PDIF Stereo Out is present */ - -#define PCIR_POWER_STAT 0x84 /* Power Management Control and Status */ +#define PCIR_CCS 0x10 /* Controller I/O Base Address */ +#define PCIR_DDMA 0x14 /* DDMA I/O Base Address */ +#define PCIR_DS 0x18 /* DMA Path Registers I/O Base Address */ +#define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */ + +#define PCIR_LAC 0x40 /* Legacy Audio Control */ +#define PCIM_LAC_DISABLE 0x8000 /* Legacy Audio Hardware disabled */ +#define PCIM_LAC_SBDMA0 0x0000 /* SB DMA Channel Select: 0 */ +#define PCIM_LAC_SBDMA1 0x0040 /* SB DMA Channel Select: 1 */ +#define PCIM_LAC_SBDMA3 0x00c0 /* SB DMA Channel Select: 3 */ +#define PCIM_LAC_IOADDR10 0x0020 /* I/O Address Alias Control */ +#define PCIM_LAC_MPU401 0x0008 /* MPU-401 I/O enable */ +#define PCIM_LAC_GAME 0x0004 /* Game Port enable (200h) */ +#define PCIM_LAC_FM 0x0002 /* FM I/O enable (AdLib 388h base) */ +#define PCIM_LAC_SB 0x0001 /* SB I/O enable */ + +#define PCIR_LCC 0x42 /* Legacy Configuration Control */ +#define PCIM_LCC_VINT 0xff00 /* Interrupt vector to be snooped */ +#define PCIM_LCC_SVIDRW 0x0080 /* SVID read/write enable */ +#define PCIM_LCC_SNPSB 0x0040 /* snoop SB 22C/24Ch I/O write cycle */ +#define PCIM_LCC_SNPPIC 0x0020 /* snoop PIC I/O R/W cycle */ +#define PCIM_LCC_SNPPCI 0x0010 /* snoop PCI bus interrupt acknowledge cycle */ +#define PCIM_LCC_SBBASE 0x0008 /* SB base 240h(1)/220h(0) */ +#define PCIM_LCC_MPUBASE 0x0006 /* MPU-401 base 300h-330h */ +#define PCIM_LCC_LDMA 0x0001 /* Legacy DMA enable */ + +#define PCIR_SCFG 0x60 /* System Configuration Register */ +#define PCIM_SCFG_XIN2 0xc0 /* XIN2 Clock Source Configuration */ + /* 00: 22.5792MHz(44.1kHz*512) */ + /* 01: 16.9344MHz(44.1kHz*384) */ + /* 10: from external clock synthesizer chip */ +#define PCIM_SCFG_MPU 0x20 /* 1(0)/2(1) MPU-401 UART(s) */ +#define PCIM_SCFG_AC97 0x10 /* 0: AC'97 codec exist */ + /* 1: AC'97 codec not exist */ +#define PCIM_SCFG_ADC 0x0c /* 1-4 stereo ADC connected */ +#define PCIM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */ + +#define PCIR_ACL 0x61 /* AC-Link Configuration Register */ +#define PCIM_ACL_MTC 0x80 /* Multi-track converter type: 0:AC'97 1:I2S */ +#define PCIM_ACL_OMODE 0x02 /* AC 97 codec SDATA_OUT 0:split 1:packed */ +#define PCIM_ACL_IMODE 0x01 /* AC 97 codec SDATA_IN 0:split 1:packed */ + +#define PCIR_I2S 0x62 /* I2S Converters Features Register */ +#define PCIM_I2S_VOL 0x80 /* I2S codec Volume and mute */ +#define PCIM_I2S_96KHZ 0x40 /* I2S converter 96kHz sampling rate support */ +#define PCIM_I2S_RES 0x30 /* Converter resolution */ +#define PCIM_I2S_16BIT 0x00 /* 16bit */ +#define PCIM_I2S_18BIT 0x10 /* 18bit */ +#define PCIM_I2S_20BIT 0x20 /* 20bit */ +#define PCIM_I2S_24BIT 0x30 /* 24bit */ +#define PCIM_I2S_ID 0x0f /* Other I2S IDs */ + +#define PCIR_SPDIF 0x63 /* S/PDIF Configuration Register */ +#define PCIM_SPDIF_ID 0xfc /* S/PDIF chip ID */ +#define PCIM_SPDIF_IN 0x02 /* S/PDIF Stereo In is present */ +#define PCIM_SPDIF_OUT 0x01 /* S/PDIF Stereo Out is present */ + +#define PCIR_POWER_STAT 0x84 /* Power Management Control and Status */ /* Controller Registers */ -#define ENVY24_CCS_CTL 0x00 /* Control/Status Register */ -#define ENVY24_CCS_CTL_RESET 0x80 /* Entire Chip soft reset */ -#define ENVY24_CCS_CTL_DMAINT 0x40 /* DS DMA Channel-C interrupt */ -#define ENVY24_CCS_CTL_DOSVOL 0x10 /* set the DOS WT volume control */ -#define ENVY24_CCS_CTL_EDGE 0x08 /* SERR# edge (only one PCI clock width) */ -#define ENVY24_CCS_CTL_SBINT 0x02 /* SERR# assertion for SB interrupt */ -#define ENVY24_CCS_CTL_NATIVE 0x01 /* Mode select: 0:SB mode 1:native mode */ +#define ENVY24_CCS_CTL 0x00 /* Control/Status Register */ +#define ENVY24_CCS_CTL_RESET 0x80 /* Entire Chip soft reset */ +#define ENVY24_CCS_CTL_DMAINT 0x40 /* DS DMA Channel-C interrupt */ +#define ENVY24_CCS_CTL_DOSVOL 0x10 /* set the DOS WT volume control */ +#define ENVY24_CCS_CTL_EDGE 0x08 /* SERR# edge (only one PCI clock width) */ +#define ENVY24_CCS_CTL_SBINT 0x02 /* SERR# assertion for SB interrupt */ +#define ENVY24_CCS_CTL_NATIVE 0x01 /* Mode select: 0:SB mode 1:native mode */ -#define ENVY24_CCS_IMASK 0x01 /* Interrupt Mask Register */ +#define ENVY24_CCS_IMASK 0x01 /* Interrupt Mask Register */ #define ENVY24_CCS_IMASK_PMIDI 0x80 /* Primary MIDI */ #define ENVY24_CCS_IMASK_TIMER 0x40 /* Timer */ #define ENVY24_CCS_IMASK_SMIDI 0x20 /* Secondary MIDI */ -#define ENVY24_CCS_IMASK_PMT 0x10 /* Professional Multi-track */ -#define ENVY24_CCS_IMASK_FM 0x08 /* FM/MIDI trapping */ -#define ENVY24_CCS_IMASK_PDMA 0x04 /* Playback DS DMA */ -#define ENVY24_CCS_IMASK_RDMA 0x02 /* Consumer record DMA */ -#define ENVY24_CCS_IMASK_SB 0x01 /* Consumer/SB mode playback */ +#define ENVY24_CCS_IMASK_PMT 0x10 /* Professional Multi-track */ +#define ENVY24_CCS_IMASK_FM 0x08 /* FM/MIDI trapping */ +#define ENVY24_CCS_IMASK_PDMA 0x04 /* Playback DS DMA */ +#define ENVY24_CCS_IMASK_RDMA 0x02 /* Consumer record DMA */ +#define ENVY24_CCS_IMASK_SB 0x01 /* Consumer/SB mode playback */ -#define ENVY24_CCS_ISTAT 0x02 /* Interrupt Status Register */ +#define ENVY24_CCS_ISTAT 0x02 /* Interrupt Status Register */ #define ENVY24_CCS_ISTAT_PMIDI 0x80 /* Primary MIDI */ #define ENVY24_CCS_ISTAT_TIMER 0x40 /* Timer */ #define ENVY24_CCS_ISTAT_SMIDI 0x20 /* Secondary MIDI */ -#define ENVY24_CCS_ISTAT_PMT 0x10 /* Professional Multi-track */ -#define ENVY24_CCS_ISTAT_FM 0x08 /* FM/MIDI trapping */ -#define ENVY24_CCS_ISTAT_PDMA 0x04 /* Playback DS DMA */ -#define ENVY24_CCS_ISTAT_RDMA 0x02 /* Consumer record DMA */ -#define ENVY24_CCS_ISTAT_SB 0x01 /* Consumer/SB mode playback */ - -#define ENVY24_CCS_INDEX 0x03 /* Envy24 Index Register */ -#define ENVY24_CCS_DATA 0x04 /* Envy24 Data Register */ - -#define ENVY24_CCS_NMI1 0x05 /* NMI Status Register 1 */ -#define ENVY24_CCS_NMI1_PCI 0x80 /* PCI I/O read/write cycle */ -#define ENVY24_CCS_NMI1_SB 0x40 /* SB 22C/24C write */ -#define ENVY24_CCS_NMI1_SBDMA 0x10 /* SB interrupt (SB DMA/SB F2 command) */ -#define ENVY24_CCS_NMI1_DSDMA 0x08 /* DS channel C DMA interrupt */ -#define ENVY24_CCS_NMI1_MIDI 0x04 /* MIDI 330h or [PCI_10]h+Ch write */ -#define ENVY24_CCS_NMI1_FM 0x01 /* FM data register write */ - -#define ENVY24_CCS_NMIDAT 0x06 /* NMI Data Register */ -#define ENVY24_CCS_NMIIDX 0x07 /* NMI Index Register */ -#define ENVY24_CCS_AC97IDX 0x08 /* Consumer AC'97 Index Register */ - -#define ENVY24_CCS_AC97CMD 0x09 /* Consumer AC'97 Command/Status Register */ -#define ENVY24_CCS_AC97CMD_COLD 0x80 /* Cold reset */ -#define ENVY24_CCS_AC97CMD_WARM 0x40 /* Warm reset */ +#define ENVY24_CCS_ISTAT_PMT 0x10 /* Professional Multi-track */ +#define ENVY24_CCS_ISTAT_FM 0x08 /* FM/MIDI trapping */ +#define ENVY24_CCS_ISTAT_PDMA 0x04 /* Playback DS DMA */ +#define ENVY24_CCS_ISTAT_RDMA 0x02 /* Consumer record DMA */ +#define ENVY24_CCS_ISTAT_SB 0x01 /* Consumer/SB mode playback */ + +#define ENVY24_CCS_INDEX 0x03 /* Envy24 Index Register */ +#define ENVY24_CCS_DATA 0x04 /* Envy24 Data Register */ + +#define ENVY24_CCS_NMI1 0x05 /* NMI Status Register 1 */ +#define ENVY24_CCS_NMI1_PCI 0x80 /* PCI I/O read/write cycle */ +#define ENVY24_CCS_NMI1_SB 0x40 /* SB 22C/24C write */ +#define ENVY24_CCS_NMI1_SBDMA 0x10 /* SB interrupt (SB DMA/SB F2 command) */ +#define ENVY24_CCS_NMI1_DSDMA 0x08 /* DS channel C DMA interrupt */ +#define ENVY24_CCS_NMI1_MIDI 0x04 /* MIDI 330h or [PCI_10]h+Ch write */ +#define ENVY24_CCS_NMI1_FM 0x01 /* FM data register write */ + +#define ENVY24_CCS_NMIDAT 0x06 /* NMI Data Register */ +#define ENVY24_CCS_NMIIDX 0x07 /* NMI Index Register */ +#define ENVY24_CCS_AC97IDX 0x08 /* Consumer AC'97 Index Register */ + +#define ENVY24_CCS_AC97CMD 0x09 /* Consumer AC'97 Command/Status Register */ +#define ENVY24_CCS_AC97CMD_COLD 0x80 /* Cold reset */ +#define ENVY24_CCS_AC97CMD_WARM 0x40 /* Warm reset */ #define ENVY24_CCS_AC97CMD_WRCODEC 0x20 /* Write to AC'97 codec registers */ #define ENVY24_CCS_AC97CMD_RDCODEC 0x10 /* Read from AC'97 codec registers */ -#define ENVY24_CCS_AC97CMD_READY 0x08 /* AC'97 codec ready status bit */ -#define ENVY24_CCS_AC97CMD_PVSR 0x02 /* VSR for Playback */ -#define ENVY24_CCS_AC97CMD_RVSR 0x01 /* VSR for Record */ +#define ENVY24_CCS_AC97CMD_READY 0x08 /* AC'97 codec ready status bit */ +#define ENVY24_CCS_AC97CMD_PVSR 0x02 /* VSR for Playback */ +#define ENVY24_CCS_AC97CMD_RVSR 0x01 /* VSR for Record */ -#define ENVY24_CCS_AC97DAT 0x0a /* Consumer AC'97 Data Port Register */ +#define ENVY24_CCS_AC97DAT 0x0a /* Consumer AC'97 Data Port Register */ #define ENVY24_CCS_PMIDIDAT 0x0c /* Primary MIDI UART Data Register */ -#define ENVY24_CCS_PMIDICMD 0x0d /* Primary MIDI UART Command/Status Register */ +#define ENVY24_CCS_PMIDICMD 0x0d /* Primary MIDI UART Command/Status Register \ + */ -#define ENVY24_CCS_NMI2 0x0e /* NMI Status Register 2 */ +#define ENVY24_CCS_NMI2 0x0e /* NMI Status Register 2 */ #define ENVY24_CCS_NMI2_FMBANK 0x30 /* FM bank indicator */ -#define ENVY24_CCS_NMI2_FM0 0x10 /* FM bank 0 (388h/220h/228h) */ -#define ENVY24_CCS_NMI2_FM1 0x20 /* FM bank 1 (38ah/222h) */ -#define ENVY24_CCS_NMI2_PICIO 0x0f /* PIC I/O cycle */ +#define ENVY24_CCS_NMI2_FM0 0x10 /* FM bank 0 (388h/220h/228h) */ +#define ENVY24_CCS_NMI2_FM1 0x20 /* FM bank 1 (38ah/222h) */ +#define ENVY24_CCS_NMI2_PICIO 0x0f /* PIC I/O cycle */ #define ENVY24_CCS_NMI2_PIC20W 0x01 /* 20h write */ #define ENVY24_CCS_NMI2_PICA0W 0x02 /* a0h write */ #define ENVY24_CCS_NMI2_PIC21W 0x05 /* 21h write */ @@ -165,201 +166,222 @@ #define ENVY24_CCS_NMI2_PIC21R 0x0d /* 21h read */ #define ENVY24_CCS_NMI2_PICA1R 0x0e /* a1h read */ -#define ENVY24_CCS_JOY 0x0f /* Game port register */ +#define ENVY24_CCS_JOY 0x0f /* Game port register */ -#define ENVY24_CCS_I2CDEV 0x10 /* I2C Port Device Address Register */ +#define ENVY24_CCS_I2CDEV 0x10 /* I2C Port Device Address Register */ #define ENVY24_CCS_I2CDEV_ADDR 0xfe /* I2C device address */ -#define ENVY24_CCS_I2CDEV_ROM 0xa0 /* reserved for the external I2C E2PROM */ -#define ENVY24_CCS_I2CDEV_WR 0x01 /* write */ -#define ENVY24_CCS_I2CDEV_RD 0x00 /* read */ +#define ENVY24_CCS_I2CDEV_ROM 0xa0 /* reserved for the external I2C E2PROM */ +#define ENVY24_CCS_I2CDEV_WR 0x01 /* write */ +#define ENVY24_CCS_I2CDEV_RD 0x00 /* read */ -#define ENVY24_CCS_I2CADDR 0x11 /* I2C Port Byte Address Register */ -#define ENVY24_CCS_I2CDATA 0x12 /* I2C Port Read/Write Data Register */ +#define ENVY24_CCS_I2CADDR 0x11 /* I2C Port Byte Address Register */ +#define ENVY24_CCS_I2CDATA 0x12 /* I2C Port Read/Write Data Register */ -#define ENVY24_CCS_I2CSTAT 0x13 /* I2C Port Control and Status Register */ +#define ENVY24_CCS_I2CSTAT 0x13 /* I2C Port Control and Status Register */ #define ENVY24_CCS_I2CSTAT_ROM 0x80 /* external E2PROM exists */ #define ENVY24_CCS_I2CSTAT_BSY 0x01 /* I2C port read/write status busy */ -#define ENVY24_CCS_CDMABASE 0x14 /* Consumer Record DMA Current/Base Address Register */ -#define ENVY24_CCS_CDMACNT 0x18 /* Consumer Record DMA Current/Base Count Register */ -#define ENVY24_CCS_SERR 0x1b /* PCI Configuration SERR# Shadow Register */ +#define ENVY24_CCS_CDMABASE \ + 0x14 /* Consumer Record DMA Current/Base Address Register */ +#define ENVY24_CCS_CDMACNT \ + 0x18 /* Consumer Record DMA Current/Base Count Register */ +#define ENVY24_CCS_SERR 0x1b /* PCI Configuration SERR# Shadow Register */ #define ENVY24_CCS_SMIDIDAT 0x1c /* Secondary MIDI UART Data Register */ -#define ENVY24_CCS_SMIDICMD 0x1d /* Secondary MIDI UART Command/Status Register */ +#define ENVY24_CCS_SMIDICMD \ + 0x1d /* Secondary MIDI UART Command/Status Register */ -#define ENVY24_CCS_TIMER 0x1e /* Timer Register */ -#define ENVY24_CCS_TIMER_EN 0x8000 /* Timer count enable */ -#define ENVY24_CCS_TIMER_MASK 0x7fff /* Timer counter mask */ +#define ENVY24_CCS_TIMER 0x1e /* Timer Register */ +#define ENVY24_CCS_TIMER_EN 0x8000 /* Timer count enable */ +#define ENVY24_CCS_TIMER_MASK 0x7fff /* Timer counter mask */ /* Controller Indexed Registers */ -#define ENVY24_CCI_PTCHIGH 0x00 /* Playback Terminal Count Register (High Byte) */ -#define ENVY24_CCI_PTCLOW 0x01 /* Playback Terminal Count Register (Low Byte) */ +#define ENVY24_CCI_PTCHIGH \ + 0x00 /* Playback Terminal Count Register (High Byte) */ +#define ENVY24_CCI_PTCLOW 0x01 /* Playback Terminal Count Register (Low Byte) \ + */ -#define ENVY24_CCI_PCTL 0x02 /* Playback Control Register */ -#define ENVY24_CCI_PCTL_TURBO 0x80 /* 4x up sampling in the host by software */ -#define ENVY24_CCI_PCTL_U8 0x10 /* 8 bits unsigned */ -#define ENVY24_CCI_PCTL_S16 0x00 /* 16 bits signed */ +#define ENVY24_CCI_PCTL 0x02 /* Playback Control Register */ +#define ENVY24_CCI_PCTL_TURBO 0x80 /* 4x up sampling in the host by software \ + */ +#define ENVY24_CCI_PCTL_U8 0x10 /* 8 bits unsigned */ +#define ENVY24_CCI_PCTL_S16 0x00 /* 16 bits signed */ #define ENVY24_CCI_PCTL_STEREO 0x08 /* stereo */ -#define ENVY24_CCI_PCTL_MONO 0x00 /* mono */ -#define ENVY24_CCI_PCTL_FLUSH 0x04 /* FIFO flush (sticky bit. Requires toggling) */ -#define ENVY24_CCI_PCTL_PAUSE 0x02 /* Pause */ +#define ENVY24_CCI_PCTL_MONO 0x00 /* mono */ +#define ENVY24_CCI_PCTL_FLUSH \ + 0x04 /* FIFO flush (sticky bit. Requires toggling) */ +#define ENVY24_CCI_PCTL_PAUSE 0x02 /* Pause */ #define ENVY24_CCI_PCTL_ENABLE 0x01 /* Playback enable */ -#define ENVY24_CCI_PLVOL 0x03 /* Playback Left Volume/Pan Register */ -#define ENVY24_CCI_PRVOL 0x04 /* Playback Right Volume/Pan Register */ -#define ENVY24_CCI_VOL_MASK 0x3f /* Volume value mask */ - -#define ENVY24_CCI_SOFTVOL 0x05 /* Soft Volume/Mute Control Register */ -#define ENVY24_CCI_PSRLOW 0x06 /* Playback Sampling Rate Register (Low Byte) */ -#define ENVY24_CCI_PSRMID 0x07 /* Playback Sampling Rate Register (Middle Byte) */ -#define ENVY24_CCI_PSRHIGH 0x08 /* Playback Sampling Rate Register (High Byte) */ -#define ENVY24_CCI_RTCHIGH 0x10 /* Record Terminal Count Register (High Byte) */ -#define ENVY24_CCI_RTCLOW 0x11 /* Record Terminal Count Register (Low Byte) */ - -#define ENVY24_CCI_RCTL 0x12 /* Record Control Register */ -#define ENVY24_CCI_RCTL_DRTN 0x80 /* Digital return enable */ -#define ENVY24_CCI_RCTL_U8 0x04 /* 8 bits unsigned */ -#define ENVY24_CCI_RCTL_S16 0x00 /* 16 bits signed */ +#define ENVY24_CCI_PLVOL 0x03 /* Playback Left Volume/Pan Register */ +#define ENVY24_CCI_PRVOL 0x04 /* Playback Right Volume/Pan Register */ +#define ENVY24_CCI_VOL_MASK 0x3f /* Volume value mask */ + +#define ENVY24_CCI_SOFTVOL 0x05 /* Soft Volume/Mute Control Register */ +#define ENVY24_CCI_PSRLOW 0x06 /* Playback Sampling Rate Register (Low Byte) \ + */ +#define ENVY24_CCI_PSRMID \ + 0x07 /* Playback Sampling Rate Register (Middle Byte) */ +#define ENVY24_CCI_PSRHIGH \ + 0x08 /* Playback Sampling Rate Register (High Byte) */ +#define ENVY24_CCI_RTCHIGH 0x10 /* Record Terminal Count Register (High Byte) \ + */ +#define ENVY24_CCI_RTCLOW 0x11 /* Record Terminal Count Register (Low Byte) */ + +#define ENVY24_CCI_RCTL 0x12 /* Record Control Register */ +#define ENVY24_CCI_RCTL_DRTN 0x80 /* Digital return enable */ +#define ENVY24_CCI_RCTL_U8 0x04 /* 8 bits unsigned */ +#define ENVY24_CCI_RCTL_S16 0x00 /* 16 bits signed */ #define ENVY24_CCI_RCTL_STEREO 0x00 /* stereo */ -#define ENVY24_CCI_RCTL_MONO 0x02 /* mono */ +#define ENVY24_CCI_RCTL_MONO 0x02 /* mono */ #define ENVY24_CCI_RCTL_ENABLE 0x01 /* Record enable */ -#define ENVY24_CCI_GPIODAT 0x20 /* GPIO Data Register */ +#define ENVY24_CCI_GPIODAT 0x20 /* GPIO Data Register */ #define ENVY24_CCI_GPIOMASK 0x21 /* GPIO Write Mask Register */ -#define ENVY24_CCI_GPIOCTL 0x22 /* GPIO Direction Control Register */ -#define ENVY24_CCI_GPIO_OUT 1 /* output */ -#define ENVY24_CCI_GPIO_IN 0 /* input */ - -#define ENVY24_CCI_CPDWN 0x30 /* Consumer Section Power Down Register */ -#define ENVY24_CCI_CPDWN_XTAL 0x80 /* Crystal clock generation power down for XTAL_1 */ -#define ENVY24_CCI_CPDWN_GAME 0x40 /* Game port analog power down */ -#define ENVY24_CCI_CPDWN_I2C 0x10 /* I2C port clock */ -#define ENVY24_CCI_CPDWN_MIDI 0x08 /* MIDI clock */ -#define ENVY24_CCI_CPDWN_AC97 0x04 /* AC'97 clock */ -#define ENVY24_CCI_CPDWN_DS 0x02 /* DS Block clock */ -#define ENVY24_CCI_CPDWN_PCI 0x01 /* PCI clock for SB, DMA controller */ - -#define ENVY24_CCI_MTPDWN 0x31 /* Multi-Track Section Power Down Register */ -#define ENVY24_CCI_MTPDWN_XTAL 0x80 /* Crystal clock generation power down for XTAL_2 */ +#define ENVY24_CCI_GPIOCTL 0x22 /* GPIO Direction Control Register */ +#define ENVY24_CCI_GPIO_OUT 1 /* output */ +#define ENVY24_CCI_GPIO_IN 0 /* input */ + +#define ENVY24_CCI_CPDWN 0x30 /* Consumer Section Power Down Register */ +#define ENVY24_CCI_CPDWN_XTAL \ + 0x80 /* Crystal clock generation power down for XTAL_1 */ +#define ENVY24_CCI_CPDWN_GAME 0x40 /* Game port analog power down */ +#define ENVY24_CCI_CPDWN_I2C 0x10 /* I2C port clock */ +#define ENVY24_CCI_CPDWN_MIDI 0x08 /* MIDI clock */ +#define ENVY24_CCI_CPDWN_AC97 0x04 /* AC'97 clock */ +#define ENVY24_CCI_CPDWN_DS 0x02 /* DS Block clock */ +#define ENVY24_CCI_CPDWN_PCI 0x01 /* PCI clock for SB, DMA controller */ + +#define ENVY24_CCI_MTPDWN 0x31 /* Multi-Track Section Power Down Register */ +#define ENVY24_CCI_MTPDWN_XTAL \ + 0x80 /* Crystal clock generation power down for XTAL_2 */ #define ENVY24_CCI_MTPDWN_SPDIF 0x04 /* S/PDIF clock */ -#define ENVY24_CCI_MTPDWN_MIX 0x02 /* Professional digital mixer clock */ -#define ENVY24_CCI_MTPDWN_I2S 0x01 /* Multi-track I2S serial interface clock */ +#define ENVY24_CCI_MTPDWN_MIX 0x02 /* Professional digital mixer clock */ +#define ENVY24_CCI_MTPDWN_I2S 0x01 /* Multi-track I2S serial interface clock \ + */ /* DDMA Registers */ -#define ENVY24_DDMA_ADDR0 0x00 /* DMA Base and Current Address bit 0-7 */ -#define ENVY24_DDMA_ADDR8 0x01 /* DMA Base and Current Address bit 8-15 */ +#define ENVY24_DDMA_ADDR0 0x00 /* DMA Base and Current Address bit 0-7 */ +#define ENVY24_DDMA_ADDR8 0x01 /* DMA Base and Current Address bit 8-15 */ #define ENVY24_DDMA_ADDR16 0x02 /* DMA Base and Current Address bit 16-23 */ #define ENVY24_DDMA_ADDR24 0x03 /* DMA Base and Current Address bit 24-31 */ -#define ENVY24_DDMA_CNT0 0x04 /* DMA Base and Current Count 0-7 */ -#define ENVY24_DDMA_CNT8 0x05 /* DMA Base and Current Count 8-15 */ -#define ENVY24_DDMA_CNT16 0x06 /* (not supported) */ -#define ENVY24_DDMA_CMD 0x08 /* Status and Command */ -#define ENVY24_DDMA_MODE 0x0b /* Mode */ -#define ENVY24_DDMA_RESET 0x0c /* Master reset */ -#define ENVY24_DDMA_CHAN 0x0f /* Channel Mask */ +#define ENVY24_DDMA_CNT0 0x04 /* DMA Base and Current Count 0-7 */ +#define ENVY24_DDMA_CNT8 0x05 /* DMA Base and Current Count 8-15 */ +#define ENVY24_DDMA_CNT16 0x06 /* (not supported) */ +#define ENVY24_DDMA_CMD 0x08 /* Status and Command */ +#define ENVY24_DDMA_MODE 0x0b /* Mode */ +#define ENVY24_DDMA_RESET 0x0c /* Master reset */ +#define ENVY24_DDMA_CHAN 0x0f /* Channel Mask */ /* Consumer Section DMA Channel Registers */ -#define ENVY24_CS_INTMASK 0x00 /* DirectSound DMA Interrupt Mask Register */ -#define ENVY24_CS_INTSTAT 0x02 /* DirectSound DMA Interrupt Status Register */ -#define ENVY24_CS_CHDAT 0x04 /* Channel Data register */ +#define ENVY24_CS_INTMASK 0x00 /* DirectSound DMA Interrupt Mask Register */ +#define ENVY24_CS_INTSTAT 0x02 /* DirectSound DMA Interrupt Status Register */ +#define ENVY24_CS_CHDAT 0x04 /* Channel Data register */ -#define ENVY24_CS_CHIDX 0x08 /* Channel Index Register */ -#define ENVY24_CS_CHIDX_NUM 0xf0 /* Channel number */ +#define ENVY24_CS_CHIDX 0x08 /* Channel Index Register */ +#define ENVY24_CS_CHIDX_NUM 0xf0 /* Channel number */ #define ENVY24_CS_CHIDX_ADDR0 0x00 /* Buffer_0 DMA base address */ -#define ENVY24_CS_CHIDX_CNT0 0x01 /* Buffer_0 DMA base count */ +#define ENVY24_CS_CHIDX_CNT0 0x01 /* Buffer_0 DMA base count */ #define ENVY24_CS_CHIDX_ADDR1 0x02 /* Buffer_1 DMA base address */ -#define ENVY24_CS_CHIDX_CNT1 0x03 /* Buffer_1 DMA base count */ -#define ENVY24_CS_CHIDX_CTL 0x04 /* Channel Control and Status register */ -#define ENVY24_CS_CHIDX_RATE 0x05 /* Channel Sampling Rate */ -#define ENVY24_CS_CHIDX_VOL 0x06 /* Channel left and right volume/pan control */ +#define ENVY24_CS_CHIDX_CNT1 0x03 /* Buffer_1 DMA base count */ +#define ENVY24_CS_CHIDX_CTL 0x04 /* Channel Control and Status register */ +#define ENVY24_CS_CHIDX_RATE 0x05 /* Channel Sampling Rate */ +#define ENVY24_CS_CHIDX_VOL 0x06 /* Channel left and right volume/pan control \ + */ /* Channel Control and Status Register at Index 4h */ -#define ENVY24_CS_CTL_BUF 0x80 /* indicating that the current active buffer */ -#define ENVY24_CS_CTL_AUTO1 0x40 /* Buffer_1 auto init. enable */ -#define ENVY24_CS_CTL_AUTO0 0x20 /* Buffer_0 auto init. enable */ -#define ENVY24_CS_CTL_FLUSH 0x10 /* Flush FIFO */ -#define ENVY24_CS_CTL_STEREO 0x08 /* stereo(or mono) */ -#define ENVY24_CS_CTL_U8 0x04 /* 8-bit unsigned(or 16-bit signed) */ -#define ENVY24_CS_CTL_PAUSE 0x02 /* DMA request 1:pause */ -#define ENVY24_CS_CTL_START 0x01 /* DMA request 1: start, 0:stop */ +#define ENVY24_CS_CTL_BUF 0x80 /* indicating that the current active buffer */ +#define ENVY24_CS_CTL_AUTO1 0x40 /* Buffer_1 auto init. enable */ +#define ENVY24_CS_CTL_AUTO0 0x20 /* Buffer_0 auto init. enable */ +#define ENVY24_CS_CTL_FLUSH 0x10 /* Flush FIFO */ +#define ENVY24_CS_CTL_STEREO 0x08 /* stereo(or mono) */ +#define ENVY24_CS_CTL_U8 0x04 /* 8-bit unsigned(or 16-bit signed) */ +#define ENVY24_CS_CTL_PAUSE 0x02 /* DMA request 1:pause */ +#define ENVY24_CS_CTL_START 0x01 /* DMA request 1: start, 0:stop */ /* Consumer mode Left/Right Volume Register at Index 06h */ -#define ENVY24_CS_VOL_RIGHT 0x3f00 -#define ENVY24_CS_VOL_LEFT 0x003f +#define ENVY24_CS_VOL_RIGHT 0x3f00 +#define ENVY24_CS_VOL_LEFT 0x003f /* Professional Multi-Track Control Registers */ -#define ENVY24_MT_INT 0x00 /* DMA Interrupt Mask and Status Register */ -#define ENVY24_MT_INT_RMASK 0x80 /* Multi-track record interrupt mask */ -#define ENVY24_MT_INT_PMASK 0x40 /* Multi-track playback interrupt mask */ -#define ENVY24_MT_INT_RSTAT 0x02 /* Multi-track record interrupt status */ -#define ENVY24_MT_INT_PSTAT 0x01 /* Multi-track playback interrupt status */ - -#define ENVY24_MT_RATE 0x01 /* Sampling Rate Select Register */ -#define ENVY24_MT_RATE_SPDIF 0x10 /* S/PDIF input clock as the master */ -#define ENVY24_MT_RATE_48000 0x00 -#define ENVY24_MT_RATE_24000 0x01 -#define ENVY24_MT_RATE_12000 0x02 -#define ENVY24_MT_RATE_9600 0x03 -#define ENVY24_MT_RATE_32000 0x04 -#define ENVY24_MT_RATE_16000 0x05 -#define ENVY24_MT_RATE_8000 0x06 -#define ENVY24_MT_RATE_96000 0x07 -#define ENVY24_MT_RATE_64000 0x0f -#define ENVY24_MT_RATE_44100 0x08 -#define ENVY24_MT_RATE_22050 0x09 -#define ENVY24_MT_RATE_11025 0x0a -#define ENVY24_MT_RATE_88200 0x0b -#define ENVY24_MT_RATE_MASK 0x0f - -#define ENVY24_MT_I2S 0x02 /* I2S Data Format Register */ -#define ENVY24_MT_I2S_MLR128 0x08 /* MCLK/LRCLK ratio 128x(or 256x) */ -#define ENVY24_MT_I2S_SLR48 0x04 /* SCLK/LRCLK ratio 48bpf(or 64bpf) */ -#define ENVY24_MT_I2S_FORM 0x00 /* I2S data format */ - -#define ENVY24_MT_AC97IDX 0x04 /* Index Register for AC'97 Codecs */ - -#define ENVY24_MT_AC97CMD 0x05 /* Command and Status Register for AC'97 Codecs */ +#define ENVY24_MT_INT 0x00 /* DMA Interrupt Mask and Status Register */ +#define ENVY24_MT_INT_RMASK 0x80 /* Multi-track record interrupt mask */ +#define ENVY24_MT_INT_PMASK 0x40 /* Multi-track playback interrupt mask */ +#define ENVY24_MT_INT_RSTAT 0x02 /* Multi-track record interrupt status */ +#define ENVY24_MT_INT_PSTAT 0x01 /* Multi-track playback interrupt status */ + +#define ENVY24_MT_RATE 0x01 /* Sampling Rate Select Register */ +#define ENVY24_MT_RATE_SPDIF 0x10 /* S/PDIF input clock as the master */ +#define ENVY24_MT_RATE_48000 0x00 +#define ENVY24_MT_RATE_24000 0x01 +#define ENVY24_MT_RATE_12000 0x02 +#define ENVY24_MT_RATE_9600 0x03 +#define ENVY24_MT_RATE_32000 0x04 +#define ENVY24_MT_RATE_16000 0x05 +#define ENVY24_MT_RATE_8000 0x06 +#define ENVY24_MT_RATE_96000 0x07 +#define ENVY24_MT_RATE_64000 0x0f +#define ENVY24_MT_RATE_44100 0x08 +#define ENVY24_MT_RATE_22050 0x09 +#define ENVY24_MT_RATE_11025 0x0a +#define ENVY24_MT_RATE_88200 0x0b +#define ENVY24_MT_RATE_MASK 0x0f + +#define ENVY24_MT_I2S 0x02 /* I2S Data Format Register */ +#define ENVY24_MT_I2S_MLR128 0x08 /* MCLK/LRCLK ratio 128x(or 256x) */ +#define ENVY24_MT_I2S_SLR48 0x04 /* SCLK/LRCLK ratio 48bpf(or 64bpf) */ +#define ENVY24_MT_I2S_FORM 0x00 /* I2S data format */ + +#define ENVY24_MT_AC97IDX 0x04 /* Index Register for AC'97 Codecs */ + +#define ENVY24_MT_AC97CMD \ + 0x05 /* Command and Status Register for AC'97 Codecs */ #define ENVY24_MT_AC97CMD_CLD 0x80 /* Cold reset */ #define ENVY24_MT_AC97CMD_WRM 0x40 /* Warm reset */ -#define ENVY24_MT_AC97CMD_WR 0x20 /* write to AC'97 codec register */ -#define ENVY24_MT_AC97CMD_RD 0x10 /* read AC'97 CODEC register */ +#define ENVY24_MT_AC97CMD_WR 0x20 /* write to AC'97 codec register */ +#define ENVY24_MT_AC97CMD_RD 0x10 /* read AC'97 CODEC register */ #define ENVY24_MT_AC97CMD_RDY 0x08 /* AC'97 codec ready status bit */ -#define ENVY24_MT_AC97CMD_ID 0x03 /* ID(0-3) for external AC 97 registers */ - -#define ENVY24_MT_AC97DLO 0x06 /* AC'97 codec register data low byte */ -#define ENVY24_MT_AC97DHI 0x07 /* AC'97 codec register data high byte */ -#define ENVY24_MT_PADDR 0x10 /* Playback DMA Current/Base Address Register */ -#define ENVY24_MT_PCNT 0x14 /* Playback DMA Current/Base Count Register */ -#define ENVY24_MT_PTERM 0x16 /* Playback Current/Base Terminal Count Register */ -#define ENVY24_MT_PCTL 0x18 /* Playback and Record Control Register */ +#define ENVY24_MT_AC97CMD_ID 0x03 /* ID(0-3) for external AC 97 registers */ + +#define ENVY24_MT_AC97DLO 0x06 /* AC'97 codec register data low byte */ +#define ENVY24_MT_AC97DHI 0x07 /* AC'97 codec register data high byte */ +#define ENVY24_MT_PADDR 0x10 /* Playback DMA Current/Base Address Register */ +#define ENVY24_MT_PCNT 0x14 /* Playback DMA Current/Base Count Register */ +#define ENVY24_MT_PTERM 0x16 /* Playback Current/Base Terminal Count Register \ + */ +#define ENVY24_MT_PCTL 0x18 /* Playback and Record Control Register */ #define ENVY24_MT_PCTL_RSTART 0x04 /* 1: Record start; 0: Record stop */ -#define ENVY24_MT_PCTL_PAUSE 0x02 /* 1: Pause; 0: Resume */ +#define ENVY24_MT_PCTL_PAUSE 0x02 /* 1: Pause; 0: Resume */ #define ENVY24_MT_PCTL_PSTART 0x01 /* 1: Playback start; 0: Playback stop */ -#define ENVY24_MT_RADDR 0x20 /* Record DMA Current/Base Address Register */ -#define ENVY24_MT_RCNT 0x24 /* Record DMA Current/Base Count Register */ -#define ENVY24_MT_RTERM 0x26 /* Record Current/Base Terminal Count Register */ -#define ENVY24_MT_RCTL 0x28 /* Record Control Register */ +#define ENVY24_MT_RADDR 0x20 /* Record DMA Current/Base Address Register */ +#define ENVY24_MT_RCNT 0x24 /* Record DMA Current/Base Count Register */ +#define ENVY24_MT_RTERM 0x26 /* Record Current/Base Terminal Count Register */ +#define ENVY24_MT_RCTL 0x28 /* Record Control Register */ #define ENVY24_MT_RCTL_RSTART 0x01 /* 1: Record start; 0: Record stop */ -#define ENVY24_MT_PSDOUT 0x30 /* Routing Control Register for Data to PSDOUT[0:3] */ -#define ENVY24_MT_SPDOUT 0x32 /* Routing Control Register for SPDOUT */ -#define ENVY24_MT_RECORD 0x34 /* Captured (Recorded) data Routing Selection Register */ +#define ENVY24_MT_PSDOUT \ + 0x30 /* Routing Control Register for Data to PSDOUT[0:3] */ +#define ENVY24_MT_SPDOUT 0x32 /* Routing Control Register for SPDOUT */ +#define ENVY24_MT_RECORD \ + 0x34 /* Captured (Recorded) data Routing Selection Register */ -#define BUS_SPACE_MAXADDR_ENVY24 0x0fffffff /* Address space beyond 256MB is not supported */ +#define BUS_SPACE_MAXADDR_ENVY24 \ + 0x0fffffff /* Address space beyond 256MB is not supported */ #define BUS_SPACE_MAXSIZE_ENVY24 0x3fffc /* 64k x 4byte(1dword) */ -#define ENVY24_MT_VOLUME 0x38 /* Left/Right Volume Control Data Register */ -#define ENVY24_MT_VOLUME_L 0x007f /* Left Volume Mask */ -#define ENVY24_MT_VOLUME_R 0x7f00 /* Right Volume Mask */ +#define ENVY24_MT_VOLUME 0x38 /* Left/Right Volume Control Data Register */ +#define ENVY24_MT_VOLUME_L 0x007f /* Left Volume Mask */ +#define ENVY24_MT_VOLUME_R 0x7f00 /* Right Volume Mask */ -#define ENVY24_MT_VOLIDX 0x3a /* Volume Control Stream Index Register */ -#define ENVY24_MT_VOLRATE 0x3b /* Volume Control Rate Register */ -#define ENVY24_MT_MONAC97 0x3c /* Digital Mixer Monitor Routing Control Register */ -#define ENVY24_MT_PEAKIDX 0x3e /* Peak Meter Index Register */ -#define ENVY24_MT_PEAKDAT 0x3f /* Peak Meter Data Register */ +#define ENVY24_MT_VOLIDX 0x3a /* Volume Control Stream Index Register */ +#define ENVY24_MT_VOLRATE 0x3b /* Volume Control Rate Register */ +#define ENVY24_MT_MONAC97 \ + 0x3c /* Digital Mixer Monitor Routing Control Register */ +#define ENVY24_MT_PEAKIDX 0x3e /* Peak Meter Index Register */ +#define ENVY24_MT_PEAKDAT 0x3f /* Peak Meter Data Register */ /* -------------------------------------------------------------------- */ @@ -369,26 +391,26 @@ able to use for this. If system has consumer AC'97 output, AC'97 line is used as master mixer, and it is able to control. */ -#define ENVY24_CHAN_NUM 11 /* Play * 5 + Record * 5 + Mix * 1 */ +#define ENVY24_CHAN_NUM 11 /* Play * 5 + Record * 5 + Mix * 1 */ -#define ENVY24_CHAN_PLAY_DAC1 0 -#define ENVY24_CHAN_PLAY_DAC2 1 -#define ENVY24_CHAN_PLAY_DAC3 2 -#define ENVY24_CHAN_PLAY_DAC4 3 +#define ENVY24_CHAN_PLAY_DAC1 0 +#define ENVY24_CHAN_PLAY_DAC2 1 +#define ENVY24_CHAN_PLAY_DAC3 2 +#define ENVY24_CHAN_PLAY_DAC4 3 #define ENVY24_CHAN_PLAY_SPDIF 4 -#define ENVY24_CHAN_REC_ADC1 5 -#define ENVY24_CHAN_REC_ADC2 6 -#define ENVY24_CHAN_REC_ADC3 7 -#define ENVY24_CHAN_REC_ADC4 8 -#define ENVY24_CHAN_REC_SPDIF 9 -#define ENVY24_CHAN_REC_MIX 10 - -#define ENVY24_MIX_MASK 0x3ff +#define ENVY24_CHAN_REC_ADC1 5 +#define ENVY24_CHAN_REC_ADC2 6 +#define ENVY24_CHAN_REC_ADC3 7 +#define ENVY24_CHAN_REC_ADC4 8 +#define ENVY24_CHAN_REC_SPDIF 9 +#define ENVY24_CHAN_REC_MIX 10 + +#define ENVY24_MIX_MASK 0x3ff #define ENVY24_MIX_REC_MASK 0x3e0 /* volume value constants */ -#define ENVY24_VOL_MAX 0 /* 0db(negate) */ -#define ENVY24_VOL_MIN 96 /* -144db(negate) */ +#define ENVY24_VOL_MAX 0 /* 0db(negate) */ +#define ENVY24_VOL_MIN 96 /* -144db(negate) */ #define ENVY24_VOL_MUTE 127 /* mute */ /* -------------------------------------------------------------------- */ @@ -403,7 +425,7 @@ 2: output data classes a. direct output from DMA b. MIXER output which mixed the DMA outputs and input channels - (NOTICE: this class is able to set only DAC-1 and S/PDIF output) + (NOTICE: this class is able to set only DAC-1 and S/PDIF output) c. direct input from ADC d. direct input from S/PDIF 3: input ADC channel selection(when 2:c. is selected) @@ -413,26 +435,26 @@ pattern(ex. route different ADC input to one DAC). But almost case this is enough to use. */ -#define ENVY24_ROUTE_DAC_1 0 -#define ENVY24_ROUTE_DAC_2 1 -#define ENVY24_ROUTE_DAC_3 2 -#define ENVY24_ROUTE_DAC_4 3 -#define ENVY24_ROUTE_DAC_SPDIF 4 - -#define ENVY24_ROUTE_CLASS_DMA 0 -#define ENVY24_ROUTE_CLASS_MIX 1 -#define ENVY24_ROUTE_CLASS_ADC 2 +#define ENVY24_ROUTE_DAC_1 0 +#define ENVY24_ROUTE_DAC_2 1 +#define ENVY24_ROUTE_DAC_3 2 +#define ENVY24_ROUTE_DAC_4 3 +#define ENVY24_ROUTE_DAC_SPDIF 4 + +#define ENVY24_ROUTE_CLASS_DMA 0 +#define ENVY24_ROUTE_CLASS_MIX 1 +#define ENVY24_ROUTE_CLASS_ADC 2 #define ENVY24_ROUTE_CLASS_SPDIF 3 -#define ENVY24_ROUTE_ADC_1 0 -#define ENVY24_ROUTE_ADC_2 1 -#define ENVY24_ROUTE_ADC_3 2 -#define ENVY24_ROUTE_ADC_4 3 +#define ENVY24_ROUTE_ADC_1 0 +#define ENVY24_ROUTE_ADC_2 1 +#define ENVY24_ROUTE_ADC_3 2 +#define ENVY24_ROUTE_ADC_4 3 -#define ENVY24_ROUTE_NORMAL 0 -#define ENVY24_ROUTE_REVERSE 1 -#define ENVY24_ROUTE_LEFT 0 -#define ENVY24_ROUTE_RIGHT 1 +#define ENVY24_ROUTE_NORMAL 0 +#define ENVY24_ROUTE_REVERSE 1 +#define ENVY24_ROUTE_LEFT 0 +#define ENVY24_ROUTE_RIGHT 1 /* -------------------------------------------------------------------- */ @@ -440,40 +462,41 @@ These map values are refferd from ALSA sound driver. */ /* ENVY24 configuration E2PROM map */ -#define ENVY24_E2PROM_SUBVENDOR 0x00 -#define ENVY24_E2PROM_SUBDEVICE 0x02 -#define ENVY24_E2PROM_SIZE 0x04 -#define ENVY24_E2PROM_VERSION 0x05 -#define ENVY24_E2PROM_SCFG 0x06 -#define ENVY24_E2PROM_ACL 0x07 -#define ENVY24_E2PROM_I2S 0x08 -#define ENVY24_E2PROM_SPDIF 0x09 -#define ENVY24_E2PROM_GPIOMASK 0x0a -#define ENVY24_E2PROM_GPIOSTATE 0x0b -#define ENVY24_E2PROM_GPIODIR 0x0c -#define ENVY24_E2PROM_AC97MAIN 0x0d -#define ENVY24_E2PROM_AC97PCM 0x0f -#define ENVY24_E2PROM_AC97REC 0x11 +#define ENVY24_E2PROM_SUBVENDOR 0x00 +#define ENVY24_E2PROM_SUBDEVICE 0x02 +#define ENVY24_E2PROM_SIZE 0x04 +#define ENVY24_E2PROM_VERSION 0x05 +#define ENVY24_E2PROM_SCFG 0x06 +#define ENVY24_E2PROM_ACL 0x07 +#define ENVY24_E2PROM_I2S 0x08 +#define ENVY24_E2PROM_SPDIF 0x09 +#define ENVY24_E2PROM_GPIOMASK 0x0a +#define ENVY24_E2PROM_GPIOSTATE 0x0b +#define ENVY24_E2PROM_GPIODIR 0x0c +#define ENVY24_E2PROM_AC97MAIN 0x0d +#define ENVY24_E2PROM_AC97PCM 0x0f +#define ENVY24_E2PROM_AC97REC 0x11 #define ENVY24_E2PROM_AC97RECSRC 0x13 -#define ENVY24_E2PROM_DACID 0x14 -#define ENVY24_E2PROM_ADCID 0x18 -#define ENVY24_E2PROM_EXTRA 0x1c +#define ENVY24_E2PROM_DACID 0x14 +#define ENVY24_E2PROM_ADCID 0x18 +#define ENVY24_E2PROM_EXTRA 0x1c /* GPIO connect map of M-Audio Delta series */ -#define ENVY24_GPIO_CS84X4_PRO 0x01 +#define ENVY24_GPIO_CS84X4_PRO 0x01 #define ENVY24_GPIO_CS8414_STATUS 0x02 -#define ENVY24_GPIO_CS84X4_CLK 0x04 -#define ENVY24_GPIO_CS84X4_DATA 0x08 -#define ENVY24_GPIO_AK4524_CDTI 0x10 /* this value is duplicated to input select */ -#define ENVY24_GPIO_AK4524_CCLK 0x20 -#define ENVY24_GPIO_AK4524_CS0 0x40 -#define ENVY24_GPIO_AK4524_CS1 0x80 +#define ENVY24_GPIO_CS84X4_CLK 0x04 +#define ENVY24_GPIO_CS84X4_DATA 0x08 +#define ENVY24_GPIO_AK4524_CDTI \ + 0x10 /* this value is duplicated to input select */ +#define ENVY24_GPIO_AK4524_CCLK 0x20 +#define ENVY24_GPIO_AK4524_CS0 0x40 +#define ENVY24_GPIO_AK4524_CS1 0x80 /* M-Audio Delta series S/PDIF(CS84[01]4) control pin values */ -#define ENVY24_CS8404_PRO_RATE 0x18 -#define ENVY24_CS8404_PRO_RATE32 0x00 +#define ENVY24_CS8404_PRO_RATE 0x18 +#define ENVY24_CS8404_PRO_RATE32 0x00 #define ENVY24_CS8404_PRO_RATE441 0x10 -#define ENVY24_CS8404_PRO_RATE48 0x08 +#define ENVY24_CS8404_PRO_RATE48 0x08 /* M-Audio Delta series parameter */ #define ENVY24_DELTA_AK4524_CIF 0 @@ -481,14 +504,14 @@ #define I2C_DELAY 1000 /* PCA9554 registers */ -#define PCA9554_I2CDEV 0x40 /* I2C device address */ -#define PCA9554_IN 0x00 /* input port */ -#define PCA9554_OUT 0x01 /* output port */ -#define PCA9554_INVERT 0x02 /* polarity invert */ -#define PCA9554_DIR 0x03 /* port directions */ +#define PCA9554_I2CDEV 0x40 /* I2C device address */ +#define PCA9554_IN 0x00 /* input port */ +#define PCA9554_OUT 0x01 /* output port */ +#define PCA9554_INVERT 0x02 /* polarity invert */ +#define PCA9554_DIR 0x03 /* port directions */ /* PCF8574 registers */ -#define PCF8574_I2CDEV_DAC 0x48 -#define PCF8574_SENSE_MASK 0x40 +#define PCF8574_I2CDEV_DAC 0x48 +#define PCF8574_SENSE_MASK 0x40 /* end of file */ Index: sys/dev/sound/pci/envy24.c =================================================================== --- sys/dev/sound/pci/envy24.c +++ sys/dev/sound/pci/envy24.c @@ -31,13 +31,12 @@ #include "opt_snd.h" #endif -#include -#include -#include -#include - #include #include +#include +#include +#include +#include #include "mixer_if.h" @@ -50,12 +49,12 @@ #define ENVY24_PLAY_CHNUM 10 #define ENVY24_REC_CHNUM 12 #define ENVY24_PLAY_BUFUNIT (4 /* byte/sample */ * 10 /* channel */) -#define ENVY24_REC_BUFUNIT (4 /* byte/sample */ * 12 /* channel */) -#define ENVY24_SAMPLE_NUM 4096 +#define ENVY24_REC_BUFUNIT (4 /* byte/sample */ * 12 /* channel */) +#define ENVY24_SAMPLE_NUM 4096 #define ENVY24_TIMEOUT 1000 -#define ENVY24_DEFAULT_FORMAT SND_FORMAT(AFMT_S16_LE, 2, 0) +#define ENVY24_DEFAULT_FORMAT SND_FORMAT(AFMT_S16_LE, 2, 0) #define ENVY24_NAMELEN 32 @@ -63,33 +62,33 @@ #define SCL_GPIO 0x20 struct envy24_sample { - volatile u_int32_t buffer; + volatile u_int32_t buffer; }; typedef struct envy24_sample sample32_t; /* channel registers */ struct sc_chinfo { - struct snd_dbuf *buffer; - struct pcm_channel *channel; - struct sc_info *parent; - int dir; - unsigned num; /* hw channel number */ + struct snd_dbuf *buffer; + struct pcm_channel *channel; + struct sc_info *parent; + int dir; + unsigned num; /* hw channel number */ /* channel information */ - u_int32_t format; - u_int32_t speed; - u_int32_t blk; /* hw block size(dword) */ + u_int32_t format; + u_int32_t speed; + u_int32_t blk; /* hw block size(dword) */ /* format conversion structure */ - u_int8_t *data; - unsigned int size; /* data buffer size(byte) */ - int unit; /* sample size(byte) */ - unsigned int offset; /* samples number offset */ - void (*emldma)(struct sc_chinfo *); + u_int8_t *data; + unsigned int size; /* data buffer size(byte) */ + int unit; /* sample size(byte) */ + unsigned int offset; /* samples number offset */ + void (*emldma)(struct sc_chinfo *); /* flags */ - int run; + int run; }; /* codec interface entrys */ @@ -98,7 +97,8 @@ void (*destroy)(void *codec); void (*init)(void *codec); void (*reinit)(void *codec); - void (*setvolume)(void *codec, int dir, unsigned int left, unsigned int right); + void (*setvolume)(void *codec, int dir, unsigned int left, + unsigned int right); void (*setrate)(void *codec, int which, int rate); }; @@ -115,64 +115,64 @@ /* device private data */ struct sc_info { - device_t dev; - struct mtx *lock; + device_t dev; + struct mtx *lock; /* Control/Status registor */ struct resource *cs; - int csid; + int csid; bus_space_tag_t cst; bus_space_handle_t csh; /* DDMA registor */ struct resource *ddma; - int ddmaid; + int ddmaid; bus_space_tag_t ddmat; bus_space_handle_t ddmah; /* Consumer Section DMA Channel Registers */ struct resource *ds; - int dsid; + int dsid; bus_space_tag_t dst; bus_space_handle_t dsh; /* MultiTrack registor */ struct resource *mt; - int mtid; + int mtid; bus_space_tag_t mtt; bus_space_handle_t mth; /* DMA tag */ bus_dma_tag_t dmat; /* IRQ resource */ struct resource *irq; - int irqid; - void *ih; + int irqid; + void *ih; /* system configuration data */ struct cfg_info *cfg; /* ADC/DAC number and info */ - int adcn, dacn; - void *adc[4], *dac[4]; + int adcn, dacn; + void *adc[4], *dac[4]; /* mixer control data */ - u_int32_t src; - u_int8_t left[ENVY24_CHAN_NUM]; - u_int8_t right[ENVY24_CHAN_NUM]; + u_int32_t src; + u_int8_t left[ENVY24_CHAN_NUM]; + u_int8_t right[ENVY24_CHAN_NUM]; /* Play/Record DMA fifo */ - sample32_t *pbuf; - sample32_t *rbuf; - u_int32_t psize, rsize; /* DMA buffer size(byte) */ - u_int16_t blk[2]; /* transfer check blocksize(dword) */ - bus_dmamap_t pmap, rmap; - bus_addr_t paddr, raddr; + sample32_t *pbuf; + sample32_t *rbuf; + u_int32_t psize, rsize; /* DMA buffer size(byte) */ + u_int16_t blk[2]; /* transfer check blocksize(dword) */ + bus_dmamap_t pmap, rmap; + bus_addr_t paddr, raddr; /* current status */ - u_int32_t speed; - int run[2]; - u_int16_t intr[2]; - struct pcmchan_caps caps[2]; + u_int32_t speed; + int run[2]; + u_int16_t intr[2]; + struct pcmchan_caps caps[2]; /* channel info table */ - unsigned chnum; + unsigned chnum; struct sc_chinfo chan[11]; }; @@ -190,7 +190,8 @@ static void envy24_r32sl(struct sc_chinfo *); /* channel interface */ -static void *envy24chan_init(kobj_t, void *, struct snd_dbuf *, struct pcm_channel *, int); +static void *envy24chan_init(kobj_t, void *, struct snd_dbuf *, + struct pcm_channel *, int); static int envy24chan_setformat(kobj_t, void *, u_int32_t); static u_int32_t envy24chan_setspeed(kobj_t, void *, u_int32_t); static u_int32_t envy24chan_setblocksize(kobj_t, void *, u_int32_t); @@ -210,7 +211,8 @@ static void envy24_delta_ak4524_destroy(void *); static void envy24_delta_ak4524_init(void *); static void envy24_delta_ak4524_reinit(void *); -static void envy24_delta_ak4524_setvolume(void *, int, unsigned int, unsigned int); +static void envy24_delta_ak4524_setvolume(void *, int, unsigned int, + unsigned int); /* -------------------------------------------------------------------- */ @@ -221,16 +223,16 @@ /* API -> hardware channel map */ static unsigned envy24_chanmap[ENVY24_CHAN_NUM] = { ENVY24_CHAN_PLAY_SPDIF, /* 0 */ - ENVY24_CHAN_PLAY_DAC1, /* 1 */ - ENVY24_CHAN_PLAY_DAC2, /* 2 */ - ENVY24_CHAN_PLAY_DAC3, /* 3 */ - ENVY24_CHAN_PLAY_DAC4, /* 4 */ - ENVY24_CHAN_REC_MIX, /* 5 */ - ENVY24_CHAN_REC_SPDIF, /* 6 */ - ENVY24_CHAN_REC_ADC1, /* 7 */ - ENVY24_CHAN_REC_ADC2, /* 8 */ - ENVY24_CHAN_REC_ADC3, /* 9 */ - ENVY24_CHAN_REC_ADC4, /* 10 */ + ENVY24_CHAN_PLAY_DAC1, /* 1 */ + ENVY24_CHAN_PLAY_DAC2, /* 2 */ + ENVY24_CHAN_PLAY_DAC3, /* 3 */ + ENVY24_CHAN_PLAY_DAC4, /* 4 */ + ENVY24_CHAN_REC_MIX, /* 5 */ + ENVY24_CHAN_REC_SPDIF, /* 6 */ + ENVY24_CHAN_REC_ADC1, /* 7 */ + ENVY24_CHAN_REC_ADC2, /* 8 */ + ENVY24_CHAN_REC_ADC3, /* 9 */ + ENVY24_CHAN_REC_ADC4, /* 10 */ }; /* mixer -> API channel map. see above */ @@ -263,138 +265,199 @@ }; /* variable rate audio */ -static u_int32_t envy24_speed[] = { - 96000, 88200, 64000, 48000, 44100, 32000, 24000, 22050, 16000, - 12000, 11025, 9600, 8000, 0 -}; +static u_int32_t envy24_speed[] = { 96000, 88200, 64000, 48000, 44100, 32000, + 24000, 22050, 16000, 12000, 11025, 9600, 8000, 0 }; /* known boards configuration */ static struct codec_entry delta_codec = { - envy24_delta_ak4524_create, - envy24_delta_ak4524_destroy, - envy24_delta_ak4524_init, - envy24_delta_ak4524_reinit, - envy24_delta_ak4524_setvolume, - NULL, /* setrate */ + envy24_delta_ak4524_create, envy24_delta_ak4524_destroy, + envy24_delta_ak4524_init, envy24_delta_ak4524_reinit, + envy24_delta_ak4524_setvolume, NULL, /* setrate */ }; static struct cfg_info cfg_table[] = { { - "Envy24 audio (M Audio Delta Dio 2496)", - 0x1412, 0xd631, - 0x10, 0x80, 0xf0, 0x03, - 0x02, 0xc0, 0xfd, - 0x10, 0x20, 0x40, 0x00, 0x00, - 0x00, - &delta_codec, + "Envy24 audio (M Audio Delta Dio 2496)", + 0x1412, + 0xd631, + 0x10, + 0x80, + 0xf0, + 0x03, + 0x02, + 0xc0, + 0xfd, + 0x10, + 0x20, + 0x40, + 0x00, + 0x00, + 0x00, + &delta_codec, + }, + { + "Envy24 audio (Terratec DMX 6fire)", + 0x153b, + 0x1138, + 0x2f, + 0x80, + 0xf0, + 0x03, + 0xc0, + 0xff, + 0x7f, + 0x10, + 0x20, + 0x01, + 0x01, + 0x00, + 0x00, + &delta_codec, + }, + { + "Envy24 audio (M Audio Audiophile 2496)", + 0x1412, + 0xd634, + 0x10, + 0x80, + 0x72, + 0x03, + 0x04, + 0xfe, + 0xfb, + 0x08, + 0x02, + 0x20, + 0x00, + 0x01, + 0x00, + &delta_codec, + }, + { + "Envy24 audio (M Audio Delta 66)", + 0x1412, + 0xd632, + 0x15, + 0x80, + 0xf0, + 0x03, + 0x02, + 0xc0, + 0xfd, + 0x10, + 0x20, + 0x40, + 0x00, + 0x00, + 0x00, + &delta_codec, + }, + { + "Envy24 audio (M Audio Delta 44)", + 0x1412, + 0xd633, + 0x15, + 0x80, + 0xf0, + 0x00, + 0x02, + 0xc0, + 0xfd, + 0x10, + 0x20, + 0x40, + 0x00, + 0x00, + 0x00, + &delta_codec, }, { - "Envy24 audio (Terratec DMX 6fire)", - 0x153b, 0x1138, - 0x2f, 0x80, 0xf0, 0x03, - 0xc0, 0xff, 0x7f, - 0x10, 0x20, 0x01, 0x01, 0x00, - 0x00, - &delta_codec, + "Envy24 audio (M Audio Delta 1010)", + 0x1412, + 0xd630, + 0x1f, + 0x80, + 0xf0, + 0x03, + 0x22, + 0xd0, + 0xdd, + 0x10, + 0x20, + 0x40, + 0x00, + 0x00, + 0x00, + &delta_codec, }, { - "Envy24 audio (M Audio Audiophile 2496)", - 0x1412, 0xd634, - 0x10, 0x80, 0x72, 0x03, - 0x04, 0xfe, 0xfb, - 0x08, 0x02, 0x20, 0x00, 0x01, - 0x00, - &delta_codec, + "Envy24 audio (M Audio Delta 1010LT)", + 0x1412, + 0xd63b, + 0x1f, + 0x80, + 0x72, + 0x03, + 0x04, + 0x7e, + 0xfb, + 0x08, + 0x02, + 0x70, + 0x00, + 0x00, + 0x00, + &delta_codec, }, - { - "Envy24 audio (M Audio Delta 66)", - 0x1412, 0xd632, - 0x15, 0x80, 0xf0, 0x03, - 0x02, 0xc0, 0xfd, - 0x10, 0x20, 0x40, 0x00, 0x00, - 0x00, - &delta_codec, - }, - { - "Envy24 audio (M Audio Delta 44)", - 0x1412, 0xd633, - 0x15, 0x80, 0xf0, 0x00, - 0x02, 0xc0, 0xfd, - 0x10, 0x20, 0x40, 0x00, 0x00, - 0x00, - &delta_codec, - }, - { - "Envy24 audio (M Audio Delta 1010)", - 0x1412, 0xd630, - 0x1f, 0x80, 0xf0, 0x03, - 0x22, 0xd0, 0xdd, - 0x10, 0x20, 0x40, 0x00, 0x00, - 0x00, - &delta_codec, - }, - { - "Envy24 audio (M Audio Delta 1010LT)", - 0x1412, 0xd63b, - 0x1f, 0x80, 0x72, 0x03, - 0x04, 0x7e, 0xfb, - 0x08, 0x02, 0x70, 0x00, 0x00, - 0x00, - &delta_codec, - }, - { - "Envy24 audio (Terratec EWX 2496)", - 0x153b, 0x1130, - 0x10, 0x80, 0xf0, 0x03, - 0xc0, 0x3f, 0x3f, - 0x10, 0x20, 0x01, 0x01, 0x00, - 0x00, - &delta_codec, - }, { - "Envy24 audio (Generic)", - 0, 0, - 0x0f, 0x00, 0x01, 0x03, - 0xff, 0x00, 0x00, - 0x10, 0x20, 0x40, 0x00, 0x00, - 0x00, - &delta_codec, /* default codec routines */ + "Envy24 audio (Terratec EWX 2496)", + 0x153b, + 0x1130, + 0x10, + 0x80, + 0xf0, + 0x03, + 0xc0, + 0x3f, + 0x3f, + 0x10, + 0x20, + 0x01, + 0x01, + 0x00, + 0x00, + &delta_codec, + }, + { + "Envy24 audio (Generic)", 0, 0, 0x0f, 0x00, 0x01, 0x03, 0xff, 0x00, + 0x00, 0x10, 0x20, 0x40, 0x00, 0x00, 0x00, + &delta_codec, /* default codec routines */ } }; -static u_int32_t envy24_recfmt[] = { - SND_FORMAT(AFMT_S16_LE, 2, 0), - SND_FORMAT(AFMT_S32_LE, 2, 0), - 0 -}; -static struct pcmchan_caps envy24_reccaps = {8000, 96000, envy24_recfmt, 0}; +static u_int32_t envy24_recfmt[] = { SND_FORMAT(AFMT_S16_LE, 2, 0), + SND_FORMAT(AFMT_S32_LE, 2, 0), 0 }; +static struct pcmchan_caps envy24_reccaps = { 8000, 96000, envy24_recfmt, 0 }; -static u_int32_t envy24_playfmt[] = { - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - SND_FORMAT(AFMT_S32_LE, 2, 0), - 0 -}; +static u_int32_t envy24_playfmt[] = { SND_FORMAT(AFMT_U8, 2, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), SND_FORMAT(AFMT_S32_LE, 2, 0), 0 }; -static struct pcmchan_caps envy24_playcaps = {8000, 96000, envy24_playfmt, 0}; +static struct pcmchan_caps envy24_playcaps = { 8000, 96000, envy24_playfmt, 0 }; struct envy24_emldma { - u_int32_t format; - void (*emldma)(struct sc_chinfo *); - int unit; + u_int32_t format; + void (*emldma)(struct sc_chinfo *); + int unit; }; -static struct envy24_emldma envy24_pemltab[] = { - {SND_FORMAT(AFMT_U8, 2, 0), envy24_p8u, 2}, - {SND_FORMAT(AFMT_S16_LE, 2, 0), envy24_p16sl, 4}, - {SND_FORMAT(AFMT_S32_LE, 2, 0), envy24_p32sl, 8}, - {0, NULL, 0} -}; +static struct envy24_emldma envy24_pemltab[] = { { SND_FORMAT(AFMT_U8, 2, 0), + envy24_p8u, 2 }, + { SND_FORMAT(AFMT_S16_LE, 2, 0), envy24_p16sl, 4 }, + { SND_FORMAT(AFMT_S32_LE, 2, 0), envy24_p32sl, 8 }, { 0, NULL, 0 } }; static struct envy24_emldma envy24_remltab[] = { - {SND_FORMAT(AFMT_S16_LE, 2, 0), envy24_r16sl, 4}, - {SND_FORMAT(AFMT_S32_LE, 2, 0), envy24_r32sl, 8}, - {0, NULL, 0} + { SND_FORMAT(AFMT_S16_LE, 2, 0), envy24_r16sl, 4 }, + { SND_FORMAT(AFMT_S32_LE, 2, 0), envy24_r32sl, 8 }, { 0, NULL, 0 } }; /* -------------------------------------------------------------------- */ @@ -486,7 +549,7 @@ u_int32_t data; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, addr); #endif for (i = 0; i < ENVY24_TIMEOUT; i++) { @@ -512,7 +575,7 @@ } data = envy24_rdcs(sc, ENVY24_CCS_I2CDATA, 1); -#if(0) +#if (0) device_printf(sc->dev, "envy24_rdi2c(): return 0x%x\n", data); #endif return (int)data; @@ -525,7 +588,7 @@ u_int32_t tmp; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, addr); #endif for (i = 0; i < ENVY24_TIMEOUT; i++) { @@ -560,13 +623,14 @@ { u_int32_t data; -#if(0) +#if (0) device_printf(sc->dev, "envy24_rdrom(sc, 0x%02x)\n", addr); #endif data = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1); if ((data & ENVY24_CCS_I2CSTAT_ROM) == 0) { -#if(0) - device_printf(sc->dev, "envy24_rdrom(): E2PROM not presented\n"); +#if (0) + device_printf(sc->dev, + "envy24_rdrom(): E2PROM not presented\n"); #endif return -1; } @@ -581,19 +645,20 @@ int size; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24_rom2cfg(sc)\n"); #endif size = envy24_rdrom(sc, ENVY24_E2PROM_SIZE); if (size < ENVY24_E2PROM_GPIODIR + 1) { -#if(0) - device_printf(sc->dev, "envy24_rom2cfg(): ENVY24_E2PROM_SIZE-->%d\n", size); +#if (0) + device_printf(sc->dev, + "envy24_rom2cfg(): ENVY24_E2PROM_SIZE-->%d\n", size); #endif return NULL; } buff = malloc(sizeof(*buff), M_ENVY24, M_NOWAIT); if (buff == NULL) { -#if(0) +#if (0) device_printf(sc->dev, "envy24_rom2cfg(): malloc()\n"); #endif return NULL; @@ -612,7 +677,8 @@ buff->gpiostate = envy24_rdrom(sc, ENVY24_E2PROM_GPIOSTATE); buff->gpiodir = envy24_rdrom(sc, ENVY24_E2PROM_GPIODIR); - for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; i++) + for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; + i++) if (cfg_table[i].subvendor == buff->subvendor && cfg_table[i].subdevice == buff->subdevice) break; @@ -623,7 +689,8 @@ } static void -envy24_cfgfree(struct cfg_info *cfg) { +envy24_cfgfree(struct cfg_info *cfg) +{ if (cfg == NULL) return; if (cfg->free) @@ -642,7 +709,7 @@ u_int32_t data; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24_coldcd()\n"); #endif envy24_wrmt(sc, ENVY24_MT_AC97CMD, ENVY24_MT_AC97CMD_CLD, 1); @@ -666,7 +733,7 @@ u_int32_t data; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24_slavecd()\n"); #endif envy24_wrmt(sc, ENVY24_MT_AC97CMD, @@ -692,7 +759,7 @@ u_int32_t data; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24_rdcd(obj, sc, 0x%02x)\n", regno); #endif envy24_wrmt(sc, ENVY24_MT_AC97IDX, (u_int32_t)regno, 1); @@ -704,7 +771,7 @@ } data = envy24_rdmt(sc, ENVY24_MT_AC97DLO, 2); -#if(0) +#if (0) device_printf(sc->dev, "envy24_rdcd(): return 0x%x\n", data); #endif return (int)data; @@ -717,7 +784,7 @@ u_int32_t cmd; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24_wrcd(obj, sc, 0x%02x, 0x%04x)\n", regno, data); #endif envy24_wrmt(sc, ENVY24_MT_AC97IDX, (u_int32_t)regno, 1); @@ -753,7 +820,7 @@ static void envy24_gpiowr(struct sc_info *sc, u_int32_t data) { -#if(0) +#if (0) device_printf(sc->dev, "envy24_gpiowr(sc, 0x%02x)\n", data & 0xff); return; #endif @@ -806,101 +873,105 @@ static void envy24_gpio_i2c_ctl(void *codec, unsigned int scl, unsigned int sda) { - u_int32_t data = 0; - struct envy24_delta_ak4524_codec *ptr = codec; -#if(0) - device_printf(ptr->parent->dev, "--> %d, %d\n", scl, sda); + u_int32_t data = 0; + struct envy24_delta_ak4524_codec *ptr = codec; +#if (0) + device_printf(ptr->parent->dev, "--> %d, %d\n", scl, sda); #endif - data = envy24_gpiord(ptr->parent); - data &= ~(SDA_GPIO | SCL_GPIO); - if (scl) data += SCL_GPIO; - if (sda) data += SDA_GPIO; - envy24_gpiowr(ptr->parent, data); - return; + data = envy24_gpiord(ptr->parent); + data &= ~(SDA_GPIO | SCL_GPIO); + if (scl) + data += SCL_GPIO; + if (sda) + data += SDA_GPIO; + envy24_gpiowr(ptr->parent, data); + return; } static void -i2c_wrbit(void *codec, void (*ctrl)(void*, unsigned int, unsigned int), int bit) +i2c_wrbit(void *codec, void (*ctrl)(void *, unsigned int, unsigned int), + int bit) { - struct envy24_delta_ak4524_codec *ptr = codec; - unsigned int sda; + struct envy24_delta_ak4524_codec *ptr = codec; + unsigned int sda; - if (bit) - sda = 1; - else - sda = 0; + if (bit) + sda = 1; + else + sda = 0; - ctrl(ptr, 0, sda); - DELAY(I2C_DELAY); - ctrl(ptr, 1, sda); - DELAY(I2C_DELAY); - ctrl(ptr, 0, sda); - DELAY(I2C_DELAY); + ctrl(ptr, 0, sda); + DELAY(I2C_DELAY); + ctrl(ptr, 1, sda); + DELAY(I2C_DELAY); + ctrl(ptr, 0, sda); + DELAY(I2C_DELAY); } static void -i2c_start(void *codec, void (*ctrl)(void*, unsigned int, unsigned int)) +i2c_start(void *codec, void (*ctrl)(void *, unsigned int, unsigned int)) { - struct envy24_delta_ak4524_codec *ptr = codec; + struct envy24_delta_ak4524_codec *ptr = codec; - ctrl(ptr, 1, 1); - DELAY(I2C_DELAY); - ctrl(ptr, 1, 0); - DELAY(I2C_DELAY); - ctrl(ptr, 0, 0); - DELAY(I2C_DELAY); + ctrl(ptr, 1, 1); + DELAY(I2C_DELAY); + ctrl(ptr, 1, 0); + DELAY(I2C_DELAY); + ctrl(ptr, 0, 0); + DELAY(I2C_DELAY); } static void -i2c_stop(void *codec, void (*ctrl)(void*, unsigned int, unsigned int)) +i2c_stop(void *codec, void (*ctrl)(void *, unsigned int, unsigned int)) { - struct envy24_delta_ak4524_codec *ptr = codec; + struct envy24_delta_ak4524_codec *ptr = codec; - ctrl(ptr, 0, 0); - DELAY(I2C_DELAY); - ctrl(ptr, 1, 0); - DELAY(I2C_DELAY); - ctrl(ptr, 1, 1); - DELAY(I2C_DELAY); + ctrl(ptr, 0, 0); + DELAY(I2C_DELAY); + ctrl(ptr, 1, 0); + DELAY(I2C_DELAY); + ctrl(ptr, 1, 1); + DELAY(I2C_DELAY); } static void -i2c_ack(void *codec, void (*ctrl)(void*, unsigned int, unsigned int)) +i2c_ack(void *codec, void (*ctrl)(void *, unsigned int, unsigned int)) { - struct envy24_delta_ak4524_codec *ptr = codec; + struct envy24_delta_ak4524_codec *ptr = codec; - ctrl(ptr, 0, 1); - DELAY(I2C_DELAY); - ctrl(ptr, 1, 1); - DELAY(I2C_DELAY); - /* dummy, need routine to change gpio direction */ - ctrl(ptr, 0, 1); - DELAY(I2C_DELAY); + ctrl(ptr, 0, 1); + DELAY(I2C_DELAY); + ctrl(ptr, 1, 1); + DELAY(I2C_DELAY); + /* dummy, need routine to change gpio direction */ + ctrl(ptr, 0, 1); + DELAY(I2C_DELAY); } static void -i2c_wr(void *codec, void (*ctrl)(void*, unsigned int, unsigned int), u_int32_t dev, int reg, u_int8_t val) +i2c_wr(void *codec, void (*ctrl)(void *, unsigned int, unsigned int), + u_int32_t dev, int reg, u_int8_t val) { - struct envy24_delta_ak4524_codec *ptr = codec; - int mask; + struct envy24_delta_ak4524_codec *ptr = codec; + int mask; - i2c_start(ptr, ctrl); + i2c_start(ptr, ctrl); - for (mask = 0x80; mask != 0; mask >>= 1) - i2c_wrbit(ptr, ctrl, dev & mask); - i2c_ack(ptr, ctrl); + for (mask = 0x80; mask != 0; mask >>= 1) + i2c_wrbit(ptr, ctrl, dev & mask); + i2c_ack(ptr, ctrl); - if (reg != 0xff) { - for (mask = 0x80; mask != 0; mask >>= 1) - i2c_wrbit(ptr, ctrl, reg & mask); - i2c_ack(ptr, ctrl); - } + if (reg != 0xff) { + for (mask = 0x80; mask != 0; mask >>= 1) + i2c_wrbit(ptr, ctrl, reg & mask); + i2c_ack(ptr, ctrl); + } - for (mask = 0x80; mask != 0; mask >>= 1) - i2c_wrbit(ptr, ctrl, val & mask); - i2c_ack(ptr, ctrl); + for (mask = 0x80; mask != 0; mask >>= 1) + i2c_wrbit(ptr, ctrl, val & mask); + i2c_ack(ptr, ctrl); - i2c_stop(ptr, ctrl); + i2c_stop(ptr, ctrl); } /* -------------------------------------------------------------------- */ @@ -908,19 +979,23 @@ /* M-Audio Delta series AK4524 access interface routine */ static void -envy24_delta_ak4524_ctl(void *codec, unsigned int cs, unsigned int cclk, unsigned int cdti) +envy24_delta_ak4524_ctl(void *codec, unsigned int cs, unsigned int cclk, + unsigned int cdti) { u_int32_t data = 0; struct envy24_delta_ak4524_codec *ptr = codec; -#if(0) +#if (0) device_printf(ptr->parent->dev, "--> %d, %d, %d\n", cs, cclk, cdti); #endif data = envy24_gpiord(ptr->parent); data &= ~(ptr->cs | ptr->cclk | ptr->cdti); - if (cs) data += ptr->cs; - if (cclk) data += ptr->cclk; - if (cdti) data += ptr->cdti; + if (cs) + data += ptr->cs; + if (cclk) + data += ptr->cclk; + if (cdti) + data += ptr->cdti; envy24_gpiowr(ptr->parent, data); return; } @@ -931,8 +1006,9 @@ struct sc_info *sc = info; struct envy24_delta_ak4524_codec *buff = NULL; -#if(0) - device_printf(sc->dev, "envy24_delta_ak4524_create(dev, sc, %d, %d)\n", dir, num); +#if (0) + device_printf(sc->dev, "envy24_delta_ak4524_create(dev, sc, %d, %d)\n", + dir, num); #endif buff = malloc(sizeof(*buff), M_ENVY24, M_NOWAIT); @@ -940,11 +1016,14 @@ return NULL; if (dir == PCMDIR_REC && sc->adc[num] != NULL) - buff->info = ((struct envy24_delta_ak4524_codec *)sc->adc[num])->info; + buff->info = + ((struct envy24_delta_ak4524_codec *)sc->adc[num])->info; else if (dir == PCMDIR_PLAY && sc->dac[num] != NULL) - buff->info = ((struct envy24_delta_ak4524_codec *)sc->dac[num])->info; + buff->info = + ((struct envy24_delta_ak4524_codec *)sc->dac[num])->info; else - buff->info = spicds_create(dev, buff, num, envy24_delta_ak4524_ctl); + buff->info = spicds_create(dev, buff, num, + envy24_delta_ak4524_ctl); if (buff->info == NULL) { free(buff, M_ENVY24); return NULL; @@ -963,15 +1042,14 @@ struct envy24_delta_ak4524_codec *ptr = codec; if (ptr == NULL) return; -#if(0) +#if (0) device_printf(ptr->parent->dev, "envy24_delta_ak4524_destroy()\n"); #endif if (ptr->dir == PCMDIR_PLAY) { if (ptr->parent->dac[ptr->num] != NULL) spicds_destroy(ptr->info); - } - else { + } else { if (ptr->parent->adc[ptr->num] != NULL) spicds_destroy(ptr->info); } @@ -988,16 +1066,18 @@ struct envy24_delta_ak4524_codec *ptr = codec; if (ptr == NULL) return; -#if(0) +#if (0) device_printf(ptr->parent->dev, "envy24_delta_ak4524_init()\n"); #endif /* gpiomask = envy24_gpiogetmask(ptr->parent); - gpiomask &= ~(ENVY24_GPIO_AK4524_CDTI | ENVY24_GPIO_AK4524_CCLK | ENVY24_GPIO_AK4524_CS0 | ENVY24_GPIO_AK4524_CS1); + gpiomask &= ~(ENVY24_GPIO_AK4524_CDTI | ENVY24_GPIO_AK4524_CCLK | + ENVY24_GPIO_AK4524_CS0 | ENVY24_GPIO_AK4524_CS1); envy24_gpiosetmask(ptr->parent, gpiomask); gpiodir = envy24_gpiogetdir(ptr->parent); - gpiodir |= ENVY24_GPIO_AK4524_CDTI | ENVY24_GPIO_AK4524_CCLK | ENVY24_GPIO_AK4524_CS0 | ENVY24_GPIO_AK4524_CS1; + gpiodir |= ENVY24_GPIO_AK4524_CDTI | ENVY24_GPIO_AK4524_CCLK | + ENVY24_GPIO_AK4524_CS0 | ENVY24_GPIO_AK4524_CS1; envy24_gpiosetdir(ptr->parent, gpiodir); */ ptr->cs = ptr->parent->cfg->cs; @@ -1012,7 +1092,7 @@ #endif ptr->cclk = ptr->parent->cfg->cclk; ptr->cdti = ptr->parent->cfg->cdti; - spicds_settype(ptr->info, ptr->parent->cfg->type); + spicds_settype(ptr->info, ptr->parent->cfg->type); spicds_setcif(ptr->info, ptr->parent->cfg->cif); spicds_setformat(ptr->info, AK452X_FORMAT_I2S | AK452X_FORMAT_256FSN | AK452X_FORMAT_1X); @@ -1021,17 +1101,17 @@ if (ptr->num == 0) spicds_init(ptr->info); - /* 6fire rear input init test, set ptr->num to 1 for test */ - if (ptr->parent->cfg->subvendor == 0x153b && \ - ptr->parent->cfg->subdevice == 0x1138 && ptr->num == 100) { - ptr->cs = 0x02; - spicds_init(ptr->info); - device_printf(ptr->parent->dev, "6fire rear input init\n"); - i2c_wr(ptr, envy24_gpio_i2c_ctl, \ - PCA9554_I2CDEV, PCA9554_DIR, 0x80); - i2c_wr(ptr, envy24_gpio_i2c_ctl, \ - PCA9554_I2CDEV, PCA9554_OUT, 0x02); - } + /* 6fire rear input init test, set ptr->num to 1 for test */ + if (ptr->parent->cfg->subvendor == 0x153b && + ptr->parent->cfg->subdevice == 0x1138 && ptr->num == 100) { + ptr->cs = 0x02; + spicds_init(ptr->info); + device_printf(ptr->parent->dev, "6fire rear input init\n"); + i2c_wr(ptr, envy24_gpio_i2c_ctl, PCA9554_I2CDEV, PCA9554_DIR, + 0x80); + i2c_wr(ptr, envy24_gpio_i2c_ctl, PCA9554_I2CDEV, PCA9554_OUT, + 0x02); + } } static void @@ -1040,7 +1120,7 @@ struct envy24_delta_ak4524_codec *ptr = codec; if (ptr == NULL) return; -#if(0) +#if (0) device_printf(ptr->parent->dev, "envy24_delta_ak4524_reinit()\n"); #endif @@ -1048,12 +1128,13 @@ } static void -envy24_delta_ak4524_setvolume(void *codec, int dir, unsigned int left, unsigned int right) +envy24_delta_ak4524_setvolume(void *codec, int dir, unsigned int left, + unsigned int right) { struct envy24_delta_ak4524_codec *ptr = codec; if (ptr == NULL) return; -#if(0) +#if (0) device_printf(ptr->parent->dev, "envy24_delta_ak4524_set()\n"); #endif @@ -1063,7 +1144,8 @@ /* There is no need for AK452[48] codec to set sample rate static void - envy24_delta_ak4524_setrate(struct envy24_delta_ak4524_codec *codec, int which, int rate) + envy24_delta_ak4524_setrate(struct envy24_delta_ak4524_codec *codec, int + which, int rate) { } */ @@ -1075,44 +1157,37 @@ static struct { u_int32_t speed; u_int32_t code; -} envy24_speedtab[] = { - {48000, ENVY24_MT_RATE_48000}, - {24000, ENVY24_MT_RATE_24000}, - {12000, ENVY24_MT_RATE_12000}, - {9600, ENVY24_MT_RATE_9600}, - {32000, ENVY24_MT_RATE_32000}, - {16000, ENVY24_MT_RATE_16000}, - {8000, ENVY24_MT_RATE_8000}, - {96000, ENVY24_MT_RATE_96000}, - {64000, ENVY24_MT_RATE_64000}, - {44100, ENVY24_MT_RATE_44100}, - {22050, ENVY24_MT_RATE_22050}, - {11025, ENVY24_MT_RATE_11025}, - {88200, ENVY24_MT_RATE_88200}, - {0, 0x10} -}; +} envy24_speedtab[] = { { 48000, ENVY24_MT_RATE_48000 }, + { 24000, ENVY24_MT_RATE_24000 }, { 12000, ENVY24_MT_RATE_12000 }, + { 9600, ENVY24_MT_RATE_9600 }, { 32000, ENVY24_MT_RATE_32000 }, + { 16000, ENVY24_MT_RATE_16000 }, { 8000, ENVY24_MT_RATE_8000 }, + { 96000, ENVY24_MT_RATE_96000 }, { 64000, ENVY24_MT_RATE_64000 }, + { 44100, ENVY24_MT_RATE_44100 }, { 22050, ENVY24_MT_RATE_22050 }, + { 11025, ENVY24_MT_RATE_11025 }, { 88200, ENVY24_MT_RATE_88200 }, + { 0, 0x10 } }; static u_int32_t -envy24_setspeed(struct sc_info *sc, u_int32_t speed) { +envy24_setspeed(struct sc_info *sc, u_int32_t speed) +{ u_int32_t code; int i = 0; -#if(0) +#if (0) device_printf(sc->dev, "envy24_setspeed(sc, %d)\n", speed); #endif if (speed == 0) { code = ENVY24_MT_RATE_SPDIF; /* external master clock */ envy24_slavecd(sc); - } - else { + } else { for (i = 0; envy24_speedtab[i].speed != 0; i++) { if (envy24_speedtab[i].speed == speed) break; } code = envy24_speedtab[i].code; } -#if(0) - device_printf(sc->dev, "envy24_setspeed(): speed %d/code 0x%04x\n", envy24_speedtab[i].speed, code); +#if (0) + device_printf(sc->dev, "envy24_setspeed(): speed %d/code 0x%04x\n", + envy24_speedtab[i].speed, code); #endif if (code < 0x10) { envy24_wrmt(sc, ENVY24_MT_RATE, code, 1); @@ -1123,11 +1198,10 @@ break; } speed = envy24_speedtab[i].speed; - } - else + } else speed = 0; -#if(0) +#if (0) device_printf(sc->dev, "envy24_setspeed(): return %d\n", speed); #endif return speed; @@ -1136,14 +1210,14 @@ static void envy24_setvolume(struct sc_info *sc, unsigned ch) { -#if(0) +#if (0) device_printf(sc->dev, "envy24_setvolume(sc, %d)\n", ch); #endif -if (sc->cfg->subvendor==0x153b && sc->cfg->subdevice==0x1138 ) { - envy24_wrmt(sc, ENVY24_MT_VOLIDX, 16, 1); - envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f7f, 2); - envy24_wrmt(sc, ENVY24_MT_VOLIDX, 17, 1); - envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f7f, 2); + if (sc->cfg->subvendor == 0x153b && sc->cfg->subdevice == 0x1138) { + envy24_wrmt(sc, ENVY24_MT_VOLIDX, 16, 1); + envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f7f, 2); + envy24_wrmt(sc, ENVY24_MT_VOLIDX, 17, 1); + envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f7f, 2); } envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2, 1); @@ -1157,7 +1231,7 @@ { u_int32_t vol; -#if(0) +#if (0) device_printf(sc->dev, "envy24_mutevolume(sc, %d)\n", ch); #endif vol = ENVY24_VOL_MUTE << 8 | ENVY24_VOL_MUTE; @@ -1173,15 +1247,14 @@ int unit, regno; u_int32_t ptr, rtn; -#if(0) +#if (0) device_printf(sc->dev, "envy24_gethwptr(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) { rtn = sc->psize / 4; unit = ENVY24_PLAY_BUFUNIT / 4; regno = ENVY24_MT_PCNT; - } - else { + } else { rtn = sc->rsize / 4; unit = ENVY24_REC_BUFUNIT / 4; regno = ENVY24_MT_RCNT; @@ -1191,7 +1264,7 @@ rtn -= (ptr + 1); rtn /= unit; -#if(0) +#if (0) device_printf(sc->dev, "envy24_gethwptr(): return %d\n", rtn); #endif return rtn; @@ -1205,33 +1278,34 @@ u_int32_t cnt; u_int16_t blk; -#if(0) +#if (0) device_printf(sc->dev, "envy24_updintr(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) { blk = sc->blk[0]; regintr = ENVY24_MT_PTERM; mask = ~ENVY24_MT_INT_PMASK; - } - else { + } else { blk = sc->blk[1]; regintr = ENVY24_MT_RTERM; mask = ~ENVY24_MT_INT_RMASK; } cnt = blk - 1; -#if(0) - device_printf(sc->dev, "envy24_updintr():blk = %d, cnt = %d\n", blk, cnt); +#if (0) + device_printf(sc->dev, "envy24_updintr():blk = %d, cnt = %d\n", blk, + cnt); #endif envy24_wrmt(sc, regintr, cnt, 2); intr = envy24_rdmt(sc, ENVY24_MT_INT, 1); -#if(0) - device_printf(sc->dev, "envy24_updintr():intr = 0x%02x, mask = 0x%02x\n", intr, mask); +#if (0) + device_printf(sc->dev, + "envy24_updintr():intr = 0x%02x, mask = 0x%02x\n", intr, mask); #endif envy24_wrmt(sc, ENVY24_MT_INT, intr & mask, 1); -#if(0) +#if (0) device_printf(sc->dev, "envy24_updintr():INT-->0x%02x\n", - envy24_rdmt(sc, ENVY24_MT_INT, 1)); + envy24_rdmt(sc, ENVY24_MT_INT, 1)); #endif return; @@ -1243,7 +1317,7 @@ { u_int32_t mask, intr; -#if(0) +#if (0) device_printf(sc->dev, "envy24_maskintr(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) @@ -1262,7 +1336,7 @@ { u_int32_t mask, stat, intr, rtn; -#if(0) +#if (0) device_printf(sc->dev, "envy24_checkintr(sc, %d)\n", dir); #endif intr = envy24_rdmt(sc, ENVY24_MT_INT, 1); @@ -1272,8 +1346,7 @@ stat = ENVY24_MT_INT_PSTAT | ENVY24_MT_INT_PMASK; envy24_wrmt(sc, ENVY24_MT_INT, (intr & mask) | stat, 1); } - } - else { + } else { if ((rtn = intr & ENVY24_MT_INT_RSTAT) != 0) { mask = ~ENVY24_MT_INT_PSTAT; stat = ENVY24_MT_INT_RSTAT | ENVY24_MT_INT_RMASK; @@ -1289,7 +1362,7 @@ { u_int32_t stat, sw; -#if(0) +#if (0) device_printf(sc->dev, "envy24_start(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) @@ -1299,10 +1372,12 @@ stat = envy24_rdmt(sc, ENVY24_MT_PCTL, 1); envy24_wrmt(sc, ENVY24_MT_PCTL, stat | sw, 1); -#if(0) +#if (0) DELAY(100); - device_printf(sc->dev, "PADDR:0x%08x\n", envy24_rdmt(sc, ENVY24_MT_PADDR, 4)); - device_printf(sc->dev, "PCNT:%ld\n", envy24_rdmt(sc, ENVY24_MT_PCNT, 2)); + device_printf(sc->dev, "PADDR:0x%08x\n", + envy24_rdmt(sc, ENVY24_MT_PADDR, 4)); + device_printf(sc->dev, "PCNT:%ld\n", + envy24_rdmt(sc, ENVY24_MT_PCNT, 2)); #endif return; @@ -1313,7 +1388,7 @@ { u_int32_t stat, sw; -#if(0) +#if (0) device_printf(sc->dev, "envy24_stop(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) @@ -1333,9 +1408,9 @@ u_int32_t reg, mask; u_int32_t left, right; -#if(0) - device_printf(sc->dev, "envy24_route(sc, %d, %d, %d, %d)\n", - dac, class, adc, rev); +#if (0) + device_printf(sc->dev, "envy24_route(sc, %d, %d, %d, %d)\n", dac, class, + adc, rev); #endif /* parameter pattern check */ if (dac < 0 || ENVY24_ROUTE_DAC_SPDIF < dac) @@ -1346,36 +1421,38 @@ if (rev) { left = ENVY24_ROUTE_RIGHT; right = ENVY24_ROUTE_LEFT; - } - else { + } else { left = ENVY24_ROUTE_LEFT; right = ENVY24_ROUTE_RIGHT; } if (dac == ENVY24_ROUTE_DAC_SPDIF) { reg = class | class << 2 | - ((adc << 1 | left) | left << 3) << 8 | - ((adc << 1 | right) | right << 3) << 12; -#if(0) - device_printf(sc->dev, "envy24_route(): MT_SPDOUT-->0x%04x\n", reg); + ((adc << 1 | left) | left << 3) << 8 | + ((adc << 1 | right) | right << 3) << 12; +#if (0) + device_printf(sc->dev, "envy24_route(): MT_SPDOUT-->0x%04x\n", + reg); #endif envy24_wrmt(sc, ENVY24_MT_SPDOUT, reg, 2); - } - else { + } else { mask = ~(0x0303 << dac * 2); reg = envy24_rdmt(sc, ENVY24_MT_PSDOUT, 2); reg = (reg & mask) | ((class | class << 8) << dac * 2); -#if(0) - device_printf(sc->dev, "envy24_route(): MT_PSDOUT-->0x%04x\n", reg); +#if (0) + device_printf(sc->dev, "envy24_route(): MT_PSDOUT-->0x%04x\n", + reg); #endif envy24_wrmt(sc, ENVY24_MT_PSDOUT, reg, 2); mask = ~(0xff << dac * 8); reg = envy24_rdmt(sc, ENVY24_MT_RECORD, 4); reg = (reg & mask) | - (((adc << 1 | left) | left << 3) | - ((adc << 1 | right) | right << 3) << 4) << dac * 8; -#if(0) - device_printf(sc->dev, "envy24_route(): MT_RECORD-->0x%08x\n", reg); + (((adc << 1 | left) | left << 3) | + ((adc << 1 | right) | right << 3) << 4) + << dac * 8; +#if (0) + device_printf(sc->dev, "envy24_route(): MT_RECORD-->0x%08x\n", + reg); #endif envy24_wrmt(sc, ENVY24_MT_RECORD, reg, 4); @@ -1409,7 +1486,8 @@ for (i = 0; i < length; i++) { dmabuf[dst * ENVY24_PLAY_CHNUM + slot].buffer = data[src]; - dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1].buffer = data[src + 1]; + dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1].buffer = + data[src + 1]; dst++; dst %= dsize; src += 2; @@ -1428,7 +1506,7 @@ int src, dst, ssize, dsize, slot; int i; -#if(0) +#if (0) device_printf(ch->parent->dev, "envy24_p16sl()\n"); #endif length = sndbuf_getready(ch->buffer) / 4; @@ -1439,17 +1517,21 @@ ssize = ch->size / 2; dsize = ch->size / 4; slot = ch->num * 2; -#if(0) - device_printf(ch->parent->dev, "envy24_p16sl():%lu-->%lu(%lu)\n", src, dst, length); +#if (0) + device_printf(ch->parent->dev, "envy24_p16sl():%lu-->%lu(%lu)\n", src, + dst, length); #endif for (i = 0; i < length; i++) { - dmabuf[dst * ENVY24_PLAY_CHNUM + slot].buffer = (u_int32_t)data[src] << 16; - dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1].buffer = (u_int32_t)data[src + 1] << 16; -#if(0) + dmabuf[dst * ENVY24_PLAY_CHNUM + slot].buffer = + (u_int32_t)data[src] << 16; + dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1].buffer = + (u_int32_t)data[src + 1] << 16; +#if (0) if (i < 16) { printf("%08x", dmabuf[dst * ENVY24_PLAY_CHNUM + slot]); - printf("%08x", dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1]); + printf("%08x", + dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1]); } #endif dst++; @@ -1457,7 +1539,7 @@ src += 2; src %= ssize; } -#if(0) +#if (0) printf("\n"); #endif @@ -1483,8 +1565,10 @@ slot = ch->num * 2; for (i = 0; i < length; i++) { - dmabuf[dst * ENVY24_PLAY_CHNUM + slot].buffer = ((u_int32_t)data[src] ^ 0x80) << 24; - dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1].buffer = ((u_int32_t)data[src + 1] ^ 0x80) << 24; + dmabuf[dst * ENVY24_PLAY_CHNUM + slot].buffer = + ((u_int32_t)data[src] ^ 0x80) << 24; + dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1].buffer = + ((u_int32_t)data[src + 1] ^ 0x80) << 24; dst++; dst %= dsize; src += 2; @@ -1514,7 +1598,8 @@ for (i = 0; i < length; i++) { data[dst] = dmabuf[src * ENVY24_REC_CHNUM + slot].buffer; - data[dst + 1] = dmabuf[src * ENVY24_REC_CHNUM + slot + 1].buffer; + data[dst + 1] = + dmabuf[src * ENVY24_REC_CHNUM + slot + 1].buffer; dst += 2; dst %= dsize; src++; @@ -1544,7 +1629,8 @@ for (i = 0; i < length; i++) { data[dst] = dmabuf[src * ENVY24_REC_CHNUM + slot].buffer; - data[dst + 1] = dmabuf[src * ENVY24_REC_CHNUM + slot + 1].buffer; + data[dst + 1] = + dmabuf[src * ENVY24_REC_CHNUM + slot + 1].buffer; dst += 2; dst %= dsize; src++; @@ -1558,14 +1644,16 @@ /* channel interface */ static void * -envy24chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +envy24chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { - struct sc_info *sc = (struct sc_info *)devinfo; + struct sc_info *sc = (struct sc_info *)devinfo; struct sc_chinfo *ch; unsigned num; -#if(0) - device_printf(sc->dev, "envy24chan_init(obj, devinfo, b, c, %d)\n", dir); +#if (0) + device_printf(sc->dev, "envy24chan_init(obj, devinfo, b, c, %d)\n", + dir); #endif snd_mtxlock(sc->lock); if ((sc->chnum > ENVY24_CHAN_PLAY_SPDIF && dir != PCMDIR_REC) || @@ -1581,8 +1669,7 @@ if (ch->data == NULL) { ch->size = 0; ch = NULL; - } - else { + } else { ch->buffer = b; ch->channel = c; ch->parent = sc; @@ -1607,7 +1694,7 @@ struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; -#if(0) +#if (0) device_printf(sc->dev, "envy24chan_free()\n"); #endif snd_mtxlock(sc->lock); @@ -1629,8 +1716,9 @@ /* unsigned int bcnt, bsize; */ int i; -#if(0) - device_printf(sc->dev, "envy24chan_setformat(obj, data, 0x%08x)\n", format); +#if (0) + device_printf(sc->dev, "envy24chan_setformat(obj, data, 0x%08x)\n", + format); #endif snd_mtxlock(sc->lock); /* check and get format related information */ @@ -1672,7 +1760,7 @@ #endif snd_mtxunlock(sc->lock); -#if(0) +#if (0) device_printf(sc->dev, "envy24chan_setformat(): return 0x%08x\n", 0); #endif return 0; @@ -1693,8 +1781,9 @@ u_int32_t val, prev; int i; -#if(0) - device_printf(ch->parent->dev, "envy24chan_setspeed(obj, data, %d)\n", speed); +#if (0) + device_printf(ch->parent->dev, "envy24chan_setspeed(obj, data, %d)\n", + speed); #endif prev = 0x7fffffff; for (i = 0; (val = envy24_speed[i]) != 0; i++) { @@ -1705,8 +1794,9 @@ } ch->speed = prev; -#if(0) - device_printf(ch->parent->dev, "envy24chan_setspeed(): return %d\n", ch->speed); +#if (0) + device_printf(ch->parent->dev, "envy24chan_setspeed(): return %d\n", + ch->speed); #endif return ch->speed; } @@ -1717,10 +1807,11 @@ struct sc_chinfo *ch = data; /* struct sc_info *sc = ch->parent; */ u_int32_t size, prev; - unsigned int bcnt, bsize; + unsigned int bcnt, bsize; -#if(0) - device_printf(sc->dev, "envy24chan_setblocksize(obj, data, %d)\n", blocksize); +#if (0) + device_printf(sc->dev, "envy24chan_setblocksize(obj, data, %d)\n", + blocksize); #endif prev = 0x7fffffff; /* snd_mtxlock(sc->lock); */ @@ -1738,16 +1829,16 @@ ch->blk *= ENVY24_REC_BUFUNIT / 4; /* set channel buffer information */ /* ch->size = ch->unit * ENVY24_SAMPLE_NUM; */ - if (ch->dir == PCMDIR_PLAY) - bsize = ch->blk * 4 / ENVY24_PLAY_BUFUNIT; - else - bsize = ch->blk * 4 / ENVY24_REC_BUFUNIT; - bsize *= ch->unit; - bcnt = ch->size / bsize; - sndbuf_resize(ch->buffer, bcnt, bsize); + if (ch->dir == PCMDIR_PLAY) + bsize = ch->blk * 4 / ENVY24_PLAY_BUFUNIT; + else + bsize = ch->blk * 4 / ENVY24_REC_BUFUNIT; + bsize *= ch->unit; + bcnt = ch->size / bsize; + sndbuf_resize(ch->buffer, bcnt, bsize); /* snd_mtxunlock(sc->lock); */ -#if(0) +#if (0) device_printf(sc->dev, "envy24chan_setblocksize(): return %d\n", prev); #endif return prev; @@ -1774,7 +1865,7 @@ slot = 1; switch (go) { case PCMTRIG_START: -#if(0) +#if (0) device_printf(sc->dev, "envy24chan_trigger(): start\n"); #endif /* check or set channel speed */ @@ -1782,8 +1873,7 @@ sc->speed = envy24_setspeed(sc, ch->speed); sc->caps[0].minspeed = sc->caps[0].maxspeed = sc->speed; sc->caps[1].minspeed = sc->caps[1].maxspeed = sc->speed; - } - else if (ch->speed != 0 && ch->speed != sc->speed) { + } else if (ch->speed != 0 && ch->speed != sc->speed) { error = -1; goto fail; } @@ -1795,11 +1885,11 @@ /* first channel */ ch->offset = 0; sc->blk[slot] = ch->blk; - } - else { + } else { ptr = envy24_gethwptr(sc, ch->dir); ch->offset = ((ptr / ch->blk + 1) * ch->blk % - (ch->size / 4)) * 4 / ch->unit; + (ch->size / 4)) * + 4 / ch->unit; if (ch->blk < sc->blk[slot]) sc->blk[slot] = ch->blk; } @@ -1813,7 +1903,7 @@ ch->run = 1; break; case PCMTRIG_EMLDMAWR: -#if(0) +#if (0) device_printf(sc->dev, "envy24chan_trigger(): emldmawr\n"); #endif if (ch->run != 1) { @@ -1823,7 +1913,7 @@ ch->emldma(ch); break; case PCMTRIG_EMLDMARD: -#if(0) +#if (0) device_printf(sc->dev, "envy24chan_trigger(): emldmard\n"); #endif if (ch->run != 1) { @@ -1834,17 +1924,17 @@ break; case PCMTRIG_ABORT: if (ch->run) { -#if(0) - device_printf(sc->dev, "envy24chan_trigger(): abort\n"); -#endif - ch->run = 0; - sc->run[slot]--; - if (ch->dir == PCMDIR_PLAY) - envy24_mutevolume(sc, ch->num); - if (sc->run[slot] == 0) { - envy24_stop(sc, ch->dir); - sc->intr[slot] = 0; - } +#if (0) + device_printf(sc->dev, "envy24chan_trigger(): abort\n"); +#endif + ch->run = 0; + sc->run[slot]--; + if (ch->dir == PCMDIR_PLAY) + envy24_mutevolume(sc, ch->num); + if (sc->run[slot] == 0) { + envy24_stop(sc, ch->dir); + sc->intr[slot] = 0; + } #if 0 else if (ch->blk == sc->blk[slot]) { sc->blk[slot] = ENVY24_SAMPLE_NUM / 2; @@ -1873,7 +1963,7 @@ struct sc_info *sc = ch->parent; u_int32_t ptr, rtn; -#if(0) +#if (0) device_printf(sc->dev, "envy24chan_getptr()\n"); #endif snd_mtxlock(sc->lock); @@ -1881,9 +1971,8 @@ rtn = ptr * ch->unit; snd_mtxunlock(sc->lock); -#if(0) - device_printf(sc->dev, "envy24chan_getptr(): return %d\n", - rtn); +#if (0) + device_printf(sc->dev, "envy24chan_getptr(): return %d\n", rtn); #endif return rtn; } @@ -1895,7 +1984,7 @@ struct sc_info *sc = ch->parent; struct pcmchan_caps *rtn; -#if(0) +#if (0) device_printf(sc->dev, "envy24chan_getcaps()\n"); #endif snd_mtxlock(sc->lock); @@ -1904,8 +1993,7 @@ rtn = &envy24_playcaps; else rtn = &sc->caps[0]; - } - else { + } else { if (sc->run[1] == 0) rtn = &envy24_reccaps; else @@ -1916,17 +2004,15 @@ return rtn; } -static kobj_method_t envy24chan_methods[] = { - KOBJMETHOD(channel_init, envy24chan_init), - KOBJMETHOD(channel_free, envy24chan_free), - KOBJMETHOD(channel_setformat, envy24chan_setformat), - KOBJMETHOD(channel_setspeed, envy24chan_setspeed), - KOBJMETHOD(channel_setblocksize, envy24chan_setblocksize), - KOBJMETHOD(channel_trigger, envy24chan_trigger), - KOBJMETHOD(channel_getptr, envy24chan_getptr), - KOBJMETHOD(channel_getcaps, envy24chan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t envy24chan_methods[] = { KOBJMETHOD(channel_init, + envy24chan_init), + KOBJMETHOD(channel_free, envy24chan_free), + KOBJMETHOD(channel_setformat, envy24chan_setformat), + KOBJMETHOD(channel_setspeed, envy24chan_setspeed), + KOBJMETHOD(channel_setblocksize, envy24chan_setblocksize), + KOBJMETHOD(channel_trigger, envy24chan_trigger), + KOBJMETHOD(channel_getptr, envy24chan_getptr), + KOBJMETHOD(channel_getcaps, envy24chan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(envy24chan); /* -------------------------------------------------------------------- */ @@ -1938,7 +2024,7 @@ { struct sc_info *sc = mix_getdevinfo(m); -#if(0) +#if (0) device_printf(sc->dev, "envy24mixer_init()\n"); #endif if (sc == NULL) @@ -1962,7 +2048,7 @@ if (sc == NULL) return -1; -#if(0) +#if (0) device_printf(sc->dev, "envy24mixer_reinit()\n"); #endif @@ -1976,7 +2062,7 @@ if (sc == NULL) return -1; -#if(0) +#if (0) device_printf(sc->dev, "envy24mixer_uninit()\n"); #endif @@ -1984,7 +2070,8 @@ } static int -envy24mixer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) +envy24mixer_set(struct snd_mixer *m, unsigned dev, unsigned left, + unsigned right) { struct sc_info *sc = mix_getdevinfo(m); int ch = envy24_mixmap[dev]; @@ -1998,18 +2085,18 @@ if (dev != 0 && ch == -1) return -1; hwch = envy24_chanmap[ch]; -#if(0) - device_printf(sc->dev, "envy24mixer_set(m, %d, %d, %d)\n", - dev, left, right); +#if (0) + device_printf(sc->dev, "envy24mixer_set(m, %d, %d, %d)\n", dev, left, + right); #endif snd_mtxlock(sc->lock); if (dev == 0) { for (i = 0; i < sc->dacn; i++) { - sc->cfg->codec->setvolume(sc->dac[i], PCMDIR_PLAY, left, right); + sc->cfg->codec->setvolume(sc->dac[i], PCMDIR_PLAY, left, + right); } - } - else { + } else { /* set volume value for hardware */ if ((sc->left[hwch] = 100 - left) > ENVY24_VOL_MIN) sc->left[hwch] = ENVY24_VOL_MUTE; @@ -2030,7 +2117,7 @@ { struct sc_info *sc = mix_getdevinfo(m); int ch = envy24_mixmap[src]; -#if(0) +#if (0) device_printf(sc->dev, "envy24mixer_setrecsrc(m, %d)\n", src); #endif @@ -2039,14 +2126,12 @@ return src; } -static kobj_method_t envy24mixer_methods[] = { - KOBJMETHOD(mixer_init, envy24mixer_init), - KOBJMETHOD(mixer_reinit, envy24mixer_reinit), - KOBJMETHOD(mixer_uninit, envy24mixer_uninit), - KOBJMETHOD(mixer_set, envy24mixer_set), - KOBJMETHOD(mixer_setrecsrc, envy24mixer_setrecsrc), - KOBJMETHOD_END -}; +static kobj_method_t envy24mixer_methods[] = { KOBJMETHOD(mixer_init, + envy24mixer_init), + KOBJMETHOD(mixer_reinit, envy24mixer_reinit), + KOBJMETHOD(mixer_uninit, envy24mixer_uninit), + KOBJMETHOD(mixer_set, envy24mixer_set), + KOBJMETHOD(mixer_setrecsrc, envy24mixer_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(envy24mixer); /* -------------------------------------------------------------------- */ @@ -2060,29 +2145,32 @@ u_int32_t ptr, dsize, feed; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24_intr()\n"); #endif snd_mtxlock(sc->lock); if (envy24_checkintr(sc, PCMDIR_PLAY)) { -#if(0) +#if (0) device_printf(sc->dev, "envy24_intr(): play\n"); #endif dsize = sc->psize / 4; ptr = dsize - envy24_rdmt(sc, ENVY24_MT_PCNT, 2) - 1; -#if(0) +#if (0) device_printf(sc->dev, "envy24_intr(): ptr = %d-->", ptr); #endif ptr -= ptr % sc->blk[0]; feed = (ptr + dsize - sc->intr[0]) % dsize; -#if(0) +#if (0) printf("%d intr = %d feed = %d\n", ptr, sc->intr[0], feed); #endif - for (i = ENVY24_CHAN_PLAY_DAC1; i <= ENVY24_CHAN_PLAY_SPDIF; i++) { + for (i = ENVY24_CHAN_PLAY_DAC1; i <= ENVY24_CHAN_PLAY_SPDIF; + i++) { ch = &sc->chan[i]; -#if(0) +#if (0) if (ch->run) - device_printf(sc->dev, "envy24_intr(): chan[%d].blk = %d\n", i, ch->blk); + device_printf(sc->dev, + "envy24_intr(): chan[%d].blk = %d\n", i, + ch->blk); #endif if (ch->run && ch->blk <= feed) { snd_mtxunlock(sc->lock); @@ -2094,14 +2182,15 @@ envy24_updintr(sc, PCMDIR_PLAY); } if (envy24_checkintr(sc, PCMDIR_REC)) { -#if(0) +#if (0) device_printf(sc->dev, "envy24_intr(): rec\n"); #endif dsize = sc->rsize / 4; ptr = dsize - envy24_rdmt(sc, ENVY24_MT_RCNT, 2) - 1; ptr -= ptr % sc->blk[1]; feed = (ptr + dsize - sc->intr[1]) % dsize; - for (i = ENVY24_CHAN_REC_ADC1; i <= ENVY24_CHAN_REC_SPDIF; i++) { + for (i = ENVY24_CHAN_REC_ADC1; i <= ENVY24_CHAN_REC_SPDIF; + i++) { ch = &sc->chan[i]; if (ch->run && ch->blk <= feed) { snd_mtxunlock(sc->lock); @@ -2127,27 +2216,28 @@ u_int16_t sv, sd; int i; -#if(0) +#if (0) printf("envy24_pci_probe()\n"); #endif if (pci_get_device(dev) == PCID_ENVY24 && pci_get_vendor(dev) == PCIV_ENVY24) { sv = pci_get_subvendor(dev); sd = pci_get_subdevice(dev); - for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; i++) { + for (i = 0; + cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; + i++) { if (cfg_table[i].subvendor == sv && cfg_table[i].subdevice == sd) { break; } } device_set_desc(dev, cfg_table[i].name); -#if(0) +#if (0) printf("envy24_pci_probe(): return 0\n"); #endif return 0; - } - else { -#if(0) + } else { +#if (0) printf("envy24_pci_probe(): return ENXIO\n"); #endif return ENXIO; @@ -2160,12 +2250,11 @@ struct sc_info *sc = (struct sc_info *)arg; sc->paddr = segs->ds_addr; -#if(0) +#if (0) device_printf(sc->dev, "envy24_dmapsetmap()\n"); if (bootverbose) { printf("envy24(play): setmap %lx, %lx; ", - (unsigned long)segs->ds_addr, - (unsigned long)segs->ds_len); + (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len); printf("%p -> %lx\n", sc->pmap, sc->paddr); } #endif @@ -2177,12 +2266,11 @@ struct sc_info *sc = (struct sc_info *)arg; sc->raddr = segs->ds_addr; -#if(0) +#if (0) device_printf(sc->dev, "envy24_dmarsetmap()\n"); if (bootverbose) { printf("envy24(record): setmap %lx, %lx; ", - (unsigned long)segs->ds_addr, - (unsigned long)segs->ds_len); + (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len); printf("%p -> %lx\n", sc->rmap, sc->raddr); } #endif @@ -2191,16 +2279,20 @@ static void envy24_dmafree(struct sc_info *sc) { -#if(0) +#if (0) device_printf(sc->dev, "envy24_dmafree():"); printf(" sc->raddr(0x%08x)", (u_int32_t)sc->raddr); printf(" sc->paddr(0x%08x)", (u_int32_t)sc->paddr); - if (sc->rbuf) printf(" sc->rbuf(0x%08x)", (u_int32_t)sc->rbuf); - else printf(" sc->rbuf(null)"); - if (sc->pbuf) printf(" sc->pbuf(0x%08x)\n", (u_int32_t)sc->pbuf); - else printf(" sc->pbuf(null)\n"); + if (sc->rbuf) + printf(" sc->rbuf(0x%08x)", (u_int32_t)sc->rbuf); + else + printf(" sc->rbuf(null)"); + if (sc->pbuf) + printf(" sc->pbuf(0x%08x)\n", (u_int32_t)sc->pbuf); + else + printf(" sc->pbuf(null)\n"); #endif -#if(0) +#if (0) if (sc->raddr) bus_dmamap_unload(sc->dmat, sc->rmap); if (sc->paddr) @@ -2227,7 +2319,7 @@ envy24_dmainit(struct sc_info *sc) { -#if(0) +#if (0) device_printf(sc->dev, "envy24_dmainit()\n"); #endif /* init values */ @@ -2239,49 +2331,57 @@ sc->blk[0] = sc->blk[1] = 0; /* allocate DMA buffer */ -#if(0) - device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_alloc(): sc->pbuf\n"); +#if (0) + device_printf(sc->dev, + "envy24_dmainit(): bus_dmamem_alloc(): sc->pbuf\n"); #endif - if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf, BUS_DMA_NOWAIT, &sc->pmap)) + if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf, BUS_DMA_NOWAIT, + &sc->pmap)) goto bad; -#if(0) - device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_alloc(): sc->rbuf\n"); +#if (0) + device_printf(sc->dev, + "envy24_dmainit(): bus_dmamem_alloc(): sc->rbuf\n"); #endif - if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf, BUS_DMA_NOWAIT, &sc->rmap)) + if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf, BUS_DMA_NOWAIT, + &sc->rmap)) goto bad; -#if(0) - device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_load(): sc->pmap\n"); +#if (0) + device_printf(sc->dev, + "envy24_dmainit(): bus_dmamem_load(): sc->pmap\n"); #endif if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->psize, - envy24_dmapsetmap, sc, BUS_DMA_NOWAIT)) + envy24_dmapsetmap, sc, BUS_DMA_NOWAIT)) goto bad; -#if(0) - device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_load(): sc->rmap\n"); +#if (0) + device_printf(sc->dev, + "envy24_dmainit(): bus_dmamem_load(): sc->rmap\n"); #endif if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->rsize, - envy24_dmarsetmap, sc, BUS_DMA_NOWAIT)) + envy24_dmarsetmap, sc, BUS_DMA_NOWAIT)) goto bad; bzero(sc->pbuf, sc->psize); bzero(sc->rbuf, sc->rsize); /* set values to register */ -#if(0) +#if (0) device_printf(sc->dev, "paddr(0x%08x)\n", sc->paddr); #endif envy24_wrmt(sc, ENVY24_MT_PADDR, sc->paddr, 4); -#if(0) - device_printf(sc->dev, "PADDR-->(0x%08x)\n", envy24_rdmt(sc, ENVY24_MT_PADDR, 4)); +#if (0) + device_printf(sc->dev, "PADDR-->(0x%08x)\n", + envy24_rdmt(sc, ENVY24_MT_PADDR, 4)); device_printf(sc->dev, "psize(%ld)\n", sc->psize / 4 - 1); #endif envy24_wrmt(sc, ENVY24_MT_PCNT, sc->psize / 4 - 1, 2); -#if(0) - device_printf(sc->dev, "PCNT-->(%ld)\n", envy24_rdmt(sc, ENVY24_MT_PCNT, 2)); +#if (0) + device_printf(sc->dev, "PCNT-->(%ld)\n", + envy24_rdmt(sc, ENVY24_MT_PCNT, 2)); #endif envy24_wrmt(sc, ENVY24_MT_RADDR, sc->raddr, 4); envy24_wrmt(sc, ENVY24_MT_RCNT, sc->rsize / 4 - 1, 2); return 0; - bad: +bad: envy24_dmafree(sc); return ENOSPC; } @@ -2333,8 +2433,7 @@ else printf("split"); printf(")\n"); - } - else { + } else { printf("I2S("); if (sc->cfg->i2s & PCIM_I2S_VOL) printf("with volume, "); @@ -2375,18 +2474,19 @@ envy24_init(struct sc_info *sc) { u_int32_t data; -#if(0) +#if (0) int rtn; #endif int i; u_int32_t sv, sd; -#if(0) +#if (0) device_printf(sc->dev, "envy24_init()\n"); #endif /* reset chip */ - envy24_wrcs(sc, ENVY24_CCS_CTL, ENVY24_CCS_CTL_RESET | ENVY24_CCS_CTL_NATIVE, 1); + envy24_wrcs(sc, ENVY24_CCS_CTL, + ENVY24_CCS_CTL_RESET | ENVY24_CCS_CTL_NATIVE, 1); DELAY(200); envy24_wrcs(sc, ENVY24_CCS_CTL, ENVY24_CCS_CTL_NATIVE, 1); DELAY(200); @@ -2398,13 +2498,16 @@ /* check system configuration */ sc->cfg = NULL; - for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; i++) { + for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; + i++) { /* 1st: search configuration from table */ sv = pci_get_subvendor(sc->dev); sd = pci_get_subdevice(sc->dev); - if (sv == cfg_table[i].subvendor && sd == cfg_table[i].subdevice) { -#if(0) - device_printf(sc->dev, "Set configuration from table\n"); + if (sv == cfg_table[i].subvendor && + sd == cfg_table[i].subdevice) { +#if (0) + device_printf(sc->dev, + "Set configuration from table\n"); #endif sc->cfg = &cfg_table[i]; break; @@ -2434,12 +2537,13 @@ sc->cfg->codec->init(sc->adc[i]); } for (i = 0; i < sc->dacn; i++) { - sc->dac[i] = sc->cfg->codec->create(sc->dev, sc, PCMDIR_PLAY, i); + sc->dac[i] = sc->cfg->codec->create(sc->dev, sc, PCMDIR_PLAY, + i); sc->cfg->codec->init(sc->dac[i]); } /* initialize DMA buffer */ -#if(0) +#if (0) device_printf(sc->dev, "envy24_init(): initialize DMA buffer\n"); #endif if (envy24_dmainit(sc)) @@ -2455,13 +2559,14 @@ /* set channel router */ envy24_route(sc, ENVY24_ROUTE_DAC_1, ENVY24_ROUTE_CLASS_MIX, 0, 0); envy24_route(sc, ENVY24_ROUTE_DAC_SPDIF, ENVY24_ROUTE_CLASS_DMA, 0, 0); - /* envy24_route(sc, ENVY24_ROUTE_DAC_SPDIF, ENVY24_ROUTE_CLASS_MIX, 0, 0); */ + /* envy24_route(sc, ENVY24_ROUTE_DAC_SPDIF, ENVY24_ROUTE_CLASS_MIX, 0, + * 0); */ /* set macro interrupt mask */ data = envy24_rdcs(sc, ENVY24_CCS_IMASK, 1); envy24_wrcs(sc, ENVY24_CCS_IMASK, data & ~ENVY24_CCS_IMASK_PMT, 1); data = envy24_rdcs(sc, ENVY24_CCS_IMASK, 1); -#if(0) +#if (0) device_printf(sc->dev, "envy24_init(): CCS_IMASK-->0x%02x\n", data); #endif @@ -2473,17 +2578,17 @@ { /* allocate I/O port resource */ sc->csid = PCIR_CCS; - sc->cs = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, - &sc->csid, RF_ACTIVE); + sc->cs = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, &sc->csid, + RF_ACTIVE); sc->ddmaid = PCIR_DDMA; - sc->ddma = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, - &sc->ddmaid, RF_ACTIVE); + sc->ddma = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, &sc->ddmaid, + RF_ACTIVE); sc->dsid = PCIR_DS; - sc->ds = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, - &sc->dsid, RF_ACTIVE); + sc->ds = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, &sc->dsid, + RF_ACTIVE); sc->mtid = PCIR_MT; - sc->mt = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, - &sc->mtid, RF_ACTIVE); + sc->mt = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, &sc->mtid, + RF_ACTIVE); if (!sc->cs || !sc->ddma || !sc->ds || !sc->mt) { device_printf(sc->dev, "unable to map IO port space\n"); return ENXIO; @@ -2496,7 +2601,7 @@ sc->dsh = rman_get_bushandle(sc->ds); sc->mtt = rman_get_bustag(sc->mt); sc->mth = rman_get_bushandle(sc->mt); -#if(0) +#if (0) device_printf(sc->dev, "IO port register values\nCCS: 0x%lx\nDDMA: 0x%lx\nDS: 0x%lx\nMT: 0x%lx\n", pci_read_config(sc->dev, PCIR_CCS, 4), @@ -2508,24 +2613,25 @@ /* allocate interrupt resource */ sc->irqid = 0; sc->irq = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &sc->irqid, - RF_ACTIVE | RF_SHAREABLE); + RF_ACTIVE | RF_SHAREABLE); if (!sc->irq || - snd_setup_intr(sc->dev, sc->irq, INTR_MPSAFE, envy24_intr, sc, &sc->ih)) { + snd_setup_intr(sc->dev, sc->irq, INTR_MPSAFE, envy24_intr, sc, + &sc->ih)) { device_printf(sc->dev, "unable to map interrupt\n"); return ENXIO; } /* allocate DMA resource */ - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(sc->dev), - /*alignment*/4, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_ENVY24, - /*highaddr*/BUS_SPACE_MAXADDR_ENVY24, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/BUS_SPACE_MAXSIZE_ENVY24, - /*nsegments*/1, /*maxsegsz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, /*lockarg*/NULL, - &sc->dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(sc->dev), + /*alignment*/ 4, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_ENVY24, + /*highaddr*/ BUS_SPACE_MAXADDR_ENVY24, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ BUS_SPACE_MAXSIZE_ENVY24, + /*nsegments*/ 1, /*maxsegsz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, /*lockarg*/ NULL, + &sc->dmat) != 0) { device_printf(sc->dev, "unable to create dma tag\n"); return ENXIO; } @@ -2536,12 +2642,12 @@ static int envy24_pci_attach(device_t dev) { - struct sc_info *sc; - char status[SND_STATUSLEN]; - int err = 0; - int i; + struct sc_info *sc; + char status[SND_STATUSLEN]; + int err = 0; + int i; -#if(0) +#if (0) device_printf(dev, "envy24_pci_attach()\n"); #endif /* get sc_info data area */ @@ -2614,11 +2720,11 @@ if (sc->dmat) bus_dma_tag_destroy(sc->dmat); if (sc->cfg->codec->destroy != NULL) { - for (i = 0; i < sc->adcn; i++) - sc->cfg->codec->destroy(sc->adc[i]); - for (i = 0; i < sc->dacn; i++) - sc->cfg->codec->destroy(sc->dac[i]); - } + for (i = 0; i < sc->adcn; i++) + sc->cfg->codec->destroy(sc->adc[i]); + for (i = 0; i < sc->dacn; i++) + sc->cfg->codec->destroy(sc->dac[i]); + } envy24_cfgfree(sc->cfg); if (sc->cs) bus_release_resource(dev, SYS_RES_IOPORT, sc->csid, sc->cs); @@ -2641,7 +2747,7 @@ int r; int i; -#if(0) +#if (0) device_printf(dev, "envy24_pci_detach()\n"); #endif sc = pcm_getdevinfo(dev); @@ -2673,10 +2779,9 @@ static device_method_t envy24_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, envy24_pci_probe), - DEVMETHOD(device_attach, envy24_pci_attach), - DEVMETHOD(device_detach, envy24_pci_detach), - { 0, 0 } + DEVMETHOD(device_probe, envy24_pci_probe), + DEVMETHOD(device_attach, envy24_pci_attach), + DEVMETHOD(device_detach, envy24_pci_detach), { 0, 0 } }; static driver_t envy24_driver = { Index: sys/dev/sound/pci/envy24ht.h =================================================================== --- sys/dev/sound/pci/envy24ht.h +++ sys/dev/sound/pci/envy24ht.h @@ -33,119 +33,130 @@ #define PCIV_ENVY24 0x1412 #define PCID_ENVY24HT 0x1724 -#define PCIR_CCS 0x10 /* Controller I/O Base Address */ -#define ENVY24HT_PCIR_MT 0x14 /* Multi-Track I/O Base Address */ +#define PCIR_CCS 0x10 /* Controller I/O Base Address */ +#define ENVY24HT_PCIR_MT 0x14 /* Multi-Track I/O Base Address */ /* Controller Registers */ -#define ENVY24HT_CCS_CTL 0x00 /* Control/Status Register */ -#define ENVY24HT_CCS_CTL_RESET 0x80 /* Entire Chip soft reset */ +#define ENVY24HT_CCS_CTL 0x00 /* Control/Status Register */ +#define ENVY24HT_CCS_CTL_RESET 0x80 /* Entire Chip soft reset */ -#define ENVY24HT_CCS_IMASK 0x01 /* Interrupt Mask Register */ -#define ENVY24HT_CCS_IMASK_PMT 0x10 /* Professional Multi-track */ +#define ENVY24HT_CCS_IMASK 0x01 /* Interrupt Mask Register */ +#define ENVY24HT_CCS_IMASK_PMT 0x10 /* Professional Multi-track */ -#define ENVY24HT_CCS_I2CDEV 0x10 /* I2C Port Device Address Register */ +#define ENVY24HT_CCS_I2CDEV 0x10 /* I2C Port Device Address Register */ #define ENVY24HT_CCS_I2CDEV_ADDR 0xfe /* I2C device address */ -#define ENVY24HT_CCS_I2CDEV_ROM 0xa0 /* reserved for the external I2C E2PROM */ -#define ENVY24HT_CCS_I2CDEV_WR 0x01 /* write */ -#define ENVY24HT_CCS_I2CDEV_RD 0x00 /* read */ +#define ENVY24HT_CCS_I2CDEV_ROM 0xa0 /* reserved for the external I2C E2PROM \ + */ +#define ENVY24HT_CCS_I2CDEV_WR 0x01 /* write */ +#define ENVY24HT_CCS_I2CDEV_RD 0x00 /* read */ -#define ENVY24HT_CCS_I2CADDR 0x11 /* I2C Port Byte Address Register */ -#define ENVY24HT_CCS_I2CDATA 0x12 /* I2C Port Read/Write Data Register */ +#define ENVY24HT_CCS_I2CADDR 0x11 /* I2C Port Byte Address Register */ +#define ENVY24HT_CCS_I2CDATA 0x12 /* I2C Port Read/Write Data Register */ -#define ENVY24HT_CCS_I2CSTAT 0x13 /* I2C Port Control and Status Register */ +#define ENVY24HT_CCS_I2CSTAT 0x13 /* I2C Port Control and Status Register */ #define ENVY24HT_CCS_I2CSTAT_ROM 0x80 /* external E2PROM exists */ #define ENVY24HT_CCS_I2CSTAT_BSY 0x01 /* I2C port read/write status busy */ -#define ENVY24HT_CCS_SCFG 0x04 /* System Configuration Register */ -#define ENVY24HT_CCSM_SCFG_XIN2 0xc0 /* XIN2 Clock Source Configuration */ - /* 00: 24.576MHz(96kHz*256) */ - /* 01: 49.152MHz(192kHz*256) */ - /* 1x: Reserved */ -#define ENVY24HT_CCSM_SCFG_MPU 0x20 /* 0(not implemented)/1(1) MPU-401 UART */ -#define ENVY24HT_CCSM_SCFG_ADC 0x0c /* 1-2 stereo ADC connected, S/PDIF receiver connected */ -#define ENVY24HT_CCSM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */ - -#define ENVY24HT_CCS_ACL 0x05 /* AC-Link Configuration Register */ -#define ENVY24HT_CCSM_ACL_MTC 0x80 /* Multi-track converter type: 0:AC'97 1:I2S */ -#define ENVY24HT_CCSM_ACL_OMODE 0x02 /* AC 97 codec SDATA_OUT 0:split 1:packed */ - -#define ENVY24HT_CCS_I2S 0x06 /* I2S Converters Features Register */ -#define ENVY24HT_CCSM_I2S_VOL 0x80 /* I2S codec Volume and mute */ -#define ENVY24HT_CCSM_I2S_96KHZ 0x40 /* I2S converter 96kHz sampling rate support */ -#define ENVY24HT_CCSM_I2S_192KHZ 0x08 /* I2S converter 192kHz sampling rate support */ -#define ENVY24HT_CCSM_I2S_RES 0x30 /* Converter resolution */ -#define ENVY24HT_CCSM_I2S_16BIT 0x00 /* 16bit */ -#define ENVY24HT_CCSM_I2S_18BIT 0x10 /* 18bit */ -#define ENVY24HT_CCSM_I2S_20BIT 0x20 /* 20bit */ -#define ENVY24HT_CCSM_I2S_24BIT 0x30 /* 24bit */ -#define ENVY24HT_CCSM_I2S_ID 0x07 /* Other I2S IDs */ +#define ENVY24HT_CCS_SCFG 0x04 /* System Configuration Register */ +#define ENVY24HT_CCSM_SCFG_XIN2 0xc0 /* XIN2 Clock Source Configuration */ + /* 00: 24.576MHz(96kHz*256) */ + /* 01: 49.152MHz(192kHz*256) */ + /* 1x: Reserved */ +#define ENVY24HT_CCSM_SCFG_MPU 0x20 /* 0(not implemented)/1(1) MPU-401 UART */ +#define ENVY24HT_CCSM_SCFG_ADC \ + 0x0c /* 1-2 stereo ADC connected, S/PDIF receiver connected */ +#define ENVY24HT_CCSM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */ + +#define ENVY24HT_CCS_ACL 0x05 /* AC-Link Configuration Register */ +#define ENVY24HT_CCSM_ACL_MTC \ + 0x80 /* Multi-track converter type: 0:AC'97 1:I2S */ +#define ENVY24HT_CCSM_ACL_OMODE \ + 0x02 /* AC 97 codec SDATA_OUT 0:split 1:packed */ + +#define ENVY24HT_CCS_I2S 0x06 /* I2S Converters Features Register */ +#define ENVY24HT_CCSM_I2S_VOL 0x80 /* I2S codec Volume and mute */ +#define ENVY24HT_CCSM_I2S_96KHZ \ + 0x40 /* I2S converter 96kHz sampling rate support */ +#define ENVY24HT_CCSM_I2S_192KHZ \ + 0x08 /* I2S converter 192kHz sampling rate support */ +#define ENVY24HT_CCSM_I2S_RES 0x30 /* Converter resolution */ +#define ENVY24HT_CCSM_I2S_16BIT 0x00 /* 16bit */ +#define ENVY24HT_CCSM_I2S_18BIT 0x10 /* 18bit */ +#define ENVY24HT_CCSM_I2S_20BIT 0x20 /* 20bit */ +#define ENVY24HT_CCSM_I2S_24BIT 0x30 /* 24bit */ +#define ENVY24HT_CCSM_I2S_ID 0x07 /* Other I2S IDs */ #define ENVY24HT_CCS_SPDIF 0x07 /* S/PDIF Configuration Register */ -#define ENVY24HT_CCSM_SPDIF_INT_EN 0x80 /* Enable integrated S/PDIF transmitter */ -#define ENVY24HT_CCSM_SPDIF_INT_OUT 0x40 /* Internal S/PDIF Out implemented */ -#define ENVY24HT_CCSM_SPDIF_ID 0x3c /* S/PDIF chip ID */ -#define ENVY24HT_CCSM_SPDIF_IN 0x02 /* S/PDIF Stereo In is present */ -#define ENVY24HT_CCSM_SPDIF_OUT 0x01 /* External S/PDIF Out implemented */ +#define ENVY24HT_CCSM_SPDIF_INT_EN \ + 0x80 /* Enable integrated S/PDIF transmitter */ +#define ENVY24HT_CCSM_SPDIF_INT_OUT 0x40 /* Internal S/PDIF Out implemented */ +#define ENVY24HT_CCSM_SPDIF_ID 0x3c /* S/PDIF chip ID */ +#define ENVY24HT_CCSM_SPDIF_IN 0x02 /* S/PDIF Stereo In is present */ +#define ENVY24HT_CCSM_SPDIF_OUT 0x01 /* External S/PDIF Out implemented */ /* Professional Multi-Track Control Registers */ -#define ENVY24HT_MT_INT_STAT 0x00 /* DMA Interrupt Mask and Status Register */ -#define ENVY24HT_MT_INT_RSTAT 0x02 /* Multi-track record interrupt status */ -#define ENVY24HT_MT_INT_PSTAT 0x01 /* Multi-track playback interrupt status */ -#define ENVY24HT_MT_INT_MASK 0x03 -#define ENVY24HT_MT_INT_RMASK 0x02 /* Multi-track record interrupt mask */ -#define ENVY24HT_MT_INT_PMASK 0x01 /* Multi-track playback interrupt mask */ - -#define ENVY24HT_MT_RATE 0x01 /* Sampling Rate Select Register */ -#define ENVY24HT_MT_RATE_SPDIF 0x10 /* S/PDIF input clock as the master */ -#define ENVY24HT_MT_RATE_48000 0x00 -#define ENVY24HT_MT_RATE_24000 0x01 -#define ENVY24HT_MT_RATE_12000 0x02 -#define ENVY24HT_MT_RATE_9600 0x03 -#define ENVY24HT_MT_RATE_32000 0x04 -#define ENVY24HT_MT_RATE_16000 0x05 -#define ENVY24HT_MT_RATE_8000 0x06 -#define ENVY24HT_MT_RATE_96000 0x07 +#define ENVY24HT_MT_INT_STAT 0x00 /* DMA Interrupt Mask and Status Register */ +#define ENVY24HT_MT_INT_RSTAT 0x02 /* Multi-track record interrupt status */ +#define ENVY24HT_MT_INT_PSTAT 0x01 /* Multi-track playback interrupt status */ +#define ENVY24HT_MT_INT_MASK 0x03 +#define ENVY24HT_MT_INT_RMASK 0x02 /* Multi-track record interrupt mask */ +#define ENVY24HT_MT_INT_PMASK 0x01 /* Multi-track playback interrupt mask */ + +#define ENVY24HT_MT_RATE 0x01 /* Sampling Rate Select Register */ +#define ENVY24HT_MT_RATE_SPDIF 0x10 /* S/PDIF input clock as the master */ +#define ENVY24HT_MT_RATE_48000 0x00 +#define ENVY24HT_MT_RATE_24000 0x01 +#define ENVY24HT_MT_RATE_12000 0x02 +#define ENVY24HT_MT_RATE_9600 0x03 +#define ENVY24HT_MT_RATE_32000 0x04 +#define ENVY24HT_MT_RATE_16000 0x05 +#define ENVY24HT_MT_RATE_8000 0x06 +#define ENVY24HT_MT_RATE_96000 0x07 #define ENVY24HT_MT_RATE_192000 0x0e -#define ENVY24HT_MT_RATE_64000 0x0f -#define ENVY24HT_MT_RATE_44100 0x08 -#define ENVY24HT_MT_RATE_22050 0x09 -#define ENVY24HT_MT_RATE_11025 0x0a -#define ENVY24HT_MT_RATE_88200 0x0b +#define ENVY24HT_MT_RATE_64000 0x0f +#define ENVY24HT_MT_RATE_44100 0x08 +#define ENVY24HT_MT_RATE_22050 0x09 +#define ENVY24HT_MT_RATE_11025 0x0a +#define ENVY24HT_MT_RATE_88200 0x0b #define ENVY24HT_MT_RATE_176400 0x0c -#define ENVY24HT_MT_RATE_MASK 0x0f +#define ENVY24HT_MT_RATE_MASK 0x0f -#define ENVY24HT_MT_I2S 0x02 /* I2S Data Format Register */ -#define ENVY24HT_MT_I2S_MLR128 0x08 /* MCLK/LRCLK ratio 128x (or 256x) */ +#define ENVY24HT_MT_I2S 0x02 /* I2S Data Format Register */ +#define ENVY24HT_MT_I2S_MLR128 0x08 /* MCLK/LRCLK ratio 128x (or 256x) */ -#define ENVY24HT_MT_PADDR 0x10 /* Playback DMA Current/Base Address Register */ -#define ENVY24HT_MT_PCNT 0x14 /* Playback DMA Current/Base Count Register */ -#define ENVY24HT_MT_PTERM 0x1C /* Playback Current/Base Terminal Count Register */ +#define ENVY24HT_MT_PADDR 0x10 /* Playback DMA Current/Base Address Register \ + */ +#define ENVY24HT_MT_PCNT 0x14 /* Playback DMA Current/Base Count Register */ +#define ENVY24HT_MT_PTERM \ + 0x1C /* Playback Current/Base Terminal Count Register */ -#define ENVY24HT_MT_PCTL 0x18 /* Global Playback and Record DMA Start/Stop Register */ +#define ENVY24HT_MT_PCTL \ + 0x18 /* Global Playback and Record DMA Start/Stop Register */ #define ENVY24HT_MT_PCTL_RSTART 0x02 /* 1: Record start; 0: Record stop */ #define ENVY24HT_MT_PCTL_PSTART 0x01 /* 1: Playback start; 0: Playback stop */ -#define ENVY24HT_MT_RADDR 0x20 /* Record DMA Current/Base Address Register */ -#define ENVY24HT_MT_RCNT 0x24 /* Record DMA Current/Base Count Register */ -#define ENVY24HT_MT_RTERM 0x26 /* Record Current/Base Terminal Count Register */ +#define ENVY24HT_MT_RADDR 0x20 /* Record DMA Current/Base Address Register */ +#define ENVY24HT_MT_RCNT 0x24 /* Record DMA Current/Base Count Register */ +#define ENVY24HT_MT_RTERM 0x26 /* Record Current/Base Terminal Count Register \ + */ /* These map values are refferd from ALSA sound driver. */ /* ENVY24 configuration E2PROM map */ -#define ENVY24HT_E2PROM_SUBVENDOR 0x02 -#define ENVY24HT_E2PROM_SUBDEVICE 0x00 -#define ENVY24HT_E2PROM_SIZE 0x04 -#define ENVY24HT_E2PROM_VERSION 0x05 -#define ENVY24HT_E2PROM_SCFG 0x06 -#define ENVY24HT_E2PROM_ACL 0x07 -#define ENVY24HT_E2PROM_I2S 0x08 -#define ENVY24HT_E2PROM_SPDIF 0x09 -#define ENVY24HT_E2PROM_GPIOMASK 0x0d -#define ENVY24HT_E2PROM_GPIOSTATE 0x10 -#define ENVY24HT_E2PROM_GPIODIR 0x0a +#define ENVY24HT_E2PROM_SUBVENDOR 0x02 +#define ENVY24HT_E2PROM_SUBDEVICE 0x00 +#define ENVY24HT_E2PROM_SIZE 0x04 +#define ENVY24HT_E2PROM_VERSION 0x05 +#define ENVY24HT_E2PROM_SCFG 0x06 +#define ENVY24HT_E2PROM_ACL 0x07 +#define ENVY24HT_E2PROM_I2S 0x08 +#define ENVY24HT_E2PROM_SPDIF 0x09 +#define ENVY24HT_E2PROM_GPIOMASK 0x0d +#define ENVY24HT_E2PROM_GPIOSTATE 0x10 +#define ENVY24HT_E2PROM_GPIODIR 0x0a /* ENVY24 mixer channel defines */ /* @@ -153,26 +164,26 @@ able to use for this. If system has consumer AC'97 output, AC'97 line is used as master mixer, and it is able to control. */ -#define ENVY24HT_CHAN_NUM 11 /* Play * 5 + Record * 5 + Mix * 1 */ +#define ENVY24HT_CHAN_NUM 11 /* Play * 5 + Record * 5 + Mix * 1 */ -#define ENVY24HT_CHAN_PLAY_DAC1 0 -#define ENVY24HT_CHAN_PLAY_DAC2 1 -#define ENVY24HT_CHAN_PLAY_DAC3 2 -#define ENVY24HT_CHAN_PLAY_DAC4 3 +#define ENVY24HT_CHAN_PLAY_DAC1 0 +#define ENVY24HT_CHAN_PLAY_DAC2 1 +#define ENVY24HT_CHAN_PLAY_DAC3 2 +#define ENVY24HT_CHAN_PLAY_DAC4 3 #define ENVY24HT_CHAN_PLAY_SPDIF 4 -#define ENVY24HT_CHAN_REC_ADC1 5 -#define ENVY24HT_CHAN_REC_ADC2 6 -#define ENVY24HT_CHAN_REC_ADC3 7 -#define ENVY24HT_CHAN_REC_ADC4 8 -#define ENVY24HT_CHAN_REC_SPDIF 9 -#define ENVY24HT_CHAN_REC_MIX 10 - -#define ENVY24HT_MIX_MASK 0x3fd +#define ENVY24HT_CHAN_REC_ADC1 5 +#define ENVY24HT_CHAN_REC_ADC2 6 +#define ENVY24HT_CHAN_REC_ADC3 7 +#define ENVY24HT_CHAN_REC_ADC4 8 +#define ENVY24HT_CHAN_REC_SPDIF 9 +#define ENVY24HT_CHAN_REC_MIX 10 + +#define ENVY24HT_MIX_MASK 0x3fd #define ENVY24HT_MIX_REC_MASK 0x3e0 /* volume value constants */ -#define ENVY24HT_VOL_MAX 0 /* 0db(negate) */ -#define ENVY24HT_VOL_MIN 96 /* -144db(negate) */ +#define ENVY24HT_VOL_MAX 0 /* 0db(negate) */ +#define ENVY24HT_VOL_MIN 96 /* -144db(negate) */ #define ENVY24HT_VOL_MUTE 127 /* mute */ #define BUS_SPACE_MAXSIZE_ENVY24 0x3fffc /* 64k x 4byte(1dword) */ Index: sys/dev/sound/pci/envy24ht.c =================================================================== --- sys/dev/sound/pci/envy24ht.c +++ sys/dev/sound/pci/envy24ht.c @@ -43,13 +43,12 @@ #include "opt_snd.h" #endif -#include -#include -#include -#include - #include #include +#include +#include +#include +#include #include "mixer_if.h" @@ -62,43 +61,43 @@ #define ENVY24HT_PLAY_CHNUM 8 #define ENVY24HT_REC_CHNUM 2 #define ENVY24HT_PLAY_BUFUNIT (4 /* byte/sample */ * 8 /* channel */) -#define ENVY24HT_REC_BUFUNIT (4 /* byte/sample */ * 2 /* channel */) -#define ENVY24HT_SAMPLE_NUM 4096 +#define ENVY24HT_REC_BUFUNIT (4 /* byte/sample */ * 2 /* channel */) +#define ENVY24HT_SAMPLE_NUM 4096 #define ENVY24HT_TIMEOUT 1000 -#define ENVY24HT_DEFAULT_FORMAT SND_FORMAT(AFMT_S16_LE, 2, 0) +#define ENVY24HT_DEFAULT_FORMAT SND_FORMAT(AFMT_S16_LE, 2, 0) #define ENVY24HT_NAMELEN 32 struct envy24ht_sample { - volatile u_int32_t buffer; + volatile u_int32_t buffer; }; typedef struct envy24ht_sample sample32_t; /* channel registers */ struct sc_chinfo { - struct snd_dbuf *buffer; - struct pcm_channel *channel; - struct sc_info *parent; - int dir; - unsigned num; /* hw channel number */ + struct snd_dbuf *buffer; + struct pcm_channel *channel; + struct sc_info *parent; + int dir; + unsigned num; /* hw channel number */ /* channel information */ - u_int32_t format; - u_int32_t speed; - u_int32_t blk; /* hw block size(dword) */ + u_int32_t format; + u_int32_t speed; + u_int32_t blk; /* hw block size(dword) */ /* format conversion structure */ - u_int8_t *data; - unsigned int size; /* data buffer size(byte) */ - int unit; /* sample size(byte) */ - unsigned int offset; /* samples number offset */ - void (*emldma)(struct sc_chinfo *); + u_int8_t *data; + unsigned int size; /* data buffer size(byte) */ + int unit; /* sample size(byte) */ + unsigned int offset; /* samples number offset */ + void (*emldma)(struct sc_chinfo *); /* flags */ - int run; + int run; }; /* codec interface entrys */ @@ -107,7 +106,8 @@ void (*destroy)(void *codec); void (*init)(void *codec); void (*reinit)(void *codec); - void (*setvolume)(void *codec, int dir, unsigned int left, unsigned int right); + void (*setvolume)(void *codec, int dir, unsigned int left, + unsigned int right); void (*setrate)(void *codec, int which, int rate); }; @@ -124,54 +124,54 @@ /* device private data */ struct sc_info { - device_t dev; - struct mtx *lock; + device_t dev; + struct mtx *lock; /* Control/Status registor */ struct resource *cs; - int csid; + int csid; bus_space_tag_t cst; bus_space_handle_t csh; /* MultiTrack registor */ struct resource *mt; - int mtid; + int mtid; bus_space_tag_t mtt; bus_space_handle_t mth; /* DMA tag */ bus_dma_tag_t dmat; /* IRQ resource */ struct resource *irq; - int irqid; - void *ih; + int irqid; + void *ih; /* system configuration data */ struct cfg_info *cfg; /* ADC/DAC number and info */ - int adcn, dacn; - void *adc[4], *dac[4]; + int adcn, dacn; + void *adc[4], *dac[4]; /* mixer control data */ - u_int32_t src; - u_int8_t left[ENVY24HT_CHAN_NUM]; - u_int8_t right[ENVY24HT_CHAN_NUM]; + u_int32_t src; + u_int8_t left[ENVY24HT_CHAN_NUM]; + u_int8_t right[ENVY24HT_CHAN_NUM]; /* Play/Record DMA fifo */ - sample32_t *pbuf; - sample32_t *rbuf; - u_int32_t psize, rsize; /* DMA buffer size(byte) */ - u_int16_t blk[2]; /* transfer check blocksize(dword) */ - bus_dmamap_t pmap, rmap; - bus_addr_t paddr, raddr; + sample32_t *pbuf; + sample32_t *rbuf; + u_int32_t psize, rsize; /* DMA buffer size(byte) */ + u_int16_t blk[2]; /* transfer check blocksize(dword) */ + bus_dmamap_t pmap, rmap; + bus_addr_t paddr, raddr; /* current status */ - u_int32_t speed; - int run[2]; - u_int16_t intr[2]; - struct pcmchan_caps caps[2]; + u_int32_t speed; + int run[2]; + u_int16_t intr[2]; + struct pcmchan_caps caps[2]; /* channel info table */ - unsigned chnum; + unsigned chnum; struct sc_chinfo chan[11]; }; @@ -189,7 +189,8 @@ static void envy24ht_r32sl(struct sc_chinfo *); /* channel interface */ -static void *envy24htchan_init(kobj_t, void *, struct snd_dbuf *, struct pcm_channel *, int); +static void *envy24htchan_init(kobj_t, void *, struct snd_dbuf *, + struct pcm_channel *, int); static int envy24htchan_setformat(kobj_t, void *, u_int32_t); static u_int32_t envy24htchan_setspeed(kobj_t, void *, u_int32_t); static u_int32_t envy24htchan_setblocksize(kobj_t, void *, u_int32_t); @@ -224,12 +225,12 @@ ENVY24HT_CHAN_PLAY_DAC3, /* 3 */ ENVY24HT_CHAN_PLAY_DAC4, /* 4 */ ENVY24HT_CHAN_PLAY_SPDIF, /* 0 */ - ENVY24HT_CHAN_REC_MIX, /* 5 */ + ENVY24HT_CHAN_REC_MIX, /* 5 */ ENVY24HT_CHAN_REC_SPDIF, /* 6 */ - ENVY24HT_CHAN_REC_ADC1, /* 7 */ - ENVY24HT_CHAN_REC_ADC2, /* 8 */ - ENVY24HT_CHAN_REC_ADC3, /* 9 */ - ENVY24HT_CHAN_REC_ADC4, /* 10 */ + ENVY24HT_CHAN_REC_ADC1, /* 7 */ + ENVY24HT_CHAN_REC_ADC2, /* 8 */ + ENVY24HT_CHAN_REC_ADC3, /* 9 */ + ENVY24HT_CHAN_REC_ADC4, /* 10 */ }; /* mixer -> API channel map. see above */ @@ -262,192 +263,315 @@ }; /* variable rate audio */ -static u_int32_t envy24ht_speed[] = { - 192000, 176400, 96000, 88200, 64000, 48000, 44100, 32000, 24000, 22050, 16000, - 12000, 11025, 9600, 8000, 0 -}; +static u_int32_t envy24ht_speed[] = { 192000, 176400, 96000, 88200, 64000, + 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 9600, 8000, 0 }; /* known boards configuration */ static struct codec_entry spi_codec = { - envy24ht_spi_create, - envy24ht_spi_destroy, - envy24ht_spi_init, - envy24ht_spi_reinit, - envy24ht_spi_setvolume, - NULL, /* setrate */ + envy24ht_spi_create, envy24ht_spi_destroy, envy24ht_spi_init, + envy24ht_spi_reinit, envy24ht_spi_setvolume, NULL, /* setrate */ }; static struct cfg_info cfg_table[] = { { - "Envy24HT audio (Terratec Aureon 7.1 Space)", - 0x153b, 0x1145, - 0x0b, 0x80, 0xfc, 0xc3, - 0x21efff, 0x7fffff, 0x5e1000, - 0x40000, 0x80000, 0x1000, 0x00, 0x02, - 0, - &spi_codec, + "Envy24HT audio (Terratec Aureon 7.1 Space)", + 0x153b, + 0x1145, + 0x0b, + 0x80, + 0xfc, + 0xc3, + 0x21efff, + 0x7fffff, + 0x5e1000, + 0x40000, + 0x80000, + 0x1000, + 0x00, + 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (Terratec Aureon 5.1 Sky)", + 0x153b, + 0x1147, + 0x0a, + 0x80, + 0xfc, + 0xc3, + 0x21efff, + 0x7fffff, + 0x5e1000, + 0x40000, + 0x80000, + 0x1000, + 0x00, + 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (Terratec Aureon 7.1 Universe)", + 0x153b, + 0x1153, + 0x0b, + 0x80, + 0xfc, + 0xc3, + 0x21efff, + 0x7fffff, + 0x5e1000, + 0x40000, + 0x80000, + 0x1000, + 0x00, + 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (AudioTrak Prodigy 7.1)", + 0x4933, + 0x4553, + 0x0b, + 0x80, + 0xfc, + 0xc3, + 0x21efff, + 0x7fffff, + 0x5e1000, + 0x40000, + 0x80000, + 0x1000, + 0x00, + 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (Terratec PHASE 28)", + 0x153b, + 0x1149, + 0x0b, + 0x80, + 0xfc, + 0xc3, + 0x21efff, + 0x7fffff, + 0x5e1000, + 0x40000, + 0x80000, + 0x1000, + 0x00, + 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT-S audio (Terratec PHASE 22)", + 0x153b, + 0x1150, + 0x10, + 0x80, + 0xf0, + 0xc3, + 0x7ffbc7, + 0x7fffff, + 0x438, + 0x10, + 0x20, + 0x400, + 0x01, + 0x00, + 0, + &spi_codec, + }, + { + "Envy24HT audio (AudioTrak Prodigy 7.1 LT)", + 0x3132, + 0x4154, + 0x4b, + 0x80, + 0xfc, + 0xc3, + 0x7ff8ff, + 0x7fffff, + 0x700, + 0x400, + 0x200, + 0x100, + 0x00, + 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (AudioTrak Prodigy 7.1 XT)", + 0x3136, + 0x4154, + 0x4b, + 0x80, + 0xfc, + 0xc3, + 0x7ff8ff, + 0x7fffff, + 0x700, + 0x400, + 0x200, + 0x100, + 0x00, + 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (M-Audio Revolution 7.1)", + 0x1412, + 0x3630, + 0x43, + 0x80, + 0xf8, + 0xc1, + 0x3fff85, + 0x400072, + 0x4000fa, + 0x08, + 0x02, + 0x20, + 0x00, + 0x04, + 0, + &spi_codec, + }, + { + "Envy24GT audio (M-Audio Revolution 5.1)", + 0x1412, + 0x3631, + 0x42, + 0x80, + 0xf8, + 0xc1, + 0x3fff05, + 0x4000f0, + 0x4000fa, + 0x08, + 0x02, + 0x10, + 0x00, + 0x03, + 0, + &spi_codec, + }, + { + "Envy24HT audio (M-Audio Audiophile 192)", + 0x1412, + 0x3632, + 0x68, + 0x80, + 0xf8, + 0xc3, + 0x45, + 0x4000b5, + 0x7fffba, + 0x08, + 0x02, + 0x10, + 0x00, + 0x03, + 0, + &spi_codec, + }, + { + "Envy24HT audio (AudioTrak Prodigy HD2)", + 0x3137, + 0x4154, + 0x68, + 0x80, + 0x78, + 0xc3, + 0xfff8ff, + 0x200700, + 0xdfffff, + 0x400, + 0x200, + 0x100, + 0x00, + 0x05, + 0, + &spi_codec, + }, + { + "Envy24HT audio (ESI Juli@)", + 0x3031, + 0x4553, + 0x20, + 0x80, + 0xf8, + 0xc3, + 0x7fff9f, + 0x8016, + 0x7fff9f, + 0x08, + 0x02, + 0x10, + 0x00, + 0x03, + 0, + &spi_codec, }, - { - "Envy24HT audio (Terratec Aureon 5.1 Sky)", - 0x153b, 0x1147, - 0x0a, 0x80, 0xfc, 0xc3, - 0x21efff, 0x7fffff, 0x5e1000, - 0x40000, 0x80000, 0x1000, 0x00, 0x02, - 0, - &spi_codec, - }, - { - "Envy24HT audio (Terratec Aureon 7.1 Universe)", - 0x153b, 0x1153, - 0x0b, 0x80, 0xfc, 0xc3, - 0x21efff, 0x7fffff, 0x5e1000, - 0x40000, 0x80000, 0x1000, 0x00, 0x02, - 0, - &spi_codec, - }, - { - "Envy24HT audio (AudioTrak Prodigy 7.1)", - 0x4933, 0x4553, - 0x0b, 0x80, 0xfc, 0xc3, - 0x21efff, 0x7fffff, 0x5e1000, - 0x40000, 0x80000, 0x1000, 0x00, 0x02, - 0, - &spi_codec, - }, - { - "Envy24HT audio (Terratec PHASE 28)", - 0x153b, 0x1149, - 0x0b, 0x80, 0xfc, 0xc3, - 0x21efff, 0x7fffff, 0x5e1000, - 0x40000, 0x80000, 0x1000, 0x00, 0x02, - 0, - &spi_codec, - }, - { - "Envy24HT-S audio (Terratec PHASE 22)", - 0x153b, 0x1150, - 0x10, 0x80, 0xf0, 0xc3, - 0x7ffbc7, 0x7fffff, 0x438, - 0x10, 0x20, 0x400, 0x01, 0x00, - 0, - &spi_codec, - }, - { - "Envy24HT audio (AudioTrak Prodigy 7.1 LT)", - 0x3132, 0x4154, - 0x4b, 0x80, 0xfc, 0xc3, - 0x7ff8ff, 0x7fffff, 0x700, - 0x400, 0x200, 0x100, 0x00, 0x02, - 0, - &spi_codec, - }, - { - "Envy24HT audio (AudioTrak Prodigy 7.1 XT)", - 0x3136, 0x4154, - 0x4b, 0x80, 0xfc, 0xc3, - 0x7ff8ff, 0x7fffff, 0x700, - 0x400, 0x200, 0x100, 0x00, 0x02, - 0, - &spi_codec, - }, - { - "Envy24HT audio (M-Audio Revolution 7.1)", - 0x1412, 0x3630, - 0x43, 0x80, 0xf8, 0xc1, - 0x3fff85, 0x400072, 0x4000fa, - 0x08, 0x02, 0x20, 0x00, 0x04, - 0, - &spi_codec, - }, - { - "Envy24GT audio (M-Audio Revolution 5.1)", - 0x1412, 0x3631, - 0x42, 0x80, 0xf8, 0xc1, - 0x3fff05, 0x4000f0, 0x4000fa, - 0x08, 0x02, 0x10, 0x00, 0x03, - 0, - &spi_codec, - }, - { - "Envy24HT audio (M-Audio Audiophile 192)", - 0x1412, 0x3632, - 0x68, 0x80, 0xf8, 0xc3, - 0x45, 0x4000b5, 0x7fffba, - 0x08, 0x02, 0x10, 0x00, 0x03, - 0, - &spi_codec, - }, - { - "Envy24HT audio (AudioTrak Prodigy HD2)", - 0x3137, 0x4154, - 0x68, 0x80, 0x78, 0xc3, - 0xfff8ff, 0x200700, 0xdfffff, - 0x400, 0x200, 0x100, 0x00, 0x05, - 0, - &spi_codec, - }, - { - "Envy24HT audio (ESI Juli@)", - 0x3031, 0x4553, - 0x20, 0x80, 0xf8, 0xc3, - 0x7fff9f, 0x8016, 0x7fff9f, - 0x08, 0x02, 0x10, 0x00, 0x03, - 0, - &spi_codec, - }, { - "Envy24HT-S audio (Terrasoniq TS22PCI)", - 0x153b, 0x117b, - 0x10, 0x80, 0xf0, 0xc3, - 0x7ffbc7, 0x7fffff, 0x438, - 0x10, 0x20, 0x400, 0x01, 0x00, - 0, - &spi_codec, + "Envy24HT-S audio (Terrasoniq TS22PCI)", + 0x153b, + 0x117b, + 0x10, + 0x80, + 0xf0, + 0xc3, + 0x7ffbc7, + 0x7fffff, + 0x438, + 0x10, + 0x20, + 0x400, + 0x01, + 0x00, + 0, + &spi_codec, }, { - "Envy24HT audio (Generic)", - 0, 0, - 0x0b, 0x80, 0xfc, 0xc3, - 0x21efff, 0x7fffff, 0x5e1000, - 0x40000, 0x80000, 0x1000, 0x00, 0x02, - 0, - &spi_codec, /* default codec routines */ + "Envy24HT audio (Generic)", 0, 0, 0x0b, 0x80, 0xfc, 0xc3, 0x21efff, + 0x7fffff, 0x5e1000, 0x40000, 0x80000, 0x1000, 0x00, 0x02, 0, + &spi_codec, /* default codec routines */ } }; -static u_int32_t envy24ht_recfmt[] = { - SND_FORMAT(AFMT_S16_LE, 2, 0), - SND_FORMAT(AFMT_S32_LE, 2, 0), - 0 -}; -static struct pcmchan_caps envy24ht_reccaps = {8000, 96000, envy24ht_recfmt, 0}; +static u_int32_t envy24ht_recfmt[] = { SND_FORMAT(AFMT_S16_LE, 2, 0), + SND_FORMAT(AFMT_S32_LE, 2, 0), 0 }; +static struct pcmchan_caps envy24ht_reccaps = { 8000, 96000, envy24ht_recfmt, + 0 }; -static u_int32_t envy24ht_playfmt[] = { - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - SND_FORMAT(AFMT_S32_LE, 2, 0), - 0 -}; +static u_int32_t envy24ht_playfmt[] = { SND_FORMAT(AFMT_U8, 2, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), SND_FORMAT(AFMT_S32_LE, 2, 0), 0 }; -static struct pcmchan_caps envy24ht_playcaps = {8000, 192000, envy24ht_playfmt, 0}; +static struct pcmchan_caps envy24ht_playcaps = { 8000, 192000, envy24ht_playfmt, + 0 }; struct envy24ht_emldma { - u_int32_t format; - void (*emldma)(struct sc_chinfo *); - int unit; + u_int32_t format; + void (*emldma)(struct sc_chinfo *); + int unit; }; static struct envy24ht_emldma envy24ht_pemltab[] = { - {SND_FORMAT(AFMT_U8, 2, 0), envy24ht_p8u, 2}, - {SND_FORMAT(AFMT_S16_LE, 2, 0), envy24ht_p16sl, 4}, - {SND_FORMAT(AFMT_S32_LE, 2, 0), envy24ht_p32sl, 8}, - {0, NULL, 0} + { SND_FORMAT(AFMT_U8, 2, 0), envy24ht_p8u, 2 }, + { SND_FORMAT(AFMT_S16_LE, 2, 0), envy24ht_p16sl, 4 }, + { SND_FORMAT(AFMT_S32_LE, 2, 0), envy24ht_p32sl, 8 }, { 0, NULL, 0 } }; static struct envy24ht_emldma envy24ht_remltab[] = { - {SND_FORMAT(AFMT_S16_LE, 2, 0), envy24ht_r16sl, 4}, - {SND_FORMAT(AFMT_S32_LE, 2, 0), envy24ht_r32sl, 8}, - {0, NULL, 0} + { SND_FORMAT(AFMT_S16_LE, 2, 0), envy24ht_r16sl, 4 }, + { SND_FORMAT(AFMT_S32_LE, 2, 0), envy24ht_r32sl, 8 }, { 0, NULL, 0 } }; /* -------------------------------------------------------------------- */ @@ -525,8 +649,9 @@ u_int32_t data; int i; -#if(0) - device_printf(sc->dev, "envy24ht_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, addr); +#if (0) + device_printf(sc->dev, "envy24ht_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, + addr); #endif for (i = 0; i < ENVY24HT_TIMEOUT; i++) { data = envy24ht_rdcs(sc, ENVY24HT_CCS_I2CSTAT, 1); @@ -551,20 +676,22 @@ } data = envy24ht_rdcs(sc, ENVY24HT_CCS_I2CDATA, 1); -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_rdi2c(): return 0x%x\n", data); #endif return (int)data; } static int -envy24ht_wri2c(struct sc_info *sc, u_int32_t dev, u_int32_t addr, u_int32_t data) +envy24ht_wri2c(struct sc_info *sc, u_int32_t dev, u_int32_t addr, + u_int32_t data) { u_int32_t tmp; int i; -#if(0) - device_printf(sc->dev, "envy24ht_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, addr); +#if (0) + device_printf(sc->dev, "envy24ht_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, + addr); #endif for (i = 0; i < ENVY24HT_TIMEOUT; i++) { tmp = envy24ht_rdcs(sc, ENVY24HT_CCS_I2CSTAT, 1); @@ -597,13 +724,14 @@ { u_int32_t data; -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_rdrom(sc, 0x%02x)\n", addr); #endif data = envy24ht_rdcs(sc, ENVY24HT_CCS_I2CSTAT, 1); if ((data & ENVY24HT_CCS_I2CSTAT_ROM) == 0) { -#if(0) - device_printf(sc->dev, "envy24ht_rdrom(): E2PROM not presented\n"); +#if (0) + device_printf(sc->dev, + "envy24ht_rdrom(): E2PROM not presented\n"); #endif return -1; } @@ -618,48 +746,55 @@ int size; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_rom2cfg(sc)\n"); #endif size = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SIZE); if ((size < ENVY24HT_E2PROM_GPIOSTATE + 3) || (size == 0x78)) { -#if(0) - device_printf(sc->dev, "envy24ht_rom2cfg(): ENVY24HT_E2PROM_SIZE-->%d\n", size); -#endif - buff = malloc(sizeof(*buff), M_ENVY24HT, M_NOWAIT); - if (buff == NULL) { -#if(0) - device_printf(sc->dev, "envy24ht_rom2cfg(): malloc()\n"); -#endif - return NULL; - } - buff->free = 1; - - /* no valid e2prom, using default values */ - buff->subvendor = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBVENDOR) << 8; - buff->subvendor += envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBVENDOR + 1); - buff->subdevice = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBDEVICE) << 8; - buff->subdevice += envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBDEVICE + 1); - buff->scfg = 0x0b; - buff->acl = 0x80; - buff->i2s = 0xfc; - buff->spdif = 0xc3; - buff->gpiomask = 0x21efff; - buff->gpiostate = 0x7fffff; - buff->gpiodir = 0x5e1000; - buff->cdti = 0x40000; - buff->cclk = 0x80000; - buff->cs = 0x1000; - buff->cif = 0x00; - buff->type = 0x02; - - for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; -i++) - if (cfg_table[i].subvendor == buff->subvendor && - cfg_table[i].subdevice == buff->subdevice) - break; - buff->name = cfg_table[i].name; - buff->codec = cfg_table[i].codec; +#if (0) + device_printf(sc->dev, + "envy24ht_rom2cfg(): ENVY24HT_E2PROM_SIZE-->%d\n", size); +#endif + buff = malloc(sizeof(*buff), M_ENVY24HT, M_NOWAIT); + if (buff == NULL) { +#if (0) + device_printf(sc->dev, + "envy24ht_rom2cfg(): malloc()\n"); +#endif + return NULL; + } + buff->free = 1; + + /* no valid e2prom, using default values */ + buff->subvendor = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBVENDOR) + << 8; + buff->subvendor += envy24ht_rdrom(sc, + ENVY24HT_E2PROM_SUBVENDOR + 1); + buff->subdevice = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBDEVICE) + << 8; + buff->subdevice += envy24ht_rdrom(sc, + ENVY24HT_E2PROM_SUBDEVICE + 1); + buff->scfg = 0x0b; + buff->acl = 0x80; + buff->i2s = 0xfc; + buff->spdif = 0xc3; + buff->gpiomask = 0x21efff; + buff->gpiostate = 0x7fffff; + buff->gpiodir = 0x5e1000; + buff->cdti = 0x40000; + buff->cclk = 0x80000; + buff->cs = 0x1000; + buff->cif = 0x00; + buff->type = 0x02; + + for (i = 0; + cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; + i++) + if (cfg_table[i].subvendor == buff->subvendor && + cfg_table[i].subdevice == buff->subdevice) + break; + buff->name = cfg_table[i].name; + buff->codec = cfg_table[i].codec; return buff; #if 0 @@ -668,7 +803,7 @@ } buff = malloc(sizeof(*buff), M_ENVY24HT, M_NOWAIT); if (buff == NULL) { -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_rom2cfg(): malloc()\n"); #endif return NULL; @@ -683,17 +818,18 @@ buff->acl = envy24ht_rdrom(sc, ENVY24HT_E2PROM_ACL); buff->i2s = envy24ht_rdrom(sc, ENVY24HT_E2PROM_I2S); buff->spdif = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SPDIF); - buff->gpiomask = envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOMASK) | \ - envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOMASK + 1) << 8 | \ - envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOMASK + 2) << 16; - buff->gpiostate = envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOSTATE) | \ - envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOSTATE + 1) << 8 | \ - envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOSTATE + 2) << 16; - buff->gpiodir = envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIODIR) | \ - envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIODIR + 1) << 8 | \ - envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIODIR + 2) << 16; - - for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; i++) + buff->gpiomask = envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOMASK) | + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOMASK + 1) << 8 | + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOMASK + 2) << 16; + buff->gpiostate = envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOSTATE) | + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOSTATE + 1) << 8 | + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOSTATE + 2) << 16; + buff->gpiodir = envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIODIR) | + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIODIR + 1) << 8 | + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIODIR + 2) << 16; + + for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; + i++) if (cfg_table[i].subvendor == buff->subvendor && cfg_table[i].subdevice == buff->subdevice) break; @@ -704,7 +840,8 @@ } static void -envy24ht_cfgfree(struct cfg_info *cfg) { +envy24ht_cfgfree(struct cfg_info *cfg) +{ if (cfg == NULL) return; if (cfg->free) @@ -723,7 +860,7 @@ u_int32_t data; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_coldcd()\n"); #endif envy24ht_wrmt(sc, ENVY24HT_MT_AC97CMD, ENVY24HT_MT_AC97CMD_CLD, 1); @@ -746,7 +883,7 @@ u_int32_t data; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_slavecd()\n"); #endif envy24ht_wrmt(sc, ENVY24HT_MT_AC97CMD, @@ -771,7 +908,7 @@ u_int32_t data; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_rdcd(obj, sc, 0x%02x)\n", regno); #endif envy24ht_wrmt(sc, ENVY24HT_MT_AC97IDX, (u_int32_t)regno, 1); @@ -783,7 +920,7 @@ } data = envy24ht_rdmt(sc, ENVY24HT_MT_AC97DLO, 2); -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_rdcd(): return 0x%x\n", data); #endif return (int)data; @@ -796,7 +933,7 @@ u_int32_t cmd; int i; -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_wrcd(obj, sc, 0x%02x, 0x%04x)\n", regno, data); #endif envy24ht_wrmt(sc, ENVY24HT_MT_AC97IDX, (u_int32_t)regno, 1); @@ -826,22 +963,24 @@ static u_int32_t envy24ht_gpiord(struct sc_info *sc) { - if (sc->cfg->subvendor == 0x153b && sc->cfg->subdevice == 0x1150) - return envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_LDATA, 2); + if (sc->cfg->subvendor == 0x153b && sc->cfg->subdevice == 0x1150) + return envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_LDATA, 2); else - return (envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_HDATA, 1) << 16 | envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_LDATA, 2)); + return (envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_HDATA, 1) << 16 | + envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_LDATA, 2)); } static void envy24ht_gpiowr(struct sc_info *sc, u_int32_t data) { -#if(0) - device_printf(sc->dev, "envy24ht_gpiowr(sc, 0x%02x)\n", data & 0x7FFFFF); +#if (0) + device_printf(sc->dev, "envy24ht_gpiowr(sc, 0x%02x)\n", + data & 0x7FFFFF); return; #endif envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_LDATA, data, 2); if (sc->cfg->subdevice != 0x1150) - envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_HDATA, data >> 16, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_HDATA, data >> 16, 1); return; } @@ -856,9 +995,9 @@ static void envy24ht_gpiosetmask(struct sc_info *sc, u_int32_t mask) { - envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_LMASK, mask, 2); + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_LMASK, mask, 2); if (sc->cfg->subdevice != 0x1150) - envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_HMASK, mask >> 16, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_HMASK, mask >> 16, 1); return; } @@ -873,10 +1012,10 @@ static void envy24ht_gpiosetdir(struct sc_info *sc, u_int32_t dir) { - if (sc->cfg->subvendor == 0x153b && sc->cfg->subdevice == 0x1150) - envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_CTLDIR, dir, 2); + if (sc->cfg->subvendor == 0x153b && sc->cfg->subdevice == 0x1150) + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_CTLDIR, dir, 2); else - envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_CTLDIR, dir, 4); + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_CTLDIR, dir, 4); return; } @@ -893,19 +1032,23 @@ }; static void -envy24ht_spi_ctl(void *codec, unsigned int cs, unsigned int cclk, unsigned int cdti) +envy24ht_spi_ctl(void *codec, unsigned int cs, unsigned int cclk, + unsigned int cdti) { u_int32_t data = 0; struct envy24ht_spi_codec *ptr = codec; -#if(0) +#if (0) device_printf(ptr->parent->dev, "--> %d, %d, %d\n", cs, cclk, cdti); #endif data = envy24ht_gpiord(ptr->parent); data &= ~(ptr->cs | ptr->cclk | ptr->cdti); - if (cs) data += ptr->cs; - if (cclk) data += ptr->cclk; - if (cdti) data += ptr->cdti; + if (cs) + data += ptr->cs; + if (cclk) + data += ptr->cclk; + if (cdti) + data += ptr->cdti; envy24ht_gpiowr(ptr->parent, data); return; } @@ -916,8 +1059,9 @@ struct sc_info *sc = info; struct envy24ht_spi_codec *buff = NULL; -#if(0) - device_printf(sc->dev, "envy24ht_spi_create(dev, sc, %d, %d)\n", dir, num); +#if (0) + device_printf(sc->dev, "envy24ht_spi_create(dev, sc, %d, %d)\n", dir, + num); #endif buff = malloc(sizeof(*buff), M_ENVY24HT, M_NOWAIT); @@ -948,15 +1092,14 @@ struct envy24ht_spi_codec *ptr = codec; if (ptr == NULL) return; -#if(0) +#if (0) device_printf(ptr->parent->dev, "envy24ht_spi_destroy()\n"); #endif if (ptr->dir == PCMDIR_PLAY) { if (ptr->parent->dac[ptr->num] != NULL) spicds_destroy(ptr->info); - } - else { + } else { if (ptr->parent->adc[ptr->num] != NULL) spicds_destroy(ptr->info); } @@ -970,24 +1113,25 @@ struct envy24ht_spi_codec *ptr = codec; if (ptr == NULL) return; -#if(0) +#if (0) device_printf(ptr->parent->dev, "envy24ht_spicds_init()\n"); #endif - ptr->cs = ptr->parent->cfg->cs; + ptr->cs = ptr->parent->cfg->cs; ptr->cclk = ptr->parent->cfg->cclk; - ptr->cdti = ptr->parent->cfg->cdti; + ptr->cdti = ptr->parent->cfg->cdti; spicds_settype(ptr->info, ptr->parent->cfg->type); spicds_setcif(ptr->info, ptr->parent->cfg->cif); - if (ptr->parent->cfg->type == SPICDS_TYPE_AK4524 || \ - ptr->parent->cfg->type == SPICDS_TYPE_AK4528) { - spicds_setformat(ptr->info, - AK452X_FORMAT_I2S | AK452X_FORMAT_256FSN | AK452X_FORMAT_1X); - spicds_setdvc(ptr->info, AK452X_DVC_DEMOFF); + if (ptr->parent->cfg->type == SPICDS_TYPE_AK4524 || + ptr->parent->cfg->type == SPICDS_TYPE_AK4528) { + spicds_setformat(ptr->info, + AK452X_FORMAT_I2S | AK452X_FORMAT_256FSN | + AK452X_FORMAT_1X); + spicds_setdvc(ptr->info, AK452X_DVC_DEMOFF); } /* for the time being, init only first codec */ if (ptr->num == 0) - spicds_init(ptr->info); + spicds_init(ptr->info); } static void @@ -996,7 +1140,7 @@ struct envy24ht_spi_codec *ptr = codec; if (ptr == NULL) return; -#if(0) +#if (0) device_printf(ptr->parent->dev, "envy24ht_spi_reinit()\n"); #endif @@ -1004,12 +1148,13 @@ } static void -envy24ht_spi_setvolume(void *codec, int dir, unsigned int left, unsigned int right) +envy24ht_spi_setvolume(void *codec, int dir, unsigned int left, + unsigned int right) { struct envy24ht_spi_codec *ptr = codec; if (ptr == NULL) return; -#if(0) +#if (0) device_printf(ptr->parent->dev, "envy24ht_spi_set()\n"); #endif @@ -1023,37 +1168,28 @@ static struct { u_int32_t speed; u_int32_t code; -} envy24ht_speedtab[] = { - {48000, ENVY24HT_MT_RATE_48000}, - {24000, ENVY24HT_MT_RATE_24000}, - {12000, ENVY24HT_MT_RATE_12000}, - {9600, ENVY24HT_MT_RATE_9600}, - {32000, ENVY24HT_MT_RATE_32000}, - {16000, ENVY24HT_MT_RATE_16000}, - {8000, ENVY24HT_MT_RATE_8000}, - {96000, ENVY24HT_MT_RATE_96000}, - {192000, ENVY24HT_MT_RATE_192000}, - {64000, ENVY24HT_MT_RATE_64000}, - {44100, ENVY24HT_MT_RATE_44100}, - {22050, ENVY24HT_MT_RATE_22050}, - {11025, ENVY24HT_MT_RATE_11025}, - {88200, ENVY24HT_MT_RATE_88200}, - {176400, ENVY24HT_MT_RATE_176400}, - {0, 0x10} -}; +} envy24ht_speedtab[] = { { 48000, ENVY24HT_MT_RATE_48000 }, + { 24000, ENVY24HT_MT_RATE_24000 }, { 12000, ENVY24HT_MT_RATE_12000 }, + { 9600, ENVY24HT_MT_RATE_9600 }, { 32000, ENVY24HT_MT_RATE_32000 }, + { 16000, ENVY24HT_MT_RATE_16000 }, { 8000, ENVY24HT_MT_RATE_8000 }, + { 96000, ENVY24HT_MT_RATE_96000 }, { 192000, ENVY24HT_MT_RATE_192000 }, + { 64000, ENVY24HT_MT_RATE_64000 }, { 44100, ENVY24HT_MT_RATE_44100 }, + { 22050, ENVY24HT_MT_RATE_22050 }, { 11025, ENVY24HT_MT_RATE_11025 }, + { 88200, ENVY24HT_MT_RATE_88200 }, { 176400, ENVY24HT_MT_RATE_176400 }, + { 0, 0x10 } }; static u_int32_t -envy24ht_setspeed(struct sc_info *sc, u_int32_t speed) { +envy24ht_setspeed(struct sc_info *sc, u_int32_t speed) +{ u_int32_t code, i2sfmt; int i = 0; -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_setspeed(sc, %d)\n", speed); if (speed == 0) { code = ENVY24HT_MT_RATE_SPDIF; /* external master clock */ envy24ht_slavecd(sc); - } - else { + } else { #endif for (i = 0; envy24ht_speedtab[i].speed != 0; i++) { if (envy24ht_speedtab[i].speed == speed) @@ -1064,51 +1200,51 @@ } device_printf(sc->dev, "envy24ht_setspeed(): speed %d/code 0x%04x\n", envy24ht_speedtab[i].speed, code); #endif - if (code < 0x10) { - envy24ht_wrmt(sc, ENVY24HT_MT_RATE, code, 1); - if ((((sc->cfg->scfg & ENVY24HT_CCSM_SCFG_XIN2) == 0x00) && (code == ENVY24HT_MT_RATE_192000)) || \ - (code == ENVY24HT_MT_RATE_176400)) { - i2sfmt = envy24ht_rdmt(sc, ENVY24HT_MT_I2S, 1); - i2sfmt |= ENVY24HT_MT_I2S_MLR128; - envy24ht_wrmt(sc, ENVY24HT_MT_I2S, i2sfmt, 1); - } - else { - i2sfmt = envy24ht_rdmt(sc, ENVY24HT_MT_I2S, 1); - i2sfmt &= ~ENVY24HT_MT_I2S_MLR128; - envy24ht_wrmt(sc, ENVY24HT_MT_I2S, i2sfmt, 1); - } - code = envy24ht_rdmt(sc, ENVY24HT_MT_RATE, 1); - code &= ENVY24HT_MT_RATE_MASK; - for (i = 0; envy24ht_speedtab[i].code < 0x10; i++) { - if (envy24ht_speedtab[i].code == code) - break; - } - speed = envy24ht_speedtab[i].speed; - } - else - speed = 0; + if (code < 0x10) { + envy24ht_wrmt(sc, ENVY24HT_MT_RATE, code, 1); + if ((((sc->cfg->scfg & ENVY24HT_CCSM_SCFG_XIN2) == + 0x00) && + (code == ENVY24HT_MT_RATE_192000)) || + (code == ENVY24HT_MT_RATE_176400)) { + i2sfmt = envy24ht_rdmt(sc, ENVY24HT_MT_I2S, 1); + i2sfmt |= ENVY24HT_MT_I2S_MLR128; + envy24ht_wrmt(sc, ENVY24HT_MT_I2S, i2sfmt, 1); + } else { + i2sfmt = envy24ht_rdmt(sc, ENVY24HT_MT_I2S, 1); + i2sfmt &= ~ENVY24HT_MT_I2S_MLR128; + envy24ht_wrmt(sc, ENVY24HT_MT_I2S, i2sfmt, 1); + } + code = envy24ht_rdmt(sc, ENVY24HT_MT_RATE, 1); + code &= ENVY24HT_MT_RATE_MASK; + for (i = 0; envy24ht_speedtab[i].code < 0x10; i++) { + if (envy24ht_speedtab[i].code == code) + break; + } + speed = envy24ht_speedtab[i].speed; + } else + speed = 0; -#if(0) - device_printf(sc->dev, "envy24ht_setspeed(): return %d\n", speed); +#if (0) + device_printf(sc->dev, "envy24ht_setspeed(): return %d\n", + speed); #endif - return speed; -} + return speed; + } -static void -envy24ht_setvolume(struct sc_info *sc, unsigned ch) -{ -#if(0) - device_printf(sc->dev, "envy24ht_setvolume(sc, %d)\n", ch); - envy24ht_wrmt(sc, ENVY24HT_MT_VOLIDX, ch * 2, 1); - envy24ht_wrmt(sc, ENVY24HT_MT_VOLUME, 0x7f00 | sc->left[ch], 2); - envy24ht_wrmt(sc, ENVY24HT_MT_VOLIDX, ch * 2 + 1, 1); - envy24ht_wrmt(sc, ENVY24HT_MT_VOLUME, (sc->right[ch] << 8) | 0x7f, 2); + static void envy24ht_setvolume(struct sc_info * sc, unsigned ch) + { +#if (0) + device_printf(sc->dev, "envy24ht_setvolume(sc, %d)\n", ch); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLIDX, ch * 2, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLUME, 0x7f00 | sc->left[ch], 2); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLIDX, ch * 2 + 1, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLUME, + (sc->right[ch] << 8) | 0x7f, 2); #endif -} + } -static void -envy24ht_mutevolume(struct sc_info *sc, unsigned ch) -{ + static void envy24ht_mutevolume(struct sc_info * sc, unsigned ch) + { #if 0 u_int32_t vol; @@ -1119,77 +1255,76 @@ envy24ht_wrmt(sc, ENVY24HT_MT_VOLIDX, ch * 2 + 1, 1); envy24ht_wrmt(sc, ENVY24HT_MT_VOLUME, vol, 2); #endif -} - -static u_int32_t -envy24ht_gethwptr(struct sc_info *sc, int dir) -{ - int unit, regno; - u_int32_t ptr, rtn; - -#if(0) - device_printf(sc->dev, "envy24ht_gethwptr(sc, %d)\n", dir); -#endif - if (dir == PCMDIR_PLAY) { - rtn = sc->psize / 4; - unit = ENVY24HT_PLAY_BUFUNIT / 4; - regno = ENVY24HT_MT_PCNT; } - else { - rtn = sc->rsize / 4; - unit = ENVY24HT_REC_BUFUNIT / 4; - regno = ENVY24HT_MT_RCNT; - } - - ptr = envy24ht_rdmt(sc, regno, 2); - rtn -= (ptr + 1); - rtn /= unit; -#if(0) - device_printf(sc->dev, "envy24ht_gethwptr(): return %d\n", rtn); -#endif - return rtn; -} + static u_int32_t envy24ht_gethwptr(struct sc_info * sc, int dir) + { + int unit, regno; + u_int32_t ptr, rtn; + +#if (0) + device_printf(sc->dev, "envy24ht_gethwptr(sc, %d)\n", dir); +#endif + if (dir == PCMDIR_PLAY) { + rtn = sc->psize / 4; + unit = ENVY24HT_PLAY_BUFUNIT / 4; + regno = ENVY24HT_MT_PCNT; + } else { + rtn = sc->rsize / 4; + unit = ENVY24HT_REC_BUFUNIT / 4; + regno = ENVY24HT_MT_RCNT; + } -static void -envy24ht_updintr(struct sc_info *sc, int dir) -{ - int regintr; - u_int32_t mask, intr; - u_int32_t cnt; - u_int16_t blk; + ptr = envy24ht_rdmt(sc, regno, 2); + rtn -= (ptr + 1); + rtn /= unit; -#if(0) - device_printf(sc->dev, "envy24ht_updintr(sc, %d)\n", dir); +#if (0) + device_printf(sc->dev, "envy24ht_gethwptr(): return %d\n", rtn); #endif - if (dir == PCMDIR_PLAY) { - blk = sc->blk[0]; - regintr = ENVY24HT_MT_PTERM; - mask = ~ENVY24HT_MT_INT_PMASK; - } - else { - blk = sc->blk[1]; - regintr = ENVY24HT_MT_RTERM; - mask = ~ENVY24HT_MT_INT_RMASK; + return rtn; } - cnt = blk - 1; -#if(0) - device_printf(sc->dev, "envy24ht_updintr():blk = %d, cnt = %d\n", blk, cnt); + static void envy24ht_updintr(struct sc_info * sc, int dir) + { + int regintr; + u_int32_t mask, intr; + u_int32_t cnt; + u_int16_t blk; + +#if (0) + device_printf(sc->dev, "envy24ht_updintr(sc, %d)\n", dir); +#endif + if (dir == PCMDIR_PLAY) { + blk = sc->blk[0]; + regintr = ENVY24HT_MT_PTERM; + mask = ~ENVY24HT_MT_INT_PMASK; + } else { + blk = sc->blk[1]; + regintr = ENVY24HT_MT_RTERM; + mask = ~ENVY24HT_MT_INT_RMASK; + } + + cnt = blk - 1; +#if (0) + device_printf(sc->dev, + "envy24ht_updintr():blk = %d, cnt = %d\n", blk, cnt); #endif - envy24ht_wrmt(sc, regintr, cnt, 2); - intr = envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, 1); -#if(0) - device_printf(sc->dev, "envy24ht_updintr():intr = 0x%02x, mask = 0x%02x\n", intr, mask); + envy24ht_wrmt(sc, regintr, cnt, 2); + intr = envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, 1); +#if (0) + device_printf(sc->dev, + "envy24ht_updintr():intr = 0x%02x, mask = 0x%02x\n", intr, + mask); #endif - envy24ht_wrmt(sc, ENVY24HT_MT_INT_MASK, intr & mask, 1); -#if(0) - device_printf(sc->dev, "envy24ht_updintr():INT-->0x%02x\n", - envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, 1)); + envy24ht_wrmt(sc, ENVY24HT_MT_INT_MASK, intr & mask, 1); +#if (0) + device_printf(sc->dev, "envy24ht_updintr():INT-->0x%02x\n", + envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, 1)); #endif - return; -} + return; + } #if 0 static void @@ -1197,7 +1332,7 @@ { u_int32_t mask, intr; -#if(0) +#if (0) device_printf(sc->dev, "envy24ht_maskintr(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) @@ -1211,81 +1346,87 @@ } #endif -static int -envy24ht_checkintr(struct sc_info *sc, int dir) -{ - u_int32_t mask, stat, intr, rtn; - -#if(0) - device_printf(sc->dev, "envy24ht_checkintr(sc, %d)\n", dir); -#endif - intr = envy24ht_rdmt(sc, ENVY24HT_MT_INT_STAT, 1); - if (dir == PCMDIR_PLAY) { - if ((rtn = intr & ENVY24HT_MT_INT_PSTAT) != 0) { - mask = ~ENVY24HT_MT_INT_RSTAT; - envy24ht_wrmt(sc, 0x1a, 0x01, 1); - envy24ht_wrmt(sc, ENVY24HT_MT_INT_STAT, (intr & mask) | ENVY24HT_MT_INT_PSTAT | 0x08, 1); - stat = envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, 1); - envy24ht_wrmt(sc, ENVY24HT_MT_INT_MASK, stat | ENVY24HT_MT_INT_PMASK, 1); - } - } - else { - if ((rtn = intr & ENVY24HT_MT_INT_RSTAT) != 0) { - mask = ~ENVY24HT_MT_INT_PSTAT; + static int envy24ht_checkintr(struct sc_info * sc, int dir) + { + u_int32_t mask, stat, intr, rtn; + +#if (0) + device_printf(sc->dev, "envy24ht_checkintr(sc, %d)\n", dir); +#endif + intr = envy24ht_rdmt(sc, ENVY24HT_MT_INT_STAT, 1); + if (dir == PCMDIR_PLAY) { + if ((rtn = intr & ENVY24HT_MT_INT_PSTAT) != 0) { + mask = ~ENVY24HT_MT_INT_RSTAT; + envy24ht_wrmt(sc, 0x1a, 0x01, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_INT_STAT, + (intr & mask) | ENVY24HT_MT_INT_PSTAT | + 0x08, + 1); + stat = envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, + 1); + envy24ht_wrmt(sc, ENVY24HT_MT_INT_MASK, + stat | ENVY24HT_MT_INT_PMASK, 1); + } + } else { + if ((rtn = intr & ENVY24HT_MT_INT_RSTAT) != 0) { + mask = ~ENVY24HT_MT_INT_PSTAT; #if 0 stat = ENVY24HT_MT_INT_RSTAT | ENVY24HT_MT_INT_RMASK; #endif - envy24ht_wrmt(sc, ENVY24HT_MT_INT_STAT, (intr & mask) | ENVY24HT_MT_INT_RSTAT, 1); - stat = envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, 1); - envy24ht_wrmt(sc, ENVY24HT_MT_INT_MASK, stat | ENVY24HT_MT_INT_RMASK, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_INT_STAT, + (intr & mask) | ENVY24HT_MT_INT_RSTAT, 1); + stat = envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, + 1); + envy24ht_wrmt(sc, ENVY24HT_MT_INT_MASK, + stat | ENVY24HT_MT_INT_RMASK, 1); + } } - } - return rtn; -} + return rtn; + } -static void -envy24ht_start(struct sc_info *sc, int dir) -{ - u_int32_t stat, sw; + static void envy24ht_start(struct sc_info * sc, int dir) + { + u_int32_t stat, sw; -#if(0) - device_printf(sc->dev, "envy24ht_start(sc, %d)\n", dir); +#if (0) + device_printf(sc->dev, "envy24ht_start(sc, %d)\n", dir); #endif - if (dir == PCMDIR_PLAY) - sw = ENVY24HT_MT_PCTL_PSTART; - else - sw = ENVY24HT_MT_PCTL_RSTART; + if (dir == PCMDIR_PLAY) + sw = ENVY24HT_MT_PCTL_PSTART; + else + sw = ENVY24HT_MT_PCTL_RSTART; - stat = envy24ht_rdmt(sc, ENVY24HT_MT_PCTL, 1); - envy24ht_wrmt(sc, ENVY24HT_MT_PCTL, stat | sw, 1); -#if(0) - DELAY(100); - device_printf(sc->dev, "PADDR:0x%08x\n", envy24ht_rdmt(sc, ENVY24HT_MT_PADDR, 4)); - device_printf(sc->dev, "PCNT:%ld\n", envy24ht_rdmt(sc, ENVY24HT_MT_PCNT, 2)); + stat = envy24ht_rdmt(sc, ENVY24HT_MT_PCTL, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_PCTL, stat | sw, 1); +#if (0) + DELAY(100); + device_printf(sc->dev, "PADDR:0x%08x\n", + envy24ht_rdmt(sc, ENVY24HT_MT_PADDR, 4)); + device_printf(sc->dev, "PCNT:%ld\n", + envy24ht_rdmt(sc, ENVY24HT_MT_PCNT, 2)); #endif - return; -} + return; + } -static void -envy24ht_stop(struct sc_info *sc, int dir) -{ - u_int32_t stat, sw; + static void envy24ht_stop(struct sc_info * sc, int dir) + { + u_int32_t stat, sw; -#if(0) - device_printf(sc->dev, "envy24ht_stop(sc, %d)\n", dir); +#if (0) + device_printf(sc->dev, "envy24ht_stop(sc, %d)\n", dir); #endif - if (dir == PCMDIR_PLAY) - sw = ~ENVY24HT_MT_PCTL_PSTART; - else - sw = ~ENVY24HT_MT_PCTL_RSTART; + if (dir == PCMDIR_PLAY) + sw = ~ENVY24HT_MT_PCTL_PSTART; + else + sw = ~ENVY24HT_MT_PCTL_RSTART; - stat = envy24ht_rdmt(sc, ENVY24HT_MT_PCTL, 1); - envy24ht_wrmt(sc, ENVY24HT_MT_PCTL, stat & sw, 1); + stat = envy24ht_rdmt(sc, ENVY24HT_MT_PCTL, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_PCTL, stat & sw, 1); - return; -} + return; + } #if 0 static int @@ -1295,188 +1436,200 @@ } #endif -/* -------------------------------------------------------------------- */ + /* -------------------------------------------------------------------- + */ -/* buffer copy routines */ -static void -envy24ht_p32sl(struct sc_chinfo *ch) -{ - int length; - sample32_t *dmabuf; - u_int32_t *data; - int src, dst, ssize, dsize, slot; - int i; + /* buffer copy routines */ + static void envy24ht_p32sl(struct sc_chinfo * ch) + { + int length; + sample32_t *dmabuf; + u_int32_t *data; + int src, dst, ssize, dsize, slot; + int i; + + length = sndbuf_getready(ch->buffer) / 8; + dmabuf = ch->parent->pbuf; + data = (u_int32_t *)ch->data; + src = sndbuf_getreadyptr(ch->buffer) / 4; + dst = src / 2 + ch->offset; + ssize = ch->size / 4; + dsize = ch->size / 8; + slot = ch->num * 2; + + for (i = 0; i < length; i++) { + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot].buffer = + data[src]; + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1].buffer = + data[src + 1]; + dst++; + dst %= dsize; + src += 2; + src %= ssize; + } - length = sndbuf_getready(ch->buffer) / 8; - dmabuf = ch->parent->pbuf; - data = (u_int32_t *)ch->data; - src = sndbuf_getreadyptr(ch->buffer) / 4; - dst = src / 2 + ch->offset; - ssize = ch->size / 4; - dsize = ch->size / 8; - slot = ch->num * 2; - - for (i = 0; i < length; i++) { - dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot].buffer = data[src]; - dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1].buffer = data[src + 1]; - dst++; - dst %= dsize; - src += 2; - src %= ssize; + return; } - return; -} - -static void -envy24ht_p16sl(struct sc_chinfo *ch) -{ - int length; - sample32_t *dmabuf; - u_int16_t *data; - int src, dst, ssize, dsize, slot; - int i; - -#if(0) - device_printf(ch->parent->dev, "envy24ht_p16sl()\n"); -#endif - length = sndbuf_getready(ch->buffer) / 4; - dmabuf = ch->parent->pbuf; - data = (u_int16_t *)ch->data; - src = sndbuf_getreadyptr(ch->buffer) / 2; - dst = src / 2 + ch->offset; - ssize = ch->size / 2; - dsize = ch->size / 4; - slot = ch->num * 2; -#if(0) - device_printf(ch->parent->dev, "envy24ht_p16sl():%lu-->%lu(%lu)\n", src, dst, length); -#endif - - for (i = 0; i < length; i++) { - dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot].buffer = (u_int32_t)data[src] << 16; - dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1].buffer = (u_int32_t)data[src + 1] << 16; -#if(0) - if (i < 16) { - printf("%08x", dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot]); - printf("%08x", dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1]); - } + static void envy24ht_p16sl(struct sc_chinfo * ch) + { + int length; + sample32_t *dmabuf; + u_int16_t *data; + int src, dst, ssize, dsize, slot; + int i; + +#if (0) + device_printf(ch->parent->dev, "envy24ht_p16sl()\n"); +#endif + length = sndbuf_getready(ch->buffer) / 4; + dmabuf = ch->parent->pbuf; + data = (u_int16_t *)ch->data; + src = sndbuf_getreadyptr(ch->buffer) / 2; + dst = src / 2 + ch->offset; + ssize = ch->size / 2; + dsize = ch->size / 4; + slot = ch->num * 2; +#if (0) + device_printf(ch->parent->dev, + "envy24ht_p16sl():%lu-->%lu(%lu)\n", src, dst, length); +#endif + + for (i = 0; i < length; i++) { + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot].buffer = + (u_int32_t)data[src] << 16; + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1].buffer = + (u_int32_t)data[src + 1] << 16; +#if (0) + if (i < 16) { + printf("%08x", + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot]); + printf("%08x", + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + + 1]); + } #endif - dst++; - dst %= dsize; - src += 2; - src %= ssize; - } -#if(0) - printf("\n"); + dst++; + dst %= dsize; + src += 2; + src %= ssize; + } +#if (0) + printf("\n"); #endif - return; -} + return; + } -static void -envy24ht_p8u(struct sc_chinfo *ch) -{ - int length; - sample32_t *dmabuf; - u_int8_t *data; - int src, dst, ssize, dsize, slot; - int i; + static void envy24ht_p8u(struct sc_chinfo * ch) + { + int length; + sample32_t *dmabuf; + u_int8_t *data; + int src, dst, ssize, dsize, slot; + int i; + + length = sndbuf_getready(ch->buffer) / 2; + dmabuf = ch->parent->pbuf; + data = (u_int8_t *)ch->data; + src = sndbuf_getreadyptr(ch->buffer); + dst = src / 2 + ch->offset; + ssize = ch->size; + dsize = ch->size / 4; + slot = ch->num * 2; + + for (i = 0; i < length; i++) { + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot].buffer = + ((u_int32_t)data[src] ^ 0x80) << 24; + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1].buffer = + ((u_int32_t)data[src + 1] ^ 0x80) << 24; + dst++; + dst %= dsize; + src += 2; + src %= ssize; + } - length = sndbuf_getready(ch->buffer) / 2; - dmabuf = ch->parent->pbuf; - data = (u_int8_t *)ch->data; - src = sndbuf_getreadyptr(ch->buffer); - dst = src / 2 + ch->offset; - ssize = ch->size; - dsize = ch->size / 4; - slot = ch->num * 2; - - for (i = 0; i < length; i++) { - dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot].buffer = ((u_int32_t)data[src] ^ 0x80) << 24; - dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1].buffer = ((u_int32_t)data[src + 1] ^ 0x80) << 24; - dst++; - dst %= dsize; - src += 2; - src %= ssize; + return; } - return; -} - -static void -envy24ht_r32sl(struct sc_chinfo *ch) -{ - int length; - sample32_t *dmabuf; - u_int32_t *data; - int src, dst, ssize, dsize, slot; - int i; + static void envy24ht_r32sl(struct sc_chinfo * ch) + { + int length; + sample32_t *dmabuf; + u_int32_t *data; + int src, dst, ssize, dsize, slot; + int i; + + length = sndbuf_getfree(ch->buffer) / 8; + dmabuf = ch->parent->rbuf; + data = (u_int32_t *)ch->data; + dst = sndbuf_getfreeptr(ch->buffer) / 4; + src = dst / 2 + ch->offset; + dsize = ch->size / 4; + ssize = ch->size / 8; + slot = (ch->num - ENVY24HT_CHAN_REC_ADC1) * 2; + + for (i = 0; i < length; i++) { + data[dst] = + dmabuf[src * ENVY24HT_REC_CHNUM + slot].buffer; + data[dst + 1] = + dmabuf[src * ENVY24HT_REC_CHNUM + slot + 1].buffer; + dst += 2; + dst %= dsize; + src++; + src %= ssize; + } - length = sndbuf_getfree(ch->buffer) / 8; - dmabuf = ch->parent->rbuf; - data = (u_int32_t *)ch->data; - dst = sndbuf_getfreeptr(ch->buffer) / 4; - src = dst / 2 + ch->offset; - dsize = ch->size / 4; - ssize = ch->size / 8; - slot = (ch->num - ENVY24HT_CHAN_REC_ADC1) * 2; - - for (i = 0; i < length; i++) { - data[dst] = dmabuf[src * ENVY24HT_REC_CHNUM + slot].buffer; - data[dst + 1] = dmabuf[src * ENVY24HT_REC_CHNUM + slot + 1].buffer; - dst += 2; - dst %= dsize; - src++; - src %= ssize; + return; } - return; -} - -static void -envy24ht_r16sl(struct sc_chinfo *ch) -{ - int length; - sample32_t *dmabuf; - u_int16_t *data; - int src, dst, ssize, dsize, slot; - int i; + static void envy24ht_r16sl(struct sc_chinfo * ch) + { + int length; + sample32_t *dmabuf; + u_int16_t *data; + int src, dst, ssize, dsize, slot; + int i; + + length = sndbuf_getfree(ch->buffer) / 4; + dmabuf = ch->parent->rbuf; + data = (u_int16_t *)ch->data; + dst = sndbuf_getfreeptr(ch->buffer) / 2; + src = dst / 2 + ch->offset; + dsize = ch->size / 2; + ssize = ch->size / 8; + slot = (ch->num - ENVY24HT_CHAN_REC_ADC1) * 2; + + for (i = 0; i < length; i++) { + data[dst] = + dmabuf[src * ENVY24HT_REC_CHNUM + slot].buffer; + data[dst + 1] = + dmabuf[src * ENVY24HT_REC_CHNUM + slot + 1].buffer; + dst += 2; + dst %= dsize; + src++; + src %= ssize; + } - length = sndbuf_getfree(ch->buffer) / 4; - dmabuf = ch->parent->rbuf; - data = (u_int16_t *)ch->data; - dst = sndbuf_getfreeptr(ch->buffer) / 2; - src = dst / 2 + ch->offset; - dsize = ch->size / 2; - ssize = ch->size / 8; - slot = (ch->num - ENVY24HT_CHAN_REC_ADC1) * 2; - - for (i = 0; i < length; i++) { - data[dst] = dmabuf[src * ENVY24HT_REC_CHNUM + slot].buffer; - data[dst + 1] = dmabuf[src * ENVY24HT_REC_CHNUM + slot + 1].buffer; - dst += 2; - dst %= dsize; - src++; - src %= ssize; + return; } - return; -} - -/* -------------------------------------------------------------------- */ + /* -------------------------------------------------------------------- + */ -/* channel interface */ -static void * -envy24htchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) -{ - struct sc_info *sc = (struct sc_info *)devinfo; - struct sc_chinfo *ch; - unsigned num; + /* channel interface */ + static void *envy24htchan_init(kobj_t obj, void *devinfo, + struct snd_dbuf *b, struct pcm_channel *c, int dir) + { + struct sc_info *sc = (struct sc_info *)devinfo; + struct sc_chinfo *ch; + unsigned num; -#if(0) - device_printf(sc->dev, "envy24htchan_init(obj, devinfo, b, c, %d)\n", dir); +#if (0) + device_printf(sc->dev, + "envy24htchan_init(obj, devinfo, b, c, %d)\n", dir); #endif - snd_mtxlock(sc->lock); + snd_mtxlock(sc->lock); #if 0 if ((sc->chnum > ENVY24HT_CHAN_PLAY_SPDIF && dir != PCMDIR_REC) || (sc->chnum < ENVY24HT_CHAN_REC_ADC1 && dir != PCMDIR_PLAY)) { @@ -1484,94 +1637,93 @@ return NULL; } #endif - num = sc->chnum; - - ch = &sc->chan[num]; - ch->size = 8 * ENVY24HT_SAMPLE_NUM; - ch->data = malloc(ch->size, M_ENVY24HT, M_NOWAIT); - if (ch->data == NULL) { - ch->size = 0; - ch = NULL; - } - else { - ch->buffer = b; - ch->channel = c; - ch->parent = sc; - ch->dir = dir; - /* set channel map */ - ch->num = envy24ht_chanmap[num]; + num = sc->chnum; + + ch = &sc->chan[num]; + ch->size = 8 * ENVY24HT_SAMPLE_NUM; + ch->data = malloc(ch->size, M_ENVY24HT, M_NOWAIT); + if (ch->data == NULL) { + ch->size = 0; + ch = NULL; + } else { + ch->buffer = b; + ch->channel = c; + ch->parent = sc; + ch->dir = dir; + /* set channel map */ + ch->num = envy24ht_chanmap[num]; + snd_mtxunlock(sc->lock); + sndbuf_setup(ch->buffer, ch->data, ch->size); + snd_mtxlock(sc->lock); + /* these 2 values are dummy */ + ch->unit = 4; + ch->blk = 10240; + } snd_mtxunlock(sc->lock); - sndbuf_setup(ch->buffer, ch->data, ch->size); - snd_mtxlock(sc->lock); - /* these 2 values are dummy */ - ch->unit = 4; - ch->blk = 10240; - } - snd_mtxunlock(sc->lock); - return ch; -} + return ch; + } -static int -envy24htchan_free(kobj_t obj, void *data) -{ - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; + static int envy24htchan_free(kobj_t obj, void *data) + { + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; -#if(0) - device_printf(sc->dev, "envy24htchan_free()\n"); +#if (0) + device_printf(sc->dev, "envy24htchan_free()\n"); #endif - snd_mtxlock(sc->lock); - if (ch->data != NULL) { - free(ch->data, M_ENVY24HT); - ch->data = NULL; - } - snd_mtxunlock(sc->lock); + snd_mtxlock(sc->lock); + if (ch->data != NULL) { + free(ch->data, M_ENVY24HT); + ch->data = NULL; + } + snd_mtxunlock(sc->lock); - return 0; -} + return 0; + } -static int -envy24htchan_setformat(kobj_t obj, void *data, u_int32_t format) -{ - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - struct envy24ht_emldma *emltab; - /* unsigned int bcnt, bsize; */ - int i; + static int envy24htchan_setformat(kobj_t obj, void *data, + u_int32_t format) + { + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; + struct envy24ht_emldma *emltab; + /* unsigned int bcnt, bsize; */ + int i; -#if(0) - device_printf(sc->dev, "envy24htchan_setformat(obj, data, 0x%08x)\n", format); +#if (0) + device_printf(sc->dev, + "envy24htchan_setformat(obj, data, 0x%08x)\n", format); #endif - snd_mtxlock(sc->lock); - /* check and get format related information */ - if (ch->dir == PCMDIR_PLAY) - emltab = envy24ht_pemltab; - else - emltab = envy24ht_remltab; - if (emltab == NULL) { - snd_mtxunlock(sc->lock); - return -1; - } - for (i = 0; emltab[i].format != 0; i++) - if (emltab[i].format == format) - break; - if (emltab[i].format == 0) { - snd_mtxunlock(sc->lock); - return -1; - } + snd_mtxlock(sc->lock); + /* check and get format related information */ + if (ch->dir == PCMDIR_PLAY) + emltab = envy24ht_pemltab; + else + emltab = envy24ht_remltab; + if (emltab == NULL) { + snd_mtxunlock(sc->lock); + return -1; + } + for (i = 0; emltab[i].format != 0; i++) + if (emltab[i].format == format) + break; + if (emltab[i].format == 0) { + snd_mtxunlock(sc->lock); + return -1; + } - /* set format information */ - ch->format = format; - ch->emldma = emltab[i].emldma; - if (ch->unit > emltab[i].unit) - ch->blk *= ch->unit / emltab[i].unit; - else - ch->blk /= emltab[i].unit / ch->unit; - ch->unit = emltab[i].unit; + /* set format information */ + ch->format = format; + ch->emldma = emltab[i].emldma; + if (ch->unit > emltab[i].unit) + ch->blk *= ch->unit / emltab[i].unit; + else + ch->blk /= emltab[i].unit / ch->unit; + ch->unit = emltab[i].unit; - /* set channel buffer information */ - ch->size = ch->unit * ENVY24HT_SAMPLE_NUM; + /* set channel buffer information */ + ch->size = ch->unit * ENVY24HT_SAMPLE_NUM; #if 0 if (ch->dir == PCMDIR_PLAY) bsize = ch->blk * 4 / ENVY24HT_PLAY_BUFUNIT; @@ -1581,550 +1733,570 @@ bcnt = ch->size / bsize; sndbuf_resize(ch->buffer, bcnt, bsize); #endif - snd_mtxunlock(sc->lock); + snd_mtxunlock(sc->lock); -#if(0) - device_printf(sc->dev, "envy24htchan_setformat(): return 0x%08x\n", 0); +#if (0) + device_printf(sc->dev, + "envy24htchan_setformat(): return 0x%08x\n", 0); #endif - return 0; -} + return 0; + } -/* - IMPLEMENT NOTICE: In this driver, setspeed function only do setting - of speed information value. And real hardware speed setting is done - at start triggered(see envy24htchan_trigger()). So, at this function - is called, any value that ENVY24 can use is able to set. But, at - start triggerd, some other channel is running, and that channel's - speed isn't same with, then trigger function will fail. -*/ -static u_int32_t -envy24htchan_setspeed(kobj_t obj, void *data, u_int32_t speed) -{ - struct sc_chinfo *ch = data; - u_int32_t val, prev; - int i; + /* + IMPLEMENT NOTICE: In this driver, setspeed function only do setting + of speed information value. And real hardware speed setting is done + at start triggered(see envy24htchan_trigger()). So, at this function + is called, any value that ENVY24 can use is able to set. But, at + start triggerd, some other channel is running, and that channel's + speed isn't same with, then trigger function will fail. + */ + static u_int32_t envy24htchan_setspeed(kobj_t obj, void *data, + u_int32_t speed) + { + struct sc_chinfo *ch = data; + u_int32_t val, prev; + int i; + +#if (0) + device_printf(ch->parent->dev, + "envy24htchan_setspeed(obj, data, %d)\n", speed); +#endif + prev = 0x7fffffff; + for (i = 0; (val = envy24ht_speed[i]) != 0; i++) { + if (abs(val - speed) < abs(prev - speed)) + prev = val; + else + break; + } + ch->speed = prev; -#if(0) - device_printf(ch->parent->dev, "envy24htchan_setspeed(obj, data, %d)\n", speed); +#if (0) + device_printf(ch->parent->dev, + "envy24htchan_setspeed(): return %d\n", ch->speed); #endif - prev = 0x7fffffff; - for (i = 0; (val = envy24ht_speed[i]) != 0; i++) { - if (abs(val - speed) < abs(prev - speed)) - prev = val; - else - break; + return ch->speed; } - ch->speed = prev; -#if(0) - device_printf(ch->parent->dev, "envy24htchan_setspeed(): return %d\n", ch->speed); -#endif - return ch->speed; -} + static u_int32_t envy24htchan_setblocksize(kobj_t obj, void *data, + u_int32_t blocksize) + { + struct sc_chinfo *ch = data; + /* struct sc_info *sc = ch->parent; */ + u_int32_t size, prev; + unsigned int bcnt, bsize; + +#if (0) + device_printf(sc->dev, + "envy24htchan_setblocksize(obj, data, %d)\n", blocksize); +#endif + prev = 0x7fffffff; + /* snd_mtxlock(sc->lock); */ + for (size = ch->size / 2; size > 0; size /= 2) { + if (abs(size - blocksize) < abs(prev - blocksize)) + prev = size; + else + break; + } -static u_int32_t -envy24htchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) -{ - struct sc_chinfo *ch = data; - /* struct sc_info *sc = ch->parent; */ - u_int32_t size, prev; - unsigned int bcnt, bsize; - -#if(0) - device_printf(sc->dev, "envy24htchan_setblocksize(obj, data, %d)\n", blocksize); -#endif - prev = 0x7fffffff; - /* snd_mtxlock(sc->lock); */ - for (size = ch->size / 2; size > 0; size /= 2) { - if (abs(size - blocksize) < abs(prev - blocksize)) - prev = size; + ch->blk = prev / ch->unit; + if (ch->dir == PCMDIR_PLAY) + ch->blk *= ENVY24HT_PLAY_BUFUNIT / 4; else - break; - } + ch->blk *= ENVY24HT_REC_BUFUNIT / 4; + /* set channel buffer information */ + /* ch->size = ch->unit * ENVY24HT_SAMPLE_NUM; */ + if (ch->dir == PCMDIR_PLAY) + bsize = ch->blk * 4 / ENVY24HT_PLAY_BUFUNIT; + else + bsize = ch->blk * 4 / ENVY24HT_REC_BUFUNIT; + bsize *= ch->unit; + bcnt = ch->size / bsize; + sndbuf_resize(ch->buffer, bcnt, bsize); + /* snd_mtxunlock(sc->lock); */ - ch->blk = prev / ch->unit; - if (ch->dir == PCMDIR_PLAY) - ch->blk *= ENVY24HT_PLAY_BUFUNIT / 4; - else - ch->blk *= ENVY24HT_REC_BUFUNIT / 4; - /* set channel buffer information */ - /* ch->size = ch->unit * ENVY24HT_SAMPLE_NUM; */ - if (ch->dir == PCMDIR_PLAY) - bsize = ch->blk * 4 / ENVY24HT_PLAY_BUFUNIT; - else - bsize = ch->blk * 4 / ENVY24HT_REC_BUFUNIT; - bsize *= ch->unit; - bcnt = ch->size / bsize; - sndbuf_resize(ch->buffer, bcnt, bsize); - /* snd_mtxunlock(sc->lock); */ - -#if(0) - device_printf(sc->dev, "envy24htchan_setblocksize(): return %d\n", prev); -#endif - return prev; -} +#if (0) + device_printf(sc->dev, + "envy24htchan_setblocksize(): return %d\n", prev); +#endif + return prev; + } -/* semantic note: must start at beginning of buffer */ -static int -envy24htchan_trigger(kobj_t obj, void *data, int go) -{ - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - u_int32_t ptr; - int slot; - int error = 0; + /* semantic note: must start at beginning of buffer */ + static int envy24htchan_trigger(kobj_t obj, void *data, int go) + { + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; + u_int32_t ptr; + int slot; + int error = 0; #if 0 int i; device_printf(sc->dev, "envy24htchan_trigger(obj, data, %d)\n", go); #endif - snd_mtxlock(sc->lock); - if (ch->dir == PCMDIR_PLAY) - slot = 0; - else - slot = 1; - switch (go) { - case PCMTRIG_START: -#if(0) - device_printf(sc->dev, "envy24htchan_trigger(): start\n"); -#endif - /* check or set channel speed */ - if (sc->run[0] == 0 && sc->run[1] == 0) { - sc->speed = envy24ht_setspeed(sc, ch->speed); - sc->caps[0].minspeed = sc->caps[0].maxspeed = sc->speed; - sc->caps[1].minspeed = sc->caps[1].maxspeed = sc->speed; - } - else if (ch->speed != 0 && ch->speed != sc->speed) { - error = -1; - goto fail; - } - if (ch->speed == 0) - ch->channel->speed = sc->speed; - /* start or enable channel */ - sc->run[slot]++; - if (sc->run[slot] == 1) { - /* first channel */ - ch->offset = 0; - sc->blk[slot] = ch->blk; - } - else { - ptr = envy24ht_gethwptr(sc, ch->dir); - ch->offset = ((ptr / ch->blk + 1) * ch->blk % - (ch->size / 4)) * 4 / ch->unit; - if (ch->blk < sc->blk[slot]) + snd_mtxlock(sc->lock); + if (ch->dir == PCMDIR_PLAY) + slot = 0; + else + slot = 1; + switch (go) { + case PCMTRIG_START: +#if (0) + device_printf(sc->dev, + "envy24htchan_trigger(): start\n"); +#endif + /* check or set channel speed */ + if (sc->run[0] == 0 && sc->run[1] == 0) { + sc->speed = envy24ht_setspeed(sc, ch->speed); + sc->caps[0].minspeed = sc->caps[0].maxspeed = + sc->speed; + sc->caps[1].minspeed = sc->caps[1].maxspeed = + sc->speed; + } else if (ch->speed != 0 && ch->speed != sc->speed) { + error = -1; + goto fail; + } + if (ch->speed == 0) + ch->channel->speed = sc->speed; + /* start or enable channel */ + sc->run[slot]++; + if (sc->run[slot] == 1) { + /* first channel */ + ch->offset = 0; sc->blk[slot] = ch->blk; - } - if (ch->dir == PCMDIR_PLAY) { + } else { + ptr = envy24ht_gethwptr(sc, ch->dir); + ch->offset = ((ptr / ch->blk + 1) * ch->blk % + (ch->size / 4)) * + 4 / ch->unit; + if (ch->blk < sc->blk[slot]) + sc->blk[slot] = ch->blk; + } + if (ch->dir == PCMDIR_PLAY) { + ch->emldma(ch); + envy24ht_setvolume(sc, ch->num); + } + envy24ht_updintr(sc, ch->dir); + if (sc->run[slot] == 1) + envy24ht_start(sc, ch->dir); + ch->run = 1; + break; + case PCMTRIG_EMLDMAWR: +#if (0) + device_printf(sc->dev, + "envy24htchan_trigger(): emldmawr\n"); +#endif + if (ch->run != 1) { + error = -1; + goto fail; + } ch->emldma(ch); - envy24ht_setvolume(sc, ch->num); - } - envy24ht_updintr(sc, ch->dir); - if (sc->run[slot] == 1) - envy24ht_start(sc, ch->dir); - ch->run = 1; - break; - case PCMTRIG_EMLDMAWR: -#if(0) - device_printf(sc->dev, "envy24htchan_trigger(): emldmawr\n"); -#endif - if (ch->run != 1) { - error = -1; - goto fail; - } - ch->emldma(ch); - break; - case PCMTRIG_EMLDMARD: -#if(0) - device_printf(sc->dev, "envy24htchan_trigger(): emldmard\n"); -#endif - if (ch->run != 1) { - error = -1; - goto fail; - } - ch->emldma(ch); - break; - case PCMTRIG_ABORT: - if (ch->run) { -#if(0) - device_printf(sc->dev, "envy24htchan_trigger(): abort\n"); -#endif - ch->run = 0; - sc->run[slot]--; - if (ch->dir == PCMDIR_PLAY) - envy24ht_mutevolume(sc, ch->num); - if (sc->run[slot] == 0) { - envy24ht_stop(sc, ch->dir); - sc->intr[slot] = 0; - } -/* else if (ch->blk == sc->blk[slot]) { - sc->blk[slot] = ENVY24HT_SAMPLE_NUM / 2; - for (i = 0; i < ENVY24HT_CHAN_NUM; i++) { - if (sc->chan[i].dir == ch->dir && - sc->chan[i].run == 1 && - sc->chan[i].blk < sc->blk[slot]) - sc->blk[slot] = sc->chan[i].blk; + break; + case PCMTRIG_EMLDMARD: +#if (0) + device_printf(sc->dev, + "envy24htchan_trigger(): emldmard\n"); +#endif + if (ch->run != 1) { + error = -1; + goto fail; } - if (ch->blk != sc->blk[slot]) - envy24ht_updintr(sc, ch->dir); - }*/ + ch->emldma(ch); + break; + case PCMTRIG_ABORT: + if (ch->run) { +#if (0) + device_printf(sc->dev, + "envy24htchan_trigger(): abort\n"); +#endif + ch->run = 0; + sc->run[slot]--; + if (ch->dir == PCMDIR_PLAY) + envy24ht_mutevolume(sc, ch->num); + if (sc->run[slot] == 0) { + envy24ht_stop(sc, ch->dir); + sc->intr[slot] = 0; + } + /* else if (ch->blk == + sc->blk[slot]) { sc->blk[slot] = + ENVY24HT_SAMPLE_NUM / 2; for (i = 0; i < + ENVY24HT_CHAN_NUM; i++) { if (sc->chan[i].dir + == ch->dir && sc->chan[i].run == 1 && + sc->chan[i].blk + < sc->blk[slot]) sc->blk[slot] = + sc->chan[i].blk; + } + if (ch->blk != + sc->blk[slot]) envy24ht_updintr(sc, ch->dir); + }*/ + } + break; } - break; + fail: + snd_mtxunlock(sc->lock); + return (error); } -fail: - snd_mtxunlock(sc->lock); - return (error); -} -static u_int32_t -envy24htchan_getptr(kobj_t obj, void *data) -{ - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - u_int32_t ptr, rtn; + static u_int32_t envy24htchan_getptr(kobj_t obj, void *data) + { + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; + u_int32_t ptr, rtn; -#if(0) - device_printf(sc->dev, "envy24htchan_getptr()\n"); +#if (0) + device_printf(sc->dev, "envy24htchan_getptr()\n"); #endif - snd_mtxlock(sc->lock); - ptr = envy24ht_gethwptr(sc, ch->dir); - rtn = ptr * ch->unit; - snd_mtxunlock(sc->lock); + snd_mtxlock(sc->lock); + ptr = envy24ht_gethwptr(sc, ch->dir); + rtn = ptr * ch->unit; + snd_mtxunlock(sc->lock); -#if(0) - device_printf(sc->dev, "envy24htchan_getptr(): return %d\n", - rtn); +#if (0) + device_printf(sc->dev, "envy24htchan_getptr(): return %d\n", + rtn); #endif - return rtn; -} + return rtn; + } -static struct pcmchan_caps * -envy24htchan_getcaps(kobj_t obj, void *data) -{ - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - struct pcmchan_caps *rtn; + static struct pcmchan_caps *envy24htchan_getcaps(kobj_t obj, void *data) + { + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; + struct pcmchan_caps *rtn; -#if(0) - device_printf(sc->dev, "envy24htchan_getcaps()\n"); +#if (0) + device_printf(sc->dev, "envy24htchan_getcaps()\n"); #endif - snd_mtxlock(sc->lock); - if (ch->dir == PCMDIR_PLAY) { - if (sc->run[0] == 0) - rtn = &envy24ht_playcaps; - else - rtn = &sc->caps[0]; - } - else { - if (sc->run[1] == 0) - rtn = &envy24ht_reccaps; - else - rtn = &sc->caps[1]; - } - snd_mtxunlock(sc->lock); + snd_mtxlock(sc->lock); + if (ch->dir == PCMDIR_PLAY) { + if (sc->run[0] == 0) + rtn = &envy24ht_playcaps; + else + rtn = &sc->caps[0]; + } else { + if (sc->run[1] == 0) + rtn = &envy24ht_reccaps; + else + rtn = &sc->caps[1]; + } + snd_mtxunlock(sc->lock); - return rtn; -} + return rtn; + } -static kobj_method_t envy24htchan_methods[] = { - KOBJMETHOD(channel_init, envy24htchan_init), - KOBJMETHOD(channel_free, envy24htchan_free), - KOBJMETHOD(channel_setformat, envy24htchan_setformat), - KOBJMETHOD(channel_setspeed, envy24htchan_setspeed), - KOBJMETHOD(channel_setblocksize, envy24htchan_setblocksize), - KOBJMETHOD(channel_trigger, envy24htchan_trigger), - KOBJMETHOD(channel_getptr, envy24htchan_getptr), - KOBJMETHOD(channel_getcaps, envy24htchan_getcaps), - KOBJMETHOD_END -}; -CHANNEL_DECLARE(envy24htchan); + static kobj_method_t envy24htchan_methods[] = { KOBJMETHOD(channel_init, + envy24htchan_init), + KOBJMETHOD(channel_free, envy24htchan_free), + KOBJMETHOD(channel_setformat, envy24htchan_setformat), + KOBJMETHOD(channel_setspeed, envy24htchan_setspeed), + KOBJMETHOD(channel_setblocksize, envy24htchan_setblocksize), + KOBJMETHOD(channel_trigger, envy24htchan_trigger), + KOBJMETHOD(channel_getptr, envy24htchan_getptr), + KOBJMETHOD(channel_getcaps, envy24htchan_getcaps), + KOBJMETHOD_END }; + CHANNEL_DECLARE(envy24htchan); -/* -------------------------------------------------------------------- */ + /* -------------------------------------------------------------------- + */ -/* mixer interface */ + /* mixer interface */ -static int -envy24htmixer_init(struct snd_mixer *m) -{ - struct sc_info *sc = mix_getdevinfo(m); + static int envy24htmixer_init(struct snd_mixer * m) + { + struct sc_info *sc = mix_getdevinfo(m); -#if(0) - device_printf(sc->dev, "envy24htmixer_init()\n"); +#if (0) + device_printf(sc->dev, "envy24htmixer_init()\n"); #endif - if (sc == NULL) - return -1; + if (sc == NULL) + return -1; - /* set volume control rate */ - snd_mtxlock(sc->lock); + /* set volume control rate */ + snd_mtxlock(sc->lock); #if 0 envy24ht_wrmt(sc, ENVY24HT_MT_VOLRATE, 0x30, 1); /* 0x30 is default value */ #endif - pcm_setflags(sc->dev, pcm_getflags(sc->dev) | SD_F_SOFTPCMVOL); + pcm_setflags(sc->dev, pcm_getflags(sc->dev) | SD_F_SOFTPCMVOL); - mix_setdevs(m, ENVY24HT_MIX_MASK); - mix_setrecdevs(m, ENVY24HT_MIX_REC_MASK); + mix_setdevs(m, ENVY24HT_MIX_MASK); + mix_setrecdevs(m, ENVY24HT_MIX_REC_MASK); - snd_mtxunlock(sc->lock); + snd_mtxunlock(sc->lock); - return 0; -} + return 0; + } -static int -envy24htmixer_reinit(struct snd_mixer *m) -{ - struct sc_info *sc = mix_getdevinfo(m); + static int envy24htmixer_reinit(struct snd_mixer * m) + { + struct sc_info *sc = mix_getdevinfo(m); - if (sc == NULL) - return -1; -#if(0) - device_printf(sc->dev, "envy24htmixer_reinit()\n"); + if (sc == NULL) + return -1; +#if (0) + device_printf(sc->dev, "envy24htmixer_reinit()\n"); #endif - return 0; -} + return 0; + } -static int -envy24htmixer_uninit(struct snd_mixer *m) -{ - struct sc_info *sc = mix_getdevinfo(m); + static int envy24htmixer_uninit(struct snd_mixer * m) + { + struct sc_info *sc = mix_getdevinfo(m); - if (sc == NULL) - return -1; -#if(0) - device_printf(sc->dev, "envy24htmixer_uninit()\n"); + if (sc == NULL) + return -1; +#if (0) + device_printf(sc->dev, "envy24htmixer_uninit()\n"); #endif - return 0; -} - -static int -envy24htmixer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) -{ - struct sc_info *sc = mix_getdevinfo(m); - int ch = envy24ht_mixmap[dev]; - int hwch; - int i; + return 0; + } - if (sc == NULL) - return -1; - if (dev == 0 && sc->cfg->codec->setvolume == NULL) - return -1; - if (dev != 0 && ch == -1) - return -1; - hwch = envy24ht_chanmap[ch]; -#if(0) - device_printf(sc->dev, "envy24htmixer_set(m, %d, %d, %d)\n", - dev, left, right); + static int envy24htmixer_set(struct snd_mixer * m, unsigned dev, + unsigned left, unsigned right) + { + struct sc_info *sc = mix_getdevinfo(m); + int ch = envy24ht_mixmap[dev]; + int hwch; + int i; + + if (sc == NULL) + return -1; + if (dev == 0 && sc->cfg->codec->setvolume == NULL) + return -1; + if (dev != 0 && ch == -1) + return -1; + hwch = envy24ht_chanmap[ch]; +#if (0) + device_printf(sc->dev, "envy24htmixer_set(m, %d, %d, %d)\n", + dev, left, right); #endif - snd_mtxlock(sc->lock); - if (dev == 0) { - for (i = 0; i < sc->dacn; i++) { - sc->cfg->codec->setvolume(sc->dac[i], PCMDIR_PLAY, left, right); + snd_mtxlock(sc->lock); + if (dev == 0) { + for (i = 0; i < sc->dacn; i++) { + sc->cfg->codec->setvolume(sc->dac[i], + PCMDIR_PLAY, left, right); + } + } else { + /* set volume value for hardware */ + if ((sc->left[hwch] = 100 - left) > ENVY24HT_VOL_MIN) + sc->left[hwch] = ENVY24HT_VOL_MUTE; + if ((sc->right[hwch] = 100 - right) > ENVY24HT_VOL_MIN) + sc->right[hwch] = ENVY24HT_VOL_MUTE; + + /* set volume for record channel and running play + * channel */ + if (hwch > ENVY24HT_CHAN_PLAY_SPDIF || sc->chan[ch].run) + envy24ht_setvolume(sc, hwch); } - } - else { - /* set volume value for hardware */ - if ((sc->left[hwch] = 100 - left) > ENVY24HT_VOL_MIN) - sc->left[hwch] = ENVY24HT_VOL_MUTE; - if ((sc->right[hwch] = 100 - right) > ENVY24HT_VOL_MIN) - sc->right[hwch] = ENVY24HT_VOL_MUTE; - - /* set volume for record channel and running play channel */ - if (hwch > ENVY24HT_CHAN_PLAY_SPDIF || sc->chan[ch].run) - envy24ht_setvolume(sc, hwch); - } - snd_mtxunlock(sc->lock); + snd_mtxunlock(sc->lock); - return right << 8 | left; -} + return right << 8 | left; + } -static u_int32_t -envy24htmixer_setrecsrc(struct snd_mixer *m, u_int32_t src) -{ - struct sc_info *sc = mix_getdevinfo(m); - int ch = envy24ht_mixmap[src]; -#if(0) - device_printf(sc->dev, "envy24htmixer_setrecsrc(m, %d)\n", src); + static u_int32_t envy24htmixer_setrecsrc(struct snd_mixer * m, + u_int32_t src) + { + struct sc_info *sc = mix_getdevinfo(m); + int ch = envy24ht_mixmap[src]; +#if (0) + device_printf(sc->dev, "envy24htmixer_setrecsrc(m, %d)\n", src); #endif - if (ch > ENVY24HT_CHAN_PLAY_SPDIF) - sc->src = ch; - return src; -} + if (ch > ENVY24HT_CHAN_PLAY_SPDIF) + sc->src = ch; + return src; + } -static kobj_method_t envy24htmixer_methods[] = { - KOBJMETHOD(mixer_init, envy24htmixer_init), - KOBJMETHOD(mixer_reinit, envy24htmixer_reinit), - KOBJMETHOD(mixer_uninit, envy24htmixer_uninit), - KOBJMETHOD(mixer_set, envy24htmixer_set), - KOBJMETHOD(mixer_setrecsrc, envy24htmixer_setrecsrc), - KOBJMETHOD_END -}; -MIXER_DECLARE(envy24htmixer); + static kobj_method_t envy24htmixer_methods[] = { + KOBJMETHOD(mixer_init, envy24htmixer_init), + KOBJMETHOD(mixer_reinit, envy24htmixer_reinit), + KOBJMETHOD(mixer_uninit, envy24htmixer_uninit), + KOBJMETHOD(mixer_set, envy24htmixer_set), + KOBJMETHOD(mixer_setrecsrc, envy24htmixer_setrecsrc), + KOBJMETHOD_END + }; + MIXER_DECLARE(envy24htmixer); -/* -------------------------------------------------------------------- */ + /* -------------------------------------------------------------------- + */ -/* The interrupt handler */ -static void -envy24ht_intr(void *p) -{ - struct sc_info *sc = (struct sc_info *)p; - struct sc_chinfo *ch; - u_int32_t ptr, dsize, feed; - int i; + /* The interrupt handler */ + static void envy24ht_intr(void *p) + { + struct sc_info *sc = (struct sc_info *)p; + struct sc_chinfo *ch; + u_int32_t ptr, dsize, feed; + int i; -#if(0) - device_printf(sc->dev, "envy24ht_intr()\n"); -#endif - snd_mtxlock(sc->lock); - if (envy24ht_checkintr(sc, PCMDIR_PLAY)) { -#if(0) - device_printf(sc->dev, "envy24ht_intr(): play\n"); -#endif - dsize = sc->psize / 4; - ptr = dsize - envy24ht_rdmt(sc, ENVY24HT_MT_PCNT, 2) - 1; -#if(0) - device_printf(sc->dev, "envy24ht_intr(): ptr = %d-->", ptr); -#endif - ptr -= ptr % sc->blk[0]; - feed = (ptr + dsize - sc->intr[0]) % dsize; -#if(0) - printf("%d intr = %d feed = %d\n", ptr, sc->intr[0], feed); -#endif - for (i = ENVY24HT_CHAN_PLAY_DAC1; i <= ENVY24HT_CHAN_PLAY_SPDIF; i++) { - ch = &sc->chan[i]; -#if(0) - if (ch->run) - device_printf(sc->dev, "envy24ht_intr(): chan[%d].blk = %d\n", i, ch->blk); -#endif - if (ch->run && ch->blk <= feed) { - snd_mtxunlock(sc->lock); - chn_intr(ch->channel); - snd_mtxlock(sc->lock); +#if (0) + device_printf(sc->dev, "envy24ht_intr()\n"); +#endif + snd_mtxlock(sc->lock); + if (envy24ht_checkintr(sc, PCMDIR_PLAY)) { +#if (0) + device_printf(sc->dev, "envy24ht_intr(): play\n"); +#endif + dsize = sc->psize / 4; + ptr = dsize - envy24ht_rdmt(sc, ENVY24HT_MT_PCNT, 2) - + 1; +#if (0) + device_printf(sc->dev, "envy24ht_intr(): ptr = %d-->", + ptr); +#endif + ptr -= ptr % sc->blk[0]; + feed = (ptr + dsize - sc->intr[0]) % dsize; +#if (0) + printf("%d intr = %d feed = %d\n", ptr, sc->intr[0], + feed); +#endif + for (i = ENVY24HT_CHAN_PLAY_DAC1; + i <= ENVY24HT_CHAN_PLAY_SPDIF; i++) { + ch = &sc->chan[i]; +#if (0) + if (ch->run) + device_printf(sc->dev, + "envy24ht_intr(): chan[%d].blk = %d\n", + i, ch->blk); +#endif + if (ch->run && ch->blk <= feed) { + snd_mtxunlock(sc->lock); + chn_intr(ch->channel); + snd_mtxlock(sc->lock); + } } + sc->intr[0] = ptr; + envy24ht_updintr(sc, PCMDIR_PLAY); } - sc->intr[0] = ptr; - envy24ht_updintr(sc, PCMDIR_PLAY); - } - if (envy24ht_checkintr(sc, PCMDIR_REC)) { -#if(0) - device_printf(sc->dev, "envy24ht_intr(): rec\n"); -#endif - dsize = sc->rsize / 4; - ptr = dsize - envy24ht_rdmt(sc, ENVY24HT_MT_RCNT, 2) - 1; - ptr -= ptr % sc->blk[1]; - feed = (ptr + dsize - sc->intr[1]) % dsize; - for (i = ENVY24HT_CHAN_REC_ADC1; i <= ENVY24HT_CHAN_REC_SPDIF; i++) { - ch = &sc->chan[i]; - if (ch->run && ch->blk <= feed) { - snd_mtxunlock(sc->lock); - chn_intr(ch->channel); - snd_mtxlock(sc->lock); + if (envy24ht_checkintr(sc, PCMDIR_REC)) { +#if (0) + device_printf(sc->dev, "envy24ht_intr(): rec\n"); +#endif + dsize = sc->rsize / 4; + ptr = dsize - envy24ht_rdmt(sc, ENVY24HT_MT_RCNT, 2) - + 1; + ptr -= ptr % sc->blk[1]; + feed = (ptr + dsize - sc->intr[1]) % dsize; + for (i = ENVY24HT_CHAN_REC_ADC1; + i <= ENVY24HT_CHAN_REC_SPDIF; i++) { + ch = &sc->chan[i]; + if (ch->run && ch->blk <= feed) { + snd_mtxunlock(sc->lock); + chn_intr(ch->channel); + snd_mtxlock(sc->lock); + } } + sc->intr[1] = ptr; + envy24ht_updintr(sc, PCMDIR_REC); } - sc->intr[1] = ptr; - envy24ht_updintr(sc, PCMDIR_REC); - } - snd_mtxunlock(sc->lock); - - return; -} + snd_mtxunlock(sc->lock); -/* - * Probe and attach the card - */ + return; + } -static int -envy24ht_pci_probe(device_t dev) -{ - u_int16_t sv, sd; - int i; + /* + * Probe and attach the card + */ -#if(0) - printf("envy24ht_pci_probe()\n"); -#endif - if (pci_get_device(dev) == PCID_ENVY24HT && - pci_get_vendor(dev) == PCIV_ENVY24) { - sv = pci_get_subvendor(dev); - sd = pci_get_subdevice(dev); - for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; i++) { - if (cfg_table[i].subvendor == sv && - cfg_table[i].subdevice == sd) { - break; + static int envy24ht_pci_probe(device_t dev) + { + u_int16_t sv, sd; + int i; + +#if (0) + printf("envy24ht_pci_probe()\n"); +#endif + if (pci_get_device(dev) == PCID_ENVY24HT && + pci_get_vendor(dev) == PCIV_ENVY24) { + sv = pci_get_subvendor(dev); + sd = pci_get_subdevice(dev); + for (i = 0; cfg_table[i].subvendor != 0 || + cfg_table[i].subdevice != 0; + i++) { + if (cfg_table[i].subvendor == sv && + cfg_table[i].subdevice == sd) { + break; + } } - } - device_set_desc(dev, cfg_table[i].name); -#if(0) - printf("envy24ht_pci_probe(): return 0\n"); + device_set_desc(dev, cfg_table[i].name); +#if (0) + printf("envy24ht_pci_probe(): return 0\n"); #endif - return 0; - } - else { -#if(0) - printf("envy24ht_pci_probe(): return ENXIO\n"); + return 0; + } else { +#if (0) + printf("envy24ht_pci_probe(): return ENXIO\n"); #endif - return ENXIO; + return ENXIO; + } } -} -static void -envy24ht_dmapsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) -{ - struct sc_info *sc = arg; - - sc->paddr = segs->ds_addr; -#if(0) - device_printf(sc->dev, "envy24ht_dmapsetmap()\n"); - if (bootverbose) { - printf("envy24ht(play): setmap %lx, %lx; ", - (unsigned long)segs->ds_addr, - (unsigned long)segs->ds_len); - } + static void envy24ht_dmapsetmap(void *arg, bus_dma_segment_t *segs, + int nseg, int error) + { + struct sc_info *sc = arg; + + sc->paddr = segs->ds_addr; +#if (0) + device_printf(sc->dev, "envy24ht_dmapsetmap()\n"); + if (bootverbose) { + printf("envy24ht(play): setmap %lx, %lx; ", + (unsigned long)segs->ds_addr, + (unsigned long)segs->ds_len); + } #endif - envy24ht_wrmt(sc, ENVY24HT_MT_PADDR, (uint32_t)segs->ds_addr, 4); - envy24ht_wrmt(sc, ENVY24HT_MT_PCNT, (uint32_t)(segs->ds_len / 4 - 1), 2); -} - -static void -envy24ht_dmarsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) -{ - struct sc_info *sc = arg; - - sc->raddr = segs->ds_addr; -#if(0) - device_printf(sc->dev, "envy24ht_dmarsetmap()\n"); - if (bootverbose) { - printf("envy24ht(record): setmap %lx, %lx; ", - (unsigned long)segs->ds_addr, - (unsigned long)segs->ds_len); + envy24ht_wrmt(sc, ENVY24HT_MT_PADDR, (uint32_t)segs->ds_addr, + 4); + envy24ht_wrmt(sc, ENVY24HT_MT_PCNT, + (uint32_t)(segs->ds_len / 4 - 1), 2); } + + static void envy24ht_dmarsetmap(void *arg, bus_dma_segment_t *segs, + int nseg, int error) + { + struct sc_info *sc = arg; + + sc->raddr = segs->ds_addr; +#if (0) + device_printf(sc->dev, "envy24ht_dmarsetmap()\n"); + if (bootverbose) { + printf("envy24ht(record): setmap %lx, %lx; ", + (unsigned long)segs->ds_addr, + (unsigned long)segs->ds_len); + } #endif - envy24ht_wrmt(sc, ENVY24HT_MT_RADDR, (uint32_t)segs->ds_addr, 4); - envy24ht_wrmt(sc, ENVY24HT_MT_RCNT, (uint32_t)(segs->ds_len / 4 - 1), 2); -} + envy24ht_wrmt(sc, ENVY24HT_MT_RADDR, (uint32_t)segs->ds_addr, + 4); + envy24ht_wrmt(sc, ENVY24HT_MT_RCNT, + (uint32_t)(segs->ds_len / 4 - 1), 2); + } -static void -envy24ht_dmafree(struct sc_info *sc) -{ -#if(0) - device_printf(sc->dev, "envy24ht_dmafree():"); - printf(" sc->raddr(0x%08x)", (u_int32_t)sc->raddr); - printf(" sc->paddr(0x%08x)", (u_int32_t)sc->paddr); - if (sc->rbuf) printf(" sc->rbuf(0x%08x)", (u_int32_t)sc->rbuf); - else printf(" sc->rbuf(null)"); - if (sc->pbuf) printf(" sc->pbuf(0x%08x)\n", (u_int32_t)sc->pbuf); - else printf(" sc->pbuf(null)\n"); -#endif -#if(0) - if (sc->raddr) - bus_dmamap_unload(sc->dmat, sc->rmap); - if (sc->paddr) - bus_dmamap_unload(sc->dmat, sc->pmap); - if (sc->rbuf) - bus_dmamem_free(sc->dmat, sc->rbuf, sc->rmap); - if (sc->pbuf) - bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap); + static void envy24ht_dmafree(struct sc_info * sc) + { +#if (0) + device_printf(sc->dev, "envy24ht_dmafree():"); + printf(" sc->raddr(0x%08x)", (u_int32_t)sc->raddr); + printf(" sc->paddr(0x%08x)", (u_int32_t)sc->paddr); + if (sc->rbuf) + printf(" sc->rbuf(0x%08x)", (u_int32_t)sc->rbuf); + else + printf(" sc->rbuf(null)"); + if (sc->pbuf) + printf(" sc->pbuf(0x%08x)\n", (u_int32_t)sc->pbuf); + else + printf(" sc->pbuf(null)\n"); +#endif +#if (0) + if (sc->raddr) + bus_dmamap_unload(sc->dmat, sc->rmap); + if (sc->paddr) + bus_dmamap_unload(sc->dmat, sc->pmap); + if (sc->rbuf) + bus_dmamem_free(sc->dmat, sc->rbuf, sc->rmap); + if (sc->pbuf) + bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap); #else bus_dmamap_unload(sc->dmat, sc->rmap); bus_dmamap_unload(sc->dmat, sc->pmap); @@ -2132,165 +2304,171 @@ bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap); #endif - sc->raddr = sc->paddr = 0; - sc->pbuf = NULL; - sc->rbuf = NULL; + sc->raddr = sc->paddr = 0; + sc->pbuf = NULL; + sc->rbuf = NULL; - return; -} - -static int -envy24ht_dmainit(struct sc_info *sc) -{ + return; + } -#if(0) - device_printf(sc->dev, "envy24ht_dmainit()\n"); -#endif - /* init values */ - sc->psize = ENVY24HT_PLAY_BUFUNIT * ENVY24HT_SAMPLE_NUM; - sc->rsize = ENVY24HT_REC_BUFUNIT * ENVY24HT_SAMPLE_NUM; - sc->pbuf = NULL; - sc->rbuf = NULL; - sc->paddr = sc->raddr = 0; - sc->blk[0] = sc->blk[1] = 0; - - /* allocate DMA buffer */ -#if(0) - device_printf(sc->dev, "envy24ht_dmainit(): bus_dmamem_alloc(): sc->pbuf\n"); -#endif - if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf, BUS_DMA_NOWAIT, &sc->pmap)) - goto bad; -#if(0) - device_printf(sc->dev, "envy24ht_dmainit(): bus_dmamem_alloc(): sc->rbuf\n"); -#endif - if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf, BUS_DMA_NOWAIT, &sc->rmap)) - goto bad; -#if(0) - device_printf(sc->dev, "envy24ht_dmainit(): bus_dmamem_load(): sc->pmap\n"); -#endif - if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->psize, envy24ht_dmapsetmap, sc, BUS_DMA_NOWAIT)) - goto bad; -#if(0) - device_printf(sc->dev, "envy24ht_dmainit(): bus_dmamem_load(): sc->rmap\n"); -#endif - if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->rsize, envy24ht_dmarsetmap, sc, BUS_DMA_NOWAIT)) - goto bad; - bzero(sc->pbuf, sc->psize); - bzero(sc->rbuf, sc->rsize); + static int envy24ht_dmainit(struct sc_info * sc) + { - return 0; - bad: - envy24ht_dmafree(sc); - return ENOSPC; -} +#if (0) + device_printf(sc->dev, "envy24ht_dmainit()\n"); +#endif + /* init values */ + sc->psize = ENVY24HT_PLAY_BUFUNIT * ENVY24HT_SAMPLE_NUM; + sc->rsize = ENVY24HT_REC_BUFUNIT * ENVY24HT_SAMPLE_NUM; + sc->pbuf = NULL; + sc->rbuf = NULL; + sc->paddr = sc->raddr = 0; + sc->blk[0] = sc->blk[1] = 0; + + /* allocate DMA buffer */ +#if (0) + device_printf(sc->dev, + "envy24ht_dmainit(): bus_dmamem_alloc(): sc->pbuf\n"); +#endif + if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf, + BUS_DMA_NOWAIT, &sc->pmap)) + goto bad; +#if (0) + device_printf(sc->dev, + "envy24ht_dmainit(): bus_dmamem_alloc(): sc->rbuf\n"); +#endif + if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf, + BUS_DMA_NOWAIT, &sc->rmap)) + goto bad; +#if (0) + device_printf(sc->dev, + "envy24ht_dmainit(): bus_dmamem_load(): sc->pmap\n"); +#endif + if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->psize, + envy24ht_dmapsetmap, sc, BUS_DMA_NOWAIT)) + goto bad; +#if (0) + device_printf(sc->dev, + "envy24ht_dmainit(): bus_dmamem_load(): sc->rmap\n"); +#endif + if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->rsize, + envy24ht_dmarsetmap, sc, BUS_DMA_NOWAIT)) + goto bad; + bzero(sc->pbuf, sc->psize); + bzero(sc->rbuf, sc->rsize); -static void -envy24ht_putcfg(struct sc_info *sc) -{ - device_printf(sc->dev, "system configuration\n"); - printf(" SubVendorID: 0x%04x, SubDeviceID: 0x%04x\n", - sc->cfg->subvendor, sc->cfg->subdevice); - printf(" XIN2 Clock Source: "); - switch (sc->cfg->scfg & ENVY24HT_CCSM_SCFG_XIN2) { - case 0x00: - printf("24.576MHz(96kHz*256)\n"); - break; - case 0x40: - printf("49.152MHz(192kHz*256)\n"); - break; - case 0x80: - printf("reserved\n"); - break; - default: - printf("illegal system setting\n"); - } - printf(" MPU-401 UART(s) #: "); - if (sc->cfg->scfg & ENVY24HT_CCSM_SCFG_MPU) - printf("1\n"); - else - printf("not implemented\n"); - switch (sc->adcn) { - case 0x01: - case 0x02: - printf(" ADC #: "); - printf("%d\n", sc->adcn); - break; - case 0x03: - printf(" ADC #: "); - printf("%d", 1); - printf(" and SPDIF receiver connected\n"); - break; - default: - printf(" no physical inputs\n"); - } - printf(" DAC #: "); - printf("%d\n", sc->dacn); - printf(" Multi-track converter type: "); - if ((sc->cfg->acl & ENVY24HT_CCSM_ACL_MTC) == 0) { - printf("AC'97(SDATA_OUT:"); - if (sc->cfg->acl & ENVY24HT_CCSM_ACL_OMODE) - printf("packed"); - else - printf("split"); - printf(")\n"); + return 0; + bad: + envy24ht_dmafree(sc); + return ENOSPC; } - else { - printf("I2S("); - if (sc->cfg->i2s & ENVY24HT_CCSM_I2S_VOL) - printf("with volume, "); - if (sc->cfg->i2s & ENVY24HT_CCSM_I2S_192KHZ) - printf("192KHz support, "); - else - if (sc->cfg->i2s & ENVY24HT_CCSM_I2S_96KHZ) - printf("192KHz support, "); - else - printf("48KHz support, "); - switch (sc->cfg->i2s & ENVY24HT_CCSM_I2S_RES) { - case ENVY24HT_CCSM_I2S_16BIT: - printf("16bit resolution, "); + + static void envy24ht_putcfg(struct sc_info * sc) + { + device_printf(sc->dev, "system configuration\n"); + printf(" SubVendorID: 0x%04x, SubDeviceID: 0x%04x\n", + sc->cfg->subvendor, sc->cfg->subdevice); + printf(" XIN2 Clock Source: "); + switch (sc->cfg->scfg & ENVY24HT_CCSM_SCFG_XIN2) { + case 0x00: + printf("24.576MHz(96kHz*256)\n"); + break; + case 0x40: + printf("49.152MHz(192kHz*256)\n"); break; - case ENVY24HT_CCSM_I2S_18BIT: - printf("18bit resolution, "); + case 0x80: + printf("reserved\n"); break; - case ENVY24HT_CCSM_I2S_20BIT: - printf("20bit resolution, "); + default: + printf("illegal system setting\n"); + } + printf(" MPU-401 UART(s) #: "); + if (sc->cfg->scfg & ENVY24HT_CCSM_SCFG_MPU) + printf("1\n"); + else + printf("not implemented\n"); + switch (sc->adcn) { + case 0x01: + case 0x02: + printf(" ADC #: "); + printf("%d\n", sc->adcn); break; - case ENVY24HT_CCSM_I2S_24BIT: - printf("24bit resolution, "); + case 0x03: + printf(" ADC #: "); + printf("%d", 1); + printf(" and SPDIF receiver connected\n"); break; + default: + printf(" no physical inputs\n"); + } + printf(" DAC #: "); + printf("%d\n", sc->dacn); + printf(" Multi-track converter type: "); + if ((sc->cfg->acl & ENVY24HT_CCSM_ACL_MTC) == 0) { + printf("AC'97(SDATA_OUT:"); + if (sc->cfg->acl & ENVY24HT_CCSM_ACL_OMODE) + printf("packed"); + else + printf("split"); + printf(")\n"); + } else { + printf("I2S("); + if (sc->cfg->i2s & ENVY24HT_CCSM_I2S_VOL) + printf("with volume, "); + if (sc->cfg->i2s & ENVY24HT_CCSM_I2S_192KHZ) + printf("192KHz support, "); + else if (sc->cfg->i2s & ENVY24HT_CCSM_I2S_96KHZ) + printf("192KHz support, "); + else + printf("48KHz support, "); + switch (sc->cfg->i2s & ENVY24HT_CCSM_I2S_RES) { + case ENVY24HT_CCSM_I2S_16BIT: + printf("16bit resolution, "); + break; + case ENVY24HT_CCSM_I2S_18BIT: + printf("18bit resolution, "); + break; + case ENVY24HT_CCSM_I2S_20BIT: + printf("20bit resolution, "); + break; + case ENVY24HT_CCSM_I2S_24BIT: + printf("24bit resolution, "); + break; + } + printf("ID#0x%x)\n", + sc->cfg->i2s & ENVY24HT_CCSM_I2S_ID); } - printf("ID#0x%x)\n", sc->cfg->i2s & ENVY24HT_CCSM_I2S_ID); + printf(" S/PDIF(IN/OUT): "); + if (sc->cfg->spdif & ENVY24HT_CCSM_SPDIF_IN) + printf("1/"); + else + printf("0/"); + if (sc->cfg->spdif & ENVY24HT_CCSM_SPDIF_OUT) + printf("1 "); + else + printf("0 "); + if (sc->cfg->spdif & + (ENVY24HT_CCSM_SPDIF_IN | ENVY24HT_CCSM_SPDIF_OUT)) + printf("ID# 0x%02x\n", + (sc->cfg->spdif & ENVY24HT_CCSM_SPDIF_ID) >> 2); + printf(" GPIO(mask/dir/state): 0x%02x/0x%02x/0x%02x\n", + sc->cfg->gpiomask, sc->cfg->gpiodir, sc->cfg->gpiostate); } - printf(" S/PDIF(IN/OUT): "); - if (sc->cfg->spdif & ENVY24HT_CCSM_SPDIF_IN) - printf("1/"); - else - printf("0/"); - if (sc->cfg->spdif & ENVY24HT_CCSM_SPDIF_OUT) - printf("1 "); - else - printf("0 "); - if (sc->cfg->spdif & (ENVY24HT_CCSM_SPDIF_IN | ENVY24HT_CCSM_SPDIF_OUT)) - printf("ID# 0x%02x\n", (sc->cfg->spdif & ENVY24HT_CCSM_SPDIF_ID) >> 2); - printf(" GPIO(mask/dir/state): 0x%02x/0x%02x/0x%02x\n", - sc->cfg->gpiomask, sc->cfg->gpiodir, sc->cfg->gpiostate); -} -static int -envy24ht_init(struct sc_info *sc) -{ - u_int32_t data; -#if(0) - int rtn; + static int envy24ht_init(struct sc_info * sc) + { + u_int32_t data; +#if (0) + int rtn; #endif - int i; - u_int32_t sv, sd; + int i; + u_int32_t sv, sd; -#if(0) - device_printf(sc->dev, "envy24ht_init()\n"); +#if (0) + device_printf(sc->dev, "envy24ht_init()\n"); #endif - /* reset chip */ + /* reset chip */ #if 0 envy24ht_wrcs(sc, ENVY24HT_CCS_CTL, ENVY24HT_CCS_CTL_RESET, 1); DELAY(200); @@ -2303,285 +2481,298 @@ pci_write_config(sc->dev, PCIR_LAC, data, 2); #endif - /* check system configuration */ - sc->cfg = NULL; - for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; i++) { - /* 1st: search configuration from table */ - sv = pci_get_subvendor(sc->dev); - sd = pci_get_subdevice(sc->dev); - if (sv == cfg_table[i].subvendor && sd == cfg_table[i].subdevice) { -#if(0) - device_printf(sc->dev, "Set configuration from table\n"); -#endif - sc->cfg = &cfg_table[i]; - break; + /* check system configuration */ + sc->cfg = NULL; + for (i = 0; + cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; + i++) { + /* 1st: search configuration from table */ + sv = pci_get_subvendor(sc->dev); + sd = pci_get_subdevice(sc->dev); + if (sv == cfg_table[i].subvendor && + sd == cfg_table[i].subdevice) { +#if (0) + device_printf(sc->dev, + "Set configuration from table\n"); +#endif + sc->cfg = &cfg_table[i]; + break; + } } - } - if (sc->cfg == NULL) { - /* 2nd: read configuration from table */ - sc->cfg = envy24ht_rom2cfg(sc); - } - sc->adcn = ((sc->cfg->scfg & ENVY24HT_CCSM_SCFG_ADC) >> 2) + 1; /* need to be fixed */ - sc->dacn = (sc->cfg->scfg & ENVY24HT_CCSM_SCFG_DAC) + 1; + if (sc->cfg == NULL) { + /* 2nd: read configuration from table */ + sc->cfg = envy24ht_rom2cfg(sc); + } + sc->adcn = ((sc->cfg->scfg & ENVY24HT_CCSM_SCFG_ADC) >> 2) + + 1; /* need to be fixed */ + sc->dacn = (sc->cfg->scfg & ENVY24HT_CCSM_SCFG_DAC) + 1; - if (1 /* bootverbose */) { - envy24ht_putcfg(sc); - } + if (1 /* bootverbose */) { + envy24ht_putcfg(sc); + } - /* set system configuration */ - envy24ht_wrcs(sc, ENVY24HT_CCS_SCFG, sc->cfg->scfg, 1); - envy24ht_wrcs(sc, ENVY24HT_CCS_ACL, sc->cfg->acl, 1); - envy24ht_wrcs(sc, ENVY24HT_CCS_I2S, sc->cfg->i2s, 1); - envy24ht_wrcs(sc, ENVY24HT_CCS_SPDIF, sc->cfg->spdif, 1); - envy24ht_gpiosetmask(sc, sc->cfg->gpiomask); - envy24ht_gpiosetdir(sc, sc->cfg->gpiodir); - envy24ht_gpiowr(sc, sc->cfg->gpiostate); - - if ((sc->cfg->subvendor == 0x3031) && (sc->cfg->subdevice == 0x4553)) { - envy24ht_wri2c(sc, 0x22, 0x00, 0x07); - envy24ht_wri2c(sc, 0x22, 0x04, 0x5f | 0x80); - envy24ht_wri2c(sc, 0x22, 0x05, 0x5f | 0x80); - } + /* set system configuration */ + envy24ht_wrcs(sc, ENVY24HT_CCS_SCFG, sc->cfg->scfg, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_ACL, sc->cfg->acl, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_I2S, sc->cfg->i2s, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_SPDIF, sc->cfg->spdif, 1); + envy24ht_gpiosetmask(sc, sc->cfg->gpiomask); + envy24ht_gpiosetdir(sc, sc->cfg->gpiodir); + envy24ht_gpiowr(sc, sc->cfg->gpiostate); + + if ((sc->cfg->subvendor == 0x3031) && + (sc->cfg->subdevice == 0x4553)) { + envy24ht_wri2c(sc, 0x22, 0x00, 0x07); + envy24ht_wri2c(sc, 0x22, 0x04, 0x5f | 0x80); + envy24ht_wri2c(sc, 0x22, 0x05, 0x5f | 0x80); + } - for (i = 0; i < sc->adcn; i++) { - sc->adc[i] = sc->cfg->codec->create(sc->dev, sc, PCMDIR_REC, i); - sc->cfg->codec->init(sc->adc[i]); - } - for (i = 0; i < sc->dacn; i++) { - sc->dac[i] = sc->cfg->codec->create(sc->dev, sc, PCMDIR_PLAY, i); - sc->cfg->codec->init(sc->dac[i]); - } + for (i = 0; i < sc->adcn; i++) { + sc->adc[i] = sc->cfg->codec->create(sc->dev, sc, + PCMDIR_REC, i); + sc->cfg->codec->init(sc->adc[i]); + } + for (i = 0; i < sc->dacn; i++) { + sc->dac[i] = sc->cfg->codec->create(sc->dev, sc, + PCMDIR_PLAY, i); + sc->cfg->codec->init(sc->dac[i]); + } - /* initialize DMA buffer */ -#if(0) - device_printf(sc->dev, "envy24ht_init(): initialize DMA buffer\n"); + /* initialize DMA buffer */ +#if (0) + device_printf(sc->dev, + "envy24ht_init(): initialize DMA buffer\n"); #endif - if (envy24ht_dmainit(sc)) - return ENOSPC; + if (envy24ht_dmainit(sc)) + return ENOSPC; - /* initialize status */ - sc->run[0] = sc->run[1] = 0; - sc->intr[0] = sc->intr[1] = 0; - sc->speed = 0; - sc->caps[0].fmtlist = envy24ht_playfmt; - sc->caps[1].fmtlist = envy24ht_recfmt; + /* initialize status */ + sc->run[0] = sc->run[1] = 0; + sc->intr[0] = sc->intr[1] = 0; + sc->speed = 0; + sc->caps[0].fmtlist = envy24ht_playfmt; + sc->caps[1].fmtlist = envy24ht_recfmt; - /* set channel router */ + /* set channel router */ #if 0 envy24ht_route(sc, ENVY24HT_ROUTE_DAC_1, ENVY24HT_ROUTE_CLASS_MIX, 0, 0); envy24ht_route(sc, ENVY24HT_ROUTE_DAC_SPDIF, ENVY24HT_ROUTE_CLASS_DMA, 0, 0); envy24ht_route(sc, ENVY24HT_ROUTE_DAC_SPDIF, ENVY24HT_ROUTE_CLASS_MIX, 0, 0); #endif - /* set macro interrupt mask */ - data = envy24ht_rdcs(sc, ENVY24HT_CCS_IMASK, 1); - envy24ht_wrcs(sc, ENVY24HT_CCS_IMASK, data & ~ENVY24HT_CCS_IMASK_PMT, 1); - data = envy24ht_rdcs(sc, ENVY24HT_CCS_IMASK, 1); -#if(0) - device_printf(sc->dev, "envy24ht_init(): CCS_IMASK-->0x%02x\n", data); + /* set macro interrupt mask */ + data = envy24ht_rdcs(sc, ENVY24HT_CCS_IMASK, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_IMASK, + data & ~ENVY24HT_CCS_IMASK_PMT, 1); + data = envy24ht_rdcs(sc, ENVY24HT_CCS_IMASK, 1); +#if (0) + device_printf(sc->dev, "envy24ht_init(): CCS_IMASK-->0x%02x\n", + data); #endif - return 0; -} - -static int -envy24ht_alloc_resource(struct sc_info *sc) -{ - /* allocate I/O port resource */ - sc->csid = PCIR_CCS; - sc->cs = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, - &sc->csid, RF_ACTIVE); - sc->mtid = ENVY24HT_PCIR_MT; - sc->mt = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, - &sc->mtid, RF_ACTIVE); - if (!sc->cs || !sc->mt) { - device_printf(sc->dev, "unable to map IO port space\n"); - return ENXIO; - } - sc->cst = rman_get_bustag(sc->cs); - sc->csh = rman_get_bushandle(sc->cs); - sc->mtt = rman_get_bustag(sc->mt); - sc->mth = rman_get_bushandle(sc->mt); -#if(0) - device_printf(sc->dev, - "IO port register values\nCCS: 0x%lx\nMT: 0x%lx\n", - pci_read_config(sc->dev, PCIR_CCS, 4), - pci_read_config(sc->dev, PCIR_MT, 4)); -#endif - - /* allocate interrupt resource */ - sc->irqid = 0; - sc->irq = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &sc->irqid, - RF_ACTIVE | RF_SHAREABLE); - if (!sc->irq || - snd_setup_intr(sc->dev, sc->irq, INTR_MPSAFE, envy24ht_intr, sc, &sc->ih)) { - device_printf(sc->dev, "unable to map interrupt\n"); - return ENXIO; + return 0; } - /* allocate DMA resource */ - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(sc->dev), - /*alignment*/4, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/BUS_SPACE_MAXSIZE_ENVY24, - /*nsegments*/1, /*maxsegsz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, - /*lockarg*/NULL, &sc->dmat) != 0) { - device_printf(sc->dev, "unable to create dma tag\n"); - return ENXIO; - } + static int envy24ht_alloc_resource(struct sc_info * sc) + { + /* allocate I/O port resource */ + sc->csid = PCIR_CCS; + sc->cs = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, + &sc->csid, RF_ACTIVE); + sc->mtid = ENVY24HT_PCIR_MT; + sc->mt = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT, + &sc->mtid, RF_ACTIVE); + if (!sc->cs || !sc->mt) { + device_printf(sc->dev, "unable to map IO port space\n"); + return ENXIO; + } + sc->cst = rman_get_bustag(sc->cs); + sc->csh = rman_get_bushandle(sc->cs); + sc->mtt = rman_get_bustag(sc->mt); + sc->mth = rman_get_bushandle(sc->mt); +#if (0) + device_printf(sc->dev, + "IO port register values\nCCS: 0x%lx\nMT: 0x%lx\n", + pci_read_config(sc->dev, PCIR_CCS, 4), + pci_read_config(sc->dev, PCIR_MT, 4)); +#endif + + /* allocate interrupt resource */ + sc->irqid = 0; + sc->irq = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, + &sc->irqid, RF_ACTIVE | RF_SHAREABLE); + if (!sc->irq || + snd_setup_intr(sc->dev, sc->irq, INTR_MPSAFE, envy24ht_intr, + sc, &sc->ih)) { + device_printf(sc->dev, "unable to map interrupt\n"); + return ENXIO; + } - return 0; -} + /* allocate DMA resource */ + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(sc->dev), + /*alignment*/ 4, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ BUS_SPACE_MAXSIZE_ENVY24, + /*nsegments*/ 1, /*maxsegsz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, + /*lockarg*/ NULL, &sc->dmat) != 0) { + device_printf(sc->dev, "unable to create dma tag\n"); + return ENXIO; + } -static int -envy24ht_pci_attach(device_t dev) -{ - struct sc_info *sc; - char status[SND_STATUSLEN]; - int err = 0; - int i; - -#if(0) - device_printf(dev, "envy24ht_pci_attach()\n"); -#endif - /* get sc_info data area */ - if ((sc = malloc(sizeof(*sc), M_ENVY24HT, M_NOWAIT)) == NULL) { - device_printf(dev, "cannot allocate softc\n"); - return ENXIO; + return 0; } - bzero(sc, sizeof(*sc)); - sc->lock = snd_mtxcreate(device_get_nameunit(dev), - "snd_envy24ht softc"); - sc->dev = dev; + static int envy24ht_pci_attach(device_t dev) + { + struct sc_info *sc; + char status[SND_STATUSLEN]; + int err = 0; + int i; + +#if (0) + device_printf(dev, "envy24ht_pci_attach()\n"); +#endif + /* get sc_info data area */ + if ((sc = malloc(sizeof(*sc), M_ENVY24HT, M_NOWAIT)) == NULL) { + device_printf(dev, "cannot allocate softc\n"); + return ENXIO; + } - /* initialize PCI interface */ - pci_enable_busmaster(dev); + bzero(sc, sizeof(*sc)); + sc->lock = snd_mtxcreate(device_get_nameunit(dev), + "snd_envy24ht softc"); + sc->dev = dev; - /* allocate resources */ - err = envy24ht_alloc_resource(sc); - if (err) { - device_printf(dev, "unable to allocate system resources\n"); - goto bad; - } + /* initialize PCI interface */ + pci_enable_busmaster(dev); - /* initialize card */ - err = envy24ht_init(sc); - if (err) { - device_printf(dev, "unable to initialize the card\n"); - goto bad; - } + /* allocate resources */ + err = envy24ht_alloc_resource(sc); + if (err) { + device_printf(dev, + "unable to allocate system resources\n"); + goto bad; + } - /* set multi track mixer */ - mixer_init(dev, &envy24htmixer_class, sc); + /* initialize card */ + err = envy24ht_init(sc); + if (err) { + device_printf(dev, "unable to initialize the card\n"); + goto bad; + } + + /* set multi track mixer */ + mixer_init(dev, &envy24htmixer_class, sc); - /* set channel information */ - /* err = pcm_register(dev, sc, 5, 2 + sc->adcn); */ - err = pcm_register(dev, sc, 1, 2 + sc->adcn); - if (err) - goto bad; - sc->chnum = 0; - /* for (i = 0; i < 5; i++) { */ + /* set channel information */ + /* err = pcm_register(dev, sc, 5, 2 + sc->adcn); */ + err = pcm_register(dev, sc, 1, 2 + sc->adcn); + if (err) + goto bad; + sc->chnum = 0; + /* for (i = 0; i < 5; i++) { */ pcm_addchan(dev, PCMDIR_PLAY, &envy24htchan_class, sc); sc->chnum++; - /* } */ - for (i = 0; i < 2 + sc->adcn; i++) { - pcm_addchan(dev, PCMDIR_REC, &envy24htchan_class, sc); - sc->chnum++; - } + /* } */ + for (i = 0; i < 2 + sc->adcn; i++) { + pcm_addchan(dev, PCMDIR_REC, &envy24htchan_class, sc); + sc->chnum++; + } - /* set status iformation */ - snprintf(status, SND_STATUSLEN, - "port 0x%jx:%jd,0x%jx:%jd irq %jd on %s", - rman_get_start(sc->cs), - rman_get_end(sc->cs) - rman_get_start(sc->cs) + 1, - rman_get_start(sc->mt), - rman_get_end(sc->mt) - rman_get_start(sc->mt) + 1, - rman_get_start(sc->irq), - device_get_nameunit(device_get_parent(dev))); - pcm_setstatus(dev, status); + /* set status iformation */ + snprintf(status, SND_STATUSLEN, + "port 0x%jx:%jd,0x%jx:%jd irq %jd on %s", + rman_get_start(sc->cs), + rman_get_end(sc->cs) - rman_get_start(sc->cs) + 1, + rman_get_start(sc->mt), + rman_get_end(sc->mt) - rman_get_start(sc->mt) + 1, + rman_get_start(sc->irq), + device_get_nameunit(device_get_parent(dev))); + pcm_setstatus(dev, status); - return 0; + return 0; + + bad: + if (sc->ih) + bus_teardown_intr(dev, sc->irq, sc->ih); + if (sc->irq) + bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, + sc->irq); + envy24ht_dmafree(sc); + if (sc->dmat) + bus_dma_tag_destroy(sc->dmat); + if (sc->cfg->codec->destroy != NULL) { + for (i = 0; i < sc->adcn; i++) + sc->cfg->codec->destroy(sc->adc[i]); + for (i = 0; i < sc->dacn; i++) + sc->cfg->codec->destroy(sc->dac[i]); + } + envy24ht_cfgfree(sc->cfg); + if (sc->cs) + bus_release_resource(dev, SYS_RES_IOPORT, sc->csid, + sc->cs); + if (sc->mt) + bus_release_resource(dev, SYS_RES_IOPORT, sc->mtid, + sc->mt); + if (sc->lock) + snd_mtxfree(sc->lock); + free(sc, M_ENVY24HT); + return err; + } + + static int envy24ht_pci_detach(device_t dev) + { + struct sc_info *sc; + int r; + int i; -bad: - if (sc->ih) +#if (0) + device_printf(dev, "envy24ht_pci_detach()\n"); +#endif + sc = pcm_getdevinfo(dev); + if (sc == NULL) + return 0; + r = pcm_unregister(dev); + if (r) + return r; + + envy24ht_dmafree(sc); + if (sc->cfg->codec->destroy != NULL) { + for (i = 0; i < sc->adcn; i++) + sc->cfg->codec->destroy(sc->adc[i]); + for (i = 0; i < sc->dacn; i++) + sc->cfg->codec->destroy(sc->dac[i]); + } + envy24ht_cfgfree(sc->cfg); + bus_dma_tag_destroy(sc->dmat); bus_teardown_intr(dev, sc->irq, sc->ih); - if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); - envy24ht_dmafree(sc); - if (sc->dmat) - bus_dma_tag_destroy(sc->dmat); - if (sc->cfg->codec->destroy != NULL) { - for (i = 0; i < sc->adcn; i++) - sc->cfg->codec->destroy(sc->adc[i]); - for (i = 0; i < sc->dacn; i++) - sc->cfg->codec->destroy(sc->dac[i]); - } - envy24ht_cfgfree(sc->cfg); - if (sc->cs) bus_release_resource(dev, SYS_RES_IOPORT, sc->csid, sc->cs); - if (sc->mt) bus_release_resource(dev, SYS_RES_IOPORT, sc->mtid, sc->mt); - if (sc->lock) snd_mtxfree(sc->lock); - free(sc, M_ENVY24HT); - return err; -} - -static int -envy24ht_pci_detach(device_t dev) -{ - struct sc_info *sc; - int r; - int i; - -#if(0) - device_printf(dev, "envy24ht_pci_detach()\n"); -#endif - sc = pcm_getdevinfo(dev); - if (sc == NULL) + free(sc, M_ENVY24HT); return 0; - r = pcm_unregister(dev); - if (r) - return r; - - envy24ht_dmafree(sc); - if (sc->cfg->codec->destroy != NULL) { - for (i = 0; i < sc->adcn; i++) - sc->cfg->codec->destroy(sc->adc[i]); - for (i = 0; i < sc->dacn; i++) - sc->cfg->codec->destroy(sc->dac[i]); } - envy24ht_cfgfree(sc->cfg); - bus_dma_tag_destroy(sc->dmat); - bus_teardown_intr(dev, sc->irq, sc->ih); - bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); - bus_release_resource(dev, SYS_RES_IOPORT, sc->csid, sc->cs); - bus_release_resource(dev, SYS_RES_IOPORT, sc->mtid, sc->mt); - snd_mtxfree(sc->lock); - free(sc, M_ENVY24HT); - return 0; -} - -static device_method_t envy24ht_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, envy24ht_pci_probe), - DEVMETHOD(device_attach, envy24ht_pci_attach), - DEVMETHOD(device_detach, envy24ht_pci_detach), - { 0, 0 } -}; - -static driver_t envy24ht_driver = { - "pcm", - envy24ht_methods, - PCM_SOFTC_SIZE, -}; -DRIVER_MODULE(snd_envy24ht, pci, envy24ht_driver, 0, 0); -MODULE_DEPEND(snd_envy24ht, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); -MODULE_DEPEND(snd_envy24ht, snd_spicds, 1, 1, 1); -MODULE_VERSION(snd_envy24ht, 1); + static device_method_t envy24ht_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, envy24ht_pci_probe), + DEVMETHOD(device_attach, envy24ht_pci_attach), + DEVMETHOD(device_detach, envy24ht_pci_detach), { 0, 0 } + }; + + static driver_t envy24ht_driver = { + "pcm", + envy24ht_methods, + PCM_SOFTC_SIZE, + }; + + DRIVER_MODULE(snd_envy24ht, pci, envy24ht_driver, 0, 0); + MODULE_DEPEND(snd_envy24ht, sound, SOUND_MINVER, SOUND_PREFVER, + SOUND_MAXVER); + MODULE_DEPEND(snd_envy24ht, snd_spicds, 1, 1, 1); + MODULE_VERSION(snd_envy24ht, 1); Index: sys/dev/sound/pci/es137x.h =================================================================== --- sys/dev/sound/pci/es137x.h +++ sys/dev/sound/pci/es137x.h @@ -31,171 +31,191 @@ #ifndef _ES1370_REG_H #define _ES1370_REG_H -#define ES1370_REG_CONTROL 0x00 -#define ES1370_REG_STATUS 0x04 -#define ES1370_REG_UART_DATA 0x08 -#define ES1370_REG_UART_STATUS 0x09 -#define ES1370_REG_UART_CONTROL 0x09 -#define ES1370_REG_UART_TEST 0x0a -#define ES1370_REG_MEMPAGE 0x0c -#define ES1370_REG_CODEC 0x10 -#define CODEC_INDEX_SHIFT 8 -#define ES1370_REG_SERIAL_CONTROL 0x20 -#define ES1370_REG_DAC1_SCOUNT 0x24 -#define ES1370_REG_DAC2_SCOUNT 0x28 -#define ES1370_REG_ADC_SCOUNT 0x2c - -#define ES1370_REG_DAC1_FRAMEADR 0xc30 -#define ES1370_REG_DAC1_FRAMECNT 0xc34 -#define ES1370_REG_DAC2_FRAMEADR 0xc38 -#define ES1370_REG_DAC2_FRAMECNT 0xc3c -#define ES1370_REG_ADC_FRAMEADR 0xd30 -#define ES1370_REG_ADC_FRAMECNT 0xd34 - -#define DAC2_SRTODIV(x) (((1411200 + (x) / 2) / (x) - 2) & 0x1fff) -#define DAC2_DIVTOSR(x) (1411200 / ((x) + 2)) - -#define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */ -#define CTRL_XCTL1 0x40000000 /* SERR pin if enabled */ -#define CTRL_OPEN 0x20000000 /* no function, can be read and - * written */ -#define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */ +#define ES1370_REG_CONTROL 0x00 +#define ES1370_REG_STATUS 0x04 +#define ES1370_REG_UART_DATA 0x08 +#define ES1370_REG_UART_STATUS 0x09 +#define ES1370_REG_UART_CONTROL 0x09 +#define ES1370_REG_UART_TEST 0x0a +#define ES1370_REG_MEMPAGE 0x0c +#define ES1370_REG_CODEC 0x10 +#define CODEC_INDEX_SHIFT 8 +#define ES1370_REG_SERIAL_CONTROL 0x20 +#define ES1370_REG_DAC1_SCOUNT 0x24 +#define ES1370_REG_DAC2_SCOUNT 0x28 +#define ES1370_REG_ADC_SCOUNT 0x2c + +#define ES1370_REG_DAC1_FRAMEADR 0xc30 +#define ES1370_REG_DAC1_FRAMECNT 0xc34 +#define ES1370_REG_DAC2_FRAMEADR 0xc38 +#define ES1370_REG_DAC2_FRAMECNT 0xc3c +#define ES1370_REG_ADC_FRAMEADR 0xd30 +#define ES1370_REG_ADC_FRAMECNT 0xd34 + +#define DAC2_SRTODIV(x) (((1411200 + (x) / 2) / (x)-2) & 0x1fff) +#define DAC2_DIVTOSR(x) (1411200 / ((x) + 2)) + +#define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */ +#define CTRL_XCTL1 0x40000000 /* SERR pin if enabled */ +#define CTRL_OPEN \ + 0x20000000 /* no function, can be read and \ + * written */ +#define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */ #define CTRL_SH_PCLKDIV 16 -#define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 - * = I2S */ -#define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */ -#define CTRL_WTSRSEL 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, - * 2=22050, 3=44100 */ +#define CTRL_MSFMTSEL \ + 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 \ + * = I2S */ +#define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */ +#define CTRL_WTSRSEL \ + 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, \ + * 2=22050, 3=44100 */ #define CTRL_SH_WTSRSEL 12 -#define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */ -#define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */ -#define CTRL_M_CB 0x00000200 /* recording source: 0 = ADC, 1 = - * MPEG */ -#define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */ -#define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */ -#define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */ -#define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */ -#define CTRL_ADC_EN 0x00000010 /* enable ADC */ -#define CTRL_UART_EN 0x00000008 /* enable MIDI uart */ -#define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port (presumably - * at address 0x200) */ -#define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */ -#define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */ - -#define SCTRL_P2ENDINC 0x00380000 /* */ +#define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */ +#define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */ +#define CTRL_M_CB \ + 0x00000200 /* recording source: 0 = ADC, 1 = \ + * MPEG */ +#define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */ +#define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */ +#define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */ +#define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */ +#define CTRL_ADC_EN 0x00000010 /* enable ADC */ +#define CTRL_UART_EN 0x00000008 /* enable MIDI uart */ +#define CTRL_JYSTK_EN \ + 0x00000004 /* enable Joystick port (presumably \ + * at address 0x200) */ +#define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */ +#define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */ + +#define SCTRL_P2ENDINC 0x00380000 /* */ #define SCTRL_SH_P2ENDINC 19 -#define SCTRL_P2STINC 0x00070000 /* */ -#define SCTRL_SH_P2STINC 16 -#define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */ -#define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */ -#define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */ -#define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */ -#define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */ -#define SCTRL_R1INTEN 0x00000400 /* enable interrupt */ -#define SCTRL_P2INTEN 0x00000200 /* enable interrupt */ -#define SCTRL_P1INTEN 0x00000100 /* enable interrupt */ -#define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for - * DAC1 */ -#define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample - * when disabled */ -#define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */ -#define SCTRL_R1SMB 0x00000010 /* 1 = stereo */ -#define SCTRL_R1FMT 0x00000030 /* format mask */ -#define SCTRL_SH_R1FMT 4 -#define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */ -#define SCTRL_P2SMB 0x00000004 /* 1 = stereo */ -#define SCTRL_P2FMT 0x0000000c /* format mask */ -#define SCTRL_SH_P2FMT 2 -#define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */ -#define SCTRL_P1SMB 0x00000001 /* 1 = stereo */ -#define SCTRL_P1FMT 0x00000003 /* format mask */ -#define SCTRL_SH_P1FMT 0 - -#define STAT_INTR 0x80000000 /* wired or of all interrupt bits */ -#define STAT_CSTAT 0x00000400 /* 1 = codec busy or codec write in - * progress */ -#define STAT_CBUSY 0x00000200 /* 1 = codec busy */ -#define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */ -#define STAT_VC 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, - * 2=ADC, 3=undef */ -#define STAT_SH_VC 5 -#define STAT_MCCB 0x00000010 /* CCB int pending */ -#define STAT_UART 0x00000008 /* UART int pending */ -#define STAT_DAC1 0x00000004 /* DAC1 int pending */ -#define STAT_DAC2 0x00000002 /* DAC2 int pending */ -#define STAT_ADC 0x00000001 /* ADC int pending */ - -#define CODEC_OMIX1 0x10 -#define CODEC_OMIX2 0x11 -#define CODEC_LIMIX1 0x12 -#define CODEC_RIMIX1 0x13 -#define CODEC_LIMIX2 0x14 -#define CODEC_RIMIX2 0x15 -#define CODEC_RES_PD 0x16 -#define CODEC_CSEL 0x17 -#define CODEC_ADSEL 0x18 -#define CODEC_MGAIN 0x19 +#define SCTRL_P2STINC 0x00070000 /* */ +#define SCTRL_SH_P2STINC 16 +#define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */ +#define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */ +#define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */ +#define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */ +#define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */ +#define SCTRL_R1INTEN 0x00000400 /* enable interrupt */ +#define SCTRL_P2INTEN 0x00000200 /* enable interrupt */ +#define SCTRL_P1INTEN 0x00000100 /* enable interrupt */ +#define SCTRL_P1SCTRLD \ + 0x00000080 /* reload sample count register for \ + * DAC1 */ +#define SCTRL_P2DACSEN \ + 0x00000040 /* 1 = DAC2 play back last sample \ + * when disabled */ +#define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */ +#define SCTRL_R1SMB 0x00000010 /* 1 = stereo */ +#define SCTRL_R1FMT 0x00000030 /* format mask */ +#define SCTRL_SH_R1FMT 4 +#define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */ +#define SCTRL_P2SMB 0x00000004 /* 1 = stereo */ +#define SCTRL_P2FMT 0x0000000c /* format mask */ +#define SCTRL_SH_P2FMT 2 +#define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */ +#define SCTRL_P1SMB 0x00000001 /* 1 = stereo */ +#define SCTRL_P1FMT 0x00000003 /* format mask */ +#define SCTRL_SH_P1FMT 0 + +#define STAT_INTR 0x80000000 /* wired or of all interrupt bits */ +#define STAT_CSTAT \ + 0x00000400 /* 1 = codec busy or codec write in \ + * progress */ +#define STAT_CBUSY 0x00000200 /* 1 = codec busy */ +#define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */ +#define STAT_VC \ + 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, \ + * 2=ADC, 3=undef */ +#define STAT_SH_VC 5 +#define STAT_MCCB 0x00000010 /* CCB int pending */ +#define STAT_UART 0x00000008 /* UART int pending */ +#define STAT_DAC1 0x00000004 /* DAC1 int pending */ +#define STAT_DAC2 0x00000002 /* DAC2 int pending */ +#define STAT_ADC 0x00000001 /* ADC int pending */ + +#define CODEC_OMIX1 0x10 +#define CODEC_OMIX2 0x11 +#define CODEC_LIMIX1 0x12 +#define CODEC_RIMIX1 0x13 +#define CODEC_LIMIX2 0x14 +#define CODEC_RIMIX2 0x15 +#define CODEC_RES_PD 0x16 +#define CODEC_CSEL 0x17 +#define CODEC_ADSEL 0x18 +#define CODEC_MGAIN 0x19 /* ES1371 specific */ -#define CODEC_ID_SESHIFT 10 -#define CODEC_ID_SEMASK 0x1f - -#define CODEC_PIRD 0x00800000 /* 0 = write AC97 register */ -#define CODEC_PIADD_MASK 0x007f0000 -#define CODEC_PIADD_SHIFT 16 -#define CODEC_PIDAT_MASK 0x0000ffff -#define CODEC_PIDAT_SHIFT 0 - -#define CODEC_PORD 0x00800000 /* 0 = write AC97 register */ -#define CODEC_POADD_MASK 0x007f0000 -#define CODEC_POADD_SHIFT 16 -#define CODEC_PODAT_MASK 0x0000ffff -#define CODEC_PODAT_SHIFT 0 - -#define CODEC_RDY 0x80000000 /* AC97 read data valid */ -#define CODEC_WIP 0x40000000 /* AC97 write in progress */ - -#define ES1370_REG_CONTROL 0x00 -#define ES1370_REG_SERIAL_CONTROL 0x20 -#define ES1371_REG_CODEC 0x14 -#define ES1371_REG_LEGACY 0x18 /* W/R: Legacy control/status register */ -#define ES1371_REG_SMPRATE 0x10 /* W/R: Codec rate converter interface register */ - -#define ES1371_SYNC_RES (1<<14) /* Warm AC97 reset */ -#define ES1371_DIS_R1 (1<<19) /* record channel accumulator update disable */ -#define ES1371_DIS_P2 (1<<20) /* playback channel 2 accumulator update disable */ -#define ES1371_DIS_P1 (1<<21) /* playback channel 1 accumulator update disable */ -#define ES1371_DIS_SRC (1<<22) /* sample rate converter disable */ -#define ES1371_SRC_RAM_BUSY (1<<23) /* R/O: sample rate memory is busy */ -#define ES1371_SRC_RAM_WE (1<<24) /* R/W: read/write control for sample rate converter */ -#define ES1371_SRC_RAM_ADDRO(o) (((o)&0x7f)<<25) /* address of the sample rate converter */ -#define ES1371_SRC_RAM_DATAO(o) (((o)&0xffff)<<0) /* current value of the sample rate converter */ -#define ES1371_SRC_RAM_DATAI(i) (((i)>>0)&0xffff) /* current value of the sample rate converter */ +#define CODEC_ID_SESHIFT 10 +#define CODEC_ID_SEMASK 0x1f + +#define CODEC_PIRD 0x00800000 /* 0 = write AC97 register */ +#define CODEC_PIADD_MASK 0x007f0000 +#define CODEC_PIADD_SHIFT 16 +#define CODEC_PIDAT_MASK 0x0000ffff +#define CODEC_PIDAT_SHIFT 0 + +#define CODEC_PORD 0x00800000 /* 0 = write AC97 register */ +#define CODEC_POADD_MASK 0x007f0000 +#define CODEC_POADD_SHIFT 16 +#define CODEC_PODAT_MASK 0x0000ffff +#define CODEC_PODAT_SHIFT 0 + +#define CODEC_RDY 0x80000000 /* AC97 read data valid */ +#define CODEC_WIP 0x40000000 /* AC97 write in progress */ + +#define ES1370_REG_CONTROL 0x00 +#define ES1370_REG_SERIAL_CONTROL 0x20 +#define ES1371_REG_CODEC 0x14 +#define ES1371_REG_LEGACY 0x18 /* W/R: Legacy control/status register */ +#define ES1371_REG_SMPRATE \ + 0x10 /* W/R: Codec rate converter interface register */ + +#define ES1371_SYNC_RES (1 << 14) /* Warm AC97 reset */ +#define ES1371_DIS_R1 (1 << 19) /* record channel accumulator update disable \ + */ +#define ES1371_DIS_P2 \ + (1 << 20) /* playback channel 2 accumulator update disable */ +#define ES1371_DIS_P1 \ + (1 << 21) /* playback channel 1 accumulator update disable */ +#define ES1371_DIS_SRC (1 << 22) /* sample rate converter disable */ +#define ES1371_SRC_RAM_BUSY (1 << 23) /* R/O: sample rate memory is busy */ +#define ES1371_SRC_RAM_WE \ + (1 << 24) /* R/W: read/write control for sample rate converter */ +#define ES1371_SRC_RAM_ADDRO(o) \ + (((o) & 0x7f) << 25) /* address of the sample rate converter */ +#define ES1371_SRC_RAM_DATAO(o) \ + (((o) & 0xffff) << 0) /* current value of the sample rate converter */ +#define ES1371_SRC_RAM_DATAI(i) \ + (((i) >> 0) & 0xffff) /* current value of the sample rate converter */ /* * S/PDIF specific */ /* Use ES1370_REG_CONTROL */ -#define RECEN_B 0x08000000 /* Used to control mixing of analog with digital data */ -#define SPDIFEN_B 0x04000000 /* Reset to switch digital output mux to "THRU" mode */ +#define RECEN_B \ + 0x08000000 /* Used to control mixing of analog with digital data */ +#define SPDIFEN_B \ + 0x04000000 /* Reset to switch digital output mux to "THRU" mode */ /* Use ES1370_REG_STATUS */ -#define ENABLE_SPDIF 0x00040000 /* Used to enable the S/PDIF circuitry */ -#define TEST_SPDIF 0x00020000 /* Used to put the S/PDIF module in "test mode" */ +#define ENABLE_SPDIF 0x00040000 /* Used to enable the S/PDIF circuitry */ +#define TEST_SPDIF 0x00020000 /* Used to put the S/PDIF module in "test mode" \ + */ /* * Sample rate converter addresses */ -#define ES_SMPREG_DAC1 0x70 -#define ES_SMPREG_DAC2 0x74 -#define ES_SMPREG_ADC 0x78 -#define ES_SMPREG_TRUNC_N 0x00 -#define ES_SMPREG_INT_REGS 0x01 -#define ES_SMPREG_VFREQ_FRAC 0x03 -#define ES_SMPREG_VOL_ADC 0x6c -#define ES_SMPREG_VOL_DAC1 0x7c -#define ES_SMPREG_VOL_DAC2 0x7e +#define ES_SMPREG_DAC1 0x70 +#define ES_SMPREG_DAC2 0x74 +#define ES_SMPREG_ADC 0x78 +#define ES_SMPREG_TRUNC_N 0x00 +#define ES_SMPREG_INT_REGS 0x01 +#define ES_SMPREG_VFREQ_FRAC 0x03 +#define ES_SMPREG_VOL_ADC 0x6c +#define ES_SMPREG_VOL_DAC1 0x7c +#define ES_SMPREG_VOL_DAC2 0x7e #endif Index: sys/dev/sound/pci/es137x.c =================================================================== --- sys/dev/sound/pci/es137x.c +++ sys/dev/sound/pci/es137x.c @@ -73,20 +73,19 @@ * Just about everything has been touched and reworked in some way but * the all the underlying sequences/timing/register values are from * Thomas' code. -*/ + */ #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include -#include -#include +#include #include #include - -#include +#include +#include +#include #include "mixer_if.h" @@ -99,36 +98,36 @@ #define CT5880_PCI_ID 0x58801274 #define CT4730_PCI_ID 0x89381102 -#define ES1371REV_ES1371_A 0x02 -#define ES1371REV_ES1371_B 0x09 +#define ES1371REV_ES1371_A 0x02 +#define ES1371REV_ES1371_B 0x09 -#define ES1371REV_ES1373_8 0x08 -#define ES1371REV_ES1373_A 0x04 -#define ES1371REV_ES1373_B 0x06 +#define ES1371REV_ES1373_8 0x08 +#define ES1371REV_ES1373_A 0x04 +#define ES1371REV_ES1373_B 0x06 -#define ES1371REV_CT5880_A 0x07 +#define ES1371REV_CT5880_A 0x07 -#define CT5880REV_CT5880_C 0x02 -#define CT5880REV_CT5880_D 0x03 -#define CT5880REV_CT5880_E 0x04 +#define CT5880REV_CT5880_C 0x02 +#define CT5880REV_CT5880_D 0x03 +#define CT5880REV_CT5880_E 0x04 -#define CT4730REV_CT4730_A 0x00 +#define CT4730REV_CT4730_A 0x00 #define ES_DEFAULT_BUFSZ 4096 /* 2 DAC for playback, 1 ADC for record */ -#define ES_DAC1 0 -#define ES_DAC2 1 -#define ES_ADC 2 -#define ES_NCHANS 3 +#define ES_DAC1 0 +#define ES_DAC2 1 +#define ES_ADC 2 +#define ES_NCHANS 3 -#define ES_DMA_SEGS_MIN 2 -#define ES_DMA_SEGS_MAX 256 -#define ES_BLK_MIN 64 -#define ES_BLK_ALIGN (~(ES_BLK_MIN - 1)) +#define ES_DMA_SEGS_MIN 2 +#define ES_DMA_SEGS_MAX 256 +#define ES_BLK_MIN 64 +#define ES_BLK_ALIGN (~(ES_BLK_MIN - 1)) -#define ES1370_DAC1_MINSPEED 5512 -#define ES1370_DAC1_MAXSPEED 44100 +#define ES1370_DAC1_MINSPEED 5512 +#define ES1370_DAC1_MAXSPEED 44100 /* device private data */ struct es_info; @@ -156,45 +155,31 @@ * | | mixer | | | | | | | * +-------+--------+------+------+---------+--------+---------+---------+ */ -#define ES_FIXED_RATE(cfgv) \ - (((cfgv) & 0xffff0000) >> 16) -#define ES_SET_FIXED_RATE(cfgv, nv) \ - (((cfgv) & ~0xffff0000) | (((nv) & 0xffff) << 16)) -#define ES_SINGLE_PCM_MIX(cfgv) \ - (((cfgv) & 0x8000) >> 15) -#define ES_SET_SINGLE_PCM_MIX(cfgv, nv) \ - (((cfgv) & ~0x8000) | (((nv) ? 1 : 0) << 15)) -#define ES_DAC_FIRST(cfgv) \ - (((cfgv) & 0x4000) >> 14) -#define ES_SET_DAC_FIRST(cfgv, nv) \ - (((cfgv) & ~0x4000) | (((nv) & 0x1) << 14)) -#define ES_DAC_SECOND(cfgv) \ - (((cfgv) & 0x2000) >> 13) -#define ES_SET_DAC_SECOND(cfgv, nv) \ - (((cfgv) & ~0x2000) | (((nv) & 0x1) << 13)) -#define ES_NUMPLAY(cfgv) \ - (((cfgv) & 0x1800) >> 11) -#define ES_SET_NUMPLAY(cfgv, nv) \ - (((cfgv) & ~0x1800) | (((nv) & 0x3) << 11)) -#define ES_NUMREC(cfgv) \ - (((cfgv) & 0x600) >> 9) -#define ES_SET_NUMREC(cfgv, nv) \ - (((cfgv) & ~0x600) | (((nv) & 0x3) << 9)) -#define ES_IS_ES1370(cfgv) \ - (((cfgv) & 0x100) >> 8) -#define ES_SET_IS_ES1370(cfgv, nv) \ - (((cfgv) & ~0x100) | (((nv) ? 1 : 0) << 8)) -#define ES_GP(cfgv) \ - ((cfgv) & 0xff) -#define ES_SET_GP(cfgv, nv) \ - (((cfgv) & ~0xff) | ((nv) & 0xff)) - -#define ES_DAC1_ENABLED(cfgv) \ - (ES_NUMPLAY(cfgv) > 1 || \ - (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC1)) -#define ES_DAC2_ENABLED(cfgv) \ - (ES_NUMPLAY(cfgv) > 1 || \ - (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC2)) +#define ES_FIXED_RATE(cfgv) (((cfgv) & 0xffff0000) >> 16) +#define ES_SET_FIXED_RATE(cfgv, nv) \ + (((cfgv) & ~0xffff0000) | (((nv) & 0xffff) << 16)) +#define ES_SINGLE_PCM_MIX(cfgv) (((cfgv) & 0x8000) >> 15) +#define ES_SET_SINGLE_PCM_MIX(cfgv, nv) \ + (((cfgv) & ~0x8000) | (((nv) ? 1 : 0) << 15)) +#define ES_DAC_FIRST(cfgv) (((cfgv) & 0x4000) >> 14) +#define ES_SET_DAC_FIRST(cfgv, nv) (((cfgv) & ~0x4000) | (((nv) & 0x1) << 14)) +#define ES_DAC_SECOND(cfgv) (((cfgv) & 0x2000) >> 13) +#define ES_SET_DAC_SECOND(cfgv, nv) (((cfgv) & ~0x2000) | (((nv) & 0x1) << 13)) +#define ES_NUMPLAY(cfgv) (((cfgv) & 0x1800) >> 11) +#define ES_SET_NUMPLAY(cfgv, nv) (((cfgv) & ~0x1800) | (((nv) & 0x3) << 11)) +#define ES_NUMREC(cfgv) (((cfgv) & 0x600) >> 9) +#define ES_SET_NUMREC(cfgv, nv) (((cfgv) & ~0x600) | (((nv) & 0x3) << 9)) +#define ES_IS_ES1370(cfgv) (((cfgv) & 0x100) >> 8) +#define ES_SET_IS_ES1370(cfgv, nv) (((cfgv) & ~0x100) | (((nv) ? 1 : 0) << 8)) +#define ES_GP(cfgv) ((cfgv) & 0xff) +#define ES_SET_GP(cfgv, nv) (((cfgv) & ~0xff) | ((nv) & 0xff)) + +#define ES_DAC1_ENABLED(cfgv) \ + (ES_NUMPLAY(cfgv) > 1 || \ + (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC1)) +#define ES_DAC2_ENABLED(cfgv) \ + (ES_NUMPLAY(cfgv) > 1 || \ + (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC2)) /* * DAC 1/2 configuration through kernel hint - hint.pcm..dac="val" @@ -204,12 +189,12 @@ * 2 = Enable single DAC (DAC2) * 3 = Enable both DACs, swap position (DAC2 comes first instead of DAC1) */ -#define ES_DEFAULT_DAC_CFG 0 +#define ES_DEFAULT_DAC_CFG 0 struct es_info { bus_space_tag_t st; bus_space_handle_t sh; - bus_dma_tag_t parent_dmat; + bus_dma_tag_t parent_dmat; struct resource *reg, *irq; int regtype, regid, irqid; @@ -220,58 +205,52 @@ unsigned int bufsz, blkcnt; /* Contents of board's registers */ - uint32_t ctrl; - uint32_t sctrl; - uint32_t escfg; + uint32_t ctrl; + uint32_t sctrl; + uint32_t escfg; struct es_chinfo ch[ES_NCHANS]; - struct mtx *lock; - struct callout poll_timer; + struct mtx *lock; + struct callout poll_timer; int poll_ticks, polling; }; -#define ES_LOCK(sc) snd_mtxlock((sc)->lock) -#define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock) -#define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock) +#define ES_LOCK(sc) snd_mtxlock((sc)->lock) +#define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock) +#define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock) /* prototypes */ -static void es_intr(void *); -static uint32_t es1371_wait_src_ready(struct es_info *); -static void es1371_src_write(struct es_info *, - unsigned short, unsigned short); -static unsigned int es1371_adc_rate(struct es_info *, unsigned int, int); -static unsigned int es1371_dac_rate(struct es_info *, unsigned int, int); -static int es1371_init(struct es_info *); -static int es1370_init(struct es_info *); -static int es1370_wrcodec(struct es_info *, unsigned char, unsigned char); - -static uint32_t es_fmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0}; +static void es_intr(void *); +static uint32_t es1371_wait_src_ready(struct es_info *); +static void es1371_src_write(struct es_info *, unsigned short, unsigned short); +static unsigned int es1371_adc_rate(struct es_info *, unsigned int, int); +static unsigned int es1371_dac_rate(struct es_info *, unsigned int, int); +static int es1371_init(struct es_info *); +static int es1370_init(struct es_info *); +static int es1370_wrcodec(struct es_info *, unsigned char, unsigned char); + +static uint32_t es_fmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; +static struct pcmchan_caps es_caps = { 4000, 48000, es_fmt, 0 }; static const struct { - unsigned volidx:4; - unsigned left:4; - unsigned right:4; - unsigned stereo:1; - unsigned recmask:13; - unsigned avail:1; -} mixtable[SOUND_MIXER_NRDEVICES] = { - [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x1f7f, 1 }, - [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, - [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, - [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, - [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, - [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, - [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, - [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, - [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, - [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } -}; + unsigned volidx : 4; + unsigned left : 4; + unsigned right : 4; + unsigned stereo : 1; + unsigned recmask : 13; + unsigned avail : 1; +} mixtable[SOUND_MIXER_NRDEVICES] = { [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, + 0x1f7f, 1 }, + [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, + [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, + [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, + [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, + [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, + [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, + [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, + [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, + [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } }; static __inline uint32_t es_rd(struct es_info *es, int regno, int size) @@ -367,8 +346,8 @@ rr = (r < 7) ? 0x80 : 31 - (r - 7) / 3; es1370_wrcodec(es, mixtable[dev].right, rr); if (set_dac1 && mixtable[SOUND_MIXER_SYNTH].stereo) - es1370_wrcodec(es, - mixtable[SOUND_MIXER_SYNTH].right, rr); + es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].right, + rr); } es1370_wrcodec(es, mixtable[dev].left, rl); if (set_dac1) @@ -385,10 +364,12 @@ int i, j = 0; es = mix_getdevinfo(m); - if (src == 0) src = 1 << SOUND_MIXER_MIC; + if (src == 0) + src = 1 << SOUND_MIXER_MIC; src &= mix_getrecdevs(m); for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) - if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; + if ((src & (1 << i)) != 0) + j |= mixtable[i].recmask; ES_LOCK(es); if ((src & (1 << SOUND_MIXER_PCM)) && ES_SINGLE_PCM_MIX(es->escfg) && @@ -405,12 +386,10 @@ return (src); } -static kobj_method_t es1370_mixer_methods[] = { - KOBJMETHOD(mixer_init, es1370_mixinit), - KOBJMETHOD(mixer_set, es1370_mixset), - KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), - KOBJMETHOD_END -}; +static kobj_method_t es1370_mixer_methods[] = { KOBJMETHOD(mixer_init, + es1370_mixinit), + KOBJMETHOD(mixer_set, es1370_mixset), + KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(es1370_mixer); /* -------------------------------------------------------------------- */ @@ -423,8 +402,7 @@ ES_LOCK_ASSERT(es); for (t = 0; t < 0x1000; t++) { - if ((es_rd(es, ES1370_REG_STATUS, 4) & - STAT_CSTAT) == 0) { + if ((es_rd(es, ES1370_REG_STATUS, 4) & STAT_CSTAT) == 0) { es_wr(es, ES1370_REG_CODEC, ((unsigned short)i << CODEC_INDEX_SHIFT) | data, 2); return (0); @@ -440,7 +418,7 @@ /* channel interface */ static void * eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, - struct pcm_channel *c, int dir) + struct pcm_channel *c, int dir) { struct es_info *es = devinfo; struct es_chinfo *ch; @@ -456,8 +434,8 @@ else if (index == 1) index = ES_DAC_SECOND(es->escfg); else { - device_printf(es->dev, - "Invalid ES_GP index: %d\n", index); + device_printf(es->dev, "Invalid ES_GP index: %d\n", + index); ES_UNLOCK(es); return (NULL); } @@ -486,7 +464,7 @@ } else { uint32_t fixed_rate = ES_FIXED_RATE(es->escfg); if (!(fixed_rate < es_caps.minspeed || - fixed_rate > es_caps.maxspeed)) { + fixed_rate > es_caps.maxspeed)) { ch->caps.maxspeed = fixed_rate; ch->caps.minspeed = fixed_rate; } @@ -523,8 +501,8 @@ es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1); es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); - es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, - (ch->bufsz >> 2) - 1, 4); + es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, + 4); } ES_UNLOCK(es); return (ch); @@ -656,7 +634,7 @@ } if ((sndbuf_getblksz(ch->buffer) != blksz || - sndbuf_getblkcnt(ch->buffer) != blkcnt) && + sndbuf_getblkcnt(ch->buffer) != blkcnt) && sndbuf_resize(ch->buffer, blkcnt, blksz) != 0) device_printf(es->dev, "%s: failed blksz=%u blkcnt=%u\n", __func__, blksz, blkcnt); @@ -679,9 +657,9 @@ return (ch->blksz); } -#define es_chan_active(es) ((es)->ch[ES_DAC1].active + \ - (es)->ch[ES_DAC2].active + \ - (es)->ch[ES_ADC].active) +#define es_chan_active(es) \ + ((es)->ch[ES_DAC1].active + (es)->ch[ES_DAC2].active + \ + (es)->ch[ES_ADC].active) static __inline int es_poll_channel(struct es_chinfo *ch) @@ -740,8 +718,8 @@ } /* XXX */ - callout_reset(&es->poll_timer, 1/*es->poll_ticks*/, - es_poll_callback, es); + callout_reset(&es->poll_timer, 1 /*es->poll_ticks*/, es_poll_callback, + es); ES_UNLOCK(es); @@ -771,8 +749,8 @@ if (go == PCMTRIG_START) { if (ch->index == ES_DAC1) { es->ctrl |= CTRL_DAC1_EN; - es->sctrl &= ~(SCTRL_P1LOOPSEL | - SCTRL_P1PAUSE | SCTRL_P1SCTRLD); + es->sctrl &= ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | + SCTRL_P1SCTRLD); if (es->polling == 0) es->sctrl |= SCTRL_P1INTEN; else @@ -803,8 +781,8 @@ (ch->bufsz >> 2) - 1, 4); } } else - es->ctrl &= ~((ch->index == ES_DAC1) ? - CTRL_DAC1_EN : CTRL_DAC2_EN); + es->ctrl &= ~((ch->index == ES_DAC1) ? CTRL_DAC1_EN : + CTRL_DAC2_EN); } else { if (go == PCMTRIG_START) { es->ctrl |= CTRL_ADC_EN; @@ -887,30 +865,26 @@ return (&ch->caps); } -static kobj_method_t eschan1370_methods[] = { - KOBJMETHOD(channel_init, eschan_init), - KOBJMETHOD(channel_setformat, eschan_setformat), - KOBJMETHOD(channel_setspeed, eschan1370_setspeed), - KOBJMETHOD(channel_setblocksize, eschan_setblocksize), - KOBJMETHOD(channel_setfragments, eschan_setfragments), - KOBJMETHOD(channel_trigger, eschan_trigger), - KOBJMETHOD(channel_getptr, eschan_getptr), - KOBJMETHOD(channel_getcaps, eschan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t eschan1370_methods[] = { KOBJMETHOD(channel_init, + eschan_init), + KOBJMETHOD(channel_setformat, eschan_setformat), + KOBJMETHOD(channel_setspeed, eschan1370_setspeed), + KOBJMETHOD(channel_setblocksize, eschan_setblocksize), + KOBJMETHOD(channel_setfragments, eschan_setfragments), + KOBJMETHOD(channel_trigger, eschan_trigger), + KOBJMETHOD(channel_getptr, eschan_getptr), + KOBJMETHOD(channel_getcaps, eschan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(eschan1370); -static kobj_method_t eschan1371_methods[] = { - KOBJMETHOD(channel_init, eschan_init), - KOBJMETHOD(channel_setformat, eschan_setformat), - KOBJMETHOD(channel_setspeed, eschan1371_setspeed), - KOBJMETHOD(channel_setblocksize, eschan_setblocksize), - KOBJMETHOD(channel_setfragments, eschan_setfragments), - KOBJMETHOD(channel_trigger, eschan_trigger), - KOBJMETHOD(channel_getptr, eschan_getptr), - KOBJMETHOD(channel_getcaps, eschan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t eschan1371_methods[] = { KOBJMETHOD(channel_init, + eschan_init), + KOBJMETHOD(channel_setformat, eschan_setformat), + KOBJMETHOD(channel_setspeed, eschan1371_setspeed), + KOBJMETHOD(channel_setblocksize, eschan_setblocksize), + KOBJMETHOD(channel_setfragments, eschan_setfragments), + KOBJMETHOD(channel_trigger, eschan_trigger), + KOBJMETHOD(channel_getptr, eschan_getptr), + KOBJMETHOD(channel_getcaps, eschan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(eschan1371); /* -------------------------------------------------------------------- */ @@ -961,7 +935,7 @@ /* ES1370 default to fixed rate operation */ if (resource_int_value(device_get_name(es->dev), - device_get_unit(es->dev), "fixed_rate", &r) == 0) { + device_get_unit(es->dev), "fixed_rate", &r) == 0) { fixed_rate = r; if (fixed_rate) { if (fixed_rate < es_caps.minspeed) @@ -973,7 +947,7 @@ fixed_rate = es_caps.maxspeed; if (resource_int_value(device_get_name(es->dev), - device_get_unit(es->dev), "single_pcm_mixer", &r) == 0) + device_get_unit(es->dev), "single_pcm_mixer", &r) == 0) single_pcm = (r != 0) ? 1 : 0; else single_pcm = 1; @@ -1040,7 +1014,7 @@ * procedures. */ switch (subdev) { - case 0x20001274: /* old Ensoniq */ + case 0x20001274: /* old Ensoniq */ es->ctrl = 0; break; default: @@ -1110,7 +1084,7 @@ es1371_wrcd(kobj_t obj, void *s, int addr, uint32_t data) { uint32_t t, x, orig; - struct es_info *es = (struct es_info*)s; + struct es_info *es = (struct es_info *)s; for (t = 0; t < 0x1000; t++) { if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4)) @@ -1119,8 +1093,12 @@ /* save the current state for later */ x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); /* enable SRC state data in SRC mux */ - es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 | - ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4); + es_wr(es, ES1371_REG_SMPRATE, + (x & + (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | + ES1371_DIS_R1)) | + 0x00010000, + 4); /* busy wait */ for (t = 0; t < 0x1000; t++) { if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == @@ -1134,9 +1112,10 @@ break; } - es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) & - CODEC_POADD_MASK) | ((data << CODEC_PODAT_SHIFT) & - CODEC_PODAT_MASK), 4); + es_wr(es, ES1371_REG_CODEC, + ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | + ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), + 4); /* restore SRC reg */ es1371_wait_src_ready(s); es_wr(es, ES1371_REG_SMPRATE, orig, 4); @@ -1158,8 +1137,12 @@ /* save the current state for later */ x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); /* enable SRC state data in SRC mux */ - es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 | - ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4); + es_wr(es, ES1371_REG_SMPRATE, + (x & + (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | + ES1371_DIS_R1)) | + 0x00010000, + 4); /* busy wait */ for (t = 0; t < 0x1000; t++) { if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == @@ -1173,8 +1156,8 @@ break; } - es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) & - CODEC_POADD_MASK) | CODEC_PORD, 4); + es_wr(es, ES1371_REG_CODEC, + ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD, 4); /* restore SRC reg */ es1371_wait_src_ready(s); @@ -1189,11 +1172,9 @@ return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); } -static kobj_method_t es1371_ac97_methods[] = { - KOBJMETHOD(ac97_read, es1371_rdcd), - KOBJMETHOD(ac97_write, es1371_wrcd), - KOBJMETHOD_END -}; +static kobj_method_t es1371_ac97_methods[] = { KOBJMETHOD(ac97_read, + es1371_rdcd), + KOBJMETHOD(ac97_write, es1371_wrcd), KOBJMETHOD_END }; AC97_DECLARE(es1371_ac97); /* -------------------------------------------------------------------- */ @@ -1203,8 +1184,8 @@ { uint32_t r; - r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | - ES1371_DIS_P2 | ES1371_DIS_R1); + r = es1371_wait_src_ready(es) & + (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); r |= ES1371_SRC_RAM_ADDRO(reg); es_wr(es, ES1371_REG_SMPRATE, r, 4); return (ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es))); @@ -1215,9 +1196,9 @@ { uint32_t r; - r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | - ES1371_DIS_P2 | ES1371_DIS_R1); - r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); + r = es1371_wait_src_ready(es) & + (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); + r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4); } @@ -1252,7 +1233,8 @@ } es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & - 0x00ff) | ((freq >> 5) & 0xfc00)); + 0x00ff) | + ((freq >> 5) & 0xfc00)); es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); @@ -1277,12 +1259,12 @@ dac = (set == ES_DAC1) ? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; dis = (set == ES_DAC1) ? ES1371_DIS_P2 : ES1371_DIS_P1; - r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | - ES1371_DIS_P2 | ES1371_DIS_R1)); + r = (es1371_wait_src_ready(es) & + (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); es_wr(es, ES1371_REG_SMPRATE, r, 4); es1371_src_write(es, dac + ES_SMPREG_INT_REGS, (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | - ((freq >> 5) & 0xfc00)); + ((freq >> 5) & 0xfc00)); es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); @@ -1297,12 +1279,12 @@ for (t = 0; t < 0x1000; t++) { if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) & - ES1371_SRC_RAM_BUSY)) + ES1371_SRC_RAM_BUSY)) return (r); DELAY(1); } device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__, - ES1371_REG_SMPRATE, r); + ES1371_REG_SMPRATE, r); return (0); } @@ -1315,12 +1297,12 @@ static int es_pci_probe(device_t dev) { - switch(pci_get_devid(dev)) { + switch (pci_get_devid(dev)) { case ES1370_PCI_ID: device_set_desc(dev, "AudioPCI ES1370"); return (BUS_PROBE_DEFAULT); case ES1371_PCI_ID: - switch(pci_get_revid(dev)) { + switch (pci_get_revid(dev)) { case ES1371REV_ES1371_A: device_set_desc(dev, "AudioPCI ES1371-A"); return (BUS_PROBE_DEFAULT); @@ -1351,10 +1333,11 @@ device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); device_printf(dev, "unknown revision %d -- please report to " - "freebsd-multimedia@freebsd.org\n", pci_get_revid(dev)); + "freebsd-multimedia@freebsd.org\n", + pci_get_revid(dev)); return (BUS_PROBE_DEFAULT); case CT4730_PCI_ID: - switch(pci_get_revid(dev)) { + switch (pci_get_revid(dev)) { case CT4730REV_CT4730_A: device_set_desc(dev, "Creative SB AudioPCI CT4730/EV1938"); @@ -1368,7 +1351,7 @@ return (BUS_PROBE_DEFAULT); } case CT5880_PCI_ID: - switch(pci_get_revid(dev)) { + switch (pci_get_revid(dev)) { case CT5880REV_CT5880_C: device_set_desc(dev, "Creative CT5880-C"); return (BUS_PROBE_DEFAULT); @@ -1479,7 +1462,7 @@ return (EINVAL); ES_LOCK(es); - if (es->ctrl & (CTRL_DAC2_EN|CTRL_ADC_EN)) { + if (es->ctrl & (CTRL_DAC2_EN | CTRL_ADC_EN)) { ES_UNLOCK(es); return (EBUSY); } @@ -1571,8 +1554,8 @@ err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f, (level >> 8) & 0x7f); mix_setdevs(m, mix_getdevs(m) & ~(1 << SOUND_MIXER_SYNTH)); - mix_setrecdevs(m, mix_getrecdevs(m) & - ~(1 << SOUND_MIXER_SYNTH)); + mix_setrecdevs(m, + mix_getrecdevs(m) & ~(1 << SOUND_MIXER_SYNTH)); } if (!err) { level = recsrc; @@ -1654,16 +1637,17 @@ */ if (es->ch[ES_DAC2].channel != NULL && es->ch[ES_ADC].channel != NULL) { - /* XXX: an user should be able to set this with a control tool, - if not done before 7.0-RELEASE, this needs to be converted - to a device specific sysctl "dev.pcm.X.yyy" via - device_get_sysctl_*() as discussed on multimedia@ in msg-id - <861wujij2q.fsf@xps.des.no> */ + /* XXX: an user should be able to set this with a + control tool, if not done before 7.0-RELEASE, this + needs to be converted to a device specific sysctl + "dev.pcm.X.yyy" via device_get_sysctl_*() as + discussed on multimedia@ in msg-id + <861wujij2q.fsf@xps.des.no> */ SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "fixed_rate", - CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, - dev, sizeof(dev), sysctl_es137x_fixed_rate, "I", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev, + sizeof(dev), sysctl_es137x_fixed_rate, "I", "Enable fixed rate playback/recording"); } /* @@ -1671,11 +1655,12 @@ */ if (es->ch[ES_DAC1].channel != NULL && es->ch[ES_DAC2].channel != NULL) { - /* XXX: an user should be able to set this with a control tool, - if not done before 7.0-RELEASE, this needs to be converted - to a device specific sysctl "dev.pcm.X.yyy" via - device_get_sysctl_*() as discussed on multimedia@ in msg-id - <861wujij2q.fsf@xps.des.no> */ + /* XXX: an user should be able to set this with a + control tool, if not done before 7.0-RELEASE, this + needs to be converted to a device specific sysctl + "dev.pcm.X.yyy" via device_get_sysctl_*() as + discussed on multimedia@ in msg-id + <861wujij2q.fsf@xps.des.no> */ SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "single_pcm_mixer", @@ -1685,30 +1670,31 @@ } } if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "latency_timer", &r) == 0 && !(r < 0 || r > 255)) + "latency_timer", &r) == 0 && + !(r < 0 || r > 255)) pci_write_config(dev, PCIR_LATTIMER, r, 1); /* XXX: this needs to be converted to a device specific sysctl "dev.pcm.X.yyy" via device_get_sysctl_*() as discussed on multimedia@ in msg-id <861wujij2q.fsf@xps.des.no> */ SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "latency_timer", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, - dev, sizeof(dev), sysctl_es137x_latency_timer, "I", + "latency_timer", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev, + sizeof(dev), sysctl_es137x_latency_timer, "I", "PCI Latency Timer configuration"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "polling", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev, - sizeof(dev), sysctl_es_polling, "I", "Enable polling mode"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "polling", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev, sizeof(dev), + sysctl_es_polling, "I", "Enable polling mode"); } static int es_pci_attach(device_t dev) { struct es_info *es = NULL; - int mapped, i, numplay, dac_cfg; - char status[SND_STATUSLEN]; + int mapped, i, numplay, dac_cfg; + char status[SND_STATUSLEN]; struct ac97_info *codec = NULL; - kobj_class_t ct = NULL; + kobj_class_t ct = NULL; uint32_t devid; es = malloc(sizeof *es, M_DEVBUF, M_WAITOK | M_ZERO); @@ -1744,15 +1730,17 @@ callout_init(&es->poll_timer, 1); es->poll_ticks = 1; - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "polling", &i) == 0 && i != 0) + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "polling", &i) == 0 && + i != 0) es->polling = 1; else es->polling = 0; es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "blocksize", &i) == 0 && i > 0) { + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "blocksize", &i) == 0 && + i > 0) { i &= ES_BLK_ALIGN; if (i < ES_BLK_MIN) i = ES_BLK_MIN; @@ -1770,14 +1758,14 @@ es->blkcnt = 2; if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "dac", &dac_cfg) == 0) { + "dac", &dac_cfg) == 0) { if (dac_cfg < 0 || dac_cfg > 3) dac_cfg = ES_DEFAULT_DAC_CFG; } else dac_cfg = ES_DEFAULT_DAC_CFG; switch (dac_cfg) { - case 0: /* Enable all DAC: DAC1, DAC2 */ + case 0: /* Enable all DAC: DAC1, DAC2 */ numplay = 2; es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1); es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC2); @@ -1838,26 +1826,26 @@ es->irqid = 0; es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid, RF_ACTIVE | RF_SHAREABLE); - if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr, - es, &es->ih)) { + if (!es->irq || + snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr, es, &es->ih)) { device_printf(dev, "unable to map interrupt\n"); goto bad; } - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), - /*alignment*/2, /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, - /*lockarg*/NULL, &es->parent_dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), + /*alignment*/ 2, /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ es->bufsz, /*nsegments*/ 1, /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, + /*lockarg*/ NULL, &es->parent_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } snprintf(status, SND_STATUSLEN, "%s 0x%jx irq %jd on %s", - (es->regtype == SYS_RES_IOPORT)? "port" : "mem", + (es->regtype == SYS_RES_IOPORT) ? "port" : "mem", rman_get_start(es->reg), rman_get_start(es->irq), device_get_nameunit(device_get_parent(dev))); @@ -1927,10 +1915,9 @@ static device_method_t es_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, es_pci_probe), - DEVMETHOD(device_attach, es_pci_attach), - DEVMETHOD(device_detach, es_pci_detach), - { 0, 0 } + DEVMETHOD(device_probe, es_pci_probe), + DEVMETHOD(device_attach, es_pci_attach), + DEVMETHOD(device_detach, es_pci_detach), { 0, 0 } }; static driver_t es_driver = { Index: sys/dev/sound/pci/fm801.c =================================================================== --- sys/dev/sound/pci/fm801.c +++ sys/dev/sound/pci/fm801.c @@ -30,148 +30,133 @@ #include "opt_snd.h" #endif -#include -#include #include #include +#include +#include -#define PCI_VENDOR_FORTEMEDIA 0x1319 -#define PCI_DEVICE_FORTEMEDIA1 0x08011319 /* Audio controller */ -#define PCI_DEVICE_FORTEMEDIA2 0x08021319 /* Joystick controller */ - -#define FM_PCM_VOLUME 0x00 -#define FM_FM_VOLUME 0x02 -#define FM_I2S_VOLUME 0x04 -#define FM_RECORD_SOURCE 0x06 - -#define FM_PLAY_CTL 0x08 -#define FM_PLAY_RATE_MASK 0x0f00 -#define FM_PLAY_BUF1_LAST 0x0001 -#define FM_PLAY_BUF2_LAST 0x0002 -#define FM_PLAY_START 0x0020 -#define FM_PLAY_PAUSE 0x0040 -#define FM_PLAY_STOPNOW 0x0080 -#define FM_PLAY_16BIT 0x4000 -#define FM_PLAY_STEREO 0x8000 - -#define FM_PLAY_DMALEN 0x0a -#define FM_PLAY_DMABUF1 0x0c -#define FM_PLAY_DMABUF2 0x10 - -#define FM_REC_CTL 0x14 -#define FM_REC_RATE_MASK 0x0f00 -#define FM_REC_BUF1_LAST 0x0001 -#define FM_REC_BUF2_LAST 0x0002 -#define FM_REC_START 0x0020 -#define FM_REC_PAUSE 0x0040 -#define FM_REC_STOPNOW 0x0080 -#define FM_REC_16BIT 0x4000 -#define FM_REC_STEREO 0x8000 - -#define FM_REC_DMALEN 0x16 -#define FM_REC_DMABUF1 0x18 -#define FM_REC_DMABUF2 0x1c - -#define FM_CODEC_CTL 0x22 -#define FM_VOLUME 0x26 -#define FM_VOLUME_MUTE 0x8000 - -#define FM_CODEC_CMD 0x2a -#define FM_CODEC_CMD_READ 0x0080 -#define FM_CODEC_CMD_VALID 0x0100 -#define FM_CODEC_CMD_BUSY 0x0200 - -#define FM_CODEC_DATA 0x2c - -#define FM_IO_CTL 0x52 -#define FM_CARD_CTL 0x54 - -#define FM_INTMASK 0x56 -#define FM_INTMASK_PLAY 0x0001 -#define FM_INTMASK_REC 0x0002 -#define FM_INTMASK_VOL 0x0040 -#define FM_INTMASK_MPU 0x0080 - -#define FM_INTSTATUS 0x5a -#define FM_INTSTATUS_PLAY 0x0100 -#define FM_INTSTATUS_REC 0x0200 -#define FM_INTSTATUS_VOL 0x4000 -#define FM_INTSTATUS_MPU 0x8000 - -#define FM801_DEFAULT_BUFSZ 4096 /* Other values do not work!!! */ +#define PCI_VENDOR_FORTEMEDIA 0x1319 +#define PCI_DEVICE_FORTEMEDIA1 0x08011319 /* Audio controller */ +#define PCI_DEVICE_FORTEMEDIA2 0x08021319 /* Joystick controller */ + +#define FM_PCM_VOLUME 0x00 +#define FM_FM_VOLUME 0x02 +#define FM_I2S_VOLUME 0x04 +#define FM_RECORD_SOURCE 0x06 + +#define FM_PLAY_CTL 0x08 +#define FM_PLAY_RATE_MASK 0x0f00 +#define FM_PLAY_BUF1_LAST 0x0001 +#define FM_PLAY_BUF2_LAST 0x0002 +#define FM_PLAY_START 0x0020 +#define FM_PLAY_PAUSE 0x0040 +#define FM_PLAY_STOPNOW 0x0080 +#define FM_PLAY_16BIT 0x4000 +#define FM_PLAY_STEREO 0x8000 + +#define FM_PLAY_DMALEN 0x0a +#define FM_PLAY_DMABUF1 0x0c +#define FM_PLAY_DMABUF2 0x10 + +#define FM_REC_CTL 0x14 +#define FM_REC_RATE_MASK 0x0f00 +#define FM_REC_BUF1_LAST 0x0001 +#define FM_REC_BUF2_LAST 0x0002 +#define FM_REC_START 0x0020 +#define FM_REC_PAUSE 0x0040 +#define FM_REC_STOPNOW 0x0080 +#define FM_REC_16BIT 0x4000 +#define FM_REC_STEREO 0x8000 + +#define FM_REC_DMALEN 0x16 +#define FM_REC_DMABUF1 0x18 +#define FM_REC_DMABUF2 0x1c + +#define FM_CODEC_CTL 0x22 +#define FM_VOLUME 0x26 +#define FM_VOLUME_MUTE 0x8000 + +#define FM_CODEC_CMD 0x2a +#define FM_CODEC_CMD_READ 0x0080 +#define FM_CODEC_CMD_VALID 0x0100 +#define FM_CODEC_CMD_BUSY 0x0200 + +#define FM_CODEC_DATA 0x2c + +#define FM_IO_CTL 0x52 +#define FM_CARD_CTL 0x54 + +#define FM_INTMASK 0x56 +#define FM_INTMASK_PLAY 0x0001 +#define FM_INTMASK_REC 0x0002 +#define FM_INTMASK_VOL 0x0040 +#define FM_INTMASK_MPU 0x0080 + +#define FM_INTSTATUS 0x5a +#define FM_INTSTATUS_PLAY 0x0100 +#define FM_INTSTATUS_REC 0x0200 +#define FM_INTSTATUS_VOL 0x4000 +#define FM_INTSTATUS_MPU 0x8000 + +#define FM801_DEFAULT_BUFSZ 4096 /* Other values do not work!!! */ /* debug purposes */ -#define DPRINT if(0) printf +#define DPRINT \ + if (0) \ + printf /* static int fm801ch_setup(struct pcm_channel *c); */ -static u_int32_t fmts[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; +static u_int32_t fmts[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; -static struct pcmchan_caps fm801ch_caps = { - 5500, 48000, - fmts, 0 -}; +static struct pcmchan_caps fm801ch_caps = { 5500, 48000, fmts, 0 }; struct fm801_info; struct fm801_chinfo { - struct fm801_info *parent; - struct pcm_channel *channel; - struct snd_dbuf *buffer; - u_int32_t spd, dir, fmt; /* speed, direction, format */ - u_int32_t shift; + struct fm801_info *parent; + struct pcm_channel *channel; + struct snd_dbuf *buffer; + u_int32_t spd, dir, fmt; /* speed, direction, format */ + u_int32_t shift; }; struct fm801_info { - int type; - bus_space_tag_t st; - bus_space_handle_t sh; - bus_dma_tag_t parent_dmat; - - device_t dev; - int num; - u_int32_t unit; - - struct resource *reg, *irq; - int regtype, regid, irqid; - void *ih; - - u_int32_t play_flip, - play_nextblk, - play_start, - play_blksize, - play_fmt, - play_shift, - play_size; - - u_int32_t rec_flip, - rec_nextblk, - rec_start, - rec_blksize, - rec_fmt, - rec_shift, - rec_size; - - unsigned int bufsz; - - struct fm801_chinfo pch, rch; - - device_t radio; + int type; + bus_space_tag_t st; + bus_space_handle_t sh; + bus_dma_tag_t parent_dmat; + + device_t dev; + int num; + u_int32_t unit; + + struct resource *reg, *irq; + int regtype, regid, irqid; + void *ih; + + u_int32_t play_flip, play_nextblk, play_start, play_blksize, play_fmt, + play_shift, play_size; + + u_int32_t rec_flip, rec_nextblk, rec_start, rec_blksize, rec_fmt, + rec_shift, rec_size; + + unsigned int bufsz; + + struct fm801_chinfo pch, rch; + + device_t radio; }; /* Bus Read / Write routines */ static u_int32_t fm801_rd(struct fm801_info *fm801, int regno, int size) { - switch(size) { + switch (size) { case 1: return (bus_space_read_1(fm801->st, fm801->sh, regno)); case 2: @@ -187,7 +172,7 @@ fm801_wr(struct fm801_info *fm801, int regno, u_int32_t data, int size) { - switch(size) { + switch (size) { case 1: bus_space_write_1(fm801->st, fm801->sh, regno, data); break; @@ -211,7 +196,9 @@ struct fm801_info *fm801 = (struct fm801_info *)devinfo; int i; - for (i = 0; i < TIMO && fm801_rd(fm801,FM_CODEC_CMD,2) & FM_CODEC_CMD_BUSY; i++) { + for (i = 0; + i < TIMO && fm801_rd(fm801, FM_CODEC_CMD, 2) & FM_CODEC_CMD_BUSY; + i++) { DELAY(10000); DPRINT("fm801 rdcd: 1 - DELAY\n"); } @@ -220,10 +207,11 @@ return 0; } - fm801_wr(fm801,FM_CODEC_CMD, regno|FM_CODEC_CMD_READ,2); + fm801_wr(fm801, FM_CODEC_CMD, regno | FM_CODEC_CMD_READ, 2); - for (i = 0; i < TIMO && !(fm801_rd(fm801,FM_CODEC_CMD,2) & FM_CODEC_CMD_VALID); i++) - { + for (i = 0; i < TIMO && + !(fm801_rd(fm801, FM_CODEC_CMD, 2) & FM_CODEC_CMD_VALID); + i++) { DELAY(10000); DPRINT("fm801 rdcd: 2 - DELAY\n"); } @@ -232,7 +220,7 @@ return 0; } - return fm801_rd(fm801,FM_CODEC_DATA,2); + return fm801_rd(fm801, FM_CODEC_DATA, 2); } static int @@ -241,12 +229,14 @@ struct fm801_info *fm801 = (struct fm801_info *)devinfo; int i; - DPRINT("fm801_wrcd reg 0x%x val 0x%x\n",regno, data); -/* - if(regno == AC97_REG_RECSEL) return; -*/ + DPRINT("fm801_wrcd reg 0x%x val 0x%x\n", regno, data); + /* + if(regno == AC97_REG_RECSEL) return; + */ /* Poll until codec is ready */ - for (i = 0; i < TIMO && fm801_rd(fm801,FM_CODEC_CMD,2) & FM_CODEC_CMD_BUSY; i++) { + for (i = 0; + i < TIMO && fm801_rd(fm801, FM_CODEC_CMD, 2) & FM_CODEC_CMD_BUSY; + i++) { DELAY(10000); DPRINT("fm801 rdcd: 1 - DELAY\n"); } @@ -255,11 +245,13 @@ return -1; } - fm801_wr(fm801,FM_CODEC_DATA,data, 2); - fm801_wr(fm801,FM_CODEC_CMD, regno,2); + fm801_wr(fm801, FM_CODEC_DATA, data, 2); + fm801_wr(fm801, FM_CODEC_CMD, regno, 2); /* wait until codec is ready */ - for (i = 0; i < TIMO && fm801_rd(fm801,FM_CODEC_CMD,2) & FM_CODEC_CMD_BUSY; i++) { + for (i = 0; + i < TIMO && fm801_rd(fm801, FM_CODEC_CMD, 2) & FM_CODEC_CMD_BUSY; + i++) { DELAY(10000); DPRINT("fm801 wrcd: 2 - DELAY\n"); } @@ -267,15 +259,12 @@ printf("fm801 wrcd: read codec busy\n"); return -1; } - DPRINT("fm801 wrcd release reg 0x%x val 0x%x\n",regno, data); + DPRINT("fm801 wrcd release reg 0x%x val 0x%x\n", regno, data); return 0; } -static kobj_method_t fm801_ac97_methods[] = { - KOBJMETHOD(ac97_read, fm801_rdcd), - KOBJMETHOD(ac97_write, fm801_wrcd), - DEVMETHOD_END -}; +static kobj_method_t fm801_ac97_methods[] = { KOBJMETHOD(ac97_read, fm801_rdcd), + KOBJMETHOD(ac97_write, fm801_wrcd), DEVMETHOD_END }; AC97_DECLARE(fm801_ac97); /* -------------------------------------------------------------------- */ @@ -286,50 +275,54 @@ static void fm801_intr(void *p) { - struct fm801_info *fm801 = (struct fm801_info *)p; - u_int32_t intsrc = fm801_rd(fm801, FM_INTSTATUS, 2); + struct fm801_info *fm801 = (struct fm801_info *)p; + u_int32_t intsrc = fm801_rd(fm801, FM_INTSTATUS, 2); DPRINT("\nfm801_intr intsrc 0x%x ", intsrc); - if(intsrc & FM_INTSTATUS_PLAY) { + if (intsrc & FM_INTSTATUS_PLAY) { fm801->play_flip++; - if(fm801->play_flip & 1) { - fm801_wr(fm801, FM_PLAY_DMABUF1, fm801->play_start,4); + if (fm801->play_flip & 1) { + fm801_wr(fm801, FM_PLAY_DMABUF1, fm801->play_start, 4); } else - fm801_wr(fm801, FM_PLAY_DMABUF2, fm801->play_nextblk,4); + fm801_wr(fm801, FM_PLAY_DMABUF2, fm801->play_nextblk, + 4); chn_intr(fm801->pch.channel); } - if(intsrc & FM_INTSTATUS_REC) { + if (intsrc & FM_INTSTATUS_REC) { fm801->rec_flip++; - if(fm801->rec_flip & 1) { - fm801_wr(fm801, FM_REC_DMABUF1, fm801->rec_start,4); + if (fm801->rec_flip & 1) { + fm801_wr(fm801, FM_REC_DMABUF1, fm801->rec_start, 4); } else - fm801_wr(fm801, FM_REC_DMABUF2, fm801->rec_nextblk,4); + fm801_wr(fm801, FM_REC_DMABUF2, fm801->rec_nextblk, 4); chn_intr(fm801->rch.channel); } - if ( intsrc & FM_INTSTATUS_MPU ) { + if (intsrc & FM_INTSTATUS_MPU) { /* This is a TODOish thing... */ - fm801_wr(fm801, FM_INTSTATUS, intsrc & FM_INTSTATUS_MPU,2); + fm801_wr(fm801, FM_INTSTATUS, intsrc & FM_INTSTATUS_MPU, 2); } - if ( intsrc & FM_INTSTATUS_VOL ) { + if (intsrc & FM_INTSTATUS_VOL) { /* This is a TODOish thing... */ - fm801_wr(fm801, FM_INTSTATUS, intsrc & FM_INTSTATUS_VOL,2); + fm801_wr(fm801, FM_INTSTATUS, intsrc & FM_INTSTATUS_VOL, 2); } DPRINT("fm801_intr clear\n\n"); - fm801_wr(fm801, FM_INTSTATUS, intsrc & (FM_INTSTATUS_PLAY | FM_INTSTATUS_REC), 2); + fm801_wr(fm801, FM_INTSTATUS, + intsrc & (FM_INTSTATUS_PLAY | FM_INTSTATUS_REC), 2); } /* -------------------------------------------------------------------- */ /* channel interface */ static void * -fm801ch_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +fm801ch_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { struct fm801_info *fm801 = (struct fm801_info *)devinfo; - struct fm801_chinfo *ch = (dir == PCMDIR_PLAY)? &fm801->pch : &fm801->rch; + struct fm801_chinfo *ch = (dir == PCMDIR_PLAY) ? &fm801->pch : + &fm801->rch; DPRINT("fm801ch_init, direction = %d\n", dir); ch->parent = fm801; @@ -348,20 +341,20 @@ struct fm801_info *fm801 = ch->parent; DPRINT("fm801ch_setformat 0x%x : %s, %s, %s, %s\n", format, - (AFMT_CHANNEL(format) > 1)?"stereo":"mono", - (format & AFMT_16BIT) ? "16bit":"8bit", - (format & AFMT_SIGNED)? "signed":"unsigned", - (format & AFMT_BIGENDIAN)?"bigendiah":"littleendian" ); - - if(ch->dir == PCMDIR_PLAY) { - fm801->play_fmt = - (AFMT_CHANNEL(format) > 1)? FM_PLAY_STEREO : 0; + (AFMT_CHANNEL(format) > 1) ? "stereo" : "mono", + (format & AFMT_16BIT) ? "16bit" : "8bit", + (format & AFMT_SIGNED) ? "signed" : "unsigned", + (format & AFMT_BIGENDIAN) ? "bigendiah" : "littleendian"); + + if (ch->dir == PCMDIR_PLAY) { + fm801->play_fmt = (AFMT_CHANNEL(format) > 1) ? FM_PLAY_STEREO : + 0; fm801->play_fmt |= (format & AFMT_16BIT) ? FM_PLAY_16BIT : 0; return 0; } - if(ch->dir == PCMDIR_REC ) { - fm801->rec_fmt = (AFMT_CHANNEL(format) > 1)? FM_REC_STEREO:0; + if (ch->dir == PCMDIR_REC) { + fm801->rec_fmt = (AFMT_CHANNEL(format) > 1) ? FM_REC_STEREO : 0; fm801->rec_fmt |= (format & AFMT_16BIT) ? FM_PLAY_16BIT : 0; return 0; } @@ -373,18 +366,10 @@ u_int32_t limit; u_int32_t rate; } fm801_rates[11] = { - { 6600, 5500 }, - { 8750, 8000 }, - { 10250, 9600 }, - { 13200, 11025 }, - { 17500, 16000 }, - { 20500, 19200 }, - { 26500, 22050 }, - { 35000, 32000 }, - { 41000, 38400 }, - { 46000, 44100 }, - { 48000, 48000 }, -/* anything above -> 48000 */ + { 6600, 5500 }, { 8750, 8000 }, { 10250, 9600 }, { 13200, 11025 }, + { 17500, 16000 }, { 20500, 19200 }, { 26500, 22050 }, { 35000, 32000 }, + { 41000, 38400 }, { 46000, 44100 }, { 48000, 48000 }, + /* anything above -> 48000 */ }; static u_int32_t @@ -394,17 +379,18 @@ struct fm801_info *fm801 = ch->parent; int i; - for (i = 0; i < 10 && fm801_rates[i].limit <= speed; i++) ; + for (i = 0; i < 10 && fm801_rates[i].limit <= speed; i++) + ; - if(ch->dir == PCMDIR_PLAY) { + if (ch->dir == PCMDIR_PLAY) { fm801->pch.spd = fm801_rates[i].rate; - fm801->play_shift = (i<<8); + fm801->play_shift = (i << 8); fm801->play_shift &= FM_PLAY_RATE_MASK; } - if(ch->dir == PCMDIR_REC ) { + if (ch->dir == PCMDIR_REC) { fm801->rch.spd = fm801_rates[i].rate; - fm801->rec_shift = (i<<8); + fm801->rec_shift = (i << 8); fm801->rec_shift &= FM_REC_RATE_MASK; } @@ -424,13 +410,13 @@ * desired values in any case - otherwise sound playback * breaks here. */ - if(ch->dir == PCMDIR_PLAY) + if (ch->dir == PCMDIR_PLAY) fm801->play_blksize = blocksize; - if(ch->dir == PCMDIR_REC) + if (ch->dir == PCMDIR_REC) fm801->rec_blksize = blocksize; - DPRINT("fm801ch_setblocksize %d (dir %d)\n",blocksize, ch->dir); + DPRINT("fm801ch_setblocksize %d (dir %d)\n", blocksize, ch->dir); return blocksize; } @@ -451,38 +437,47 @@ if (ch->dir == PCMDIR_PLAY) { if (go == PCMTRIG_START) { fm801->play_start = baseaddr; - fm801->play_nextblk = fm801->play_start + fm801->play_blksize; + fm801->play_nextblk = fm801->play_start + + fm801->play_blksize; fm801->play_flip = 0; - fm801_wr(fm801, FM_PLAY_DMALEN, fm801->play_blksize - 1, 2); - fm801_wr(fm801, FM_PLAY_DMABUF1,fm801->play_start,4); - fm801_wr(fm801, FM_PLAY_DMABUF2,fm801->play_nextblk,4); + fm801_wr(fm801, FM_PLAY_DMALEN, fm801->play_blksize - 1, + 2); + fm801_wr(fm801, FM_PLAY_DMABUF1, fm801->play_start, 4); + fm801_wr(fm801, FM_PLAY_DMABUF2, fm801->play_nextblk, + 4); fm801_wr(fm801, FM_PLAY_CTL, - FM_PLAY_START | FM_PLAY_STOPNOW | fm801->play_fmt | fm801->play_shift, - 2 ); - } else { + FM_PLAY_START | FM_PLAY_STOPNOW | fm801->play_fmt | + fm801->play_shift, + 2); + } else { fm801->play_flip = 0; - k1 = fm801_rd(fm801, FM_PLAY_CTL,2); + k1 = fm801_rd(fm801, FM_PLAY_CTL, 2); fm801_wr(fm801, FM_PLAY_CTL, - (k1 & ~(FM_PLAY_STOPNOW | FM_PLAY_START)) | - FM_PLAY_BUF1_LAST | FM_PLAY_BUF2_LAST, 2 ); + (k1 & ~(FM_PLAY_STOPNOW | FM_PLAY_START)) | + FM_PLAY_BUF1_LAST | FM_PLAY_BUF2_LAST, + 2); } - } else if(ch->dir == PCMDIR_REC) { + } else if (ch->dir == PCMDIR_REC) { if (go == PCMTRIG_START) { fm801->rec_start = baseaddr; - fm801->rec_nextblk = fm801->rec_start + fm801->rec_blksize; + fm801->rec_nextblk = fm801->rec_start + + fm801->rec_blksize; fm801->rec_flip = 0; - fm801_wr(fm801, FM_REC_DMALEN, fm801->rec_blksize - 1, 2); - fm801_wr(fm801, FM_REC_DMABUF1,fm801->rec_start,4); - fm801_wr(fm801, FM_REC_DMABUF2,fm801->rec_nextblk,4); + fm801_wr(fm801, FM_REC_DMALEN, fm801->rec_blksize - 1, + 2); + fm801_wr(fm801, FM_REC_DMABUF1, fm801->rec_start, 4); + fm801_wr(fm801, FM_REC_DMABUF2, fm801->rec_nextblk, 4); fm801_wr(fm801, FM_REC_CTL, - FM_REC_START | FM_REC_STOPNOW | fm801->rec_fmt | fm801->rec_shift, - 2 ); - } else { + FM_REC_START | FM_REC_STOPNOW | fm801->rec_fmt | + fm801->rec_shift, + 2); + } else { fm801->rec_flip = 0; - k1 = fm801_rd(fm801, FM_REC_CTL,2); + k1 = fm801_rd(fm801, FM_REC_CTL, 2); fm801_wr(fm801, FM_REC_CTL, - (k1 & ~(FM_REC_STOPNOW | FM_REC_START)) | - FM_REC_BUF1_LAST | FM_REC_BUF2_LAST, 2); + (k1 & ~(FM_REC_STOPNOW | FM_REC_START)) | + FM_REC_BUF1_LAST | FM_REC_BUF2_LAST, + 2); } } @@ -499,14 +494,18 @@ if (ch->dir == PCMDIR_PLAY) { result = fm801_rd(fm801, - (fm801->play_flip&1) ? - FM_PLAY_DMABUF2:FM_PLAY_DMABUF1, 4) - fm801->play_start; + (fm801->play_flip & 1) ? FM_PLAY_DMABUF2 : + FM_PLAY_DMABUF1, + 4) - + fm801->play_start; } if (ch->dir == PCMDIR_REC) { result = fm801_rd(fm801, - (fm801->rec_flip&1) ? - FM_REC_DMABUF2:FM_REC_DMABUF1, 4) - fm801->rec_start; + (fm801->rec_flip & 1) ? FM_REC_DMABUF2 : + FM_REC_DMABUF1, + 4) - + fm801->rec_start; } return result; @@ -518,16 +517,14 @@ return &fm801ch_caps; } -static kobj_method_t fm801ch_methods[] = { - KOBJMETHOD(channel_init, fm801ch_init), - KOBJMETHOD(channel_setformat, fm801ch_setformat), - KOBJMETHOD(channel_setspeed, fm801ch_setspeed), - KOBJMETHOD(channel_setblocksize, fm801ch_setblocksize), - KOBJMETHOD(channel_trigger, fm801ch_trigger), - KOBJMETHOD(channel_getptr, fm801ch_getptr), - KOBJMETHOD(channel_getcaps, fm801ch_getcaps), - DEVMETHOD_END -}; +static kobj_method_t fm801ch_methods[] = { KOBJMETHOD(channel_init, + fm801ch_init), + KOBJMETHOD(channel_setformat, fm801ch_setformat), + KOBJMETHOD(channel_setspeed, fm801ch_setspeed), + KOBJMETHOD(channel_setblocksize, fm801ch_setblocksize), + KOBJMETHOD(channel_trigger, fm801ch_trigger), + KOBJMETHOD(channel_getptr, fm801ch_getptr), + KOBJMETHOD(channel_getcaps, fm801ch_getcaps), DEVMETHOD_END }; CHANNEL_DECLARE(fm801ch); /* -------------------------------------------------------------------- */ @@ -541,26 +538,28 @@ u_int32_t k1; /* reset codec */ - fm801_wr(fm801, FM_CODEC_CTL, 0x0020,2); + fm801_wr(fm801, FM_CODEC_CTL, 0x0020, 2); DELAY(100000); - fm801_wr(fm801, FM_CODEC_CTL, 0x0000,2); + fm801_wr(fm801, FM_CODEC_CTL, 0x0000, 2); DELAY(100000); - fm801_wr(fm801, FM_PCM_VOLUME, 0x0808,2); - fm801_wr(fm801, FM_FM_VOLUME, 0x0808,2); - fm801_wr(fm801, FM_I2S_VOLUME, 0x0808,2); - fm801_wr(fm801, 0x40,0x107f,2); /* enable legacy audio */ + fm801_wr(fm801, FM_PCM_VOLUME, 0x0808, 2); + fm801_wr(fm801, FM_FM_VOLUME, 0x0808, 2); + fm801_wr(fm801, FM_I2S_VOLUME, 0x0808, 2); + fm801_wr(fm801, 0x40, 0x107f, 2); /* enable legacy audio */ - fm801_wr((void *)fm801, FM_RECORD_SOURCE, 0x0000,2); + fm801_wr((void *)fm801, FM_RECORD_SOURCE, 0x0000, 2); /* Unmask playback, record and mpu interrupts, mask the rest */ - k1 = fm801_rd((void *)fm801, FM_INTMASK,2); + k1 = fm801_rd((void *)fm801, FM_INTMASK, 2); fm801_wr(fm801, FM_INTMASK, - (k1 & ~(FM_INTMASK_PLAY | FM_INTMASK_REC | FM_INTMASK_MPU)) | - FM_INTMASK_VOL,2); + (k1 & ~(FM_INTMASK_PLAY | FM_INTMASK_REC | FM_INTMASK_MPU)) | + FM_INTMASK_VOL, + 2); fm801_wr(fm801, FM_INTSTATUS, - FM_INTSTATUS_PLAY | FM_INTSTATUS_REC | FM_INTSTATUS_MPU | - FM_INTSTATUS_VOL,2); + FM_INTSTATUS_PLAY | FM_INTSTATUS_REC | FM_INTSTATUS_MPU | + FM_INTSTATUS_VOL, + 2); DPRINT("FM801 init Ok\n"); return 0; @@ -569,11 +568,11 @@ static int fm801_pci_attach(device_t dev) { - struct ac97_info *codec = NULL; - struct fm801_info *fm801; - int i; - int mapped = 0; - char status[SND_STATUSLEN]; + struct ac97_info *codec = NULL; + struct fm801_info *fm801; + int i; + int mapped = 0; + char status[SND_STATUSLEN]; fm801 = malloc(sizeof(*fm801), M_DEVBUF, M_WAITOK | M_ZERO); fm801->type = pci_get_devid(dev); @@ -584,17 +583,14 @@ fm801->regid = PCIR_BAR(i); fm801->regtype = SYS_RES_MEMORY; fm801->reg = bus_alloc_resource_any(dev, fm801->regtype, - &fm801->regid, RF_ACTIVE); - if(!fm801->reg) - { + &fm801->regid, RF_ACTIVE); + if (!fm801->reg) { fm801->regtype = SYS_RES_IOPORT; - fm801->reg = bus_alloc_resource_any(dev, - fm801->regtype, - &fm801->regid, - RF_ACTIVE); + fm801->reg = bus_alloc_resource_any(dev, fm801->regtype, + &fm801->regid, RF_ACTIVE); } - if(fm801->reg) { + if (fm801->reg) { fm801->st = rman_get_bustag(fm801->reg); fm801->sh = rman_get_bushandle(fm801->reg); mapped++; @@ -611,38 +607,41 @@ fm801_init(fm801); codec = AC97_CREATE(dev, fm801, fm801_ac97); - if (codec == NULL) goto oops; + if (codec == NULL) + goto oops; - if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto oops; + if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) + goto oops; fm801->irqid = 0; fm801->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &fm801->irqid, - RF_ACTIVE | RF_SHAREABLE); + RF_ACTIVE | RF_SHAREABLE); if (!fm801->irq || snd_setup_intr(dev, fm801->irq, 0, fm801_intr, fm801, &fm801->ih)) { device_printf(dev, "unable to map interrupt\n"); goto oops; } - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/fm801->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, /*lockarg*/NULL, + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ fm801->bufsz, /*nsegments*/ 1, /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, /*lockarg*/ NULL, &fm801->parent_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto oops; } snprintf(status, SND_STATUSLEN, "%s 0x%jx irq %jd on %s", - (fm801->regtype == SYS_RES_IOPORT)? "port" : "mem", - rman_get_start(fm801->reg), rman_get_start(fm801->irq), - device_get_nameunit(device_get_parent(dev))); + (fm801->regtype == SYS_RES_IOPORT) ? "port" : "mem", + rman_get_start(fm801->reg), rman_get_start(fm801->irq), + device_get_nameunit(device_get_parent(dev))); -#define FM801_MAXPLAYCH 1 - if (pcm_register(dev, fm801, FM801_MAXPLAYCH, 1)) goto oops; +#define FM801_MAXPLAYCH 1 + if (pcm_register(dev, fm801, FM801_MAXPLAYCH, 1)) + goto oops; pcm_addchan(dev, PCMDIR_PLAY, &fm801ch_class, fm801); pcm_addchan(dev, PCMDIR_REC, &fm801ch_class, fm801); pcm_setstatus(dev, status); @@ -653,11 +652,18 @@ return 0; oops: - if (codec) ac97_destroy(codec); - if (fm801->reg) bus_release_resource(dev, fm801->regtype, fm801->regid, fm801->reg); - if (fm801->ih) bus_teardown_intr(dev, fm801->irq, fm801->ih); - if (fm801->irq) bus_release_resource(dev, SYS_RES_IRQ, fm801->irqid, fm801->irq); - if (fm801->parent_dmat) bus_dma_tag_destroy(fm801->parent_dmat); + if (codec) + ac97_destroy(codec); + if (fm801->reg) + bus_release_resource(dev, fm801->regtype, fm801->regid, + fm801->reg); + if (fm801->ih) + bus_teardown_intr(dev, fm801->irq, fm801->ih); + if (fm801->irq) + bus_release_resource(dev, SYS_RES_IRQ, fm801->irqid, + fm801->irq); + if (fm801->parent_dmat) + bus_dma_tag_destroy(fm801->parent_dmat); free(fm801, M_DEVBUF); return ENXIO; } @@ -695,27 +701,26 @@ } static int -fm801_pci_probe( device_t dev ) +fm801_pci_probe(device_t dev) { int id; - if ((id = pci_get_devid(dev)) == PCI_DEVICE_FORTEMEDIA1 ) { + if ((id = pci_get_devid(dev)) == PCI_DEVICE_FORTEMEDIA1) { device_set_desc(dev, "Forte Media FM801 Audio Controller"); return BUS_PROBE_DEFAULT; } -/* - if ((id = pci_get_devid(dev)) == PCI_DEVICE_FORTEMEDIA2 ) { - device_set_desc(dev, "Forte Media FM801 Joystick (Not Supported)"); - return ENXIO; - } -*/ + /* + if ((id = pci_get_devid(dev)) == PCI_DEVICE_FORTEMEDIA2 ) { + device_set_desc(dev, "Forte Media FM801 Joystick (Not + Supported)"); return ENXIO; + } + */ return ENXIO; } static struct resource * fm801_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, - u_int flags) + rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) { struct fm801_info *fm801; @@ -735,16 +740,16 @@ static device_method_t fm801_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, fm801_pci_probe), - DEVMETHOD(device_attach, fm801_pci_attach), - DEVMETHOD(device_detach, fm801_pci_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), + DEVMETHOD(device_probe, fm801_pci_probe), + DEVMETHOD(device_attach, fm801_pci_attach), + DEVMETHOD(device_detach, fm801_pci_detach), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + DEVMETHOD(device_suspend, bus_generic_suspend), + DEVMETHOD(device_resume, bus_generic_resume), /* Bus interface */ - DEVMETHOD(bus_alloc_resource, fm801_alloc_resource), - DEVMETHOD(bus_release_resource, fm801_release_resource), + DEVMETHOD(bus_alloc_resource, fm801_alloc_resource), + DEVMETHOD(bus_release_resource, fm801_release_resource), DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), Index: sys/dev/sound/pci/hda/hda_reg.h =================================================================== --- sys/dev/sound/pci/hda/hda_reg.h +++ sys/dev/sound/pci/hda/hda_reg.h @@ -34,1332 +34,1279 @@ ****************************************************************************/ /* HDA Command */ -#define HDA_CMD_VERB_MASK 0x000fffff -#define HDA_CMD_VERB_SHIFT 0 -#define HDA_CMD_NID_MASK 0x0ff00000 -#define HDA_CMD_NID_SHIFT 20 -#define HDA_CMD_CAD_MASK 0xf0000000 -#define HDA_CMD_CAD_SHIFT 28 - -#define HDA_CMD_VERB_4BIT_SHIFT 16 -#define HDA_CMD_VERB_12BIT_SHIFT 8 - -#define HDA_CMD_VERB_4BIT(verb, payload) \ - (((verb) << HDA_CMD_VERB_4BIT_SHIFT) | (payload)) -#define HDA_CMD_4BIT(cad, nid, verb, payload) \ - (((cad) << HDA_CMD_CAD_SHIFT) | \ - ((nid) << HDA_CMD_NID_SHIFT) | \ - (HDA_CMD_VERB_4BIT((verb), (payload)))) - -#define HDA_CMD_VERB_12BIT(verb, payload) \ - (((verb) << HDA_CMD_VERB_12BIT_SHIFT) | (payload)) -#define HDA_CMD_12BIT(cad, nid, verb, payload) \ - (((cad) << HDA_CMD_CAD_SHIFT) | \ - ((nid) << HDA_CMD_NID_SHIFT) | \ - (HDA_CMD_VERB_12BIT((verb), (payload)))) +#define HDA_CMD_VERB_MASK 0x000fffff +#define HDA_CMD_VERB_SHIFT 0 +#define HDA_CMD_NID_MASK 0x0ff00000 +#define HDA_CMD_NID_SHIFT 20 +#define HDA_CMD_CAD_MASK 0xf0000000 +#define HDA_CMD_CAD_SHIFT 28 + +#define HDA_CMD_VERB_4BIT_SHIFT 16 +#define HDA_CMD_VERB_12BIT_SHIFT 8 + +#define HDA_CMD_VERB_4BIT(verb, payload) \ + (((verb) << HDA_CMD_VERB_4BIT_SHIFT) | (payload)) +#define HDA_CMD_4BIT(cad, nid, verb, payload) \ + (((cad) << HDA_CMD_CAD_SHIFT) | ((nid) << HDA_CMD_NID_SHIFT) | \ + (HDA_CMD_VERB_4BIT((verb), (payload)))) + +#define HDA_CMD_VERB_12BIT(verb, payload) \ + (((verb) << HDA_CMD_VERB_12BIT_SHIFT) | (payload)) +#define HDA_CMD_12BIT(cad, nid, verb, payload) \ + (((cad) << HDA_CMD_CAD_SHIFT) | ((nid) << HDA_CMD_NID_SHIFT) | \ + (HDA_CMD_VERB_12BIT((verb), (payload)))) /* Get Parameter */ -#define HDA_CMD_VERB_GET_PARAMETER 0xf00 +#define HDA_CMD_VERB_GET_PARAMETER 0xf00 -#define HDA_CMD_GET_PARAMETER(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_PARAMETER, (payload))) +#define HDA_CMD_GET_PARAMETER(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_PARAMETER, (payload))) /* Connection Select Control */ -#define HDA_CMD_VERB_GET_CONN_SELECT_CONTROL 0xf01 -#define HDA_CMD_VERB_SET_CONN_SELECT_CONTROL 0x701 +#define HDA_CMD_VERB_GET_CONN_SELECT_CONTROL 0xf01 +#define HDA_CMD_VERB_SET_CONN_SELECT_CONTROL 0x701 -#define HDA_CMD_GET_CONN_SELECT_CONTROL(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_CONN_SELECT_CONTROL, 0x0)) -#define HDA_CMD_SET_CONNECTION_SELECT_CONTROL(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_CONN_SELECT_CONTROL, (payload))) +#define HDA_CMD_GET_CONN_SELECT_CONTROL(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_CONN_SELECT_CONTROL, 0x0)) +#define HDA_CMD_SET_CONNECTION_SELECT_CONTROL(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_CONN_SELECT_CONTROL, \ + (payload))) /* Connection List Entry */ -#define HDA_CMD_VERB_GET_CONN_LIST_ENTRY 0xf02 +#define HDA_CMD_VERB_GET_CONN_LIST_ENTRY 0xf02 -#define HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_CONN_LIST_ENTRY, (payload))) +#define HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_CONN_LIST_ENTRY, \ + (payload))) -#define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_SHORT 1 -#define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_LONG 2 +#define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_SHORT 1 +#define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_LONG 2 /* Processing State */ -#define HDA_CMD_VERB_GET_PROCESSING_STATE 0xf03 -#define HDA_CMD_VERB_SET_PROCESSING_STATE 0x703 +#define HDA_CMD_VERB_GET_PROCESSING_STATE 0xf03 +#define HDA_CMD_VERB_SET_PROCESSING_STATE 0x703 -#define HDA_CMD_GET_PROCESSING_STATE(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_PROCESSING_STATE, 0x0)) -#define HDA_CMD_SET_PROCESSING_STATE(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_PROCESSING_STATE, (payload))) +#define HDA_CMD_GET_PROCESSING_STATE(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_PROCESSING_STATE, 0x0)) +#define HDA_CMD_SET_PROCESSING_STATE(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_PROCESSING_STATE, \ + (payload))) -#define HDA_CMD_GET_PROCESSING_STATE_STATE_OFF 0x00 -#define HDA_CMD_GET_PROCESSING_STATE_STATE_ON 0x01 -#define HDA_CMD_GET_PROCESSING_STATE_STATE_BENIGN 0x02 +#define HDA_CMD_GET_PROCESSING_STATE_STATE_OFF 0x00 +#define HDA_CMD_GET_PROCESSING_STATE_STATE_ON 0x01 +#define HDA_CMD_GET_PROCESSING_STATE_STATE_BENIGN 0x02 /* Coefficient Index */ -#define HDA_CMD_VERB_GET_COEFF_INDEX 0xd -#define HDA_CMD_VERB_SET_COEFF_INDEX 0x5 +#define HDA_CMD_VERB_GET_COEFF_INDEX 0xd +#define HDA_CMD_VERB_SET_COEFF_INDEX 0x5 -#define HDA_CMD_GET_COEFF_INDEX(cad, nid) \ - (HDA_CMD_4BIT((cad), (nid), \ - HDA_CMD_VERB_GET_COEFF_INDEX, 0x0)) -#define HDA_CMD_SET_COEFF_INDEX(cad, nid, payload) \ - (HDA_CMD_4BIT((cad), (nid), \ - HDA_CMD_VERB_SET_COEFF_INDEX, (payload))) +#define HDA_CMD_GET_COEFF_INDEX(cad, nid) \ + (HDA_CMD_4BIT((cad), (nid), HDA_CMD_VERB_GET_COEFF_INDEX, 0x0)) +#define HDA_CMD_SET_COEFF_INDEX(cad, nid, payload) \ + (HDA_CMD_4BIT((cad), (nid), HDA_CMD_VERB_SET_COEFF_INDEX, (payload))) /* Processing Coefficient */ -#define HDA_CMD_VERB_GET_PROCESSING_COEFF 0xc -#define HDA_CMD_VERB_SET_PROCESSING_COEFF 0x4 +#define HDA_CMD_VERB_GET_PROCESSING_COEFF 0xc +#define HDA_CMD_VERB_SET_PROCESSING_COEFF 0x4 -#define HDA_CMD_GET_PROCESSING_COEFF(cad, nid) \ - (HDA_CMD_4BIT((cad), (nid), \ - HDA_CMD_VERB_GET_PROCESSING_COEFF, 0x0)) -#define HDA_CMD_SET_PROCESSING_COEFF(cad, nid, payload) \ - (HDA_CMD_4BIT((cad), (nid), \ - HDA_CMD_VERB_SET_PROCESSING_COEFF, (payload))) +#define HDA_CMD_GET_PROCESSING_COEFF(cad, nid) \ + (HDA_CMD_4BIT((cad), (nid), HDA_CMD_VERB_GET_PROCESSING_COEFF, 0x0)) +#define HDA_CMD_SET_PROCESSING_COEFF(cad, nid, payload) \ + (HDA_CMD_4BIT((cad), (nid), HDA_CMD_VERB_SET_PROCESSING_COEFF, \ + (payload))) /* Amplifier Gain/Mute */ -#define HDA_CMD_VERB_GET_AMP_GAIN_MUTE 0xb -#define HDA_CMD_VERB_SET_AMP_GAIN_MUTE 0x3 - -#define HDA_CMD_GET_AMP_GAIN_MUTE(cad, nid, payload) \ - (HDA_CMD_4BIT((cad), (nid), \ - HDA_CMD_VERB_GET_AMP_GAIN_MUTE, (payload))) -#define HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, payload) \ - (HDA_CMD_4BIT((cad), (nid), \ - HDA_CMD_VERB_SET_AMP_GAIN_MUTE, (payload))) - -#define HDA_CMD_GET_AMP_GAIN_MUTE_INPUT 0x0000 -#define HDA_CMD_GET_AMP_GAIN_MUTE_OUTPUT 0x8000 -#define HDA_CMD_GET_AMP_GAIN_MUTE_RIGHT 0x0000 -#define HDA_CMD_GET_AMP_GAIN_MUTE_LEFT 0x2000 - -#define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK 0x00000008 -#define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT 7 -#define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK 0x00000007 -#define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT 0 - -#define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE(rsp) \ - (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK) >> \ - HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT) -#define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN(rsp) \ - (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK) >> \ - HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT) - -#define HDA_CMD_SET_AMP_GAIN_MUTE_OUTPUT 0x8000 -#define HDA_CMD_SET_AMP_GAIN_MUTE_INPUT 0x4000 -#define HDA_CMD_SET_AMP_GAIN_MUTE_LEFT 0x2000 -#define HDA_CMD_SET_AMP_GAIN_MUTE_RIGHT 0x1000 -#define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK 0x0f00 -#define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT 8 -#define HDA_CMD_SET_AMP_GAIN_MUTE_MUTE 0x0080 -#define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK 0x0007 -#define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT 0 - -#define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX(index) \ - (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT) & \ - HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK) -#define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN(index) \ - (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT) & \ - HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK) +#define HDA_CMD_VERB_GET_AMP_GAIN_MUTE 0xb +#define HDA_CMD_VERB_SET_AMP_GAIN_MUTE 0x3 + +#define HDA_CMD_GET_AMP_GAIN_MUTE(cad, nid, payload) \ + (HDA_CMD_4BIT((cad), (nid), HDA_CMD_VERB_GET_AMP_GAIN_MUTE, (payload))) +#define HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, payload) \ + (HDA_CMD_4BIT((cad), (nid), HDA_CMD_VERB_SET_AMP_GAIN_MUTE, (payload))) + +#define HDA_CMD_GET_AMP_GAIN_MUTE_INPUT 0x0000 +#define HDA_CMD_GET_AMP_GAIN_MUTE_OUTPUT 0x8000 +#define HDA_CMD_GET_AMP_GAIN_MUTE_RIGHT 0x0000 +#define HDA_CMD_GET_AMP_GAIN_MUTE_LEFT 0x2000 + +#define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK 0x00000008 +#define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT 7 +#define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK 0x00000007 +#define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT 0 + +#define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE(rsp) \ + (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK) >> \ + HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT) +#define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN(rsp) \ + (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK) >> \ + HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT) + +#define HDA_CMD_SET_AMP_GAIN_MUTE_OUTPUT 0x8000 +#define HDA_CMD_SET_AMP_GAIN_MUTE_INPUT 0x4000 +#define HDA_CMD_SET_AMP_GAIN_MUTE_LEFT 0x2000 +#define HDA_CMD_SET_AMP_GAIN_MUTE_RIGHT 0x1000 +#define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK 0x0f00 +#define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT 8 +#define HDA_CMD_SET_AMP_GAIN_MUTE_MUTE 0x0080 +#define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK 0x0007 +#define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT 0 + +#define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX(index) \ + (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT) & \ + HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK) +#define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN(index) \ + (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT) & \ + HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK) /* Converter format */ -#define HDA_CMD_VERB_GET_CONV_FMT 0xa -#define HDA_CMD_VERB_SET_CONV_FMT 0x2 +#define HDA_CMD_VERB_GET_CONV_FMT 0xa +#define HDA_CMD_VERB_SET_CONV_FMT 0x2 -#define HDA_CMD_GET_CONV_FMT(cad, nid) \ - (HDA_CMD_4BIT((cad), (nid), \ - HDA_CMD_VERB_GET_CONV_FMT, 0x0)) -#define HDA_CMD_SET_CONV_FMT(cad, nid, payload) \ - (HDA_CMD_4BIT((cad), (nid), \ - HDA_CMD_VERB_SET_CONV_FMT, (payload))) +#define HDA_CMD_GET_CONV_FMT(cad, nid) \ + (HDA_CMD_4BIT((cad), (nid), HDA_CMD_VERB_GET_CONV_FMT, 0x0)) +#define HDA_CMD_SET_CONV_FMT(cad, nid, payload) \ + (HDA_CMD_4BIT((cad), (nid), HDA_CMD_VERB_SET_CONV_FMT, (payload))) /* Digital Converter Control */ -#define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1 0xf0d -#define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT2 0xf0e -#define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1 0x70d -#define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2 0x70e - -#define HDA_CMD_GET_DIGITAL_CONV_FMT(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1, 0x0)) -#define HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1, (payload))) -#define HDA_CMD_SET_DIGITAL_CONV_FMT2(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2, (payload))) - -#define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK 0x7f00 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT 8 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK 0x0080 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT 7 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK 0x0040 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT 6 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK 0x0020 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT 5 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK 0x0010 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT 4 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK 0x0008 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT 3 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK 0x0004 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT 2 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK 0x0002 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT 1 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK 0x0001 -#define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT 0 - -#define HDA_CMD_GET_DIGITAL_CONV_FMT_CC(rsp) \ - (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK) >> \ - HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT) -#define HDA_CMD_GET_DIGITAL_CONV_FMT_L(rsp) \ - (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK) >> \ - HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT) -#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO(rsp) \ - (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK) >> \ - HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT) -#define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO(rsp) \ - (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK) >> \ - HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT) -#define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY(rsp) \ - (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK) >> \ - HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT) -#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE(rsp) \ - (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK) >> \ - HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT) -#define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG(rsp) \ - (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK) >> \ - HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT) -#define HDA_CMD_GET_DIGITAL_CONV_FMT_V(rsp) \ - (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK) >> \ - HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT) -#define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN(rsp) \ - (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK) >> \ - HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT) - -#define HDA_CMD_SET_DIGITAL_CONV_FMT1_L 0x80 -#define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRO 0x40 -#define HDA_CMD_SET_DIGITAL_CONV_FMT1_NAUDIO 0x20 -#define HDA_CMD_SET_DIGITAL_CONV_FMT1_COPY 0x10 -#define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRE 0x08 -#define HDA_CMD_SET_DIGITAL_CONV_FMT1_VCFG 0x04 -#define HDA_CMD_SET_DIGITAL_CONV_FMT1_V 0x02 -#define HDA_CMD_SET_DIGITAL_CONV_FMT1_DIGEN 0x01 +#define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1 0xf0d +#define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT2 0xf0e +#define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1 0x70d +#define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2 0x70e + +#define HDA_CMD_GET_DIGITAL_CONV_FMT(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1, 0x0)) +#define HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1, \ + (payload))) +#define HDA_CMD_SET_DIGITAL_CONV_FMT2(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2, \ + (payload))) + +#define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK 0x7f00 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT 8 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK 0x0080 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT 7 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK 0x0040 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT 6 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK 0x0020 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT 5 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK 0x0010 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT 4 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK 0x0008 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT 3 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK 0x0004 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT 2 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK 0x0002 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT 1 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK 0x0001 +#define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT 0 + +#define HDA_CMD_GET_DIGITAL_CONV_FMT_CC(rsp) \ + (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK) >> \ + HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT) +#define HDA_CMD_GET_DIGITAL_CONV_FMT_L(rsp) \ + (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK) >> \ + HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT) +#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO(rsp) \ + (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK) >> \ + HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT) +#define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO(rsp) \ + (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK) >> \ + HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT) +#define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY(rsp) \ + (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK) >> \ + HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT) +#define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE(rsp) \ + (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK) >> \ + HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT) +#define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG(rsp) \ + (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK) >> \ + HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT) +#define HDA_CMD_GET_DIGITAL_CONV_FMT_V(rsp) \ + (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK) >> \ + HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT) +#define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN(rsp) \ + (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK) >> \ + HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT) + +#define HDA_CMD_SET_DIGITAL_CONV_FMT1_L 0x80 +#define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRO 0x40 +#define HDA_CMD_SET_DIGITAL_CONV_FMT1_NAUDIO 0x20 +#define HDA_CMD_SET_DIGITAL_CONV_FMT1_COPY 0x10 +#define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRE 0x08 +#define HDA_CMD_SET_DIGITAL_CONV_FMT1_VCFG 0x04 +#define HDA_CMD_SET_DIGITAL_CONV_FMT1_V 0x02 +#define HDA_CMD_SET_DIGITAL_CONV_FMT1_DIGEN 0x01 /* Power State */ -#define HDA_CMD_VERB_GET_POWER_STATE 0xf05 -#define HDA_CMD_VERB_SET_POWER_STATE 0x705 - -#define HDA_CMD_GET_POWER_STATE(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_POWER_STATE, 0x0)) -#define HDA_CMD_SET_POWER_STATE(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_POWER_STATE, (payload))) - -#define HDA_CMD_POWER_STATE_D0 0x00 -#define HDA_CMD_POWER_STATE_D1 0x01 -#define HDA_CMD_POWER_STATE_D2 0x02 -#define HDA_CMD_POWER_STATE_D3 0x03 - -#define HDA_CMD_POWER_STATE_ACT_MASK 0x000000f0 -#define HDA_CMD_POWER_STATE_ACT_SHIFT 4 -#define HDA_CMD_POWER_STATE_SET_MASK 0x0000000f -#define HDA_CMD_POWER_STATE_SET_SHIFT 0 - -#define HDA_CMD_GET_POWER_STATE_ACT(rsp) \ - (((rsp) & HDA_CMD_POWER_STATE_ACT_MASK) >> \ - HDA_CMD_POWER_STATE_ACT_SHIFT) -#define HDA_CMD_GET_POWER_STATE_SET(rsp) \ - (((rsp) & HDA_CMD_POWER_STATE_SET_MASK) >> \ - HDA_CMD_POWER_STATE_SET_SHIFT) - -#define HDA_CMD_SET_POWER_STATE_ACT(ps) \ - (((ps) << HDA_CMD_POWER_STATE_ACT_SHIFT) & \ - HDA_CMD_POWER_STATE_ACT_MASK) -#define HDA_CMD_SET_POWER_STATE_SET(ps) \ - (((ps) << HDA_CMD_POWER_STATE_SET_SHIFT) & \ - HDA_CMD_POWER_STATE_ACT_MASK) +#define HDA_CMD_VERB_GET_POWER_STATE 0xf05 +#define HDA_CMD_VERB_SET_POWER_STATE 0x705 + +#define HDA_CMD_GET_POWER_STATE(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_POWER_STATE, 0x0)) +#define HDA_CMD_SET_POWER_STATE(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_POWER_STATE, (payload))) + +#define HDA_CMD_POWER_STATE_D0 0x00 +#define HDA_CMD_POWER_STATE_D1 0x01 +#define HDA_CMD_POWER_STATE_D2 0x02 +#define HDA_CMD_POWER_STATE_D3 0x03 + +#define HDA_CMD_POWER_STATE_ACT_MASK 0x000000f0 +#define HDA_CMD_POWER_STATE_ACT_SHIFT 4 +#define HDA_CMD_POWER_STATE_SET_MASK 0x0000000f +#define HDA_CMD_POWER_STATE_SET_SHIFT 0 + +#define HDA_CMD_GET_POWER_STATE_ACT(rsp) \ + (((rsp) & HDA_CMD_POWER_STATE_ACT_MASK) >> \ + HDA_CMD_POWER_STATE_ACT_SHIFT) +#define HDA_CMD_GET_POWER_STATE_SET(rsp) \ + (((rsp) & HDA_CMD_POWER_STATE_SET_MASK) >> \ + HDA_CMD_POWER_STATE_SET_SHIFT) + +#define HDA_CMD_SET_POWER_STATE_ACT(ps) \ + (((ps) << HDA_CMD_POWER_STATE_ACT_SHIFT) & HDA_CMD_POWER_STATE_ACT_MASK) +#define HDA_CMD_SET_POWER_STATE_SET(ps) \ + (((ps) << HDA_CMD_POWER_STATE_SET_SHIFT) & HDA_CMD_POWER_STATE_ACT_MASK) /* Converter Stream, Channel */ -#define HDA_CMD_VERB_GET_CONV_STREAM_CHAN 0xf06 -#define HDA_CMD_VERB_SET_CONV_STREAM_CHAN 0x706 - -#define HDA_CMD_GET_CONV_STREAM_CHAN(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_CONV_STREAM_CHAN, 0x0)) -#define HDA_CMD_SET_CONV_STREAM_CHAN(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_CONV_STREAM_CHAN, (payload))) - -#define HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK 0x000000f0 -#define HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT 4 -#define HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK 0x0000000f -#define HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT 0 - -#define HDA_CMD_GET_CONV_STREAM_CHAN_STREAM(rsp) \ - (((rsp) & HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK) >> \ - HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT) -#define HDA_CMD_GET_CONV_STREAM_CHAN_CHAN(rsp) \ - (((rsp) & HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK) >> \ - HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT) - -#define HDA_CMD_SET_CONV_STREAM_CHAN_STREAM(param) \ - (((param) << HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT) & \ - HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK) -#define HDA_CMD_SET_CONV_STREAM_CHAN_CHAN(param) \ - (((param) << HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT) & \ - HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK) +#define HDA_CMD_VERB_GET_CONV_STREAM_CHAN 0xf06 +#define HDA_CMD_VERB_SET_CONV_STREAM_CHAN 0x706 + +#define HDA_CMD_GET_CONV_STREAM_CHAN(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_CONV_STREAM_CHAN, 0x0)) +#define HDA_CMD_SET_CONV_STREAM_CHAN(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_CONV_STREAM_CHAN, \ + (payload))) + +#define HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK 0x000000f0 +#define HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT 4 +#define HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK 0x0000000f +#define HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT 0 + +#define HDA_CMD_GET_CONV_STREAM_CHAN_STREAM(rsp) \ + (((rsp) & HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK) >> \ + HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT) +#define HDA_CMD_GET_CONV_STREAM_CHAN_CHAN(rsp) \ + (((rsp) & HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK) >> \ + HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT) + +#define HDA_CMD_SET_CONV_STREAM_CHAN_STREAM(param) \ + (((param) << HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT) & \ + HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK) +#define HDA_CMD_SET_CONV_STREAM_CHAN_CHAN(param) \ + (((param) << HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT) & \ + HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK) /* Input Converter SDI Select */ -#define HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT 0xf04 -#define HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT 0x704 +#define HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT 0xf04 +#define HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT 0x704 -#define HDA_CMD_GET_INPUT_CONVERTER_SDI_SELECT(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT, 0x0)) -#define HDA_CMD_SET_INPUT_CONVERTER_SDI_SELECT(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT, (payload))) +#define HDA_CMD_GET_INPUT_CONVERTER_SDI_SELECT(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), \ + HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT, 0x0)) +#define HDA_CMD_SET_INPUT_CONVERTER_SDI_SELECT(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), \ + HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT, (payload))) /* Pin Widget Control */ -#define HDA_CMD_VERB_GET_PIN_WIDGET_CTRL 0xf07 -#define HDA_CMD_VERB_SET_PIN_WIDGET_CTRL 0x707 - -#define HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_PIN_WIDGET_CTRL, 0x0)) -#define HDA_CMD_SET_PIN_WIDGET_CTRL(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_PIN_WIDGET_CTRL, (payload))) - -#define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK 0x00000080 -#define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT 7 -#define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK 0x00000040 -#define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT 6 -#define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK 0x00000020 -#define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT 5 -#define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK 0x00000007 -#define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT 0 - -#define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE(rsp) \ - (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK) >> \ - HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT) -#define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE(rsp) \ - (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK) >> \ - HDA_GET_CMD_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT) -#define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE(rsp) \ - (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK) >> \ - HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT) -#define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE(rsp) \ - (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) >> \ - HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT) - -#define HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE 0x80 -#define HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE 0x40 -#define HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE 0x20 -#define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK 0x07 -#define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT 0 - -#define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(param) \ - (((param) << HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT) & \ - HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) - -#define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_HIZ 0 -#define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50 1 -#define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_GROUND 2 -#define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80 4 -#define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100 5 +#define HDA_CMD_VERB_GET_PIN_WIDGET_CTRL 0xf07 +#define HDA_CMD_VERB_SET_PIN_WIDGET_CTRL 0x707 + +#define HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_PIN_WIDGET_CTRL, 0x0)) +#define HDA_CMD_SET_PIN_WIDGET_CTRL(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_PIN_WIDGET_CTRL, \ + (payload))) + +#define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK 0x00000080 +#define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT 7 +#define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK 0x00000040 +#define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT 6 +#define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK 0x00000020 +#define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT 5 +#define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK 0x00000007 +#define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT 0 + +#define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE(rsp) \ + (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK) >> \ + HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT) +#define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE(rsp) \ + (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK) >> \ + HDA_GET_CMD_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT) +#define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE(rsp) \ + (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK) >> \ + HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT) +#define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE(rsp) \ + (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) >> \ + HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT) + +#define HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE 0x80 +#define HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE 0x40 +#define HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE 0x20 +#define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK 0x07 +#define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT 0 + +#define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(param) \ + (((param) << HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT) & \ + HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) + +#define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_HIZ 0 +#define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50 1 +#define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_GROUND 2 +#define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80 4 +#define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100 5 /* Unsolicited Response */ -#define HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE 0xf08 -#define HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE 0x708 - -#define HDA_CMD_GET_UNSOLICITED_RESPONSE(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE, 0x0)) -#define HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE, (payload))) - -#define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK 0x00000080 -#define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT 7 -#define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK 0x0000001f -#define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT 0 - -#define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE(rsp) \ - (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK) >> \ - HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT) -#define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG(rsp) \ - (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK) >> \ - HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT) - -#define HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE 0x80 -#define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK 0x3f -#define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT 0 - -#define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG(param) \ - (((param) << HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT) & \ - HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK) +#define HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE 0xf08 +#define HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE 0x708 + +#define HDA_CMD_GET_UNSOLICITED_RESPONSE(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE, \ + 0x0)) +#define HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE, \ + (payload))) + +#define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK 0x00000080 +#define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT 7 +#define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK 0x0000001f +#define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT 0 + +#define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE(rsp) \ + (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK) >> \ + HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT) +#define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG(rsp) \ + (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK) >> \ + HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT) + +#define HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE 0x80 +#define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK 0x3f +#define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT 0 + +#define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG(param) \ + (((param) << HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT) & \ + HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK) /* Pin Sense */ -#define HDA_CMD_VERB_GET_PIN_SENSE 0xf09 -#define HDA_CMD_VERB_SET_PIN_SENSE 0x709 +#define HDA_CMD_VERB_GET_PIN_SENSE 0xf09 +#define HDA_CMD_VERB_SET_PIN_SENSE 0x709 -#define HDA_CMD_GET_PIN_SENSE(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_PIN_SENSE, 0x0)) -#define HDA_CMD_SET_PIN_SENSE(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_PIN_SENSE, (payload))) +#define HDA_CMD_GET_PIN_SENSE(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_PIN_SENSE, 0x0)) +#define HDA_CMD_SET_PIN_SENSE(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_PIN_SENSE, (payload))) -#define HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT 0x80000000 -#define HDA_CMD_GET_PIN_SENSE_ELD_VALID 0x40000000 -#define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK 0x7fffffff -#define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT 0 +#define HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT 0x80000000 +#define HDA_CMD_GET_PIN_SENSE_ELD_VALID 0x40000000 +#define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK 0x7fffffff +#define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT 0 -#define HDA_CMD_GET_PIN_SENSE_IMP_SENSE(rsp) \ - (((rsp) & HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK) >> \ - HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT) +#define HDA_CMD_GET_PIN_SENSE_IMP_SENSE(rsp) \ + (((rsp) & HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK) >> \ + HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT) -#define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_INVALID 0x7fffffff +#define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_INVALID 0x7fffffff -#define HDA_CMD_SET_PIN_SENSE_LEFT_CHANNEL 0x00 -#define HDA_CMD_SET_PIN_SENSE_RIGHT_CHANNEL 0x01 +#define HDA_CMD_SET_PIN_SENSE_LEFT_CHANNEL 0x00 +#define HDA_CMD_SET_PIN_SENSE_RIGHT_CHANNEL 0x01 /* EAPD/BTL Enable */ -#define HDA_CMD_VERB_GET_EAPD_BTL_ENABLE 0xf0c -#define HDA_CMD_VERB_SET_EAPD_BTL_ENABLE 0x70c - -#define HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_EAPD_BTL_ENABLE, 0x0)) -#define HDA_CMD_SET_EAPD_BTL_ENABLE(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_EAPD_BTL_ENABLE, (payload))) - -#define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK 0x00000004 -#define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT 2 -#define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK 0x00000002 -#define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT 1 -#define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK 0x00000001 -#define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT 0 - -#define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP(rsp) \ - (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK) >> \ - HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT) -#define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD(rsp) \ - (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK) >> \ - HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT) -#define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL(rsp) \ - (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK) >> \ - HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT) - -#define HDA_CMD_SET_EAPD_BTL_ENABLE_LR_SWAP 0x04 -#define HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD 0x02 -#define HDA_CMD_SET_EAPD_BTL_ENABLE_BTL 0x01 +#define HDA_CMD_VERB_GET_EAPD_BTL_ENABLE 0xf0c +#define HDA_CMD_VERB_SET_EAPD_BTL_ENABLE 0x70c + +#define HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_EAPD_BTL_ENABLE, 0x0)) +#define HDA_CMD_SET_EAPD_BTL_ENABLE(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_EAPD_BTL_ENABLE, \ + (payload))) + +#define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK 0x00000004 +#define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT 2 +#define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK 0x00000002 +#define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT 1 +#define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK 0x00000001 +#define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT 0 + +#define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP(rsp) \ + (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK) >> \ + HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT) +#define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD(rsp) \ + (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK) >> \ + HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT) +#define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL(rsp) \ + (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK) >> \ + HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT) + +#define HDA_CMD_SET_EAPD_BTL_ENABLE_LR_SWAP 0x04 +#define HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD 0x02 +#define HDA_CMD_SET_EAPD_BTL_ENABLE_BTL 0x01 /* GPI Data */ -#define HDA_CMD_VERB_GET_GPI_DATA 0xf10 -#define HDA_CMD_VERB_SET_GPI_DATA 0x710 +#define HDA_CMD_VERB_GET_GPI_DATA 0xf10 +#define HDA_CMD_VERB_SET_GPI_DATA 0x710 -#define HDA_CMD_GET_GPI_DATA(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPI_DATA, 0x0)) -#define HDA_CMD_SET_GPI_DATA(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPI_DATA, (payload))) +#define HDA_CMD_GET_GPI_DATA(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_GPI_DATA, 0x0)) +#define HDA_CMD_SET_GPI_DATA(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_GPI_DATA, (payload))) /* GPI Wake Enable Mask */ -#define HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK 0xf11 -#define HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK 0x711 +#define HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK 0xf11 +#define HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK 0x711 -#define HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK, 0x0)) -#define HDA_CMD_SET_GPI_WAKE_ENABLE_MASK(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK, (payload))) +#define HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK, \ + 0x0)) +#define HDA_CMD_SET_GPI_WAKE_ENABLE_MASK(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK, \ + (payload))) /* GPI Unsolicited Enable Mask */ -#define HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK 0xf12 -#define HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK 0x712 +#define HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK 0xf12 +#define HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK 0x712 -#define HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK, 0x0)) -#define HDA_CMD_SET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK, (payload))) +#define HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), \ + HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK, 0x0)) +#define HDA_CMD_SET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), \ + HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK, (payload))) /* GPI Sticky Mask */ -#define HDA_CMD_VERB_GET_GPI_STICKY_MASK 0xf13 -#define HDA_CMD_VERB_SET_GPI_STICKY_MASK 0x713 +#define HDA_CMD_VERB_GET_GPI_STICKY_MASK 0xf13 +#define HDA_CMD_VERB_SET_GPI_STICKY_MASK 0x713 -#define HDA_CMD_GET_GPI_STICKY_MASK(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPI_STICKY_MASK, 0x0)) -#define HDA_CMD_SET_GPI_STICKY_MASK(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPI_STICKY_MASK, (payload))) +#define HDA_CMD_GET_GPI_STICKY_MASK(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_GPI_STICKY_MASK, 0x0)) +#define HDA_CMD_SET_GPI_STICKY_MASK(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_GPI_STICKY_MASK, \ + (payload))) /* GPO Data */ -#define HDA_CMD_VERB_GET_GPO_DATA 0xf14 -#define HDA_CMD_VERB_SET_GPO_DATA 0x714 +#define HDA_CMD_VERB_GET_GPO_DATA 0xf14 +#define HDA_CMD_VERB_SET_GPO_DATA 0x714 -#define HDA_CMD_GET_GPO_DATA(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPO_DATA, 0x0)) -#define HDA_CMD_SET_GPO_DATA(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPO_DATA, (payload))) +#define HDA_CMD_GET_GPO_DATA(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_GPO_DATA, 0x0)) +#define HDA_CMD_SET_GPO_DATA(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_GPO_DATA, (payload))) /* GPIO Data */ -#define HDA_CMD_VERB_GET_GPIO_DATA 0xf15 -#define HDA_CMD_VERB_SET_GPIO_DATA 0x715 +#define HDA_CMD_VERB_GET_GPIO_DATA 0xf15 +#define HDA_CMD_VERB_SET_GPIO_DATA 0x715 -#define HDA_CMD_GET_GPIO_DATA(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPIO_DATA, 0x0)) -#define HDA_CMD_SET_GPIO_DATA(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPIO_DATA, (payload))) +#define HDA_CMD_GET_GPIO_DATA(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_GPIO_DATA, 0x0)) +#define HDA_CMD_SET_GPIO_DATA(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_GPIO_DATA, (payload))) /* GPIO Enable Mask */ -#define HDA_CMD_VERB_GET_GPIO_ENABLE_MASK 0xf16 -#define HDA_CMD_VERB_SET_GPIO_ENABLE_MASK 0x716 +#define HDA_CMD_VERB_GET_GPIO_ENABLE_MASK 0xf16 +#define HDA_CMD_VERB_SET_GPIO_ENABLE_MASK 0x716 -#define HDA_CMD_GET_GPIO_ENABLE_MASK(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPIO_ENABLE_MASK, 0x0)) -#define HDA_CMD_SET_GPIO_ENABLE_MASK(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPIO_ENABLE_MASK, (payload))) +#define HDA_CMD_GET_GPIO_ENABLE_MASK(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_GPIO_ENABLE_MASK, 0x0)) +#define HDA_CMD_SET_GPIO_ENABLE_MASK(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_GPIO_ENABLE_MASK, \ + (payload))) /* GPIO Direction */ -#define HDA_CMD_VERB_GET_GPIO_DIRECTION 0xf17 -#define HDA_CMD_VERB_SET_GPIO_DIRECTION 0x717 +#define HDA_CMD_VERB_GET_GPIO_DIRECTION 0xf17 +#define HDA_CMD_VERB_SET_GPIO_DIRECTION 0x717 -#define HDA_CMD_GET_GPIO_DIRECTION(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPIO_DIRECTION, 0x0)) -#define HDA_CMD_SET_GPIO_DIRECTION(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPIO_DIRECTION, (payload))) +#define HDA_CMD_GET_GPIO_DIRECTION(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_GPIO_DIRECTION, 0x0)) +#define HDA_CMD_SET_GPIO_DIRECTION(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_GPIO_DIRECTION, \ + (payload))) /* GPIO Wake Enable Mask */ -#define HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK 0xf18 -#define HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK 0x718 +#define HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK 0xf18 +#define HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK 0x718 -#define HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK, 0x0)) -#define HDA_CMD_SET_GPIO_WAKE_ENABLE_MASK(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK, (payload))) +#define HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK, \ + 0x0)) +#define HDA_CMD_SET_GPIO_WAKE_ENABLE_MASK(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK, \ + (payload))) /* GPIO Unsolicited Enable Mask */ -#define HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK 0xf19 -#define HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK 0x719 +#define HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK 0xf19 +#define HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK 0x719 -#define HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK, 0x0)) -#define HDA_CMD_SET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK, (payload))) +#define HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), \ + HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK, 0x0)) +#define HDA_CMD_SET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), \ + HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK, (payload))) /* GPIO_STICKY_MASK */ -#define HDA_CMD_VERB_GET_GPIO_STICKY_MASK 0xf1a -#define HDA_CMD_VERB_SET_GPIO_STICKY_MASK 0x71a +#define HDA_CMD_VERB_GET_GPIO_STICKY_MASK 0xf1a +#define HDA_CMD_VERB_SET_GPIO_STICKY_MASK 0x71a -#define HDA_CMD_GET_GPIO_STICKY_MASK(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_GPIO_STICKY_MASK, 0x0)) -#define HDA_CMD_SET_GPIO_STICKY_MASK(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_GPIO_STICKY_MASK, (payload))) +#define HDA_CMD_GET_GPIO_STICKY_MASK(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_GPIO_STICKY_MASK, 0x0)) +#define HDA_CMD_SET_GPIO_STICKY_MASK(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_GPIO_STICKY_MASK, \ + (payload))) /* Beep Generation */ -#define HDA_CMD_VERB_GET_BEEP_GENERATION 0xf0a -#define HDA_CMD_VERB_SET_BEEP_GENERATION 0x70a +#define HDA_CMD_VERB_GET_BEEP_GENERATION 0xf0a +#define HDA_CMD_VERB_SET_BEEP_GENERATION 0x70a -#define HDA_CMD_GET_BEEP_GENERATION(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_BEEP_GENERATION, 0x0)) -#define HDA_CMD_SET_BEEP_GENERATION(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_BEEP_GENERATION, (payload))) +#define HDA_CMD_GET_BEEP_GENERATION(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_BEEP_GENERATION, 0x0)) +#define HDA_CMD_SET_BEEP_GENERATION(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_BEEP_GENERATION, \ + (payload))) /* Volume Knob */ -#define HDA_CMD_VERB_GET_VOLUME_KNOB 0xf0f -#define HDA_CMD_VERB_SET_VOLUME_KNOB 0x70f +#define HDA_CMD_VERB_GET_VOLUME_KNOB 0xf0f +#define HDA_CMD_VERB_SET_VOLUME_KNOB 0x70f -#define HDA_CMD_GET_VOLUME_KNOB(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_VOLUME_KNOB, 0x0)) -#define HDA_CMD_SET_VOLUME_KNOB(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_VOLUME_KNOB, (payload))) +#define HDA_CMD_GET_VOLUME_KNOB(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_VOLUME_KNOB, 0x0)) +#define HDA_CMD_SET_VOLUME_KNOB(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_VOLUME_KNOB, (payload))) /* Subsystem ID */ -#define HDA_CMD_VERB_GET_SUBSYSTEM_ID 0xf20 -#define HDA_CMD_VERB_SET_SUSBYSTEM_ID1 0x720 -#define HDA_CMD_VERB_SET_SUBSYSTEM_ID2 0x721 -#define HDA_CMD_VERB_SET_SUBSYSTEM_ID3 0x722 -#define HDA_CMD_VERB_SET_SUBSYSTEM_ID4 0x723 - -#define HDA_CMD_GET_SUBSYSTEM_ID(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_SUBSYSTEM_ID, 0x0)) -#define HDA_CMD_SET_SUBSYSTEM_ID1(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_SUSBYSTEM_ID1, (payload))) -#define HDA_CMD_SET_SUBSYSTEM_ID2(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_SUSBYSTEM_ID2, (payload))) -#define HDA_CMD_SET_SUBSYSTEM_ID3(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_SUSBYSTEM_ID3, (payload))) -#define HDA_CMD_SET_SUBSYSTEM_ID4(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_SUSBYSTEM_ID4, (payload))) +#define HDA_CMD_VERB_GET_SUBSYSTEM_ID 0xf20 +#define HDA_CMD_VERB_SET_SUSBYSTEM_ID1 0x720 +#define HDA_CMD_VERB_SET_SUBSYSTEM_ID2 0x721 +#define HDA_CMD_VERB_SET_SUBSYSTEM_ID3 0x722 +#define HDA_CMD_VERB_SET_SUBSYSTEM_ID4 0x723 + +#define HDA_CMD_GET_SUBSYSTEM_ID(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_SUBSYSTEM_ID, 0x0)) +#define HDA_CMD_SET_SUBSYSTEM_ID1(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_SUSBYSTEM_ID1, (payload))) +#define HDA_CMD_SET_SUBSYSTEM_ID2(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_SUSBYSTEM_ID2, (payload))) +#define HDA_CMD_SET_SUBSYSTEM_ID3(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_SUSBYSTEM_ID3, (payload))) +#define HDA_CMD_SET_SUBSYSTEM_ID4(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_SUSBYSTEM_ID4, (payload))) /* Configuration Default */ -#define HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT 0xf1c -#define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1 0x71c -#define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2 0x71d -#define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3 0x71e -#define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4 0x71f - -#define HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT, 0x0)) -#define HDA_CMD_SET_CONFIGURATION_DEFAULT1(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1, (payload))) -#define HDA_CMD_SET_CONFIGURATION_DEFAULT2(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2, (payload))) -#define HDA_CMD_SET_CONFIGURATION_DEFAULT3(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3, (payload))) -#define HDA_CMD_SET_CONFIGURATION_DEFAULT4(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4, (payload))) +#define HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT 0xf1c +#define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1 0x71c +#define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2 0x71d +#define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3 0x71e +#define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4 0x71f + +#define HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT, \ + 0x0)) +#define HDA_CMD_SET_CONFIGURATION_DEFAULT1(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1, \ + (payload))) +#define HDA_CMD_SET_CONFIGURATION_DEFAULT2(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2, \ + (payload))) +#define HDA_CMD_SET_CONFIGURATION_DEFAULT3(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3, \ + (payload))) +#define HDA_CMD_SET_CONFIGURATION_DEFAULT4(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4, \ + (payload))) /* Stripe Control */ -#define HDA_CMD_VERB_GET_STRIPE_CONTROL 0xf24 -#define HDA_CMD_VERB_SET_STRIPE_CONTROL 0x724 +#define HDA_CMD_VERB_GET_STRIPE_CONTROL 0xf24 +#define HDA_CMD_VERB_SET_STRIPE_CONTROL 0x724 -#define HDA_CMD_GET_STRIPE_CONTROL(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_STRIPE_CONTROL, 0x0)) -#define HDA_CMD_SET_STRIPE_CONTROL(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_STRIPE_CONTROL, (payload))) +#define HDA_CMD_GET_STRIPE_CONTROL(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_STRIPE_CONTROL, 0x0)) +#define HDA_CMD_SET_STRIPE_CONTROL(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_STRIPE_CONTROL, \ + (payload))) /* Channel Count Control */ -#define HDA_CMD_VERB_GET_CONV_CHAN_COUNT 0xf2d -#define HDA_CMD_VERB_SET_CONV_CHAN_COUNT 0x72d - -#define HDA_CMD_GET_CONV_CHAN_COUNT(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_CONV_CHAN_COUNT, 0x0)) -#define HDA_CMD_SET_CONV_CHAN_COUNT(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_CONV_CHAN_COUNT, (payload))) - -#define HDA_CMD_VERB_GET_HDMI_DIP_SIZE 0xf2e - -#define HDA_CMD_GET_HDMI_DIP_SIZE(cad, nid, arg) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_HDMI_DIP_SIZE, (arg))) - -#define HDA_CMD_VERB_GET_HDMI_ELDD 0xf2f - -#define HDA_CMD_GET_HDMI_ELDD(cad, nid, off) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_HDMI_ELDD, (off))) - -#define HDA_CMD_VERB_GET_HDMI_DIP_INDEX 0xf30 -#define HDA_CMD_VERB_SET_HDMI_DIP_INDEX 0x730 - -#define HDA_CMD_GET_HDMI_DIP_INDEX(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_HDMI_DIP_INDEX, 0x0)) -#define HDA_CMD_SET_HDMI_DIP_INDEX(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_HDMI_DIP_INDEX, (payload))) - -#define HDA_CMD_VERB_GET_HDMI_DIP_DATA 0xf31 -#define HDA_CMD_VERB_SET_HDMI_DIP_DATA 0x731 - -#define HDA_CMD_GET_HDMI_DIP_DATA(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_HDMI_DIP_DATA, 0x0)) -#define HDA_CMD_SET_HDMI_DIP_DATA(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_HDMI_DIP_DATA, (payload))) - -#define HDA_CMD_VERB_GET_HDMI_DIP_XMIT 0xf32 -#define HDA_CMD_VERB_SET_HDMI_DIP_XMIT 0x732 - -#define HDA_CMD_GET_HDMI_DIP_XMIT(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_HDMI_DIP_XMIT, 0x0)) -#define HDA_CMD_SET_HDMI_DIP_XMIT(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_HDMI_DIP_XMIT, (payload))) - -#define HDA_CMD_VERB_GET_HDMI_CP_CTRL 0xf33 -#define HDA_CMD_VERB_SET_HDMI_CP_CTRL 0x733 - -#define HDA_CMD_VERB_GET_HDMI_CHAN_SLOT 0xf34 -#define HDA_CMD_VERB_SET_HDMI_CHAN_SLOT 0x734 - -#define HDA_CMD_GET_HDMI_CHAN_SLOT(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_GET_HDMI_CHAN_SLOT, 0x0)) -#define HDA_CMD_SET_HDMI_CHAN_SLOT(cad, nid, payload) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_SET_HDMI_CHAN_SLOT, (payload))) - -#define HDA_HDMI_CODING_TYPE_REF_STREAM_HEADER 0 -#define HDA_HDMI_CODING_TYPE_LPCM 1 -#define HDA_HDMI_CODING_TYPE_AC3 2 -#define HDA_HDMI_CODING_TYPE_MPEG1 3 -#define HDA_HDMI_CODING_TYPE_MP3 4 -#define HDA_HDMI_CODING_TYPE_MPEG2 5 -#define HDA_HDMI_CODING_TYPE_AACLC 6 -#define HDA_HDMI_CODING_TYPE_DTS 7 -#define HDA_HDMI_CODING_TYPE_ATRAC 8 -#define HDA_HDMI_CODING_TYPE_SACD 9 -#define HDA_HDMI_CODING_TYPE_EAC3 10 -#define HDA_HDMI_CODING_TYPE_DTS_HD 11 -#define HDA_HDMI_CODING_TYPE_MLP 12 -#define HDA_HDMI_CODING_TYPE_DST 13 -#define HDA_HDMI_CODING_TYPE_WMAPRO 14 -#define HDA_HDMI_CODING_TYPE_REF_CTX 15 +#define HDA_CMD_VERB_GET_CONV_CHAN_COUNT 0xf2d +#define HDA_CMD_VERB_SET_CONV_CHAN_COUNT 0x72d + +#define HDA_CMD_GET_CONV_CHAN_COUNT(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_CONV_CHAN_COUNT, 0x0)) +#define HDA_CMD_SET_CONV_CHAN_COUNT(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_CONV_CHAN_COUNT, \ + (payload))) + +#define HDA_CMD_VERB_GET_HDMI_DIP_SIZE 0xf2e + +#define HDA_CMD_GET_HDMI_DIP_SIZE(cad, nid, arg) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_HDMI_DIP_SIZE, (arg))) + +#define HDA_CMD_VERB_GET_HDMI_ELDD 0xf2f + +#define HDA_CMD_GET_HDMI_ELDD(cad, nid, off) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_HDMI_ELDD, (off))) + +#define HDA_CMD_VERB_GET_HDMI_DIP_INDEX 0xf30 +#define HDA_CMD_VERB_SET_HDMI_DIP_INDEX 0x730 + +#define HDA_CMD_GET_HDMI_DIP_INDEX(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_HDMI_DIP_INDEX, 0x0)) +#define HDA_CMD_SET_HDMI_DIP_INDEX(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_HDMI_DIP_INDEX, \ + (payload))) + +#define HDA_CMD_VERB_GET_HDMI_DIP_DATA 0xf31 +#define HDA_CMD_VERB_SET_HDMI_DIP_DATA 0x731 + +#define HDA_CMD_GET_HDMI_DIP_DATA(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_HDMI_DIP_DATA, 0x0)) +#define HDA_CMD_SET_HDMI_DIP_DATA(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_HDMI_DIP_DATA, (payload))) + +#define HDA_CMD_VERB_GET_HDMI_DIP_XMIT 0xf32 +#define HDA_CMD_VERB_SET_HDMI_DIP_XMIT 0x732 + +#define HDA_CMD_GET_HDMI_DIP_XMIT(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_HDMI_DIP_XMIT, 0x0)) +#define HDA_CMD_SET_HDMI_DIP_XMIT(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_HDMI_DIP_XMIT, (payload))) + +#define HDA_CMD_VERB_GET_HDMI_CP_CTRL 0xf33 +#define HDA_CMD_VERB_SET_HDMI_CP_CTRL 0x733 + +#define HDA_CMD_VERB_GET_HDMI_CHAN_SLOT 0xf34 +#define HDA_CMD_VERB_SET_HDMI_CHAN_SLOT 0x734 + +#define HDA_CMD_GET_HDMI_CHAN_SLOT(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_GET_HDMI_CHAN_SLOT, 0x0)) +#define HDA_CMD_SET_HDMI_CHAN_SLOT(cad, nid, payload) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_SET_HDMI_CHAN_SLOT, \ + (payload))) + +#define HDA_HDMI_CODING_TYPE_REF_STREAM_HEADER 0 +#define HDA_HDMI_CODING_TYPE_LPCM 1 +#define HDA_HDMI_CODING_TYPE_AC3 2 +#define HDA_HDMI_CODING_TYPE_MPEG1 3 +#define HDA_HDMI_CODING_TYPE_MP3 4 +#define HDA_HDMI_CODING_TYPE_MPEG2 5 +#define HDA_HDMI_CODING_TYPE_AACLC 6 +#define HDA_HDMI_CODING_TYPE_DTS 7 +#define HDA_HDMI_CODING_TYPE_ATRAC 8 +#define HDA_HDMI_CODING_TYPE_SACD 9 +#define HDA_HDMI_CODING_TYPE_EAC3 10 +#define HDA_HDMI_CODING_TYPE_DTS_HD 11 +#define HDA_HDMI_CODING_TYPE_MLP 12 +#define HDA_HDMI_CODING_TYPE_DST 13 +#define HDA_HDMI_CODING_TYPE_WMAPRO 14 +#define HDA_HDMI_CODING_TYPE_REF_CTX 15 /* Function Reset */ -#define HDA_CMD_VERB_FUNCTION_RESET 0x7ff +#define HDA_CMD_VERB_FUNCTION_RESET 0x7ff -#define HDA_CMD_FUNCTION_RESET(cad, nid) \ - (HDA_CMD_12BIT((cad), (nid), \ - HDA_CMD_VERB_FUNCTION_RESET, 0x0)) +#define HDA_CMD_FUNCTION_RESET(cad, nid) \ + (HDA_CMD_12BIT((cad), (nid), HDA_CMD_VERB_FUNCTION_RESET, 0x0)) /**************************************************************************** * HDA Device Parameters ****************************************************************************/ /* Vendor ID */ -#define HDA_PARAM_VENDOR_ID 0x00 +#define HDA_PARAM_VENDOR_ID 0x00 -#define HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK 0xffff0000 -#define HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT 16 -#define HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK 0x0000ffff -#define HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT 0 +#define HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK 0xffff0000 +#define HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT 16 +#define HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK 0x0000ffff +#define HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT 0 -#define HDA_PARAM_VENDOR_ID_VENDOR_ID(param) \ - (((param) & HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK) >> \ - HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT) -#define HDA_PARAM_VENDOR_ID_DEVICE_ID(param) \ - (((param) & HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK) >> \ - HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT) +#define HDA_PARAM_VENDOR_ID_VENDOR_ID(param) \ + (((param) & HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK) >> \ + HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT) +#define HDA_PARAM_VENDOR_ID_DEVICE_ID(param) \ + (((param) & HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK) >> \ + HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT) /* Revision ID */ -#define HDA_PARAM_REVISION_ID 0x02 - -#define HDA_PARAM_REVISION_ID_MAJREV_MASK 0x00f00000 -#define HDA_PARAM_REVISION_ID_MAJREV_SHIFT 20 -#define HDA_PARAM_REVISION_ID_MINREV_MASK 0x000f0000 -#define HDA_PARAM_REVISION_ID_MINREV_SHIFT 16 -#define HDA_PARAM_REVISION_ID_REVISION_ID_MASK 0x0000ff00 -#define HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT 8 -#define HDA_PARAM_REVISION_ID_STEPPING_ID_MASK 0x000000ff -#define HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT 0 - -#define HDA_PARAM_REVISION_ID_MAJREV(param) \ - (((param) & HDA_PARAM_REVISION_ID_MAJREV_MASK) >> \ - HDA_PARAM_REVISION_ID_MAJREV_SHIFT) -#define HDA_PARAM_REVISION_ID_MINREV(param) \ - (((param) & HDA_PARAM_REVISION_ID_MINREV_MASK) >> \ - HDA_PARAM_REVISION_ID_MINREV_SHIFT) -#define HDA_PARAM_REVISION_ID_REVISION_ID(param) \ - (((param) & HDA_PARAM_REVISION_ID_REVISION_ID_MASK) >> \ - HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT) -#define HDA_PARAM_REVISION_ID_STEPPING_ID(param) \ - (((param) & HDA_PARAM_REVISION_ID_STEPPING_ID_MASK) >> \ - HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT) +#define HDA_PARAM_REVISION_ID 0x02 + +#define HDA_PARAM_REVISION_ID_MAJREV_MASK 0x00f00000 +#define HDA_PARAM_REVISION_ID_MAJREV_SHIFT 20 +#define HDA_PARAM_REVISION_ID_MINREV_MASK 0x000f0000 +#define HDA_PARAM_REVISION_ID_MINREV_SHIFT 16 +#define HDA_PARAM_REVISION_ID_REVISION_ID_MASK 0x0000ff00 +#define HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT 8 +#define HDA_PARAM_REVISION_ID_STEPPING_ID_MASK 0x000000ff +#define HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT 0 + +#define HDA_PARAM_REVISION_ID_MAJREV(param) \ + (((param) & HDA_PARAM_REVISION_ID_MAJREV_MASK) >> \ + HDA_PARAM_REVISION_ID_MAJREV_SHIFT) +#define HDA_PARAM_REVISION_ID_MINREV(param) \ + (((param) & HDA_PARAM_REVISION_ID_MINREV_MASK) >> \ + HDA_PARAM_REVISION_ID_MINREV_SHIFT) +#define HDA_PARAM_REVISION_ID_REVISION_ID(param) \ + (((param) & HDA_PARAM_REVISION_ID_REVISION_ID_MASK) >> \ + HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT) +#define HDA_PARAM_REVISION_ID_STEPPING_ID(param) \ + (((param) & HDA_PARAM_REVISION_ID_STEPPING_ID_MASK) >> \ + HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT) /* Subordinate Node Cound */ -#define HDA_PARAM_SUB_NODE_COUNT 0x04 +#define HDA_PARAM_SUB_NODE_COUNT 0x04 -#define HDA_PARAM_SUB_NODE_COUNT_START_MASK 0x00ff0000 -#define HDA_PARAM_SUB_NODE_COUNT_START_SHIFT 16 -#define HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK 0x000000ff -#define HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT 0 +#define HDA_PARAM_SUB_NODE_COUNT_START_MASK 0x00ff0000 +#define HDA_PARAM_SUB_NODE_COUNT_START_SHIFT 16 +#define HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK 0x000000ff +#define HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT 0 -#define HDA_PARAM_SUB_NODE_COUNT_START(param) \ - (((param) & HDA_PARAM_SUB_NODE_COUNT_START_MASK) >> \ - HDA_PARAM_SUB_NODE_COUNT_START_SHIFT) -#define HDA_PARAM_SUB_NODE_COUNT_TOTAL(param) \ - (((param) & HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK) >> \ - HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT) +#define HDA_PARAM_SUB_NODE_COUNT_START(param) \ + (((param) & HDA_PARAM_SUB_NODE_COUNT_START_MASK) >> \ + HDA_PARAM_SUB_NODE_COUNT_START_SHIFT) +#define HDA_PARAM_SUB_NODE_COUNT_TOTAL(param) \ + (((param) & HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK) >> \ + HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT) /* Function Group Type */ -#define HDA_PARAM_FCT_GRP_TYPE 0x05 +#define HDA_PARAM_FCT_GRP_TYPE 0x05 -#define HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK 0x00000100 -#define HDA_PARAM_FCT_GRP_TYPE_UNSOL_SHIFT 8 -#define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK 0x000000ff -#define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT 0 +#define HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK 0x00000100 +#define HDA_PARAM_FCT_GRP_TYPE_UNSOL_SHIFT 8 +#define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK 0x000000ff +#define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT 0 -#define HDA_PARAM_FCT_GRP_TYPE_UNSOL(param) \ - (((param) & HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK) >> \ - HDA_PARAM_FCT_GROUP_TYPE_UNSOL_SHIFT) -#define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(param) \ - (((param) & HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK) >> \ - HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT) +#define HDA_PARAM_FCT_GRP_TYPE_UNSOL(param) \ + (((param) & HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK) >> \ + HDA_PARAM_FCT_GROUP_TYPE_UNSOL_SHIFT) +#define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(param) \ + (((param) & HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK) >> \ + HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT) -#define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO 0x01 -#define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM 0x02 +#define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO 0x01 +#define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM 0x02 /* Audio Function Group Capabilities */ -#define HDA_PARAM_AUDIO_FCT_GRP_CAP 0x08 - -#define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK 0x00010000 -#define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT 16 -#define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK 0x00000f00 -#define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT 8 -#define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK 0x0000000f -#define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT 0 - -#define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN(param) \ - (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK) >> \ - HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT) -#define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY(param) \ - (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK) >> \ - HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT) -#define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY(param) \ - (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK) >> \ - HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT) +#define HDA_PARAM_AUDIO_FCT_GRP_CAP 0x08 + +#define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK 0x00010000 +#define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT 16 +#define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK 0x00000f00 +#define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT 8 +#define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK 0x0000000f +#define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT 0 + +#define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN(param) \ + (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK) >> \ + HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT) +#define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY(param) \ + (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK) >> \ + HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT) +#define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY(param) \ + (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK) >> \ + HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT) /* Audio Widget Capabilities */ -#define HDA_PARAM_AUDIO_WIDGET_CAP 0x09 - -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK 0x00f00000 -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT 20 -#define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK 0x000f0000 -#define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT 16 -#define HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK 0x0000e000 -#define HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT 13 -#define HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK 0x00001000 -#define HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT 12 -#define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK 0x00000800 -#define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT 11 -#define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK 0x00000400 -#define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT 10 -#define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK 0x00000200 -#define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT 9 -#define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK 0x00000100 -#define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT 8 -#define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK 0x00000080 -#define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT 7 -#define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK 0x00000040 -#define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT 6 -#define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK 0x00000020 -#define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT 5 -#define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK 0x00000010 -#define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT 4 -#define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK 0x00000008 -#define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT 3 -#define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK 0x00000004 -#define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT 2 -#define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK 0x00000002 -#define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT 1 -#define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK 0x00000001 -#define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT 0 - -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_CC(param) \ - ((((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK) >> \ - (HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT - 1)) | \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT)) -#define HDA_PARAM_AUDIO_WIDGET_CAP_CP(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT) -#define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(param) \ - (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >> \ - HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT) - -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT 0x0 -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT 0x1 -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER 0x2 -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR 0x3 -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX 0x4 -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET 0x5 -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET 0x6 -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET 0x7 -#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET 0xf +#define HDA_PARAM_AUDIO_WIDGET_CAP 0x09 + +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK 0x00f00000 +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT 20 +#define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK 0x000f0000 +#define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT 16 +#define HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK 0x0000e000 +#define HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT 13 +#define HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK 0x00001000 +#define HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT 12 +#define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK 0x00000800 +#define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT 11 +#define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK 0x00000400 +#define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT 10 +#define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK 0x00000200 +#define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT 9 +#define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK 0x00000100 +#define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT 8 +#define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK 0x00000080 +#define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT 7 +#define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK 0x00000040 +#define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT 6 +#define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK 0x00000020 +#define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT 5 +#define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK 0x00000010 +#define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT 4 +#define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK 0x00000008 +#define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT 3 +#define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK 0x00000004 +#define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT 2 +#define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK 0x00000002 +#define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT 1 +#define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK 0x00000001 +#define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT 0 + +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_CC(param) \ + ((((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK) >> \ + (HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT - 1)) | \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT)) +#define HDA_PARAM_AUDIO_WIDGET_CAP_CP(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT) +#define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(param) \ + (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >> \ + HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT) + +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT 0x0 +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT 0x1 +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER 0x2 +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR 0x3 +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX 0x4 +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET 0x5 +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET 0x6 +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET 0x7 +#define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET 0xf /* Supported PCM Size, Rates */ -#define HDA_PARAM_SUPP_PCM_SIZE_RATE 0x0a - -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK 0x00100000 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT 20 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK 0x00080000 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT 19 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK 0x00040000 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT 18 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK 0x00020000 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT 17 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK 0x00010000 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT 16 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK 0x00000001 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT 0 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK 0x00000002 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT 1 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK 0x00000004 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT 2 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK 0x00000008 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT 3 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK 0x00000010 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT 4 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK 0x00000020 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT 5 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK 0x00000040 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT 6 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK 0x00000080 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT 7 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK 0x00000100 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT 8 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK 0x00000200 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT 9 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK 0x00000400 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT 10 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK 0x00000800 -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT 11 - -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT) -#define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(param) \ - (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK) >> \ - HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE 0x0a + +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK 0x00100000 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT 20 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK 0x00080000 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT 19 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK 0x00040000 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT 18 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK 0x00020000 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT 17 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK 0x00010000 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT 16 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK 0x00000001 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT 0 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK 0x00000002 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT 1 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK 0x00000004 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT 2 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK 0x00000008 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT 3 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK 0x00000010 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT 4 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK 0x00000020 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT 5 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK 0x00000040 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT 6 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK 0x00000080 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT 7 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK 0x00000100 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT 8 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK 0x00000200 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT 9 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK 0x00000400 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT 10 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK 0x00000800 +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT 11 + +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT) +#define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(param) \ + (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK) >> \ + HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT) /* Supported Stream Formats */ -#define HDA_PARAM_SUPP_STREAM_FORMATS 0x0b - -#define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK 0x00000004 -#define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT 2 -#define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK 0x00000002 -#define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT 1 -#define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK 0x00000001 -#define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT 0 - -#define HDA_PARAM_SUPP_STREAM_FORMATS_AC3(param) \ - (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK) >> \ - HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT) -#define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(param) \ - (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK) >> \ - HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT) -#define HDA_PARAM_SUPP_STREAM_FORMATS_PCM(param) \ - (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK) >> \ - HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT) +#define HDA_PARAM_SUPP_STREAM_FORMATS 0x0b + +#define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK 0x00000004 +#define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT 2 +#define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK 0x00000002 +#define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT 1 +#define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK 0x00000001 +#define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT 0 + +#define HDA_PARAM_SUPP_STREAM_FORMATS_AC3(param) \ + (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK) >> \ + HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT) +#define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(param) \ + (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK) >> \ + HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT) +#define HDA_PARAM_SUPP_STREAM_FORMATS_PCM(param) \ + (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK) >> \ + HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT) /* Pin Capabilities */ -#define HDA_PARAM_PIN_CAP 0x0c - -#define HDA_PARAM_PIN_CAP_HBR_MASK 0x08000000 -#define HDA_PARAM_PIN_CAP_HBR_SHIFT 27 -#define HDA_PARAM_PIN_CAP_DP_MASK 0x01000000 -#define HDA_PARAM_PIN_CAP_DP_SHIFT 24 -#define HDA_PARAM_PIN_CAP_EAPD_CAP_MASK 0x00010000 -#define HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT 16 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_MASK 0x0000ff00 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT 8 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK 0x00002000 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT 13 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK 0x00001000 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT 12 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK 0x00000400 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT 10 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK 0x00000200 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT 9 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK 0x00000100 -#define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT 8 -#define HDA_PARAM_PIN_CAP_HDMI_MASK 0x00000080 -#define HDA_PARAM_PIN_CAP_HDMI_SHIFT 7 -#define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK 0x00000040 -#define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT 6 -#define HDA_PARAM_PIN_CAP_INPUT_CAP_MASK 0x00000020 -#define HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT 5 -#define HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK 0x00000010 -#define HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT 4 -#define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK 0x00000008 -#define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT 3 -#define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK 0x00000004 -#define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT 2 -#define HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK 0x00000002 -#define HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT 1 -#define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK 0x00000001 -#define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT 0 - -#define HDA_PARAM_PIN_CAP_HBR(param) \ - (((param) & HDA_PARAM_PIN_CAP_HBR_MASK) >> \ - HDA_PARAM_PIN_CAP_HBR_SHIFT) -#define HDA_PARAM_PIN_CAP_DP(param) \ - (((param) & HDA_PARAM_PIN_CAP_DP_MASK) >> \ - HDA_PARAM_PIN_CAP_DP_SHIFT) -#define HDA_PARAM_PIN_CAP_EAPD_CAP(param) \ - (((param) & HDA_PARAM_PIN_CAP_EAPD_CAP_MASK) >> \ - HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT) -#define HDA_PARAM_PIN_CAP_VREF_CTRL(param) \ - (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_MASK) >> \ - HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT) -#define HDA_PARAM_PIN_CAP_VREF_CTRL_100(param) \ - (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK) >> \ - HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT) -#define HDA_PARAM_PIN_CAP_VREF_CTRL_80(param) \ - (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK) >> \ - HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT) -#define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(param) \ - (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK) >> \ - HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT) -#define HDA_PARAM_PIN_CAP_VREF_CTRL_50(param) \ - (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK) >> \ - HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT) -#define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(param) \ - (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK) >> \ - HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT) -#define HDA_PARAM_PIN_CAP_HDMI(param) \ - (((param) & HDA_PARAM_PIN_CAP_HDMI_MASK) >> \ - HDA_PARAM_PIN_CAP_HDMI_SHIFT) -#define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(param) \ - (((param) & HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK) >> \ - HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT) -#define HDA_PARAM_PIN_CAP_INPUT_CAP(param) \ - (((param) & HDA_PARAM_PIN_CAP_INPUT_CAP_MASK) >> \ - HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT) -#define HDA_PARAM_PIN_CAP_OUTPUT_CAP(param) \ - (((param) & HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK) >> \ - HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT) -#define HDA_PARAM_PIN_CAP_HEADPHONE_CAP(param) \ - (((param) & HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK) >> \ - HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT) -#define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(param) \ - (((param) & HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK) >> \ - HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT) -#define HDA_PARAM_PIN_CAP_TRIGGER_REQD(param) \ - (((param) & HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK) >> \ - HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT) -#define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(param) \ - (((param) & HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK) >> \ - HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT) +#define HDA_PARAM_PIN_CAP 0x0c + +#define HDA_PARAM_PIN_CAP_HBR_MASK 0x08000000 +#define HDA_PARAM_PIN_CAP_HBR_SHIFT 27 +#define HDA_PARAM_PIN_CAP_DP_MASK 0x01000000 +#define HDA_PARAM_PIN_CAP_DP_SHIFT 24 +#define HDA_PARAM_PIN_CAP_EAPD_CAP_MASK 0x00010000 +#define HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT 16 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_MASK 0x0000ff00 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT 8 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK 0x00002000 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT 13 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK 0x00001000 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT 12 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK 0x00000400 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT 10 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK 0x00000200 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT 9 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK 0x00000100 +#define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT 8 +#define HDA_PARAM_PIN_CAP_HDMI_MASK 0x00000080 +#define HDA_PARAM_PIN_CAP_HDMI_SHIFT 7 +#define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK 0x00000040 +#define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT 6 +#define HDA_PARAM_PIN_CAP_INPUT_CAP_MASK 0x00000020 +#define HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT 5 +#define HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK 0x00000010 +#define HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT 4 +#define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK 0x00000008 +#define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT 3 +#define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK 0x00000004 +#define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT 2 +#define HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK 0x00000002 +#define HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT 1 +#define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK 0x00000001 +#define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT 0 + +#define HDA_PARAM_PIN_CAP_HBR(param) \ + (((param) & HDA_PARAM_PIN_CAP_HBR_MASK) >> HDA_PARAM_PIN_CAP_HBR_SHIFT) +#define HDA_PARAM_PIN_CAP_DP(param) \ + (((param) & HDA_PARAM_PIN_CAP_DP_MASK) >> HDA_PARAM_PIN_CAP_DP_SHIFT) +#define HDA_PARAM_PIN_CAP_EAPD_CAP(param) \ + (((param) & HDA_PARAM_PIN_CAP_EAPD_CAP_MASK) >> \ + HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT) +#define HDA_PARAM_PIN_CAP_VREF_CTRL(param) \ + (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_MASK) >> \ + HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT) +#define HDA_PARAM_PIN_CAP_VREF_CTRL_100(param) \ + (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK) >> \ + HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT) +#define HDA_PARAM_PIN_CAP_VREF_CTRL_80(param) \ + (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK) >> \ + HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT) +#define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(param) \ + (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK) >> \ + HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT) +#define HDA_PARAM_PIN_CAP_VREF_CTRL_50(param) \ + (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK) >> \ + HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT) +#define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(param) \ + (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK) >> \ + HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT) +#define HDA_PARAM_PIN_CAP_HDMI(param) \ + (((param) & HDA_PARAM_PIN_CAP_HDMI_MASK) >> \ + HDA_PARAM_PIN_CAP_HDMI_SHIFT) +#define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(param) \ + (((param) & HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK) >> \ + HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT) +#define HDA_PARAM_PIN_CAP_INPUT_CAP(param) \ + (((param) & HDA_PARAM_PIN_CAP_INPUT_CAP_MASK) >> \ + HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT) +#define HDA_PARAM_PIN_CAP_OUTPUT_CAP(param) \ + (((param) & HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK) >> \ + HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT) +#define HDA_PARAM_PIN_CAP_HEADPHONE_CAP(param) \ + (((param) & HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK) >> \ + HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT) +#define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(param) \ + (((param) & HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK) >> \ + HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT) +#define HDA_PARAM_PIN_CAP_TRIGGER_REQD(param) \ + (((param) & HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK) >> \ + HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT) +#define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(param) \ + (((param) & HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK) >> \ + HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT) /* Input Amplifier Capabilities */ -#define HDA_PARAM_INPUT_AMP_CAP 0x0d - -#define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK 0x80000000 -#define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT 31 -#define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK 0x007f0000 -#define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT 16 -#define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK 0x00007f00 -#define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT 8 -#define HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK 0x0000007f -#define HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT 0 - -#define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP(param) \ - (((param) & HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK) >> \ - HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT) -#define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE(param) \ - (((param) & HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK) >> \ - HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT) -#define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS(param) \ - (((param) & HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK) >> \ - HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT) -#define HDA_PARAM_INPUT_AMP_CAP_OFFSET(param) \ - (((param) & HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK) >> \ - HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT) +#define HDA_PARAM_INPUT_AMP_CAP 0x0d + +#define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK 0x80000000 +#define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT 31 +#define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK 0x007f0000 +#define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT 16 +#define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK 0x00007f00 +#define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT 8 +#define HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK 0x0000007f +#define HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT 0 + +#define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP(param) \ + (((param) & HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK) >> \ + HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT) +#define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE(param) \ + (((param) & HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK) >> \ + HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT) +#define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS(param) \ + (((param) & HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK) >> \ + HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT) +#define HDA_PARAM_INPUT_AMP_CAP_OFFSET(param) \ + (((param) & HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK) >> \ + HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT) /* Output Amplifier Capabilities */ -#define HDA_PARAM_OUTPUT_AMP_CAP 0x12 - -#define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK 0x80000000 -#define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT 31 -#define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK 0x007f0000 -#define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT 16 -#define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK 0x00007f00 -#define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT 8 -#define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK 0x0000007f -#define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT 0 - -#define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(param) \ - (((param) & HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK) >> \ - HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT) -#define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(param) \ - (((param) & HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK) >> \ - HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT) -#define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(param) \ - (((param) & HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK) >> \ - HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT) -#define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(param) \ - (((param) & HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK) >> \ - HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT) +#define HDA_PARAM_OUTPUT_AMP_CAP 0x12 + +#define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK 0x80000000 +#define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT 31 +#define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK 0x007f0000 +#define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT 16 +#define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK 0x00007f00 +#define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT 8 +#define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK 0x0000007f +#define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT 0 + +#define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(param) \ + (((param) & HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK) >> \ + HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT) +#define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(param) \ + (((param) & HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK) >> \ + HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT) +#define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(param) \ + (((param) & HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK) >> \ + HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT) +#define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(param) \ + (((param) & HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK) >> \ + HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT) /* Connection List Length */ -#define HDA_PARAM_CONN_LIST_LENGTH 0x0e +#define HDA_PARAM_CONN_LIST_LENGTH 0x0e -#define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK 0x00000080 -#define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT 7 -#define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK 0x0000007f -#define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT 0 +#define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK 0x00000080 +#define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT 7 +#define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK 0x0000007f +#define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT 0 -#define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(param) \ - (((param) & HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK) >> \ - HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT) -#define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(param) \ - (((param) & HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK) >> \ - HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT) +#define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(param) \ + (((param) & HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK) >> \ + HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT) +#define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(param) \ + (((param) & HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK) >> \ + HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT) /* Supported Power States */ -#define HDA_PARAM_SUPP_POWER_STATES 0x0f - -#define HDA_PARAM_SUPP_POWER_STATES_D3_MASK 0x00000008 -#define HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT 3 -#define HDA_PARAM_SUPP_POWER_STATES_D2_MASK 0x00000004 -#define HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT 2 -#define HDA_PARAM_SUPP_POWER_STATES_D1_MASK 0x00000002 -#define HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT 1 -#define HDA_PARAM_SUPP_POWER_STATES_D0_MASK 0x00000001 -#define HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT 0 - -#define HDA_PARAM_SUPP_POWER_STATES_D3(param) \ - (((param) & HDA_PARAM_SUPP_POWER_STATES_D3_MASK) >> \ - HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT) -#define HDA_PARAM_SUPP_POWER_STATES_D2(param) \ - (((param) & HDA_PARAM_SUPP_POWER_STATES_D2_MASK) >> \ - HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT) -#define HDA_PARAM_SUPP_POWER_STATES_D1(param) \ - (((param) & HDA_PARAM_SUPP_POWER_STATES_D1_MASK) >> \ - HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT) -#define HDA_PARAM_SUPP_POWER_STATES_D0(param) \ - (((param) & HDA_PARAM_SUPP_POWER_STATES_D0_MASK) >> \ - HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT) +#define HDA_PARAM_SUPP_POWER_STATES 0x0f + +#define HDA_PARAM_SUPP_POWER_STATES_D3_MASK 0x00000008 +#define HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT 3 +#define HDA_PARAM_SUPP_POWER_STATES_D2_MASK 0x00000004 +#define HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT 2 +#define HDA_PARAM_SUPP_POWER_STATES_D1_MASK 0x00000002 +#define HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT 1 +#define HDA_PARAM_SUPP_POWER_STATES_D0_MASK 0x00000001 +#define HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT 0 + +#define HDA_PARAM_SUPP_POWER_STATES_D3(param) \ + (((param) & HDA_PARAM_SUPP_POWER_STATES_D3_MASK) >> \ + HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT) +#define HDA_PARAM_SUPP_POWER_STATES_D2(param) \ + (((param) & HDA_PARAM_SUPP_POWER_STATES_D2_MASK) >> \ + HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT) +#define HDA_PARAM_SUPP_POWER_STATES_D1(param) \ + (((param) & HDA_PARAM_SUPP_POWER_STATES_D1_MASK) >> \ + HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT) +#define HDA_PARAM_SUPP_POWER_STATES_D0(param) \ + (((param) & HDA_PARAM_SUPP_POWER_STATES_D0_MASK) >> \ + HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT) /* Processing Capabilities */ -#define HDA_PARAM_PROCESSING_CAP 0x10 +#define HDA_PARAM_PROCESSING_CAP 0x10 -#define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK 0x0000ff00 -#define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT 8 -#define HDA_PARAM_PROCESSING_CAP_BENIGN_MASK 0x00000001 -#define HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT 0 +#define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK 0x0000ff00 +#define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT 8 +#define HDA_PARAM_PROCESSING_CAP_BENIGN_MASK 0x00000001 +#define HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT 0 -#define HDA_PARAM_PROCESSING_CAP_NUMCOEFF(param) \ - (((param) & HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK) >> \ - HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT) -#define HDA_PARAM_PROCESSING_CAP_BENIGN(param) \ - (((param) & HDA_PARAM_PROCESSING_CAP_BENIGN_MASK) >> \ - HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT) +#define HDA_PARAM_PROCESSING_CAP_NUMCOEFF(param) \ + (((param) & HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK) >> \ + HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT) +#define HDA_PARAM_PROCESSING_CAP_BENIGN(param) \ + (((param) & HDA_PARAM_PROCESSING_CAP_BENIGN_MASK) >> \ + HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT) /* GPIO Count */ -#define HDA_PARAM_GPIO_COUNT 0x11 - -#define HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK 0x80000000 -#define HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT 31 -#define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK 0x40000000 -#define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT 30 -#define HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK 0x00ff0000 -#define HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT 16 -#define HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK 0x0000ff00 -#define HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT 8 -#define HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK 0x000000ff -#define HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT 0 - -#define HDA_PARAM_GPIO_COUNT_GPI_WAKE(param) \ - (((param) & HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK) >> \ - HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT) -#define HDA_PARAM_GPIO_COUNT_GPI_UNSOL(param) \ - (((param) & HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK) >> \ - HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT) -#define HDA_PARAM_GPIO_COUNT_NUM_GPI(param) \ - (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK) >> \ - HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT) -#define HDA_PARAM_GPIO_COUNT_NUM_GPO(param) \ - (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK) >> \ - HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT) -#define HDA_PARAM_GPIO_COUNT_NUM_GPIO(param) \ - (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK) >> \ - HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT) +#define HDA_PARAM_GPIO_COUNT 0x11 + +#define HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK 0x80000000 +#define HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT 31 +#define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK 0x40000000 +#define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT 30 +#define HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK 0x00ff0000 +#define HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT 16 +#define HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK 0x0000ff00 +#define HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT 8 +#define HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK 0x000000ff +#define HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT 0 + +#define HDA_PARAM_GPIO_COUNT_GPI_WAKE(param) \ + (((param) & HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK) >> \ + HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT) +#define HDA_PARAM_GPIO_COUNT_GPI_UNSOL(param) \ + (((param) & HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK) >> \ + HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT) +#define HDA_PARAM_GPIO_COUNT_NUM_GPI(param) \ + (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK) >> \ + HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT) +#define HDA_PARAM_GPIO_COUNT_NUM_GPO(param) \ + (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK) >> \ + HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT) +#define HDA_PARAM_GPIO_COUNT_NUM_GPIO(param) \ + (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK) >> \ + HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT) /* Volume Knob Capabilities */ -#define HDA_PARAM_VOLUME_KNOB_CAP 0x13 - -#define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK 0x00000080 -#define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT 7 -#define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK 0x0000007f -#define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT 0 - -#define HDA_PARAM_VOLUME_KNOB_CAP_DELTA(param) \ - (((param) & HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK) >> \ - HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT) -#define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS(param) \ - (((param) & HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK) >> \ - HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT) - -#define HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK 0x0000000f -#define HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT 0 -#define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK 0x000000f0 -#define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT 4 -#define HDA_CONFIG_DEFAULTCONF_MISC_MASK 0x00000f00 -#define HDA_CONFIG_DEFAULTCONF_MISC_SHIFT 8 -#define HDA_CONFIG_DEFAULTCONF_COLOR_MASK 0x0000f000 -#define HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT 12 -#define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK 0x000f0000 -#define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT 16 -#define HDA_CONFIG_DEFAULTCONF_DEVICE_MASK 0x00f00000 -#define HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT 20 -#define HDA_CONFIG_DEFAULTCONF_LOCATION_MASK 0x3f000000 -#define HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT 24 -#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK 0xc0000000 -#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT 30 - -#define HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf) \ - (((conf) & HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK) >> \ - HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT) -#define HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf) \ - (((conf) & HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK) >> \ - HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT) -#define HDA_CONFIG_DEFAULTCONF_MISC(conf) \ - (((conf) & HDA_CONFIG_DEFAULTCONF_MISC_MASK) >> \ - HDA_CONFIG_DEFAULTCONF_MISC_SHIFT) -#define HDA_CONFIG_DEFAULTCONF_COLOR(conf) \ - (((conf) & HDA_CONFIG_DEFAULTCONF_COLOR_MASK) >> \ - HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT) -#define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE(conf) \ - (((conf) & HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK) >> \ - HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT) -#define HDA_CONFIG_DEFAULTCONF_DEVICE(conf) \ - (((conf) & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) >> \ - HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT) -#define HDA_CONFIG_DEFAULTCONF_LOCATION(conf) \ - (((conf) & HDA_CONFIG_DEFAULTCONF_LOCATION_MASK) >> \ - HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT) -#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY(conf) \ - (((conf) & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) >> \ - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT) - -#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK (0<<30) -#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE (1<<30) -#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED (2<<30) -#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH (3<<30) - -#define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT (0<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER (1<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT (2<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_CD (3<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT (4<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT (5<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE (6<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET (7<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN (8<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_AUX (9<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN (10<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY (11<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN (12<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN (13<<20) -#define HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER (15<<20) +#define HDA_PARAM_VOLUME_KNOB_CAP 0x13 + +#define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK 0x00000080 +#define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT 7 +#define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK 0x0000007f +#define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT 0 + +#define HDA_PARAM_VOLUME_KNOB_CAP_DELTA(param) \ + (((param) & HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK) >> \ + HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT) +#define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS(param) \ + (((param) & HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK) >> \ + HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT) + +#define HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK 0x0000000f +#define HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT 0 +#define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK 0x000000f0 +#define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT 4 +#define HDA_CONFIG_DEFAULTCONF_MISC_MASK 0x00000f00 +#define HDA_CONFIG_DEFAULTCONF_MISC_SHIFT 8 +#define HDA_CONFIG_DEFAULTCONF_COLOR_MASK 0x0000f000 +#define HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT 12 +#define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK 0x000f0000 +#define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT 16 +#define HDA_CONFIG_DEFAULTCONF_DEVICE_MASK 0x00f00000 +#define HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT 20 +#define HDA_CONFIG_DEFAULTCONF_LOCATION_MASK 0x3f000000 +#define HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT 24 +#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK 0xc0000000 +#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT 30 + +#define HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf) \ + (((conf) & HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK) >> \ + HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT) +#define HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf) \ + (((conf) & HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK) >> \ + HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT) +#define HDA_CONFIG_DEFAULTCONF_MISC(conf) \ + (((conf) & HDA_CONFIG_DEFAULTCONF_MISC_MASK) >> \ + HDA_CONFIG_DEFAULTCONF_MISC_SHIFT) +#define HDA_CONFIG_DEFAULTCONF_COLOR(conf) \ + (((conf) & HDA_CONFIG_DEFAULTCONF_COLOR_MASK) >> \ + HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT) +#define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE(conf) \ + (((conf) & HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK) >> \ + HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT) +#define HDA_CONFIG_DEFAULTCONF_DEVICE(conf) \ + (((conf) & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) >> \ + HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT) +#define HDA_CONFIG_DEFAULTCONF_LOCATION(conf) \ + (((conf) & HDA_CONFIG_DEFAULTCONF_LOCATION_MASK) >> \ + HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT) +#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY(conf) \ + (((conf) & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) >> \ + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT) + +#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK (0 << 30) +#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE (1 << 30) +#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED (2 << 30) +#define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH (3 << 30) + +#define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT (0 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER (1 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT (2 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_CD (3 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT (4 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT (5 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE (6 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET (7 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN (8 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_AUX (9 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN (10 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY (11 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN (12 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN (13 << 20) +#define HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER (15 << 20) #endif Index: sys/dev/sound/pci/hda/hdaa.h =================================================================== --- sys/dev/sound/pci/hda/hdaa.h +++ sys/dev/sound/pci/hda/hdaa.h @@ -35,55 +35,55 @@ #ifndef _HDAA_QUIRKS_H_ #define _HDAA_QUIRKS_H_ -#define HDAA_GPIO_SHIFT(n) (n * 3) -#define HDAA_GPIO_MASK(n) (0x7 << (n * 3)) -#define HDAA_GPIO_KEEP(n) (0x0 << (n * 3)) -#define HDAA_GPIO_SET(n) (0x1 << (n * 3)) -#define HDAA_GPIO_CLEAR(n) (0x2 << (n * 3)) -#define HDAA_GPIO_DISABLE(n) (0x3 << (n * 3)) -#define HDAA_GPIO_INPUT(n) (0x4 << (n * 3)) +#define HDAA_GPIO_SHIFT(n) (n * 3) +#define HDAA_GPIO_MASK(n) (0x7 << (n * 3)) +#define HDAA_GPIO_KEEP(n) (0x0 << (n * 3)) +#define HDAA_GPIO_SET(n) (0x1 << (n * 3)) +#define HDAA_GPIO_CLEAR(n) (0x2 << (n * 3)) +#define HDAA_GPIO_DISABLE(n) (0x3 << (n * 3)) +#define HDAA_GPIO_INPUT(n) (0x4 << (n * 3)) /* 9 - 25 = anything else */ -#define HDAA_QUIRK_SOFTPCMVOL (1 << 9) -#define HDAA_QUIRK_FIXEDRATE (1 << 10) -#define HDAA_QUIRK_FORCESTEREO (1 << 11) -#define HDAA_QUIRK_EAPDINV (1 << 12) -#define HDAA_QUIRK_SENSEINV (1 << 14) +#define HDAA_QUIRK_SOFTPCMVOL (1 << 9) +#define HDAA_QUIRK_FIXEDRATE (1 << 10) +#define HDAA_QUIRK_FORCESTEREO (1 << 11) +#define HDAA_QUIRK_EAPDINV (1 << 12) +#define HDAA_QUIRK_SENSEINV (1 << 14) /* 26 - 31 = vrefs */ -#define HDAA_QUIRK_IVREF50 (1 << 26) -#define HDAA_QUIRK_IVREF80 (1 << 27) -#define HDAA_QUIRK_IVREF100 (1 << 28) -#define HDAA_QUIRK_OVREF50 (1 << 29) -#define HDAA_QUIRK_OVREF80 (1 << 30) -#define HDAA_QUIRK_OVREF100 (1U << 31) +#define HDAA_QUIRK_IVREF50 (1 << 26) +#define HDAA_QUIRK_IVREF80 (1 << 27) +#define HDAA_QUIRK_IVREF100 (1 << 28) +#define HDAA_QUIRK_OVREF50 (1 << 29) +#define HDAA_QUIRK_OVREF80 (1 << 30) +#define HDAA_QUIRK_OVREF100 (1U << 31) -#define HDAA_QUIRK_IVREF (HDAA_QUIRK_IVREF50 | HDAA_QUIRK_IVREF80 | \ - HDAA_QUIRK_IVREF100) -#define HDAA_QUIRK_OVREF (HDAA_QUIRK_OVREF50 | HDAA_QUIRK_OVREF80 | \ - HDAA_QUIRK_OVREF100) -#define HDAA_QUIRK_VREF (HDAA_QUIRK_IVREF | HDAA_QUIRK_OVREF) +#define HDAA_QUIRK_IVREF \ + (HDAA_QUIRK_IVREF50 | HDAA_QUIRK_IVREF80 | HDAA_QUIRK_IVREF100) +#define HDAA_QUIRK_OVREF \ + (HDAA_QUIRK_OVREF50 | HDAA_QUIRK_OVREF80 | HDAA_QUIRK_OVREF100) +#define HDAA_QUIRK_VREF (HDAA_QUIRK_IVREF | HDAA_QUIRK_OVREF) -#define HDAA_AMP_VOL_DEFAULT (-1) -#define HDAA_AMP_MUTE_DEFAULT (0xffffffff) -#define HDAA_AMP_MUTE_NONE (0) -#define HDAA_AMP_MUTE_LEFT (1 << 0) -#define HDAA_AMP_MUTE_RIGHT (1 << 1) -#define HDAA_AMP_MUTE_ALL (HDAA_AMP_MUTE_LEFT | HDAA_AMP_MUTE_RIGHT) +#define HDAA_AMP_VOL_DEFAULT (-1) +#define HDAA_AMP_MUTE_DEFAULT (0xffffffff) +#define HDAA_AMP_MUTE_NONE (0) +#define HDAA_AMP_MUTE_LEFT (1 << 0) +#define HDAA_AMP_MUTE_RIGHT (1 << 1) +#define HDAA_AMP_MUTE_ALL (HDAA_AMP_MUTE_LEFT | HDAA_AMP_MUTE_RIGHT) -#define HDAA_AMP_LEFT_MUTED(v) ((v) & (HDAA_AMP_MUTE_LEFT)) -#define HDAA_AMP_RIGHT_MUTED(v) (((v) & HDAA_AMP_MUTE_RIGHT) >> 1) +#define HDAA_AMP_LEFT_MUTED(v) ((v) & (HDAA_AMP_MUTE_LEFT)) +#define HDAA_AMP_RIGHT_MUTED(v) (((v) & HDAA_AMP_MUTE_RIGHT) >> 1) /* Widget in playback receiving signal from recording. */ -#define HDAA_ADC_MONITOR (1 << 0) +#define HDAA_ADC_MONITOR (1 << 0) /* Input mixer widget needs volume control as destination. */ -#define HDAA_IMIX_AS_DST (2 << 0) +#define HDAA_IMIX_AS_DST (2 << 0) -#define HDAA_CTL_OUT 1 -#define HDAA_CTL_IN 2 +#define HDAA_CTL_OUT 1 +#define HDAA_CTL_IN 2 -#define HDA_MAX_CONNS 32 -#define HDA_MAX_NAMELEN 32 +#define HDA_MAX_CONNS 32 +#define HDA_MAX_NAMELEN 32 struct hdaa_audio_as; struct hdaa_audio_ctl; @@ -107,8 +107,8 @@ nid_t conns[HDA_MAX_CONNS]; u_char connsenable[HDA_MAX_CONNS]; char name[HDA_MAX_NAMELEN]; - uint8_t *eld; - int eld_len; + uint8_t *eld; + int eld_len; struct hdaa_devinfo *devinfo; struct { uint32_t widget_cap; @@ -125,10 +125,10 @@ uint32_t newconf; uint32_t cap; uint32_t ctrl; - int connected; + int connected; } pin; struct { - uint8_t stripecap; + uint8_t stripecap; } conv; } wclass; }; @@ -140,10 +140,10 @@ int mute, step, size, offset; int left, right, forcemute; uint32_t muted; - uint32_t ossmask; /* OSS devices that may affect control. */ - int devleft[SOUND_MIXER_NRDEVICES]; /* Left ampl in 1/4dB. */ - int devright[SOUND_MIXER_NRDEVICES]; /* Right ampl in 1/4dB. */ - int devmute[SOUND_MIXER_NRDEVICES]; /* Mutes per OSS device. */ + uint32_t ossmask; /* OSS devices that may affect control. */ + int devleft[SOUND_MIXER_NRDEVICES]; /* Left ampl in 1/4dB. */ + int devright[SOUND_MIXER_NRDEVICES]; /* Right ampl in 1/4dB. */ + int devmute[SOUND_MIXER_NRDEVICES]; /* Mutes per OSS device. */ }; /* Association is a group of pins bound for some special function. */ @@ -160,63 +160,63 @@ nid_t dacs[2][16]; int num_chans; int chans[2]; - int location; /* Pins location, if all have the same */ - int mixed; /* Mixed/multiplexed recording, not multichannel. */ + int location; /* Pins location, if all have the same */ + int mixed; /* Mixed/multiplexed recording, not multichannel. */ struct hdaa_pcm_devinfo *pdevinfo; }; struct hdaa_pcm_devinfo { device_t dev; struct hdaa_devinfo *devinfo; - struct snd_mixer *mixer; - int index; - int registered; - int playas, recas; - u_char left[SOUND_MIXER_NRDEVICES]; - u_char right[SOUND_MIXER_NRDEVICES]; - int minamp[SOUND_MIXER_NRDEVICES]; /* Minimal amps in 1/4dB. */ - int maxamp[SOUND_MIXER_NRDEVICES]; /* Maximal amps in 1/4dB. */ - int chan_size; - int chan_blkcnt; - u_char digital; - uint32_t ossmask; /* Mask of supported OSS devices. */ - uint32_t recsrc; /* Mask of supported OSS sources. */ - int autorecsrc; + struct snd_mixer *mixer; + int index; + int registered; + int playas, recas; + u_char left[SOUND_MIXER_NRDEVICES]; + u_char right[SOUND_MIXER_NRDEVICES]; + int minamp[SOUND_MIXER_NRDEVICES]; /* Minimal amps in 1/4dB. */ + int maxamp[SOUND_MIXER_NRDEVICES]; /* Maximal amps in 1/4dB. */ + int chan_size; + int chan_blkcnt; + u_char digital; + uint32_t ossmask; /* Mask of supported OSS devices. */ + uint32_t recsrc; /* Mask of supported OSS sources. */ + int autorecsrc; }; struct hdaa_devinfo { - device_t dev; - struct mtx *lock; - nid_t nid; - nid_t startnode, endnode; - uint32_t outamp_cap; - uint32_t inamp_cap; - uint32_t supp_stream_formats; - uint32_t supp_pcm_size_rate; - uint32_t gpio_cap; - uint32_t quirks; - uint32_t newquirks; - uint32_t gpio; - uint32_t newgpio; - uint32_t gpo; - uint32_t newgpo; - int nodecnt; - int ctlcnt; - int ascnt; - int num_devs; - int num_chans; - struct hdaa_widget *widget; - struct hdaa_audio_ctl *ctl; - struct hdaa_audio_as *as; - struct hdaa_pcm_devinfo *devs; - struct hdaa_chan *chans; - struct callout poll_jack; - int poll_ival; - uint32_t init_clear; + device_t dev; + struct mtx *lock; + nid_t nid; + nid_t startnode, endnode; + uint32_t outamp_cap; + uint32_t inamp_cap; + uint32_t supp_stream_formats; + uint32_t supp_pcm_size_rate; + uint32_t gpio_cap; + uint32_t quirks; + uint32_t newquirks; + uint32_t gpio; + uint32_t newgpio; + uint32_t gpo; + uint32_t newgpo; + int nodecnt; + int ctlcnt; + int ascnt; + int num_devs; + int num_chans; + struct hdaa_widget *widget; + struct hdaa_audio_ctl *ctl; + struct hdaa_audio_as *as; + struct hdaa_pcm_devinfo *devs; + struct hdaa_chan *chans; + struct callout poll_jack; + int poll_ival; + uint32_t init_clear; }; -#define HDAA_CHN_RUNNING 0x00000001 -#define HDAA_CHN_SUSPEND 0x00000002 +#define HDAA_CHN_RUNNING 0x00000001 +#define HDAA_CHN_SUSPEND 0x00000002 struct hdaa_chan { struct snd_dbuf *b; @@ -233,43 +233,42 @@ int off; int sid; int bit16, bit32; - int channels; /* Number of audio channels. */ - int as; /* Number of association. */ - int asindex; /* Index within association. */ + int channels; /* Number of audio channels. */ + int as; /* Number of association. */ + int asindex; /* Index within association. */ nid_t io[16]; - uint8_t stripecap; /* AND of stripecap of all ios. */ - uint8_t stripectl; /* stripe to use to all ios. */ + uint8_t stripecap; /* AND of stripecap of all ios. */ + uint8_t stripectl; /* stripe to use to all ios. */ }; -#define MINQDB(ctl) \ - ((0 - (ctl)->offset) * ((ctl)->size + 1)) +#define MINQDB(ctl) ((0 - (ctl)->offset) * ((ctl)->size + 1)) -#define MAXQDB(ctl) \ - (((ctl)->step - (ctl)->offset) * ((ctl)->size + 1)) +#define MAXQDB(ctl) (((ctl)->step - (ctl)->offset) * ((ctl)->size + 1)) -#define RANGEQDB(ctl) \ - ((ctl)->step * ((ctl)->size + 1)) +#define RANGEQDB(ctl) ((ctl)->step * ((ctl)->size + 1)) -#define VAL2QDB(ctl, val) \ - (((ctl)->size + 1) * ((int)(val) - (ctl)->offset)) +#define VAL2QDB(ctl, val) (((ctl)->size + 1) * ((int)(val) - (ctl)->offset)) -#define QDB2VAL(ctl, qdb) \ - imax(imin((((qdb) + (ctl)->size / 2 * ((qdb) > 0 ? 1 : -1)) / \ - ((ctl)->size + 1) + (ctl)->offset), (ctl)->step), 0) +#define QDB2VAL(ctl, qdb) \ + imax(imin((((qdb) + (ctl)->size / 2 * ((qdb) > 0 ? 1 : -1)) / \ + ((ctl)->size + 1) + \ + (ctl)->offset), \ + (ctl)->step), \ + 0) -#define hdaa_codec_id(devinfo) \ - (((uint32_t)hda_get_vendor_id(devinfo->dev) << 16) + \ - hda_get_device_id(devinfo->dev)) +#define hdaa_codec_id(devinfo) \ + (((uint32_t)hda_get_vendor_id(devinfo->dev) << 16) + \ + hda_get_device_id(devinfo->dev)) -#define hdaa_card_id(devinfo) \ - (((uint32_t)hda_get_subdevice_id(devinfo->dev) << 16) + \ - hda_get_subvendor_id(devinfo->dev)) +#define hdaa_card_id(devinfo) \ + (((uint32_t)hda_get_subdevice_id(devinfo->dev) << 16) + \ + hda_get_subvendor_id(devinfo->dev)) -struct hdaa_widget *hdaa_widget_get(struct hdaa_devinfo *, nid_t); -uint32_t hdaa_widget_pin_patch(uint32_t config, const char *str); -uint32_t hdaa_gpio_patch(uint32_t gpio, const char *str); +struct hdaa_widget *hdaa_widget_get(struct hdaa_devinfo *, nid_t); +uint32_t hdaa_widget_pin_patch(uint32_t config, const char *str); +uint32_t hdaa_gpio_patch(uint32_t gpio, const char *str); -void hdaa_patch(struct hdaa_devinfo *devinfo); -void hdaa_patch_direct(struct hdaa_devinfo *devinfo); +void hdaa_patch(struct hdaa_devinfo *devinfo); +void hdaa_patch_direct(struct hdaa_devinfo *devinfo); #endif Index: sys/dev/sound/pci/hda/hdaa.c =================================================================== --- sys/dev/sound/pci/hda/hdaa.c +++ sys/dev/sound/pci/hda/hdaa.c @@ -36,19 +36,18 @@ #include "opt_snd.h" #endif -#include - #include #include -#include -#include #include +#include +#include +#include #include "mixer_if.h" -#define hdaa_lock(devinfo) snd_mtxlock((devinfo)->lock) -#define hdaa_unlock(devinfo) snd_mtxunlock((devinfo)->lock) +#define hdaa_lock(devinfo) snd_mtxlock((devinfo)->lock) +#define hdaa_unlock(devinfo) snd_mtxunlock((devinfo)->lock) #define hdaa_lockassert(devinfo) snd_mtxassert((devinfo)->lock) static const struct { @@ -71,93 +70,89 @@ { "vref", HDAA_QUIRK_VREF }, }; -#define HDA_PARSE_MAXDEPTH 10 +#define HDA_PARSE_MAXDEPTH 10 MALLOC_DEFINE(M_HDAA, "hdaa", "HDA Audio"); -static const char *HDA_COLORS[16] = {"Unknown", "Black", "Grey", "Blue", - "Green", "Red", "Orange", "Yellow", "Purple", "Pink", "Res.A", "Res.B", - "Res.C", "Res.D", "White", "Other"}; - -static const char *HDA_DEVS[16] = {"Line-out", "Speaker", "Headphones", "CD", - "SPDIF-out", "Digital-out", "Modem-line", "Modem-handset", "Line-in", - "AUX", "Mic", "Telephony", "SPDIF-in", "Digital-in", "Res.E", "Other"}; - -static const char *HDA_CONNS[4] = {"Jack", "None", "Fixed", "Both"}; - -static const char *HDA_CONNECTORS[16] = { - "Unknown", "1/8", "1/4", "ATAPI", "RCA", "Optical", "Digital", "Analog", - "DIN", "XLR", "RJ-11", "Combo", "0xc", "0xd", "0xe", "Other" }; - -static const char *HDA_LOCS[64] = { - "0x00", "Rear", "Front", "Left", "Right", "Top", "Bottom", "Rear-panel", - "Drive-bay", "0x09", "0x0a", "0x0b", "0x0c", "0x0d", "0x0e", "0x0f", - "Internal", "0x11", "0x12", "0x13", "0x14", "0x15", "0x16", "Riser", - "0x18", "Onboard", "0x1a", "0x1b", "0x1c", "0x1d", "0x1e", "0x1f", - "External", "Ext-Rear", "Ext-Front", "Ext-Left", "Ext-Right", "Ext-Top", "Ext-Bottom", "0x07", - "0x28", "0x29", "0x2a", "0x2b", "0x2c", "0x2d", "0x2e", "0x2f", - "Other", "0x31", "0x32", "0x33", "0x34", "0x35", "Other-Bott", "Lid-In", - "Lid-Out", "0x39", "0x3a", "0x3b", "0x3c", "0x3d", "0x3e", "0x3f" }; - -static const char *HDA_GPIO_ACTIONS[8] = { - "keep", "set", "clear", "disable", "input", "0x05", "0x06", "0x07"}; - -static const char *HDA_HDMI_CODING_TYPES[18] = { - "undefined", "LPCM", "AC-3", "MPEG1", "MP3", "MPEG2", "AAC-LC", "DTS", - "ATRAC", "DSD", "E-AC-3", "DTS-HD", "MLP", "DST", "WMAPro", "HE-AAC", - "HE-AACv2", "MPEG-Surround" -}; +static const char *HDA_COLORS[16] = { "Unknown", "Black", "Grey", "Blue", + "Green", "Red", "Orange", "Yellow", "Purple", "Pink", "Res.A", "Res.B", + "Res.C", "Res.D", "White", "Other" }; + +static const char *HDA_DEVS[16] = { "Line-out", "Speaker", "Headphones", "CD", + "SPDIF-out", "Digital-out", "Modem-line", "Modem-handset", "Line-in", + "AUX", "Mic", "Telephony", "SPDIF-in", "Digital-in", "Res.E", "Other" }; + +static const char *HDA_CONNS[4] = { "Jack", "None", "Fixed", "Both" }; + +static const char *HDA_CONNECTORS[16] = { "Unknown", "1/8", "1/4", "ATAPI", + "RCA", "Optical", "Digital", "Analog", "DIN", "XLR", "RJ-11", "Combo", + "0xc", "0xd", "0xe", "Other" }; + +static const char *HDA_LOCS[64] = { "0x00", "Rear", "Front", "Left", "Right", + "Top", "Bottom", "Rear-panel", "Drive-bay", "0x09", "0x0a", "0x0b", + "0x0c", "0x0d", "0x0e", "0x0f", "Internal", "0x11", "0x12", "0x13", + "0x14", "0x15", "0x16", "Riser", "0x18", "Onboard", "0x1a", "0x1b", + "0x1c", "0x1d", "0x1e", "0x1f", "External", "Ext-Rear", "Ext-Front", + "Ext-Left", "Ext-Right", "Ext-Top", "Ext-Bottom", "0x07", "0x28", + "0x29", "0x2a", "0x2b", "0x2c", "0x2d", "0x2e", "0x2f", "Other", "0x31", + "0x32", "0x33", "0x34", "0x35", "Other-Bott", "Lid-In", "Lid-Out", + "0x39", "0x3a", "0x3b", "0x3c", "0x3d", "0x3e", "0x3f" }; + +static const char *HDA_GPIO_ACTIONS[8] = { "keep", "set", "clear", "disable", + "input", "0x05", "0x06", "0x07" }; + +static const char *HDA_HDMI_CODING_TYPES[18] = { "undefined", "LPCM", "AC-3", + "MPEG1", "MP3", "MPEG2", "AAC-LC", "DTS", "ATRAC", "DSD", "E-AC-3", + "DTS-HD", "MLP", "DST", "WMAPro", "HE-AAC", "HE-AACv2", + "MPEG-Surround" }; /* Default */ -static uint32_t hdaa_fmt[] = { - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; +static uint32_t hdaa_fmt[] = { SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; -static struct pcmchan_caps hdaa_caps = {48000, 48000, hdaa_fmt, 0}; +static struct pcmchan_caps hdaa_caps = { 48000, 48000, hdaa_fmt, 0 }; static const struct { - uint32_t rate; - int valid; - uint16_t base; - uint16_t mul; - uint16_t div; + uint32_t rate; + int valid; + uint16_t base; + uint16_t mul; + uint16_t div; } hda_rate_tab[] = { - { 8000, 1, 0x0000, 0x0000, 0x0500 }, /* (48000 * 1) / 6 */ - { 9600, 0, 0x0000, 0x0000, 0x0400 }, /* (48000 * 1) / 5 */ - { 12000, 0, 0x0000, 0x0000, 0x0300 }, /* (48000 * 1) / 4 */ - { 16000, 1, 0x0000, 0x0000, 0x0200 }, /* (48000 * 1) / 3 */ - { 18000, 0, 0x0000, 0x1000, 0x0700 }, /* (48000 * 3) / 8 */ - { 19200, 0, 0x0000, 0x0800, 0x0400 }, /* (48000 * 2) / 5 */ - { 24000, 0, 0x0000, 0x0000, 0x0100 }, /* (48000 * 1) / 2 */ - { 28800, 0, 0x0000, 0x1000, 0x0400 }, /* (48000 * 3) / 5 */ - { 32000, 1, 0x0000, 0x0800, 0x0200 }, /* (48000 * 2) / 3 */ - { 36000, 0, 0x0000, 0x1000, 0x0300 }, /* (48000 * 3) / 4 */ - { 38400, 0, 0x0000, 0x1800, 0x0400 }, /* (48000 * 4) / 5 */ - { 48000, 1, 0x0000, 0x0000, 0x0000 }, /* (48000 * 1) / 1 */ - { 64000, 0, 0x0000, 0x1800, 0x0200 }, /* (48000 * 4) / 3 */ - { 72000, 0, 0x0000, 0x1000, 0x0100 }, /* (48000 * 3) / 2 */ - { 96000, 1, 0x0000, 0x0800, 0x0000 }, /* (48000 * 2) / 1 */ - { 144000, 0, 0x0000, 0x1000, 0x0000 }, /* (48000 * 3) / 1 */ - { 192000, 1, 0x0000, 0x1800, 0x0000 }, /* (48000 * 4) / 1 */ - { 8820, 0, 0x4000, 0x0000, 0x0400 }, /* (44100 * 1) / 5 */ - { 11025, 1, 0x4000, 0x0000, 0x0300 }, /* (44100 * 1) / 4 */ - { 12600, 0, 0x4000, 0x0800, 0x0600 }, /* (44100 * 2) / 7 */ - { 14700, 0, 0x4000, 0x0000, 0x0200 }, /* (44100 * 1) / 3 */ - { 17640, 0, 0x4000, 0x0800, 0x0400 }, /* (44100 * 2) / 5 */ - { 18900, 0, 0x4000, 0x1000, 0x0600 }, /* (44100 * 3) / 7 */ - { 22050, 1, 0x4000, 0x0000, 0x0100 }, /* (44100 * 1) / 2 */ - { 25200, 0, 0x4000, 0x1800, 0x0600 }, /* (44100 * 4) / 7 */ - { 26460, 0, 0x4000, 0x1000, 0x0400 }, /* (44100 * 3) / 5 */ - { 29400, 0, 0x4000, 0x0800, 0x0200 }, /* (44100 * 2) / 3 */ - { 33075, 0, 0x4000, 0x1000, 0x0300 }, /* (44100 * 3) / 4 */ - { 35280, 0, 0x4000, 0x1800, 0x0400 }, /* (44100 * 4) / 5 */ - { 44100, 1, 0x4000, 0x0000, 0x0000 }, /* (44100 * 1) / 1 */ - { 58800, 0, 0x4000, 0x1800, 0x0200 }, /* (44100 * 4) / 3 */ - { 66150, 0, 0x4000, 0x1000, 0x0100 }, /* (44100 * 3) / 2 */ - { 88200, 1, 0x4000, 0x0800, 0x0000 }, /* (44100 * 2) / 1 */ - { 132300, 0, 0x4000, 0x1000, 0x0000 }, /* (44100 * 3) / 1 */ - { 176400, 1, 0x4000, 0x1800, 0x0000 }, /* (44100 * 4) / 1 */ + { 8000, 1, 0x0000, 0x0000, 0x0500 }, /* (48000 * 1) / 6 */ + { 9600, 0, 0x0000, 0x0000, 0x0400 }, /* (48000 * 1) / 5 */ + { 12000, 0, 0x0000, 0x0000, 0x0300 }, /* (48000 * 1) / 4 */ + { 16000, 1, 0x0000, 0x0000, 0x0200 }, /* (48000 * 1) / 3 */ + { 18000, 0, 0x0000, 0x1000, 0x0700 }, /* (48000 * 3) / 8 */ + { 19200, 0, 0x0000, 0x0800, 0x0400 }, /* (48000 * 2) / 5 */ + { 24000, 0, 0x0000, 0x0000, 0x0100 }, /* (48000 * 1) / 2 */ + { 28800, 0, 0x0000, 0x1000, 0x0400 }, /* (48000 * 3) / 5 */ + { 32000, 1, 0x0000, 0x0800, 0x0200 }, /* (48000 * 2) / 3 */ + { 36000, 0, 0x0000, 0x1000, 0x0300 }, /* (48000 * 3) / 4 */ + { 38400, 0, 0x0000, 0x1800, 0x0400 }, /* (48000 * 4) / 5 */ + { 48000, 1, 0x0000, 0x0000, 0x0000 }, /* (48000 * 1) / 1 */ + { 64000, 0, 0x0000, 0x1800, 0x0200 }, /* (48000 * 4) / 3 */ + { 72000, 0, 0x0000, 0x1000, 0x0100 }, /* (48000 * 3) / 2 */ + { 96000, 1, 0x0000, 0x0800, 0x0000 }, /* (48000 * 2) / 1 */ + { 144000, 0, 0x0000, 0x1000, 0x0000 }, /* (48000 * 3) / 1 */ + { 192000, 1, 0x0000, 0x1800, 0x0000 }, /* (48000 * 4) / 1 */ + { 8820, 0, 0x4000, 0x0000, 0x0400 }, /* (44100 * 1) / 5 */ + { 11025, 1, 0x4000, 0x0000, 0x0300 }, /* (44100 * 1) / 4 */ + { 12600, 0, 0x4000, 0x0800, 0x0600 }, /* (44100 * 2) / 7 */ + { 14700, 0, 0x4000, 0x0000, 0x0200 }, /* (44100 * 1) / 3 */ + { 17640, 0, 0x4000, 0x0800, 0x0400 }, /* (44100 * 2) / 5 */ + { 18900, 0, 0x4000, 0x1000, 0x0600 }, /* (44100 * 3) / 7 */ + { 22050, 1, 0x4000, 0x0000, 0x0100 }, /* (44100 * 1) / 2 */ + { 25200, 0, 0x4000, 0x1800, 0x0600 }, /* (44100 * 4) / 7 */ + { 26460, 0, 0x4000, 0x1000, 0x0400 }, /* (44100 * 3) / 5 */ + { 29400, 0, 0x4000, 0x0800, 0x0200 }, /* (44100 * 2) / 3 */ + { 33075, 0, 0x4000, 0x1000, 0x0300 }, /* (44100 * 3) / 4 */ + { 35280, 0, 0x4000, 0x1800, 0x0400 }, /* (44100 * 4) / 5 */ + { 44100, 1, 0x4000, 0x0000, 0x0000 }, /* (44100 * 1) / 1 */ + { 58800, 0, 0x4000, 0x1800, 0x0200 }, /* (44100 * 4) / 3 */ + { 66150, 0, 0x4000, 0x1000, 0x0100 }, /* (44100 * 3) / 2 */ + { 88200, 1, 0x4000, 0x0800, 0x0000 }, /* (44100 * 2) / 1 */ + { 132300, 0, 0x4000, 0x1000, 0x0000 }, /* (44100 * 3) / 1 */ + { 176400, 1, 0x4000, 0x1800, 0x0000 }, /* (44100 * 4) / 1 */ }; #define HDA_RATE_TAB_LEN (sizeof(hda_rate_tab) / sizeof(hda_rate_tab[0])) @@ -166,17 +161,16 @@ /**************************************************************************** * Function prototypes ****************************************************************************/ -static int hdaa_pcmchannel_setup(struct hdaa_chan *); +static int hdaa_pcmchannel_setup(struct hdaa_chan *); -static void hdaa_widget_connection_select(struct hdaa_widget *, uint8_t); -static void hdaa_audio_ctl_amp_set(struct hdaa_audio_ctl *, - uint32_t, int, int); -static struct hdaa_audio_ctl *hdaa_audio_ctl_amp_get(struct hdaa_devinfo *, - nid_t, int, int, int); -static void hdaa_audio_ctl_amp_set_internal(struct hdaa_devinfo *, - nid_t, int, int, int, int, int, int); +static void hdaa_widget_connection_select(struct hdaa_widget *, uint8_t); +static void hdaa_audio_ctl_amp_set(struct hdaa_audio_ctl *, uint32_t, int, int); +static struct hdaa_audio_ctl *hdaa_audio_ctl_amp_get(struct hdaa_devinfo *, + nid_t, int, int, int); +static void hdaa_audio_ctl_amp_set_internal(struct hdaa_devinfo *, nid_t, int, + int, int, int, int, int); -static void hdaa_dump_pin_config(struct hdaa_widget *w, uint32_t conf); +static void hdaa_dump_pin_config(struct hdaa_widget *w, uint32_t conf); static char * hdaa_audio_ctl_ossmixer_mask2allname(uint32_t mask, char *buf, size_t len) @@ -198,17 +192,15 @@ static struct hdaa_audio_ctl * hdaa_audio_ctl_each(struct hdaa_devinfo *devinfo, int *index) { - if (devinfo == NULL || - index == NULL || devinfo->ctl == NULL || - devinfo->ctlcnt < 1 || - *index < 0 || *index >= devinfo->ctlcnt) + if (devinfo == NULL || index == NULL || devinfo->ctl == NULL || + devinfo->ctlcnt < 1 || *index < 0 || *index >= devinfo->ctlcnt) return (NULL); return (&devinfo->ctl[(*index)++]); } static struct hdaa_audio_ctl * hdaa_audio_ctl_amp_get(struct hdaa_devinfo *devinfo, nid_t nid, int dir, - int index, int cnt) + int index, int cnt) { struct hdaa_audio_ctl *ctl; int i, found = 0; @@ -236,22 +228,22 @@ } static const struct matrix { - struct pcmchan_matrix m; - int analog; -} matrixes[] = { - { SND_CHN_MATRIX_MAP_1_0, 1 }, - { SND_CHN_MATRIX_MAP_2_0, 1 }, - { SND_CHN_MATRIX_MAP_2_1, 0 }, - { SND_CHN_MATRIX_MAP_3_0, 0 }, - { SND_CHN_MATRIX_MAP_3_1, 0 }, - { SND_CHN_MATRIX_MAP_4_0, 1 }, - { SND_CHN_MATRIX_MAP_4_1, 0 }, - { SND_CHN_MATRIX_MAP_5_0, 0 }, - { SND_CHN_MATRIX_MAP_5_1, 1 }, - { SND_CHN_MATRIX_MAP_6_0, 0 }, - { SND_CHN_MATRIX_MAP_6_1, 0 }, - { SND_CHN_MATRIX_MAP_7_0, 0 }, - { SND_CHN_MATRIX_MAP_7_1, 1 }, + struct pcmchan_matrix m; + int analog; +} matrixes[] = { + { SND_CHN_MATRIX_MAP_1_0, 1 }, + { SND_CHN_MATRIX_MAP_2_0, 1 }, + { SND_CHN_MATRIX_MAP_2_1, 0 }, + { SND_CHN_MATRIX_MAP_3_0, 0 }, + { SND_CHN_MATRIX_MAP_3_1, 0 }, + { SND_CHN_MATRIX_MAP_4_0, 1 }, + { SND_CHN_MATRIX_MAP_4_1, 0 }, + { SND_CHN_MATRIX_MAP_5_0, 0 }, + { SND_CHN_MATRIX_MAP_5_1, 1 }, + { SND_CHN_MATRIX_MAP_6_0, 0 }, + { SND_CHN_MATRIX_MAP_6_1, 0 }, + { SND_CHN_MATRIX_MAP_7_0, 0 }, + { SND_CHN_MATRIX_MAP_7_1, 1 }, }; static const char *channel_names[] = SND_CHN_T_NAMES; @@ -303,9 +295,11 @@ if (eld[7] & 0x08) { /* Rear Left/Right */ /* If we have both RLR and RLRC, report RLR as side. */ if (eld[7] & 0x40) /* Rear Left/Right Center */ - channels |= SND_CHN_T_MASK_SL | SND_CHN_T_MASK_SR; + channels |= SND_CHN_T_MASK_SL | + SND_CHN_T_MASK_SR; else - channels |= SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR; + channels |= SND_CHN_T_MASK_BL | + SND_CHN_T_MASK_BR; } if (eld[7] & 0x10) /* Rear center */ channels |= SND_CHN_T_MASK_BC; @@ -326,9 +320,11 @@ if (tpins & 0x0010) { /* If there is no back pin, report side as back. */ if ((as->pinset & 0x0004) == 0) - channels |= SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR; + channels |= SND_CHN_T_MASK_BL | + SND_CHN_T_MASK_BR; else - channels |= SND_CHN_T_MASK_SL | SND_CHN_T_MASK_SR; + channels |= SND_CHN_T_MASK_SL | + SND_CHN_T_MASK_SR; } } else if (as->mixed) { /* Mixed assoc can be only stereo or theoretically mono. */ @@ -337,15 +333,13 @@ else channels |= SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR; } - if (channels) { /* We have some usable channels info. */ + if (channels) { /* We have some usable channels info. */ HDA_BOOTVERBOSE( - device_printf(pdevinfo->dev, "%s channel set is: ", - as->dir == HDAA_CTL_OUT ? "Playback" : "Recording"); - for (i = 0; i < SND_CHN_T_MAX; i++) - if (channels & (1 << i)) - printf("%s, ", channel_names[i]); - printf("\n"); - ); + device_printf(pdevinfo->dev, "%s channel set is: ", + as->dir == HDAA_CTL_OUT ? "Playback" : "Recording"); + for (i = 0; i < SND_CHN_T_MAX; i++) if (channels & (1 << i)) + printf("%s, ", channel_names[i]); + printf("\n");); /* Look for maximal fitting matrix. */ for (i = 0; i < sizeof(matrixes) / sizeof(struct matrix); i++) { if (as->pinset != 0 && matrixes[i].analog == 0) @@ -362,13 +356,11 @@ sub = (total == 6 || total == 8) ? 1 : 0; } HDA_BOOTVERBOSE( - device_printf(pdevinfo->dev, - "%s channel matrix is: %s%d.%d (%s)\n", - as->dir == HDAA_CTL_OUT ? "Playback" : "Recording", - assume ? "unknown, assuming " : "", total - sub, sub, - cpins != 0 ? "connected" : - (upins != 0 ? "unknown" : "disconnected")); - ); + device_printf(pdevinfo->dev, "%s channel matrix is: %s%d.%d (%s)\n", + as->dir == HDAA_CTL_OUT ? "Playback" : "Recording", + assume ? "unknown, assuming " : "", total - sub, sub, + cpins != 0 ? "connected" : + (upins != 0 ? "unknown" : "disconnected"));); } /* @@ -384,22 +376,18 @@ uint32_t val; int j, connected = w->wclass.pin.connected; - HDA_BOOTVERBOSE( - device_printf((as->pdevinfo && as->pdevinfo->dev) ? - as->pdevinfo->dev : devinfo->dev, - "Redirect output to: %s\n", - connected ? "headphones": "main"); - ); + HDA_BOOTVERBOSE(device_printf((as->pdevinfo && as->pdevinfo->dev) ? + as->pdevinfo->dev : + devinfo->dev, + "Redirect output to: %s\n", connected ? "headphones" : "main");); /* (Un)Mute headphone pin. */ - ctl = hdaa_audio_ctl_amp_get(devinfo, - w->nid, HDAA_CTL_IN, -1, 1); + ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_IN, -1, 1); if (ctl != NULL && ctl->mute) { /* If pin has muter - use it. */ val = connected ? 0 : 1; if (val != ctl->forcemute) { ctl->forcemute = val; - hdaa_audio_ctl_amp_set(ctl, - HDAA_AMP_MUTE_DEFAULT, + hdaa_audio_ctl_amp_set(ctl, HDAA_AMP_MUTE_DEFAULT, HDAA_AMP_VOL_DEFAULT, HDAA_AMP_VOL_DEFAULT); } } else { @@ -413,24 +401,23 @@ if (val != w->wclass.pin.ctrl) { w->wclass.pin.ctrl = val; hda_command(devinfo->dev, - HDA_CMD_SET_PIN_WIDGET_CTRL(0, - w->nid, w->wclass.pin.ctrl)); + HDA_CMD_SET_PIN_WIDGET_CTRL(0, w->nid, + w->wclass.pin.ctrl)); } } /* (Un)Mute other pins. */ for (j = 0; j < 15; j++) { if (as->pins[j] <= 0) continue; - ctl = hdaa_audio_ctl_amp_get(devinfo, - as->pins[j], HDAA_CTL_IN, -1, 1); + ctl = hdaa_audio_ctl_amp_get(devinfo, as->pins[j], HDAA_CTL_IN, + -1, 1); if (ctl != NULL && ctl->mute) { /* If pin has muter - use it. */ val = connected ? 1 : 0; if (val == ctl->forcemute) continue; ctl->forcemute = val; - hdaa_audio_ctl_amp_set(ctl, - HDAA_AMP_MUTE_DEFAULT, + hdaa_audio_ctl_amp_set(ctl, HDAA_AMP_MUTE_DEFAULT, HDAA_AMP_VOL_DEFAULT, HDAA_AMP_VOL_DEFAULT); continue; } @@ -446,8 +433,8 @@ if (val != w1->wclass.pin.ctrl) { w1->wclass.pin.ctrl = val; hda_command(devinfo->dev, - HDA_CMD_SET_PIN_WIDGET_CTRL(0, - w1->nid, w1->wclass.pin.ctrl)); + HDA_CMD_SET_PIN_WIDGET_CTRL(0, w1->nid, + w1->wclass.pin.ctrl)); } } } @@ -515,10 +502,9 @@ /* Just take first one. */ mask = (1 << (ffs(mask) - 1)); HDA_BOOTVERBOSE( - hdaa_audio_ctl_ossmixer_mask2allname(mask, buf, sizeof(buf)); - device_printf(pdevinfo->dev, - "Automatically set rec source to: %s\n", buf); - ); + hdaa_audio_ctl_ossmixer_mask2allname(mask, buf, sizeof(buf)); + device_printf(pdevinfo->dev, + "Automatically set rec source to: %s\n", buf);); hdaa_unlock(devinfo); mix_setrecsrc(pdevinfo->mixer, mask); hdaa_lock(devinfo); @@ -535,8 +521,8 @@ uint32_t res; int connected, old; - if (w->enable == 0 || w->type != - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) + if (w->enable == 0 || + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) return; if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(w->wclass.pin.cap) == 0 || @@ -551,13 +537,11 @@ if (connected == old) return; w->wclass.pin.connected = connected; - HDA_BOOTVERBOSE( - if (connected || old != 2) { - device_printf(devinfo->dev, - "Pin sense: nid=%d sense=0x%08x (%sconnected)\n", - w->nid, res, !connected ? "dis" : ""); - } - ); + HDA_BOOTVERBOSE(if (connected || old != 2) { + device_printf(devinfo->dev, + "Pin sense: nid=%d sense=0x%08x (%sconnected)\n", w->nid, + res, !connected ? "dis" : ""); + }); as = &devinfo->as[w->bindas]; if (as->hpredir >= 0 && as->pins[15] == w->nid) @@ -587,8 +571,8 @@ if (devinfo->as[i].hpredir < 0) continue; w = hdaa_widget_get(devinfo, devinfo->as[i].pins[15]); - if (w == NULL || w->enable == 0 || w->type != - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) + if (w == NULL || w->enable == 0 || + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) continue; hdaa_presence_handler(w); } @@ -607,40 +591,32 @@ if (w->eld == NULL || w->eld_len < 4) return; - device_printf(dev, - "ELD nid=%d: ELD_Ver=%u Baseline_ELD_Len=%u\n", + device_printf(dev, "ELD nid=%d: ELD_Ver=%u Baseline_ELD_Len=%u\n", w->nid, w->eld[0] >> 3, w->eld[2]); if ((w->eld[0] >> 3) != 0x02) return; mnl = w->eld[4] & 0x1f; - device_printf(dev, - "ELD nid=%d: CEA_EDID_Ver=%u MNL=%u\n", - w->nid, w->eld[4] >> 5, mnl); + device_printf(dev, "ELD nid=%d: CEA_EDID_Ver=%u MNL=%u\n", w->nid, + w->eld[4] >> 5, mnl); sadc = w->eld[5] >> 4; device_printf(dev, - "ELD nid=%d: SAD_Count=%u Conn_Type=%u S_AI=%u HDCP=%u\n", - w->nid, sadc, (w->eld[5] >> 2) & 0x3, - (w->eld[5] >> 1) & 0x1, w->eld[5] & 0x1); - device_printf(dev, - "ELD nid=%d: Aud_Synch_Delay=%ums\n", - w->nid, w->eld[6] * 2); - device_printf(dev, - "ELD nid=%d: Channels=0x%b\n", - w->nid, w->eld[7], + "ELD nid=%d: SAD_Count=%u Conn_Type=%u S_AI=%u HDCP=%u\n", w->nid, + sadc, (w->eld[5] >> 2) & 0x3, (w->eld[5] >> 1) & 0x1, + w->eld[5] & 0x1); + device_printf(dev, "ELD nid=%d: Aud_Synch_Delay=%ums\n", w->nid, + w->eld[6] * 2); + device_printf(dev, "ELD nid=%d: Channels=0x%b\n", w->nid, w->eld[7], "\020\07RLRC\06FLRC\05RC\04RLR\03FC\02LFE\01FLR"); device_printf(dev, - "ELD nid=%d: Port_ID=0x%02x%02x%02x%02x%02x%02x%02x%02x\n", - w->nid, w->eld[8], w->eld[9], w->eld[10], w->eld[11], - w->eld[12], w->eld[13], w->eld[14], w->eld[15]); - device_printf(dev, - "ELD nid=%d: Manufacturer_Name=0x%02x%02x\n", - w->nid, w->eld[16], w->eld[17]); - device_printf(dev, - "ELD nid=%d: Product_Code=0x%02x%02x\n", - w->nid, w->eld[18], w->eld[19]); - device_printf(dev, - "ELD nid=%d: Monitor_Name_String='%.*s'\n", - w->nid, mnl, &w->eld[20]); + "ELD nid=%d: Port_ID=0x%02x%02x%02x%02x%02x%02x%02x%02x\n", w->nid, + w->eld[8], w->eld[9], w->eld[10], w->eld[11], w->eld[12], + w->eld[13], w->eld[14], w->eld[15]); + device_printf(dev, "ELD nid=%d: Manufacturer_Name=0x%02x%02x\n", w->nid, + w->eld[16], w->eld[17]); + device_printf(dev, "ELD nid=%d: Product_Code=0x%02x%02x\n", w->nid, + w->eld[18], w->eld[19]); + device_printf(dev, "ELD nid=%d: Monitor_Name_String='%.*s'\n", w->nid, + mnl, &w->eld[20]); for (i = 0; i < sadc; i++) { sad = &w->eld[20 + mnl + i * 3]; fmt = (sad[0] >> 3) & 0x0f; @@ -651,14 +627,13 @@ else fmt += 14; } - device_printf(dev, - "ELD nid=%d: %s %dch freqs=0x%b", - w->nid, HDA_HDMI_CODING_TYPES[fmt], (sad[0] & 0x07) + 1, - sad[1], "\020\007192\006176\00596\00488\00348\00244\00132"); + device_printf(dev, "ELD nid=%d: %s %dch freqs=0x%b", w->nid, + HDA_HDMI_CODING_TYPES[fmt], (sad[0] & 0x07) + 1, sad[1], + "\020\007192\006176\00596\00488\00348\00244\00132"); switch (fmt) { case HDA_HDMI_CODING_TYPE_LPCM: - printf(" sizes=0x%b", - sad[2] & 0x07, "\020\00324\00220\00116"); + printf(" sizes=0x%b", sad[2] & 0x07, + "\020\00324\00220\00116"); break; case HDA_HDMI_CODING_TYPE_AC3: case HDA_HDMI_CODING_TYPE_MPEG1: @@ -684,8 +659,8 @@ uint32_t res; int i; - if (w->enable == 0 || w->type != - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) + if (w->enable == 0 || + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) return; if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(w->wclass.pin.cap) == 0 || @@ -700,14 +675,12 @@ free(w->eld, M_HDAA); w->eld = NULL; } - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "Pin sense: nid=%d sense=0x%08x " - "(%sconnected, ELD %svalid)\n", - w->nid, res, - (res & HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT) ? "" : "dis", - (res & HDA_CMD_GET_PIN_SENSE_ELD_VALID) ? "" : "in"); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + "Pin sense: nid=%d sense=0x%08x " + "(%sconnected, ELD %svalid)\n", + w->nid, res, + (res & HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT) ? "" : "dis", + (res & HDA_CMD_GET_PIN_SENSE_ELD_VALID) ? "" : "in");); if ((res & HDA_CMD_GET_PIN_SENSE_ELD_VALID) == 0) return; @@ -729,9 +702,7 @@ if (res & 0x80000000) w->eld[i] = res & 0xff; } - HDA_BOOTVERBOSE( - hdaa_eld_dump(w); - ); + HDA_BOOTVERBOSE(hdaa_eld_dump(w);); hdaa_channels_handler(&devinfo->as[w->bindas]); } @@ -747,36 +718,37 @@ for (i = devinfo->startnode; i < devinfo->endnode; i++) { w = hdaa_widget_get(devinfo, i); - if (w == NULL || w->enable == 0 || w->type != - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) + if (w == NULL || w->enable == 0 || + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) continue; if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap)) { if (w->unsol < 0) - w->unsol = HDAC_UNSOL_ALLOC( - device_get_parent(devinfo->dev), + w->unsol = HDAC_UNSOL_ALLOC(device_get_parent( + devinfo->dev), devinfo->dev, w->nid); hda_command(devinfo->dev, HDA_CMD_SET_UNSOLICITED_RESPONSE(0, w->nid, - HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE | w->unsol)); + HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE | + w->unsol)); } as = &devinfo->as[w->bindas]; if (as->hpredir >= 0 && as->pins[15] == w->nid) { - if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(w->wclass.pin.cap) == 0 || - (HDA_CONFIG_DEFAULTCONF_MISC(w->wclass.pin.config) & 1) != 0) { + if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP( + w->wclass.pin.cap) == 0 || + (HDA_CONFIG_DEFAULTCONF_MISC(w->wclass.pin.config) & + 1) != 0) { device_printf(devinfo->dev, "No presence detection support at nid %d\n", w->nid); } else { if (w->unsol < 0) poll = 1; - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "Headphones redirection for " - "association %d nid=%d using %s.\n", - w->bindas, w->nid, - (w->unsol < 0) ? "polling" : - "unsolicited responses"); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + "Headphones redirection for " + "association %d nid=%d using %s.\n", + w->bindas, w->nid, + (w->unsol < 0) ? "polling" : + "unsolicited responses");); } } hdaa_presence_handler(w); @@ -786,8 +758,8 @@ hdaa_eld_handler(w); } if (poll) { - callout_reset(&devinfo->poll_jack, 1, - hdaa_jack_poll_callback, devinfo); + callout_reset(&devinfo->poll_jack, 1, hdaa_jack_poll_callback, + devinfo); } } @@ -800,15 +772,14 @@ callout_stop(&devinfo->poll_jack); for (i = devinfo->startnode; i < devinfo->endnode; i++) { w = hdaa_widget_get(devinfo, i); - if (w == NULL || w->enable == 0 || w->type != - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) + if (w == NULL || w->enable == 0 || + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) continue; if (w->unsol < 0) continue; hda_command(devinfo->dev, HDA_CMD_SET_UNSOLICITED_RESPONSE(0, w->nid, 0)); - HDAC_UNSOL_FREE( - device_get_parent(devinfo->dev), devinfo->dev, + HDAC_UNSOL_FREE(device_get_parent(devinfo->dev), devinfo->dev, w->unsol); w->unsol = -1; } @@ -830,12 +801,15 @@ ival = strtol(value, &bad, 10); if (strcmp(key, "seq") == 0) { config &= ~HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK; - config |= ((ival << HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT) & - HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK); + config |= + ((ival << HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT) & + HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK); } else if (strcmp(key, "as") == 0) { config &= ~HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK; - config |= ((ival << HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT) & - HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK); + config |= + ((ival + << HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT) & + HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK); } else if (strcmp(key, "misc") == 0) { config &= ~HDA_CONFIG_DEFAULTCONF_MISC_MASK; config |= ((ival << HDA_CONFIG_DEFAULTCONF_MISC_SHIFT) & @@ -843,63 +817,78 @@ } else if (strcmp(key, "color") == 0) { config &= ~HDA_CONFIG_DEFAULTCONF_COLOR_MASK; if (bad[0] == 0) { - config |= ((ival << HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT) & - HDA_CONFIG_DEFAULTCONF_COLOR_MASK); + config |= + ((ival + << HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT) & + HDA_CONFIG_DEFAULTCONF_COLOR_MASK); } for (i = 0; i < 16; i++) { if (strcasecmp(HDA_COLORS[i], value) == 0) { - config |= (i << HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT); + config |= (i + << HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT); break; } } } else if (strcmp(key, "ctype") == 0) { config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK; if (bad[0] == 0) { - config |= ((ival << HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT) & - HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK); + config |= + ((ival + << HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT) & + HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK); } for (i = 0; i < 16; i++) { if (strcasecmp(HDA_CONNECTORS[i], value) == 0) { - config |= (i << HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT); + config |= (i + << HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT); break; } } } else if (strcmp(key, "device") == 0) { config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK; if (bad[0] == 0) { - config |= ((ival << HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT) & - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK); + config |= + ((ival + << HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT) & + HDA_CONFIG_DEFAULTCONF_DEVICE_MASK); continue; } for (i = 0; i < 16; i++) { if (strcasecmp(HDA_DEVS[i], value) == 0) { - config |= (i << HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT); + config |= (i + << HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT); break; } } } else if (strcmp(key, "loc") == 0) { config &= ~HDA_CONFIG_DEFAULTCONF_LOCATION_MASK; if (bad[0] == 0) { - config |= ((ival << HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT) & - HDA_CONFIG_DEFAULTCONF_LOCATION_MASK); + config |= + ((ival + << HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT) & + HDA_CONFIG_DEFAULTCONF_LOCATION_MASK); continue; } for (i = 0; i < 64; i++) { if (strcasecmp(HDA_LOCS[i], value) == 0) { - config |= (i << HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT); + config |= (i + << HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT); break; } } } else if (strcmp(key, "conn") == 0) { config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK; if (bad[0] == 0) { - config |= ((ival << HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT) & - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK); + config |= + ((ival + << HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT) & + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK); continue; } for (i = 0; i < 4; i++) { if (strcasecmp(HDA_CONNS[i], value) == 0) { - config |= (i << HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT); + config |= (i + << HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT); break; } } @@ -944,12 +933,12 @@ char buf[32]; config = orig = w->wclass.pin.config; - snprintf(buf, sizeof(buf), "cad%u.nid%u.config", - hda_get_codec_id(dev), w->nid); - if (resource_string_value(device_get_name( - device_get_parent(device_get_parent(dev))), - device_get_unit(device_get_parent(device_get_parent(dev))), - buf, &res) == 0) { + snprintf(buf, sizeof(buf), "cad%u.nid%u.config", hda_get_codec_id(dev), + w->nid); + if (resource_string_value(device_get_name(device_get_parent( + device_get_parent(dev))), + device_get_unit(device_get_parent(device_get_parent(dev))), buf, + &res) == 0) { if (strncmp(res, "0x", 2) == 0) { config = strtol(res + 2, NULL, 16); } else { @@ -958,19 +947,16 @@ } snprintf(buf, sizeof(buf), "nid%u.config", w->nid); if (resource_string_value(device_get_name(dev), device_get_unit(dev), - buf, &res) == 0) { + buf, &res) == 0) { if (strncmp(res, "0x", 2) == 0) { config = strtol(res + 2, NULL, 16); } else { config = hdaa_widget_pin_patch(config, res); } } - HDA_BOOTVERBOSE( - if (config != orig) - device_printf(w->devinfo->dev, - "Patching pin config nid=%u 0x%08x -> 0x%08x\n", - w->nid, orig, config); - ); + HDA_BOOTVERBOSE(if (config != orig) device_printf(w->devinfo->dev, + "Patching pin config nid=%u 0x%08x -> 0x%08x\n", w->nid, orig, + config);); w->wclass.pin.newconf = w->wclass.pin.config = config; } @@ -1076,7 +1062,8 @@ sbuf_printf(sb, "\n"); conf = w->wclass.pin.config; sbuf_printf(sb, " Pin config: 0x%08x", conf); - sbuf_printf(sb, " as=%d seq=%d " + sbuf_printf(sb, + " as=%d seq=%d " "device=%s conn=%s ctype=%s loc=%s color=%s misc=%d\n", HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf), HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf), @@ -1095,14 +1082,14 @@ sbuf_printf(sb, " OUT"); if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) { if ((w->wclass.pin.ctrl & - HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) == 0x03) + HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) == 0x03) sbuf_printf(sb, " HBR"); else if ((w->wclass.pin.ctrl & - HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) != 0) + HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) != 0) sbuf_printf(sb, " EPTs"); } else { if ((w->wclass.pin.ctrl & - HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) != 0) + HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) != 0) sbuf_printf(sb, " VREFs"); } sbuf_printf(sb, "\n"); @@ -1116,12 +1103,11 @@ offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(cap); size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(cap); step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(cap); - sbuf_printf(sb, " %s amp: 0x%08x " + sbuf_printf(sb, + " %s amp: 0x%08x " "mute=%d step=%d size=%d offset=%d (%+d/%+ddB)\n", - banner, cap, - HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap), - step, size, offset, - ((0 - offset) * (size + 1)) / 4, + banner, cap, HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap), step, size, + offset, ((0 - offset) * (size + 1)) / 4, ((step - offset) * (size + 1)) / 4); } @@ -1140,57 +1126,59 @@ sbuf_printf(&sb, "%s%s\n", w->name, (w->enable == 0) ? " [DISABLED]" : ""); - sbuf_printf(&sb, " Widget cap: 0x%08x", - w->param.widget_cap); + sbuf_printf(&sb, " Widget cap: 0x%08x", w->param.widget_cap); if (w->param.widget_cap & 0x0ee1) { if (HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(w->param.widget_cap)) - sbuf_printf(&sb, " LRSWAP"); + sbuf_printf(&sb, " LRSWAP"); if (HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(w->param.widget_cap)) - sbuf_printf(&sb, " PWR"); + sbuf_printf(&sb, " PWR"); if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) - sbuf_printf(&sb, " DIGITAL"); + sbuf_printf(&sb, " DIGITAL"); if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap)) - sbuf_printf(&sb, " UNSOL"); + sbuf_printf(&sb, " UNSOL"); if (HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(w->param.widget_cap)) - sbuf_printf(&sb, " PROC"); + sbuf_printf(&sb, " PROC"); if (HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(w->param.widget_cap)) - sbuf_printf(&sb, " STRIPE(x%d)", - 1 << (fls(w->wclass.conv.stripecap) - 1)); + sbuf_printf(&sb, " STRIPE(x%d)", + 1 << (fls(w->wclass.conv.stripecap) - 1)); j = HDA_PARAM_AUDIO_WIDGET_CAP_CC(w->param.widget_cap); if (j == 1) - sbuf_printf(&sb, " STEREO"); + sbuf_printf(&sb, " STEREO"); else if (j > 1) - sbuf_printf(&sb, " %dCH", j + 1); + sbuf_printf(&sb, " %dCH", j + 1); } sbuf_printf(&sb, "\n"); if (w->bindas != -1) { - sbuf_printf(&sb, " Association: %d (0x%04x)\n", - w->bindas, w->bindseqmask); + sbuf_printf(&sb, " Association: %d (0x%04x)\n", w->bindas, + w->bindseqmask); } if (w->ossmask != 0 || w->ossdev >= 0) { sbuf_printf(&sb, " OSS: %s", - hdaa_audio_ctl_ossmixer_mask2allname(w->ossmask, buf, sizeof(buf))); + hdaa_audio_ctl_ossmixer_mask2allname(w->ossmask, buf, + sizeof(buf))); if (w->ossdev >= 0) - sbuf_printf(&sb, " (%s)", ossnames[w->ossdev]); + sbuf_printf(&sb, " (%s)", ossnames[w->ossdev]); sbuf_printf(&sb, "\n"); } if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT || w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) { - hdaa_dump_audio_formats_sb(&sb, - w->param.supp_stream_formats, + hdaa_dump_audio_formats_sb(&sb, w->param.supp_stream_formats, w->param.supp_pcm_size_rate); - } else if (w->type == - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX || w->waspin) + } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX || + w->waspin) hdaa_dump_pin_sb(&sb, w); if (w->param.eapdbtl != HDA_INVALID) { sbuf_printf(&sb, " EAPD: 0x%08x%s%s%s\n", w->param.eapdbtl, (w->param.eapdbtl & HDA_CMD_SET_EAPD_BTL_ENABLE_LR_SWAP) ? - " LRSWAP" : "", + " LRSWAP" : + "", (w->param.eapdbtl & HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD) ? - " EAPD" : "", + " EAPD" : + "", (w->param.eapdbtl & HDA_CMD_SET_EAPD_BTL_ENABLE_BTL) ? - " BTL" : ""); + " BTL" : + ""); } if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(w->param.widget_cap) && w->param.outamp_cap != 0) @@ -1203,14 +1191,14 @@ for (j = 0; j < w->nconns; j++) { cw = hdaa_widget_get(devinfo, w->conns[j]); sbuf_printf(&sb, " + %s<- nid=%d [%s]", - (w->connsenable[j] == 0)?"[DISABLED] ":"", - w->conns[j], (cw == NULL) ? "GHOST!" : cw->name); + (w->connsenable[j] == 0) ? "[DISABLED] " : "", w->conns[j], + (cw == NULL) ? "GHOST!" : cw->name); if (cw == NULL) sbuf_printf(&sb, " [UNKNOWN]"); else if (cw->enable == 0) sbuf_printf(&sb, " [DISABLED]"); - if (w->nconns > 1 && w->selconn == j && w->type != - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) + if (w->nconns > 1 && w->selconn == j && + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) sbuf_printf(&sb, " (selected)"); sbuf_printf(&sb, "\n"); } @@ -1227,10 +1215,10 @@ uint32_t conf; conf = *(uint32_t *)oidp->oid_arg1; - snprintf(buf, sizeof(buf), "0x%08x as=%d seq=%d " + snprintf(buf, sizeof(buf), + "0x%08x as=%d seq=%d " "device=%s conn=%s ctype=%s loc=%s color=%s misc=%d", - conf, - HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf), + conf, HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf), HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf), HDA_DEVS[HDA_CONFIG_DEFAULTCONF_DEVICE(conf)], HDA_CONNS[HDA_CONFIG_DEFAULTCONF_CONNECTIVITY(conf)], @@ -1255,14 +1243,14 @@ int i = 0, j, k, len, inv; for (;;) { - while (str[i] != '\0' && - (str[i] == ',' || isspace(str[i]) != 0)) + while ( + str[i] != '\0' && (str[i] == ',' || isspace(str[i]) != 0)) i++; if (str[i] == '\0') return; j = i; - while (str[j] != '\0' && - !(str[j] == ',' || isspace(str[j]) != 0)) + while ( + str[j] != '\0' && !(str[j] == ',' || isspace(str[j]) != 0)) j++; len = j - i; if (len > 2 && strncmp(str + i, "no", 2) == 0) @@ -1270,8 +1258,8 @@ else inv = 0; for (k = 0; len > inv && k < nitems(hdaa_quirks_tab); k++) { - if (strncmp(str + i + inv, - hdaa_quirks_tab[k].key, len - inv) != 0) + if (strncmp(str + i + inv, hdaa_quirks_tab[k].key, + len - inv) != 0) continue; if (len - inv != strlen(hdaa_quirks_tab[k].key)) continue; @@ -1332,7 +1320,7 @@ } if (resource_string_value(device_get_name(devinfo->dev), - device_get_unit(devinfo->dev), "config", &res) == 0) { + device_get_unit(devinfo->dev), "config", &res) == 0) { if (res != NULL && strlen(res) > 0) hdaa_config_fetch(res, &quirks_on, &quirks_off); devinfo->quirks |= quirks_on; @@ -1342,13 +1330,11 @@ devinfo->newquirks = devinfo->quirks; else devinfo->quirks = devinfo->newquirks; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - "Config options: 0x%08x\n", devinfo->quirks); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, "Config options: 0x%08x\n", + devinfo->quirks);); if (resource_string_value(device_get_name(devinfo->dev), - device_get_unit(devinfo->dev), "gpio_config", &res) == 0) { + device_get_unit(devinfo->dev), "gpio_config", &res) == 0) { if (strncmp(res, "0x", 2) == 0) { devinfo->gpio = strtol(res + 2, NULL, 16); } else { @@ -1364,14 +1350,13 @@ else devinfo->gpo = devinfo->newgpo; HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, "GPIO config options:"); - for (i = 0; i < 7; i++) { - x = (devinfo->gpio & HDAA_GPIO_MASK(i)) >> HDAA_GPIO_SHIFT(i); - if (x != 0) - printf(" %d=%s", i, HDA_GPIO_ACTIONS[x]); - } - printf("\n"); - ); + device_printf(devinfo->dev, "GPIO config options:"); + for (i = 0; i < 7; i++) { + x = (devinfo->gpio & HDAA_GPIO_MASK(i)) >> + HDAA_GPIO_SHIFT(i); + if (x != 0) + printf(" %d=%s", i, HDA_GPIO_ACTIONS[x]); + } printf("\n");); } static void @@ -1396,11 +1381,11 @@ max = (sizeof(w->conns) / sizeof(w->conns[0])) - 1; prevcnid = 0; -#define CONN_RMASK(e) (1 << ((32 / (e)) - 1)) -#define CONN_NMASK(e) (CONN_RMASK(e) - 1) -#define CONN_RESVAL(r, e, n) ((r) >> ((32 / (e)) * (n))) -#define CONN_RANGE(r, e, n) (CONN_RESVAL(r, e, n) & CONN_RMASK(e)) -#define CONN_CNID(r, e, n) (CONN_RESVAL(r, e, n) & CONN_NMASK(e)) +#define CONN_RMASK(e) (1 << ((32 / (e)) - 1)) +#define CONN_NMASK(e) (CONN_RMASK(e) - 1) +#define CONN_RESVAL(r, e, n) ((r) >> ((32 / (e)) * (n))) +#define CONN_RANGE(r, e, n) (CONN_RESVAL(r, e, n) & CONN_RMASK(e)) +#define CONN_CNID(r, e, n) (CONN_RESVAL(r, e, n) & CONN_NMASK(e)) for (i = 0; i < ents; i += entnum) { res = hda_command(w->devinfo->dev, @@ -1413,20 +1398,18 @@ "WARNING: nid=%d has zero cnid " "entnum=%d j=%d index=%d " "entries=%d found=%d res=0x%08x\n", - nid, entnum, j, i, - ents, w->nconns, res); + nid, entnum, j, i, ents, w->nconns, + res); else goto getconns_out; } if (cnid < w->devinfo->startnode || cnid >= w->devinfo->endnode) { - HDA_BOOTVERBOSE( - device_printf(w->devinfo->dev, - "WARNING: nid=%d has cnid outside " - "of the AFG range j=%d " - "entnum=%d index=%d res=0x%08x\n", - nid, j, entnum, i, res); - ); + HDA_BOOTVERBOSE(device_printf(w->devinfo->dev, + "WARNING: nid=%d has cnid outside " + "of the AFG range j=%d " + "entnum=%d index=%d res=0x%08x\n", + nid, j, entnum, i, res);); } if (CONN_RANGE(res, entnum, j) == 0) addcnid = cnid; @@ -1435,8 +1418,7 @@ "WARNING: Invalid child range " "nid=%d index=%d j=%d entnum=%d " "prevcnid=%d cnid=%d res=0x%08x\n", - nid, i, j, entnum, prevcnid, - cnid, res); + nid, i, j, entnum, prevcnid, cnid, res); addcnid = cnid; } else addcnid = prevcnid + 1; @@ -1475,25 +1457,21 @@ if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(wcap)) { if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap)) - w->param.outamp_cap = - hda_command(dev, + w->param.outamp_cap = hda_command(dev, HDA_CMD_GET_PARAMETER(0, nid, - HDA_PARAM_OUTPUT_AMP_CAP)); + HDA_PARAM_OUTPUT_AMP_CAP)); else - w->param.outamp_cap = - w->devinfo->outamp_cap; + w->param.outamp_cap = w->devinfo->outamp_cap; } else w->param.outamp_cap = 0; if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(wcap)) { if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap)) - w->param.inamp_cap = - hda_command(dev, + w->param.inamp_cap = hda_command(dev, HDA_CMD_GET_PARAMETER(0, nid, - HDA_PARAM_INPUT_AMP_CAP)); + HDA_PARAM_INPUT_AMP_CAP)); else - w->param.inamp_cap = - w->devinfo->inamp_cap; + w->param.inamp_cap = w->devinfo->inamp_cap; } else w->param.inamp_cap = 0; @@ -1502,13 +1480,15 @@ if (HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(wcap)) { cap = hda_command(dev, HDA_CMD_GET_PARAMETER(0, nid, - HDA_PARAM_SUPP_STREAM_FORMATS)); - w->param.supp_stream_formats = (cap != 0) ? cap : + HDA_PARAM_SUPP_STREAM_FORMATS)); + w->param.supp_stream_formats = (cap != 0) ? + cap : w->devinfo->supp_stream_formats; cap = hda_command(dev, HDA_CMD_GET_PARAMETER(0, nid, - HDA_PARAM_SUPP_PCM_SIZE_RATE)); - w->param.supp_pcm_size_rate = (cap != 0) ? cap : + HDA_PARAM_SUPP_PCM_SIZE_RATE)); + w->param.supp_pcm_size_rate = (cap != 0) ? + cap : w->devinfo->supp_pcm_size_rate; } else { w->param.supp_stream_formats = @@ -1517,8 +1497,10 @@ w->devinfo->supp_pcm_size_rate; } if (HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(w->param.widget_cap)) { - w->wclass.conv.stripecap = hda_command(dev, - HDA_CMD_GET_STRIPE_CONTROL(0, w->nid)) >> 20; + w->wclass.conv.stripecap = + hda_command(dev, + HDA_CMD_GET_STRIPE_CONTROL(0, w->nid)) >> + 20; } else w->wclass.conv.stripecap = 1; } else { @@ -1548,20 +1530,20 @@ hdaa_unlock(w->devinfo); snprintf(buf, sizeof(buf), "nid%d", w->nid); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - buf, CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, - w, 0, hdaa_sysctl_caps, "A", "Node capabilities"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, buf, + CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, w, 0, + hdaa_sysctl_caps, "A", "Node capabilities"); if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) { snprintf(buf, sizeof(buf), "nid%d_config", w->nid); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - buf, CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, buf, + CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, &w->wclass.pin.newconf, 0, hdaa_sysctl_config, "A", "Current pin configuration"); snprintf(buf, sizeof(buf), "nid%d_original", w->nid); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - buf, CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, buf, + CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, &w->wclass.pin.original, 0, hdaa_sysctl_config, "A", "Original pin configuration"); } @@ -1614,8 +1596,9 @@ int conn, color; config = w->wclass.pin.config; - devstr = HDA_DEVS[(config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) >> - HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT]; + devstr = + HDA_DEVS[(config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) >> + HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT]; conn = (config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) >> HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT; color = (config & HDA_CONFIG_DEFAULTCONF_COLOR_MASK) >> @@ -1636,41 +1619,36 @@ hdaa_widget_get(struct hdaa_devinfo *devinfo, nid_t nid) { if (devinfo == NULL || devinfo->widget == NULL || - nid < devinfo->startnode || nid >= devinfo->endnode) + nid < devinfo->startnode || nid >= devinfo->endnode) return (NULL); return (&devinfo->widget[nid - devinfo->startnode]); } static void hdaa_audio_ctl_amp_set_internal(struct hdaa_devinfo *devinfo, nid_t nid, - int index, int lmute, int rmute, - int left, int right, int dir) + int index, int lmute, int rmute, int left, int right, int dir) { uint16_t v = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - "Setting amplifier nid=%d index=%d %s mute=%d/%d vol=%d/%d\n", - nid,index,dir ? "in" : "out",lmute,rmute,left,right); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + "Setting amplifier nid=%d index=%d %s mute=%d/%d vol=%d/%d\n", nid, + index, dir ? "in" : "out", lmute, rmute, left, right);); if (left != right || lmute != rmute) { v = (1 << (15 - dir)) | (1 << 13) | (index << 8) | (lmute << 7) | left; - hda_command(devinfo->dev, - HDA_CMD_SET_AMP_GAIN_MUTE(0, nid, v)); + hda_command(devinfo->dev, HDA_CMD_SET_AMP_GAIN_MUTE(0, nid, v)); v = (1 << (15 - dir)) | (1 << 12) | (index << 8) | (rmute << 7) | right; } else v = (1 << (15 - dir)) | (3 << 12) | (index << 8) | (lmute << 7) | left; - hda_command(devinfo->dev, - HDA_CMD_SET_AMP_GAIN_MUTE(0, nid, v)); + hda_command(devinfo->dev, HDA_CMD_SET_AMP_GAIN_MUTE(0, nid, v)); } static void -hdaa_audio_ctl_amp_set(struct hdaa_audio_ctl *ctl, uint32_t mute, - int left, int right) +hdaa_audio_ctl_amp_set(struct hdaa_audio_ctl *ctl, uint32_t mute, int left, + int right) { nid_t nid; int lmute, rmute; @@ -1698,11 +1676,11 @@ } /* Apply effective values */ if (ctl->dir & HDAA_CTL_OUT) - hdaa_audio_ctl_amp_set_internal(ctl->widget->devinfo, nid, ctl->index, - lmute, rmute, left, right, 0); + hdaa_audio_ctl_amp_set_internal(ctl->widget->devinfo, nid, + ctl->index, lmute, rmute, left, right, 0); if (ctl->dir & HDAA_CTL_IN) - hdaa_audio_ctl_amp_set_internal(ctl->widget->devinfo, nid, ctl->index, - lmute, rmute, left, right, 1); + hdaa_audio_ctl_amp_set_internal(ctl->widget->devinfo, nid, + ctl->index, lmute, rmute, left, right, 1); } static void @@ -1710,10 +1688,8 @@ { if (w == NULL || w->nconns < 1 || index > (w->nconns - 1)) return; - HDA_BOOTHVERBOSE( - device_printf(w->devinfo->dev, - "Setting selector nid=%d index=%d\n", w->nid, index); - ); + HDA_BOOTHVERBOSE(device_printf(w->devinfo->dev, + "Setting selector nid=%d index=%d\n", w->nid, index);); hda_command(w->devinfo->dev, HDA_CMD_SET_CONNECTION_SELECT_CONTROL(0, w->nid, index)); w->selconn = index; @@ -1725,7 +1701,7 @@ static void * hdaa_channel_init(kobj_t obj, void *data, struct snd_dbuf *b, - struct pcm_channel *c, int dir) + struct pcm_channel *c, int dir) { struct hdaa_chan *ch = data; struct hdaa_pcm_devinfo *pdevinfo = ch->pdevinfo; @@ -1745,9 +1721,9 @@ hdaa_unlock(devinfo); if (sndbuf_alloc(ch->b, bus_get_dma_tag(devinfo->dev), - hda_get_dma_nocache(devinfo->dev) ? BUS_DMA_NOCACHE : - BUS_DMA_COHERENT, - pdevinfo->chan_size) != 0) + hda_get_dma_nocache(devinfo->dev) ? BUS_DMA_NOCACHE : + BUS_DMA_COHERENT, + pdevinfo->chan_size) != 0) return (NULL); return (ch); @@ -1787,8 +1763,10 @@ /* If no match, just find nearest. */ for (i = 0; ch->pcmrates[i] != 0; i++) { spd = ch->pcmrates[i]; - threshold = spd + ((ch->pcmrates[i + 1] != 0) ? - ((ch->pcmrates[i + 1] - spd) >> 1) : 0); + threshold = spd + + ((ch->pcmrates[i + 1] != 0) ? + ((ch->pcmrates[i + 1] - spd) >> 1) : + 0); if (speed < threshold) break; } @@ -1844,37 +1822,38 @@ /* Mapping channel pairs to codec pins/converters. */ const static uint16_t convmap[2][5] = /* 1.0 2.0 4.0 5.1 7.1 */ - {{ 0x0010, 0x0001, 0x0201, 0x0231, 0x4231 }, /* no dup. */ - { 0x0010, 0x0001, 0x2201, 0x2231, 0x4231 }}; /* side dup. */ + { { 0x0010, 0x0001, 0x0201, 0x0231, 0x4231 }, /* no dup. */ + { 0x0010, 0x0001, 0x2201, 0x2231, + 0x4231 } }; /* side dup. */ /* Mapping formats to HDMI channel allocations. */ const static uint8_t hdmica[2][8] = /* 1 2 3 4 5 6 7 8 */ - {{ 0x02, 0x00, 0x04, 0x08, 0x0a, 0x0e, 0x12, 0x12 }, /* x.0 */ - { 0x01, 0x03, 0x01, 0x03, 0x09, 0x0b, 0x0f, 0x13 }}; /* x.1 */ + { { 0x02, 0x00, 0x04, 0x08, 0x0a, 0x0e, 0x12, 0x12 }, /* x.0 */ + { 0x01, 0x03, 0x01, 0x03, 0x09, 0x0b, 0x0f, + 0x13 } }; /* x.1 */ /* Mapping formats to HDMI channels order. */ const static uint32_t hdmich[2][8] = /* 1 / 5 2 / 6 3 / 7 4 / 8 */ - {{ 0xFFFF0F00, 0xFFFFFF10, 0xFFF2FF10, 0xFF32FF10, - 0xFF324F10, 0xF5324F10, 0x54326F10, 0x54326F10 }, /* x.0 */ - { 0xFFFFF000, 0xFFFF0100, 0xFFFFF210, 0xFFFF2310, - 0xFF32F410, 0xFF324510, 0xF6324510, 0x76325410 }}; /* x.1 */ + { { 0xFFFF0F00, 0xFFFFFF10, 0xFFF2FF10, 0xFF32FF10, 0xFF324F10, + 0xF5324F10, 0x54326F10, 0x54326F10 }, /* x.0 */ + { 0xFFFFF000, 0xFFFF0100, 0xFFFFF210, 0xFFFF2310, + 0xFF32F410, 0xFF324510, 0xF6324510, + 0x76325410 } }; /* x.1 */ int convmapid = -1; nid_t nid; uint8_t csum; totalchn = AFMT_CHANNEL(ch->fmt); totalextchn = AFMT_EXTCHANNEL(ch->fmt); - HDA_BOOTHVERBOSE( - device_printf(ch->pdevinfo->dev, - "PCMDIR_%s: Stream setup fmt=%08x (%d.%d) speed=%d\n", - (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", - ch->fmt, totalchn - totalextchn, totalextchn, ch->spd); - ); + HDA_BOOTHVERBOSE(device_printf(ch->pdevinfo->dev, + "PCMDIR_%s: Stream setup fmt=%08x (%d.%d) speed=%d\n", + (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", ch->fmt, + totalchn - totalextchn, totalextchn, ch->spd);); fmt = hdaa_stream_format(ch); /* Set channels to I/O converters mapping for known speaker setups. */ if ((as->pinset == 0x0007 || as->pinset == 0x0013) || /* Standard 5.1 */ - (as->pinset == 0x0017)) /* Standard 7.1 */ + (as->pinset == 0x0017)) /* Standard 7.1 */ convmapid = (ch->dir == PCMDIR_PLAY); dfmt = HDA_CMD_SET_DIGITAL_CONV_FMT1_DIGEN; @@ -1894,8 +1873,11 @@ } else { /* Map channels to I/O converters, if set. */ if (convmapid >= 0) - chn = (((convmap[convmapid][totalchn / 2] - >> i * 4) & 0xf) - 1) * 2; + chn = (((convmap[convmapid][totalchn / 2] >> + i * 4) & + 0xf) - + 1) * + 2; if (chn < 0 || chn >= totalchn) { c = 0; } else { @@ -1912,7 +1894,8 @@ HDA_CMD_SET_CONV_STREAM_CHAN(0, ch->io[i], c)); if (HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(w->param.widget_cap)) { hda_command(ch->devinfo->dev, - HDA_CMD_SET_STRIPE_CONTROL(0, w->nid, ch->stripectl)); + HDA_CMD_SET_STRIPE_CONTROL(0, w->nid, + ch->stripectl)); } cchn = HDA_PARAM_AUDIO_WIDGET_CAP_CC(w->param.widget_cap); if (cchn > 1 && chn < totalchn) { @@ -1920,14 +1903,12 @@ hda_command(ch->devinfo->dev, HDA_CMD_SET_CONV_CHAN_COUNT(0, ch->io[i], cchn)); } - HDA_BOOTHVERBOSE( - device_printf(ch->pdevinfo->dev, - "PCMDIR_%s: Stream setup nid=%d: " - "fmt=0x%04x, dfmt=0x%04x, chan=0x%04x, " - "chan_count=0x%02x, stripe=%d\n", - (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", - ch->io[i], fmt, dfmt, c, cchn, ch->stripectl); - ); + HDA_BOOTHVERBOSE(device_printf(ch->pdevinfo->dev, + "PCMDIR_%s: Stream setup nid=%d: " + "fmt=0x%04x, dfmt=0x%04x, chan=0x%04x, " + "chan_count=0x%02x, stripe=%d\n", + (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", ch->io[i], fmt, + dfmt, c, cchn, ch->stripectl);); for (j = 0; j < 16; j++) { if (as->dacs[ch->asindex][j] != ch->io[i]) continue; @@ -1943,8 +1924,12 @@ for (k = 0; k < 8; k++) { hda_command(ch->devinfo->dev, HDA_CMD_SET_HDMI_CHAN_SLOT(0, nid, - (((hdmich[totalextchn == 0 ? 0 : 1][totalchn - 1] - >> (k * 4)) & 0xf) << 4) | k)); + (((hdmich[totalextchn == 0 ? 0 : 1] + [totalchn - 1] >> + (k * 4)) & + 0xf) + << 4) | + k)); } /* @@ -1959,7 +1944,7 @@ wp->wclass.pin.ctrl |= 0x03; hda_command(ch->devinfo->dev, HDA_CMD_SET_PIN_WIDGET_CTRL(0, nid, - wp->wclass.pin.ctrl)); + wp->wclass.pin.ctrl)); } /* Stop audio infoframe transmission. */ @@ -1986,7 +1971,7 @@ HDA_CMD_SET_HDMI_DIP_DATA(0, nid, 0x1b)); hda_command(ch->devinfo->dev, HDA_CMD_SET_HDMI_DIP_DATA(0, nid, 0x44)); - } else { /* HDMI */ + } else { /* HDMI */ hda_command(ch->devinfo->dev, HDA_CMD_SET_HDMI_DIP_DATA(0, nid, 0x84)); hda_command(ch->devinfo->dev, @@ -1995,7 +1980,8 @@ HDA_CMD_SET_HDMI_DIP_DATA(0, nid, 0x0a)); csum = 0; csum -= 0x84 + 0x01 + 0x0a + (totalchn - 1) + - hdmica[totalextchn == 0 ? 0 : 1][totalchn - 1]; + hdmica[totalextchn == 0 ? 0 : 1] + [totalchn - 1]; hda_command(ch->devinfo->dev, HDA_CMD_SET_HDMI_DIP_DATA(0, nid, csum)); } @@ -2007,7 +1993,8 @@ HDA_CMD_SET_HDMI_DIP_DATA(0, nid, 0x00)); hda_command(ch->devinfo->dev, HDA_CMD_SET_HDMI_DIP_DATA(0, nid, - hdmica[totalextchn == 0 ? 0 : 1][totalchn - 1])); + hdmica[totalextchn == 0 ? 0 : 1] + [totalchn - 1])); /* Start audio infoframe transmission. */ hda_command(ch->devinfo->dev, @@ -2046,8 +2033,8 @@ } static int -hdaa_channel_setfragments(kobj_t obj, void *data, - uint32_t blksz, uint32_t blkcnt) +hdaa_channel_setfragments(kobj_t obj, void *data, uint32_t blksz, + uint32_t blkcnt) { struct hdaa_chan *ch = data; @@ -2072,10 +2059,10 @@ } if ((sndbuf_getblksz(ch->b) != blksz || - sndbuf_getblkcnt(ch->b) != blkcnt) && + sndbuf_getblkcnt(ch->b) != blkcnt) && sndbuf_resize(ch->b, blkcnt, blksz) != 0) - device_printf(ch->devinfo->dev, "%s: failed blksz=%u blkcnt=%u\n", - __func__, blksz, blkcnt); + device_printf(ch->devinfo->dev, + "%s: failed blksz=%u blkcnt=%u\n", __func__, blksz, blkcnt); ch->blksz = sndbuf_getblksz(ch->b); ch->blkcnt = sndbuf_getblkcnt(ch->b); @@ -2114,8 +2101,7 @@ HDA_CMD_SET_DIGITAL_CONV_FMT1(0, ch->io[i], 0)); } hda_command(devinfo->dev, - HDA_CMD_SET_CONV_STREAM_CHAN(0, ch->io[i], - 0)); + HDA_CMD_SET_CONV_STREAM_CHAN(0, ch->io[i], 0)); } HDAC_STREAM_FREE(device_get_parent(devinfo->dev), devinfo->dev, ch->dir == PCMDIR_PLAY ? 1 : 0, ch->sid); @@ -2129,17 +2115,19 @@ fmt = hdaa_stream_format(ch); ch->stripectl = fls(ch->stripecap & hdaa_allowed_stripes(fmt) & - hda_get_stripes_mask(devinfo->dev)) - 1; - ch->sid = HDAC_STREAM_ALLOC(device_get_parent(devinfo->dev), devinfo->dev, - ch->dir == PCMDIR_PLAY ? 1 : 0, fmt, ch->stripectl, &ch->dmapos); + hda_get_stripes_mask(devinfo->dev)) - + 1; + ch->sid = HDAC_STREAM_ALLOC(device_get_parent(devinfo->dev), + devinfo->dev, ch->dir == PCMDIR_PLAY ? 1 : 0, fmt, ch->stripectl, + &ch->dmapos); if (ch->sid <= 0) return (EBUSY); hdaa_audio_setup(ch); HDAC_STREAM_RESET(device_get_parent(devinfo->dev), devinfo->dev, ch->dir == PCMDIR_PLAY ? 1 : 0, ch->sid); HDAC_STREAM_START(device_get_parent(devinfo->dev), devinfo->dev, - ch->dir == PCMDIR_PLAY ? 1 : 0, ch->sid, - sndbuf_getbufaddr(ch->b), ch->blksz, ch->blkcnt); + ch->dir == PCMDIR_PLAY ? 1 : 0, ch->sid, sndbuf_getbufaddr(ch->b), + ch->blksz, ch->blkcnt); ch->flags |= HDAA_CHN_RUNNING; return (0); } @@ -2181,9 +2169,8 @@ if (ch->dmapos != NULL) { ptr = *(ch->dmapos); } else { - ptr = HDAC_STREAM_GETPTR( - device_get_parent(devinfo->dev), devinfo->dev, - ch->dir == PCMDIR_PLAY ? 1 : 0, ch->sid); + ptr = HDAC_STREAM_GETPTR(device_get_parent(devinfo->dev), + devinfo->dev, ch->dir == PCMDIR_PLAY ? 1 : 0, ch->sid); } hdaa_unlock(devinfo); @@ -2202,17 +2189,15 @@ return (&((struct hdaa_chan *)data)->caps); } -static kobj_method_t hdaa_channel_methods[] = { - KOBJMETHOD(channel_init, hdaa_channel_init), - KOBJMETHOD(channel_setformat, hdaa_channel_setformat), - KOBJMETHOD(channel_setspeed, hdaa_channel_setspeed), - KOBJMETHOD(channel_setblocksize, hdaa_channel_setblocksize), - KOBJMETHOD(channel_setfragments, hdaa_channel_setfragments), - KOBJMETHOD(channel_trigger, hdaa_channel_trigger), - KOBJMETHOD(channel_getptr, hdaa_channel_getptr), - KOBJMETHOD(channel_getcaps, hdaa_channel_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t hdaa_channel_methods[] = { KOBJMETHOD(channel_init, + hdaa_channel_init), + KOBJMETHOD(channel_setformat, hdaa_channel_setformat), + KOBJMETHOD(channel_setspeed, hdaa_channel_setspeed), + KOBJMETHOD(channel_setblocksize, hdaa_channel_setblocksize), + KOBJMETHOD(channel_setfragments, hdaa_channel_setfragments), + KOBJMETHOD(channel_trigger, hdaa_channel_trigger), + KOBJMETHOD(channel_getptr, hdaa_channel_getptr), + KOBJMETHOD(channel_getcaps, hdaa_channel_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(hdaa_channel); static int @@ -2241,7 +2226,8 @@ w = hdaa_widget_get(devinfo, i); if (w == NULL || w->enable == 0) continue; - if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX || + if (w->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX || w->param.eapdbtl == HDA_INVALID || w->bindas != pdevinfo->playas) continue; @@ -2253,13 +2239,12 @@ if ((mask & SOUND_MASK_PCM) == 0 || (devinfo->quirks & HDAA_QUIRK_SOFTPCMVOL) || pdevinfo->minamp[SOUND_MIXER_PCM] == - pdevinfo->maxamp[SOUND_MIXER_PCM]) { + pdevinfo->maxamp[SOUND_MIXER_PCM]) { mask |= SOUND_MASK_PCM; - pcm_setflags(pdevinfo->dev, pcm_getflags(pdevinfo->dev) | SD_F_SOFTPCMVOL); - HDA_BOOTHVERBOSE( - device_printf(pdevinfo->dev, - "Forcing Soft PCM volume\n"); - ); + pcm_setflags(pdevinfo->dev, + pcm_getflags(pdevinfo->dev) | SD_F_SOFTPCMVOL); + HDA_BOOTHVERBOSE(device_printf(pdevinfo->dev, + "Forcing Soft PCM volume\n");); } /* Declare master volume if needed. */ @@ -2267,12 +2252,9 @@ mask |= SOUND_MASK_VOLUME; mix_setparentchild(m, SOUND_MIXER_VOLUME, SOUND_MASK_PCM); - mix_setrealdev(m, SOUND_MIXER_VOLUME, - SOUND_MIXER_NONE); - HDA_BOOTHVERBOSE( - device_printf(pdevinfo->dev, - "Forcing master volume with PCM\n"); - ); + mix_setrealdev(m, SOUND_MIXER_VOLUME, SOUND_MIXER_NONE); + HDA_BOOTHVERBOSE(device_printf(pdevinfo->dev, + "Forcing master volume with PCM\n");); } } @@ -2317,8 +2299,8 @@ * and write it to codec, update *left and *right to reflect remaining error. */ static void -hdaa_audio_ctl_dev_set(struct hdaa_audio_ctl *ctl, int ossdev, - int mute, int *left, int *right) +hdaa_audio_ctl_dev_set(struct hdaa_audio_ctl *ctl, int ossdev, int mute, + int *left, int *right) { int i, zleft, zright, sleft, sright, smute, lval, rval; @@ -2346,8 +2328,8 @@ * Trace signal from source, setting volumes on the way. */ static void -hdaa_audio_ctl_source_volume(struct hdaa_pcm_devinfo *pdevinfo, - int ossdev, nid_t nid, int index, int mute, int left, int right, int depth) +hdaa_audio_ctl_source_volume(struct hdaa_pcm_devinfo *pdevinfo, int ossdev, + nid_t nid, int index, int mute, int left, int right, int depth) { struct hdaa_devinfo *devinfo = pdevinfo->devinfo; struct hdaa_widget *w, *wc; @@ -2372,12 +2354,14 @@ /* If this is not a first step - use input mixer. Pins have common input ctl so care must be taken. */ - if (depth > 0 && (conns == 1 || - w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)) { + if (depth > 0 && + (conns == 1 || + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)) { ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_IN, index, 1); if (ctl) - hdaa_audio_ctl_dev_set(ctl, ossdev, mute, &left, &right); + hdaa_audio_ctl_dev_set(ctl, ossdev, mute, &left, + &right); } /* If widget has own ossdev - not traverse it. @@ -2387,7 +2371,7 @@ /* We must not traverse pin */ if ((w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT || - w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) && + w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) && depth > 0) return; @@ -2397,7 +2381,7 @@ */ if (conns > 1 && (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER || - w->selconn != index)) + w->selconn != index)) return; ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_OUT, -1, 1); @@ -2422,8 +2406,8 @@ * Trace signal from destination, setting volumes on the way. */ static void -hdaa_audio_ctl_dest_volume(struct hdaa_pcm_devinfo *pdevinfo, - int ossdev, nid_t nid, int index, int mute, int left, int right, int depth) +hdaa_audio_ctl_dest_volume(struct hdaa_pcm_devinfo *pdevinfo, int ossdev, + nid_t nid, int index, int mute, int left, int right, int depth) { struct hdaa_devinfo *devinfo = pdevinfo->devinfo; struct hdaa_audio_as *as = devinfo->as; @@ -2455,22 +2439,23 @@ and this is a duplication point. XXX: Actually exception is not completely correct. XXX: Duplication point check is not perfect. */ - if ((consumers == 2 && (w->bindas < 0 || - as[w->bindas].hpredir < 0 || as[w->bindas].fakeredir || - (w->bindseqmask & (1 << 15)) == 0)) || + if ((consumers == 2 && + (w->bindas < 0 || as[w->bindas].hpredir < 0 || + as[w->bindas].fakeredir || + (w->bindseqmask & (1 << 15)) == 0)) || consumers > 2) return; /* Else use it's output mixer. */ - ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, - HDAA_CTL_OUT, -1, 1); + ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_OUT, -1, + 1); if (ctl) - hdaa_audio_ctl_dev_set(ctl, ossdev, mute, &left, &right); + hdaa_audio_ctl_dev_set(ctl, ossdev, mute, &left, + &right); } /* We must not traverse pin */ - if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && - depth > 0) + if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && depth > 0) return; for (i = 0; i < w->nconns; i++) { @@ -2480,10 +2465,11 @@ continue; cleft = left; cright = right; - ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, - HDAA_CTL_IN, i, 1); + ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_IN, i, + 1); if (ctl) - hdaa_audio_ctl_dev_set(ctl, ossdev, mute, &cleft, &cright); + hdaa_audio_ctl_dev_set(ctl, ossdev, mute, &cleft, + &cright); hdaa_audio_ctl_dest_volume(pdevinfo, ossdev, w->conns[i], -1, mute, cleft, cright, depth + 1); } @@ -2507,13 +2493,19 @@ lvol = -4000; } else lvol = ((pdevinfo->maxamp[dev] - pdevinfo->minamp[dev]) * - pdevinfo->left[dev] + 50) / 100 + pdevinfo->minamp[dev]; + pdevinfo->left[dev] + + 50) / + 100 + + pdevinfo->minamp[dev]; if (pdevinfo->right[dev] == 0) { mute |= HDAA_AMP_MUTE_RIGHT; rvol = -4000; } else rvol = ((pdevinfo->maxamp[dev] - pdevinfo->minamp[dev]) * - pdevinfo->right[dev] + 50) / 100 + pdevinfo->minamp[dev]; + pdevinfo->right[dev] + + 50) / + 100 + + pdevinfo->minamp[dev]; for (i = devinfo->startnode; i < devinfo->endnode; i++) { w = hdaa_widget_get(devinfo, i); if (w == NULL || w->enable == 0) @@ -2528,27 +2520,26 @@ } if (dev == SOUND_MIXER_RECLEV && w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) { - hdaa_audio_ctl_dest_volume(pdevinfo, dev, - w->nid, -1, mute, lvol, rvol, 0); + hdaa_audio_ctl_dest_volume(pdevinfo, dev, w->nid, -1, + mute, lvol, rvol, 0); continue; } if (dev == SOUND_MIXER_VOLUME && w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && devinfo->as[w->bindas].dir == HDAA_CTL_OUT) { - hdaa_audio_ctl_dest_volume(pdevinfo, dev, - w->nid, -1, mute, lvol, rvol, 0); + hdaa_audio_ctl_dest_volume(pdevinfo, dev, w->nid, -1, + mute, lvol, rvol, 0); continue; } - if (dev == SOUND_MIXER_IGAIN && - w->pflags & HDAA_ADC_MONITOR) { + if (dev == SOUND_MIXER_IGAIN && w->pflags & HDAA_ADC_MONITOR) { for (j = 0; j < w->nconns; j++) { if (!w->connsenable[j]) - continue; + continue; cw = hdaa_widget_get(devinfo, w->conns[j]); if (cw == NULL || cw->enable == 0) - continue; + continue; if (cw->bindas == -1) - continue; + continue; if (cw->bindas >= 0 && devinfo->as[cw->bindas].dir != HDAA_CTL_IN) continue; @@ -2559,11 +2550,11 @@ } if (w->ossdev != dev) continue; - hdaa_audio_ctl_source_volume(pdevinfo, dev, - w->nid, -1, mute, lvol, rvol, 0); + hdaa_audio_ctl_source_volume(pdevinfo, dev, w->nid, -1, mute, + lvol, rvol, 0); if (dev == SOUND_MIXER_IMIX && (w->pflags & HDAA_IMIX_AS_DST)) - hdaa_audio_ctl_dest_volume(pdevinfo, dev, - w->nid, -1, mute, lvol, rvol, 0); + hdaa_audio_ctl_dest_volume(pdevinfo, dev, w->nid, -1, + mute, lvol, rvol, 0); } } @@ -2571,8 +2562,8 @@ * OSS Mixer set method. */ static int -hdaa_audio_ctl_ossmixer_set(struct snd_mixer *m, unsigned dev, - unsigned left, unsigned right) +hdaa_audio_ctl_ossmixer_set(struct snd_mixer *m, unsigned dev, unsigned left, + unsigned right) { struct hdaa_pcm_devinfo *pdevinfo = mix_getdevinfo(m); struct hdaa_devinfo *devinfo = pdevinfo->devinfo; @@ -2593,7 +2584,8 @@ w = hdaa_widget_get(devinfo, i); if (w == NULL || w->enable == 0) continue; - if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX || + if (w->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX || w->param.eapdbtl == HDA_INVALID) continue; break; @@ -2642,7 +2634,8 @@ /* If the value was overridden, leave it as is. */ if (resource_int_value(device_get_name(pdevinfo->dev), - device_get_unit(pdevinfo->dev), ossnames[dev], &vol) == 0) + device_get_unit(pdevinfo->dev), ossnames[dev], + &vol) == 0) continue; vol = -1; @@ -2650,11 +2643,10 @@ vol = 100; else if (dev == SOUND_MIXER_IGAIN) vol = 0; - else if (dev == SOUND_MIXER_MIC || - dev == SOUND_MIXER_MONITOR) - amp = 20 * 4; /* +20dB */ + else if (dev == SOUND_MIXER_MIC || dev == SOUND_MIXER_MONITOR) + amp = 20 * 4; /* +20dB */ else if (dev == SOUND_MIXER_VOLUME && !pdevinfo->digital) - amp = -10 * 4; /* -10dB */ + amp = -10 * 4; /* -10dB */ else amp = 0; if (vol < 0 && @@ -2662,7 +2654,9 @@ vol = 100; } else if (vol < 0) { vol = ((amp - pdevinfo->minamp[dev]) * 100 + - (pdevinfo->maxamp[dev] - pdevinfo->minamp[dev]) / 2) / + (pdevinfo->maxamp[dev] - + pdevinfo->minamp[dev]) / + 2) / (pdevinfo->maxamp[dev] - pdevinfo->minamp[dev]); vol = imin(imax(vol, 1), 100); } @@ -2674,7 +2668,8 @@ * Recursively commutate specified record source. */ static uint32_t -hdaa_audio_ctl_recsel_comm(struct hdaa_pcm_devinfo *pdevinfo, uint32_t src, nid_t nid, int depth) +hdaa_audio_ctl_recsel_comm(struct hdaa_pcm_devinfo *pdevinfo, uint32_t src, + nid_t nid, int depth) { struct hdaa_devinfo *devinfo = pdevinfo->devinfo; struct hdaa_widget *w, *cw; @@ -2707,8 +2702,8 @@ } /* We have two special cases: mixers and others (selectors). */ if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) { - ctl = hdaa_audio_ctl_amp_get(devinfo, - w->nid, HDAA_CTL_IN, i, 1); + ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, + HDAA_CTL_IN, i, 1); if (ctl == NULL) continue; /* If we have input control on this node mute them @@ -2717,16 +2712,14 @@ if (muted != ctl->forcemute) { ctl->forcemute = muted; hdaa_audio_ctl_amp_set(ctl, - HDAA_AMP_MUTE_DEFAULT, - HDAA_AMP_VOL_DEFAULT, HDAA_AMP_VOL_DEFAULT); + HDAA_AMP_MUTE_DEFAULT, HDAA_AMP_VOL_DEFAULT, + HDAA_AMP_VOL_DEFAULT); } - HDA_BOOTHVERBOSE( - device_printf(pdevinfo->dev, - "Recsel (%s): nid %d source %d %s\n", - hdaa_audio_ctl_ossmixer_mask2allname( - src, buf, sizeof(buf)), - nid, i, muted?"mute":"unmute"); - ); + HDA_BOOTHVERBOSE(device_printf(pdevinfo->dev, + "Recsel (%s): nid %d source %d %s\n", + hdaa_audio_ctl_ossmixer_mask2allname(src, buf, + sizeof(buf)), + nid, i, muted ? "mute" : "unmute");); } else { if (w->nconns == 1) break; @@ -2734,13 +2727,11 @@ continue; /* If we found requested source - select it and exit. */ hdaa_widget_connection_select(w, i); - HDA_BOOTHVERBOSE( - device_printf(pdevinfo->dev, - "Recsel (%s): nid %d source %d select\n", - hdaa_audio_ctl_ossmixer_mask2allname( - src, buf, sizeof(buf)), - nid, i); - ); + HDA_BOOTHVERBOSE(device_printf(pdevinfo->dev, + "Recsel (%s): nid %d source %d select\n", + hdaa_audio_ctl_ossmixer_mask2allname(src, buf, + sizeof(buf)), + nid, i);); break; } } @@ -2793,15 +2784,13 @@ */ i = 0; while ((ctl = hdaa_audio_ctl_each(devinfo, &i)) != NULL) { - if (ctl->enable == 0 || - !(ctl->ossmask & pdevinfo->recsrc)) + if (ctl->enable == 0 || !(ctl->ossmask & pdevinfo->recsrc)) continue; if (!((pdevinfo->playas >= 0 && - ctl->widget->bindas == pdevinfo->playas) || - (pdevinfo->recas >= 0 && - ctl->widget->bindas == pdevinfo->recas) || - (pdevinfo->index == 0 && - ctl->widget->bindas == -2))) + ctl->widget->bindas == pdevinfo->playas) || + (pdevinfo->recas >= 0 && + ctl->widget->bindas == pdevinfo->recas) || + (pdevinfo->index == 0 && ctl->widget->bindas == -2))) continue; for (j = 0; j < SOUND_MIXER_NRDEVICES; j++) { if (pdevinfo->recsrc & (1 << j)) { @@ -2827,9 +2816,9 @@ } static kobj_method_t hdaa_audio_ctl_ossmixer_methods[] = { - KOBJMETHOD(mixer_init, hdaa_audio_ctl_ossmixer_init), - KOBJMETHOD(mixer_set, hdaa_audio_ctl_ossmixer_set), - KOBJMETHOD(mixer_setrecsrc, hdaa_audio_ctl_ossmixer_setrecsrc), + KOBJMETHOD(mixer_init, hdaa_audio_ctl_ossmixer_init), + KOBJMETHOD(mixer_set, hdaa_audio_ctl_ossmixer_set), + KOBJMETHOD(mixer_setrecsrc, hdaa_audio_ctl_ossmixer_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(hdaa_audio_ctl_ossmixer); @@ -2842,20 +2831,19 @@ uint32_t data, wake, unsol, sticky; if (HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->gpio_cap) > 0) { - data = hda_command(dev, - HDA_CMD_GET_GPI_DATA(0, devinfo->nid)); + data = hda_command(dev, HDA_CMD_GET_GPI_DATA(0, devinfo->nid)); wake = hda_command(dev, HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(0, devinfo->nid)); unsol = hda_command(dev, HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(0, devinfo->nid)); sticky = hda_command(dev, HDA_CMD_GET_GPI_STICKY_MASK(0, devinfo->nid)); - for (i = 0; i < HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->gpio_cap); i++) { + for (i = 0; i < HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->gpio_cap); + i++) { device_printf(dev, " GPI%d:%s%s%s state=%d", i, - (sticky & (1 << i)) ? " sticky" : "", - (unsol & (1 << i)) ? " unsol" : "", - (wake & (1 << i)) ? " wake" : "", - (data >> i) & 1); + (sticky & (1 << i)) ? " sticky" : "", + (unsol & (1 << i)) ? " unsol" : "", + (wake & (1 << i)) ? " wake" : "", (data >> i) & 1); } } } @@ -2868,8 +2856,7 @@ uint32_t data, dir, enable, wake, unsol, sticky; if (HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->gpio_cap) > 0) { - data = hda_command(dev, - HDA_CMD_GET_GPIO_DATA(0, devinfo->nid)); + data = hda_command(dev, HDA_CMD_GET_GPIO_DATA(0, devinfo->nid)); enable = hda_command(dev, HDA_CMD_GET_GPIO_ENABLE_MASK(0, devinfo->nid)); dir = hda_command(dev, @@ -2880,7 +2867,9 @@ HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(0, devinfo->nid)); sticky = hda_command(dev, HDA_CMD_GET_GPIO_STICKY_MASK(0, devinfo->nid)); - for (i = 0; i < HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->gpio_cap); i++) { + for (i = 0; + i < HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->gpio_cap); + i++) { device_printf(dev, " GPIO%d: ", i); if ((enable & (1 << i)) == 0) { printf("disabled\n"); @@ -2906,11 +2895,11 @@ uint32_t data; if (HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->gpio_cap) > 0) { - data = hda_command(dev, - HDA_CMD_GET_GPO_DATA(0, devinfo->nid)); - for (i = 0; i < HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->gpio_cap); i++) { + data = hda_command(dev, HDA_CMD_GET_GPO_DATA(0, devinfo->nid)); + for (i = 0; i < HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->gpio_cap); + i++) { device_printf(dev, " GPO%d: state=%d", i, - (data >> i) & 1); + (data >> i) & 1); } } } @@ -2929,19 +2918,16 @@ HDA_CMD_GET_PARAMETER(0, nid, HDA_PARAM_GPIO_COUNT)); devinfo->gpio_cap = res; - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "NumGPIO=%d NumGPO=%d " - "NumGPI=%d GPIWake=%d GPIUnsol=%d\n", - HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->gpio_cap), - HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->gpio_cap), - HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->gpio_cap), - HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->gpio_cap), - HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->gpio_cap)); - hdaa_dump_gpi(devinfo); - hdaa_dump_gpio(devinfo); - hdaa_dump_gpo(devinfo); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + "NumGPIO=%d NumGPO=%d " + "NumGPI=%d GPIWake=%d GPIUnsol=%d\n", + HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->gpio_cap), + HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->gpio_cap), + HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->gpio_cap), + HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->gpio_cap), + HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->gpio_cap)); + hdaa_dump_gpi(devinfo); hdaa_dump_gpio(devinfo); + hdaa_dump_gpo(devinfo);); res = hda_command(devinfo->dev, HDA_CMD_GET_PARAMETER(0, nid, HDA_PARAM_SUPP_STREAM_FORMATS)); @@ -2962,7 +2948,8 @@ for (i = devinfo->startnode; i < devinfo->endnode; i++) { w = hdaa_widget_get(devinfo, i); if (w == NULL) - device_printf(devinfo->dev, "Ghost widget! nid=%d!\n", i); + device_printf(devinfo->dev, "Ghost widget! nid=%d!\n", + i); else { w->devinfo = devinfo; w->nid = i; @@ -3030,8 +3017,8 @@ if (max < 1) return; - ctls = (struct hdaa_audio_ctl *)malloc( - sizeof(*ctls) * max, M_HDAA, M_ZERO | M_NOWAIT); + ctls = (struct hdaa_audio_ctl *)malloc(sizeof(*ctls) * max, M_HDAA, + M_ZERO | M_NOWAIT); if (ctls == NULL) { /* Blekh! */ @@ -3074,7 +3061,8 @@ ctls[cnt].offset = offset; ctls[cnt].left = offset; ctls[cnt].right = offset; - if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX || + if (w->type == + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX || w->waspin) ctls[cnt].ndir = HDAA_CTL_IN; else @@ -3120,15 +3108,14 @@ ctls[cnt].offset = offset; ctls[cnt].left = offset; ctls[cnt].right = offset; - ctls[cnt].ndir = HDAA_CTL_IN; + ctls[cnt].ndir = HDAA_CTL_IN; ctls[cnt++].dir = HDAA_CTL_IN; } break; default: if (cnt >= max) { device_printf(devinfo->dev, - "%s: Ctl overflow!\n", - __func__); + "%s: Ctl overflow!\n", __func__); break; } ctls[cnt].enable = 1; @@ -3167,13 +3154,14 @@ w = hdaa_widget_get(devinfo, i); if (w == NULL || w->enable == 0) continue; - if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) + if (w->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) continue; - if (HDA_CONFIG_DEFAULTCONF_ASSOCIATION(w->wclass.pin.config) - != j) + if (HDA_CONFIG_DEFAULTCONF_ASSOCIATION( + w->wclass.pin.config) != j) continue; max++; - if (j != 15) /* There could be many 1-pin assocs #15 */ + if (j != 15) /* There could be many 1-pin assocs #15 */ break; } } @@ -3183,8 +3171,8 @@ if (max < 1) return; - as = (struct hdaa_audio_as *)malloc( - sizeof(*as) * max, M_HDAA, M_ZERO | M_NOWAIT); + as = (struct hdaa_audio_as *)malloc(sizeof(*as) * max, M_HDAA, + M_ZERO | M_NOWAIT); if (as == NULL) { /* Blekh! */ @@ -3209,16 +3197,19 @@ w = hdaa_widget_get(devinfo, i); if (w == NULL || w->enable == 0) continue; - if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) + if (w->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) continue; - assoc = HDA_CONFIG_DEFAULTCONF_ASSOCIATION(w->wclass.pin.config); - seq = HDA_CONFIG_DEFAULTCONF_SEQUENCE(w->wclass.pin.config); + assoc = HDA_CONFIG_DEFAULTCONF_ASSOCIATION( + w->wclass.pin.config); + seq = HDA_CONFIG_DEFAULTCONF_SEQUENCE( + w->wclass.pin.config); if (assoc != j) { continue; } KASSERT(cnt < max, - ("%s: Associations owerflow (%d of %d)", - __func__, cnt, max)); + ("%s: Associations owerflow (%d of %d)", __func__, + cnt, max)); type = w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK; /* Get pin direction. */ @@ -3226,7 +3217,8 @@ type == HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER || type == HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT || type == HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT || - type == HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT) + type == + HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT) dir = HDAA_CTL_OUT; else dir = HDAA_CTL_IN; @@ -3240,19 +3232,22 @@ first = seq; /* Check association correctness. */ if (as[cnt].pins[seq] != 0) { - device_printf(devinfo->dev, "%s: Duplicate pin %d (%d) " + device_printf(devinfo->dev, + "%s: Duplicate pin %d (%d) " "in association %d! Disabling association.\n", __func__, seq, w->nid, j); as[cnt].enable = 0; } if (dir != as[cnt].dir) { - device_printf(devinfo->dev, "%s: Pin %d has wrong " + device_printf(devinfo->dev, + "%s: Pin %d has wrong " "direction for association %d! Disabling " "association.\n", __func__, w->nid, j); as[cnt].enable = 0; } - if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) { + if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL( + w->param.widget_cap)) { as[cnt].digital |= 0x1; if (HDA_PARAM_PIN_CAP_HDMI(w->wclass.pin.cap)) as[cnt].digital |= 0x2; @@ -3261,9 +3256,11 @@ } if (as[cnt].location == -1) { as[cnt].location = - HDA_CONFIG_DEFAULTCONF_LOCATION(w->wclass.pin.config); + HDA_CONFIG_DEFAULTCONF_LOCATION( + w->wclass.pin.config); } else if (as[cnt].location != - HDA_CONFIG_DEFAULTCONF_LOCATION(w->wclass.pin.config)) { + HDA_CONFIG_DEFAULTCONF_LOCATION( + w->wclass.pin.config)) { as[cnt].location = -2; } /* Headphones with seq=15 may mean redirection. */ @@ -3283,27 +3280,25 @@ } } for (i = 0; i < max; i++) { - if (as[i].dir == HDAA_CTL_IN && (as[i].pincnt == 1 || - as[i].pins[14] > 0 || as[i].pins[15] > 0)) + if (as[i].dir == HDAA_CTL_IN && + (as[i].pincnt == 1 || as[i].pins[14] > 0 || + as[i].pins[15] > 0)) as[i].mixed = 1; } HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "%d associations found:\n", max); - for (i = 0; i < max; i++) { - device_printf(devinfo->dev, - "Association %d (%d) %s%s:\n", - i, as[i].index, (as[i].dir == HDAA_CTL_IN)?"in":"out", - as[i].enable?"":" (disabled)"); - for (j = 0; j < 16; j++) { - if (as[i].pins[j] == 0) - continue; - device_printf(devinfo->dev, - " Pin nid=%d seq=%d\n", - as[i].pins[j], j); - } - } - ); + device_printf(devinfo->dev, "%d associations found:\n", max); + for (i = 0; i < max; i++) { + device_printf(devinfo->dev, "Association %d (%d) %s%s:\n", + i, as[i].index, + (as[i].dir == HDAA_CTL_IN) ? "in" : "out", + as[i].enable ? "" : " (disabled)"); + for (j = 0; j < 16; j++) { + if (as[i].pins[j] == 0) + continue; + device_printf(devinfo->dev, " Pin nid=%d seq=%d\n", + as[i].pins[j], j); + } + }); devinfo->as = as; } @@ -3324,44 +3319,35 @@ w = hdaa_widget_get(devinfo, nid); if (w == NULL || w->enable == 0) return (0); - HDA_BOOTHVERBOSE( - if (!only) { - device_printf(devinfo->dev, - " %*stracing via nid %d\n", - depth + 1, "", w->nid); - } - ); + HDA_BOOTHVERBOSE(if (!only) { + device_printf(devinfo->dev, " %*stracing via nid %d\n", + depth + 1, "", w->nid); + }); /* Use only unused widgets */ if (w->bindas >= 0 && w->bindas != as) { - HDA_BOOTHVERBOSE( - if (!only) { - device_printf(devinfo->dev, - " %*snid %d busy by association %d\n", - depth + 1, "", w->nid, w->bindas); - } - ); + HDA_BOOTHVERBOSE(if (!only) { + device_printf(devinfo->dev, + " %*snid %d busy by association %d\n", depth + 1, + "", w->nid, w->bindas); + }); return (0); } if (dupseq < 0) { if (w->bindseqmask != 0) { - HDA_BOOTHVERBOSE( - if (!only) { - device_printf(devinfo->dev, - " %*snid %d busy by seqmask %x\n", - depth + 1, "", w->nid, w->bindseqmask); - } - ); + HDA_BOOTHVERBOSE(if (!only) { + device_printf(devinfo->dev, + " %*snid %d busy by seqmask %x\n", + depth + 1, "", w->nid, w->bindseqmask); + }); return (0); } } else { /* If this is headphones - allow duplicate first pin. */ if (w->bindseqmask != 0 && (w->bindseqmask & (1 << dupseq)) == 0) { - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " %*snid %d busy by seqmask %x\n", - depth + 1, "", w->nid, w->bindseqmask); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " %*snid %d busy by seqmask %x\n", depth + 1, "", + w->nid, w->bindseqmask);); return (0); } } @@ -3373,9 +3359,8 @@ break; case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT: /* If we are tracing HP take only dac of first pin. */ - if ((only == 0 || only == w->nid) && - (w->nid >= min) && (dupseq < 0 || w->nid == - devinfo->as[as].dacs[0][dupseq])) + if ((only == 0 || only == w->nid) && (w->nid >= min) && + (dupseq < 0 || w->nid == devinfo->as[as].dacs[0][dupseq])) m = w->nid; break; case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX: @@ -3383,14 +3368,16 @@ break; /* Fall */ default: - /* Find reachable DACs with smallest nid respecting constraints. */ + /* Find reachable DACs with smallest nid respecting constraints. + */ for (i = 0; i < w->nconns; i++) { if (w->connsenable[i] == 0) continue; if (w->selconn != -1 && w->selconn != i) continue; if ((ret = hdaa_audio_trace_dac(devinfo, as, seq, - w->conns[i], dupseq, min, only, depth + 1)) != 0) { + w->conns[i], dupseq, min, only, depth + 1)) != + 0) { if (m == 0 || ret < m) { m = ret; im = i; @@ -3399,9 +3386,12 @@ break; } } - if (im >= 0 && only && ((w->nconns > 1 && - w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) || - w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)) + if (im >= 0 && only && + ((w->nconns > 1 && + w->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) || + w->type == + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)) w->selconn = im; break; } @@ -3409,13 +3399,10 @@ w->bindas = as; w->bindseqmask |= (1 << seq); } - HDA_BOOTHVERBOSE( - if (!only) { - device_printf(devinfo->dev, - " %*snid %d returned %d\n", - depth + 1, "", w->nid, m); - } - ); + HDA_BOOTHVERBOSE(if (!only) { + device_printf(devinfo->dev, " %*snid %d returned %d\n", + depth + 1, "", w->nid, m); + }); return (m); } @@ -3435,26 +3422,19 @@ w = hdaa_widget_get(devinfo, nid); if (w == NULL || w->enable == 0) return (0); - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " %*stracing via nid %d\n", - depth + 1, "", w->nid); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, " %*stracing via nid %d\n", + depth + 1, "", w->nid);); /* Use only unused widgets */ if (w->bindas >= 0 && w->bindas != as) { - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " %*snid %d busy by association %d\n", - depth + 1, "", w->nid, w->bindas); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " %*snid %d busy by association %d\n", depth + 1, "", + w->nid, w->bindas);); return (0); } if (!mixed && w->bindseqmask != 0) { - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " %*snid %d busy by seqmask %x\n", - depth + 1, "", w->nid, w->bindseqmask); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " %*snid %d busy by seqmask %x\n", depth + 1, "", w->nid, + w->bindseqmask);); return (0); } switch (w->type) { @@ -3481,9 +3461,9 @@ continue; if (wc->conns[i] != nid) continue; - if ((ret = hdaa_audio_trace_adc(devinfo, as, seq, - j, mixed, min, only, depth + 1, - length, onlylength)) != 0) { + if ((ret = hdaa_audio_trace_adc(devinfo, as, + seq, j, mixed, min, only, depth + 1, + length, onlylength)) != 0) { if (m == 0 || ret < m || (ret == m && *length < lm)) { m = ret; @@ -3495,9 +3475,12 @@ break; } } - if (im >= 0 && only && ((wc->nconns > 1 && - wc->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) || - wc->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)) + if (im >= 0 && only && + ((wc->nconns > 1 && + wc->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) || + wc->type == + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)) wc->selconn = im; } break; @@ -3506,11 +3489,8 @@ w->bindas = as; w->bindseqmask |= (1 << seq); } - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " %*snid %d returned %d\n", - depth + 1, "", w->nid, m); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, " %*snid %d returned %d\n", + depth + 1, "", w->nid, m);); return (m); } @@ -3560,46 +3540,37 @@ if (i == 16) return (1); - hpredir = (i == 15 && ases[as].fakeredir == 0)?ases[as].hpredir:-1; + hpredir = (i == 15 && ases[as].fakeredir == 0) ? ases[as].hpredir : -1; min = 0; do { - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Tracing pin %d with min nid %d", - ases[as].pins[i], min); - if (hpredir >= 0) - printf(" and hpredir %d", hpredir); - printf("\n"); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Tracing pin %d with min nid %d", ases[as].pins[i], min); + if (hpredir >= 0) + printf(" and hpredir %d", hpredir); + printf("\n");); /* Trace this pin taking min nid into account. */ - res = hdaa_audio_trace_dac(devinfo, as, i, - ases[as].pins[i], hpredir, min, 0, 0); + res = hdaa_audio_trace_dac(devinfo, as, i, ases[as].pins[i], + hpredir, min, 0, 0); if (res == 0) { /* If we failed - return to previous and redo it. */ - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " Unable to trace pin %d seq %d with min " - "nid %d", - ases[as].pins[i], i, min); - if (hpredir >= 0) - printf(" and hpredir %d", hpredir); - printf("\n"); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " Unable to trace pin %d seq %d with min " + "nid %d", + ases[as].pins[i], i, min); + if (hpredir >= 0) + printf(" and hpredir %d", hpredir); + printf("\n");); return (0); } HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " Pin %d traced to DAC %d", - ases[as].pins[i], res); - if (hpredir >= 0) - printf(" and hpredir %d", hpredir); - if (ases[as].fakeredir) - printf(" with fake redirection"); - printf("\n"); - ); + device_printf(devinfo->dev, " Pin %d traced to DAC %d", + ases[as].pins[i], res); + if (hpredir >= 0) printf(" and hpredir %d", hpredir); + if (ases[as].fakeredir) printf(" with fake redirection"); + printf("\n");); /* Trace again to mark the path */ - hdaa_audio_trace_dac(devinfo, as, i, - ases[as].pins[i], hpredir, min, res, 0); + hdaa_audio_trace_dac(devinfo, as, i, ases[as].pins[i], hpredir, + min, res, 0); ases[as].dacs[0][i] = res; /* We succeeded, so call next. */ if (hdaa_audio_trace_as_out(devinfo, as, i + 1)) @@ -3700,13 +3671,10 @@ int i, pos; nid_t nid1, nid2; - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "Looking for additional %sC " - "for association %d (%d)\n", - (as->dir == HDAA_CTL_OUT) ? "DA" : "AD", - asid, as->index); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + "Looking for additional %sC " + "for association %d (%d)\n", + (as->dir == HDAA_CTL_OUT) ? "DA" : "AD", asid, as->index);); /* Find the existing DAC position and return if found more the one. */ pos = -1; @@ -3728,12 +3696,14 @@ if (w2->bindas >= 0) continue; if (w1->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT) { - if (w2->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT) + if (w2->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT) continue; if (hdaa_audio_dacs_equal(w1, w2)) break; } else { - if (w2->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) + if (w2->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) continue; if (hdaa_audio_adcs_equal(w1, w2)) break; @@ -3744,19 +3714,15 @@ w2->bindas = w1->bindas; w2->bindseqmask = w1->bindseqmask; if (w1->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) { - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " ADC %d considered equal to ADC %d\n", nid2, nid1); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " ADC %d considered equal to ADC %d\n", nid2, nid1);); w1 = hdaa_widget_get(devinfo, w1->conns[0]); w2 = hdaa_widget_get(devinfo, w2->conns[0]); w2->bindas = w1->bindas; w2->bindseqmask = w1->bindseqmask; } else { - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " DAC %d considered equal to DAC %d\n", nid2, nid1); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " DAC %d considered equal to DAC %d\n", nid2, nid1);); } for (i = 0; i < 16; i++) { if (as->dacs[0][i] <= 0) @@ -3790,30 +3756,26 @@ if (ases[as].pins[i] == 0) continue; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Tracing pin %d to ADC %d\n", - ases[as].pins[i], j); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Tracing pin %d to ADC %d\n", ases[as].pins[i], + j);); /* Trace this pin taking goal into account. */ if (hdaa_audio_trace_adc(devinfo, as, i, - ases[as].pins[i], 1, 0, j, 0, &length, 0) == 0) { - /* If we failed - return to previous and redo it. */ - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " Unable to trace pin %d to ADC %d, undo traces\n", - ases[as].pins[i], j); - ); + ases[as].pins[i], 1, 0, j, 0, &length, + 0) == 0) { + /* If we failed - return to previous and redo + * it. */ + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " Unable to trace pin %d to ADC %d, undo traces\n", + ases[as].pins[i], j);); hdaa_audio_undo_trace(devinfo, as, -1); for (k = 0; k < 16; k++) ases[as].dacs[0][k] = 0; break; } - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " Pin %d traced to ADC %d\n", - ases[as].pins[i], j); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " Pin %d traced to ADC %d\n", ases[as].pins[i], + j);); ases[as].dacs[0][i] = j; } if (i == 16) @@ -3841,34 +3803,26 @@ min = 0; do { - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Tracing pin %d with min nid %d", - ases[as].pins[i], min); - printf("\n"); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Tracing pin %d with min nid %d", ases[as].pins[i], min); + printf("\n");); /* Trace this pin taking min nid into account. */ - res = hdaa_audio_trace_adc(devinfo, as, i, - ases[as].pins[i], 0, min, 0, 0, &length, 0); + res = hdaa_audio_trace_adc(devinfo, as, i, ases[as].pins[i], 0, + min, 0, 0, &length, 0); if (res == 0) { /* If we failed - return to previous and redo it. */ - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " Unable to trace pin %d seq %d with min " - "nid %d", - ases[as].pins[i], i, min); - printf("\n"); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " Unable to trace pin %d seq %d with min " + "nid %d", + ases[as].pins[i], i, min); + printf("\n");); return (0); } - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " Pin %d traced to ADC %d\n", - ases[as].pins[i], res); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " Pin %d traced to ADC %d\n", ases[as].pins[i], res);); /* Trace again to mark the path */ - hdaa_audio_trace_adc(devinfo, as, i, - ases[as].pins[i], 0, min, res, 0, &length, length); + hdaa_audio_trace_adc(devinfo, as, i, ases[as].pins[i], 0, min, + res, 0, &length, length); ases[as].dacs[0][i] = res; /* We succeeded, so call next. */ if (hdaa_audio_trace_as_in_mch(devinfo, as, i + 1)) @@ -3896,28 +3850,21 @@ w = hdaa_widget_get(devinfo, nid); if (w == NULL || w->enable == 0) return (0); - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " %*stracing via nid %d\n", - depth + 1, "", w->nid); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, " %*stracing via nid %d\n", + depth + 1, "", w->nid);); /* Use only unused widgets */ if (depth > 0 && w->bindas != -1) { if (w->bindas < 0 || ases[w->bindas].dir == HDAA_CTL_OUT) { - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " %*snid %d found output association %d\n", - depth + 1, "", w->nid, w->bindas); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " %*snid %d found output association %d\n", + depth + 1, "", w->nid, w->bindas);); if (w->bindas >= 0) w->pflags |= HDAA_ADC_MONITOR; return (1); } else { - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " %*snid %d busy by input association %d\n", - depth + 1, "", w->nid, w->bindas); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " %*snid %d busy by input association %d\n", + depth + 1, "", w->nid, w->bindas);); return (0); } } @@ -3942,10 +3889,11 @@ continue; if (wc->conns[i] != nid) continue; - if (hdaa_audio_trace_to_out(devinfo, - j, depth + 1) != 0) { + if (hdaa_audio_trace_to_out(devinfo, j, + depth + 1) != 0) { res = 1; - if (wc->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR && + if (wc->type == + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR && wc->selconn == -1) wc->selconn = i; } @@ -3956,11 +3904,8 @@ if (res && w->bindas == -1) w->bindas = -2; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " %*snid %d returned %d\n", - depth + 1, "", w->nid, res); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, " %*snid %d returned %d\n", + depth + 1, "", w->nid, res);); return (res); } @@ -3978,9 +3923,7 @@ /* Find mixer associated with input, but supplying signal for output associations. Hope it will be input monitor. */ HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "Tracing input monitor\n"); - ); + device_printf(devinfo->dev, "Tracing input monitor\n");); for (j = devinfo->startnode; j < devinfo->endnode; j++) { w = hdaa_widget_get(devinfo, j); if (w == NULL || w->enable == 0) @@ -3989,17 +3932,11 @@ continue; if (w->bindas < 0 || as[w->bindas].dir != HDAA_CTL_IN) continue; - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " Tracing nid %d to out\n", - j); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " Tracing nid %d to out\n", j);); if (hdaa_audio_trace_to_out(devinfo, w->nid, 0)) { - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " nid %d is input monitor\n", - w->nid); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " nid %d is input monitor\n", w->nid);); w->ossdev = SOUND_MIXER_IMIX; } } @@ -4008,9 +3945,7 @@ /* Find input pins supplying signal for output associations. Hope it will be input monitoring. */ HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "Tracing other input monitors\n"); - ); + device_printf(devinfo->dev, "Tracing other input monitors\n");); for (j = devinfo->startnode; j < devinfo->endnode; j++) { w = hdaa_widget_get(devinfo, j); if (w == NULL || w->enable == 0) @@ -4019,42 +3954,27 @@ continue; if (w->bindas < 0 || as[w->bindas].dir != HDAA_CTL_IN) continue; - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " Tracing nid %d to out\n", - j); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " Tracing nid %d to out\n", j);); if (hdaa_audio_trace_to_out(devinfo, w->nid, 0)) { - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " nid %d is input monitor\n", - w->nid); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " nid %d is input monitor\n", w->nid);); } } /* Beeper */ - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "Tracing beeper\n"); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, "Tracing beeper\n");); for (j = devinfo->startnode; j < devinfo->endnode; j++) { w = hdaa_widget_get(devinfo, j); if (w == NULL || w->enable == 0) continue; if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) continue; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Tracing nid %d to out\n", - j); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Tracing nid %d to out\n", j);); if (hdaa_audio_trace_to_out(devinfo, w->nid, 0)) { - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - " nid %d traced to out\n", - j); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + " nid %d traced to out\n", j);); } w->bindas = -2; } @@ -4075,8 +3995,7 @@ } if (devinfo->num_chans == 0) { devinfo->chans = (struct hdaa_chan *)malloc( - sizeof(struct hdaa_chan) * cnt, - M_HDAA, M_ZERO | M_NOWAIT); + sizeof(struct hdaa_chan) * cnt, M_HDAA, M_ZERO | M_NOWAIT); if (devinfo->chans == NULL) { device_printf(devinfo->dev, "Channels memory allocation failed!\n"); @@ -4094,7 +4013,8 @@ } /* Fixup relative pointers after realloc */ for (j = 0; j < devinfo->num_chans; j++) - devinfo->chans[j].caps.fmtlist = devinfo->chans[j].fmtlist; + devinfo->chans[j].caps.fmtlist = + devinfo->chans[j].fmtlist; } free = devinfo->num_chans; devinfo->num_chans += cnt; @@ -4111,8 +4031,9 @@ for (i = 0; i < as[j].num_chans; i++) { devinfo->chans[free].as = j; devinfo->chans[free].asindex = i; - devinfo->chans[free].dir = - (as[j].dir == HDAA_CTL_IN) ? PCMDIR_REC : PCMDIR_PLAY; + devinfo->chans[free].dir = (as[j].dir == HDAA_CTL_IN) ? + PCMDIR_REC : + PCMDIR_PLAY; hdaa_pcmchannel_setup(&devinfo->chans[free]); as[j].chans[i] = free; free++; @@ -4134,12 +4055,10 @@ if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET || w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET) { w->enable = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling nid %d due to it's" - " non-audio type.\n", - w->nid); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling nid %d due to it's" + " non-audio type.\n", + w->nid);); } } } @@ -4158,24 +4077,21 @@ continue; if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) { if ((w->wclass.pin.config & - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) == + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) == HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE) { w->enable = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling pin nid %d due" - " to None connectivity.\n", - w->nid); - ); - } else if ((w->wclass.pin.config & - HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK) == 0) { + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling pin nid %d due" + " to None connectivity.\n", + w->nid);); + } else if ( + (w->wclass.pin.config & + HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK) == 0) { w->enable = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling unassociated" - " pin nid %d.\n", - w->nid); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling unassociated" + " pin nid %d.\n", + w->nid);); } } } @@ -4188,23 +4104,23 @@ continue; if (ctl->widget->enable == 0 || (ctl->childwidget != NULL && - ctl->childwidget->enable == 0)) { + ctl->childwidget->enable == 0)) { ctl->forcemute = 1; ctl->muted = HDAA_AMP_MUTE_ALL; ctl->left = 0; ctl->right = 0; ctl->enable = 0; if (ctl->ndir == HDAA_CTL_IN) - ctl->widget->connsenable[ctl->index] = 0; + ctl->widget->connsenable[ctl->index] = + 0; done = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling ctl %d nid %d cnid %d due" - " to disabled widget.\n", i, - ctl->widget->nid, - (ctl->childwidget != NULL)? - ctl->childwidget->nid:-1); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling ctl %d nid %d cnid %d due" + " to disabled widget.\n", + i, ctl->widget->nid, + (ctl->childwidget != NULL) ? + ctl->childwidget->nid : + -1);); } } /* Disable useless widgets. */ @@ -4215,20 +4131,22 @@ /* Disable inputs with disabled child widgets. */ for (j = 0; j < w->nconns; j++) { if (w->connsenable[j]) { - cw = hdaa_widget_get(devinfo, w->conns[j]); + cw = hdaa_widget_get(devinfo, + w->conns[j]); if (cw == NULL || cw->enable == 0) { w->connsenable[j] = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling nid %d connection %d due" - " to disabled child widget.\n", - i, j); - ); + HDA_BOOTHVERBOSE(device_printf( + devinfo->dev, + " Disabling nid %d connection %d due" + " to disabled child widget.\n", + i, j);); } } } - if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR && - w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) + if (w->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR && + w->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) continue; /* Disable mixers and selectors without inputs. */ found = 0; @@ -4241,23 +4159,26 @@ if (found == 0) { w->enable = 0; done = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling nid %d due to all it's" - " inputs disabled.\n", w->nid); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling nid %d due to all it's" + " inputs disabled.\n", + w->nid);); } /* Disable nodes without consumers. */ - if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR && - w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) + if (w->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR && + w->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) continue; found = 0; - for (k = devinfo->startnode; k < devinfo->endnode; k++) { + for (k = devinfo->startnode; k < devinfo->endnode; + k++) { cw = hdaa_widget_get(devinfo, k); if (cw == NULL || cw->enable == 0) continue; for (j = 0; j < cw->nconns; j++) { - if (cw->connsenable[j] && cw->conns[j] == i) { + if (cw->connsenable[j] && + cw->conns[j] == i) { found = 1; break; } @@ -4266,15 +4187,13 @@ if (found == 0) { w->enable = 0; done = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling nid %d due to all it's" - " consumers disabled.\n", w->nid); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling nid %d due to all it's" + " consumers disabled.\n", + w->nid);); } } } while (done == 0); - } static void @@ -4292,11 +4211,8 @@ continue; if (w->bindas == -1) { w->enable = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling unassociated nid %d.\n", - w->nid); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling unassociated nid %d.\n", w->nid);); } } /* Disable input connections on input pin and @@ -4314,12 +4230,10 @@ if (w->connsenable[j] == 0) continue; w->connsenable[j] = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling connection to input pin " - "nid %d conn %d.\n", - i, j); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling connection to input pin " + "nid %d conn %d.\n", + i, j);); } ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_IN, -1, 1); @@ -4340,27 +4254,31 @@ ctl->right = 0; ctl->enable = 0; } - for (k = devinfo->startnode; k < devinfo->endnode; k++) { + for (k = devinfo->startnode; k < devinfo->endnode; + k++) { cw = hdaa_widget_get(devinfo, k); if (cw == NULL || cw->enable == 0) continue; for (j = 0; j < cw->nconns; j++) { - if (cw->connsenable[j] && cw->conns[j] == i) { + if (cw->connsenable[j] && + cw->conns[j] == i) { cw->connsenable[j] = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling connection from output pin " - "nid %d conn %d cnid %d.\n", - k, j, i); - ); - if (cw->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && + HDA_BOOTHVERBOSE(device_printf( + devinfo->dev, + " Disabling connection from output pin " + "nid %d conn %d cnid %d.\n", + k, j, i);); + if (cw->type == + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && cw->nconns > 1) continue; - ctl = hdaa_audio_ctl_amp_get(devinfo, k, - HDAA_CTL_IN, j, 1); + ctl = hdaa_audio_ctl_amp_get( + devinfo, k, HDAA_CTL_IN, j, + 1); if (ctl && ctl->enable) { ctl->forcemute = 1; - ctl->muted = HDAA_AMP_MUTE_ALL; + ctl->muted = + HDAA_AMP_MUTE_ALL; ctl->left = 0; ctl->right = 0; ctl->enable = 0; @@ -4396,12 +4314,10 @@ if (w->selconn < 0 || w->selconn == j) continue; w->connsenable[j] = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling unselected connection " - "nid %d conn %d.\n", - i, j); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling unselected connection " + "nid %d conn %d.\n", + i, j);); } } } @@ -4442,21 +4358,18 @@ ases[w->bindas].mixed) continue; /* Allow in -> mix. */ - if ((w->pflags & HDAA_ADC_MONITOR) && - cw->bindas >= 0 && - ases[cw->bindas].dir == HDAA_CTL_IN) + if ((w->pflags & HDAA_ADC_MONITOR) && cw->bindas >= 0 && + ases[cw->bindas].dir == HDAA_CTL_IN) continue; /* Allow if have common as/seqs. */ if (w->bindas == cw->bindas && (w->bindseqmask & cw->bindseqmask) != 0) continue; w->connsenable[j] = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling crossassociatement connection " - "nid %d conn %d cnid %d.\n", - i, j, cw->nid); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling crossassociatement connection " + "nid %d conn %d cnid %d.\n", + i, j, cw->nid);); } } /* ... using controls */ @@ -4474,8 +4387,7 @@ continue; /* Allow mix -> mixed-in. */ if (ctl->childwidget->bindas == -2 && - ctl->widget->bindas >= 0 && - ases[ctl->widget->bindas].mixed) + ctl->widget->bindas >= 0 && ases[ctl->widget->bindas].mixed) continue; /* Allow in -> mix. */ if ((ctl->widget->pflags & HDAA_ADC_MONITOR) && @@ -4484,7 +4396,8 @@ continue; /* Allow if have common as/seqs. */ if (ctl->widget->bindas == ctl->childwidget->bindas && - (ctl->widget->bindseqmask & ctl->childwidget->bindseqmask) != 0) + (ctl->widget->bindseqmask & + ctl->childwidget->bindseqmask) != 0) continue; ctl->forcemute = 1; ctl->muted = HDAA_AMP_MUTE_ALL; @@ -4493,15 +4406,11 @@ ctl->enable = 0; if (ctl->ndir == HDAA_CTL_IN) ctl->widget->connsenable[ctl->index] = 0; - HDA_BOOTHVERBOSE( - device_printf(devinfo->dev, - " Disabling crossassociatement connection " - "ctl %d nid %d cnid %d.\n", i, - ctl->widget->nid, - ctl->childwidget->nid); - ); + HDA_BOOTHVERBOSE(device_printf(devinfo->dev, + " Disabling crossassociatement connection " + "ctl %d nid %d cnid %d.\n", + i, ctl->widget->nid, ctl->childwidget->nid);); } - } /* @@ -4534,8 +4443,9 @@ /* If this is not a first step - use input mixer. Pins have common input ctl so care must be taken. */ - if (depth > 0 && ctlable && (conns == 1 || - w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)) { + if (depth > 0 && ctlable && + (conns == 1 || + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)) { ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_IN, index, 1); if (ctl) { @@ -4555,7 +4465,7 @@ /* We must not traverse pin */ if ((w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT || - w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) && + w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) && depth > 0) return (found); @@ -4566,12 +4476,12 @@ * If signals mixed, we can't assign controls farther. * Ignore this on depth zero. Caller must knows why. */ - if (conns > 1 && - w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) + if (conns > 1 && w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) ctlable = 0; if (ctlable) { - ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_OUT, -1, 1); + ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_OUT, -1, + 1); if (ctl) { ctl->ossmask |= (1 << ossdev); found++; @@ -4647,15 +4557,16 @@ and this is a duplication point. XXX: Actually exception is not completely correct. XXX: Duplication point check is not perfect. */ - if ((consumers == 2 && (w->bindas < 0 || - as[w->bindas].hpredir < 0 || as[w->bindas].fakeredir || - (w->bindseqmask & (1 << 15)) == 0)) || + if ((consumers == 2 && + (w->bindas < 0 || as[w->bindas].hpredir < 0 || + as[w->bindas].fakeredir || + (w->bindseqmask & (1 << 15)) == 0)) || consumers > 2) return (found); /* Else use it's output mixer. */ - ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, - HDAA_CTL_OUT, -1, 1); + ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_OUT, -1, + 1); if (ctl) { ctl->ossmask |= (1 << ossdev); found++; @@ -4667,8 +4578,7 @@ } /* We must not traverse pin */ - if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && - depth > 0) + if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && depth > 0) return (found); cminamp = cmaxamp = 0; @@ -4678,8 +4588,8 @@ if (index >= 0 && i != index) continue; tminamp = tmaxamp = 0; - ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, - HDAA_CTL_IN, i, 1); + ctl = hdaa_audio_ctl_amp_get(devinfo, w->nid, HDAA_CTL_IN, i, + 1); if (ctl) { ctl->ossmask |= (1 << ossdev); found++; @@ -4688,8 +4598,8 @@ tmaxamp += MAXQDB(ctl); } } - found += hdaa_audio_ctl_dest_amp(devinfo, w->conns[i], -1, ossdev, - depth + 1, &tminamp, &tmaxamp); + found += hdaa_audio_ctl_dest_amp(devinfo, w->conns[i], -1, + ossdev, depth + 1, &tminamp, &tmaxamp); if (cminamp == 0 && cmaxamp == 0) { cminamp = tminamp; cmaxamp = tmaxamp; @@ -4716,19 +4626,19 @@ int i, j; int type = -1, use, used = 0; static const int types[7][13] = { - { SOUND_MIXER_LINE, SOUND_MIXER_LINE1, SOUND_MIXER_LINE2, - SOUND_MIXER_LINE3, -1 }, /* line */ - { SOUND_MIXER_MONITOR, SOUND_MIXER_MIC, -1 }, /* int mic */ - { SOUND_MIXER_MIC, SOUND_MIXER_MONITOR, -1 }, /* ext mic */ - { SOUND_MIXER_CD, -1 }, /* cd */ - { SOUND_MIXER_SPEAKER, -1 }, /* speaker */ - { SOUND_MIXER_DIGITAL1, SOUND_MIXER_DIGITAL2, SOUND_MIXER_DIGITAL3, - -1 }, /* digital */ - { SOUND_MIXER_LINE, SOUND_MIXER_LINE1, SOUND_MIXER_LINE2, - SOUND_MIXER_LINE3, SOUND_MIXER_PHONEIN, SOUND_MIXER_PHONEOUT, - SOUND_MIXER_VIDEO, SOUND_MIXER_RADIO, SOUND_MIXER_DIGITAL1, - SOUND_MIXER_DIGITAL2, SOUND_MIXER_DIGITAL3, SOUND_MIXER_MONITOR, - -1 } /* others */ + { SOUND_MIXER_LINE, SOUND_MIXER_LINE1, SOUND_MIXER_LINE2, + SOUND_MIXER_LINE3, -1 }, /* line */ + { SOUND_MIXER_MONITOR, SOUND_MIXER_MIC, -1 }, /* int mic */ + { SOUND_MIXER_MIC, SOUND_MIXER_MONITOR, -1 }, /* ext mic */ + { SOUND_MIXER_CD, -1 }, /* cd */ + { SOUND_MIXER_SPEAKER, -1 }, /* speaker */ + { SOUND_MIXER_DIGITAL1, SOUND_MIXER_DIGITAL2, + SOUND_MIXER_DIGITAL3, -1 }, /* digital */ + { SOUND_MIXER_LINE, SOUND_MIXER_LINE1, SOUND_MIXER_LINE2, + SOUND_MIXER_LINE3, SOUND_MIXER_PHONEIN, + SOUND_MIXER_PHONEOUT, SOUND_MIXER_VIDEO, SOUND_MIXER_RADIO, + SOUND_MIXER_DIGITAL1, SOUND_MIXER_DIGITAL2, + SOUND_MIXER_DIGITAL3, SOUND_MIXER_MONITOR, -1 } /* others */ }; /* Surely known names */ @@ -4744,13 +4654,15 @@ if (as[w->bindas].dir == HDAA_CTL_OUT) break; type = -1; - switch (w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) { + switch (w->wclass.pin.config & + HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) { case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN: type = 0; break; case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN: - if ((w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) - == HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK) + if ((w->wclass.pin.config & + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) == + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK) break; type = 1; break; @@ -4803,7 +4715,8 @@ if (as[w->bindas].dir == HDAA_CTL_OUT) continue; type = -1; - switch (w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) { + switch ( + w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) { case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT: case HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER: case HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT: @@ -4844,8 +4757,7 @@ if (as[w->bindas].dir == HDAA_CTL_OUT) continue; j = 0; - while (types[6][j] >= 0 && - (used & (1 << types[6][j])) != 0) { + while (types[6][j] >= 0 && (used & (1 << types[6][j])) != 0) { j++; } if (types[6][j] >= 0) { @@ -4865,12 +4777,10 @@ for (j = 0; j < devinfo->ascnt; j++) { if (as[j].enable == 0) continue; - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "Tracing association %d (%d)\n", j, as[j].index); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + "Tracing association %d (%d)\n", j, as[j].index);); if (as[j].dir == HDAA_CTL_OUT) { -retry: + retry: res = hdaa_audio_trace_as_out(devinfo, j, 0); if (res == 0 && as[j].hpredir >= 0 && as[j].fakeredir == 0) { @@ -4884,17 +4794,13 @@ else res = hdaa_audio_trace_as_in_mch(devinfo, j, 0); if (res) { - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "Association %d (%d) trace succeeded\n", - j, as[j].index); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + "Association %d (%d) trace succeeded\n", j, + as[j].index);); } else { - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, - "Association %d (%d) trace failed\n", - j, as[j].index); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, + "Association %d (%d) trace failed\n", j, + as[j].index);); as[j].enable = 0; } } @@ -4915,8 +4821,8 @@ * for OSS device to/from specified widget. */ static void -hdaa_adjust_amp(struct hdaa_widget *w, int ossdev, - int found, int minamp, int maxamp) +hdaa_adjust_amp(struct hdaa_widget *w, int ossdev, int found, int minamp, + int maxamp) { struct hdaa_devinfo *devinfo = w->devinfo; struct hdaa_pcm_devinfo *pdevinfo; @@ -4933,8 +4839,10 @@ pdevinfo->minamp[ossdev] = minamp; pdevinfo->maxamp[ossdev] = maxamp; } else { - pdevinfo->minamp[ossdev] = imax(pdevinfo->minamp[ossdev], minamp); - pdevinfo->maxamp[ossdev] = imin(pdevinfo->maxamp[ossdev], maxamp); + pdevinfo->minamp[ossdev] = imax(pdevinfo->minamp[ossdev], + minamp); + pdevinfo->maxamp[ossdev] = imin(pdevinfo->maxamp[ossdev], + maxamp); } } @@ -4958,21 +4866,25 @@ if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT || w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET || (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && - as[w->bindas].dir == HDAA_CTL_IN)) { + as[w->bindas].dir == HDAA_CTL_IN)) { if (w->ossdev < 0) continue; found = hdaa_audio_ctl_source_amp(devinfo, w->nid, -1, w->ossdev, 1, 0, &minamp, &maxamp); hdaa_adjust_amp(w, w->ossdev, found, minamp, maxamp); - } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) { + } else if (w->type == + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) { found = hdaa_audio_ctl_dest_amp(devinfo, w->nid, -1, SOUND_MIXER_RECLEV, 0, &minamp, &maxamp); - hdaa_adjust_amp(w, SOUND_MIXER_RECLEV, found, minamp, maxamp); - } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && + hdaa_adjust_amp(w, SOUND_MIXER_RECLEV, found, minamp, + maxamp); + } else if (w->type == + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && as[w->bindas].dir == HDAA_CTL_OUT) { found = hdaa_audio_ctl_dest_amp(devinfo, w->nid, -1, SOUND_MIXER_VOLUME, 0, &minamp, &maxamp); - hdaa_adjust_amp(w, SOUND_MIXER_VOLUME, found, minamp, maxamp); + hdaa_adjust_amp(w, SOUND_MIXER_VOLUME, found, minamp, + maxamp); } if (w->ossdev == SOUND_MIXER_IMIX) { minamp = maxamp = 0; @@ -4980,9 +4892,10 @@ w->ossdev, 1, 0, &minamp, &maxamp); if (minamp == maxamp) { /* If we are unable to control input monitor - as source - try to control it as destination. */ - found += hdaa_audio_ctl_dest_amp(devinfo, w->nid, -1, - w->ossdev, 0, &minamp, &maxamp); + as source - try to control it as destination. + */ + found += hdaa_audio_ctl_dest_amp(devinfo, + w->nid, -1, w->ossdev, 0, &minamp, &maxamp); w->pflags |= HDAA_IMIX_AS_DST; } hdaa_adjust_amp(w, w->ossdev, found, minamp, maxamp); @@ -4990,21 +4903,20 @@ if (w->pflags & HDAA_ADC_MONITOR) { for (j = 0; j < w->nconns; j++) { if (!w->connsenable[j]) - continue; + continue; cw = hdaa_widget_get(devinfo, w->conns[j]); if (cw == NULL || cw->enable == 0) - continue; + continue; if (cw->bindas == -1) - continue; + continue; if (cw->bindas >= 0 && as[cw->bindas].dir != HDAA_CTL_IN) continue; minamp = maxamp = 0; - found = hdaa_audio_ctl_dest_amp(devinfo, - w->nid, j, SOUND_MIXER_IGAIN, 0, - &minamp, &maxamp); - hdaa_adjust_amp(w, SOUND_MIXER_IGAIN, - found, minamp, maxamp); + found = hdaa_audio_ctl_dest_amp(devinfo, w->nid, + j, SOUND_MIXER_IGAIN, 0, &minamp, &maxamp); + hdaa_adjust_amp(w, SOUND_MIXER_IGAIN, found, + minamp, maxamp); } } } @@ -5031,10 +4943,10 @@ /* Disable everything. */ if (devinfo->init_clear) { w->wclass.pin.ctrl &= ~( - HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE | - HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE | - HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE | - HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK); + HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE | + HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE | + HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE | + HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK); } if (w->enable == 0) { @@ -5057,17 +4969,17 @@ HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap)) w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE( - HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100); + HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100); else if ((devinfo->quirks & HDAA_QUIRK_IVREF80) && HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap)) w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE( - HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80); + HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80); else if ((devinfo->quirks & HDAA_QUIRK_IVREF50) && HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap)) w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE( - HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50); + HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50); } else { /* Output pin, configure for output. */ if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap)) @@ -5076,8 +4988,8 @@ if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap) && (w->wclass.pin.config & - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) == - HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT) + HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) == + HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT) w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE; @@ -5085,17 +4997,17 @@ HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap)) w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE( - HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100); + HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100); else if ((devinfo->quirks & HDAA_QUIRK_OVREF80) && HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap)) w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE( - HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80); + HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80); else if ((devinfo->quirks & HDAA_QUIRK_OVREF50) && HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap)) w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE( - HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50); + HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50); } } } @@ -5157,18 +5069,14 @@ gdir &= ~(1 << i); } } - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, "GPIO commit\n"); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, "GPIO commit\n");); hda_command(devinfo->dev, HDA_CMD_SET_GPIO_ENABLE_MASK(0, devinfo->nid, gmask)); hda_command(devinfo->dev, HDA_CMD_SET_GPIO_DIRECTION(0, devinfo->nid, gdir)); hda_command(devinfo->dev, HDA_CMD_SET_GPIO_DATA(0, devinfo->nid, gdata)); - HDA_BOOTVERBOSE( - hdaa_dump_gpio(devinfo); - ); + HDA_BOOTVERBOSE(hdaa_dump_gpio(devinfo);); } } @@ -5191,14 +5099,10 @@ gdata &= ~(1 << i); } } - HDA_BOOTVERBOSE( - device_printf(devinfo->dev, "GPO commit\n"); - ); + HDA_BOOTVERBOSE(device_printf(devinfo->dev, "GPO commit\n");); hda_command(devinfo->dev, HDA_CMD_SET_GPO_DATA(0, devinfo->nid, gdata)); - HDA_BOOTVERBOSE( - hdaa_dump_gpo(devinfo); - ); + HDA_BOOTVERBOSE(hdaa_dump_gpo(devinfo);); } } @@ -5224,18 +5128,16 @@ w->waspin) { hda_command(devinfo->dev, HDA_CMD_SET_PIN_WIDGET_CTRL(0, w->nid, - w->wclass.pin.ctrl)); + w->wclass.pin.ctrl)); } if (w->param.eapdbtl != HDA_INVALID) { uint32_t val; val = w->param.eapdbtl; - if (devinfo->quirks & - HDAA_QUIRK_EAPDINV) + if (devinfo->quirks & HDAA_QUIRK_EAPDINV) val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD; hda_command(devinfo->dev, - HDA_CMD_SET_EAPD_BTL_ENABLE(0, w->nid, - val)); + HDA_CMD_SET_EAPD_BTL_ENABLE(0, w->nid, val)); } } @@ -5249,14 +5151,12 @@ int i; hda_command(devinfo->dev, - HDA_CMD_SET_POWER_STATE(0, - devinfo->nid, HDA_CMD_POWER_STATE_D0)); + HDA_CMD_SET_POWER_STATE(0, devinfo->nid, HDA_CMD_POWER_STATE_D0)); DELAY(100); for (i = devinfo->startnode; i < devinfo->endnode; i++) { hda_command(devinfo->dev, - HDA_CMD_SET_POWER_STATE(0, - i, HDA_CMD_POWER_STATE_D0)); + HDA_CMD_SET_POWER_STATE(0, i, HDA_CMD_POWER_STATE_D0)); } DELAY(1000); } @@ -5324,7 +5224,8 @@ /* Do not count redirection pin/dac channels. */ if (i == 15 && as[ch->as].hpredir >= 0) continue; - channels += HDA_PARAM_AUDIO_WIDGET_CAP_CC(w->param.widget_cap) + 1; + channels += HDA_PARAM_AUDIO_WIDGET_CAP_CC(w->param.widget_cap) + + 1; if (HDA_PARAM_AUDIO_WIDGET_CAP_CC(w->param.widget_cap) != 1) onlystereo = 0; pinset |= (1 << i); @@ -5364,63 +5265,89 @@ else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(pcmcap)) ch->bit32 = 4; if (!(devinfo->quirks & HDAA_QUIRK_FORCESTEREO)) { - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 1, 0); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 1, + 0); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 1, 0); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 1, 0); } if (channels >= 2) { - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 2, 0); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 2, + 0); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 2, 0); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 2, 0); } if (channels >= 3 && !onlystereo) { - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 3, 0); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 3, + 0); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 3, 0); - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 3, 1); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 3, 0); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 3, + 1); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 3, 1); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 3, 1); } if (channels >= 4) { - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 4, 0); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 4, + 0); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 4, 0); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 4, 0); if (!onlystereo) { - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 4, 1); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S16_LE, 4, 1); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 4, 1); + ch->fmtlist[i++] = SND_FORMAT( + AFMT_S32_LE, 4, 1); } } if (channels >= 5 && !onlystereo) { - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 5, 0); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 5, + 0); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 5, 0); - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 5, 1); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 5, 0); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 5, + 1); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 5, 1); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 5, 1); } if (channels >= 6) { - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 6, 1); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 6, + 1); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 6, 1); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 6, 1); if (!onlystereo) { - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 6, 0); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S16_LE, 6, 0); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 6, 0); + ch->fmtlist[i++] = SND_FORMAT( + AFMT_S32_LE, 6, 0); } } if (channels >= 7 && !onlystereo) { - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 7, 0); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 7, + 0); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 7, 0); - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 7, 1); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 7, 0); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 7, + 1); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 7, 1); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 7, 1); } if (channels >= 8) { - ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 8, 1); + ch->fmtlist[i++] = SND_FORMAT(AFMT_S16_LE, 8, + 1); if (ch->bit32) - ch->fmtlist[i++] = SND_FORMAT(AFMT_S32_LE, 8, 1); + ch->fmtlist[i++] = + SND_FORMAT(AFMT_S32_LE, 8, 1); } } if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(fmtcap)) { @@ -5485,11 +5412,9 @@ apdev++; } } - devinfo->num_devs = - max(ardev, apdev) + max(drdev, dpdev); - devinfo->devs = - (struct hdaa_pcm_devinfo *)malloc( - devinfo->num_devs * sizeof(struct hdaa_pcm_devinfo), + devinfo->num_devs = max(ardev, apdev) + max(drdev, dpdev); + devinfo->devs = (struct hdaa_pcm_devinfo *)malloc(devinfo->num_devs * + sizeof(struct hdaa_pcm_devinfo), M_HDAA, M_ZERO | M_NOWAIT); if (devinfo->devs == NULL) { device_printf(devinfo->dev, @@ -5508,8 +5433,7 @@ continue; for (j = 0; j < devinfo->num_devs; j++) { if (devinfo->devs[j].digital != 255 && - (!devinfo->devs[j].digital) != - (!as[i].digital)) + (!devinfo->devs[j].digital) != (!as[i].digital)) continue; if (as[i].dir == HDAA_CTL_IN) { if (devinfo->devs[j].recas >= 0) @@ -5545,7 +5469,8 @@ } static void -hdaa_dump_ctls(struct hdaa_pcm_devinfo *pdevinfo, const char *banner, uint32_t flag) +hdaa_dump_ctls(struct hdaa_pcm_devinfo *pdevinfo, const char *banner, + uint32_t flag) { struct hdaa_devinfo *devinfo = pdevinfo->devinfo; struct hdaa_audio_ctl *ctl; @@ -5553,10 +5478,10 @@ int i, j, printed = 0; if (flag == 0) { - flag = ~(SOUND_MASK_VOLUME | SOUND_MASK_PCM | - SOUND_MASK_CD | SOUND_MASK_LINE | SOUND_MASK_RECLEV | - SOUND_MASK_MIC | SOUND_MASK_SPEAKER | SOUND_MASK_IGAIN | - SOUND_MASK_OGAIN | SOUND_MASK_IMIX | SOUND_MASK_MONITOR); + flag = ~(SOUND_MASK_VOLUME | SOUND_MASK_PCM | SOUND_MASK_CD | + SOUND_MASK_LINE | SOUND_MASK_RECLEV | SOUND_MASK_MIC | + SOUND_MASK_SPEAKER | SOUND_MASK_IGAIN | SOUND_MASK_OGAIN | + SOUND_MASK_IMIX | SOUND_MASK_MONITOR); } for (j = 0; j < SOUND_MIXER_NRDEVICES; j++) { @@ -5565,27 +5490,29 @@ i = 0; printed = 0; while ((ctl = hdaa_audio_ctl_each(devinfo, &i)) != NULL) { - if (ctl->enable == 0 || - ctl->widget->enable == 0) + if (ctl->enable == 0 || ctl->widget->enable == 0) continue; if (!((pdevinfo->playas >= 0 && - ctl->widget->bindas == pdevinfo->playas) || - (pdevinfo->recas >= 0 && - ctl->widget->bindas == pdevinfo->recas) || - (ctl->widget->bindas == -2 && pdevinfo->index == 0))) + ctl->widget->bindas == pdevinfo->playas) || + (pdevinfo->recas >= 0 && + ctl->widget->bindas == pdevinfo->recas) || + (ctl->widget->bindas == -2 && + pdevinfo->index == 0))) continue; if ((ctl->ossmask & (1 << j)) == 0) continue; if (printed == 0) { if (banner != NULL) { - device_printf(pdevinfo->dev, "%s", banner); + device_printf(pdevinfo->dev, "%s", + banner); } else { - device_printf(pdevinfo->dev, "Unknown Ctl"); + device_printf(pdevinfo->dev, + "Unknown Ctl"); } printf(" (OSS: %s)", hdaa_audio_ctl_ossmixer_mask2allname(1 << j, - buf, sizeof(buf))); + buf, sizeof(buf))); if (pdevinfo->ossmask & (1 << j)) { printf(": %+d/%+ddB\n", pdevinfo->minamp[j] / 4, @@ -5594,21 +5521,19 @@ printf("\n"); printed = 1; } - device_printf(pdevinfo->dev, " +- ctl %2d (nid %3d %s", i, - ctl->widget->nid, - (ctl->ndir == HDAA_CTL_IN)?"in ":"out"); + device_printf(pdevinfo->dev, + " +- ctl %2d (nid %3d %s", i, ctl->widget->nid, + (ctl->ndir == HDAA_CTL_IN) ? "in " : "out"); if (ctl->ndir == HDAA_CTL_IN && ctl->ndir == ctl->dir) printf(" %2d): ", ctl->index); else printf("): "); if (ctl->step > 0) { printf("%+d/%+ddB (%d steps)%s\n", - MINQDB(ctl) / 4, - MAXQDB(ctl) / 4, - ctl->step + 1, - ctl->mute?" + mute":""); + MINQDB(ctl) / 4, MAXQDB(ctl) / 4, + ctl->step + 1, ctl->mute ? " + mute" : ""); } else - printf("%s\n", ctl->mute?"mute":""); + printf("%s\n", ctl->mute ? "mute" : ""); } } if (printed) @@ -5717,7 +5642,8 @@ printf("\n"); device_printf(w->devinfo->dev, " Pin config: 0x%08x\n", w->wclass.pin.config); - device_printf(w->devinfo->dev, " Pin control: 0x%08x", w->wclass.pin.ctrl); + device_printf(w->devinfo->dev, " Pin control: 0x%08x", + w->wclass.pin.ctrl); if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE) printf(" HP"); if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE) @@ -5726,14 +5652,14 @@ printf(" OUT"); if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) { if ((w->wclass.pin.ctrl & - HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) == 0x03) + HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) == 0x03) printf(" HBR"); else if ((w->wclass.pin.ctrl & - HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) != 0) + HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) != 0) printf(" EPTs"); } else { if ((w->wclass.pin.ctrl & - HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) != 0) + HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) != 0) printf(" VREFs"); } printf("\n"); @@ -5743,18 +5669,17 @@ hdaa_dump_pin_config(struct hdaa_widget *w, uint32_t conf) { - device_printf(w->devinfo->dev, "%2d %08x %-2d %-2d " + device_printf(w->devinfo->dev, + "%2d %08x %-2d %-2d " "%-13s %-5s %-7s %-10s %-7s %d%s\n", - w->nid, conf, - HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf), + w->nid, conf, HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf), HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf), HDA_DEVS[HDA_CONFIG_DEFAULTCONF_DEVICE(conf)], HDA_CONNS[HDA_CONFIG_DEFAULTCONF_CONNECTIVITY(conf)], HDA_CONNECTORS[HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE(conf)], HDA_LOCS[HDA_CONFIG_DEFAULTCONF_LOCATION(conf)], HDA_COLORS[HDA_CONFIG_DEFAULTCONF_COLOR(conf)], - HDA_CONFIG_DEFAULTCONF_MISC(conf), - (w->enable == 0)?" DISA":""); + HDA_CONFIG_DEFAULTCONF_MISC(conf), (w->enable == 0) ? " DISA" : ""); } static void @@ -5763,7 +5688,8 @@ struct hdaa_widget *w; int i; - device_printf(devinfo->dev, "nid 0x as seq " + device_printf(devinfo->dev, + "nid 0x as seq " "device conn jack loc color misc\n"); for (i = devinfo->startnode; i < devinfo->endnode; i++) { w = hdaa_widget_get(devinfo, i); @@ -5783,12 +5709,11 @@ offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(cap); size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(cap); step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(cap); - device_printf(dev, " %s amp: 0x%08x " + device_printf(dev, + " %s amp: 0x%08x " "mute=%d step=%d size=%d offset=%d (%+d/%+ddB)\n", - banner, cap, - HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap), - step, size, offset, - ((0 - offset) * (size + 1)) / 4, + banner, cap, HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap), step, size, + offset, ((0 - offset) * (size + 1)) / 4, ((step - offset) * (size + 1)) / 4); } @@ -5801,8 +5726,7 @@ device_printf(devinfo->dev, "\n"); device_printf(devinfo->dev, "Default parameters:\n"); - hdaa_dump_audio_formats(devinfo->dev, - devinfo->supp_stream_formats, + hdaa_dump_audio_formats(devinfo->dev, devinfo->supp_stream_formats, devinfo->supp_pcm_size_rate); hdaa_dump_amp(devinfo->dev, devinfo->inamp_cap, " Input"); hdaa_dump_amp(devinfo->dev, devinfo->outamp_cap, "Output"); @@ -5819,35 +5743,43 @@ device_printf(devinfo->dev, " Widget cap: 0x%08x", w->param.widget_cap); if (w->param.widget_cap & 0x0ee1) { - if (HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(w->param.widget_cap)) - printf(" LRSWAP"); - if (HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(w->param.widget_cap)) - printf(" PWR"); - if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) - printf(" DIGITAL"); - if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap)) - printf(" UNSOL"); - if (HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(w->param.widget_cap)) - printf(" PROC"); - if (HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(w->param.widget_cap)) - printf(" STRIPE(x%d)", - 1 << (fls(w->wclass.conv.stripecap) - 1)); + if (HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP( + w->param.widget_cap)) + printf(" LRSWAP"); + if (HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL( + w->param.widget_cap)) + printf(" PWR"); + if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL( + w->param.widget_cap)) + printf(" DIGITAL"); + if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP( + w->param.widget_cap)) + printf(" UNSOL"); + if (HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET( + w->param.widget_cap)) + printf(" PROC"); + if (HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE( + w->param.widget_cap)) + printf(" STRIPE(x%d)", + 1 << (fls(w->wclass.conv.stripecap) - 1)); j = HDA_PARAM_AUDIO_WIDGET_CAP_CC(w->param.widget_cap); if (j == 1) - printf(" STEREO"); + printf(" STEREO"); else if (j > 1) - printf(" %dCH", j + 1); + printf(" %dCH", j + 1); } printf("\n"); if (w->bindas != -1) { - device_printf(devinfo->dev, " Association: %d (0x%04x)\n", - w->bindas, w->bindseqmask); + device_printf(devinfo->dev, + " Association: %d (0x%04x)\n", w->bindas, + w->bindseqmask); } if (w->ossmask != 0 || w->ossdev >= 0) { device_printf(devinfo->dev, " OSS: %s", - hdaa_audio_ctl_ossmixer_mask2allname(w->ossmask, buf, sizeof(buf))); + hdaa_audio_ctl_ossmixer_mask2allname(w->ossmask, + buf, sizeof(buf))); if (w->ossdev >= 0) - printf(" (%s)", ossnames[w->ossdev]); + printf(" (%s)", ossnames[w->ossdev]); printf("\n"); } if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT || @@ -5856,35 +5788,40 @@ w->param.supp_stream_formats, w->param.supp_pcm_size_rate); } else if (w->type == - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX || w->waspin) + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX || + w->waspin) hdaa_dump_pin(w); if (w->param.eapdbtl != HDA_INVALID) device_printf(devinfo->dev, " EAPD: 0x%08x\n", w->param.eapdbtl); if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(w->param.widget_cap) && w->param.outamp_cap != 0) - hdaa_dump_amp(devinfo->dev, w->param.outamp_cap, "Output"); + hdaa_dump_amp(devinfo->dev, w->param.outamp_cap, + "Output"); if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(w->param.widget_cap) && w->param.inamp_cap != 0) - hdaa_dump_amp(devinfo->dev, w->param.inamp_cap, " Input"); + hdaa_dump_amp(devinfo->dev, w->param.inamp_cap, + " Input"); if (w->nconns > 0) - device_printf(devinfo->dev, " Connections: %d\n", w->nconns); + device_printf(devinfo->dev, " Connections: %d\n", + w->nconns); for (j = 0; j < w->nconns; j++) { cw = hdaa_widget_get(devinfo, w->conns[j]); - device_printf(devinfo->dev, " + %s<- nid=%d [%s]", - (w->connsenable[j] == 0)?"[DISABLED] ":"", + device_printf(devinfo->dev, + " + %s<- nid=%d [%s]", + (w->connsenable[j] == 0) ? "[DISABLED] " : "", w->conns[j], (cw == NULL) ? "GHOST!" : cw->name); if (cw == NULL) printf(" [UNKNOWN]"); else if (cw->enable == 0) printf(" [DISABLED]"); - if (w->nconns > 1 && w->selconn == j && w->type != - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) + if (w->nconns > 1 && w->selconn == j && + w->type != + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) printf(" (selected)"); printf("\n"); } } - } static void @@ -5905,7 +5842,8 @@ if (depth == 0) device_printf(pdevinfo->dev, "%*s", 4, ""); else - device_printf(pdevinfo->dev, "%*s + <- ", 4 + (depth - 1) * 7, ""); + device_printf(pdevinfo->dev, "%*s + <- ", 4 + (depth - 1) * 7, + ""); printf("nid=%d [%s]", w->nid, w->name); if (depth > 0) { @@ -5914,8 +5852,8 @@ return; } printf(" [src: %s]", - hdaa_audio_ctl_ossmixer_mask2allname( - w->ossmask, buf, sizeof(buf))); + hdaa_audio_ctl_ossmixer_mask2allname(w->ossmask, buf, + sizeof(buf))); if (w->ossdev >= 0) { printf("\n"); return; @@ -5931,7 +5869,6 @@ continue; hdaa_dump_dst_nid(pdevinfo, w->conns[i], depth + 1); } - } static void @@ -6048,21 +5985,22 @@ int i; device_printf(dev, "Dumping AFG pins:\n"); - device_printf(dev, "nid 0x as seq " + device_printf(dev, + "nid 0x as seq " "device conn jack loc color misc\n"); for (i = devinfo->startnode; i < devinfo->endnode; i++) { w = hdaa_widget_get(devinfo, i); - if (w == NULL || w->type != - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) + if (w == NULL || + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) continue; hdaa_dump_pin_config(w, w->wclass.pin.config); pincap = w->wclass.pin.cap; device_printf(dev, " Caps: %2s %3s %2s %4s %4s", - HDA_PARAM_PIN_CAP_INPUT_CAP(pincap)?"IN":"", - HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap)?"OUT":"", - HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap)?"HP":"", - HDA_PARAM_PIN_CAP_EAPD_CAP(pincap)?"EAPD":"", - HDA_PARAM_PIN_CAP_VREF_CTRL(pincap)?"VREF":""); + HDA_PARAM_PIN_CAP_INPUT_CAP(pincap) ? "IN" : "", + HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap) ? "OUT" : "", + HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap) ? "HP" : "", + HDA_PARAM_PIN_CAP_EAPD_CAP(pincap) ? "EAPD" : "", + HDA_PARAM_PIN_CAP_VREF_CTRL(pincap) ? "VREF" : ""); if (HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap) || HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap)) { if (HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap)) { @@ -6072,21 +6010,25 @@ do { res = hda_command(dev, HDA_CMD_GET_PIN_SENSE(0, w->nid)); - if (res != 0x7fffffff && res != 0xffffffff) + if (res != 0x7fffffff && + res != 0xffffffff) break; DELAY(10); } while (++delay < 10000); } else { delay = 0; - res = hda_command(dev, HDA_CMD_GET_PIN_SENSE(0, - w->nid)); + res = hda_command(dev, + HDA_CMD_GET_PIN_SENSE(0, w->nid)); } printf(" Sense: 0x%08x (%sconnected%s)", res, (res & HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT) ? - "" : "dis", - (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap) && - (res & HDA_CMD_GET_PIN_SENSE_ELD_VALID)) ? - ", ELD valid" : ""); + "" : + "dis", + (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL( + w->param.widget_cap) && + (res & HDA_CMD_GET_PIN_SENSE_ELD_VALID)) ? + ", ELD valid" : + ""); if (delay > 0) printf(" delay %dus", delay * 10); } @@ -6111,145 +6053,99 @@ struct hdaa_audio_ctl *ctl; int i; - HDA_BOOTHVERBOSE( - device_printf(dev, "Applying built-in patches...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Applying built-in patches...\n");); hdaa_patch(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Applying local patches...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Applying local patches...\n");); hdaa_local_patch(devinfo); hdaa_audio_postprocess(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Parsing Ctls...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Parsing Ctls...\n");); hdaa_audio_ctl_parse(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Disabling nonaudio...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Disabling nonaudio...\n");); hdaa_audio_disable_nonaudio(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Disabling useless...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Disabling useless...\n");); hdaa_audio_disable_useless(devinfo); - HDA_BOOTVERBOSE( - device_printf(dev, "Patched pins configuration:\n"); - hdaa_dump_pin_configs(devinfo); - ); - HDA_BOOTHVERBOSE( - device_printf(dev, "Parsing pin associations...\n"); - ); + HDA_BOOTVERBOSE(device_printf(dev, "Patched pins configuration:\n"); + hdaa_dump_pin_configs(devinfo);); + HDA_BOOTHVERBOSE(device_printf(dev, "Parsing pin associations...\n");); hdaa_audio_as_parse(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Building AFG tree...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Building AFG tree...\n");); hdaa_audio_build_tree(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Disabling unassociated " - "widgets...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, + "Disabling unassociated " + "widgets...\n");); hdaa_audio_disable_unas(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Disabling nonselected " - "inputs...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, + "Disabling nonselected " + "inputs...\n");); hdaa_audio_disable_notselected(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Disabling useless...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Disabling useless...\n");); hdaa_audio_disable_useless(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Disabling " - "crossassociatement connections...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, + "Disabling " + "crossassociatement connections...\n");); hdaa_audio_disable_crossas(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Disabling useless...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Disabling useless...\n");); hdaa_audio_disable_useless(devinfo); HDA_BOOTHVERBOSE( - device_printf(dev, "Binding associations to channels...\n"); - ); + device_printf(dev, "Binding associations to channels...\n");); hdaa_audio_bind_as(devinfo); HDA_BOOTHVERBOSE( - device_printf(dev, "Assigning names to signal sources...\n"); - ); + device_printf(dev, "Assigning names to signal sources...\n");); hdaa_audio_assign_names(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Preparing PCM devices...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Preparing PCM devices...\n");); hdaa_prepare_pcms(devinfo); HDA_BOOTHVERBOSE( - device_printf(dev, "Assigning mixers to the tree...\n"); - ); + device_printf(dev, "Assigning mixers to the tree...\n");); hdaa_audio_assign_mixers(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Preparing pin controls...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Preparing pin controls...\n");); hdaa_audio_prepare_pin_ctrl(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "AFG commit...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "AFG commit...\n");); hdaa_audio_commit(devinfo); HDA_BOOTHVERBOSE( - device_printf(dev, "Applying direct built-in patches...\n"); - ); + device_printf(dev, "Applying direct built-in patches...\n");); hdaa_patch_direct(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Pin sense init...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Pin sense init...\n");); hdaa_sense_init(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Creating PCM devices...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Creating PCM devices...\n");); hdaa_create_pcms(devinfo); - HDA_BOOTVERBOSE( - if (devinfo->quirks != 0) { - device_printf(dev, "FG config/quirks:"); - for (i = 0; i < nitems(hdaa_quirks_tab); i++) { - if ((devinfo->quirks & - hdaa_quirks_tab[i].value) == - hdaa_quirks_tab[i].value) - printf(" %s", hdaa_quirks_tab[i].key); - } - printf("\n"); + HDA_BOOTVERBOSE(if (devinfo->quirks != 0) { + device_printf(dev, "FG config/quirks:"); + for (i = 0; i < nitems(hdaa_quirks_tab); i++) { + if ((devinfo->quirks & hdaa_quirks_tab[i].value) == + hdaa_quirks_tab[i].value) + printf(" %s", hdaa_quirks_tab[i].key); } - ); + printf("\n"); + }); HDA_BOOTHVERBOSE( - device_printf(dev, "\n"); - device_printf(dev, "+-----------+\n"); - device_printf(dev, "| HDA NODES |\n"); - device_printf(dev, "+-----------+\n"); - hdaa_dump_nodes(devinfo); - - device_printf(dev, "\n"); - device_printf(dev, "+----------------+\n"); - device_printf(dev, "| HDA AMPLIFIERS |\n"); - device_printf(dev, "+----------------+\n"); - device_printf(dev, "\n"); - i = 0; - while ((ctl = hdaa_audio_ctl_each(devinfo, &i)) != NULL) { - device_printf(dev, "%3d: nid %3d %s (%s) index %d", i, - (ctl->widget != NULL) ? ctl->widget->nid : -1, - (ctl->ndir == HDAA_CTL_IN)?"in ":"out", - (ctl->dir == HDAA_CTL_IN)?"in ":"out", - ctl->index); - if (ctl->childwidget != NULL) - printf(" cnid %3d", ctl->childwidget->nid); - else - printf(" "); - printf(" ossmask=0x%08x\n", - ctl->ossmask); - device_printf(dev, - " mute: %d step: %3d size: %3d off: %3d%s\n", - ctl->mute, ctl->step, ctl->size, ctl->offset, - (ctl->enable == 0) ? " [DISABLED]" : + device_printf(dev, "\n"); device_printf(dev, "+-----------+\n"); + device_printf(dev, "| HDA NODES |\n"); + device_printf(dev, "+-----------+\n"); hdaa_dump_nodes(devinfo); + + device_printf(dev, "\n"); + device_printf(dev, "+----------------+\n"); + device_printf(dev, "| HDA AMPLIFIERS |\n"); + device_printf(dev, "+----------------+\n"); + device_printf(dev, "\n"); i = 0; + while ((ctl = hdaa_audio_ctl_each(devinfo, &i)) != NULL) { + device_printf(dev, "%3d: nid %3d %s (%s) index %d", i, + (ctl->widget != NULL) ? ctl->widget->nid : -1, + (ctl->ndir == HDAA_CTL_IN) ? "in " : "out", + (ctl->dir == HDAA_CTL_IN) ? "in " : "out", ctl->index); + if (ctl->childwidget != NULL) + printf(" cnid %3d", ctl->childwidget->nid); + else + printf(" "); + printf(" ossmask=0x%08x\n", ctl->ossmask); + device_printf(dev, + " mute: %d step: %3d size: %3d off: %3d%s\n", + ctl->mute, ctl->step, ctl->size, ctl->offset, + (ctl->enable == 0) ? + " [DISABLED]" : ((ctl->ossmask == 0) ? " [UNUSED]" : "")); - } - device_printf(dev, "\n"); - ); + } device_printf(dev, "\n");); } static void @@ -6259,9 +6155,7 @@ struct hdaa_widget *w; int i, j; - HDA_BOOTHVERBOSE( - device_printf(dev, "Pin sense deinit...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Pin sense deinit...\n");); hdaa_sense_deinit(devinfo); free(devinfo->ctl, M_HDAA); devinfo->ctl = NULL; @@ -6311,8 +6205,7 @@ hdaa_lock(devinfo); numgpi = HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->gpio_cap); if (numgpi > 0) { - data = hda_command(dev, - HDA_CMD_GET_GPI_DATA(0, devinfo->nid)); + data = hda_command(dev, HDA_CMD_GET_GPI_DATA(0, devinfo->nid)); } hdaa_unlock(devinfo); for (i = 0; i < numgpi; i++) { @@ -6335,8 +6228,7 @@ hdaa_lock(devinfo); numgpio = HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->gpio_cap); if (numgpio > 0) { - data = hda_command(dev, - HDA_CMD_GET_GPIO_DATA(0, devinfo->nid)); + data = hda_command(dev, HDA_CMD_GET_GPIO_DATA(0, devinfo->nid)); enable = hda_command(dev, HDA_CMD_GET_GPIO_ENABLE_MASK(0, devinfo->nid)); dir = hda_command(dev, @@ -6344,8 +6236,8 @@ } hdaa_unlock(devinfo); for (i = 0; i < numgpio; i++) { - n += snprintf(buf + n, sizeof(buf) - n, "%s%d=", - n != 0 ? " " : "", i); + n += snprintf(buf + n, sizeof(buf) - n, + "%s%d=", n != 0 ? " " : "", i); if ((enable & (1 << i)) == 0) { n += snprintf(buf + n, sizeof(buf) - n, "disabled"); continue; @@ -6399,8 +6291,7 @@ hdaa_lock(devinfo); numgpo = HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->gpio_cap); if (numgpo > 0) { - data = hda_command(dev, - HDA_CMD_GET_GPO_DATA(0, devinfo->nid)); + data = hda_command(dev, HDA_CMD_GET_GPO_DATA(0, devinfo->nid)); } hdaa_unlock(devinfo); for (i = 0; i < numgpo; i++) { @@ -6456,9 +6347,7 @@ if (error != 0 || req->newptr == NULL || val == 0) return (error); - HDA_BOOTHVERBOSE( - device_printf(dev, "Reconfiguration...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Reconfiguration...\n");); bus_topo_lock(); @@ -6471,9 +6360,7 @@ hdaa_configure(dev); hdaa_unlock(devinfo); bus_generic_attach(dev); - HDA_BOOTHVERBOSE( - device_printf(dev, "Reconfiguration done\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Reconfiguration done\n");); bus_topo_unlock(); @@ -6486,33 +6373,25 @@ struct hdaa_devinfo *devinfo = device_get_softc(dev); int i; - HDA_BOOTHVERBOSE( - device_printf(dev, "Suspend...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Suspend...\n");); hdaa_lock(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Stop streams...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Stop streams...\n");); for (i = 0; i < devinfo->num_chans; i++) { if (devinfo->chans[i].flags & HDAA_CHN_RUNNING) { devinfo->chans[i].flags |= HDAA_CHN_SUSPEND; hdaa_channel_stop(&devinfo->chans[i]); } } - HDA_BOOTHVERBOSE( - device_printf(dev, "Power down FG" - " nid=%d to the D3 state...\n", - devinfo->nid); - ); + HDA_BOOTHVERBOSE(device_printf(dev, + "Power down FG" + " nid=%d to the D3 state...\n", + devinfo->nid);); hda_command(devinfo->dev, - HDA_CMD_SET_POWER_STATE(0, - devinfo->nid, HDA_CMD_POWER_STATE_D3)); + HDA_CMD_SET_POWER_STATE(0, devinfo->nid, HDA_CMD_POWER_STATE_D3)); callout_stop(&devinfo->poll_jack); hdaa_unlock(devinfo); callout_drain(&devinfo->poll_jack); - HDA_BOOTHVERBOSE( - device_printf(dev, "Suspend done\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Suspend done\n");); return (0); } @@ -6522,43 +6401,30 @@ struct hdaa_devinfo *devinfo = device_get_softc(dev); int i; - HDA_BOOTHVERBOSE( - device_printf(dev, "Resume...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Resume...\n");); hdaa_lock(devinfo); HDA_BOOTHVERBOSE( - device_printf(dev, "Power up audio FG nid=%d...\n", - devinfo->nid); - ); + device_printf(dev, "Power up audio FG nid=%d...\n", devinfo->nid);); hdaa_powerup(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "AFG commit...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "AFG commit...\n");); hdaa_audio_commit(devinfo); HDA_BOOTHVERBOSE( - device_printf(dev, "Applying direct built-in patches...\n"); - ); + device_printf(dev, "Applying direct built-in patches...\n");); hdaa_patch_direct(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Pin sense init...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Pin sense init...\n");); hdaa_sense_init(devinfo); hdaa_unlock(devinfo); for (i = 0; i < devinfo->num_devs; i++) { struct hdaa_pcm_devinfo *pdevinfo = &devinfo->devs[i]; - HDA_BOOTHVERBOSE( - device_printf(pdevinfo->dev, - "OSS mixer reinitialization...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(pdevinfo->dev, + "OSS mixer reinitialization...\n");); if (mixer_reinit(pdevinfo->dev) == -1) device_printf(pdevinfo->dev, "unable to reinitialize the mixer\n"); } hdaa_lock(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Start streams...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Start streams...\n");); for (i = 0; i < devinfo->num_chans; i++) { if (devinfo->chans[i].flags & HDAA_CHN_SUSPEND) { devinfo->chans[i].flags &= ~HDAA_CHN_SUSPEND; @@ -6566,9 +6432,7 @@ } } hdaa_unlock(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Resume done\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Resume done\n");); return (0); } @@ -6603,80 +6467,68 @@ hdaa_lock(devinfo); res = hda_command(dev, - HDA_CMD_GET_PARAMETER(0 , nid, HDA_PARAM_SUB_NODE_COUNT)); + HDA_CMD_GET_PARAMETER(0, nid, HDA_PARAM_SUB_NODE_COUNT)); hdaa_unlock(devinfo); devinfo->nodecnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(res); devinfo->startnode = HDA_PARAM_SUB_NODE_COUNT_START(res); devinfo->endnode = devinfo->startnode + devinfo->nodecnt; - HDA_BOOTVERBOSE( - device_printf(dev, "Subsystem ID: 0x%08x\n", - hda_get_subsystem_id(dev)); - ); - HDA_BOOTHVERBOSE( - device_printf(dev, - "Audio Function Group at nid=%d: %d subnodes %d-%d\n", - nid, devinfo->nodecnt, - devinfo->startnode, devinfo->endnode - 1); - ); + HDA_BOOTVERBOSE(device_printf(dev, "Subsystem ID: 0x%08x\n", + hda_get_subsystem_id(dev));); + HDA_BOOTHVERBOSE(device_printf(dev, + "Audio Function Group at nid=%d: %d subnodes %d-%d\n", nid, + devinfo->nodecnt, devinfo->startnode, devinfo->endnode - 1);); if (devinfo->nodecnt > 0) - devinfo->widget = (struct hdaa_widget *)malloc( - sizeof(*(devinfo->widget)) * devinfo->nodecnt, M_HDAA, - M_WAITOK | M_ZERO); + devinfo->widget = (struct hdaa_widget *) + malloc(sizeof(*(devinfo->widget)) * devinfo->nodecnt, + M_HDAA, M_WAITOK | M_ZERO); else devinfo->widget = NULL; hdaa_lock(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Powering up...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Powering up...\n");); hdaa_powerup(devinfo); - HDA_BOOTHVERBOSE( - device_printf(dev, "Parsing audio FG...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Parsing audio FG...\n");); hdaa_audio_parse(devinfo); - HDA_BOOTVERBOSE( - device_printf(dev, "Original pins configuration:\n"); - hdaa_dump_pin_configs(devinfo); - ); + HDA_BOOTVERBOSE(device_printf(dev, "Original pins configuration:\n"); + hdaa_dump_pin_configs(devinfo);); hdaa_configure(dev); hdaa_unlock(devinfo); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "config", CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, - &devinfo->newquirks, 0, hdaa_sysctl_quirks, "A", - "Configuration options"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "config", + CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, &devinfo->newquirks, + 0, hdaa_sysctl_quirks, "A", "Configuration options"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "gpi_state", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, - devinfo, 0, hdaa_sysctl_gpi_state, "A", "GPI state"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "gpi_state", + CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, devinfo, 0, + hdaa_sysctl_gpi_state, "A", "GPI state"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "gpio_state", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, - devinfo, 0, hdaa_sysctl_gpio_state, "A", "GPIO state"); + "gpio_state", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, devinfo, + 0, hdaa_sysctl_gpio_state, "A", "GPIO state"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "gpio_config", CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, devinfo, 0, hdaa_sysctl_gpio_config, "A", "GPIO configuration"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "gpo_state", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, - devinfo, 0, hdaa_sysctl_gpo_state, "A", "GPO state"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "gpo_state", + CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, devinfo, 0, + hdaa_sysctl_gpo_state, "A", "GPO state"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "gpo_config", CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, - devinfo, 0, hdaa_sysctl_gpo_config, "A", "GPO configuration"); + "gpo_config", CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, devinfo, + 0, hdaa_sysctl_gpo_config, "A", "GPO configuration"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "reconfig", CTLTYPE_INT | CTLFLAG_RW, - dev, 0, hdaa_sysctl_reconfig, "I", "Reprocess configuration"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "reconfig", + CTLTYPE_INT | CTLFLAG_RW, dev, 0, hdaa_sysctl_reconfig, "I", + "Reprocess configuration"); SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "init_clear", CTLFLAG_RW, - &devinfo->init_clear, 1,"Clear initial pin widget configuration"); + "init_clear", CTLFLAG_RW, &devinfo->init_clear, 1, + "Clear initial pin widget configuration"); bus_generic_attach(dev); return (0); } @@ -6705,8 +6557,8 @@ hdaa_print_child(device_t dev, device_t child) { struct hdaa_devinfo *devinfo = device_get_softc(dev); - struct hdaa_pcm_devinfo *pdevinfo = - (struct hdaa_pcm_devinfo *)device_get_ivars(child); + struct hdaa_pcm_devinfo *pdevinfo = (struct hdaa_pcm_devinfo *) + device_get_ivars(child); struct hdaa_audio_as *as; int retval, first = 1, i; @@ -6743,8 +6595,8 @@ hdaa_child_location(device_t dev, device_t child, struct sbuf *sb) { struct hdaa_devinfo *devinfo = device_get_softc(dev); - struct hdaa_pcm_devinfo *pdevinfo = - (struct hdaa_pcm_devinfo *)device_get_ivars(child); + struct hdaa_pcm_devinfo *pdevinfo = (struct hdaa_pcm_devinfo *) + device_get_ivars(child); struct hdaa_audio_as *as; int first = 1, i; @@ -6798,13 +6650,12 @@ int i, tag, flags; HDA_BOOTHVERBOSE( - device_printf(dev, "Unsolicited response %08x\n", resp); - ); + device_printf(dev, "Unsolicited response %08x\n", resp);); tag = resp >> 26; for (i = devinfo->startnode; i < devinfo->endnode; i++) { w = hdaa_widget_get(devinfo, i); - if (w == NULL || w->enable == 0 || w->type != - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) + if (w == NULL || w->enable == 0 || + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) continue; if (w->unsol != tag) continue; @@ -6822,18 +6673,17 @@ static device_method_t hdaa_methods[] = { /* device interface */ - DEVMETHOD(device_probe, hdaa_probe), - DEVMETHOD(device_attach, hdaa_attach), - DEVMETHOD(device_detach, hdaa_detach), - DEVMETHOD(device_suspend, hdaa_suspend), - DEVMETHOD(device_resume, hdaa_resume), + DEVMETHOD(device_probe, hdaa_probe), + DEVMETHOD(device_attach, hdaa_attach), + DEVMETHOD(device_detach, hdaa_detach), + DEVMETHOD(device_suspend, hdaa_suspend), + DEVMETHOD(device_resume, hdaa_resume), /* Bus interface */ - DEVMETHOD(bus_print_child, hdaa_print_child), - DEVMETHOD(bus_child_location, hdaa_child_location), - DEVMETHOD(hdac_stream_intr, hdaa_stream_intr), - DEVMETHOD(hdac_unsol_intr, hdaa_unsol_intr), - DEVMETHOD(hdac_pindump, hdaa_pindump), - DEVMETHOD_END + DEVMETHOD(bus_print_child, hdaa_print_child), + DEVMETHOD(bus_child_location, hdaa_child_location), + DEVMETHOD(hdac_stream_intr, hdaa_stream_intr), + DEVMETHOD(hdac_unsol_intr, hdaa_unsol_intr), + DEVMETHOD(hdac_pindump, hdaa_pindump), DEVMETHOD_END }; static driver_t hdaa_driver = { @@ -6845,8 +6695,7 @@ DRIVER_MODULE(snd_hda, hdacc, hdaa_driver, NULL, NULL); static void -hdaa_chan_formula(struct hdaa_devinfo *devinfo, int asid, - char *buf, int buflen) +hdaa_chan_formula(struct hdaa_devinfo *devinfo, int asid, char *buf, int buflen) { struct hdaa_audio_as *as; int c; @@ -6884,8 +6733,8 @@ as = &devinfo->as[asid]; for (i = 0; i < 16; i++) { w = hdaa_widget_get(devinfo, as->pins[i]); - if (w == NULL || w->enable == 0 || w->type != - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) + if (w == NULL || w->enable == 0 || + w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) continue; t1 = HDA_CONFIG_DEFAULTCONF_DEVICE(w->wclass.pin.config); if (t == -1) @@ -6909,8 +6758,9 @@ uint32_t pcmcap; ch = &devinfo->chans[as->chans[0]]; - val = (ch->bit32 == 4) ? 32 : ((ch->bit32 == 3) ? 24 : - ((ch->bit32 == 2) ? 20 : 0)); + val = (ch->bit32 == 4) ? + 32 : + ((ch->bit32 == 3) ? 24 : ((ch->bit32 == 2) ? 20 : 0)); error = sysctl_handle_int(oidp, &val, 0, req); if (error != 0 || req->newptr == NULL) return (error); @@ -6931,8 +6781,8 @@ static int hdaa_pcm_probe(device_t dev) { - struct hdaa_pcm_devinfo *pdevinfo = - (struct hdaa_pcm_devinfo *)device_get_ivars(dev); + struct hdaa_pcm_devinfo *pdevinfo = (struct hdaa_pcm_devinfo *) + device_get_ivars(dev); struct hdaa_devinfo *devinfo = pdevinfo->devinfo; const char *pdesc; char chans1[8], chans2[8]; @@ -6954,13 +6804,13 @@ chans2[0] = 0; t1 = t2 = -1; if (pdevinfo->playas >= 0) { - hdaa_chan_formula(devinfo, pdevinfo->playas, - chans1, sizeof(chans1)); + hdaa_chan_formula(devinfo, pdevinfo->playas, chans1, + sizeof(chans1)); t1 = hdaa_chan_type(devinfo, pdevinfo->playas); } if (pdevinfo->recas >= 0) { - hdaa_chan_formula(devinfo, pdevinfo->recas, - chans2, sizeof(chans2)); + hdaa_chan_formula(devinfo, pdevinfo->recas, chans2, + sizeof(chans2)); t2 = hdaa_chan_type(devinfo, pdevinfo->recas); } if (chans1[0] != 0 || chans2[0] != 0) { @@ -6981,14 +6831,16 @@ t1 = -2; pdesc = device_get_desc(device_get_parent(dev)); device_set_descf(dev, "%.*s (%s%s%s%s%s%s%s%s%s)", - (int)(strlen(pdesc) - 21), pdesc, - loc1 >= 0 ? HDA_LOCS[loc1] : "", loc1 >= 0 ? " " : "", - (pdevinfo->digital == 0x7)?"HDMI/DP": - ((pdevinfo->digital == 0x5)?"DisplayPort": - ((pdevinfo->digital == 0x3)?"HDMI": - ((pdevinfo->digital)?"Digital":"Analog"))), - chans1[0] ? " " : "", chans1, - chans2[0] ? "/" : "", chans2, + (int)(strlen(pdesc) - 21), pdesc, loc1 >= 0 ? HDA_LOCS[loc1] : "", + loc1 >= 0 ? " " : "", + (pdevinfo->digital == 0x7) ? + "HDMI/DP" : + ((pdevinfo->digital == 0x5) ? + "DisplayPort" : + ((pdevinfo->digital == 0x3) ? + "HDMI" : + ((pdevinfo->digital) ? "Digital" : "Analog"))), + chans1[0] ? " " : "", chans1, chans2[0] ? "/" : "", chans2, t1 >= 0 ? " " : "", t1 >= 0 ? HDA_DEVS[t1] : ""); return (BUS_PROBE_SPECIFIC); } @@ -6996,36 +6848,36 @@ static int hdaa_pcm_attach(device_t dev) { - struct hdaa_pcm_devinfo *pdevinfo = - (struct hdaa_pcm_devinfo *)device_get_ivars(dev); + struct hdaa_pcm_devinfo *pdevinfo = (struct hdaa_pcm_devinfo *) + device_get_ivars(dev); struct hdaa_devinfo *devinfo = pdevinfo->devinfo; struct hdaa_audio_as *as; struct snddev_info *d; char status[SND_STATUSLEN]; int i; - pdevinfo->chan_size = pcm_getbuffersize(dev, - HDA_BUFSZ_MIN, HDA_BUFSZ_DEFAULT, HDA_BUFSZ_MAX); + pdevinfo->chan_size = pcm_getbuffersize(dev, HDA_BUFSZ_MIN, + HDA_BUFSZ_DEFAULT, HDA_BUFSZ_MAX); HDA_BOOTVERBOSE( - hdaa_dump_dac(pdevinfo); - hdaa_dump_adc(pdevinfo); - hdaa_dump_mix(pdevinfo); - hdaa_dump_ctls(pdevinfo, "Master Volume", SOUND_MASK_VOLUME); - hdaa_dump_ctls(pdevinfo, "PCM Volume", SOUND_MASK_PCM); - hdaa_dump_ctls(pdevinfo, "CD Volume", SOUND_MASK_CD); - hdaa_dump_ctls(pdevinfo, "Microphone Volume", SOUND_MASK_MIC); - hdaa_dump_ctls(pdevinfo, "Microphone2 Volume", SOUND_MASK_MONITOR); - hdaa_dump_ctls(pdevinfo, "Line-in Volume", SOUND_MASK_LINE); - hdaa_dump_ctls(pdevinfo, "Speaker/Beep Volume", SOUND_MASK_SPEAKER); - hdaa_dump_ctls(pdevinfo, "Recording Level", SOUND_MASK_RECLEV); - hdaa_dump_ctls(pdevinfo, "Input Mix Level", SOUND_MASK_IMIX); - hdaa_dump_ctls(pdevinfo, "Input Monitoring Level", SOUND_MASK_IGAIN); - hdaa_dump_ctls(pdevinfo, NULL, 0); - ); - - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "blocksize", &i) == 0 && i > 0) { + hdaa_dump_dac(pdevinfo); hdaa_dump_adc(pdevinfo); + hdaa_dump_mix(pdevinfo); + hdaa_dump_ctls(pdevinfo, "Master Volume", SOUND_MASK_VOLUME); + hdaa_dump_ctls(pdevinfo, "PCM Volume", SOUND_MASK_PCM); + hdaa_dump_ctls(pdevinfo, "CD Volume", SOUND_MASK_CD); + hdaa_dump_ctls(pdevinfo, "Microphone Volume", SOUND_MASK_MIC); + hdaa_dump_ctls(pdevinfo, "Microphone2 Volume", SOUND_MASK_MONITOR); + hdaa_dump_ctls(pdevinfo, "Line-in Volume", SOUND_MASK_LINE); + hdaa_dump_ctls(pdevinfo, "Speaker/Beep Volume", SOUND_MASK_SPEAKER); + hdaa_dump_ctls(pdevinfo, "Recording Level", SOUND_MASK_RECLEV); + hdaa_dump_ctls(pdevinfo, "Input Mix Level", SOUND_MASK_IMIX); + hdaa_dump_ctls(pdevinfo, "Input Monitoring Level", + SOUND_MASK_IGAIN); + hdaa_dump_ctls(pdevinfo, NULL, 0);); + + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "blocksize", &i) == 0 && + i > 0) { i &= HDA_BLK_ALIGN; if (i < HDA_BLK_MIN) i = HDA_BLK_MIN; @@ -7047,17 +6899,13 @@ */ pcm_setflags(dev, pcm_getflags(dev) | SD_F_MPSAFE); - HDA_BOOTHVERBOSE( - device_printf(dev, "OSS mixer initialization...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "OSS mixer initialization...\n");); if (mixer_init(dev, &hdaa_audio_ctl_ossmixer_class, pdevinfo) != 0) device_printf(dev, "Can't register mixer\n"); - HDA_BOOTHVERBOSE( - device_printf(dev, "Registering PCM channels...\n"); - ); - if (pcm_register(dev, pdevinfo, (pdevinfo->playas >= 0)?1:0, - (pdevinfo->recas >= 0)?1:0) != 0) + HDA_BOOTHVERBOSE(device_printf(dev, "Registering PCM channels...\n");); + if (pcm_register(dev, pdevinfo, (pdevinfo->playas >= 0) ? 1 : 0, + (pdevinfo->recas >= 0) ? 1 : 0) != 0) device_printf(dev, "Can't register PCM\n"); pdevinfo->registered++; @@ -7069,9 +6917,9 @@ pcm_addchan(dev, PCMDIR_PLAY, &hdaa_channel_class, &devinfo->chans[as->chans[i]]); SYSCTL_ADD_PROC(&d->play_sysctl_ctx, - SYSCTL_CHILDREN(d->play_sysctl_tree), OID_AUTO, - "32bit", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, - as, sizeof(as), hdaa_sysctl_32bit, "I", + SYSCTL_CHILDREN(d->play_sysctl_tree), OID_AUTO, "32bit", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, as, sizeof(as), + hdaa_sysctl_32bit, "I", "Resolution of 32bit samples (20/24/32bit)"); } if (pdevinfo->recas >= 0) { @@ -7080,17 +6928,16 @@ pcm_addchan(dev, PCMDIR_REC, &hdaa_channel_class, &devinfo->chans[as->chans[i]]); SYSCTL_ADD_PROC(&d->rec_sysctl_ctx, - SYSCTL_CHILDREN(d->rec_sysctl_tree), OID_AUTO, - "32bit", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, - as, sizeof(as), hdaa_sysctl_32bit, "I", + SYSCTL_CHILDREN(d->rec_sysctl_tree), OID_AUTO, "32bit", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, as, sizeof(as), + hdaa_sysctl_32bit, "I", "Resolution of 32bit samples (20/24/32bit)"); pdevinfo->autorecsrc = 2; resource_int_value(device_get_name(dev), device_get_unit(dev), "rec.autosrc", &pdevinfo->autorecsrc); SYSCTL_ADD_INT(&d->rec_sysctl_ctx, - SYSCTL_CHILDREN(d->rec_sysctl_tree), OID_AUTO, - "autosrc", CTLFLAG_RW, - &pdevinfo->autorecsrc, 0, + SYSCTL_CHILDREN(d->rec_sysctl_tree), OID_AUTO, "autosrc", + CTLFLAG_RW, &pdevinfo->autorecsrc, 0, "Automatic recording source selection"); } @@ -7119,8 +6966,8 @@ static int hdaa_pcm_detach(device_t dev) { - struct hdaa_pcm_devinfo *pdevinfo = - (struct hdaa_pcm_devinfo *)device_get_ivars(dev); + struct hdaa_pcm_devinfo *pdevinfo = (struct hdaa_pcm_devinfo *) + device_get_ivars(dev); int err; if (pdevinfo->registered > 0) { @@ -7134,10 +6981,9 @@ static device_method_t hdaa_pcm_methods[] = { /* device interface */ - DEVMETHOD(device_probe, hdaa_pcm_probe), - DEVMETHOD(device_attach, hdaa_pcm_attach), - DEVMETHOD(device_detach, hdaa_pcm_detach), - DEVMETHOD_END + DEVMETHOD(device_probe, hdaa_pcm_probe), + DEVMETHOD(device_attach, hdaa_pcm_attach), + DEVMETHOD(device_detach, hdaa_pcm_detach), DEVMETHOD_END }; static driver_t hdaa_pcm_driver = { Index: sys/dev/sound/pci/hda/hdaa_patches.c =================================================================== --- sys/dev/sound/pci/hda/hdaa_patches.c +++ sys/dev/sound/pci/hda/hdaa_patches.c @@ -36,13 +36,12 @@ #include "opt_snd.h" #endif -#include - #include -#include -#include #include +#include +#include +#include #include "pin_patch.h" #include "pin_patch_realtek.h" @@ -60,101 +59,76 @@ * perhaps unsupported. */ { HDA_MATCH_ALL, HDA_MATCH_ALL, HDA_MATCH_ALL, - HDAA_QUIRK_FORCESTEREO | HDAA_QUIRK_IVREF, 0, - 0 }, - { ACER_ALL_SUBVENDOR, HDA_MATCH_ALL, HDA_MATCH_ALL, - 0, 0, + HDAA_QUIRK_FORCESTEREO | HDAA_QUIRK_IVREF, 0, 0 }, + { ACER_ALL_SUBVENDOR, HDA_MATCH_ALL, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(0) }, - { ASUS_G2K_SUBVENDOR, HDA_CODEC_ALC660, HDA_MATCH_ALL, - 0, 0, + { ASUS_G2K_SUBVENDOR, HDA_CODEC_ALC660, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(0) }, - { ASUS_M5200_SUBVENDOR, HDA_CODEC_ALC880, HDA_MATCH_ALL, - 0, 0, + { ASUS_M5200_SUBVENDOR, HDA_CODEC_ALC880, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(0) }, - { ASUS_A7M_SUBVENDOR, HDA_CODEC_ALC880, HDA_MATCH_ALL, - 0, 0, + { ASUS_A7M_SUBVENDOR, HDA_CODEC_ALC880, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(0) }, - { ASUS_A7T_SUBVENDOR, HDA_CODEC_ALC882, HDA_MATCH_ALL, - 0, 0, + { ASUS_A7T_SUBVENDOR, HDA_CODEC_ALC882, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(0) }, - { ASUS_W2J_SUBVENDOR, HDA_CODEC_ALC882, HDA_MATCH_ALL, - 0, 0, + { ASUS_W2J_SUBVENDOR, HDA_CODEC_ALC882, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(0) }, { ASUS_U5F_SUBVENDOR, HDA_CODEC_AD1986A, HDA_MATCH_ALL, - HDAA_QUIRK_EAPDINV, 0, - 0 }, + HDAA_QUIRK_EAPDINV, 0, 0 }, { ASUS_A8X_SUBVENDOR, HDA_CODEC_AD1986A, HDA_MATCH_ALL, - HDAA_QUIRK_EAPDINV, 0, - 0 }, + HDAA_QUIRK_EAPDINV, 0, 0 }, { ASUS_F3JC_SUBVENDOR, HDA_CODEC_ALC861, HDA_MATCH_ALL, - HDAA_QUIRK_OVREF, 0, - 0 }, + HDAA_QUIRK_OVREF, 0, 0 }, { UNIWILL_9075_SUBVENDOR, HDA_CODEC_ALC861, HDA_MATCH_ALL, - HDAA_QUIRK_OVREF, 0, - 0 }, + HDAA_QUIRK_OVREF, 0, 0 }, /*{ ASUS_M2N_SUBVENDOR, HDA_CODEC_AD1988, HDA_MATCH_ALL, HDAA_QUIRK_IVREF80, HDAA_QUIRK_IVREF50 | HDAA_QUIRK_IVREF100, 0 },*/ - { MEDION_MD95257_SUBVENDOR, HDA_CODEC_ALC880, HDA_MATCH_ALL, - 0, 0, + { MEDION_MD95257_SUBVENDOR, HDA_CODEC_ALC880, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(1) }, { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A, HDA_MATCH_ALL, - HDAA_QUIRK_EAPDINV | HDAA_QUIRK_SENSEINV, 0, - 0 }, + HDAA_QUIRK_EAPDINV | HDAA_QUIRK_SENSEINV, 0, 0 }, { SAMSUNG_Q1_SUBVENDOR, HDA_CODEC_AD1986A, HDA_MATCH_ALL, - HDAA_QUIRK_EAPDINV, 0, - 0 }, + HDAA_QUIRK_EAPDINV, 0, 0 }, { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885, HDA_MATCH_ALL, - HDAA_QUIRK_OVREF50, 0, - HDAA_GPIO_SET(0) }, - { APPLE_INTEL_MAC, HDA_CODEC_STAC9221, HDA_MATCH_ALL, - 0, 0, + HDAA_QUIRK_OVREF50, 0, HDAA_GPIO_SET(0) }, + { APPLE_INTEL_MAC, HDA_CODEC_STAC9221, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(0) | HDAA_GPIO_SET(1) }, - { APPLE_MACBOOKAIR31, HDA_CODEC_CS4206, HDA_MATCH_ALL, - 0, 0, + { APPLE_MACBOOKAIR31, HDA_CODEC_CS4206, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(1) | HDAA_GPIO_SET(3) }, - { APPLE_MACBOOKPRO55, HDA_CODEC_CS4206, HDA_MATCH_ALL, - 0, 0, + { APPLE_MACBOOKPRO55, HDA_CODEC_CS4206, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(1) | HDAA_GPIO_SET(3) }, - { APPLE_MACBOOKPRO71, HDA_CODEC_CS4206, HDA_MATCH_ALL, - 0, 0, + { APPLE_MACBOOKPRO71, HDA_CODEC_CS4206, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(1) | HDAA_GPIO_SET(3) }, - { HDA_INTEL_MACBOOKPRO92, HDA_CODEC_CS4206, HDA_MATCH_ALL, - 0, 0, + { HDA_INTEL_MACBOOKPRO92, HDA_CODEC_CS4206, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(1) | HDAA_GPIO_SET(3) }, - { DELL_D630_SUBVENDOR, HDA_CODEC_STAC9205X, HDA_MATCH_ALL, - 0, 0, + { DELL_D630_SUBVENDOR, HDA_CODEC_STAC9205X, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(0) }, - { DELL_V1400_SUBVENDOR, HDA_CODEC_STAC9228X, HDA_MATCH_ALL, - 0, 0, + { DELL_V1400_SUBVENDOR, HDA_CODEC_STAC9228X, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(2) }, - { DELL_V1500_SUBVENDOR, HDA_CODEC_STAC9205X, HDA_MATCH_ALL, - 0, 0, + { DELL_V1500_SUBVENDOR, HDA_CODEC_STAC9205X, HDA_MATCH_ALL, 0, 0, HDAA_GPIO_SET(0) }, - { HDA_MATCH_ALL, HDA_CODEC_AD1988, HDA_MATCH_ALL, - HDAA_QUIRK_IVREF80, HDAA_QUIRK_IVREF50 | HDAA_QUIRK_IVREF100, - 0 }, - { HDA_MATCH_ALL, HDA_CODEC_AD1988B, HDA_MATCH_ALL, - HDAA_QUIRK_IVREF80, HDAA_QUIRK_IVREF50 | HDAA_QUIRK_IVREF100, - 0 }, - { HDA_MATCH_ALL, HDA_CODEC_CX20549, HDA_MATCH_ALL, - 0, HDAA_QUIRK_FORCESTEREO, - 0 }, + { HDA_MATCH_ALL, HDA_CODEC_AD1988, HDA_MATCH_ALL, HDAA_QUIRK_IVREF80, + HDAA_QUIRK_IVREF50 | HDAA_QUIRK_IVREF100, 0 }, + { HDA_MATCH_ALL, HDA_CODEC_AD1988B, HDA_MATCH_ALL, HDAA_QUIRK_IVREF80, + HDAA_QUIRK_IVREF50 | HDAA_QUIRK_IVREF100, 0 }, + { HDA_MATCH_ALL, HDA_CODEC_CX20549, HDA_MATCH_ALL, 0, + HDAA_QUIRK_FORCESTEREO, 0 }, /* Mac Pro 1,1 requires ovref for proper volume level. */ - { 0x00000000, HDA_CODEC_ALC885, 0x106b0c00, - 0, HDAA_QUIRK_OVREF, - 0 } + { 0x00000000, HDA_CODEC_ALC885, 0x106b0c00, 0, HDAA_QUIRK_OVREF, 0 } }; static struct pin_patch_t * match_pin_patches(int vendor_id, int vendor_subid) { for (int ci = 0; ci < nitems(realtek_model_pin_patches); ci++) { - struct hdaa_model_pin_patch_t *p = &realtek_model_pin_patches[ci]; + struct hdaa_model_pin_patch_t *p = + &realtek_model_pin_patches[ci]; if (vendor_id != p->id) continue; - for (struct model_pin_patch_t *pp = p->patches; pp->models; pp++) { - for (struct pin_machine_model_t *model = pp->models; model->id != 0; model++) { + for (struct model_pin_patch_t *pp = p->patches; pp->models; + pp++) { + for (struct pin_machine_model_t *model = pp->models; + model->id != 0; model++) { if (HDA_DEV_MATCH(model->id, vendor_subid)) return (pp->pin_patches); } @@ -175,7 +149,8 @@ id = hdaa_codec_id(w->devinfo); subid = hdaa_card_id(w->devinfo); - if (id == HDA_CODEC_ALC883 && HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, subid)) { + if (id == HDA_CODEC_ALC883 && + HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, subid)) { switch (nid) { case 25: config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | @@ -190,8 +165,7 @@ HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED); break; } - } else if (id == HDA_CODEC_CX20549 && subid == - HP_V3000_SUBVENDOR) { + } else if (id == HDA_CODEC_CX20549 && subid == HP_V3000_SUBVENDOR) { switch (nid) { case 18: config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK; @@ -210,8 +184,7 @@ HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED); break; } - } else if (id == HDA_CODEC_CX20551 && subid == - HP_DV5000_SUBVENDOR) { + } else if (id == HDA_CODEC_CX20551 && subid == HP_DV5000_SUBVENDOR) { switch (nid) { case 20: case 21: @@ -222,8 +195,7 @@ } /* New patches */ - if (id == HDA_CODEC_AD1984A && - subid == LENOVO_X300_SUBVENDOR) { + if (id == HDA_CODEC_AD1984A && subid == LENOVO_X300_SUBVENDOR) { switch (nid) { case 17: /* Headphones with redirection */ patch_str = "as=1 seq=15"; @@ -234,8 +206,8 @@ } } else if (id == HDA_CODEC_AD1986A && (subid == ASUS_M2NPVMX_SUBVENDOR || - subid == ASUS_A8NVMCSM_SUBVENDOR || - subid == ASUS_P5PL2_SUBVENDOR)) { + subid == ASUS_A8NVMCSM_SUBVENDOR || + subid == ASUS_P5PL2_SUBVENDOR)) { switch (nid) { case 26: /* Headphones with redirection */ patch_str = "as=1 seq=15"; @@ -262,15 +234,13 @@ patch_str = "as=8 seq=6"; break; } - } else if (id == HDA_CODEC_CX20561 && - subid == LENOVO_B450_SUBVENDOR) { + } else if (id == HDA_CODEC_CX20561 && subid == LENOVO_B450_SUBVENDOR) { switch (nid) { case 22: patch_str = "as=1 seq=15"; break; } - } else if (id == HDA_CODEC_CX20561 && - subid == LENOVO_T400_SUBVENDOR) { + } else if (id == HDA_CODEC_CX20561 && subid == LENOVO_T400_SUBVENDOR) { switch (nid) { case 22: patch_str = "as=1 seq=15"; @@ -280,11 +250,10 @@ break; } } else if (id == HDA_CODEC_CX20590 && - (subid == LENOVO_X1_SUBVENDOR || - subid == LENOVO_X220_SUBVENDOR || - subid == LENOVO_T420_SUBVENDOR || - subid == LENOVO_T520_SUBVENDOR || - subid == LENOVO_G580_SUBVENDOR)) { + (subid == LENOVO_X1_SUBVENDOR || subid == LENOVO_X220_SUBVENDOR || + subid == LENOVO_T420_SUBVENDOR || + subid == LENOVO_T520_SUBVENDOR || + subid == LENOVO_G580_SUBVENDOR)) { switch (nid) { case 25: patch_str = "as=1 seq=15"; @@ -306,8 +275,8 @@ patch_str = "as=1 seq=15"; break; } - } else if (id == HDA_CODEC_ALC256 && (subid == DELL_I7577_SUBVENDOR || - subid == DELL_L7480_SUBVENDOR)) { + } else if (id == HDA_CODEC_ALC256 && + (subid == DELL_I7577_SUBVENDOR || subid == DELL_L7480_SUBVENDOR)) { switch (nid) { case 20: patch_str = "as=1 seq=0"; @@ -318,7 +287,7 @@ } } else if (id == HDA_CODEC_ALC257 && (subid == LENOVO_L5AMD_SUBVENDOR || - subid == LENOVO_L5INTEL_SUBVENDOR)) { + subid == LENOVO_L5INTEL_SUBVENDOR)) { switch (nid) { case 20: patch_str = "as=1 seq=0"; @@ -329,7 +298,7 @@ } } else if (id == HDA_CODEC_IDT92HD95B && (subid == FRAMEWORK_LAPTOP_0001_SUBVENDOR || - subid == FRAMEWORK_LAPTOP_0002_SUBVENDOR)) { + subid == FRAMEWORK_LAPTOP_0002_SUBVENDOR)) { switch (nid) { case 10: patch_str = "as=1 seq=15 color=Black loc=Left"; @@ -338,8 +307,7 @@ patch_str = "as=3 seq=15 color=Black loc=Left"; break; } - } else if (id == HDA_CODEC_ALC230 && - subid == LENOVO_I330_SUBVENDOR) { + } else if (id == HDA_CODEC_ALC230 && subid == LENOVO_I330_SUBVENDOR) { switch (nid) { case 20: patch_str = "as=1 seq=0 device=Speaker"; @@ -348,8 +316,7 @@ patch_str = "as=1 seq=15 device=Headphones"; break; } - } else if (id == HDA_CODEC_ALC269 && - subid == LENOVO_X230_SUBVENDOR) { + } else if (id == HDA_CODEC_ALC269 && subid == LENOVO_X230_SUBVENDOR) { switch (nid) { case 21: patch_str = "as=1 seq=15"; @@ -367,7 +334,8 @@ pin_patches = match_pin_patches(id, subid); if (pin_patches != NULL) { - for (struct pin_patch_t *patch = pin_patches; patch->type; patch++) { + for (struct pin_patch_t *patch = pin_patches; + patch->type; patch++) { if (nid == patch->nid) { switch (patch->type) { case PIN_PATCH_TYPE_STRING: @@ -392,12 +360,9 @@ if (patch_str != NULL) config = hdaa_widget_pin_patch(config, patch_str); - HDA_BOOTVERBOSE( - if (config != orig) - device_printf(w->devinfo->dev, - "Patching pin config nid=%u 0x%08x -> 0x%08x\n", - nid, orig, config); - ); + HDA_BOOTVERBOSE(if (config != orig) device_printf(w->devinfo->dev, + "Patching pin config nid=%u 0x%08x -> 0x%08x\n", nid, orig, + config);); w->wclass.pin.config = config; } @@ -433,24 +398,22 @@ beeper = 29; if (w->nid == beeper) { w->param.widget_cap &= ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK; - w->param.widget_cap |= HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET << - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT; + w->param.widget_cap |= + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET + << HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT; w->waspin = 1; } /* * Clear "digital" flag from digital mic input, as its signal then goes * to "analog" mixer and this separation just limits functionaity. */ - if (hdaa_codec_id(devinfo) == HDA_CODEC_AD1984A && - w->nid == 23) + if (hdaa_codec_id(devinfo) == HDA_CODEC_AD1984A && w->nid == 23) w->param.widget_cap &= ~HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK; - HDA_BOOTVERBOSE( - if (w->param.widget_cap != orig) { - device_printf(w->devinfo->dev, - "Patching widget caps nid=%u 0x%08x -> 0x%08x\n", - w->nid, orig, w->param.widget_cap); - } - ); + HDA_BOOTVERBOSE(if (w->param.widget_cap != orig) { + device_printf(w->devinfo->dev, + "Patching widget caps nid=%u 0x%08x -> 0x%08x\n", w->nid, + orig, w->param.widget_cap); + }); if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) hdac_pin_patch(w); @@ -472,8 +435,8 @@ */ for (i = 0; i < nitems(hdac_quirks); i++) { if (!(HDA_DEV_MATCH(hdac_quirks[i].model, subid) && - HDA_DEV_MATCH(hdac_quirks[i].id, id) && - HDA_DEV_MATCH(hdac_quirks[i].subsystemid, subsystemid))) + HDA_DEV_MATCH(hdac_quirks[i].id, id) && + HDA_DEV_MATCH(hdac_quirks[i].subsystemid, subsystemid))) continue; devinfo->quirks |= hdac_quirks[i].set; devinfo->quirks &= ~(hdac_quirks[i].unset); @@ -546,29 +509,29 @@ w = hdaa_widget_get(devinfo, 31); if (w != NULL) { if ((w->wclass.pin.config & - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) == + HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) == HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN) { w = hdaa_widget_get(devinfo, 16); if (w != NULL) - w->connsenable[2] = 0; + w->connsenable[2] = 0; } else { w = hdaa_widget_get(devinfo, 15); if (w != NULL) - w->connsenable[0] = 0; + w->connsenable[0] = 0; } } w = hdaa_widget_get(devinfo, 32); if (w != NULL) { if ((w->wclass.pin.config & - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) == + HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) == HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN) { w = hdaa_widget_get(devinfo, 16); if (w != NULL) - w->connsenable[0] = 0; + w->connsenable[0] = 0; } else { w = hdaa_widget_get(devinfo, 15); if (w != NULL) - w->connsenable[1] = 0; + w->connsenable[1] = 0; } } @@ -579,13 +542,13 @@ * pci id but works differently (EAPD). */ w = hdaa_widget_get(devinfo, 26); - if (w != NULL && w->type == - HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && + if (w != NULL && + w->type == + HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX && (w->wclass.pin.config & - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) != - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE) - devinfo->quirks &= - ~HDAA_QUIRK_EAPDINV; + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) != + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE) + devinfo->quirks &= ~HDAA_QUIRK_EAPDINV; } break; case HDA_CODEC_AD1981HD: @@ -711,13 +674,11 @@ case HDA_CODEC_VT1708S_6: case HDA_CODEC_VT1708S_7: /* Enable Mic Boost Volume controls. */ - hda_command(dev, HDA_CMD_12BIT(0, devinfo->nid, - 0xf98, 0x01)); + hda_command(dev, HDA_CMD_12BIT(0, devinfo->nid, 0xf98, 0x01)); /* Fall though */ case HDA_CODEC_VT1818S: /* Don't bypass mixer. */ - hda_command(dev, HDA_CMD_12BIT(0, devinfo->nid, - 0xf88, 0xc0)); + hda_command(dev, HDA_CMD_12BIT(0, devinfo->nid, 0xf88, 0xc0)); break; case HDA_CODEC_ALC1150: if (subid == 0xd9781462) { @@ -728,11 +689,10 @@ } if (id == HDA_CODEC_ALC255 || id == HDA_CODEC_ALC256) { val = hdaa_read_coef(dev, 0x20, 0x46); - hdaa_write_coef(dev, 0x20, 0x46, val|0x3000); + hdaa_write_coef(dev, 0x20, 0x46, val | 0x3000); } if (subid == APPLE_INTEL_MAC) - hda_command(dev, HDA_CMD_12BIT(0, devinfo->nid, - 0x7e7, 0)); + hda_command(dev, HDA_CMD_12BIT(0, devinfo->nid, 0x7e7, 0)); if (id == HDA_CODEC_ALC269) { if (subid == 0x16e31043 || subid == 0x831a1043 || subid == 0x834a1043 || subid == 0x83981043 || @@ -744,7 +704,7 @@ * To workaround, make codec handle the signal as mono. */ val = hdaa_read_coef(dev, 0x20, 0x07); - hdaa_write_coef(dev, 0x20, 0x07, val|0x80); + hdaa_write_coef(dev, 0x20, 0x07, val | 0x80); } if (subid == 0x15171043) { /* Increase output amp on ASUS UX31A by +5dB. */ Index: sys/dev/sound/pci/hda/hdac.h =================================================================== --- sys/dev/sound/pci/hda/hdac.h +++ sys/dev/sound/pci/hda/hdac.h @@ -36,927 +36,929 @@ ****************************************************************************/ /* Controller models */ -#define HDA_MODEL_CONSTRUCT(vendor, model) \ - (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff)) +#define HDA_MODEL_CONSTRUCT(vendor, model) \ + (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff)) /* Intel */ -#define INTEL_VENDORID 0x8086 -#define HDA_INTEL_CMLKLP HDA_MODEL_CONSTRUCT(INTEL, 0x02c8) -#define HDA_INTEL_CMLKH HDA_MODEL_CONSTRUCT(INTEL, 0x06c8) -#define HDA_INTEL_OAK HDA_MODEL_CONSTRUCT(INTEL, 0x080a) -#define HDA_INTEL_BAY HDA_MODEL_CONSTRUCT(INTEL, 0x0f04) -#define HDA_INTEL_HSW1 HDA_MODEL_CONSTRUCT(INTEL, 0x0a0c) -#define HDA_INTEL_HSW2 HDA_MODEL_CONSTRUCT(INTEL, 0x0c0c) -#define HDA_INTEL_HSW3 HDA_MODEL_CONSTRUCT(INTEL, 0x0d0c) -#define HDA_INTEL_BDW1 HDA_MODEL_CONSTRUCT(INTEL, 0x160c) -#define HDA_INTEL_BXTNT HDA_MODEL_CONSTRUCT(INTEL, 0x1a98) -#define HDA_INTEL_CPT HDA_MODEL_CONSTRUCT(INTEL, 0x1c20) -#define HDA_INTEL_PATSBURG HDA_MODEL_CONSTRUCT(INTEL, 0x1d20) -#define HDA_INTEL_PPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x1e20) -#define HDA_INTEL_BR HDA_MODEL_CONSTRUCT(INTEL, 0x2284) -#define HDA_INTEL_82801F HDA_MODEL_CONSTRUCT(INTEL, 0x2668) -#define HDA_INTEL_63XXESB HDA_MODEL_CONSTRUCT(INTEL, 0x269a) -#define HDA_INTEL_82801G HDA_MODEL_CONSTRUCT(INTEL, 0x27d8) -#define HDA_INTEL_82801H HDA_MODEL_CONSTRUCT(INTEL, 0x284b) -#define HDA_INTEL_82801I HDA_MODEL_CONSTRUCT(INTEL, 0x293e) -#define HDA_INTEL_GMLK HDA_MODEL_CONSTRUCT(INTEL, 0x3198) -#define HDA_INTEL_JLK HDA_MODEL_CONSTRUCT(INTEL, 0x38c8) -#define HDA_INTEL_82801JI HDA_MODEL_CONSTRUCT(INTEL, 0x3a3e) -#define HDA_INTEL_82801JD HDA_MODEL_CONSTRUCT(INTEL, 0x3a6e) -#define HDA_INTEL_PCH HDA_MODEL_CONSTRUCT(INTEL, 0x3b56) -#define HDA_INTEL_PCH2 HDA_MODEL_CONSTRUCT(INTEL, 0x3b57) -#define HDA_INTEL_ELLK HDA_MODEL_CONSTRUCT(INTEL, 0x4b55) -#define HDA_INTEL_JLK2 HDA_MODEL_CONSTRUCT(INTEL, 0x4dc8) -#define HDA_INTEL_BXTNP HDA_MODEL_CONSTRUCT(INTEL, 0x5a98) -#define HDA_INTEL_MACBOOKPRO92 HDA_MODEL_CONSTRUCT(INTEL, 0x7270) -#define HDA_INTEL_ALLK HDA_MODEL_CONSTRUCT(INTEL, 0x7ad0) -#define HDA_INTEL_ALLKM HDA_MODEL_CONSTRUCT(INTEL, 0x51cc) -#define HDA_INTEL_ALLKN HDA_MODEL_CONSTRUCT(INTEL, 0x54c8) -#define HDA_INTEL_ALLKP1 HDA_MODEL_CONSTRUCT(INTEL, 0x51c8) -#define HDA_INTEL_ALLKP2 HDA_MODEL_CONSTRUCT(INTEL, 0x51cd) -#define HDA_INTEL_ALLKPS HDA_MODEL_CONSTRUCT(INTEL, 0x51c9) -#define HDA_INTEL_RPTLK1 HDA_MODEL_CONSTRUCT(INTEL, 0x51ca) -#define HDA_INTEL_RPTLK2 HDA_MODEL_CONSTRUCT(INTEL, 0x51cb) -#define HDA_INTEL_SCH HDA_MODEL_CONSTRUCT(INTEL, 0x811b) -#define HDA_INTEL_LPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x8c20) -#define HDA_INTEL_LPT2 HDA_MODEL_CONSTRUCT(INTEL, 0x8c21) -#define HDA_INTEL_WCPT HDA_MODEL_CONSTRUCT(INTEL, 0x8ca0) -#define HDA_INTEL_WELLS1 HDA_MODEL_CONSTRUCT(INTEL, 0x8d20) -#define HDA_INTEL_WELLS2 HDA_MODEL_CONSTRUCT(INTEL, 0x8d21) -#define HDA_INTEL_LPTLP1 HDA_MODEL_CONSTRUCT(INTEL, 0x9c20) -#define HDA_INTEL_LPTLP2 HDA_MODEL_CONSTRUCT(INTEL, 0x9c21) -#define HDA_INTEL_BDW2 HDA_MODEL_CONSTRUCT(INTEL, 0x9ca0) -#define HDA_INTEL_SRPTLP HDA_MODEL_CONSTRUCT(INTEL, 0x9d70) -#define HDA_INTEL_KBLKLP HDA_MODEL_CONSTRUCT(INTEL, 0x9d71) -#define HDA_INTEL_SRPT HDA_MODEL_CONSTRUCT(INTEL, 0xa170) -#define HDA_INTEL_KBLK HDA_MODEL_CONSTRUCT(INTEL, 0xa171) -#define HDA_INTEL_KBLKH HDA_MODEL_CONSTRUCT(INTEL, 0xa2f0) -#define HDA_INTEL_CFLK HDA_MODEL_CONSTRUCT(INTEL, 0xa348) -#define HDA_INTEL_CMLKS HDA_MODEL_CONSTRUCT(INTEL, 0xa3f0) -#define HDA_INTEL_CNLK HDA_MODEL_CONSTRUCT(INTEL, 0x9dc8) -#define HDA_INTEL_ICLK HDA_MODEL_CONSTRUCT(INTEL, 0x34c8) -#define HDA_INTEL_CMLKLP HDA_MODEL_CONSTRUCT(INTEL, 0x02c8) -#define HDA_INTEL_CMLKH HDA_MODEL_CONSTRUCT(INTEL, 0x06c8) -#define HDA_INTEL_TGLK HDA_MODEL_CONSTRUCT(INTEL, 0xa0c8) -#define HDA_INTEL_MTL HDA_MODEL_CONSTRUCT(INTEL, 0x7e28) -#define HDA_INTEL_ARLS HDA_MODEL_CONSTRUCT(INTEL, 0x7f50) -#define HDA_INTEL_ARL HDA_MODEL_CONSTRUCT(INTEL, 0x7728) -#define HDA_INTEL_LNLP HDA_MODEL_CONSTRUCT(INTEL, 0xa828) -#define INTEL_A100ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xa100) -#define INTEL_D400ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd400) -#define INTEL_D401ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd401) -#define INTEL_D402ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd402) -#define INTEL_E305ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe305) -#define INTEL_E308ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe308) -#define INTEL_E224ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe224) -#define INTEL_E400ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe400) -#define INTEL_E401ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe401) -#define INTEL_E402ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe402) -#define HDA_INTEL_ALL HDA_MODEL_CONSTRUCT(INTEL, 0xffff) +#define INTEL_VENDORID 0x8086 +#define HDA_INTEL_CMLKLP HDA_MODEL_CONSTRUCT(INTEL, 0x02c8) +#define HDA_INTEL_CMLKH HDA_MODEL_CONSTRUCT(INTEL, 0x06c8) +#define HDA_INTEL_OAK HDA_MODEL_CONSTRUCT(INTEL, 0x080a) +#define HDA_INTEL_BAY HDA_MODEL_CONSTRUCT(INTEL, 0x0f04) +#define HDA_INTEL_HSW1 HDA_MODEL_CONSTRUCT(INTEL, 0x0a0c) +#define HDA_INTEL_HSW2 HDA_MODEL_CONSTRUCT(INTEL, 0x0c0c) +#define HDA_INTEL_HSW3 HDA_MODEL_CONSTRUCT(INTEL, 0x0d0c) +#define HDA_INTEL_BDW1 HDA_MODEL_CONSTRUCT(INTEL, 0x160c) +#define HDA_INTEL_BXTNT HDA_MODEL_CONSTRUCT(INTEL, 0x1a98) +#define HDA_INTEL_CPT HDA_MODEL_CONSTRUCT(INTEL, 0x1c20) +#define HDA_INTEL_PATSBURG HDA_MODEL_CONSTRUCT(INTEL, 0x1d20) +#define HDA_INTEL_PPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x1e20) +#define HDA_INTEL_BR HDA_MODEL_CONSTRUCT(INTEL, 0x2284) +#define HDA_INTEL_82801F HDA_MODEL_CONSTRUCT(INTEL, 0x2668) +#define HDA_INTEL_63XXESB HDA_MODEL_CONSTRUCT(INTEL, 0x269a) +#define HDA_INTEL_82801G HDA_MODEL_CONSTRUCT(INTEL, 0x27d8) +#define HDA_INTEL_82801H HDA_MODEL_CONSTRUCT(INTEL, 0x284b) +#define HDA_INTEL_82801I HDA_MODEL_CONSTRUCT(INTEL, 0x293e) +#define HDA_INTEL_GMLK HDA_MODEL_CONSTRUCT(INTEL, 0x3198) +#define HDA_INTEL_JLK HDA_MODEL_CONSTRUCT(INTEL, 0x38c8) +#define HDA_INTEL_82801JI HDA_MODEL_CONSTRUCT(INTEL, 0x3a3e) +#define HDA_INTEL_82801JD HDA_MODEL_CONSTRUCT(INTEL, 0x3a6e) +#define HDA_INTEL_PCH HDA_MODEL_CONSTRUCT(INTEL, 0x3b56) +#define HDA_INTEL_PCH2 HDA_MODEL_CONSTRUCT(INTEL, 0x3b57) +#define HDA_INTEL_ELLK HDA_MODEL_CONSTRUCT(INTEL, 0x4b55) +#define HDA_INTEL_JLK2 HDA_MODEL_CONSTRUCT(INTEL, 0x4dc8) +#define HDA_INTEL_BXTNP HDA_MODEL_CONSTRUCT(INTEL, 0x5a98) +#define HDA_INTEL_MACBOOKPRO92 HDA_MODEL_CONSTRUCT(INTEL, 0x7270) +#define HDA_INTEL_ALLK HDA_MODEL_CONSTRUCT(INTEL, 0x7ad0) +#define HDA_INTEL_ALLKM HDA_MODEL_CONSTRUCT(INTEL, 0x51cc) +#define HDA_INTEL_ALLKN HDA_MODEL_CONSTRUCT(INTEL, 0x54c8) +#define HDA_INTEL_ALLKP1 HDA_MODEL_CONSTRUCT(INTEL, 0x51c8) +#define HDA_INTEL_ALLKP2 HDA_MODEL_CONSTRUCT(INTEL, 0x51cd) +#define HDA_INTEL_ALLKPS HDA_MODEL_CONSTRUCT(INTEL, 0x51c9) +#define HDA_INTEL_RPTLK1 HDA_MODEL_CONSTRUCT(INTEL, 0x51ca) +#define HDA_INTEL_RPTLK2 HDA_MODEL_CONSTRUCT(INTEL, 0x51cb) +#define HDA_INTEL_SCH HDA_MODEL_CONSTRUCT(INTEL, 0x811b) +#define HDA_INTEL_LPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x8c20) +#define HDA_INTEL_LPT2 HDA_MODEL_CONSTRUCT(INTEL, 0x8c21) +#define HDA_INTEL_WCPT HDA_MODEL_CONSTRUCT(INTEL, 0x8ca0) +#define HDA_INTEL_WELLS1 HDA_MODEL_CONSTRUCT(INTEL, 0x8d20) +#define HDA_INTEL_WELLS2 HDA_MODEL_CONSTRUCT(INTEL, 0x8d21) +#define HDA_INTEL_LPTLP1 HDA_MODEL_CONSTRUCT(INTEL, 0x9c20) +#define HDA_INTEL_LPTLP2 HDA_MODEL_CONSTRUCT(INTEL, 0x9c21) +#define HDA_INTEL_BDW2 HDA_MODEL_CONSTRUCT(INTEL, 0x9ca0) +#define HDA_INTEL_SRPTLP HDA_MODEL_CONSTRUCT(INTEL, 0x9d70) +#define HDA_INTEL_KBLKLP HDA_MODEL_CONSTRUCT(INTEL, 0x9d71) +#define HDA_INTEL_SRPT HDA_MODEL_CONSTRUCT(INTEL, 0xa170) +#define HDA_INTEL_KBLK HDA_MODEL_CONSTRUCT(INTEL, 0xa171) +#define HDA_INTEL_KBLKH HDA_MODEL_CONSTRUCT(INTEL, 0xa2f0) +#define HDA_INTEL_CFLK HDA_MODEL_CONSTRUCT(INTEL, 0xa348) +#define HDA_INTEL_CMLKS HDA_MODEL_CONSTRUCT(INTEL, 0xa3f0) +#define HDA_INTEL_CNLK HDA_MODEL_CONSTRUCT(INTEL, 0x9dc8) +#define HDA_INTEL_ICLK HDA_MODEL_CONSTRUCT(INTEL, 0x34c8) +#define HDA_INTEL_CMLKLP HDA_MODEL_CONSTRUCT(INTEL, 0x02c8) +#define HDA_INTEL_CMLKH HDA_MODEL_CONSTRUCT(INTEL, 0x06c8) +#define HDA_INTEL_TGLK HDA_MODEL_CONSTRUCT(INTEL, 0xa0c8) +#define HDA_INTEL_MTL HDA_MODEL_CONSTRUCT(INTEL, 0x7e28) +#define HDA_INTEL_ARLS HDA_MODEL_CONSTRUCT(INTEL, 0x7f50) +#define HDA_INTEL_ARL HDA_MODEL_CONSTRUCT(INTEL, 0x7728) +#define HDA_INTEL_LNLP HDA_MODEL_CONSTRUCT(INTEL, 0xa828) +#define INTEL_A100ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xa100) +#define INTEL_D400ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd400) +#define INTEL_D401ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd401) +#define INTEL_D402ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd402) +#define INTEL_E305ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe305) +#define INTEL_E308ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe308) +#define INTEL_E224ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe224) +#define INTEL_E400ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe400) +#define INTEL_E401ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe401) +#define INTEL_E402ID_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xe402) +#define HDA_INTEL_ALL HDA_MODEL_CONSTRUCT(INTEL, 0xffff) /* Nvidia */ -#define NVIDIA_VENDORID 0x10de -#define HDA_NVIDIA_MCP51 HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c) -#define HDA_NVIDIA_MCP55 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371) -#define HDA_NVIDIA_MCP61_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4) -#define HDA_NVIDIA_MCP61_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x03f0) -#define HDA_NVIDIA_MCP65_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x044a) -#define HDA_NVIDIA_MCP65_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x044b) -#define HDA_NVIDIA_MCP67_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x055c) -#define HDA_NVIDIA_MCP67_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x055d) -#define HDA_NVIDIA_MCP78_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0774) -#define HDA_NVIDIA_MCP78_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0775) -#define HDA_NVIDIA_MCP78_3 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0776) -#define HDA_NVIDIA_MCP78_4 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0777) -#define HDA_NVIDIA_MCP73_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x07fc) -#define HDA_NVIDIA_MCP73_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x07fd) -#define HDA_NVIDIA_MCP79_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac0) -#define HDA_NVIDIA_MCP79_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac1) -#define HDA_NVIDIA_MCP79_3 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac2) -#define HDA_NVIDIA_MCP79_4 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac3) -#define HDA_NVIDIA_0BE2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be2) -#define HDA_NVIDIA_0BE3 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be3) -#define HDA_NVIDIA_0BE4 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be4) -#define HDA_NVIDIA_GT100 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be5) -#define HDA_NVIDIA_GT106 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be9) -#define HDA_NVIDIA_GT108 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0bea) -#define HDA_NVIDIA_GT104 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0beb) -#define HDA_NVIDIA_GT116 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0bee) -#define HDA_NVIDIA_MCP89_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d94) -#define HDA_NVIDIA_MCP89_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d95) -#define HDA_NVIDIA_MCP89_3 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d96) -#define HDA_NVIDIA_MCP89_4 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d97) -#define HDA_NVIDIA_GF119 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e08) -#define HDA_NVIDIA_GF110_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e09) -#define HDA_NVIDIA_GF110_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e0c) -#define HDA_NVIDIA_ALL HDA_MODEL_CONSTRUCT(NVIDIA, 0xffff) +#define NVIDIA_VENDORID 0x10de +#define HDA_NVIDIA_MCP51 HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c) +#define HDA_NVIDIA_MCP55 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371) +#define HDA_NVIDIA_MCP61_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4) +#define HDA_NVIDIA_MCP61_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x03f0) +#define HDA_NVIDIA_MCP65_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x044a) +#define HDA_NVIDIA_MCP65_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x044b) +#define HDA_NVIDIA_MCP67_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x055c) +#define HDA_NVIDIA_MCP67_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x055d) +#define HDA_NVIDIA_MCP78_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0774) +#define HDA_NVIDIA_MCP78_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0775) +#define HDA_NVIDIA_MCP78_3 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0776) +#define HDA_NVIDIA_MCP78_4 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0777) +#define HDA_NVIDIA_MCP73_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x07fc) +#define HDA_NVIDIA_MCP73_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x07fd) +#define HDA_NVIDIA_MCP79_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac0) +#define HDA_NVIDIA_MCP79_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac1) +#define HDA_NVIDIA_MCP79_3 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac2) +#define HDA_NVIDIA_MCP79_4 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac3) +#define HDA_NVIDIA_0BE2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be2) +#define HDA_NVIDIA_0BE3 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be3) +#define HDA_NVIDIA_0BE4 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be4) +#define HDA_NVIDIA_GT100 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be5) +#define HDA_NVIDIA_GT106 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be9) +#define HDA_NVIDIA_GT108 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0bea) +#define HDA_NVIDIA_GT104 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0beb) +#define HDA_NVIDIA_GT116 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0bee) +#define HDA_NVIDIA_MCP89_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d94) +#define HDA_NVIDIA_MCP89_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d95) +#define HDA_NVIDIA_MCP89_3 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d96) +#define HDA_NVIDIA_MCP89_4 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d97) +#define HDA_NVIDIA_GF119 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e08) +#define HDA_NVIDIA_GF110_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e09) +#define HDA_NVIDIA_GF110_2 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e0c) +#define HDA_NVIDIA_ALL HDA_MODEL_CONSTRUCT(NVIDIA, 0xffff) /* ATI */ -#define ATI_VENDORID 0x1002 -#define HDA_ATI_SB450 HDA_MODEL_CONSTRUCT(ATI, 0x437b) -#define HDA_ATI_SB600 HDA_MODEL_CONSTRUCT(ATI, 0x4383) -#define HDA_ATI_RS600 HDA_MODEL_CONSTRUCT(ATI, 0x793b) -#define HDA_ATI_RS690 HDA_MODEL_CONSTRUCT(ATI, 0x7919) -#define HDA_ATI_RS780 HDA_MODEL_CONSTRUCT(ATI, 0x960f) -#define HDA_ATI_RS880 HDA_MODEL_CONSTRUCT(ATI, 0x970f) -#define HDA_ATI_R600 HDA_MODEL_CONSTRUCT(ATI, 0xaa00) -#define HDA_ATI_RV630 HDA_MODEL_CONSTRUCT(ATI, 0xaa08) -#define HDA_ATI_RV610 HDA_MODEL_CONSTRUCT(ATI, 0xaa10) -#define HDA_ATI_RV670 HDA_MODEL_CONSTRUCT(ATI, 0xaa18) -#define HDA_ATI_RV635 HDA_MODEL_CONSTRUCT(ATI, 0xaa20) -#define HDA_ATI_RV620 HDA_MODEL_CONSTRUCT(ATI, 0xaa28) -#define HDA_ATI_RV770 HDA_MODEL_CONSTRUCT(ATI, 0xaa30) -#define HDA_ATI_RV730 HDA_MODEL_CONSTRUCT(ATI, 0xaa38) -#define HDA_ATI_RV710 HDA_MODEL_CONSTRUCT(ATI, 0xaa40) -#define HDA_ATI_RV740 HDA_MODEL_CONSTRUCT(ATI, 0xaa48) -#define HDA_ATI_RV870 HDA_MODEL_CONSTRUCT(ATI, 0xaa50) -#define HDA_ATI_RV840 HDA_MODEL_CONSTRUCT(ATI, 0xaa58) -#define HDA_ATI_RV830 HDA_MODEL_CONSTRUCT(ATI, 0xaa60) -#define HDA_ATI_RV810 HDA_MODEL_CONSTRUCT(ATI, 0xaa68) -#define HDA_ATI_RV970 HDA_MODEL_CONSTRUCT(ATI, 0xaa80) -#define HDA_ATI_RV940 HDA_MODEL_CONSTRUCT(ATI, 0xaa88) -#define HDA_ATI_RV930 HDA_MODEL_CONSTRUCT(ATI, 0xaa90) -#define HDA_ATI_RV910 HDA_MODEL_CONSTRUCT(ATI, 0xaa98) -#define HDA_ATI_R1000 HDA_MODEL_CONSTRUCT(ATI, 0xaaa0) -#define HDA_ATI_KABINI HDA_MODEL_CONSTRUCT(ATI, 0x9840) -#define HDA_ATI_TRINITY HDA_MODEL_CONSTRUCT(ATI, 0x9902) -#define HDA_ATI_ALL HDA_MODEL_CONSTRUCT(ATI, 0xffff) - -#define AMD_VENDORID 0x1022 -#define HDA_AMD_X370 HDA_MODEL_CONSTRUCT(AMD, 0x1457) -#define HDA_AMD_X570 HDA_MODEL_CONSTRUCT(AMD, 0x1487) -#define HDA_AMD_STONEY HDA_MODEL_CONSTRUCT(AMD, 0x157a) -#define HDA_AMD_RAVEN HDA_MODEL_CONSTRUCT(AMD, 0x15e3) -#define HDA_AMD_HUDSON2 HDA_MODEL_CONSTRUCT(AMD, 0x780d) -#define HDA_AMD_ALL HDA_MODEL_CONSTRUCT(AMD, 0xffff) +#define ATI_VENDORID 0x1002 +#define HDA_ATI_SB450 HDA_MODEL_CONSTRUCT(ATI, 0x437b) +#define HDA_ATI_SB600 HDA_MODEL_CONSTRUCT(ATI, 0x4383) +#define HDA_ATI_RS600 HDA_MODEL_CONSTRUCT(ATI, 0x793b) +#define HDA_ATI_RS690 HDA_MODEL_CONSTRUCT(ATI, 0x7919) +#define HDA_ATI_RS780 HDA_MODEL_CONSTRUCT(ATI, 0x960f) +#define HDA_ATI_RS880 HDA_MODEL_CONSTRUCT(ATI, 0x970f) +#define HDA_ATI_R600 HDA_MODEL_CONSTRUCT(ATI, 0xaa00) +#define HDA_ATI_RV630 HDA_MODEL_CONSTRUCT(ATI, 0xaa08) +#define HDA_ATI_RV610 HDA_MODEL_CONSTRUCT(ATI, 0xaa10) +#define HDA_ATI_RV670 HDA_MODEL_CONSTRUCT(ATI, 0xaa18) +#define HDA_ATI_RV635 HDA_MODEL_CONSTRUCT(ATI, 0xaa20) +#define HDA_ATI_RV620 HDA_MODEL_CONSTRUCT(ATI, 0xaa28) +#define HDA_ATI_RV770 HDA_MODEL_CONSTRUCT(ATI, 0xaa30) +#define HDA_ATI_RV730 HDA_MODEL_CONSTRUCT(ATI, 0xaa38) +#define HDA_ATI_RV710 HDA_MODEL_CONSTRUCT(ATI, 0xaa40) +#define HDA_ATI_RV740 HDA_MODEL_CONSTRUCT(ATI, 0xaa48) +#define HDA_ATI_RV870 HDA_MODEL_CONSTRUCT(ATI, 0xaa50) +#define HDA_ATI_RV840 HDA_MODEL_CONSTRUCT(ATI, 0xaa58) +#define HDA_ATI_RV830 HDA_MODEL_CONSTRUCT(ATI, 0xaa60) +#define HDA_ATI_RV810 HDA_MODEL_CONSTRUCT(ATI, 0xaa68) +#define HDA_ATI_RV970 HDA_MODEL_CONSTRUCT(ATI, 0xaa80) +#define HDA_ATI_RV940 HDA_MODEL_CONSTRUCT(ATI, 0xaa88) +#define HDA_ATI_RV930 HDA_MODEL_CONSTRUCT(ATI, 0xaa90) +#define HDA_ATI_RV910 HDA_MODEL_CONSTRUCT(ATI, 0xaa98) +#define HDA_ATI_R1000 HDA_MODEL_CONSTRUCT(ATI, 0xaaa0) +#define HDA_ATI_KABINI HDA_MODEL_CONSTRUCT(ATI, 0x9840) +#define HDA_ATI_TRINITY HDA_MODEL_CONSTRUCT(ATI, 0x9902) +#define HDA_ATI_ALL HDA_MODEL_CONSTRUCT(ATI, 0xffff) + +#define AMD_VENDORID 0x1022 +#define HDA_AMD_X370 HDA_MODEL_CONSTRUCT(AMD, 0x1457) +#define HDA_AMD_X570 HDA_MODEL_CONSTRUCT(AMD, 0x1487) +#define HDA_AMD_STONEY HDA_MODEL_CONSTRUCT(AMD, 0x157a) +#define HDA_AMD_RAVEN HDA_MODEL_CONSTRUCT(AMD, 0x15e3) +#define HDA_AMD_HUDSON2 HDA_MODEL_CONSTRUCT(AMD, 0x780d) +#define HDA_AMD_ALL HDA_MODEL_CONSTRUCT(AMD, 0xffff) /* RDC */ -#define RDC_VENDORID 0x17f3 -#define HDA_RDC_M3010 HDA_MODEL_CONSTRUCT(RDC, 0x3010) +#define RDC_VENDORID 0x17f3 +#define HDA_RDC_M3010 HDA_MODEL_CONSTRUCT(RDC, 0x3010) /* Creative */ -#define CREATIVE_VENDORID 0x1102 -#define HDA_CREATIVE_SB1570 HDA_MODEL_CONSTRUCT(CREATIVE, 0x0012) -#define HDA_CREATIVE_ALL HDA_MODEL_CONSTRUCT(CREATIVE, 0xffff) +#define CREATIVE_VENDORID 0x1102 +#define HDA_CREATIVE_SB1570 HDA_MODEL_CONSTRUCT(CREATIVE, 0x0012) +#define HDA_CREATIVE_ALL HDA_MODEL_CONSTRUCT(CREATIVE, 0xffff) /* VIA */ -#define VIA_VENDORID 0x1106 -#define HDA_VIA_VT82XX HDA_MODEL_CONSTRUCT(VIA, 0x3288) -#define HDA_VIA_ALL HDA_MODEL_CONSTRUCT(VIA, 0xffff) +#define VIA_VENDORID 0x1106 +#define HDA_VIA_VT82XX HDA_MODEL_CONSTRUCT(VIA, 0x3288) +#define HDA_VIA_ALL HDA_MODEL_CONSTRUCT(VIA, 0xffff) /* VMware */ -#define VMWARE_VENDORID 0x15ad -#define HDA_VMWARE HDA_MODEL_CONSTRUCT(VMWARE, 0x1977) -#define HDA_VMWARE_ALL HDA_MODEL_CONSTRUCT(VMWARE, 0xffff) +#define VMWARE_VENDORID 0x15ad +#define HDA_VMWARE HDA_MODEL_CONSTRUCT(VMWARE, 0x1977) +#define HDA_VMWARE_ALL HDA_MODEL_CONSTRUCT(VMWARE, 0xffff) /* SiS */ -#define SIS_VENDORID 0x1039 -#define HDA_SIS_966 HDA_MODEL_CONSTRUCT(SIS, 0x7502) -#define HDA_SIS_ALL HDA_MODEL_CONSTRUCT(SIS, 0xffff) +#define SIS_VENDORID 0x1039 +#define HDA_SIS_966 HDA_MODEL_CONSTRUCT(SIS, 0x7502) +#define HDA_SIS_ALL HDA_MODEL_CONSTRUCT(SIS, 0xffff) /* ULI */ -#define ULI_VENDORID 0x10b9 -#define HDA_ULI_M5461 HDA_MODEL_CONSTRUCT(ULI, 0x5461) -#define HDA_ULI_ALL HDA_MODEL_CONSTRUCT(ULI, 0xffff) +#define ULI_VENDORID 0x10b9 +#define HDA_ULI_M5461 HDA_MODEL_CONSTRUCT(ULI, 0x5461) +#define HDA_ULI_ALL HDA_MODEL_CONSTRUCT(ULI, 0xffff) /* OEM/subvendors */ /* Intel */ -#define INTEL_DH87RL_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0x204a) -#define INTEL_D101GGC_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd600) +#define INTEL_DH87RL_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0x204a) +#define INTEL_D101GGC_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd600) /* HP/Compaq */ -#define HP_VENDORID 0x103c -#define HP_Z200_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x103c) -#define HP_225AID_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x225a) -#define HP_2272ID_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x2272) -#define HP_2273ID_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x2273) -#define HP_V3000_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30b5) -#define HP_NX7400_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30a2) -#define HP_NX6310_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30aa) -#define HP_NX6325_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30b0) -#define HP_XW4300_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x3013) -#define HP_3010_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x3010) -#define HP_DV5000_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30a5) -#define HP_DC7700S_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x2801) -#define HP_DC7700_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x2802) -#define HP_DC5750_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x280a) -#define HP_AF006UR_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x83a2) -#define HP_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0xffff) +#define HP_VENDORID 0x103c +#define HP_Z200_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x103c) +#define HP_225AID_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x225a) +#define HP_2272ID_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x2272) +#define HP_2273ID_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x2273) +#define HP_V3000_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30b5) +#define HP_NX7400_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30a2) +#define HP_NX6310_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30aa) +#define HP_NX6325_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30b0) +#define HP_XW4300_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x3013) +#define HP_3010_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x3010) +#define HP_DV5000_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30a5) +#define HP_DC7700S_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x2801) +#define HP_DC7700_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x2802) +#define HP_DC5750_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x280a) +#define HP_AF006UR_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x83a2) +#define HP_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0xffff) /* What is wrong with XN 2563 anyway? (Got the picture ?) */ -#define HP_NX6325_SUBVENDORX 0x103c30b0 +#define HP_NX6325_SUBVENDORX 0x103c30b0 /* Dell */ -#define DELL_VENDORID 0x1028 -#define DELL_D630_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01f9) -#define DELL_D820_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01cc) -#define DELL_V1400_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0227) -#define DELL_V1500_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0228) -#define DELL_I1300_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01c9) -#define DELL_L7480_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x07a0) -#define DELL_XPSM1210_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01d7) -#define DELL_OPLX745_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01da) -#define DELL_05F4ID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x05f4) -#define DELL_05F5ID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x05f5) -#define DELL_05F6ID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x05f6) -#define DELL_V5470_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0615) -#define DELL_V5470_1_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0616) -#define DELL_064AID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x064a) -#define DELL_064BID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x064b) -#define DELL_9020M_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0669) -#define DELL_V5480_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x069a) -#define DELL_06D9ID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06d9) -#define DELL_06DAID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06da) -#define DELL_06DBID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06db) -#define DELL_06DDID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06dd) -#define DELL_06DEID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06de) -#define DELL_06DFID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06df) -#define DELL_06E0ID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06e0) -#define DELL_7559_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0706) -#define DELL_7000_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0798) -#define DELL_XPS9560_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x07be) -#define DELL_E7240_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x05ca) -#define DELL_164AID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x164a) -#define DELL_164BID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x164b) -#define DELL_I7577_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0802) -#define DELL_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0xffff) +#define DELL_VENDORID 0x1028 +#define DELL_D630_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01f9) +#define DELL_D820_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01cc) +#define DELL_V1400_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0227) +#define DELL_V1500_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0228) +#define DELL_I1300_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01c9) +#define DELL_L7480_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x07a0) +#define DELL_XPSM1210_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01d7) +#define DELL_OPLX745_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01da) +#define DELL_05F4ID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x05f4) +#define DELL_05F5ID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x05f5) +#define DELL_05F6ID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x05f6) +#define DELL_V5470_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0615) +#define DELL_V5470_1_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0616) +#define DELL_064AID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x064a) +#define DELL_064BID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x064b) +#define DELL_9020M_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0669) +#define DELL_V5480_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x069a) +#define DELL_06D9ID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06d9) +#define DELL_06DAID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06da) +#define DELL_06DBID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06db) +#define DELL_06DDID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06dd) +#define DELL_06DEID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06de) +#define DELL_06DFID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06df) +#define DELL_06E0ID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x06e0) +#define DELL_7559_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0706) +#define DELL_7000_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0798) +#define DELL_XPS9560_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x07be) +#define DELL_E7240_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x05ca) +#define DELL_164AID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x164a) +#define DELL_164BID_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x164b) +#define DELL_I7577_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0802) +#define DELL_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0xffff) /* Clevo */ -#define CLEVO_VENDORID 0x1558 -#define CLEVO_D900T_SUBVENDOR HDA_MODEL_CONSTRUCT(CLEVO, 0x0900) -#define CLEVO_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(CLEVO, 0xffff) +#define CLEVO_VENDORID 0x1558 +#define CLEVO_D900T_SUBVENDOR HDA_MODEL_CONSTRUCT(CLEVO, 0x0900) +#define CLEVO_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(CLEVO, 0xffff) /* Acer */ -#define ACER_VENDORID 0x1025 -#define ACER_0070ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0070) -#define ACER_0077ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0077) -#define ACER_0078ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0078) -#define ACER_0087ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0087) -#define ACER_A5050_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x010f) -#define ACER_A4520_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0127) -#define ACER_A4710_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x012f) -#define ACER_A4715_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0133) -#define ACER_TM_6293_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0139) -#define ACER_3681WXM_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0110) -#define ACER_T6292_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x011b) -#define ACER_T5320_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x011f) -#define ACER_TM_6293_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0139) -#define ACER_AC700_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x047c) -#define ACER_V5_571G_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x072d) -#define ACER_AO725_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0740) -#define ACER_AO756_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0742) -#define ACER_E1_472_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0762) -#define ACER_E1_572_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0775) -#define ACER_V5_573G_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x079b) -#define ACER_CB_14_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x106d) -#define ACER_V5_122P_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xa80d) -#define ACER_APFV_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xa884) -#define ACER_E309ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xe309) -#define ACER_E310ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xe310) -#define ACER_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xffff) +#define ACER_VENDORID 0x1025 +#define ACER_0070ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0070) +#define ACER_0077ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0077) +#define ACER_0078ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0078) +#define ACER_0087ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0087) +#define ACER_A5050_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x010f) +#define ACER_A4520_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0127) +#define ACER_A4710_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x012f) +#define ACER_A4715_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0133) +#define ACER_TM_6293_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0139) +#define ACER_3681WXM_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0110) +#define ACER_T6292_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x011b) +#define ACER_T5320_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x011f) +#define ACER_TM_6293_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0139) +#define ACER_AC700_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x047c) +#define ACER_V5_571G_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x072d) +#define ACER_AO725_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0740) +#define ACER_AO756_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0742) +#define ACER_E1_472_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0762) +#define ACER_E1_572_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0775) +#define ACER_V5_573G_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x079b) +#define ACER_CB_14_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x106d) +#define ACER_V5_122P_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xa80d) +#define ACER_APFV_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xa884) +#define ACER_E309ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xe309) +#define ACER_E310ID_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xe310) +#define ACER_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xffff) /* Asus */ -#define ASUS_VENDORID 0x1043 -#define ASUS_X540A_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x103e) -#define ASUS_X540SA_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x10c0) -#define ASUS_X556UR_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x11c0) -#define ASUS_W5A_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x10c3) -#define ASUS_X540LA_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x10d0) -#define ASUS_A8X_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1153) -#define ASUS_U5F_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1263) -#define ASUS_W6F_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1263) -#define ASUS_X541SA_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x12e0) -#define ASUS_X541UV_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x12f0) -#define ASUS_A7M_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1323) -#define ASUS_F3JC_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1338) -#define ASUS_G2K_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1339) -#define ASUS_Z550SA_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x13b0) -#define ASUS_A7T_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x13c2) -#define ASUS_UX31A_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1517) -#define ASUS_GL553VE_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x15e0) -#define ASUS_Z71V_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1964) -#define ASUS_W2J_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1971) -#define ASUS_M5200_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1993) -#define ASUS_G73JW_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1a13) -#define ASUS_X705UD_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1a30) -#define ASUS_Z550MA_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1bbd) -#define ASUS_X555UB_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1ccd) -#define ASUS_P5PL2_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x817f) -#define ASUS_P1AH2_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81cb) -#define ASUS_M2NPVMX_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81cb) -#define ASUS_M2V_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81e7) -#define ASUS_P5BWD_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81ec) -#define ASUS_M2N_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x8234) -#define ASUS_A8NVMCSM_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0xcb84) -#define ASUS_X101CH_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x8516) -#define ASUS_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0xffff) +#define ASUS_VENDORID 0x1043 +#define ASUS_X540A_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x103e) +#define ASUS_X540SA_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x10c0) +#define ASUS_X556UR_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x11c0) +#define ASUS_W5A_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x10c3) +#define ASUS_X540LA_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x10d0) +#define ASUS_A8X_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1153) +#define ASUS_U5F_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1263) +#define ASUS_W6F_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1263) +#define ASUS_X541SA_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x12e0) +#define ASUS_X541UV_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x12f0) +#define ASUS_A7M_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1323) +#define ASUS_F3JC_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1338) +#define ASUS_G2K_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1339) +#define ASUS_Z550SA_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x13b0) +#define ASUS_A7T_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x13c2) +#define ASUS_UX31A_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1517) +#define ASUS_GL553VE_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x15e0) +#define ASUS_Z71V_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1964) +#define ASUS_W2J_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1971) +#define ASUS_M5200_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1993) +#define ASUS_G73JW_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1a13) +#define ASUS_X705UD_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1a30) +#define ASUS_Z550MA_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1bbd) +#define ASUS_X555UB_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1ccd) +#define ASUS_P5PL2_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x817f) +#define ASUS_P1AH2_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81cb) +#define ASUS_M2NPVMX_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81cb) +#define ASUS_M2V_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81e7) +#define ASUS_P5BWD_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81ec) +#define ASUS_M2N_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x8234) +#define ASUS_A8NVMCSM_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0xcb84) +#define ASUS_X101CH_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x8516) +#define ASUS_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0xffff) /* IBM / Lenovo */ -#define IBM_VENDORID 0x1014 -#define IBM_M52_SUBVENDOR HDA_MODEL_CONSTRUCT(IBM, 0x02f6) -#define IBM_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(IBM, 0xffff) +#define IBM_VENDORID 0x1014 +#define IBM_M52_SUBVENDOR HDA_MODEL_CONSTRUCT(IBM, 0x02f6) +#define IBM_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(IBM, 0xffff) /* Lenovo */ -#define LENOVO_VENDORID 0x17aa -#define LENOVO_3KN100_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2066) -#define LENOVO_3KN200_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x384e) +#define LENOVO_VENDORID 0x17aa +#define LENOVO_3KN100_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2066) +#define LENOVO_3KN200_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x384e) #define LENOVO_B450_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x3a0d) -#define LENOVO_TCA55_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x1015) -#define LENOVO_X1_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21e8) -#define LENOVO_X1CRBN_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21f9) -#define LENOVO_X120BS_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2227) -#define LENOVO_X120KH_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x225c) -#define LENOVO_X120QD_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2292) -#define LENOVO_X220_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21da) -#define LENOVO_X300_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x20ac) -#define LENOVO_T400_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x20f2) -#define LENOVO_T420_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21ce) -#define LENOVO_T430_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21f3) -#define LENOVO_T430S_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21fb) -#define LENOVO_T520_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21cf) -#define LENOVO_T530_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21f6) -#define LENOVO_X230_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21fa) -#define LENOVO_X230T_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2203) -#define LENOVO_T431S_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2208) -#define LENOVO_G580_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x3977) -#define LENOVO_L5AMD_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x381b) -#define LENOVO_L5INTEL_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x380f) -#define LENOVO_3000_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x384e) -#define LENOVO_I330_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x3808) -#define LENOVO_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0xffff) +#define LENOVO_TCA55_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x1015) +#define LENOVO_X1_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21e8) +#define LENOVO_X1CRBN_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21f9) +#define LENOVO_X120BS_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2227) +#define LENOVO_X120KH_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x225c) +#define LENOVO_X120QD_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2292) +#define LENOVO_X220_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21da) +#define LENOVO_X300_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x20ac) +#define LENOVO_T400_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x20f2) +#define LENOVO_T420_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21ce) +#define LENOVO_T430_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21f3) +#define LENOVO_T430S_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21fb) +#define LENOVO_T520_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21cf) +#define LENOVO_T530_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21f6) +#define LENOVO_X230_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21fa) +#define LENOVO_X230T_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2203) +#define LENOVO_T431S_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2208) +#define LENOVO_G580_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x3977) +#define LENOVO_L5AMD_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x381b) +#define LENOVO_L5INTEL_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x380f) +#define LENOVO_3000_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x384e) +#define LENOVO_I330_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x3808) +#define LENOVO_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0xffff) /* Samsung */ -#define SAMSUNG_VENDORID 0x144d -#define SAMSUNG_Q1_SUBVENDOR HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027) -#define SAMSUNG_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff) +#define SAMSUNG_VENDORID 0x144d +#define SAMSUNG_Q1_SUBVENDOR HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027) +#define SAMSUNG_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff) /* Medion ? */ -#define MEDION_VENDORID 0x161f -#define MEDION_MD95257_SUBVENDOR HDA_MODEL_CONSTRUCT(MEDION, 0x203d) -#define MEDION_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(MEDION, 0xffff) +#define MEDION_VENDORID 0x161f +#define MEDION_MD95257_SUBVENDOR HDA_MODEL_CONSTRUCT(MEDION, 0x203d) +#define MEDION_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(MEDION, 0xffff) /* Apple Computer Inc. */ -#define APPLE_VENDORID 0x106b -#define APPLE_MB3_SUBVENDOR HDA_MODEL_CONSTRUCT(APPLE, 0x00a1) +#define APPLE_VENDORID 0x106b +#define APPLE_MB3_SUBVENDOR HDA_MODEL_CONSTRUCT(APPLE, 0x00a1) /* Sony */ -#define SONY_VENDORID 0x104d -#define SONY_S5_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81cc) -#define SONY_81A0ID_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81a0) -#define SONY_81D6ID_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81d6) -#define SONY_81BBID_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81bb) -#define SONY_VAIO_TX_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81e2) -#define SONY_VAIO_S13_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x9099) -#define SONY_VAIO_P11_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x90b5) -#define SONY_VAIO_P13_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x90b6) -#define SONY_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0xffff) +#define SONY_VENDORID 0x104d +#define SONY_S5_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81cc) +#define SONY_81A0ID_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81a0) +#define SONY_81D6ID_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81d6) +#define SONY_81BBID_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81bb) +#define SONY_VAIO_TX_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81e2) +#define SONY_VAIO_S13_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x9099) +#define SONY_VAIO_P11_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x90b5) +#define SONY_VAIO_P13_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x90b6) +#define SONY_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0xffff) /* Tyan? */ -#define TYAN_VENDORID 0x10f1 -#define TYAN_N6650W_SUBVENDOR HDA_MODEL_CONSTRUCT(TYAN, 0x2915) +#define TYAN_VENDORID 0x10f1 +#define TYAN_N6650W_SUBVENDOR HDA_MODEL_CONSTRUCT(TYAN, 0x2915) /* * Apple Intel MacXXXX seems using Sigmatel codec/vendor id * instead of their own, which is beyond my comprehension * (see HDA_CODEC_STAC9221 below). */ -#define APPLE_INTEL_MAC 0x76808384 -#define APPLE_MACBOOKAIR31 0x0d9410de -#define APPLE_MACBOOKPRO55 0xcb7910de -#define APPLE_MACBOOKPRO71 0xcb8910de +#define APPLE_INTEL_MAC 0x76808384 +#define APPLE_MACBOOKAIR31 0x0d9410de +#define APPLE_MACBOOKPRO55 0xcb7910de +#define APPLE_MACBOOKPRO71 0xcb8910de /* LG Electronics */ -#define LG_VENDORID 0x1854 -#define LG_LW20_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x0018) -#define LG_M1_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x003b) -#define LG_P1_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x005f) -#define LG_W1_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x0068) -#define LG_LW25_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x0077) -#define LG_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0xffff) +#define LG_VENDORID 0x1854 +#define LG_LW20_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x0018) +#define LG_M1_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x003b) +#define LG_P1_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x005f) +#define LG_W1_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x0068) +#define LG_LW25_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x0077) +#define LG_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0xffff) /* Fujitsu Siemens */ -#define FS_VENDORID 0x1734 -#define FS_PA1510_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x10b8) -#define FS_SI1848_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x10cd) +#define FS_VENDORID 0x1734 +#define FS_PA1510_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x10b8) +#define FS_SI1848_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x10cd) #define FS_AMILO_M1437_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x107c) #define FS_AMILO_M1451G_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x1094) #define FS_AMILO_PI1556_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x10b0) #define FS_AMILO_XI1526_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x10ac) -#define FS_H270_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x1147) -#define FS_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0xffff) +#define FS_H270_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x1147) +#define FS_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0xffff) /* Fujitsu Limited */ -#define FL_VENDORID 0x10cf -#define FL_S7020D_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1326) -#define FL_LB_S7110_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1397) -#define FL_U1010_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x142d) -#define FL_1475ID_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1475) -#define FL_LB_U904_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1845) -#define FL_LB_T731_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x15dc) -#define FL_LB_E725_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1757) -#define FL_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0xffff) +#define FL_VENDORID 0x10cf +#define FL_S7020D_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1326) +#define FL_LB_S7110_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1397) +#define FL_U1010_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x142d) +#define FL_1475ID_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1475) +#define FL_LB_U904_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1845) +#define FL_LB_T731_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x15dc) +#define FL_LB_E725_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1757) +#define FL_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0xffff) /* Toshiba */ -#define TOSHIBA_VENDORID 0x1179 -#define TOSHIBA_U200_SUBVENDOR HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001) -#define TOSHIBA_A135_SUBVENDOR HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01) -#define TOSHIBA_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff) +#define TOSHIBA_VENDORID 0x1179 +#define TOSHIBA_U200_SUBVENDOR HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001) +#define TOSHIBA_A135_SUBVENDOR HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01) +#define TOSHIBA_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff) /* Micro-Star International (MSI) */ -#define MSI_VENDORID 0x1462 -#define MSI_MS1034_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0x0349) -#define MSI_MS034A_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0x034a) -#define MSI_1150ID_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0x1150) -#define MSI_MS_B120_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0xb120) -#define MSI_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0xffff) +#define MSI_VENDORID 0x1462 +#define MSI_MS1034_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0x0349) +#define MSI_MS034A_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0x034a) +#define MSI_1150ID_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0x1150) +#define MSI_MS_B120_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0xb120) +#define MSI_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0xffff) /* Giga-Byte Technology */ -#define GB_VENDORID 0x1458 -#define GB_G33S2H_SUBVENDOR HDA_MODEL_CONSTRUCT(GB, 0xa022) -#define GB_K8_SUBVENDOR HDA_MODEL_CONSTRUCT(GB, 0xa102) -#define GB_BXBT2807_SUBVENDOR HDA_MODEL_CONSTRUCT(GB, 0xfa53) -#define GP_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(GB, 0xffff) +#define GB_VENDORID 0x1458 +#define GB_G33S2H_SUBVENDOR HDA_MODEL_CONSTRUCT(GB, 0xa022) +#define GB_K8_SUBVENDOR HDA_MODEL_CONSTRUCT(GB, 0xa102) +#define GB_BXBT2807_SUBVENDOR HDA_MODEL_CONSTRUCT(GB, 0xfa53) +#define GP_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(GB, 0xffff) /* Uniwill ? */ -#define UNIWILL_VENDORID 0x1584 -#define UNIWILL_9075_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075) -#define UNIWILL_9050_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9050) -#define UNIWILL_9054_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9054) -#define UNIWILL_9070_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9070) -#define UNIWILL_9080_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080) +#define UNIWILL_VENDORID 0x1584 +#define UNIWILL_9075_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075) +#define UNIWILL_9050_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9050) +#define UNIWILL_9054_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9054) +#define UNIWILL_9070_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9070) +#define UNIWILL_9080_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080) /* Coeus / Elitegroup */ -#define COEUS_VENDORID 0x1019 -#define COEUS_G610P_SUBVENDOR HDA_MODEL_CONSTRUCT(COEUS, 0x0f69) -#define COEUS_A880ID_SUBVENDOR HDA_MODEL_CONSTRUCT(COEUS, 0xa880) +#define COEUS_VENDORID 0x1019 +#define COEUS_G610P_SUBVENDOR HDA_MODEL_CONSTRUCT(COEUS, 0x0f69) +#define COEUS_A880ID_SUBVENDOR HDA_MODEL_CONSTRUCT(COEUS, 0xa880) /* Arima */ -#define ARIMA_VENDORID 0x161f -#define ARIMA_W810_SUBVENDOR HDA_MODEL_CONSTRUCT(ARIMA, 0x0f69) +#define ARIMA_VENDORID 0x161f +#define ARIMA_W810_SUBVENDOR HDA_MODEL_CONSTRUCT(ARIMA, 0x0f69) /* Shuttle Computer */ -#define SHUTTLE_VENDORID 0x1039 +#define SHUTTLE_VENDORID 0x1039 #define SHUTTLE_ST20G5_SUBVENDOR HDA_MODEL_CONSTRUCT(SHUTTLE, 0xc790) /* First International Computer */ -#define FIC_VENDORID 0x1509 -#define FIC_P4M_SUBVENDOR HDA_MODEL_CONSTRUCT(FIC, 0x925d) +#define FIC_VENDORID 0x1509 +#define FIC_P4M_SUBVENDOR HDA_MODEL_CONSTRUCT(FIC, 0x925d) /* Gateway 2000 */ -#define GATEWAY_VENDORID 0x107b +#define GATEWAY_VENDORID 0x107b #define GATEWAY_3032ID_SUBVENDOR HDA_MODEL_CONSTRUCT(GATEWAY, 0x3032) #define GATEWAY_3033ID_SUBVENDOR HDA_MODEL_CONSTRUCT(GATEWAY, 0x3033) #define GATEWAY_4039ID_SUBVENDOR HDA_MODEL_CONSTRUCT(GATEWAY, 0x4039) /* Biostar */ -#define BIOSTAR_VENDORID 0x1565 +#define BIOSTAR_VENDORID 0x1565 #define BIOSTAR_8202ID_SUBVENDOR HDA_MODEL_CONSTRUCT(BIOSTAR, 0x8202) /* EPoX Computer Co., Ltd. */ -#define EPOX_VENDORID 0x1695 -#define EPOX_400DID_SUBVENDOR HDA_MODEL_CONSTRUCT(EPOX, 0x400d) -#define EPOX_EP5LDA_SUBVENDOR HDA_MODEL_CONSTRUCT(EPOX, 0x4012) +#define EPOX_VENDORID 0x1695 +#define EPOX_400DID_SUBVENDOR HDA_MODEL_CONSTRUCT(EPOX, 0x400d) +#define EPOX_EP5LDA_SUBVENDOR HDA_MODEL_CONSTRUCT(EPOX, 0x4012) /* AOpen */ -#define AOPEN_VENDORID 0xa0a0 +#define AOPEN_VENDORID 0xa0a0 #define AOPEN_I915GMMHFS_SUBVENDOR HDA_MODEL_CONSTRUCT(AOPEN, 0x8202) /* Framework */ -#define FRAMEWORK_VENDORID 0xf111 +#define FRAMEWORK_VENDORID 0xf111 #define FRAMEWORK_LAPTOP_0001_SUBVENDOR HDA_MODEL_CONSTRUCT(FRAMEWORK, 0x0001) #define FRAMEWORK_LAPTOP_0002_SUBVENDOR HDA_MODEL_CONSTRUCT(FRAMEWORK, 0x0002) /* All codecs you can eat... */ #define HDA_CODEC_CONSTRUCT(vendor, id) \ - (((uint32_t)(vendor##_VENDORID) << 16) | ((id) & 0xffff)) + (((uint32_t)(vendor##_VENDORID) << 16) | ((id) & 0xffff)) /* Cirrus Logic */ -#define CIRRUSLOGIC_VENDORID 0x1013 -#define HDA_CODEC_CS4206 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4206) -#define HDA_CODEC_CS4207 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4207) -#define HDA_CODEC_CS4210 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4210) -#define HDA_CODEC_CSXXXX HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0xffff) +#define CIRRUSLOGIC_VENDORID 0x1013 +#define HDA_CODEC_CS4206 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4206) +#define HDA_CODEC_CS4207 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4207) +#define HDA_CODEC_CS4210 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4210) +#define HDA_CODEC_CSXXXX HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0xffff) /* Realtek */ -#define REALTEK_VENDORID 0x10ec -#define HDA_CODEC_ALC215 HDA_CODEC_CONSTRUCT(REALTEK, 0x0215) -#define HDA_CODEC_ALC221 HDA_CODEC_CONSTRUCT(REALTEK, 0x0221) -#define HDA_CODEC_ALC222 HDA_CODEC_CONSTRUCT(REALTEK, 0x0222) -#define HDA_CODEC_ALC225 HDA_CODEC_CONSTRUCT(REALTEK, 0x0225) -#define HDA_CODEC_ALC230 HDA_CODEC_CONSTRUCT(REALTEK, 0x0230) -#define HDA_CODEC_ALC231 HDA_CODEC_CONSTRUCT(REALTEK, 0x0231) -#define HDA_CODEC_ALC233 HDA_CODEC_CONSTRUCT(REALTEK, 0x0233) -#define HDA_CODEC_ALC234 HDA_CODEC_CONSTRUCT(REALTEK, 0x0234) -#define HDA_CODEC_ALC235 HDA_CODEC_CONSTRUCT(REALTEK, 0x0235) -#define HDA_CODEC_ALC236 HDA_CODEC_CONSTRUCT(REALTEK, 0x0236) -#define HDA_CODEC_ALC245 HDA_CODEC_CONSTRUCT(REALTEK, 0x0245) -#define HDA_CODEC_ALC255 HDA_CODEC_CONSTRUCT(REALTEK, 0x0255) -#define HDA_CODEC_ALC256 HDA_CODEC_CONSTRUCT(REALTEK, 0x0256) -#define HDA_CODEC_ALC257 HDA_CODEC_CONSTRUCT(REALTEK, 0x0257) -#define HDA_CODEC_ALC260 HDA_CODEC_CONSTRUCT(REALTEK, 0x0260) -#define HDA_CODEC_ALC262 HDA_CODEC_CONSTRUCT(REALTEK, 0x0262) -#define HDA_CODEC_ALC267 HDA_CODEC_CONSTRUCT(REALTEK, 0x0267) -#define HDA_CODEC_ALC268 HDA_CODEC_CONSTRUCT(REALTEK, 0x0268) -#define HDA_CODEC_ALC269 HDA_CODEC_CONSTRUCT(REALTEK, 0x0269) -#define HDA_CODEC_ALC270 HDA_CODEC_CONSTRUCT(REALTEK, 0x0270) -#define HDA_CODEC_ALC271 HDA_CODEC_CONSTRUCT(REALTEK, 0x0271) -#define HDA_CODEC_ALC272 HDA_CODEC_CONSTRUCT(REALTEK, 0x0272) -#define HDA_CODEC_ALC273 HDA_CODEC_CONSTRUCT(REALTEK, 0x0273) -#define HDA_CODEC_ALC274 HDA_CODEC_CONSTRUCT(REALTEK, 0x0274) -#define HDA_CODEC_ALC275 HDA_CODEC_CONSTRUCT(REALTEK, 0x0275) -#define HDA_CODEC_ALC276 HDA_CODEC_CONSTRUCT(REALTEK, 0x0276) -#define HDA_CODEC_ALC280 HDA_CODEC_CONSTRUCT(REALTEK, 0x0280) -#define HDA_CODEC_ALC282 HDA_CODEC_CONSTRUCT(REALTEK, 0x0282) -#define HDA_CODEC_ALC283 HDA_CODEC_CONSTRUCT(REALTEK, 0x0283) -#define HDA_CODEC_ALC284 HDA_CODEC_CONSTRUCT(REALTEK, 0x0284) -#define HDA_CODEC_ALC285 HDA_CODEC_CONSTRUCT(REALTEK, 0x0285) -#define HDA_CODEC_ALC286 HDA_CODEC_CONSTRUCT(REALTEK, 0x0286) -#define HDA_CODEC_ALC288 HDA_CODEC_CONSTRUCT(REALTEK, 0x0288) -#define HDA_CODEC_ALC289 HDA_CODEC_CONSTRUCT(REALTEK, 0x0289) -#define HDA_CODEC_ALC290 HDA_CODEC_CONSTRUCT(REALTEK, 0x0290) -#define HDA_CODEC_ALC292 HDA_CODEC_CONSTRUCT(REALTEK, 0x0292) -#define HDA_CODEC_ALC293 HDA_CODEC_CONSTRUCT(REALTEK, 0x0293) -#define HDA_CODEC_ALC294 HDA_CODEC_CONSTRUCT(REALTEK, 0x0294) -#define HDA_CODEC_ALC295 HDA_CODEC_CONSTRUCT(REALTEK, 0x0295) -#define HDA_CODEC_ALC298 HDA_CODEC_CONSTRUCT(REALTEK, 0x0298) -#define HDA_CODEC_ALC299 HDA_CODEC_CONSTRUCT(REALTEK, 0x0299) -#define HDA_CODEC_ALC292 HDA_CODEC_CONSTRUCT(REALTEK, 0x0292) -#define HDA_CODEC_ALC295 HDA_CODEC_CONSTRUCT(REALTEK, 0x0295) -#define HDA_CODEC_ALC300 HDA_CODEC_CONSTRUCT(REALTEK, 0x0300) -#define HDA_CODEC_ALC623 HDA_CODEC_CONSTRUCT(REALTEK, 0x0623) -#define HDA_CODEC_ALC660 HDA_CODEC_CONSTRUCT(REALTEK, 0x0660) -#define HDA_CODEC_ALC662 HDA_CODEC_CONSTRUCT(REALTEK, 0x0662) -#define HDA_CODEC_ALC663 HDA_CODEC_CONSTRUCT(REALTEK, 0x0663) -#define HDA_CODEC_ALC665 HDA_CODEC_CONSTRUCT(REALTEK, 0x0665) -#define HDA_CODEC_ALC670 HDA_CODEC_CONSTRUCT(REALTEK, 0x0670) -#define HDA_CODEC_ALC671 HDA_CODEC_CONSTRUCT(REALTEK, 0x0671) -#define HDA_CODEC_ALC680 HDA_CODEC_CONSTRUCT(REALTEK, 0x0680) -#define HDA_CODEC_ALC700 HDA_CODEC_CONSTRUCT(REALTEK, 0x0700) -#define HDA_CODEC_ALC701 HDA_CODEC_CONSTRUCT(REALTEK, 0x0701) -#define HDA_CODEC_ALC703 HDA_CODEC_CONSTRUCT(REALTEK, 0x0703) -#define HDA_CODEC_ALC861 HDA_CODEC_CONSTRUCT(REALTEK, 0x0861) -#define HDA_CODEC_ALC861VD HDA_CODEC_CONSTRUCT(REALTEK, 0x0862) -#define HDA_CODEC_ALC880 HDA_CODEC_CONSTRUCT(REALTEK, 0x0880) -#define HDA_CODEC_ALC882 HDA_CODEC_CONSTRUCT(REALTEK, 0x0882) -#define HDA_CODEC_ALC883 HDA_CODEC_CONSTRUCT(REALTEK, 0x0883) -#define HDA_CODEC_ALC885 HDA_CODEC_CONSTRUCT(REALTEK, 0x0885) -#define HDA_CODEC_ALC887 HDA_CODEC_CONSTRUCT(REALTEK, 0x0887) -#define HDA_CODEC_ALC888 HDA_CODEC_CONSTRUCT(REALTEK, 0x0888) -#define HDA_CODEC_ALC889 HDA_CODEC_CONSTRUCT(REALTEK, 0x0889) -#define HDA_CODEC_ALC892 HDA_CODEC_CONSTRUCT(REALTEK, 0x0892) -#define HDA_CODEC_ALC897 HDA_CODEC_CONSTRUCT(REALTEK, 0x0897) -#define HDA_CODEC_ALC899 HDA_CODEC_CONSTRUCT(REALTEK, 0x0899) -#define HDA_CODEC_ALC1150 HDA_CODEC_CONSTRUCT(REALTEK, 0x0900) -#define HDA_CODEC_ALCS1200A HDA_CODEC_CONSTRUCT(REALTEK, 0x0b00) -#define HDA_CODEC_ALC1220_1 HDA_CODEC_CONSTRUCT(REALTEK, 0x1168) -#define HDA_CODEC_ALC1220 HDA_CODEC_CONSTRUCT(REALTEK, 0x1220) -#define HDA_CODEC_ALCXXXX HDA_CODEC_CONSTRUCT(REALTEK, 0xffff) +#define REALTEK_VENDORID 0x10ec +#define HDA_CODEC_ALC215 HDA_CODEC_CONSTRUCT(REALTEK, 0x0215) +#define HDA_CODEC_ALC221 HDA_CODEC_CONSTRUCT(REALTEK, 0x0221) +#define HDA_CODEC_ALC222 HDA_CODEC_CONSTRUCT(REALTEK, 0x0222) +#define HDA_CODEC_ALC225 HDA_CODEC_CONSTRUCT(REALTEK, 0x0225) +#define HDA_CODEC_ALC230 HDA_CODEC_CONSTRUCT(REALTEK, 0x0230) +#define HDA_CODEC_ALC231 HDA_CODEC_CONSTRUCT(REALTEK, 0x0231) +#define HDA_CODEC_ALC233 HDA_CODEC_CONSTRUCT(REALTEK, 0x0233) +#define HDA_CODEC_ALC234 HDA_CODEC_CONSTRUCT(REALTEK, 0x0234) +#define HDA_CODEC_ALC235 HDA_CODEC_CONSTRUCT(REALTEK, 0x0235) +#define HDA_CODEC_ALC236 HDA_CODEC_CONSTRUCT(REALTEK, 0x0236) +#define HDA_CODEC_ALC245 HDA_CODEC_CONSTRUCT(REALTEK, 0x0245) +#define HDA_CODEC_ALC255 HDA_CODEC_CONSTRUCT(REALTEK, 0x0255) +#define HDA_CODEC_ALC256 HDA_CODEC_CONSTRUCT(REALTEK, 0x0256) +#define HDA_CODEC_ALC257 HDA_CODEC_CONSTRUCT(REALTEK, 0x0257) +#define HDA_CODEC_ALC260 HDA_CODEC_CONSTRUCT(REALTEK, 0x0260) +#define HDA_CODEC_ALC262 HDA_CODEC_CONSTRUCT(REALTEK, 0x0262) +#define HDA_CODEC_ALC267 HDA_CODEC_CONSTRUCT(REALTEK, 0x0267) +#define HDA_CODEC_ALC268 HDA_CODEC_CONSTRUCT(REALTEK, 0x0268) +#define HDA_CODEC_ALC269 HDA_CODEC_CONSTRUCT(REALTEK, 0x0269) +#define HDA_CODEC_ALC270 HDA_CODEC_CONSTRUCT(REALTEK, 0x0270) +#define HDA_CODEC_ALC271 HDA_CODEC_CONSTRUCT(REALTEK, 0x0271) +#define HDA_CODEC_ALC272 HDA_CODEC_CONSTRUCT(REALTEK, 0x0272) +#define HDA_CODEC_ALC273 HDA_CODEC_CONSTRUCT(REALTEK, 0x0273) +#define HDA_CODEC_ALC274 HDA_CODEC_CONSTRUCT(REALTEK, 0x0274) +#define HDA_CODEC_ALC275 HDA_CODEC_CONSTRUCT(REALTEK, 0x0275) +#define HDA_CODEC_ALC276 HDA_CODEC_CONSTRUCT(REALTEK, 0x0276) +#define HDA_CODEC_ALC280 HDA_CODEC_CONSTRUCT(REALTEK, 0x0280) +#define HDA_CODEC_ALC282 HDA_CODEC_CONSTRUCT(REALTEK, 0x0282) +#define HDA_CODEC_ALC283 HDA_CODEC_CONSTRUCT(REALTEK, 0x0283) +#define HDA_CODEC_ALC284 HDA_CODEC_CONSTRUCT(REALTEK, 0x0284) +#define HDA_CODEC_ALC285 HDA_CODEC_CONSTRUCT(REALTEK, 0x0285) +#define HDA_CODEC_ALC286 HDA_CODEC_CONSTRUCT(REALTEK, 0x0286) +#define HDA_CODEC_ALC288 HDA_CODEC_CONSTRUCT(REALTEK, 0x0288) +#define HDA_CODEC_ALC289 HDA_CODEC_CONSTRUCT(REALTEK, 0x0289) +#define HDA_CODEC_ALC290 HDA_CODEC_CONSTRUCT(REALTEK, 0x0290) +#define HDA_CODEC_ALC292 HDA_CODEC_CONSTRUCT(REALTEK, 0x0292) +#define HDA_CODEC_ALC293 HDA_CODEC_CONSTRUCT(REALTEK, 0x0293) +#define HDA_CODEC_ALC294 HDA_CODEC_CONSTRUCT(REALTEK, 0x0294) +#define HDA_CODEC_ALC295 HDA_CODEC_CONSTRUCT(REALTEK, 0x0295) +#define HDA_CODEC_ALC298 HDA_CODEC_CONSTRUCT(REALTEK, 0x0298) +#define HDA_CODEC_ALC299 HDA_CODEC_CONSTRUCT(REALTEK, 0x0299) +#define HDA_CODEC_ALC292 HDA_CODEC_CONSTRUCT(REALTEK, 0x0292) +#define HDA_CODEC_ALC295 HDA_CODEC_CONSTRUCT(REALTEK, 0x0295) +#define HDA_CODEC_ALC300 HDA_CODEC_CONSTRUCT(REALTEK, 0x0300) +#define HDA_CODEC_ALC623 HDA_CODEC_CONSTRUCT(REALTEK, 0x0623) +#define HDA_CODEC_ALC660 HDA_CODEC_CONSTRUCT(REALTEK, 0x0660) +#define HDA_CODEC_ALC662 HDA_CODEC_CONSTRUCT(REALTEK, 0x0662) +#define HDA_CODEC_ALC663 HDA_CODEC_CONSTRUCT(REALTEK, 0x0663) +#define HDA_CODEC_ALC665 HDA_CODEC_CONSTRUCT(REALTEK, 0x0665) +#define HDA_CODEC_ALC670 HDA_CODEC_CONSTRUCT(REALTEK, 0x0670) +#define HDA_CODEC_ALC671 HDA_CODEC_CONSTRUCT(REALTEK, 0x0671) +#define HDA_CODEC_ALC680 HDA_CODEC_CONSTRUCT(REALTEK, 0x0680) +#define HDA_CODEC_ALC700 HDA_CODEC_CONSTRUCT(REALTEK, 0x0700) +#define HDA_CODEC_ALC701 HDA_CODEC_CONSTRUCT(REALTEK, 0x0701) +#define HDA_CODEC_ALC703 HDA_CODEC_CONSTRUCT(REALTEK, 0x0703) +#define HDA_CODEC_ALC861 HDA_CODEC_CONSTRUCT(REALTEK, 0x0861) +#define HDA_CODEC_ALC861VD HDA_CODEC_CONSTRUCT(REALTEK, 0x0862) +#define HDA_CODEC_ALC880 HDA_CODEC_CONSTRUCT(REALTEK, 0x0880) +#define HDA_CODEC_ALC882 HDA_CODEC_CONSTRUCT(REALTEK, 0x0882) +#define HDA_CODEC_ALC883 HDA_CODEC_CONSTRUCT(REALTEK, 0x0883) +#define HDA_CODEC_ALC885 HDA_CODEC_CONSTRUCT(REALTEK, 0x0885) +#define HDA_CODEC_ALC887 HDA_CODEC_CONSTRUCT(REALTEK, 0x0887) +#define HDA_CODEC_ALC888 HDA_CODEC_CONSTRUCT(REALTEK, 0x0888) +#define HDA_CODEC_ALC889 HDA_CODEC_CONSTRUCT(REALTEK, 0x0889) +#define HDA_CODEC_ALC892 HDA_CODEC_CONSTRUCT(REALTEK, 0x0892) +#define HDA_CODEC_ALC897 HDA_CODEC_CONSTRUCT(REALTEK, 0x0897) +#define HDA_CODEC_ALC899 HDA_CODEC_CONSTRUCT(REALTEK, 0x0899) +#define HDA_CODEC_ALC1150 HDA_CODEC_CONSTRUCT(REALTEK, 0x0900) +#define HDA_CODEC_ALCS1200A HDA_CODEC_CONSTRUCT(REALTEK, 0x0b00) +#define HDA_CODEC_ALC1220_1 HDA_CODEC_CONSTRUCT(REALTEK, 0x1168) +#define HDA_CODEC_ALC1220 HDA_CODEC_CONSTRUCT(REALTEK, 0x1220) +#define HDA_CODEC_ALCXXXX HDA_CODEC_CONSTRUCT(REALTEK, 0xffff) /* Motorola */ -#define MOTO_VENDORID 0x1057 -#define HDA_CODEC_MOTOXXXX HDA_CODEC_CONSTRUCT(MOTO, 0xffff) +#define MOTO_VENDORID 0x1057 +#define HDA_CODEC_MOTOXXXX HDA_CODEC_CONSTRUCT(MOTO, 0xffff) /* Creative */ -#define CREATIVE_VENDORID 0x1102 -#define HDA_CODEC_CA0110 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000a) -#define HDA_CODEC_CA0110_2 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000b) -#define HDA_CODEC_SB0880 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000d) -#define HDA_CODEC_CA0132 HDA_CODEC_CONSTRUCT(CREATIVE, 0x0011) -#define HDA_CODEC_CAXXXX HDA_CODEC_CONSTRUCT(CREATIVE, 0xffff) +#define CREATIVE_VENDORID 0x1102 +#define HDA_CODEC_CA0110 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000a) +#define HDA_CODEC_CA0110_2 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000b) +#define HDA_CODEC_SB0880 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000d) +#define HDA_CODEC_CA0132 HDA_CODEC_CONSTRUCT(CREATIVE, 0x0011) +#define HDA_CODEC_CAXXXX HDA_CODEC_CONSTRUCT(CREATIVE, 0xffff) /* Analog Devices */ -#define ANALOGDEVICES_VENDORID 0x11d4 -#define HDA_CODEC_AD1884A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x184a) -#define HDA_CODEC_AD1882 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1882) -#define HDA_CODEC_AD1883 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1883) -#define HDA_CODEC_AD1884 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1884) -#define HDA_CODEC_AD1984A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194a) -#define HDA_CODEC_AD1984B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194b) -#define HDA_CODEC_AD1981HD HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981) -#define HDA_CODEC_AD1983 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983) -#define HDA_CODEC_AD1984 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984) -#define HDA_CODEC_AD1986A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986) -#define HDA_CODEC_AD1987 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1987) -#define HDA_CODEC_AD1988 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988) -#define HDA_CODEC_AD1988B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198b) -#define HDA_CODEC_AD1882A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x882a) -#define HDA_CODEC_AD1989A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x989a) -#define HDA_CODEC_AD1989B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x989b) -#define HDA_CODEC_ADXXXX HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xffff) +#define ANALOGDEVICES_VENDORID 0x11d4 +#define HDA_CODEC_AD1884A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x184a) +#define HDA_CODEC_AD1882 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1882) +#define HDA_CODEC_AD1883 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1883) +#define HDA_CODEC_AD1884 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1884) +#define HDA_CODEC_AD1984A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194a) +#define HDA_CODEC_AD1984B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194b) +#define HDA_CODEC_AD1981HD HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981) +#define HDA_CODEC_AD1983 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983) +#define HDA_CODEC_AD1984 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984) +#define HDA_CODEC_AD1986A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986) +#define HDA_CODEC_AD1987 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1987) +#define HDA_CODEC_AD1988 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988) +#define HDA_CODEC_AD1988B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198b) +#define HDA_CODEC_AD1882A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x882a) +#define HDA_CODEC_AD1989A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x989a) +#define HDA_CODEC_AD1989B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x989b) +#define HDA_CODEC_ADXXXX HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xffff) /* CMedia */ -#define CMEDIA_VENDORID 0x13f6 -#define HDA_CODEC_CMI9880 HDA_CODEC_CONSTRUCT(CMEDIA, 0x9880) -#define HDA_CODEC_CMIXXXX HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff) +#define CMEDIA_VENDORID 0x13f6 +#define HDA_CODEC_CMI9880 HDA_CODEC_CONSTRUCT(CMEDIA, 0x9880) +#define HDA_CODEC_CMIXXXX HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff) -#define CMEDIA2_VENDORID 0x434d -#define HDA_CODEC_CMI98802 HDA_CODEC_CONSTRUCT(CMEDIA2, 0x4980) -#define HDA_CODEC_CMIXXXX2 HDA_CODEC_CONSTRUCT(CMEDIA2, 0xffff) +#define CMEDIA2_VENDORID 0x434d +#define HDA_CODEC_CMI98802 HDA_CODEC_CONSTRUCT(CMEDIA2, 0x4980) +#define HDA_CODEC_CMIXXXX2 HDA_CODEC_CONSTRUCT(CMEDIA2, 0xffff) /* Sigmatel */ -#define SIGMATEL_VENDORID 0x8384 -#define HDA_CODEC_STAC9230X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7612) -#define HDA_CODEC_STAC9230D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7613) -#define HDA_CODEC_STAC9229X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7614) -#define HDA_CODEC_STAC9229D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7615) -#define HDA_CODEC_STAC9228X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7616) -#define HDA_CODEC_STAC9228D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7617) -#define HDA_CODEC_STAC9227X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618) -#define HDA_CODEC_STAC9227D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7619) -#define HDA_CODEC_STAC9274 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7620) -#define HDA_CODEC_STAC9274D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7621) -#define HDA_CODEC_STAC9273X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7622) -#define HDA_CODEC_STAC9273D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7623) -#define HDA_CODEC_STAC9272X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7624) -#define HDA_CODEC_STAC9272D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7625) -#define HDA_CODEC_STAC9271X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7626) -#define HDA_CODEC_STAC9271D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627) -#define HDA_CODEC_STAC9274X5NH HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7628) -#define HDA_CODEC_STAC9274D5NH HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7629) -#define HDA_CODEC_STAC9250 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7634) -#define HDA_CODEC_STAC9251 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7636) -#define HDA_CODEC_IDT92HD700X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7638) -#define HDA_CODEC_IDT92HD700D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7639) -#define HDA_CODEC_IDT92HD206X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7645) -#define HDA_CODEC_IDT92HD206D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7646) -#define HDA_CODEC_CXD9872RDK HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7661) -#define HDA_CODEC_STAC9872AK HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7662) -#define HDA_CODEC_CXD9872AKD HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7664) -#define HDA_CODEC_STAC9221 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680) -#define HDA_CODEC_STAC922XD HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681) -#define HDA_CODEC_STAC9221_A2 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7682) -#define HDA_CODEC_STAC9221D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683) -#define HDA_CODEC_STAC9220 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690) -#define HDA_CODEC_STAC9200D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7691) -#define HDA_CODEC_IDT92HD005 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7698) -#define HDA_CODEC_IDT92HD005D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7699) -#define HDA_CODEC_STAC9205X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a0) -#define HDA_CODEC_STAC9205D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a1) -#define HDA_CODEC_STAC9204X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a2) -#define HDA_CODEC_STAC9204D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a3) -#define HDA_CODEC_STAC9255 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a4) -#define HDA_CODEC_STAC9255D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a5) -#define HDA_CODEC_STAC9254 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a6) -#define HDA_CODEC_STAC9254D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a7) -#define HDA_CODEC_STAC9220_A2 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7880) -#define HDA_CODEC_STAC9220_A1 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7882) -#define HDA_CODEC_STACXXXX HDA_CODEC_CONSTRUCT(SIGMATEL, 0xffff) +#define SIGMATEL_VENDORID 0x8384 +#define HDA_CODEC_STAC9230X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7612) +#define HDA_CODEC_STAC9230D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7613) +#define HDA_CODEC_STAC9229X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7614) +#define HDA_CODEC_STAC9229D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7615) +#define HDA_CODEC_STAC9228X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7616) +#define HDA_CODEC_STAC9228D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7617) +#define HDA_CODEC_STAC9227X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618) +#define HDA_CODEC_STAC9227D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7619) +#define HDA_CODEC_STAC9274 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7620) +#define HDA_CODEC_STAC9274D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7621) +#define HDA_CODEC_STAC9273X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7622) +#define HDA_CODEC_STAC9273D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7623) +#define HDA_CODEC_STAC9272X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7624) +#define HDA_CODEC_STAC9272D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7625) +#define HDA_CODEC_STAC9271X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7626) +#define HDA_CODEC_STAC9271D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627) +#define HDA_CODEC_STAC9274X5NH HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7628) +#define HDA_CODEC_STAC9274D5NH HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7629) +#define HDA_CODEC_STAC9250 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7634) +#define HDA_CODEC_STAC9251 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7636) +#define HDA_CODEC_IDT92HD700X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7638) +#define HDA_CODEC_IDT92HD700D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7639) +#define HDA_CODEC_IDT92HD206X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7645) +#define HDA_CODEC_IDT92HD206D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7646) +#define HDA_CODEC_CXD9872RDK HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7661) +#define HDA_CODEC_STAC9872AK HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7662) +#define HDA_CODEC_CXD9872AKD HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7664) +#define HDA_CODEC_STAC9221 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680) +#define HDA_CODEC_STAC922XD HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681) +#define HDA_CODEC_STAC9221_A2 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7682) +#define HDA_CODEC_STAC9221D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683) +#define HDA_CODEC_STAC9220 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690) +#define HDA_CODEC_STAC9200D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7691) +#define HDA_CODEC_IDT92HD005 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7698) +#define HDA_CODEC_IDT92HD005D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7699) +#define HDA_CODEC_STAC9205X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a0) +#define HDA_CODEC_STAC9205D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a1) +#define HDA_CODEC_STAC9204X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a2) +#define HDA_CODEC_STAC9204D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a3) +#define HDA_CODEC_STAC9255 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a4) +#define HDA_CODEC_STAC9255D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a5) +#define HDA_CODEC_STAC9254 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a6) +#define HDA_CODEC_STAC9254D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a7) +#define HDA_CODEC_STAC9220_A2 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7880) +#define HDA_CODEC_STAC9220_A1 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7882) +#define HDA_CODEC_STACXXXX HDA_CODEC_CONSTRUCT(SIGMATEL, 0xffff) /* IDT / Tempo Semiconductor */ -#define IDT_VENDORID 0x111d -#define HDA_CODEC_IDT92HD75BX HDA_CODEC_CONSTRUCT(IDT, 0x7603) -#define HDA_CODEC_IDT92HD83C1X HDA_CODEC_CONSTRUCT(IDT, 0x7604) -#define HDA_CODEC_IDT92HD81B1X HDA_CODEC_CONSTRUCT(IDT, 0x7605) -#define HDA_CODEC_IDT92HD75B3 HDA_CODEC_CONSTRUCT(IDT, 0x7608) -#define HDA_CODEC_IDT92HD73D1 HDA_CODEC_CONSTRUCT(IDT, 0x7674) -#define HDA_CODEC_IDT92HD73C1 HDA_CODEC_CONSTRUCT(IDT, 0x7675) -#define HDA_CODEC_IDT92HD73E1 HDA_CODEC_CONSTRUCT(IDT, 0x7676) -#define HDA_CODEC_IDT92HD95B HDA_CODEC_CONSTRUCT(IDT, 0x7695) -#define HDA_CODEC_IDT92HD71B8 HDA_CODEC_CONSTRUCT(IDT, 0x76b0) -#define HDA_CODEC_IDT92HD71B8_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b1) -#define HDA_CODEC_IDT92HD71B7 HDA_CODEC_CONSTRUCT(IDT, 0x76b2) -#define HDA_CODEC_IDT92HD71B7_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b3) -#define HDA_CODEC_IDT92HD71B6 HDA_CODEC_CONSTRUCT(IDT, 0x76b4) -#define HDA_CODEC_IDT92HD71B6_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b5) -#define HDA_CODEC_IDT92HD71B5 HDA_CODEC_CONSTRUCT(IDT, 0x76b6) -#define HDA_CODEC_IDT92HD71B5_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b7) -#define HDA_CODEC_IDT92HD89C3 HDA_CODEC_CONSTRUCT(IDT, 0x76c0) -#define HDA_CODEC_IDT92HD89C2 HDA_CODEC_CONSTRUCT(IDT, 0x76c1) -#define HDA_CODEC_IDT92HD89C1 HDA_CODEC_CONSTRUCT(IDT, 0x76c2) -#define HDA_CODEC_IDT92HD89B3 HDA_CODEC_CONSTRUCT(IDT, 0x76c3) -#define HDA_CODEC_IDT92HD89B2 HDA_CODEC_CONSTRUCT(IDT, 0x76c4) -#define HDA_CODEC_IDT92HD89B1 HDA_CODEC_CONSTRUCT(IDT, 0x76c5) -#define HDA_CODEC_IDT92HD89E3 HDA_CODEC_CONSTRUCT(IDT, 0x76c6) -#define HDA_CODEC_IDT92HD89E2 HDA_CODEC_CONSTRUCT(IDT, 0x76c7) -#define HDA_CODEC_IDT92HD89E1 HDA_CODEC_CONSTRUCT(IDT, 0x76c8) -#define HDA_CODEC_IDT92HD89D3 HDA_CODEC_CONSTRUCT(IDT, 0x76c9) -#define HDA_CODEC_IDT92HD89D2 HDA_CODEC_CONSTRUCT(IDT, 0x76ca) -#define HDA_CODEC_IDT92HD89D1 HDA_CODEC_CONSTRUCT(IDT, 0x76cb) -#define HDA_CODEC_IDT92HD89F3 HDA_CODEC_CONSTRUCT(IDT, 0x76cc) -#define HDA_CODEC_IDT92HD89F2 HDA_CODEC_CONSTRUCT(IDT, 0x76cd) -#define HDA_CODEC_IDT92HD89F1 HDA_CODEC_CONSTRUCT(IDT, 0x76ce) -#define HDA_CODEC_IDT92HD87B1_3 HDA_CODEC_CONSTRUCT(IDT, 0x76d1) -#define HDA_CODEC_IDT92HD83C1C HDA_CODEC_CONSTRUCT(IDT, 0x76d4) -#define HDA_CODEC_IDT92HD81B1C HDA_CODEC_CONSTRUCT(IDT, 0x76d5) -#define HDA_CODEC_IDT92HD87B2_4 HDA_CODEC_CONSTRUCT(IDT, 0x76d9) -#define HDA_CODEC_IDT92HD93BXX HDA_CODEC_CONSTRUCT(IDT, 0x76df) -#define HDA_CODEC_IDT92HD91BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e0) -#define HDA_CODEC_IDT92HD98BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e3) -#define HDA_CODEC_IDT92HD99BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e5) -#define HDA_CODEC_IDT92HD90BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e7) -#define HDA_CODEC_IDT92HD66B1X5 HDA_CODEC_CONSTRUCT(IDT, 0x76e8) -#define HDA_CODEC_IDT92HD66B2X5 HDA_CODEC_CONSTRUCT(IDT, 0x76e9) -#define HDA_CODEC_IDT92HD66B3X5 HDA_CODEC_CONSTRUCT(IDT, 0x76ea) -#define HDA_CODEC_IDT92HD66C1X5 HDA_CODEC_CONSTRUCT(IDT, 0x76eb) -#define HDA_CODEC_IDT92HD66C2X5 HDA_CODEC_CONSTRUCT(IDT, 0x76ec) -#define HDA_CODEC_IDT92HD66C3X5 HDA_CODEC_CONSTRUCT(IDT, 0x76ed) -#define HDA_CODEC_IDT92HD66B1X3 HDA_CODEC_CONSTRUCT(IDT, 0x76ee) -#define HDA_CODEC_IDT92HD66B2X3 HDA_CODEC_CONSTRUCT(IDT, 0x76ef) -#define HDA_CODEC_IDT92HD66B3X3 HDA_CODEC_CONSTRUCT(IDT, 0x76f0) -#define HDA_CODEC_IDT92HD66C1X3 HDA_CODEC_CONSTRUCT(IDT, 0x76f1) -#define HDA_CODEC_IDT92HD66C2X3 HDA_CODEC_CONSTRUCT(IDT, 0x76f2) -#define HDA_CODEC_IDT92HD66C3_65 HDA_CODEC_CONSTRUCT(IDT, 0x76f3) -#define HDA_CODEC_IDTXXXX HDA_CODEC_CONSTRUCT(IDT, 0xffff) +#define IDT_VENDORID 0x111d +#define HDA_CODEC_IDT92HD75BX HDA_CODEC_CONSTRUCT(IDT, 0x7603) +#define HDA_CODEC_IDT92HD83C1X HDA_CODEC_CONSTRUCT(IDT, 0x7604) +#define HDA_CODEC_IDT92HD81B1X HDA_CODEC_CONSTRUCT(IDT, 0x7605) +#define HDA_CODEC_IDT92HD75B3 HDA_CODEC_CONSTRUCT(IDT, 0x7608) +#define HDA_CODEC_IDT92HD73D1 HDA_CODEC_CONSTRUCT(IDT, 0x7674) +#define HDA_CODEC_IDT92HD73C1 HDA_CODEC_CONSTRUCT(IDT, 0x7675) +#define HDA_CODEC_IDT92HD73E1 HDA_CODEC_CONSTRUCT(IDT, 0x7676) +#define HDA_CODEC_IDT92HD95B HDA_CODEC_CONSTRUCT(IDT, 0x7695) +#define HDA_CODEC_IDT92HD71B8 HDA_CODEC_CONSTRUCT(IDT, 0x76b0) +#define HDA_CODEC_IDT92HD71B8_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b1) +#define HDA_CODEC_IDT92HD71B7 HDA_CODEC_CONSTRUCT(IDT, 0x76b2) +#define HDA_CODEC_IDT92HD71B7_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b3) +#define HDA_CODEC_IDT92HD71B6 HDA_CODEC_CONSTRUCT(IDT, 0x76b4) +#define HDA_CODEC_IDT92HD71B6_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b5) +#define HDA_CODEC_IDT92HD71B5 HDA_CODEC_CONSTRUCT(IDT, 0x76b6) +#define HDA_CODEC_IDT92HD71B5_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b7) +#define HDA_CODEC_IDT92HD89C3 HDA_CODEC_CONSTRUCT(IDT, 0x76c0) +#define HDA_CODEC_IDT92HD89C2 HDA_CODEC_CONSTRUCT(IDT, 0x76c1) +#define HDA_CODEC_IDT92HD89C1 HDA_CODEC_CONSTRUCT(IDT, 0x76c2) +#define HDA_CODEC_IDT92HD89B3 HDA_CODEC_CONSTRUCT(IDT, 0x76c3) +#define HDA_CODEC_IDT92HD89B2 HDA_CODEC_CONSTRUCT(IDT, 0x76c4) +#define HDA_CODEC_IDT92HD89B1 HDA_CODEC_CONSTRUCT(IDT, 0x76c5) +#define HDA_CODEC_IDT92HD89E3 HDA_CODEC_CONSTRUCT(IDT, 0x76c6) +#define HDA_CODEC_IDT92HD89E2 HDA_CODEC_CONSTRUCT(IDT, 0x76c7) +#define HDA_CODEC_IDT92HD89E1 HDA_CODEC_CONSTRUCT(IDT, 0x76c8) +#define HDA_CODEC_IDT92HD89D3 HDA_CODEC_CONSTRUCT(IDT, 0x76c9) +#define HDA_CODEC_IDT92HD89D2 HDA_CODEC_CONSTRUCT(IDT, 0x76ca) +#define HDA_CODEC_IDT92HD89D1 HDA_CODEC_CONSTRUCT(IDT, 0x76cb) +#define HDA_CODEC_IDT92HD89F3 HDA_CODEC_CONSTRUCT(IDT, 0x76cc) +#define HDA_CODEC_IDT92HD89F2 HDA_CODEC_CONSTRUCT(IDT, 0x76cd) +#define HDA_CODEC_IDT92HD89F1 HDA_CODEC_CONSTRUCT(IDT, 0x76ce) +#define HDA_CODEC_IDT92HD87B1_3 HDA_CODEC_CONSTRUCT(IDT, 0x76d1) +#define HDA_CODEC_IDT92HD83C1C HDA_CODEC_CONSTRUCT(IDT, 0x76d4) +#define HDA_CODEC_IDT92HD81B1C HDA_CODEC_CONSTRUCT(IDT, 0x76d5) +#define HDA_CODEC_IDT92HD87B2_4 HDA_CODEC_CONSTRUCT(IDT, 0x76d9) +#define HDA_CODEC_IDT92HD93BXX HDA_CODEC_CONSTRUCT(IDT, 0x76df) +#define HDA_CODEC_IDT92HD91BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e0) +#define HDA_CODEC_IDT92HD98BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e3) +#define HDA_CODEC_IDT92HD99BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e5) +#define HDA_CODEC_IDT92HD90BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e7) +#define HDA_CODEC_IDT92HD66B1X5 HDA_CODEC_CONSTRUCT(IDT, 0x76e8) +#define HDA_CODEC_IDT92HD66B2X5 HDA_CODEC_CONSTRUCT(IDT, 0x76e9) +#define HDA_CODEC_IDT92HD66B3X5 HDA_CODEC_CONSTRUCT(IDT, 0x76ea) +#define HDA_CODEC_IDT92HD66C1X5 HDA_CODEC_CONSTRUCT(IDT, 0x76eb) +#define HDA_CODEC_IDT92HD66C2X5 HDA_CODEC_CONSTRUCT(IDT, 0x76ec) +#define HDA_CODEC_IDT92HD66C3X5 HDA_CODEC_CONSTRUCT(IDT, 0x76ed) +#define HDA_CODEC_IDT92HD66B1X3 HDA_CODEC_CONSTRUCT(IDT, 0x76ee) +#define HDA_CODEC_IDT92HD66B2X3 HDA_CODEC_CONSTRUCT(IDT, 0x76ef) +#define HDA_CODEC_IDT92HD66B3X3 HDA_CODEC_CONSTRUCT(IDT, 0x76f0) +#define HDA_CODEC_IDT92HD66C1X3 HDA_CODEC_CONSTRUCT(IDT, 0x76f1) +#define HDA_CODEC_IDT92HD66C2X3 HDA_CODEC_CONSTRUCT(IDT, 0x76f2) +#define HDA_CODEC_IDT92HD66C3_65 HDA_CODEC_CONSTRUCT(IDT, 0x76f3) +#define HDA_CODEC_IDTXXXX HDA_CODEC_CONSTRUCT(IDT, 0xffff) /* Silicon Image */ -#define SII_VENDORID 0x1095 -#define HDA_CODEC_SII1390 HDA_CODEC_CONSTRUCT(SII, 0x1390) -#define HDA_CODEC_SII1392 HDA_CODEC_CONSTRUCT(SII, 0x1392) -#define HDA_CODEC_SIIXXXX HDA_CODEC_CONSTRUCT(SII, 0xffff) +#define SII_VENDORID 0x1095 +#define HDA_CODEC_SII1390 HDA_CODEC_CONSTRUCT(SII, 0x1390) +#define HDA_CODEC_SII1392 HDA_CODEC_CONSTRUCT(SII, 0x1392) +#define HDA_CODEC_SIIXXXX HDA_CODEC_CONSTRUCT(SII, 0xffff) /* Lucent/Agere */ -#define AGERE_VENDORID 0x11c1 -#define HDA_CODEC_AGEREXXXX HDA_CODEC_CONSTRUCT(AGERE, 0xffff) +#define AGERE_VENDORID 0x11c1 +#define HDA_CODEC_AGEREXXXX HDA_CODEC_CONSTRUCT(AGERE, 0xffff) /* Conexant */ -#define CONEXANT_VENDORID 0x14f1 -#define HDA_CODEC_CX20549 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045) -#define HDA_CODEC_CX20551 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047) -#define HDA_CODEC_CX20561 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5051) -#define HDA_CODEC_CX20582 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5066) -#define HDA_CODEC_CX20583 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5067) -#define HDA_CODEC_CX20584 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5068) -#define HDA_CODEC_CX20585 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5069) -#define HDA_CODEC_CX20588 HDA_CODEC_CONSTRUCT(CONEXANT, 0x506c) -#define HDA_CODEC_CX20590 HDA_CODEC_CONSTRUCT(CONEXANT, 0x506e) -#define HDA_CODEC_CX20631 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5097) -#define HDA_CODEC_CX20632 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5098) -#define HDA_CODEC_CX20641 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50a1) -#define HDA_CODEC_CX20642 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50a2) -#define HDA_CODEC_CX20651 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50ab) -#define HDA_CODEC_CX20652 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50ac) -#define HDA_CODEC_CX20664 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50b8) -#define HDA_CODEC_CX20665 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50b9) -#define HDA_CODEC_CX21722 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50f1) -#define HDA_CODEC_CX20722 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50f2) -#define HDA_CODEC_CX21724 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50f3) -#define HDA_CODEC_CX20724 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50f4) -#define HDA_CODEC_CX20751 HDA_CODEC_CONSTRUCT(CONEXANT, 0x510f) -#define HDA_CODEC_CX20751_2 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5110) -#define HDA_CODEC_CX20753 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5111) -#define HDA_CODEC_CX20755 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5113) -#define HDA_CODEC_CX20756 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5114) -#define HDA_CODEC_CX20757 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5115) -#define HDA_CODEC_CX20952 HDA_CODEC_CONSTRUCT(CONEXANT, 0x51d7) -#define HDA_CODEC_CXXXXX HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff) +#define CONEXANT_VENDORID 0x14f1 +#define HDA_CODEC_CX20549 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045) +#define HDA_CODEC_CX20551 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047) +#define HDA_CODEC_CX20561 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5051) +#define HDA_CODEC_CX20582 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5066) +#define HDA_CODEC_CX20583 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5067) +#define HDA_CODEC_CX20584 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5068) +#define HDA_CODEC_CX20585 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5069) +#define HDA_CODEC_CX20588 HDA_CODEC_CONSTRUCT(CONEXANT, 0x506c) +#define HDA_CODEC_CX20590 HDA_CODEC_CONSTRUCT(CONEXANT, 0x506e) +#define HDA_CODEC_CX20631 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5097) +#define HDA_CODEC_CX20632 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5098) +#define HDA_CODEC_CX20641 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50a1) +#define HDA_CODEC_CX20642 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50a2) +#define HDA_CODEC_CX20651 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50ab) +#define HDA_CODEC_CX20652 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50ac) +#define HDA_CODEC_CX20664 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50b8) +#define HDA_CODEC_CX20665 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50b9) +#define HDA_CODEC_CX21722 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50f1) +#define HDA_CODEC_CX20722 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50f2) +#define HDA_CODEC_CX21724 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50f3) +#define HDA_CODEC_CX20724 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50f4) +#define HDA_CODEC_CX20751 HDA_CODEC_CONSTRUCT(CONEXANT, 0x510f) +#define HDA_CODEC_CX20751_2 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5110) +#define HDA_CODEC_CX20753 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5111) +#define HDA_CODEC_CX20755 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5113) +#define HDA_CODEC_CX20756 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5114) +#define HDA_CODEC_CX20757 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5115) +#define HDA_CODEC_CX20952 HDA_CODEC_CONSTRUCT(CONEXANT, 0x51d7) +#define HDA_CODEC_CXXXXX HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff) /* VIA */ -#define HDA_CODEC_VT1708_8 HDA_CODEC_CONSTRUCT(VIA, 0x1708) -#define HDA_CODEC_VT1708_9 HDA_CODEC_CONSTRUCT(VIA, 0x1709) -#define HDA_CODEC_VT1708_A HDA_CODEC_CONSTRUCT(VIA, 0x170a) -#define HDA_CODEC_VT1708_B HDA_CODEC_CONSTRUCT(VIA, 0x170b) -#define HDA_CODEC_VT1709_0 HDA_CODEC_CONSTRUCT(VIA, 0xe710) -#define HDA_CODEC_VT1709_1 HDA_CODEC_CONSTRUCT(VIA, 0xe711) -#define HDA_CODEC_VT1709_2 HDA_CODEC_CONSTRUCT(VIA, 0xe712) -#define HDA_CODEC_VT1709_3 HDA_CODEC_CONSTRUCT(VIA, 0xe713) -#define HDA_CODEC_VT1709_4 HDA_CODEC_CONSTRUCT(VIA, 0xe714) -#define HDA_CODEC_VT1709_5 HDA_CODEC_CONSTRUCT(VIA, 0xe715) -#define HDA_CODEC_VT1709_6 HDA_CODEC_CONSTRUCT(VIA, 0xe716) -#define HDA_CODEC_VT1709_7 HDA_CODEC_CONSTRUCT(VIA, 0xe717) -#define HDA_CODEC_VT1708B_0 HDA_CODEC_CONSTRUCT(VIA, 0xe720) -#define HDA_CODEC_VT1708B_1 HDA_CODEC_CONSTRUCT(VIA, 0xe721) -#define HDA_CODEC_VT1708B_2 HDA_CODEC_CONSTRUCT(VIA, 0xe722) -#define HDA_CODEC_VT1708B_3 HDA_CODEC_CONSTRUCT(VIA, 0xe723) -#define HDA_CODEC_VT1708B_4 HDA_CODEC_CONSTRUCT(VIA, 0xe724) -#define HDA_CODEC_VT1708B_5 HDA_CODEC_CONSTRUCT(VIA, 0xe725) -#define HDA_CODEC_VT1708B_6 HDA_CODEC_CONSTRUCT(VIA, 0xe726) -#define HDA_CODEC_VT1708B_7 HDA_CODEC_CONSTRUCT(VIA, 0xe727) -#define HDA_CODEC_VT1708S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0397) -#define HDA_CODEC_VT1708S_1 HDA_CODEC_CONSTRUCT(VIA, 0x1397) -#define HDA_CODEC_VT1708S_2 HDA_CODEC_CONSTRUCT(VIA, 0x2397) -#define HDA_CODEC_VT1708S_3 HDA_CODEC_CONSTRUCT(VIA, 0x3397) -#define HDA_CODEC_VT1708S_4 HDA_CODEC_CONSTRUCT(VIA, 0x4397) -#define HDA_CODEC_VT1708S_5 HDA_CODEC_CONSTRUCT(VIA, 0x5397) -#define HDA_CODEC_VT1708S_6 HDA_CODEC_CONSTRUCT(VIA, 0x6397) -#define HDA_CODEC_VT1708S_7 HDA_CODEC_CONSTRUCT(VIA, 0x7397) -#define HDA_CODEC_VT1702_0 HDA_CODEC_CONSTRUCT(VIA, 0x0398) -#define HDA_CODEC_VT1702_1 HDA_CODEC_CONSTRUCT(VIA, 0x1398) -#define HDA_CODEC_VT1702_2 HDA_CODEC_CONSTRUCT(VIA, 0x2398) -#define HDA_CODEC_VT1702_3 HDA_CODEC_CONSTRUCT(VIA, 0x3398) -#define HDA_CODEC_VT1702_4 HDA_CODEC_CONSTRUCT(VIA, 0x4398) -#define HDA_CODEC_VT1702_5 HDA_CODEC_CONSTRUCT(VIA, 0x5398) -#define HDA_CODEC_VT1702_6 HDA_CODEC_CONSTRUCT(VIA, 0x6398) -#define HDA_CODEC_VT1702_7 HDA_CODEC_CONSTRUCT(VIA, 0x7398) -#define HDA_CODEC_VT1716S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0433) -#define HDA_CODEC_VT1716S_1 HDA_CODEC_CONSTRUCT(VIA, 0xa721) -#define HDA_CODEC_VT1718S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0428) -#define HDA_CODEC_VT1718S_1 HDA_CODEC_CONSTRUCT(VIA, 0x4428) -#define HDA_CODEC_VT1802_0 HDA_CODEC_CONSTRUCT(VIA, 0x0446) -#define HDA_CODEC_VT1802_1 HDA_CODEC_CONSTRUCT(VIA, 0x8446) -#define HDA_CODEC_VT1812 HDA_CODEC_CONSTRUCT(VIA, 0x0448) -#define HDA_CODEC_VT1818S HDA_CODEC_CONSTRUCT(VIA, 0x0440) -#define HDA_CODEC_VT1828S HDA_CODEC_CONSTRUCT(VIA, 0x4441) -#define HDA_CODEC_VT2002P_0 HDA_CODEC_CONSTRUCT(VIA, 0x0438) -#define HDA_CODEC_VT2002P_1 HDA_CODEC_CONSTRUCT(VIA, 0x4438) -#define HDA_CODEC_VT2020 HDA_CODEC_CONSTRUCT(VIA, 0x0441) -#define HDA_CODEC_VTXXXX HDA_CODEC_CONSTRUCT(VIA, 0xffff) +#define HDA_CODEC_VT1708_8 HDA_CODEC_CONSTRUCT(VIA, 0x1708) +#define HDA_CODEC_VT1708_9 HDA_CODEC_CONSTRUCT(VIA, 0x1709) +#define HDA_CODEC_VT1708_A HDA_CODEC_CONSTRUCT(VIA, 0x170a) +#define HDA_CODEC_VT1708_B HDA_CODEC_CONSTRUCT(VIA, 0x170b) +#define HDA_CODEC_VT1709_0 HDA_CODEC_CONSTRUCT(VIA, 0xe710) +#define HDA_CODEC_VT1709_1 HDA_CODEC_CONSTRUCT(VIA, 0xe711) +#define HDA_CODEC_VT1709_2 HDA_CODEC_CONSTRUCT(VIA, 0xe712) +#define HDA_CODEC_VT1709_3 HDA_CODEC_CONSTRUCT(VIA, 0xe713) +#define HDA_CODEC_VT1709_4 HDA_CODEC_CONSTRUCT(VIA, 0xe714) +#define HDA_CODEC_VT1709_5 HDA_CODEC_CONSTRUCT(VIA, 0xe715) +#define HDA_CODEC_VT1709_6 HDA_CODEC_CONSTRUCT(VIA, 0xe716) +#define HDA_CODEC_VT1709_7 HDA_CODEC_CONSTRUCT(VIA, 0xe717) +#define HDA_CODEC_VT1708B_0 HDA_CODEC_CONSTRUCT(VIA, 0xe720) +#define HDA_CODEC_VT1708B_1 HDA_CODEC_CONSTRUCT(VIA, 0xe721) +#define HDA_CODEC_VT1708B_2 HDA_CODEC_CONSTRUCT(VIA, 0xe722) +#define HDA_CODEC_VT1708B_3 HDA_CODEC_CONSTRUCT(VIA, 0xe723) +#define HDA_CODEC_VT1708B_4 HDA_CODEC_CONSTRUCT(VIA, 0xe724) +#define HDA_CODEC_VT1708B_5 HDA_CODEC_CONSTRUCT(VIA, 0xe725) +#define HDA_CODEC_VT1708B_6 HDA_CODEC_CONSTRUCT(VIA, 0xe726) +#define HDA_CODEC_VT1708B_7 HDA_CODEC_CONSTRUCT(VIA, 0xe727) +#define HDA_CODEC_VT1708S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0397) +#define HDA_CODEC_VT1708S_1 HDA_CODEC_CONSTRUCT(VIA, 0x1397) +#define HDA_CODEC_VT1708S_2 HDA_CODEC_CONSTRUCT(VIA, 0x2397) +#define HDA_CODEC_VT1708S_3 HDA_CODEC_CONSTRUCT(VIA, 0x3397) +#define HDA_CODEC_VT1708S_4 HDA_CODEC_CONSTRUCT(VIA, 0x4397) +#define HDA_CODEC_VT1708S_5 HDA_CODEC_CONSTRUCT(VIA, 0x5397) +#define HDA_CODEC_VT1708S_6 HDA_CODEC_CONSTRUCT(VIA, 0x6397) +#define HDA_CODEC_VT1708S_7 HDA_CODEC_CONSTRUCT(VIA, 0x7397) +#define HDA_CODEC_VT1702_0 HDA_CODEC_CONSTRUCT(VIA, 0x0398) +#define HDA_CODEC_VT1702_1 HDA_CODEC_CONSTRUCT(VIA, 0x1398) +#define HDA_CODEC_VT1702_2 HDA_CODEC_CONSTRUCT(VIA, 0x2398) +#define HDA_CODEC_VT1702_3 HDA_CODEC_CONSTRUCT(VIA, 0x3398) +#define HDA_CODEC_VT1702_4 HDA_CODEC_CONSTRUCT(VIA, 0x4398) +#define HDA_CODEC_VT1702_5 HDA_CODEC_CONSTRUCT(VIA, 0x5398) +#define HDA_CODEC_VT1702_6 HDA_CODEC_CONSTRUCT(VIA, 0x6398) +#define HDA_CODEC_VT1702_7 HDA_CODEC_CONSTRUCT(VIA, 0x7398) +#define HDA_CODEC_VT1716S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0433) +#define HDA_CODEC_VT1716S_1 HDA_CODEC_CONSTRUCT(VIA, 0xa721) +#define HDA_CODEC_VT1718S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0428) +#define HDA_CODEC_VT1718S_1 HDA_CODEC_CONSTRUCT(VIA, 0x4428) +#define HDA_CODEC_VT1802_0 HDA_CODEC_CONSTRUCT(VIA, 0x0446) +#define HDA_CODEC_VT1802_1 HDA_CODEC_CONSTRUCT(VIA, 0x8446) +#define HDA_CODEC_VT1812 HDA_CODEC_CONSTRUCT(VIA, 0x0448) +#define HDA_CODEC_VT1818S HDA_CODEC_CONSTRUCT(VIA, 0x0440) +#define HDA_CODEC_VT1828S HDA_CODEC_CONSTRUCT(VIA, 0x4441) +#define HDA_CODEC_VT2002P_0 HDA_CODEC_CONSTRUCT(VIA, 0x0438) +#define HDA_CODEC_VT2002P_1 HDA_CODEC_CONSTRUCT(VIA, 0x4438) +#define HDA_CODEC_VT2020 HDA_CODEC_CONSTRUCT(VIA, 0x0441) +#define HDA_CODEC_VTXXXX HDA_CODEC_CONSTRUCT(VIA, 0xffff) /* VMware */ -#define HDA_CODEC_VMWARE HDA_CODEC_CONSTRUCT(VMWARE, 0x1975) -#define HDA_CODEC_VMWAREXXXX HDA_CODEC_CONSTRUCT(VMWARE, 0xffff) +#define HDA_CODEC_VMWARE HDA_CODEC_CONSTRUCT(VMWARE, 0x1975) +#define HDA_CODEC_VMWAREXXXX HDA_CODEC_CONSTRUCT(VMWARE, 0xffff) /* ATI */ -#define HDA_CODEC_ATIRS600_1 HDA_CODEC_CONSTRUCT(ATI, 0x793c) -#define HDA_CODEC_ATIRS600_2 HDA_CODEC_CONSTRUCT(ATI, 0x7919) -#define HDA_CODEC_ATIRS690 HDA_CODEC_CONSTRUCT(ATI, 0x791a) -#define HDA_CODEC_ATIR6XX HDA_CODEC_CONSTRUCT(ATI, 0xaa01) -#define HDA_CODEC_ATIXXXX HDA_CODEC_CONSTRUCT(ATI, 0xffff) +#define HDA_CODEC_ATIRS600_1 HDA_CODEC_CONSTRUCT(ATI, 0x793c) +#define HDA_CODEC_ATIRS600_2 HDA_CODEC_CONSTRUCT(ATI, 0x7919) +#define HDA_CODEC_ATIRS690 HDA_CODEC_CONSTRUCT(ATI, 0x791a) +#define HDA_CODEC_ATIR6XX HDA_CODEC_CONSTRUCT(ATI, 0xaa01) +#define HDA_CODEC_ATIXXXX HDA_CODEC_CONSTRUCT(ATI, 0xffff) /* NVIDIA */ -#define HDA_CODEC_NVIDIAMCP78 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0002) -#define HDA_CODEC_NVIDIAMCP78_2 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0003) -#define HDA_CODEC_NVIDIAMCP78_3 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0005) -#define HDA_CODEC_NVIDIAMCP78_4 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0006) -#define HDA_CODEC_NVIDIAMCP7A HDA_CODEC_CONSTRUCT(NVIDIA, 0x0007) -#define HDA_CODEC_NVIDIAGT220 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000a) -#define HDA_CODEC_NVIDIAGT21X HDA_CODEC_CONSTRUCT(NVIDIA, 0x000b) -#define HDA_CODEC_NVIDIAMCP89 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000c) -#define HDA_CODEC_NVIDIAGT240 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000d) -#define HDA_CODEC_NVIDIAGTS450 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0011) -#define HDA_CODEC_NVIDIAGT440 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0014) -#define HDA_CODEC_NVIDIAGTX550 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0015) -#define HDA_CODEC_NVIDIAGTX570 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0018) -#define HDA_CODEC_NVIDIATEGRA30 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0020) +#define HDA_CODEC_NVIDIAMCP78 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0002) +#define HDA_CODEC_NVIDIAMCP78_2 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0003) +#define HDA_CODEC_NVIDIAMCP78_3 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0005) +#define HDA_CODEC_NVIDIAMCP78_4 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0006) +#define HDA_CODEC_NVIDIAMCP7A HDA_CODEC_CONSTRUCT(NVIDIA, 0x0007) +#define HDA_CODEC_NVIDIAGT220 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000a) +#define HDA_CODEC_NVIDIAGT21X HDA_CODEC_CONSTRUCT(NVIDIA, 0x000b) +#define HDA_CODEC_NVIDIAMCP89 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000c) +#define HDA_CODEC_NVIDIAGT240 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000d) +#define HDA_CODEC_NVIDIAGTS450 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0011) +#define HDA_CODEC_NVIDIAGT440 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0014) +#define HDA_CODEC_NVIDIAGTX550 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0015) +#define HDA_CODEC_NVIDIAGTX570 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0018) +#define HDA_CODEC_NVIDIATEGRA30 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0020) #define HDA_CODEC_NVIDIATEGRA114 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0022) #define HDA_CODEC_NVIDIATEGRA124 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0028) #define HDA_CODEC_NVIDIATEGRA210 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0029) -#define HDA_CODEC_NVIDIAMCP67 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0067) -#define HDA_CODEC_NVIDIAMCP73 HDA_CODEC_CONSTRUCT(NVIDIA, 0x8001) -#define HDA_CODEC_NVIDIAXXXX HDA_CODEC_CONSTRUCT(NVIDIA, 0xffff) +#define HDA_CODEC_NVIDIAMCP67 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0067) +#define HDA_CODEC_NVIDIAMCP73 HDA_CODEC_CONSTRUCT(NVIDIA, 0x8001) +#define HDA_CODEC_NVIDIAXXXX HDA_CODEC_CONSTRUCT(NVIDIA, 0xffff) /* Chrontel */ -#define CHRONTEL_VENDORID 0x17e8 -#define HDA_CODEC_CHXXXX HDA_CODEC_CONSTRUCT(CHRONTEL, 0xffff) +#define CHRONTEL_VENDORID 0x17e8 +#define HDA_CODEC_CHXXXX HDA_CODEC_CONSTRUCT(CHRONTEL, 0xffff) /* INTEL */ -#define HDA_CODEC_INTELIP HDA_CODEC_CONSTRUCT(INTEL, 0x0054) -#define HDA_CODEC_INTELGMLK HDA_CODEC_CONSTRUCT(INTEL, 0x2800) -#define HDA_CODEC_INTELBL HDA_CODEC_CONSTRUCT(INTEL, 0x2801) -#define HDA_CODEC_INTELCA HDA_CODEC_CONSTRUCT(INTEL, 0x2802) -#define HDA_CODEC_INTELEL HDA_CODEC_CONSTRUCT(INTEL, 0x2803) -#define HDA_CODEC_INTELIP2 HDA_CODEC_CONSTRUCT(INTEL, 0x2804) -#define HDA_CODEC_INTELCPT HDA_CODEC_CONSTRUCT(INTEL, 0x2805) -#define HDA_CODEC_INTELPPT HDA_CODEC_CONSTRUCT(INTEL, 0x2806) -#define HDA_CODEC_INTELHSW HDA_CODEC_CONSTRUCT(INTEL, 0x2807) -#define HDA_CODEC_INTELBDW HDA_CODEC_CONSTRUCT(INTEL, 0x2808) -#define HDA_CODEC_INTELSKLK HDA_CODEC_CONSTRUCT(INTEL, 0x2809) -#define HDA_CODEC_INTELBXTN HDA_CODEC_CONSTRUCT(INTEL, 0x280a) -#define HDA_CODEC_INTELKBLK HDA_CODEC_CONSTRUCT(INTEL, 0x280b) -#define HDA_CODEC_INTELCNLK HDA_CODEC_CONSTRUCT(INTEL, 0x280c) -#define HDA_CODEC_INTELGMLK1 HDA_CODEC_CONSTRUCT(INTEL, 0x280d) -#define HDA_CODEC_INTELICLK HDA_CODEC_CONSTRUCT(INTEL, 0x280f) -#define HDA_CODEC_INTELTGLK HDA_CODEC_CONSTRUCT(INTEL, 0x2812) -#define HDA_CODEC_INTELALLK HDA_CODEC_CONSTRUCT(INTEL, 0x2815) -#define HDA_CODEC_INTELJLK HDA_CODEC_CONSTRUCT(INTEL, 0x281a) -#define HDA_CODEC_INTELELLK HDA_CODEC_CONSTRUCT(INTEL, 0x281b) -#define HDA_CODEC_INTELCT HDA_CODEC_CONSTRUCT(INTEL, 0x2880) -#define HDA_CODEC_INTELVV2 HDA_CODEC_CONSTRUCT(INTEL, 0x2882) -#define HDA_CODEC_INTELBR HDA_CODEC_CONSTRUCT(INTEL, 0x2883) -#define HDA_CODEC_INTELCL HDA_CODEC_CONSTRUCT(INTEL, 0x29fb) -#define HDA_CODEC_INTELXXXX HDA_CODEC_CONSTRUCT(INTEL, 0xffff) +#define HDA_CODEC_INTELIP HDA_CODEC_CONSTRUCT(INTEL, 0x0054) +#define HDA_CODEC_INTELGMLK HDA_CODEC_CONSTRUCT(INTEL, 0x2800) +#define HDA_CODEC_INTELBL HDA_CODEC_CONSTRUCT(INTEL, 0x2801) +#define HDA_CODEC_INTELCA HDA_CODEC_CONSTRUCT(INTEL, 0x2802) +#define HDA_CODEC_INTELEL HDA_CODEC_CONSTRUCT(INTEL, 0x2803) +#define HDA_CODEC_INTELIP2 HDA_CODEC_CONSTRUCT(INTEL, 0x2804) +#define HDA_CODEC_INTELCPT HDA_CODEC_CONSTRUCT(INTEL, 0x2805) +#define HDA_CODEC_INTELPPT HDA_CODEC_CONSTRUCT(INTEL, 0x2806) +#define HDA_CODEC_INTELHSW HDA_CODEC_CONSTRUCT(INTEL, 0x2807) +#define HDA_CODEC_INTELBDW HDA_CODEC_CONSTRUCT(INTEL, 0x2808) +#define HDA_CODEC_INTELSKLK HDA_CODEC_CONSTRUCT(INTEL, 0x2809) +#define HDA_CODEC_INTELBXTN HDA_CODEC_CONSTRUCT(INTEL, 0x280a) +#define HDA_CODEC_INTELKBLK HDA_CODEC_CONSTRUCT(INTEL, 0x280b) +#define HDA_CODEC_INTELCNLK HDA_CODEC_CONSTRUCT(INTEL, 0x280c) +#define HDA_CODEC_INTELGMLK1 HDA_CODEC_CONSTRUCT(INTEL, 0x280d) +#define HDA_CODEC_INTELICLK HDA_CODEC_CONSTRUCT(INTEL, 0x280f) +#define HDA_CODEC_INTELTGLK HDA_CODEC_CONSTRUCT(INTEL, 0x2812) +#define HDA_CODEC_INTELALLK HDA_CODEC_CONSTRUCT(INTEL, 0x2815) +#define HDA_CODEC_INTELJLK HDA_CODEC_CONSTRUCT(INTEL, 0x281a) +#define HDA_CODEC_INTELELLK HDA_CODEC_CONSTRUCT(INTEL, 0x281b) +#define HDA_CODEC_INTELCT HDA_CODEC_CONSTRUCT(INTEL, 0x2880) +#define HDA_CODEC_INTELVV2 HDA_CODEC_CONSTRUCT(INTEL, 0x2882) +#define HDA_CODEC_INTELBR HDA_CODEC_CONSTRUCT(INTEL, 0x2883) +#define HDA_CODEC_INTELCL HDA_CODEC_CONSTRUCT(INTEL, 0x29fb) +#define HDA_CODEC_INTELXXXX HDA_CODEC_CONSTRUCT(INTEL, 0xffff) /**************************************************************************** * Helper Macros ****************************************************************************/ -#define HDA_DMA_ALIGNMENT 128 +#define HDA_DMA_ALIGNMENT 128 -#define HDA_BDL_MIN 2 -#define HDA_BDL_MAX 256 -#define HDA_BDL_DEFAULT HDA_BDL_MIN +#define HDA_BDL_MIN 2 +#define HDA_BDL_MAX 256 +#define HDA_BDL_DEFAULT HDA_BDL_MIN -#define HDA_BLK_MIN HDA_DMA_ALIGNMENT -#define HDA_BLK_ALIGN (~(HDA_BLK_MIN - 1)) +#define HDA_BLK_MIN HDA_DMA_ALIGNMENT +#define HDA_BLK_ALIGN (~(HDA_BLK_MIN - 1)) -#define HDA_BUFSZ_MIN (HDA_BDL_MIN * HDA_BLK_MIN) -#define HDA_BUFSZ_MAX 262144 -#define HDA_BUFSZ_DEFAULT 65536 +#define HDA_BUFSZ_MIN (HDA_BDL_MIN * HDA_BLK_MIN) +#define HDA_BUFSZ_MAX 262144 +#define HDA_BUFSZ_DEFAULT 65536 -#define HDA_GPIO_MAX 8 +#define HDA_GPIO_MAX 8 -#define HDA_DEV_MATCH(fl, v) ((fl) == (v) || \ - (fl) == 0xffffffff || \ - (((fl) & 0xffff0000) == 0xffff0000 && \ - ((fl) & 0x0000ffff) == ((v) & 0x0000ffff)) || \ - (((fl) & 0x0000ffff) == 0x0000ffff && \ - ((fl) & 0xffff0000) == ((v) & 0xffff0000))) -#define HDA_MATCH_ALL 0xffffffff -#define HDA_INVALID 0xffffffff +#define HDA_DEV_MATCH(fl, v) \ + ((fl) == (v) || (fl) == 0xffffffff || \ + (((fl) & 0xffff0000) == 0xffff0000 && \ + ((fl) & 0x0000ffff) == ((v) & 0x0000ffff)) || \ + (((fl) & 0x0000ffff) == 0x0000ffff && \ + ((fl) & 0xffff0000) == ((v) & 0xffff0000))) +#define HDA_MATCH_ALL 0xffffffff +#define HDA_INVALID 0xffffffff -#define HDA_BOOTVERBOSE(stmt) do { \ - if (bootverbose != 0 || snd_verbose > 3) { \ - stmt \ - } \ -} while (0) +#define HDA_BOOTVERBOSE(stmt) \ + do { \ + if (bootverbose != 0 || snd_verbose > 3) { \ + stmt \ + } \ + } while (0) -#define HDA_BOOTHVERBOSE(stmt) do { \ - if (snd_verbose > 3) { \ - stmt \ - } \ -} while (0) +#define HDA_BOOTHVERBOSE(stmt) \ + do { \ + if (snd_verbose > 3) { \ + stmt \ + } \ + } while (0) -#define hda_command(dev, verb) \ - HDAC_CODEC_COMMAND(device_get_parent(dev), (dev), (verb)) +#define hda_command(dev, verb) \ + HDAC_CODEC_COMMAND(device_get_parent(dev), (dev), (verb)) typedef int nid_t; @@ -965,36 +967,35 @@ ****************************************************************************/ enum hdac_device_ivars { - HDA_IVAR_CODEC_ID, - HDA_IVAR_NODE_ID, - HDA_IVAR_VENDOR_ID, - HDA_IVAR_DEVICE_ID, - HDA_IVAR_REVISION_ID, - HDA_IVAR_STEPPING_ID, - HDA_IVAR_SUBVENDOR_ID, - HDA_IVAR_SUBDEVICE_ID, - HDA_IVAR_SUBSYSTEM_ID, - HDA_IVAR_NODE_TYPE, - HDA_IVAR_DMA_NOCACHE, - HDA_IVAR_STRIPES_MASK, + HDA_IVAR_CODEC_ID, + HDA_IVAR_NODE_ID, + HDA_IVAR_VENDOR_ID, + HDA_IVAR_DEVICE_ID, + HDA_IVAR_REVISION_ID, + HDA_IVAR_STEPPING_ID, + HDA_IVAR_SUBVENDOR_ID, + HDA_IVAR_SUBDEVICE_ID, + HDA_IVAR_SUBSYSTEM_ID, + HDA_IVAR_NODE_TYPE, + HDA_IVAR_DMA_NOCACHE, + HDA_IVAR_STRIPES_MASK, }; -#define HDA_ACCESSOR(var, ivar, type) \ - __BUS_ACCESSOR(hda, var, HDA, ivar, type) - -HDA_ACCESSOR(codec_id, CODEC_ID, uint8_t); -HDA_ACCESSOR(node_id, NODE_ID, uint8_t); -HDA_ACCESSOR(vendor_id, VENDOR_ID, uint16_t); -HDA_ACCESSOR(device_id, DEVICE_ID, uint16_t); -HDA_ACCESSOR(revision_id, REVISION_ID, uint8_t); -HDA_ACCESSOR(stepping_id, STEPPING_ID, uint8_t); -HDA_ACCESSOR(subvendor_id, SUBVENDOR_ID, uint16_t); -HDA_ACCESSOR(subdevice_id, SUBDEVICE_ID, uint16_t); -HDA_ACCESSOR(subsystem_id, SUBSYSTEM_ID, uint32_t); -HDA_ACCESSOR(node_type, NODE_TYPE, uint8_t); -HDA_ACCESSOR(dma_nocache, DMA_NOCACHE, uint8_t); -HDA_ACCESSOR(stripes_mask, STRIPES_MASK, uint8_t); - -#define PCIS_MULTIMEDIA_HDA 0x03 +#define HDA_ACCESSOR(var, ivar, type) __BUS_ACCESSOR(hda, var, HDA, ivar, type) + +HDA_ACCESSOR(codec_id, CODEC_ID, uint8_t); +HDA_ACCESSOR(node_id, NODE_ID, uint8_t); +HDA_ACCESSOR(vendor_id, VENDOR_ID, uint16_t); +HDA_ACCESSOR(device_id, DEVICE_ID, uint16_t); +HDA_ACCESSOR(revision_id, REVISION_ID, uint8_t); +HDA_ACCESSOR(stepping_id, STEPPING_ID, uint8_t); +HDA_ACCESSOR(subvendor_id, SUBVENDOR_ID, uint16_t); +HDA_ACCESSOR(subdevice_id, SUBDEVICE_ID, uint16_t); +HDA_ACCESSOR(subsystem_id, SUBSYSTEM_ID, uint32_t); +HDA_ACCESSOR(node_type, NODE_TYPE, uint8_t); +HDA_ACCESSOR(dma_nocache, DMA_NOCACHE, uint8_t); +HDA_ACCESSOR(stripes_mask, STRIPES_MASK, uint8_t); + +#define PCIS_MULTIMEDIA_HDA 0x03 #endif Index: sys/dev/sound/pci/hda/hdac.c =================================================================== --- sys/dev/sound/pci/hda/hdac.c +++ sys/dev/sound/pci/hda/hdac.c @@ -36,28 +36,27 @@ #include "opt_snd.h" #endif -#include -#include -#include - #include #include #include -#include -#include +#include +#include #include #include +#include +#include +#include -#define HDA_DRV_TEST_REV "20120126_0002" +#define HDA_DRV_TEST_REV "20120126_0002" -#define hdac_lock(sc) snd_mtxlock((sc)->lock) -#define hdac_unlock(sc) snd_mtxunlock((sc)->lock) -#define hdac_lockassert(sc) snd_mtxassert((sc)->lock) +#define hdac_lock(sc) snd_mtxlock((sc)->lock) +#define hdac_unlock(sc) snd_mtxunlock((sc)->lock) +#define hdac_lockassert(sc) snd_mtxassert((sc)->lock) -#define HDAC_QUIRK_64BIT (1 << 0) -#define HDAC_QUIRK_DMAPOS (1 << 1) -#define HDAC_QUIRK_MSI (1 << 2) +#define HDAC_QUIRK_64BIT (1 << 0) +#define HDAC_QUIRK_DMAPOS (1 << 1) +#define HDAC_QUIRK_MSI (1 << 2) static const struct { const char *key; @@ -71,151 +70,151 @@ MALLOC_DEFINE(M_HDAC, "hdac", "HDA Controller"); static const struct { - uint32_t model; - const char *desc; - char quirks_on; - char quirks_off; + uint32_t model; + const char *desc; + char quirks_on; + char quirks_off; } hdac_devices[] = { - { HDA_INTEL_OAK, "Intel Oaktrail", 0, 0 }, - { HDA_INTEL_CMLKLP, "Intel Comet Lake-LP", 0, 0 }, - { HDA_INTEL_CMLKH, "Intel Comet Lake-H", 0, 0 }, - { HDA_INTEL_BAY, "Intel BayTrail", 0, 0 }, - { HDA_INTEL_HSW1, "Intel Haswell", 0, 0 }, - { HDA_INTEL_HSW2, "Intel Haswell", 0, 0 }, - { HDA_INTEL_HSW3, "Intel Haswell", 0, 0 }, - { HDA_INTEL_BDW1, "Intel Broadwell", 0, 0 }, - { HDA_INTEL_BDW2, "Intel Broadwell", 0, 0 }, - { HDA_INTEL_BXTNT, "Intel Broxton-T", 0, 0 }, - { HDA_INTEL_CPT, "Intel Cougar Point", 0, 0 }, - { HDA_INTEL_PATSBURG,"Intel Patsburg", 0, 0 }, - { HDA_INTEL_PPT1, "Intel Panther Point", 0, 0 }, - { HDA_INTEL_BR, "Intel Braswell", 0, 0 }, - { HDA_INTEL_LPT1, "Intel Lynx Point", 0, 0 }, - { HDA_INTEL_LPT2, "Intel Lynx Point", 0, 0 }, - { HDA_INTEL_WCPT, "Intel Wildcat Point", 0, 0 }, - { HDA_INTEL_WELLS1, "Intel Wellsburg", 0, 0 }, - { HDA_INTEL_WELLS2, "Intel Wellsburg", 0, 0 }, - { HDA_INTEL_LPTLP1, "Intel Lynx Point-LP", 0, 0 }, - { HDA_INTEL_LPTLP2, "Intel Lynx Point-LP", 0, 0 }, - { HDA_INTEL_SRPTLP, "Intel Sunrise Point-LP", 0, 0 }, - { HDA_INTEL_KBLKLP, "Intel Kaby Lake-LP", 0, 0 }, - { HDA_INTEL_SRPT, "Intel Sunrise Point", 0, 0 }, - { HDA_INTEL_KBLK, "Intel Kaby Lake", 0, 0 }, - { HDA_INTEL_KBLKH, "Intel Kaby Lake-H", 0, 0 }, - { HDA_INTEL_CFLK, "Intel Coffee Lake", 0, 0 }, - { HDA_INTEL_CMLKS, "Intel Comet Lake-S", 0, 0 }, - { HDA_INTEL_CNLK, "Intel Cannon Lake", 0, 0 }, - { HDA_INTEL_ICLK, "Intel Ice Lake", 0, 0 }, - { HDA_INTEL_CMLKLP, "Intel Comet Lake-LP", 0, 0 }, - { HDA_INTEL_CMLKH, "Intel Comet Lake-H", 0, 0 }, - { HDA_INTEL_TGLK, "Intel Tiger Lake", 0, 0 }, - { HDA_INTEL_GMLK, "Intel Gemini Lake", 0, 0 }, - { HDA_INTEL_ALLK, "Intel Alder Lake", 0, 0 }, - { HDA_INTEL_ALLKM, "Intel Alder Lake-M", 0, 0 }, - { HDA_INTEL_ALLKN, "Intel Alder Lake-N", 0, 0 }, - { HDA_INTEL_ALLKP1, "Intel Alder Lake-P", 0, 0 }, - { HDA_INTEL_ALLKP2, "Intel Alder Lake-P", 0, 0 }, - { HDA_INTEL_ALLKPS, "Intel Alder Lake-PS", 0, 0 }, - { HDA_INTEL_RPTLK1, "Intel Raptor Lake-P", 0, 0 }, - { HDA_INTEL_RPTLK2, "Intel Raptor Lake-P", 0, 0 }, - { HDA_INTEL_MTL, "Intel Meteor Lake-P", 0, 0 }, - { HDA_INTEL_ARLS, "Intel Arrow Lake-S", 0, 0 }, - { HDA_INTEL_ARL, "Intel Arrow Lake", 0, 0 }, - { HDA_INTEL_LNLP, "Intel Lunar Lake-P", 0, 0 }, - { HDA_INTEL_82801F, "Intel 82801F", 0, 0 }, - { HDA_INTEL_63XXESB, "Intel 631x/632xESB", 0, 0 }, - { HDA_INTEL_82801G, "Intel 82801G", 0, 0 }, - { HDA_INTEL_82801H, "Intel 82801H", 0, 0 }, - { HDA_INTEL_82801I, "Intel 82801I", 0, 0 }, - { HDA_INTEL_JLK, "Intel Jasper Lake", 0, 0 }, - { HDA_INTEL_82801JI, "Intel 82801JI", 0, 0 }, - { HDA_INTEL_82801JD, "Intel 82801JD", 0, 0 }, - { HDA_INTEL_PCH, "Intel Ibex Peak", 0, 0 }, - { HDA_INTEL_PCH2, "Intel Ibex Peak", 0, 0 }, - { HDA_INTEL_ELLK, "Intel Elkhart Lake", 0, 0 }, - { HDA_INTEL_JLK2, "Intel Jasper Lake", 0, 0 }, - { HDA_INTEL_BXTNP, "Intel Broxton-P", 0, 0 }, - { HDA_INTEL_SCH, "Intel SCH", 0, 0 }, - { HDA_NVIDIA_MCP51, "NVIDIA MCP51", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_MCP55, "NVIDIA MCP55", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_MCP61_1, "NVIDIA MCP61", 0, 0 }, - { HDA_NVIDIA_MCP61_2, "NVIDIA MCP61", 0, 0 }, - { HDA_NVIDIA_MCP65_1, "NVIDIA MCP65", 0, 0 }, - { HDA_NVIDIA_MCP65_2, "NVIDIA MCP65", 0, 0 }, - { HDA_NVIDIA_MCP67_1, "NVIDIA MCP67", 0, 0 }, - { HDA_NVIDIA_MCP67_2, "NVIDIA MCP67", 0, 0 }, - { HDA_NVIDIA_MCP73_1, "NVIDIA MCP73", 0, 0 }, - { HDA_NVIDIA_MCP73_2, "NVIDIA MCP73", 0, 0 }, - { HDA_NVIDIA_MCP78_1, "NVIDIA MCP78", 0, HDAC_QUIRK_64BIT }, - { HDA_NVIDIA_MCP78_2, "NVIDIA MCP78", 0, HDAC_QUIRK_64BIT }, - { HDA_NVIDIA_MCP78_3, "NVIDIA MCP78", 0, HDAC_QUIRK_64BIT }, - { HDA_NVIDIA_MCP78_4, "NVIDIA MCP78", 0, HDAC_QUIRK_64BIT }, - { HDA_NVIDIA_MCP79_1, "NVIDIA MCP79", 0, 0 }, - { HDA_NVIDIA_MCP79_2, "NVIDIA MCP79", 0, 0 }, - { HDA_NVIDIA_MCP79_3, "NVIDIA MCP79", 0, 0 }, - { HDA_NVIDIA_MCP79_4, "NVIDIA MCP79", 0, 0 }, - { HDA_NVIDIA_MCP89_1, "NVIDIA MCP89", 0, 0 }, - { HDA_NVIDIA_MCP89_2, "NVIDIA MCP89", 0, 0 }, - { HDA_NVIDIA_MCP89_3, "NVIDIA MCP89", 0, 0 }, - { HDA_NVIDIA_MCP89_4, "NVIDIA MCP89", 0, 0 }, - { HDA_NVIDIA_0BE2, "NVIDIA (0x0be2)", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_0BE3, "NVIDIA (0x0be3)", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_0BE4, "NVIDIA (0x0be4)", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_GT100, "NVIDIA GT100", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_GT104, "NVIDIA GT104", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_GT106, "NVIDIA GT106", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_GT108, "NVIDIA GT108", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_GT116, "NVIDIA GT116", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_GF119, "NVIDIA GF119", 0, 0 }, - { HDA_NVIDIA_GF110_1, "NVIDIA GF110", 0, HDAC_QUIRK_MSI }, - { HDA_NVIDIA_GF110_2, "NVIDIA GF110", 0, HDAC_QUIRK_MSI }, - { HDA_ATI_SB450, "ATI SB450", 0, 0 }, - { HDA_ATI_SB600, "ATI SB600", 0, 0 }, - { HDA_ATI_RS600, "ATI RS600", 0, 0 }, - { HDA_ATI_RS690, "ATI RS690", 0, 0 }, - { HDA_ATI_RS780, "ATI RS780", 0, 0 }, - { HDA_ATI_RS880, "ATI RS880", 0, 0 }, - { HDA_ATI_R600, "ATI R600", 0, 0 }, - { HDA_ATI_RV610, "ATI RV610", 0, 0 }, - { HDA_ATI_RV620, "ATI RV620", 0, 0 }, - { HDA_ATI_RV630, "ATI RV630", 0, 0 }, - { HDA_ATI_RV635, "ATI RV635", 0, 0 }, - { HDA_ATI_RV710, "ATI RV710", 0, 0 }, - { HDA_ATI_RV730, "ATI RV730", 0, 0 }, - { HDA_ATI_RV740, "ATI RV740", 0, 0 }, - { HDA_ATI_RV770, "ATI RV770", 0, 0 }, - { HDA_ATI_RV810, "ATI RV810", 0, 0 }, - { HDA_ATI_RV830, "ATI RV830", 0, 0 }, - { HDA_ATI_RV840, "ATI RV840", 0, 0 }, - { HDA_ATI_RV870, "ATI RV870", 0, 0 }, - { HDA_ATI_RV910, "ATI RV910", 0, 0 }, - { HDA_ATI_RV930, "ATI RV930", 0, 0 }, - { HDA_ATI_RV940, "ATI RV940", 0, 0 }, - { HDA_ATI_RV970, "ATI RV970", 0, 0 }, - { HDA_ATI_R1000, "ATI R1000", 0, 0 }, - { HDA_ATI_KABINI, "ATI Kabini", 0, 0 }, - { HDA_ATI_TRINITY, "ATI Trinity", 0, 0 }, - { HDA_AMD_X370, "AMD X370", 0, 0 }, - { HDA_AMD_X570, "AMD X570", 0, 0 }, - { HDA_AMD_STONEY, "AMD Stoney", 0, 0 }, - { HDA_AMD_RAVEN, "AMD Raven", 0, 0 }, - { HDA_AMD_HUDSON2, "AMD Hudson-2", 0, 0 }, - { HDA_RDC_M3010, "RDC M3010", 0, 0 }, - { HDA_VIA_VT82XX, "VIA VT8251/8237A",0, 0 }, - { HDA_VMWARE, "VMware", 0, 0 }, - { HDA_SIS_966, "SiS 966/968", 0, 0 }, - { HDA_ULI_M5461, "ULI M5461", 0, 0 }, - { HDA_CREATIVE_SB1570, "Creative SB Audigy FX", 0, HDAC_QUIRK_64BIT }, + { HDA_INTEL_OAK, "Intel Oaktrail", 0, 0 }, + { HDA_INTEL_CMLKLP, "Intel Comet Lake-LP", 0, 0 }, + { HDA_INTEL_CMLKH, "Intel Comet Lake-H", 0, 0 }, + { HDA_INTEL_BAY, "Intel BayTrail", 0, 0 }, + { HDA_INTEL_HSW1, "Intel Haswell", 0, 0 }, + { HDA_INTEL_HSW2, "Intel Haswell", 0, 0 }, + { HDA_INTEL_HSW3, "Intel Haswell", 0, 0 }, + { HDA_INTEL_BDW1, "Intel Broadwell", 0, 0 }, + { HDA_INTEL_BDW2, "Intel Broadwell", 0, 0 }, + { HDA_INTEL_BXTNT, "Intel Broxton-T", 0, 0 }, + { HDA_INTEL_CPT, "Intel Cougar Point", 0, 0 }, + { HDA_INTEL_PATSBURG, "Intel Patsburg", 0, 0 }, + { HDA_INTEL_PPT1, "Intel Panther Point", 0, 0 }, + { HDA_INTEL_BR, "Intel Braswell", 0, 0 }, + { HDA_INTEL_LPT1, "Intel Lynx Point", 0, 0 }, + { HDA_INTEL_LPT2, "Intel Lynx Point", 0, 0 }, + { HDA_INTEL_WCPT, "Intel Wildcat Point", 0, 0 }, + { HDA_INTEL_WELLS1, "Intel Wellsburg", 0, 0 }, + { HDA_INTEL_WELLS2, "Intel Wellsburg", 0, 0 }, + { HDA_INTEL_LPTLP1, "Intel Lynx Point-LP", 0, 0 }, + { HDA_INTEL_LPTLP2, "Intel Lynx Point-LP", 0, 0 }, + { HDA_INTEL_SRPTLP, "Intel Sunrise Point-LP", 0, 0 }, + { HDA_INTEL_KBLKLP, "Intel Kaby Lake-LP", 0, 0 }, + { HDA_INTEL_SRPT, "Intel Sunrise Point", 0, 0 }, + { HDA_INTEL_KBLK, "Intel Kaby Lake", 0, 0 }, + { HDA_INTEL_KBLKH, "Intel Kaby Lake-H", 0, 0 }, + { HDA_INTEL_CFLK, "Intel Coffee Lake", 0, 0 }, + { HDA_INTEL_CMLKS, "Intel Comet Lake-S", 0, 0 }, + { HDA_INTEL_CNLK, "Intel Cannon Lake", 0, 0 }, + { HDA_INTEL_ICLK, "Intel Ice Lake", 0, 0 }, + { HDA_INTEL_CMLKLP, "Intel Comet Lake-LP", 0, 0 }, + { HDA_INTEL_CMLKH, "Intel Comet Lake-H", 0, 0 }, + { HDA_INTEL_TGLK, "Intel Tiger Lake", 0, 0 }, + { HDA_INTEL_GMLK, "Intel Gemini Lake", 0, 0 }, + { HDA_INTEL_ALLK, "Intel Alder Lake", 0, 0 }, + { HDA_INTEL_ALLKM, "Intel Alder Lake-M", 0, 0 }, + { HDA_INTEL_ALLKN, "Intel Alder Lake-N", 0, 0 }, + { HDA_INTEL_ALLKP1, "Intel Alder Lake-P", 0, 0 }, + { HDA_INTEL_ALLKP2, "Intel Alder Lake-P", 0, 0 }, + { HDA_INTEL_ALLKPS, "Intel Alder Lake-PS", 0, 0 }, + { HDA_INTEL_RPTLK1, "Intel Raptor Lake-P", 0, 0 }, + { HDA_INTEL_RPTLK2, "Intel Raptor Lake-P", 0, 0 }, + { HDA_INTEL_MTL, "Intel Meteor Lake-P", 0, 0 }, + { HDA_INTEL_ARLS, "Intel Arrow Lake-S", 0, 0 }, + { HDA_INTEL_ARL, "Intel Arrow Lake", 0, 0 }, + { HDA_INTEL_LNLP, "Intel Lunar Lake-P", 0, 0 }, + { HDA_INTEL_82801F, "Intel 82801F", 0, 0 }, + { HDA_INTEL_63XXESB, "Intel 631x/632xESB", 0, 0 }, + { HDA_INTEL_82801G, "Intel 82801G", 0, 0 }, + { HDA_INTEL_82801H, "Intel 82801H", 0, 0 }, + { HDA_INTEL_82801I, "Intel 82801I", 0, 0 }, + { HDA_INTEL_JLK, "Intel Jasper Lake", 0, 0 }, + { HDA_INTEL_82801JI, "Intel 82801JI", 0, 0 }, + { HDA_INTEL_82801JD, "Intel 82801JD", 0, 0 }, + { HDA_INTEL_PCH, "Intel Ibex Peak", 0, 0 }, + { HDA_INTEL_PCH2, "Intel Ibex Peak", 0, 0 }, + { HDA_INTEL_ELLK, "Intel Elkhart Lake", 0, 0 }, + { HDA_INTEL_JLK2, "Intel Jasper Lake", 0, 0 }, + { HDA_INTEL_BXTNP, "Intel Broxton-P", 0, 0 }, + { HDA_INTEL_SCH, "Intel SCH", 0, 0 }, + { HDA_NVIDIA_MCP51, "NVIDIA MCP51", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_MCP55, "NVIDIA MCP55", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_MCP61_1, "NVIDIA MCP61", 0, 0 }, + { HDA_NVIDIA_MCP61_2, "NVIDIA MCP61", 0, 0 }, + { HDA_NVIDIA_MCP65_1, "NVIDIA MCP65", 0, 0 }, + { HDA_NVIDIA_MCP65_2, "NVIDIA MCP65", 0, 0 }, + { HDA_NVIDIA_MCP67_1, "NVIDIA MCP67", 0, 0 }, + { HDA_NVIDIA_MCP67_2, "NVIDIA MCP67", 0, 0 }, + { HDA_NVIDIA_MCP73_1, "NVIDIA MCP73", 0, 0 }, + { HDA_NVIDIA_MCP73_2, "NVIDIA MCP73", 0, 0 }, + { HDA_NVIDIA_MCP78_1, "NVIDIA MCP78", 0, HDAC_QUIRK_64BIT }, + { HDA_NVIDIA_MCP78_2, "NVIDIA MCP78", 0, HDAC_QUIRK_64BIT }, + { HDA_NVIDIA_MCP78_3, "NVIDIA MCP78", 0, HDAC_QUIRK_64BIT }, + { HDA_NVIDIA_MCP78_4, "NVIDIA MCP78", 0, HDAC_QUIRK_64BIT }, + { HDA_NVIDIA_MCP79_1, "NVIDIA MCP79", 0, 0 }, + { HDA_NVIDIA_MCP79_2, "NVIDIA MCP79", 0, 0 }, + { HDA_NVIDIA_MCP79_3, "NVIDIA MCP79", 0, 0 }, + { HDA_NVIDIA_MCP79_4, "NVIDIA MCP79", 0, 0 }, + { HDA_NVIDIA_MCP89_1, "NVIDIA MCP89", 0, 0 }, + { HDA_NVIDIA_MCP89_2, "NVIDIA MCP89", 0, 0 }, + { HDA_NVIDIA_MCP89_3, "NVIDIA MCP89", 0, 0 }, + { HDA_NVIDIA_MCP89_4, "NVIDIA MCP89", 0, 0 }, + { HDA_NVIDIA_0BE2, "NVIDIA (0x0be2)", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_0BE3, "NVIDIA (0x0be3)", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_0BE4, "NVIDIA (0x0be4)", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_GT100, "NVIDIA GT100", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_GT104, "NVIDIA GT104", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_GT106, "NVIDIA GT106", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_GT108, "NVIDIA GT108", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_GT116, "NVIDIA GT116", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_GF119, "NVIDIA GF119", 0, 0 }, + { HDA_NVIDIA_GF110_1, "NVIDIA GF110", 0, HDAC_QUIRK_MSI }, + { HDA_NVIDIA_GF110_2, "NVIDIA GF110", 0, HDAC_QUIRK_MSI }, + { HDA_ATI_SB450, "ATI SB450", 0, 0 }, + { HDA_ATI_SB600, "ATI SB600", 0, 0 }, + { HDA_ATI_RS600, "ATI RS600", 0, 0 }, + { HDA_ATI_RS690, "ATI RS690", 0, 0 }, + { HDA_ATI_RS780, "ATI RS780", 0, 0 }, + { HDA_ATI_RS880, "ATI RS880", 0, 0 }, + { HDA_ATI_R600, "ATI R600", 0, 0 }, + { HDA_ATI_RV610, "ATI RV610", 0, 0 }, + { HDA_ATI_RV620, "ATI RV620", 0, 0 }, + { HDA_ATI_RV630, "ATI RV630", 0, 0 }, + { HDA_ATI_RV635, "ATI RV635", 0, 0 }, + { HDA_ATI_RV710, "ATI RV710", 0, 0 }, + { HDA_ATI_RV730, "ATI RV730", 0, 0 }, + { HDA_ATI_RV740, "ATI RV740", 0, 0 }, + { HDA_ATI_RV770, "ATI RV770", 0, 0 }, + { HDA_ATI_RV810, "ATI RV810", 0, 0 }, + { HDA_ATI_RV830, "ATI RV830", 0, 0 }, + { HDA_ATI_RV840, "ATI RV840", 0, 0 }, + { HDA_ATI_RV870, "ATI RV870", 0, 0 }, + { HDA_ATI_RV910, "ATI RV910", 0, 0 }, + { HDA_ATI_RV930, "ATI RV930", 0, 0 }, + { HDA_ATI_RV940, "ATI RV940", 0, 0 }, + { HDA_ATI_RV970, "ATI RV970", 0, 0 }, + { HDA_ATI_R1000, "ATI R1000", 0, 0 }, + { HDA_ATI_KABINI, "ATI Kabini", 0, 0 }, + { HDA_ATI_TRINITY, "ATI Trinity", 0, 0 }, + { HDA_AMD_X370, "AMD X370", 0, 0 }, + { HDA_AMD_X570, "AMD X570", 0, 0 }, + { HDA_AMD_STONEY, "AMD Stoney", 0, 0 }, + { HDA_AMD_RAVEN, "AMD Raven", 0, 0 }, + { HDA_AMD_HUDSON2, "AMD Hudson-2", 0, 0 }, + { HDA_RDC_M3010, "RDC M3010", 0, 0 }, + { HDA_VIA_VT82XX, "VIA VT8251/8237A", 0, 0 }, + { HDA_VMWARE, "VMware", 0, 0 }, + { HDA_SIS_966, "SiS 966/968", 0, 0 }, + { HDA_ULI_M5461, "ULI M5461", 0, 0 }, + { HDA_CREATIVE_SB1570, "Creative SB Audigy FX", 0, HDAC_QUIRK_64BIT }, /* Unknown */ - { HDA_INTEL_ALL, "Intel", 0, 0 }, - { HDA_NVIDIA_ALL, "NVIDIA", 0, 0 }, - { HDA_ATI_ALL, "ATI", 0, 0 }, - { HDA_AMD_ALL, "AMD", 0, 0 }, - { HDA_CREATIVE_ALL, "Creative", 0, 0 }, - { HDA_VIA_ALL, "VIA", 0, 0 }, - { HDA_VMWARE_ALL, "VMware", 0, 0 }, - { HDA_SIS_ALL, "SiS", 0, 0 }, - { HDA_ULI_ALL, "ULI", 0, 0 }, + { HDA_INTEL_ALL, "Intel", 0, 0 }, + { HDA_NVIDIA_ALL, "NVIDIA", 0, 0 }, + { HDA_ATI_ALL, "ATI", 0, 0 }, + { HDA_AMD_ALL, "AMD", 0, 0 }, + { HDA_CREATIVE_ALL, "Creative", 0, 0 }, + { HDA_VIA_ALL, "VIA", 0, 0 }, + { HDA_VMWARE_ALL, "VMware", 0, 0 }, + { HDA_SIS_ALL, "SiS", 0, 0 }, + { HDA_ULI_ALL, "ULI", 0, 0 }, }; static const struct { @@ -224,43 +223,42 @@ uint8_t mask; uint8_t enable; } hdac_pcie_snoop[] = { - { INTEL_VENDORID, 0x00, 0x00, 0x00 }, - { ATI_VENDORID, 0x42, 0xf8, 0x02 }, - { AMD_VENDORID, 0x42, 0xf8, 0x02 }, + { INTEL_VENDORID, 0x00, 0x00, 0x00 }, + { ATI_VENDORID, 0x42, 0xf8, 0x02 }, + { AMD_VENDORID, 0x42, 0xf8, 0x02 }, { NVIDIA_VENDORID, 0x4e, 0xf0, 0x0f }, }; /**************************************************************************** * Function prototypes ****************************************************************************/ -static void hdac_intr_handler(void *); -static int hdac_reset(struct hdac_softc *, bool); -static int hdac_get_capabilities(struct hdac_softc *); -static void hdac_dma_cb(void *, bus_dma_segment_t *, int, int); -static int hdac_dma_alloc(struct hdac_softc *, - struct hdac_dma *, bus_size_t); -static void hdac_dma_free(struct hdac_softc *, struct hdac_dma *); -static int hdac_mem_alloc(struct hdac_softc *); -static void hdac_mem_free(struct hdac_softc *); -static int hdac_irq_alloc(struct hdac_softc *); -static void hdac_irq_free(struct hdac_softc *); -static void hdac_corb_init(struct hdac_softc *); -static void hdac_rirb_init(struct hdac_softc *); -static void hdac_corb_start(struct hdac_softc *); -static void hdac_rirb_start(struct hdac_softc *); - -static void hdac_attach2(void *); - -static uint32_t hdac_send_command(struct hdac_softc *, nid_t, uint32_t); - -static int hdac_probe(device_t); -static int hdac_attach(device_t); -static int hdac_detach(device_t); -static int hdac_suspend(device_t); -static int hdac_resume(device_t); - -static int hdac_rirb_flush(struct hdac_softc *sc); -static int hdac_unsolq_flush(struct hdac_softc *sc); +static void hdac_intr_handler(void *); +static int hdac_reset(struct hdac_softc *, bool); +static int hdac_get_capabilities(struct hdac_softc *); +static void hdac_dma_cb(void *, bus_dma_segment_t *, int, int); +static int hdac_dma_alloc(struct hdac_softc *, struct hdac_dma *, bus_size_t); +static void hdac_dma_free(struct hdac_softc *, struct hdac_dma *); +static int hdac_mem_alloc(struct hdac_softc *); +static void hdac_mem_free(struct hdac_softc *); +static int hdac_irq_alloc(struct hdac_softc *); +static void hdac_irq_free(struct hdac_softc *); +static void hdac_corb_init(struct hdac_softc *); +static void hdac_rirb_init(struct hdac_softc *); +static void hdac_corb_start(struct hdac_softc *); +static void hdac_rirb_start(struct hdac_softc *); + +static void hdac_attach2(void *); + +static uint32_t hdac_send_command(struct hdac_softc *, nid_t, uint32_t); + +static int hdac_probe(device_t); +static int hdac_attach(device_t); +static int hdac_detach(device_t); +static int hdac_suspend(device_t); +static int hdac_resume(device_t); + +static int hdac_rirb_flush(struct hdac_softc *sc); +static int hdac_unsolq_flush(struct hdac_softc *sc); /* This function surely going to make its way into upper level someday. */ static void @@ -270,26 +268,22 @@ int i = 0, j, k, len, inv; if (resource_string_value(device_get_name(sc->dev), - device_get_unit(sc->dev), "config", &res) != 0) + device_get_unit(sc->dev), "config", &res) != 0) return; if (!(res != NULL && strlen(res) > 0)) return; - HDA_BOOTVERBOSE( - device_printf(sc->dev, "Config options:"); - ); + HDA_BOOTVERBOSE(device_printf(sc->dev, "Config options:");); for (;;) { - while (res[i] != '\0' && - (res[i] == ',' || isspace(res[i]) != 0)) + while ( + res[i] != '\0' && (res[i] == ',' || isspace(res[i]) != 0)) i++; if (res[i] == '\0') { - HDA_BOOTVERBOSE( - printf("\n"); - ); + HDA_BOOTVERBOSE(printf("\n");); return; } j = i; - while (res[j] != '\0' && - !(res[j] == ',' || isspace(res[j]) != 0)) + while ( + res[j] != '\0' && !(res[j] == ',' || isspace(res[j]) != 0)) j++; len = j - i; if (len > 2 && strncmp(res + i, "no", 2) == 0) @@ -297,15 +291,13 @@ else inv = 0; for (k = 0; len > inv && k < nitems(hdac_quirks_tab); k++) { - if (strncmp(res + i + inv, - hdac_quirks_tab[k].key, len - inv) != 0) + if (strncmp(res + i + inv, hdac_quirks_tab[k].key, + len - inv) != 0) continue; if (len - inv != strlen(hdac_quirks_tab[k].key)) continue; - HDA_BOOTVERBOSE( - printf(" %s%s", (inv != 0) ? "no" : "", - hdac_quirks_tab[k].key); - ); + HDA_BOOTVERBOSE(printf(" %s%s", (inv != 0) ? "no" : "", + hdac_quirks_tab[k].key);); if (inv == 0) { *on |= hdac_quirks_tab[k].value; *off &= ~hdac_quirks_tab[k].value; @@ -350,8 +342,8 @@ /* Get as many responses that we can */ rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS); while (rirbsts & HDAC_RIRBSTS_RINTFL) { - HDAC_WRITE_1(&sc->mem, - HDAC_RIRBSTS, HDAC_RIRBSTS_RINTFL); + HDAC_WRITE_1(&sc->mem, HDAC_RIRBSTS, + HDAC_RIRBSTS_RINTFL); hdac_rirb_flush(sc); rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS); } @@ -364,10 +356,11 @@ if ((intsts & (1 << i)) == 0) continue; HDAC_WRITE_1(&sc->mem, (i << 5) + HDAC_SDSTS, - HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE | HDAC_SDSTS_BCIS); + HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE | + HDAC_SDSTS_BCIS); if ((dev = sc->streams[i].dev) != NULL) { - HDAC_STREAM_INTR(dev, - sc->streams[i].dir, sc->streams[i].stream); + HDAC_STREAM_INTR(dev, sc->streams[i].dir, + sc->streams[i].stream); } } } @@ -545,8 +538,8 @@ HDAC_CORBSIZE_CORBSZCAP_2) sc->corb_size = 2; else { - device_printf(sc->dev, "%s: Invalid corb size (%x)\n", - __func__, corbsize); + device_printf(sc->dev, "%s: Invalid corb size (%x)\n", __func__, + corbsize); return (ENXIO); } @@ -561,18 +554,16 @@ HDAC_RIRBSIZE_RIRBSZCAP_2) sc->rirb_size = 2; else { - device_printf(sc->dev, "%s: Invalid rirb size (%x)\n", - __func__, rirbsize); + device_printf(sc->dev, "%s: Invalid rirb size (%x)\n", __func__, + rirbsize); return (ENXIO); } - HDA_BOOTVERBOSE( - device_printf(sc->dev, "Caps: OSS %d, ISS %d, BSS %d, " - "NSDO %d%s, CORB %d, RIRB %d\n", - sc->num_oss, sc->num_iss, sc->num_bss, 1 << sc->num_sdo, - sc->support_64bit ? ", 64bit" : "", - sc->corb_size, sc->rirb_size); - ); + HDA_BOOTVERBOSE(device_printf(sc->dev, + "Caps: OSS %d, ISS %d, BSS %d, " + "NSDO %d%s, CORB %d, RIRB %d\n", + sc->num_oss, sc->num_iss, sc->num_bss, 1 << sc->num_sdo, + sc->support_64bit ? ", 64bit" : "", sc->corb_size, sc->rirb_size);); return (0); } @@ -613,22 +604,21 @@ /* * Create a DMA tag */ - result = bus_dma_tag_create( - bus_get_dma_tag(sc->dev), /* parent */ - HDA_DMA_ALIGNMENT, /* alignment */ - 0, /* boundary */ + result = bus_dma_tag_create(bus_get_dma_tag(sc->dev), /* parent */ + HDA_DMA_ALIGNMENT, /* alignment */ + 0, /* boundary */ (sc->support_64bit) ? BUS_SPACE_MAXADDR : - BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, /* filtfunc */ - NULL, /* fistfuncarg */ - roundsz, /* maxsize */ - 1, /* nsegments */ - roundsz, /* maxsegsz */ - 0, /* flags */ - NULL, /* lockfunc */ - NULL, /* lockfuncarg */ - &dma->dma_tag); /* dmat */ + BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, /* filtfunc */ + NULL, /* fistfuncarg */ + roundsz, /* maxsize */ + 1, /* nsegments */ + roundsz, /* maxsegsz */ + 0, /* flags */ + NULL, /* lockfunc */ + NULL, /* lockfuncarg */ + &dma->dma_tag); /* dmat */ if (result != 0) { device_printf(sc->dev, "%s: bus_dma_tag_create failed (%d)\n", __func__, result); @@ -640,8 +630,8 @@ */ result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr, BUS_DMA_NOWAIT | BUS_DMA_ZERO | - ((sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : - BUS_DMA_COHERENT), + ((sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : + BUS_DMA_COHERENT), &dma->dma_map); if (result != 0) { device_printf(sc->dev, "%s: bus_dmamem_alloc failed (%d)\n", @@ -664,10 +654,8 @@ goto hdac_dma_alloc_fail; } - HDA_BOOTHVERBOSE( - device_printf(sc->dev, "%s: size=%ju -> roundsz=%ju\n", - __func__, (uintmax_t)size, (uintmax_t)roundsz); - ); + HDA_BOOTHVERBOSE(device_printf(sc->dev, "%s: size=%ju -> roundsz=%ju\n", + __func__, (uintmax_t)size, (uintmax_t)roundsz);); return (0); @@ -773,12 +761,13 @@ __func__); goto hdac_irq_alloc_fail; } - result = bus_setup_intr(sc->dev, irq->irq_res, INTR_MPSAFE | INTR_TYPE_AV, - NULL, hdac_intr_handler, sc, &irq->irq_handle); + result = bus_setup_intr(sc->dev, irq->irq_res, + INTR_MPSAFE | INTR_TYPE_AV, NULL, hdac_intr_handler, sc, + &irq->irq_handle); if (result != 0) { device_printf(sc->dev, - "%s: Unable to setup interrupt handler (%d)\n", - __func__, result); + "%s: Unable to setup interrupt handler (%d)\n", __func__, + result); goto hdac_irq_alloc_fail; } @@ -980,8 +969,10 @@ sc->unsolq[sc->unsolq_wp++] = cad; sc->unsolq_wp %= HDAC_UNSOLQ_MAX; } else if (sc->codecs[cad].pending <= 0) { - device_printf(sc->dev, "Unexpected unsolicited " - "response from address %d: %08x\n", cad, resp); + device_printf(sc->dev, + "Unexpected unsolicited " + "response from address %d: %08x\n", + cad, resp); } else { sc->codecs[cad].response = resp; sc->codecs[cad].pending--; @@ -1040,11 +1031,11 @@ sc->corb_wp++; sc->corb_wp %= sc->corb_size; corb = (uint32_t *)sc->corb_dma.dma_vaddr; - bus_dmamap_sync(sc->corb_dma.dma_tag, - sc->corb_dma.dma_map, BUS_DMASYNC_PREWRITE); + bus_dmamap_sync(sc->corb_dma.dma_tag, sc->corb_dma.dma_map, + BUS_DMASYNC_PREWRITE); corb[sc->corb_wp] = htole32(verb); - bus_dmamap_sync(sc->corb_dma.dma_tag, - sc->corb_dma.dma_map, BUS_DMASYNC_POSTWRITE); + bus_dmamap_sync(sc->corb_dma.dma_tag, sc->corb_dma.dma_map, + BUS_DMASYNC_POSTWRITE); HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp); timeout = 10000; @@ -1147,11 +1138,9 @@ sc = device_get_softc(dev); HDA_BOOTVERBOSE( - device_printf(dev, "PCI card vendor: 0x%04x, device: 0x%04x\n", - pci_get_subvendor(dev), pci_get_subdevice(dev)); - device_printf(dev, "HDA Driver Revision: %s\n", - HDA_DRV_TEST_REV); - ); + device_printf(dev, "PCI card vendor: 0x%04x, device: 0x%04x\n", + pci_get_subvendor(dev), pci_get_subdevice(dev)); + device_printf(dev, "HDA Driver Revision: %s\n", HDA_DRV_TEST_REV);); model = (uint32_t)pci_get_device(dev) << 16; model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff; @@ -1184,8 +1173,8 @@ sc->quirks_on = 0; sc->quirks_off = 0; } - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "msi", &i) == 0) { + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "msi", &i) == 0) { if (i == 0) sc->quirks_off |= HDAC_QUIRK_MSI; else { @@ -1195,13 +1184,12 @@ } hdac_config_fetch(sc, &sc->quirks_on, &sc->quirks_off); HDA_BOOTVERBOSE( - device_printf(sc->dev, - "Config options: on=0x%08x off=0x%08x\n", - sc->quirks_on, sc->quirks_off); - ); + device_printf(sc->dev, "Config options: on=0x%08x off=0x%08x\n", + sc->quirks_on, sc->quirks_off);); sc->poll_ival = hz; - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "polling", &i) == 0 && i != 0) + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "polling", &i) == 0 && + i != 0) sc->polling = 1; else sc->polling = 0; @@ -1213,17 +1201,16 @@ /* TCSEL -> TC0 */ v = pci_read_config(dev, 0x44, 1); pci_write_config(dev, 0x44, v & 0xf8, 1); - HDA_BOOTHVERBOSE( - device_printf(dev, "TCSEL: 0x%02d -> 0x%02d\n", v, - pci_read_config(dev, 0x44, 1)); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "TCSEL: 0x%02d -> 0x%02d\n", + v, pci_read_config(dev, 0x44, 1));); } #if defined(__i386__) || defined(__amd64__) sc->flags |= HDAC_F_DMA_NOCACHE; - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "snoop", &i) == 0 && i != 0) { + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "snoop", &i) == 0 && + i != 0) { #else sc->flags &= ~HDAC_F_DMA_NOCACHE; #endif @@ -1253,11 +1240,9 @@ v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1); if ((v & hdac_pcie_snoop[i].enable) != hdac_pcie_snoop[i].enable) { - HDA_BOOTVERBOSE( - device_printf(dev, - "WARNING: Failed to enable PCIe " - "snoop!\n"); - ); + HDA_BOOTVERBOSE(device_printf(dev, + "WARNING: Failed to enable PCIe " + "snoop!\n");); #if defined(__i386__) || defined(__amd64__) sc->flags |= HDAC_F_DMA_NOCACHE; #endif @@ -1269,10 +1254,9 @@ #endif HDA_BOOTHVERBOSE( - device_printf(dev, "DMA Coherency: %s / vendor=0x%04x\n", - (sc->flags & HDAC_F_DMA_NOCACHE) ? - "Uncacheable" : "PCIe snoop", vendor); - ); + device_printf(dev, "DMA Coherency: %s / vendor=0x%04x\n", + (sc->flags & HDAC_F_DMA_NOCACHE) ? "Uncacheable" : "PCIe snoop", + vendor);); /* Allocate resources */ result = hdac_mem_alloc(sc); @@ -1293,8 +1277,8 @@ sc->rirb_size * sizeof(struct hdac_rirb)); if (result != 0) goto hdac_attach_fail; - sc->streams = malloc(sizeof(struct hdac_stream) * sc->num_ss, - M_HDAC, M_ZERO | M_WAITOK); + sc->streams = malloc(sizeof(struct hdac_stream) * sc->num_ss, M_HDAC, + M_ZERO | M_WAITOK); for (i = 0; i < sc->num_ss; i++) { result = hdac_dma_alloc(sc, &sc->streams[i].bdl, sizeof(struct hdac_bdle) * HDA_BDL_MAX); @@ -1303,47 +1287,43 @@ } if (sc->quirks_on & HDAC_QUIRK_DMAPOS) { if (hdac_dma_alloc(sc, &sc->pos_dma, (sc->num_ss) * 8) != 0) { - HDA_BOOTVERBOSE( - device_printf(dev, "Failed to " - "allocate DMA pos buffer " - "(non-fatal)\n"); - ); + HDA_BOOTVERBOSE(device_printf(dev, + "Failed to " + "allocate DMA pos buffer " + "(non-fatal)\n");); } else { uint64_t addr = sc->pos_dma.dma_paddr; HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, addr >> 32); HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE, (addr & HDAC_DPLBASE_DPLBASE_MASK) | - HDAC_DPLBASE_DPLBASE_DMAPBE); + HDAC_DPLBASE_DPLBASE_DMAPBE); } } - result = bus_dma_tag_create( - bus_get_dma_tag(sc->dev), /* parent */ - HDA_DMA_ALIGNMENT, /* alignment */ - 0, /* boundary */ + result = bus_dma_tag_create(bus_get_dma_tag(sc->dev), /* parent */ + HDA_DMA_ALIGNMENT, /* alignment */ + 0, /* boundary */ (sc->support_64bit) ? BUS_SPACE_MAXADDR : - BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, /* filtfunc */ - NULL, /* fistfuncarg */ - HDA_BUFSZ_MAX, /* maxsize */ - 1, /* nsegments */ - HDA_BUFSZ_MAX, /* maxsegsz */ - 0, /* flags */ - NULL, /* lockfunc */ - NULL, /* lockfuncarg */ - &sc->chan_dmat); /* dmat */ + BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, /* filtfunc */ + NULL, /* fistfuncarg */ + HDA_BUFSZ_MAX, /* maxsize */ + 1, /* nsegments */ + HDA_BUFSZ_MAX, /* maxsegsz */ + 0, /* flags */ + NULL, /* lockfunc */ + NULL, /* lockfuncarg */ + &sc->chan_dmat); /* dmat */ if (result != 0) { device_printf(dev, "%s: bus_dma_tag_create failed (%d)\n", - __func__, result); + __func__, result); goto hdac_attach_fail; } /* Quiesce everything */ - HDA_BOOTHVERBOSE( - device_printf(dev, "Reset controller...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Reset controller...\n");); hdac_reset(sc, true); /* Initialize the CORB and RIRB */ @@ -1550,13 +1530,9 @@ sc->intrhook.ich_func = NULL; } - HDA_BOOTHVERBOSE( - device_printf(sc->dev, "Starting CORB Engine...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(sc->dev, "Starting CORB Engine...\n");); hdac_corb_start(sc); - HDA_BOOTHVERBOSE( - device_printf(sc->dev, "Starting RIRB Engine...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(sc->dev, "Starting RIRB Engine...\n");); hdac_rirb_start(sc); /* @@ -1577,32 +1553,27 @@ HDAC_WRITE_2(&sc->mem, HDAC_STATESTS, statests); HDA_BOOTHVERBOSE( - device_printf(sc->dev, - "Enabling controller interrupt...\n"); - ); - HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) | - HDAC_GCTL_UNSOL); + device_printf(sc->dev, "Enabling controller interrupt...\n");); + HDAC_WRITE_4(&sc->mem, HDAC_GCTL, + HDAC_READ_4(&sc->mem, HDAC_GCTL) | HDAC_GCTL_UNSOL); if (sc->polling == 0) { HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, HDAC_INTCTL_CIE | HDAC_INTCTL_GIE); } DELAY(1000); - HDA_BOOTHVERBOSE( - device_printf(sc->dev, "Scanning HDA codecs ...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(sc->dev, "Scanning HDA codecs ...\n");); hdac_unlock(sc); for (i = 0; i < HDAC_CODEC_MAX; i++) { if (HDAC_STATESTS_SDIWAKE(statests, i)) { - HDA_BOOTHVERBOSE( - device_printf(sc->dev, - "Found CODEC at address %d\n", i); - ); + HDA_BOOTHVERBOSE(device_printf(sc->dev, + "Found CODEC at address %d\n", i);); hdac_lock(sc); vendorid = hdac_send_command(sc, i, HDA_CMD_GET_PARAMETER(0, 0x0, HDA_PARAM_VENDOR_ID)); revisionid = hdac_send_command(sc, i, - HDA_CMD_GET_PARAMETER(0, 0x0, HDA_PARAM_REVISION_ID)); + HDA_CMD_GET_PARAMETER(0, 0x0, + HDA_PARAM_REVISION_ID)); hdac_unlock(sc); if (vendorid == HDA_INVALID && revisionid == HDA_INVALID) { @@ -1610,10 +1581,10 @@ "CODEC at address %d not responding!\n", i); continue; } - sc->codecs[i].vendor_id = - HDA_PARAM_VENDOR_ID_VENDOR_ID(vendorid); - sc->codecs[i].device_id = - HDA_PARAM_VENDOR_ID_DEVICE_ID(vendorid); + sc->codecs[i].vendor_id = HDA_PARAM_VENDOR_ID_VENDOR_ID( + vendorid); + sc->codecs[i].device_id = HDA_PARAM_VENDOR_ID_DEVICE_ID( + vendorid); sc->codecs[i].revision_id = HDA_PARAM_REVISION_ID_REVISION_ID(revisionid); sc->codecs[i].stepping_id = @@ -1632,12 +1603,12 @@ SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev), SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, - "pindump", CTLTYPE_INT | CTLFLAG_RW, sc->dev, - sizeof(sc->dev), sysctl_hdac_pindump, "I", "Dump pin states/data"); + "pindump", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev), + sysctl_hdac_pindump, "I", "Dump pin states/data"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev), SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, - "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, - sizeof(sc->dev), sysctl_hdac_polling, "I", "Enable polling mode"); + "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev), + sysctl_hdac_polling, "I", "Enable polling mode"); } /**************************************************************************** @@ -1650,23 +1621,17 @@ { struct hdac_softc *sc = device_get_softc(dev); - HDA_BOOTHVERBOSE( - device_printf(dev, "Suspend...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Suspend...\n");); bus_generic_suspend(dev); hdac_lock(sc); - HDA_BOOTHVERBOSE( - device_printf(dev, "Reset controller...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Reset controller...\n");); callout_stop(&sc->poll_callout); hdac_reset(sc, false); hdac_unlock(sc); callout_drain(&sc->poll_callout); taskqueue_drain(taskqueue_thread, &sc->unsolq_task); - HDA_BOOTHVERBOSE( - device_printf(dev, "Suspend done\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Suspend done\n");); return (0); } @@ -1681,28 +1646,20 @@ struct hdac_softc *sc = device_get_softc(dev); int error; - HDA_BOOTHVERBOSE( - device_printf(dev, "Resume...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Resume...\n");); hdac_lock(sc); /* Quiesce everything */ - HDA_BOOTHVERBOSE( - device_printf(dev, "Reset controller...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Reset controller...\n");); hdac_reset(sc, true); /* Initialize the CORB and RIRB */ hdac_corb_init(sc); hdac_rirb_init(sc); - HDA_BOOTHVERBOSE( - device_printf(dev, "Starting CORB Engine...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Starting CORB Engine...\n");); hdac_corb_start(sc); - HDA_BOOTHVERBOSE( - device_printf(dev, "Starting RIRB Engine...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Starting RIRB Engine...\n");); hdac_rirb_start(sc); /* @@ -1718,19 +1675,16 @@ HDAC_WRITE_2(&sc->mem, HDAC_STATESTS, HDAC_STATESTS_SDIWAKE_MASK); HDA_BOOTHVERBOSE( - device_printf(dev, "Enabling controller interrupt...\n"); - ); - HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) | - HDAC_GCTL_UNSOL); + device_printf(dev, "Enabling controller interrupt...\n");); + HDAC_WRITE_4(&sc->mem, HDAC_GCTL, + HDAC_READ_4(&sc->mem, HDAC_GCTL) | HDAC_GCTL_UNSOL); HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, HDAC_INTCTL_CIE | HDAC_INTCTL_GIE); DELAY(1000); hdac_poll_reinit(sc); hdac_unlock(sc); error = bus_generic_resume(dev); - HDA_BOOTHVERBOSE( - device_printf(dev, "Resume done\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Resume done\n");); return (error); } @@ -1901,8 +1855,8 @@ /* Fallback to BSS. */ if (ss == -1) { for (i = 0; i < sc->num_bss; i++) { - if (sc->streams[i + sc->num_iss + sc->num_oss].stream - == stream) { + if (sc->streams[i + sc->num_iss + sc->num_oss].stream == + stream) { ss = i + sc->num_iss + sc->num_oss; break; } @@ -1936,11 +1890,9 @@ prevbw = sc->codecs[cad].sdi_bw_used; maxbw = 48000 * 464; } - HDA_BOOTHVERBOSE( - device_printf(dev, "%dKbps of %dKbps bandwidth used%s\n", - (bw + prevbw) / 1000, maxbw / 1000, - bw + prevbw > maxbw ? " -- OVERFLOW!" : ""); - ); + HDA_BOOTHVERBOSE(device_printf(dev, + "%dKbps of %dKbps bandwidth used%s\n", (bw + prevbw) / 1000, + maxbw / 1000, bw + prevbw > maxbw ? " -- OVERFLOW!" : "");); if (bw + prevbw > maxbw) return (0); if (dir == 1) @@ -2154,28 +2106,27 @@ static device_method_t hdac_methods[] = { /* device interface */ - DEVMETHOD(device_probe, hdac_probe), - DEVMETHOD(device_attach, hdac_attach), - DEVMETHOD(device_detach, hdac_detach), - DEVMETHOD(device_suspend, hdac_suspend), - DEVMETHOD(device_resume, hdac_resume), + DEVMETHOD(device_probe, hdac_probe), + DEVMETHOD(device_attach, hdac_attach), + DEVMETHOD(device_detach, hdac_detach), + DEVMETHOD(device_suspend, hdac_suspend), + DEVMETHOD(device_resume, hdac_resume), /* Bus interface */ - DEVMETHOD(bus_get_dma_tag, hdac_get_dma_tag), - DEVMETHOD(bus_print_child, hdac_print_child), - DEVMETHOD(bus_child_location, hdac_child_location), - DEVMETHOD(bus_child_pnpinfo, hdac_child_pnpinfo_method), - DEVMETHOD(bus_read_ivar, hdac_read_ivar), - DEVMETHOD(hdac_get_mtx, hdac_get_mtx), - DEVMETHOD(hdac_codec_command, hdac_codec_command), - DEVMETHOD(hdac_stream_alloc, hdac_stream_alloc), - DEVMETHOD(hdac_stream_free, hdac_stream_free), - DEVMETHOD(hdac_stream_start, hdac_stream_start), - DEVMETHOD(hdac_stream_stop, hdac_stream_stop), - DEVMETHOD(hdac_stream_reset, hdac_stream_reset), - DEVMETHOD(hdac_stream_getptr, hdac_stream_getptr), - DEVMETHOD(hdac_unsol_alloc, hdac_unsol_alloc), - DEVMETHOD(hdac_unsol_free, hdac_unsol_free), - DEVMETHOD_END + DEVMETHOD(bus_get_dma_tag, hdac_get_dma_tag), + DEVMETHOD(bus_print_child, hdac_print_child), + DEVMETHOD(bus_child_location, hdac_child_location), + DEVMETHOD(bus_child_pnpinfo, hdac_child_pnpinfo_method), + DEVMETHOD(bus_read_ivar, hdac_read_ivar), + DEVMETHOD(hdac_get_mtx, hdac_get_mtx), + DEVMETHOD(hdac_codec_command, hdac_codec_command), + DEVMETHOD(hdac_stream_alloc, hdac_stream_alloc), + DEVMETHOD(hdac_stream_free, hdac_stream_free), + DEVMETHOD(hdac_stream_start, hdac_stream_start), + DEVMETHOD(hdac_stream_stop, hdac_stream_stop), + DEVMETHOD(hdac_stream_reset, hdac_stream_reset), + DEVMETHOD(hdac_stream_getptr, hdac_stream_getptr), + DEVMETHOD(hdac_unsol_alloc, hdac_unsol_alloc), + DEVMETHOD(hdac_unsol_free, hdac_unsol_free), DEVMETHOD_END }; static driver_t hdac_driver = { Index: sys/dev/sound/pci/hda/hdac_private.h =================================================================== --- sys/dev/sound/pci/hda/hdac_private.h +++ sys/dev/sound/pci/hda/hdac_private.h @@ -33,51 +33,51 @@ /**************************************************************************** * Miscellaneous defines ****************************************************************************/ -#define HDAC_CODEC_MAX 16 +#define HDAC_CODEC_MAX 16 /**************************************************************************** * Helper Macros ****************************************************************************/ -#define HDAC_READ_1(mem, offset) \ +#define HDAC_READ_1(mem, offset) \ bus_space_read_1((mem)->mem_tag, (mem)->mem_handle, (offset)) -#define HDAC_READ_2(mem, offset) \ +#define HDAC_READ_2(mem, offset) \ bus_space_read_2((mem)->mem_tag, (mem)->mem_handle, (offset)) -#define HDAC_READ_4(mem, offset) \ +#define HDAC_READ_4(mem, offset) \ bus_space_read_4((mem)->mem_tag, (mem)->mem_handle, (offset)) -#define HDAC_WRITE_1(mem, offset, value) \ +#define HDAC_WRITE_1(mem, offset, value) \ bus_space_write_1((mem)->mem_tag, (mem)->mem_handle, (offset), (value)) -#define HDAC_WRITE_2(mem, offset, value) \ +#define HDAC_WRITE_2(mem, offset, value) \ bus_space_write_2((mem)->mem_tag, (mem)->mem_handle, (offset), (value)) -#define HDAC_WRITE_4(mem, offset, value) \ +#define HDAC_WRITE_4(mem, offset, value) \ bus_space_write_4((mem)->mem_tag, (mem)->mem_handle, (offset), (value)) -#define HDAC_ISDCTL(sc, n) (_HDAC_ISDCTL((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_ISDSTS(sc, n) (_HDAC_ISDSTS((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_ISDPICB(sc, n) (_HDAC_ISDPICB((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_ISDCBL(sc, n) (_HDAC_ISDCBL((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_ISDLVI(sc, n) (_HDAC_ISDLVI((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_ISDFIFOD(sc, n) (_HDAC_ISDFIFOD((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_ISDFMT(sc, n) (_HDAC_ISDFMT((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_ISDBDPL(sc, n) (_HDAC_ISDBDPL((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_ISDBDPU(sc, n) (_HDAC_ISDBDPU((n), (sc)->num_iss, (sc)->num_oss)) - -#define HDAC_OSDCTL(sc, n) (_HDAC_OSDCTL((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_OSDSTS(sc, n) (_HDAC_OSDSTS((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_OSDPICB(sc, n) (_HDAC_OSDPICB((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_OSDCBL(sc, n) (_HDAC_OSDCBL((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_OSDLVI(sc, n) (_HDAC_OSDLVI((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_OSDFIFOD(sc, n) (_HDAC_OSDFIFOD((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_OSDBDPL(sc, n) (_HDAC_OSDBDPL((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_OSDBDPU(sc, n) (_HDAC_OSDBDPU((n), (sc)->num_iss, (sc)->num_oss)) - -#define HDAC_BSDCTL(sc, n) (_HDAC_BSDCTL((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_BSDSTS(sc, n) (_HDAC_BSDSTS((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_BSDPICB(sc, n) (_HDAC_BSDPICB((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_BSDCBL(sc, n) (_HDAC_BSDCBL((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_BSDLVI(sc, n) (_HDAC_BSDLVI((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_BSDFIFOD(sc, n) (_HDAC_BSDFIFOD((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_BSDBDPL(sc, n) (_HDAC_BSDBDPL((n), (sc)->num_iss, (sc)->num_oss)) -#define HDAC_BSDBDPU(sc, n) (_HDAC_BSDBDPU((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_ISDCTL(sc, n) (_HDAC_ISDCTL((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_ISDSTS(sc, n) (_HDAC_ISDSTS((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_ISDPICB(sc, n) (_HDAC_ISDPICB((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_ISDCBL(sc, n) (_HDAC_ISDCBL((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_ISDLVI(sc, n) (_HDAC_ISDLVI((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_ISDFIFOD(sc, n) (_HDAC_ISDFIFOD((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_ISDFMT(sc, n) (_HDAC_ISDFMT((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_ISDBDPL(sc, n) (_HDAC_ISDBDPL((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_ISDBDPU(sc, n) (_HDAC_ISDBDPU((n), (sc)->num_iss, (sc)->num_oss)) + +#define HDAC_OSDCTL(sc, n) (_HDAC_OSDCTL((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_OSDSTS(sc, n) (_HDAC_OSDSTS((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_OSDPICB(sc, n) (_HDAC_OSDPICB((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_OSDCBL(sc, n) (_HDAC_OSDCBL((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_OSDLVI(sc, n) (_HDAC_OSDLVI((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_OSDFIFOD(sc, n) (_HDAC_OSDFIFOD((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_OSDBDPL(sc, n) (_HDAC_OSDBDPL((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_OSDBDPU(sc, n) (_HDAC_OSDBDPU((n), (sc)->num_iss, (sc)->num_oss)) + +#define HDAC_BSDCTL(sc, n) (_HDAC_BSDCTL((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_BSDSTS(sc, n) (_HDAC_BSDSTS((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_BSDPICB(sc, n) (_HDAC_BSDPICB((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_BSDCBL(sc, n) (_HDAC_BSDCBL((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_BSDLVI(sc, n) (_HDAC_BSDLVI((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_BSDFIFOD(sc, n) (_HDAC_BSDFIFOD((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_BSDBDPL(sc, n) (_HDAC_BSDBDPL((n), (sc)->num_iss, (sc)->num_oss)) +#define HDAC_BSDBDPU(sc, n) (_HDAC_BSDBDPU((n), (sc)->num_iss, (sc)->num_oss)) /**************************************************************************** * Custom hdac malloc type @@ -91,10 +91,10 @@ * with the device. ****************************************************************************/ struct hdac_mem { - struct resource *mem_res; - int mem_rid; - bus_space_tag_t mem_tag; - bus_space_handle_t mem_handle; + struct resource *mem_res; + int mem_rid; + bus_space_tag_t mem_tag; + bus_space_handle_t mem_handle; }; /**************************************************************************** @@ -104,9 +104,9 @@ * device. ****************************************************************************/ struct hdac_irq { - struct resource *irq_res; - int irq_rid; - void *irq_handle; + struct resource *irq_res; + int irq_rid; + void *irq_handle; }; /**************************************************************************** @@ -116,11 +116,11 @@ * states. ****************************************************************************/ struct hdac_dma { - bus_dma_tag_t dma_tag; - bus_dmamap_t dma_map; - bus_addr_t dma_paddr; - bus_size_t dma_size; - caddr_t dma_vaddr; + bus_dma_tag_t dma_tag; + bus_dmamap_t dma_map; + bus_addr_t dma_paddr; + bus_size_t dma_size; + caddr_t dma_vaddr; }; /**************************************************************************** @@ -129,17 +129,17 @@ * Hold a response from a verb sent to a codec received via the rirb. ****************************************************************************/ struct hdac_rirb { - uint32_t response; - uint32_t response_ex; + uint32_t response; + uint32_t response_ex; }; -#define HDAC_RIRB_RESPONSE_EX_SDATA_IN_MASK 0x0000000f -#define HDAC_RIRB_RESPONSE_EX_SDATA_IN_OFFSET 0 -#define HDAC_RIRB_RESPONSE_EX_UNSOLICITED 0x00000010 +#define HDAC_RIRB_RESPONSE_EX_SDATA_IN_MASK 0x0000000f +#define HDAC_RIRB_RESPONSE_EX_SDATA_IN_OFFSET 0 +#define HDAC_RIRB_RESPONSE_EX_UNSOLICITED 0x00000010 -#define HDAC_RIRB_RESPONSE_EX_SDATA_IN(response_ex) \ - (((response_ex) & HDAC_RIRB_RESPONSE_EX_SDATA_IN_MASK) >> \ - HDAC_RIRB_RESPONSE_EX_SDATA_IN_OFFSET) +#define HDAC_RIRB_RESPONSE_EX_SDATA_IN(response_ex) \ + (((response_ex) & HDAC_RIRB_RESPONSE_EX_SDATA_IN_MASK) >> \ + HDAC_RIRB_RESPONSE_EX_SDATA_IN_OFFSET) struct hdac_bdle { volatile uint32_t addrl; @@ -149,78 +149,78 @@ } __packed; struct hdac_stream { - device_t dev; - struct hdac_dma bdl; - int dir; - int stream; - int blksz; - int running; - int bw; - int stripe; - uint16_t format; + device_t dev; + struct hdac_dma bdl; + int dir; + int stream; + int blksz; + int running; + int bw; + int stripe; + uint16_t format; }; struct hdac_softc { - device_t dev; - struct mtx *lock; + device_t dev; + struct mtx *lock; struct intr_config_hook intrhook; - struct hdac_mem mem; - struct hdac_irq irq; + struct hdac_mem mem; + struct hdac_irq irq; - uint32_t quirks_on; - uint32_t quirks_off; - uint32_t flags; -#define HDAC_F_DMA_NOCACHE 0x00000001 + uint32_t quirks_on; + uint32_t quirks_off; + uint32_t flags; +#define HDAC_F_DMA_NOCACHE 0x00000001 - int num_iss; - int num_oss; - int num_bss; - int num_ss; - int num_sdo; - int support_64bit; + int num_iss; + int num_oss; + int num_bss; + int num_ss; + int num_sdo; + int support_64bit; - int corb_size; + int corb_size; struct hdac_dma corb_dma; - int corb_wp; + int corb_wp; - int rirb_size; - struct hdac_dma rirb_dma; - int rirb_rp; + int rirb_size; + struct hdac_dma rirb_dma; + int rirb_rp; - struct hdac_dma pos_dma; + struct hdac_dma pos_dma; - bus_dma_tag_t chan_dmat; + bus_dma_tag_t chan_dmat; /* Polling */ - int polling; - int poll_ival; - struct callout poll_callout; + int polling; + int poll_ival; + struct callout poll_callout; - int unsol_registered; - struct task unsolq_task; -#define HDAC_UNSOLQ_MAX 64 -#define HDAC_UNSOLQ_READY 0 -#define HDAC_UNSOLQ_BUSY 1 - int unsolq_rp; - int unsolq_wp; - int unsolq_st; - uint32_t unsolq[HDAC_UNSOLQ_MAX]; + int unsol_registered; + struct task unsolq_task; +#define HDAC_UNSOLQ_MAX 64 +#define HDAC_UNSOLQ_READY 0 +#define HDAC_UNSOLQ_BUSY 1 + int unsolq_rp; + int unsolq_wp; + int unsolq_st; + uint32_t unsolq[HDAC_UNSOLQ_MAX]; - int sdo_bw_used; + int sdo_bw_used; - struct hdac_stream *streams; + struct hdac_stream *streams; struct { - device_t dev; - uint16_t vendor_id; - uint16_t device_id; - uint8_t revision_id; - uint8_t stepping_id; - int pending; - uint32_t response; - int sdi_bw_used; + device_t dev; + uint16_t vendor_id; + uint16_t device_id; + uint8_t revision_id; + uint8_t stepping_id; + int pending; + uint32_t response; + int sdi_bw_used; } codecs[HDAC_CODEC_MAX]; }; Index: sys/dev/sound/pci/hda/hdac_reg.h =================================================================== --- sys/dev/sound/pci/hda/hdac_reg.h +++ sys/dev/sound/pci/hda/hdac_reg.h @@ -32,237 +32,242 @@ /**************************************************************************** * HDA Controller Register Set ****************************************************************************/ -#define HDAC_GCAP 0x00 /* 2 - Global Capabilities*/ -#define HDAC_VMIN 0x02 /* 1 - Minor Version */ -#define HDAC_VMAJ 0x03 /* 1 - Major Version */ -#define HDAC_OUTPAY 0x04 /* 2 - Output Payload Capability */ -#define HDAC_INPAY 0x06 /* 2 - Input Payload Capability */ -#define HDAC_GCTL 0x08 /* 4 - Global Control */ -#define HDAC_WAKEEN 0x0c /* 2 - Wake Enable */ -#define HDAC_STATESTS 0x0e /* 2 - State Change Status */ -#define HDAC_GSTS 0x10 /* 2 - Global Status */ -#define HDAC_OUTSTRMPAY 0x18 /* 2 - Output Stream Payload Capability */ -#define HDAC_INSTRMPAY 0x1a /* 2 - Input Stream Payload Capability */ -#define HDAC_INTCTL 0x20 /* 4 - Interrupt Control */ -#define HDAC_INTSTS 0x24 /* 4 - Interrupt Status */ -#define HDAC_WALCLK 0x30 /* 4 - Wall Clock Counter */ -#define HDAC_SSYNC 0x38 /* 4 - Stream Synchronization */ -#define HDAC_CORBLBASE 0x40 /* 4 - CORB Lower Base Address */ -#define HDAC_CORBUBASE 0x44 /* 4 - CORB Upper Base Address */ -#define HDAC_CORBWP 0x48 /* 2 - CORB Write Pointer */ -#define HDAC_CORBRP 0x4a /* 2 - CORB Read Pointer */ -#define HDAC_CORBCTL 0x4c /* 1 - CORB Control */ -#define HDAC_CORBSTS 0x4d /* 1 - CORB Status */ -#define HDAC_CORBSIZE 0x4e /* 1 - CORB Size */ -#define HDAC_RIRBLBASE 0x50 /* 4 - RIRB Lower Base Address */ -#define HDAC_RIRBUBASE 0x54 /* 4 - RIRB Upper Base Address */ -#define HDAC_RIRBWP 0x58 /* 2 - RIRB Write Pointer */ -#define HDAC_RINTCNT 0x5a /* 2 - Response Interrupt Count */ -#define HDAC_RIRBCTL 0x5c /* 1 - RIRB Control */ -#define HDAC_RIRBSTS 0x5d /* 1 - RIRB Status */ -#define HDAC_RIRBSIZE 0x5e /* 1 - RIRB Size */ -#define HDAC_ICOI 0x60 /* 4 - Immediate Command Output Interface */ -#define HDAC_ICII 0x64 /* 4 - Immediate Command Input Interface */ -#define HDAC_ICIS 0x68 /* 2 - Immediate Command Status */ -#define HDAC_DPIBLBASE 0x70 /* 4 - DMA Position Buffer Lower Base */ -#define HDAC_DPIBUBASE 0x74 /* 4 - DMA Position Buffer Upper Base */ -#define HDAC_SDCTL0 0x80 /* 3 - Stream Descriptor Control */ -#define HDAC_SDCTL1 0x81 /* 3 - Stream Descriptor Control */ -#define HDAC_SDCTL2 0x82 /* 3 - Stream Descriptor Control */ -#define HDAC_SDSTS 0x83 /* 1 - Stream Descriptor Status */ -#define HDAC_SDLPIB 0x84 /* 4 - Link Position in Buffer */ -#define HDAC_SDCBL 0x88 /* 4 - Cyclic Buffer Length */ -#define HDAC_SDLVI 0x8C /* 2 - Last Valid Index */ -#define HDAC_SDFIFOS 0x90 /* 2 - FIFOS */ -#define HDAC_SDFMT 0x92 /* 2 - fmt */ -#define HDAC_SDBDPL 0x98 /* 4 - Buffer Descriptor Pointer Lower Base */ -#define HDAC_SDBDPU 0x9C /* 4 - Buffer Descriptor Pointer Upper Base */ - -#define _HDAC_ISDOFFSET(n, iss, oss) (0x80 + ((n) * 0x20)) -#define _HDAC_ISDCTL(n, iss, oss) (0x00 + _HDAC_ISDOFFSET(n, iss, oss)) -#define _HDAC_ISDSTS(n, iss, oss) (0x03 + _HDAC_ISDOFFSET(n, iss, oss)) -#define _HDAC_ISDPICB(n, iss, oss) (0x04 + _HDAC_ISDOFFSET(n, iss, oss)) -#define _HDAC_ISDCBL(n, iss, oss) (0x08 + _HDAC_ISDOFFSET(n, iss, oss)) -#define _HDAC_ISDLVI(n, iss, oss) (0x0c + _HDAC_ISDOFFSET(n, iss, oss)) -#define _HDAC_ISDFIFOD(n, iss, oss) (0x10 + _HDAC_ISDOFFSET(n, iss, oss)) -#define _HDAC_ISDFMT(n, iss, oss) (0x12 + _HDAC_ISDOFFSET(n, iss, oss)) -#define _HDAC_ISDBDPL(n, iss, oss) (0x18 + _HDAC_ISDOFFSET(n, iss, oss)) -#define _HDAC_ISDBDPU(n, iss, oss) (0x1c + _HDAC_ISDOFFSET(n, iss, oss)) - -#define _HDAC_OSDOFFSET(n, iss, oss) (0x80 + ((iss) * 0x20) + ((n) * 0x20)) -#define _HDAC_OSDCTL(n, iss, oss) (0x00 + _HDAC_OSDOFFSET(n, iss, oss)) -#define _HDAC_OSDSTS(n, iss, oss) (0x03 + _HDAC_OSDOFFSET(n, iss, oss)) -#define _HDAC_OSDPICB(n, iss, oss) (0x04 + _HDAC_OSDOFFSET(n, iss, oss)) -#define _HDAC_OSDCBL(n, iss, oss) (0x08 + _HDAC_OSDOFFSET(n, iss, oss)) -#define _HDAC_OSDLVI(n, iss, oss) (0x0c + _HDAC_OSDOFFSET(n, iss, oss)) -#define _HDAC_OSDFIFOD(n, iss, oss) (0x10 + _HDAC_OSDOFFSET(n, iss, oss)) -#define _HDAC_OSDFMT(n, iss, oss) (0x12 + _HDAC_OSDOFFSET(n, iss, oss)) -#define _HDAC_OSDBDPL(n, iss, oss) (0x18 + _HDAC_OSDOFFSET(n, iss, oss)) -#define _HDAC_OSDBDPU(n, iss, oss) (0x1c + _HDAC_OSDOFFSET(n, iss, oss)) - -#define _HDAC_BSDOFFSET(n, iss, oss) (0x80 + ((iss) * 0x20) + ((oss) * 0x20) + ((n) * 0x20)) -#define _HDAC_BSDCTL(n, iss, oss) (0x00 + _HDAC_BSDOFFSET(n, iss, oss)) -#define _HDAC_BSDSTS(n, iss, oss) (0x03 + _HDAC_BSDOFFSET(n, iss, oss)) -#define _HDAC_BSDPICB(n, iss, oss) (0x04 + _HDAC_BSDOFFSET(n, iss, oss)) -#define _HDAC_BSDCBL(n, iss, oss) (0x08 + _HDAC_BSDOFFSET(n, iss, oss)) -#define _HDAC_BSDLVI(n, iss, oss) (0x0c + _HDAC_BSDOFFSET(n, iss, oss)) -#define _HDAC_BSDFIFOD(n, iss, oss) (0x10 + _HDAC_BSDOFFSET(n, iss, oss)) -#define _HDAC_BSDFMT(n, iss, oss) (0x12 + _HDAC_BSDOFFSET(n, iss, oss)) -#define _HDAC_BSDBDPL(n, iss, oss) (0x18 + _HDAC_BSDOFFSET(n, iss, oss)) -#define _HDAC_BSDBDBU(n, iss, oss) (0x1c + _HDAC_BSDOFFSET(n, iss, oss)) +#define HDAC_GCAP 0x00 /* 2 - Global Capabilities*/ +#define HDAC_VMIN 0x02 /* 1 - Minor Version */ +#define HDAC_VMAJ 0x03 /* 1 - Major Version */ +#define HDAC_OUTPAY 0x04 /* 2 - Output Payload Capability */ +#define HDAC_INPAY 0x06 /* 2 - Input Payload Capability */ +#define HDAC_GCTL 0x08 /* 4 - Global Control */ +#define HDAC_WAKEEN 0x0c /* 2 - Wake Enable */ +#define HDAC_STATESTS 0x0e /* 2 - State Change Status */ +#define HDAC_GSTS 0x10 /* 2 - Global Status */ +#define HDAC_OUTSTRMPAY 0x18 /* 2 - Output Stream Payload Capability */ +#define HDAC_INSTRMPAY 0x1a /* 2 - Input Stream Payload Capability */ +#define HDAC_INTCTL 0x20 /* 4 - Interrupt Control */ +#define HDAC_INTSTS 0x24 /* 4 - Interrupt Status */ +#define HDAC_WALCLK 0x30 /* 4 - Wall Clock Counter */ +#define HDAC_SSYNC 0x38 /* 4 - Stream Synchronization */ +#define HDAC_CORBLBASE 0x40 /* 4 - CORB Lower Base Address */ +#define HDAC_CORBUBASE 0x44 /* 4 - CORB Upper Base Address */ +#define HDAC_CORBWP 0x48 /* 2 - CORB Write Pointer */ +#define HDAC_CORBRP 0x4a /* 2 - CORB Read Pointer */ +#define HDAC_CORBCTL 0x4c /* 1 - CORB Control */ +#define HDAC_CORBSTS 0x4d /* 1 - CORB Status */ +#define HDAC_CORBSIZE 0x4e /* 1 - CORB Size */ +#define HDAC_RIRBLBASE 0x50 /* 4 - RIRB Lower Base Address */ +#define HDAC_RIRBUBASE 0x54 /* 4 - RIRB Upper Base Address */ +#define HDAC_RIRBWP 0x58 /* 2 - RIRB Write Pointer */ +#define HDAC_RINTCNT 0x5a /* 2 - Response Interrupt Count */ +#define HDAC_RIRBCTL 0x5c /* 1 - RIRB Control */ +#define HDAC_RIRBSTS 0x5d /* 1 - RIRB Status */ +#define HDAC_RIRBSIZE 0x5e /* 1 - RIRB Size */ +#define HDAC_ICOI 0x60 /* 4 - Immediate Command Output Interface */ +#define HDAC_ICII 0x64 /* 4 - Immediate Command Input Interface */ +#define HDAC_ICIS 0x68 /* 2 - Immediate Command Status */ +#define HDAC_DPIBLBASE 0x70 /* 4 - DMA Position Buffer Lower Base */ +#define HDAC_DPIBUBASE 0x74 /* 4 - DMA Position Buffer Upper Base */ +#define HDAC_SDCTL0 0x80 /* 3 - Stream Descriptor Control */ +#define HDAC_SDCTL1 0x81 /* 3 - Stream Descriptor Control */ +#define HDAC_SDCTL2 0x82 /* 3 - Stream Descriptor Control */ +#define HDAC_SDSTS 0x83 /* 1 - Stream Descriptor Status */ +#define HDAC_SDLPIB 0x84 /* 4 - Link Position in Buffer */ +#define HDAC_SDCBL 0x88 /* 4 - Cyclic Buffer Length */ +#define HDAC_SDLVI 0x8C /* 2 - Last Valid Index */ +#define HDAC_SDFIFOS 0x90 /* 2 - FIFOS */ +#define HDAC_SDFMT 0x92 /* 2 - fmt */ +#define HDAC_SDBDPL 0x98 /* 4 - Buffer Descriptor Pointer Lower Base */ +#define HDAC_SDBDPU 0x9C /* 4 - Buffer Descriptor Pointer Upper Base */ + +#define _HDAC_ISDOFFSET(n, iss, oss) (0x80 + ((n) * 0x20)) +#define _HDAC_ISDCTL(n, iss, oss) (0x00 + _HDAC_ISDOFFSET(n, iss, oss)) +#define _HDAC_ISDSTS(n, iss, oss) (0x03 + _HDAC_ISDOFFSET(n, iss, oss)) +#define _HDAC_ISDPICB(n, iss, oss) (0x04 + _HDAC_ISDOFFSET(n, iss, oss)) +#define _HDAC_ISDCBL(n, iss, oss) (0x08 + _HDAC_ISDOFFSET(n, iss, oss)) +#define _HDAC_ISDLVI(n, iss, oss) (0x0c + _HDAC_ISDOFFSET(n, iss, oss)) +#define _HDAC_ISDFIFOD(n, iss, oss) (0x10 + _HDAC_ISDOFFSET(n, iss, oss)) +#define _HDAC_ISDFMT(n, iss, oss) (0x12 + _HDAC_ISDOFFSET(n, iss, oss)) +#define _HDAC_ISDBDPL(n, iss, oss) (0x18 + _HDAC_ISDOFFSET(n, iss, oss)) +#define _HDAC_ISDBDPU(n, iss, oss) (0x1c + _HDAC_ISDOFFSET(n, iss, oss)) + +#define _HDAC_OSDOFFSET(n, iss, oss) (0x80 + ((iss) * 0x20) + ((n) * 0x20)) +#define _HDAC_OSDCTL(n, iss, oss) (0x00 + _HDAC_OSDOFFSET(n, iss, oss)) +#define _HDAC_OSDSTS(n, iss, oss) (0x03 + _HDAC_OSDOFFSET(n, iss, oss)) +#define _HDAC_OSDPICB(n, iss, oss) (0x04 + _HDAC_OSDOFFSET(n, iss, oss)) +#define _HDAC_OSDCBL(n, iss, oss) (0x08 + _HDAC_OSDOFFSET(n, iss, oss)) +#define _HDAC_OSDLVI(n, iss, oss) (0x0c + _HDAC_OSDOFFSET(n, iss, oss)) +#define _HDAC_OSDFIFOD(n, iss, oss) (0x10 + _HDAC_OSDOFFSET(n, iss, oss)) +#define _HDAC_OSDFMT(n, iss, oss) (0x12 + _HDAC_OSDOFFSET(n, iss, oss)) +#define _HDAC_OSDBDPL(n, iss, oss) (0x18 + _HDAC_OSDOFFSET(n, iss, oss)) +#define _HDAC_OSDBDPU(n, iss, oss) (0x1c + _HDAC_OSDOFFSET(n, iss, oss)) + +#define _HDAC_BSDOFFSET(n, iss, oss) \ + (0x80 + ((iss) * 0x20) + ((oss) * 0x20) + ((n) * 0x20)) +#define _HDAC_BSDCTL(n, iss, oss) (0x00 + _HDAC_BSDOFFSET(n, iss, oss)) +#define _HDAC_BSDSTS(n, iss, oss) (0x03 + _HDAC_BSDOFFSET(n, iss, oss)) +#define _HDAC_BSDPICB(n, iss, oss) (0x04 + _HDAC_BSDOFFSET(n, iss, oss)) +#define _HDAC_BSDCBL(n, iss, oss) (0x08 + _HDAC_BSDOFFSET(n, iss, oss)) +#define _HDAC_BSDLVI(n, iss, oss) (0x0c + _HDAC_BSDOFFSET(n, iss, oss)) +#define _HDAC_BSDFIFOD(n, iss, oss) (0x10 + _HDAC_BSDOFFSET(n, iss, oss)) +#define _HDAC_BSDFMT(n, iss, oss) (0x12 + _HDAC_BSDOFFSET(n, iss, oss)) +#define _HDAC_BSDBDPL(n, iss, oss) (0x18 + _HDAC_BSDOFFSET(n, iss, oss)) +#define _HDAC_BSDBDBU(n, iss, oss) (0x1c + _HDAC_BSDOFFSET(n, iss, oss)) /**************************************************************************** * HDA Controller Register Fields ****************************************************************************/ /* GCAP - Global Capabilities */ -#define HDAC_GCAP_64OK 0x0001 -#define HDAC_GCAP_NSDO_MASK 0x0006 -#define HDAC_GCAP_NSDO_SHIFT 1 -#define HDAC_GCAP_BSS_MASK 0x00f8 -#define HDAC_GCAP_BSS_SHIFT 3 -#define HDAC_GCAP_ISS_MASK 0x0f00 -#define HDAC_GCAP_ISS_SHIFT 8 -#define HDAC_GCAP_OSS_MASK 0xf000 -#define HDAC_GCAP_OSS_SHIFT 12 - -#define HDAC_GCAP_NSDO_1SDO 0x00 -#define HDAC_GCAP_NSDO_2SDO 0x02 -#define HDAC_GCAP_NSDO_4SDO 0x04 - -#define HDAC_GCAP_BSS(gcap) \ +#define HDAC_GCAP_64OK 0x0001 +#define HDAC_GCAP_NSDO_MASK 0x0006 +#define HDAC_GCAP_NSDO_SHIFT 1 +#define HDAC_GCAP_BSS_MASK 0x00f8 +#define HDAC_GCAP_BSS_SHIFT 3 +#define HDAC_GCAP_ISS_MASK 0x0f00 +#define HDAC_GCAP_ISS_SHIFT 8 +#define HDAC_GCAP_OSS_MASK 0xf000 +#define HDAC_GCAP_OSS_SHIFT 12 + +#define HDAC_GCAP_NSDO_1SDO 0x00 +#define HDAC_GCAP_NSDO_2SDO 0x02 +#define HDAC_GCAP_NSDO_4SDO 0x04 + +#define HDAC_GCAP_BSS(gcap) \ (((gcap) & HDAC_GCAP_BSS_MASK) >> HDAC_GCAP_BSS_SHIFT) -#define HDAC_GCAP_ISS(gcap) \ +#define HDAC_GCAP_ISS(gcap) \ (((gcap) & HDAC_GCAP_ISS_MASK) >> HDAC_GCAP_ISS_SHIFT) -#define HDAC_GCAP_OSS(gcap) \ +#define HDAC_GCAP_OSS(gcap) \ (((gcap) & HDAC_GCAP_OSS_MASK) >> HDAC_GCAP_OSS_SHIFT) -#define HDAC_GCAP_NSDO(gcap) \ +#define HDAC_GCAP_NSDO(gcap) \ (((gcap) & HDAC_GCAP_NSDO_MASK) >> HDAC_GCAP_NSDO_SHIFT) /* GCTL - Global Control */ -#define HDAC_GCTL_CRST 0x00000001 -#define HDAC_GCTL_FCNTRL 0x00000002 -#define HDAC_GCTL_UNSOL 0x00000100 +#define HDAC_GCTL_CRST 0x00000001 +#define HDAC_GCTL_FCNTRL 0x00000002 +#define HDAC_GCTL_UNSOL 0x00000100 /* WAKEEN - Wake Enable */ -#define HDAC_WAKEEN_SDIWEN_MASK 0x7fff -#define HDAC_WAKEEN_SDIWEN_SHIFT 0 +#define HDAC_WAKEEN_SDIWEN_MASK 0x7fff +#define HDAC_WAKEEN_SDIWEN_SHIFT 0 /* STATESTS - State Change Status */ -#define HDAC_STATESTS_SDIWAKE_MASK 0x7fff -#define HDAC_STATESTS_SDIWAKE_SHIFT 0 +#define HDAC_STATESTS_SDIWAKE_MASK 0x7fff +#define HDAC_STATESTS_SDIWAKE_SHIFT 0 -#define HDAC_STATESTS_SDIWAKE(statests, n) \ - (((((statests) & HDAC_STATESTS_SDIWAKE_MASK) >> \ - HDAC_STATESTS_SDIWAKE_SHIFT) >> (n)) & 0x0001) +#define HDAC_STATESTS_SDIWAKE(statests, n) \ + (((((statests) & HDAC_STATESTS_SDIWAKE_MASK) >> \ + HDAC_STATESTS_SDIWAKE_SHIFT) >> \ + (n)) & \ + 0x0001) /* GSTS - Global Status */ -#define HDAC_GSTS_FSTS 0x0002 +#define HDAC_GSTS_FSTS 0x0002 /* INTCTL - Interrut Control */ -#define HDAC_INTCTL_SIE_MASK 0x3fffffff -#define HDAC_INTCTL_SIE_SHIFT 0 -#define HDAC_INTCTL_CIE 0x40000000 -#define HDAC_INTCTL_GIE 0x80000000 +#define HDAC_INTCTL_SIE_MASK 0x3fffffff +#define HDAC_INTCTL_SIE_SHIFT 0 +#define HDAC_INTCTL_CIE 0x40000000 +#define HDAC_INTCTL_GIE 0x80000000 /* INTSTS - Interrupt Status */ -#define HDAC_INTSTS_SIS_MASK 0x3fffffff -#define HDAC_INTSTS_SIS_SHIFT 0 -#define HDAC_INTSTS_CIS 0x40000000 -#define HDAC_INTSTS_GIS 0x80000000 +#define HDAC_INTSTS_SIS_MASK 0x3fffffff +#define HDAC_INTSTS_SIS_SHIFT 0 +#define HDAC_INTSTS_CIS 0x40000000 +#define HDAC_INTSTS_GIS 0x80000000 /* SSYNC - Stream Synchronization */ -#define HDAC_SSYNC_SSYNC_MASK 0x3fffffff -#define HDAC_SSYNC_SSYNC_SHIFT 0 +#define HDAC_SSYNC_SSYNC_MASK 0x3fffffff +#define HDAC_SSYNC_SSYNC_SHIFT 0 /* CORBWP - CORB Write Pointer */ -#define HDAC_CORBWP_CORBWP_MASK 0x00ff -#define HDAC_CORBWP_CORBWP_SHIFT 0 +#define HDAC_CORBWP_CORBWP_MASK 0x00ff +#define HDAC_CORBWP_CORBWP_SHIFT 0 /* CORBRP - CORB Read Pointer */ -#define HDAC_CORBRP_CORBRP_MASK 0x00ff -#define HDAC_CORBRP_CORBRP_SHIFT 0 -#define HDAC_CORBRP_CORBRPRST 0x8000 +#define HDAC_CORBRP_CORBRP_MASK 0x00ff +#define HDAC_CORBRP_CORBRP_SHIFT 0 +#define HDAC_CORBRP_CORBRPRST 0x8000 /* CORBCTL - CORB Control */ -#define HDAC_CORBCTL_CMEIE 0x01 -#define HDAC_CORBCTL_CORBRUN 0x02 +#define HDAC_CORBCTL_CMEIE 0x01 +#define HDAC_CORBCTL_CORBRUN 0x02 /* CORBSTS - CORB Status */ -#define HDAC_CORBSTS_CMEI 0x01 +#define HDAC_CORBSTS_CMEI 0x01 /* CORBSIZE - CORB Size */ -#define HDAC_CORBSIZE_CORBSIZE_MASK 0x03 -#define HDAC_CORBSIZE_CORBSIZE_SHIFT 0 -#define HDAC_CORBSIZE_CORBSZCAP_MASK 0xf0 -#define HDAC_CORBSIZE_CORBSZCAP_SHIFT 4 +#define HDAC_CORBSIZE_CORBSIZE_MASK 0x03 +#define HDAC_CORBSIZE_CORBSIZE_SHIFT 0 +#define HDAC_CORBSIZE_CORBSZCAP_MASK 0xf0 +#define HDAC_CORBSIZE_CORBSZCAP_SHIFT 4 -#define HDAC_CORBSIZE_CORBSIZE_2 0x00 -#define HDAC_CORBSIZE_CORBSIZE_16 0x01 -#define HDAC_CORBSIZE_CORBSIZE_256 0x02 +#define HDAC_CORBSIZE_CORBSIZE_2 0x00 +#define HDAC_CORBSIZE_CORBSIZE_16 0x01 +#define HDAC_CORBSIZE_CORBSIZE_256 0x02 -#define HDAC_CORBSIZE_CORBSZCAP_2 0x10 -#define HDAC_CORBSIZE_CORBSZCAP_16 0x20 -#define HDAC_CORBSIZE_CORBSZCAP_256 0x40 +#define HDAC_CORBSIZE_CORBSZCAP_2 0x10 +#define HDAC_CORBSIZE_CORBSZCAP_16 0x20 +#define HDAC_CORBSIZE_CORBSZCAP_256 0x40 -#define HDAC_CORBSIZE_CORBSIZE(corbsize) \ - (((corbsize) & HDAC_CORBSIZE_CORBSIZE_MASK) >> HDAC_CORBSIZE_CORBSIZE_SHIFT) +#define HDAC_CORBSIZE_CORBSIZE(corbsize) \ + (((corbsize) & HDAC_CORBSIZE_CORBSIZE_MASK) >> \ + HDAC_CORBSIZE_CORBSIZE_SHIFT) /* RIRBWP - RIRB Write Pointer */ -#define HDAC_RIRBWP_RIRBWP_MASK 0x00ff -#define HDAC_RIRBWP_RIRBWP_SHIFT 0 -#define HDAC_RIRBWP_RIRBWPRST 0x8000 +#define HDAC_RIRBWP_RIRBWP_MASK 0x00ff +#define HDAC_RIRBWP_RIRBWP_SHIFT 0 +#define HDAC_RIRBWP_RIRBWPRST 0x8000 /* RINTCTN - Response Interrupt Count */ -#define HDAC_RINTCNT_MASK 0x00ff -#define HDAC_RINTCNT_SHIFT 0 +#define HDAC_RINTCNT_MASK 0x00ff +#define HDAC_RINTCNT_SHIFT 0 /* RIRBCTL - RIRB Control */ -#define HDAC_RIRBCTL_RINTCTL 0x01 -#define HDAC_RIRBCTL_RIRBDMAEN 0x02 -#define HDAC_RIRBCTL_RIRBOIC 0x04 +#define HDAC_RIRBCTL_RINTCTL 0x01 +#define HDAC_RIRBCTL_RIRBDMAEN 0x02 +#define HDAC_RIRBCTL_RIRBOIC 0x04 /* RIRBSTS - RIRB Status */ -#define HDAC_RIRBSTS_RINTFL 0x01 -#define HDAC_RIRBSTS_RIRBOIS 0x04 +#define HDAC_RIRBSTS_RINTFL 0x01 +#define HDAC_RIRBSTS_RIRBOIS 0x04 /* RIRBSIZE - RIRB Size */ -#define HDAC_RIRBSIZE_RIRBSIZE_MASK 0x03 -#define HDAC_RIRBSIZE_RIRBSIZE_SHIFT 0 -#define HDAC_RIRBSIZE_RIRBSZCAP_MASK 0xf0 -#define HDAC_RIRBSIZE_RIRBSZCAP_SHIFT 4 +#define HDAC_RIRBSIZE_RIRBSIZE_MASK 0x03 +#define HDAC_RIRBSIZE_RIRBSIZE_SHIFT 0 +#define HDAC_RIRBSIZE_RIRBSZCAP_MASK 0xf0 +#define HDAC_RIRBSIZE_RIRBSZCAP_SHIFT 4 -#define HDAC_RIRBSIZE_RIRBSIZE_2 0x00 -#define HDAC_RIRBSIZE_RIRBSIZE_16 0x01 -#define HDAC_RIRBSIZE_RIRBSIZE_256 0x02 +#define HDAC_RIRBSIZE_RIRBSIZE_2 0x00 +#define HDAC_RIRBSIZE_RIRBSIZE_16 0x01 +#define HDAC_RIRBSIZE_RIRBSIZE_256 0x02 -#define HDAC_RIRBSIZE_RIRBSZCAP_2 0x10 -#define HDAC_RIRBSIZE_RIRBSZCAP_16 0x20 -#define HDAC_RIRBSIZE_RIRBSZCAP_256 0x40 +#define HDAC_RIRBSIZE_RIRBSZCAP_2 0x10 +#define HDAC_RIRBSIZE_RIRBSZCAP_16 0x20 +#define HDAC_RIRBSIZE_RIRBSZCAP_256 0x40 -#define HDAC_RIRBSIZE_RIRBSIZE(rirbsize) \ - (((rirbsize) & HDAC_RIRBSIZE_RIRBSIZE_MASK) >> HDAC_RIRBSIZE_RIRBSIZE_SHIFT) +#define HDAC_RIRBSIZE_RIRBSIZE(rirbsize) \ + (((rirbsize) & HDAC_RIRBSIZE_RIRBSIZE_MASK) >> \ + HDAC_RIRBSIZE_RIRBSIZE_SHIFT) /* DPLBASE - DMA Position Lower Base Address */ -#define HDAC_DPLBASE_DPLBASE_MASK 0xffffff80 -#define HDAC_DPLBASE_DPLBASE_SHIFT 7 -#define HDAC_DPLBASE_DPLBASE_DMAPBE 0x00000001 +#define HDAC_DPLBASE_DPLBASE_MASK 0xffffff80 +#define HDAC_DPLBASE_DPLBASE_SHIFT 7 +#define HDAC_DPLBASE_DPLBASE_DMAPBE 0x00000001 /* SDCTL - Stream Descriptor Control */ -#define HDAC_SDCTL_SRST 0x000001 -#define HDAC_SDCTL_RUN 0x000002 -#define HDAC_SDCTL_IOCE 0x000004 -#define HDAC_SDCTL_FEIE 0x000008 -#define HDAC_SDCTL_DEIE 0x000010 -#define HDAC_SDCTL2_STRIPE_MASK 0x03 -#define HDAC_SDCTL2_STRIPE_SHIFT 0 -#define HDAC_SDCTL2_TP 0x04 -#define HDAC_SDCTL2_DIR 0x08 -#define HDAC_SDCTL2_STRM_MASK 0xf0 -#define HDAC_SDCTL2_STRM_SHIFT 4 - -#define HDAC_SDSTS_DESE (1 << 4) -#define HDAC_SDSTS_FIFOE (1 << 3) -#define HDAC_SDSTS_BCIS (1 << 2) +#define HDAC_SDCTL_SRST 0x000001 +#define HDAC_SDCTL_RUN 0x000002 +#define HDAC_SDCTL_IOCE 0x000004 +#define HDAC_SDCTL_FEIE 0x000008 +#define HDAC_SDCTL_DEIE 0x000010 +#define HDAC_SDCTL2_STRIPE_MASK 0x03 +#define HDAC_SDCTL2_STRIPE_SHIFT 0 +#define HDAC_SDCTL2_TP 0x04 +#define HDAC_SDCTL2_DIR 0x08 +#define HDAC_SDCTL2_STRM_MASK 0xf0 +#define HDAC_SDCTL2_STRM_SHIFT 4 + +#define HDAC_SDSTS_DESE (1 << 4) +#define HDAC_SDSTS_FIFOE (1 << 3) +#define HDAC_SDSTS_BCIS (1 << 2) #endif Index: sys/dev/sound/pci/hda/hdacc.c =================================================================== --- sys/dev/sound/pci/hda/hdacc.c +++ sys/dev/sound/pci/hda/hdacc.c @@ -36,33 +36,32 @@ #include "opt_snd.h" #endif -#include - #include #include #include +#include struct hdacc_fg { - device_t dev; - nid_t nid; - uint8_t type; - uint32_t subsystem_id; + device_t dev; + nid_t nid; + uint8_t type; + uint32_t subsystem_id; }; struct hdacc_softc { - device_t dev; - struct mtx *lock; - nid_t cad; - device_t streams[2][16]; - device_t tags[64]; - int fgcnt; - struct hdacc_fg *fgs; + device_t dev; + struct mtx *lock; + nid_t cad; + device_t streams[2][16]; + device_t tags[64]; + int fgcnt; + struct hdacc_fg *fgs; }; -#define hdacc_lock(codec) snd_mtxlock((codec)->lock) -#define hdacc_unlock(codec) snd_mtxunlock((codec)->lock) -#define hdacc_lockassert(codec) snd_mtxassert((codec)->lock) +#define hdacc_lock(codec) snd_mtxlock((codec)->lock) +#define hdacc_unlock(codec) snd_mtxunlock((codec)->lock) +#define hdacc_lockassert(codec) snd_mtxassert((codec)->lock) MALLOC_DEFINE(M_HDACC, "hdacc", "HDA CODEC"); @@ -72,363 +71,359 @@ uint16_t revid; const char *name; } hdacc_codecs[] = { - { HDA_CODEC_CS4206, 0, "Cirrus Logic CS4206" }, - { HDA_CODEC_CS4207, 0, "Cirrus Logic CS4207" }, - { HDA_CODEC_CS4210, 0, "Cirrus Logic CS4210" }, - { HDA_CODEC_ALC215, 0, "Realtek ALC215" }, - { HDA_CODEC_ALC221, 0, "Realtek ALC221" }, - { HDA_CODEC_ALC222, 0, "Realtek ALC222" }, - { HDA_CODEC_ALC225, 0, "Realtek ALC225" }, - { HDA_CODEC_ALC230, 0, "Realtek ALC230" }, - { HDA_CODEC_ALC231, 0, "Realtek ALC231" }, - { HDA_CODEC_ALC233, 0, "Realtek ALC233" }, - { HDA_CODEC_ALC234, 0, "Realtek ALC234" }, - { HDA_CODEC_ALC235, 0, "Realtek ALC235" }, - { HDA_CODEC_ALC236, 0, "Realtek ALC236" }, - { HDA_CODEC_ALC245, 0, "Realtek ALC245" }, - { HDA_CODEC_ALC255, 0, "Realtek ALC255" }, - { HDA_CODEC_ALC256, 0, "Realtek ALC256" }, - { HDA_CODEC_ALC257, 0, "Realtek ALC257" }, - { HDA_CODEC_ALC260, 0, "Realtek ALC260" }, - { HDA_CODEC_ALC262, 0, "Realtek ALC262" }, - { HDA_CODEC_ALC267, 0, "Realtek ALC267" }, - { HDA_CODEC_ALC268, 0, "Realtek ALC268" }, - { HDA_CODEC_ALC269, 0, "Realtek ALC269" }, - { HDA_CODEC_ALC270, 0, "Realtek ALC270" }, - { HDA_CODEC_ALC272, 0, "Realtek ALC272" }, - { HDA_CODEC_ALC273, 0, "Realtek ALC273" }, - { HDA_CODEC_ALC274, 0, "Realtek ALC274" }, - { HDA_CODEC_ALC275, 0, "Realtek ALC275" }, - { HDA_CODEC_ALC276, 0, "Realtek ALC276" }, - { HDA_CODEC_ALC292, 0, "Realtek ALC292" }, - { HDA_CODEC_ALC295, 0, "Realtek ALC295" }, - { HDA_CODEC_ALC280, 0, "Realtek ALC280" }, - { HDA_CODEC_ALC282, 0, "Realtek ALC282" }, - { HDA_CODEC_ALC283, 0, "Realtek ALC283" }, - { HDA_CODEC_ALC284, 0, "Realtek ALC284" }, - { HDA_CODEC_ALC285, 0, "Realtek ALC285" }, - { HDA_CODEC_ALC286, 0, "Realtek ALC286" }, - { HDA_CODEC_ALC288, 0, "Realtek ALC288" }, - { HDA_CODEC_ALC289, 0, "Realtek ALC289" }, - { HDA_CODEC_ALC290, 0, "Realtek ALC290" }, - { HDA_CODEC_ALC292, 0, "Realtek ALC292" }, - { HDA_CODEC_ALC293, 0, "Realtek ALC293" }, - { HDA_CODEC_ALC294, 0, "Realtek ALC294" }, - { HDA_CODEC_ALC295, 0, "Realtek ALC295" }, - { HDA_CODEC_ALC298, 0, "Realtek ALC298" }, - { HDA_CODEC_ALC299, 0, "Realtek ALC299" }, - { HDA_CODEC_ALC300, 0, "Realtek ALC300" }, - { HDA_CODEC_ALC623, 0, "Realtek ALC623" }, - { HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" }, - { HDA_CODEC_ALC662, 0x0002, "Realtek ALC662 rev2" }, - { HDA_CODEC_ALC662, 0x0101, "Realtek ALC662 rev1" }, - { HDA_CODEC_ALC662, 0x0300, "Realtek ALC662 rev3" }, - { HDA_CODEC_ALC662, 0, "Realtek ALC662" }, - { HDA_CODEC_ALC663, 0, "Realtek ALC663" }, - { HDA_CODEC_ALC665, 0, "Realtek ALC665" }, - { HDA_CODEC_ALC670, 0, "Realtek ALC670" }, - { HDA_CODEC_ALC671, 0, "Realtek ALC671" }, - { HDA_CODEC_ALC680, 0, "Realtek ALC680" }, - { HDA_CODEC_ALC700, 0, "Realtek ALC700" }, - { HDA_CODEC_ALC701, 0, "Realtek ALC701" }, - { HDA_CODEC_ALC703, 0, "Realtek ALC703" }, - { HDA_CODEC_ALC861, 0x0340, "Realtek ALC660" }, - { HDA_CODEC_ALC861, 0, "Realtek ALC861" }, - { HDA_CODEC_ALC861VD, 0, "Realtek ALC861-VD" }, - { HDA_CODEC_ALC880, 0, "Realtek ALC880" }, - { HDA_CODEC_ALC882, 0, "Realtek ALC882" }, - { HDA_CODEC_ALC883, 0, "Realtek ALC883" }, - { HDA_CODEC_ALC885, 0x0101, "Realtek ALC889A" }, - { HDA_CODEC_ALC885, 0x0103, "Realtek ALC889A" }, - { HDA_CODEC_ALC885, 0, "Realtek ALC885" }, - { HDA_CODEC_ALC887, 0, "Realtek ALC887" }, - { HDA_CODEC_ALC888, 0x0101, "Realtek ALC1200" }, - { HDA_CODEC_ALC888, 0, "Realtek ALC888" }, - { HDA_CODEC_ALC889, 0, "Realtek ALC889" }, - { HDA_CODEC_ALC892, 0, "Realtek ALC892" }, - { HDA_CODEC_ALC897, 0, "Realtek ALC897" }, - { HDA_CODEC_ALC899, 0, "Realtek ALC899" }, - { HDA_CODEC_ALC1150, 0, "Realtek ALC1150" }, - { HDA_CODEC_ALCS1200A, 0, "Realtek ALCS1200A" }, - { HDA_CODEC_ALC1220_1, 0, "Realtek ALC1220" }, - { HDA_CODEC_ALC1220, 0, "Realtek ALC1220" }, - { HDA_CODEC_AD1882, 0, "Analog Devices AD1882" }, - { HDA_CODEC_AD1882A, 0, "Analog Devices AD1882A" }, - { HDA_CODEC_AD1883, 0, "Analog Devices AD1883" }, - { HDA_CODEC_AD1884, 0, "Analog Devices AD1884" }, - { HDA_CODEC_AD1884A, 0, "Analog Devices AD1884A" }, - { HDA_CODEC_AD1981HD, 0, "Analog Devices AD1981HD" }, - { HDA_CODEC_AD1983, 0, "Analog Devices AD1983" }, - { HDA_CODEC_AD1984, 0, "Analog Devices AD1984" }, - { HDA_CODEC_AD1984A, 0, "Analog Devices AD1984A" }, - { HDA_CODEC_AD1984B, 0, "Analog Devices AD1984B" }, - { HDA_CODEC_AD1986A, 0, "Analog Devices AD1986A" }, - { HDA_CODEC_AD1987, 0, "Analog Devices AD1987" }, - { HDA_CODEC_AD1988, 0, "Analog Devices AD1988A" }, - { HDA_CODEC_AD1988B, 0, "Analog Devices AD1988B" }, - { HDA_CODEC_AD1989A, 0, "Analog Devices AD1989A" }, - { HDA_CODEC_AD1989B, 0, "Analog Devices AD1989B" }, - { HDA_CODEC_CA0110, 0, "Creative CA0110-IBG" }, - { HDA_CODEC_CA0110_2, 0, "Creative CA0110-IBG" }, - { HDA_CODEC_CA0132, 0, "Creative CA0132" }, - { HDA_CODEC_SB0880, 0, "Creative SB0880 X-Fi" }, - { HDA_CODEC_CMI9880, 0, "CMedia CMI9880" }, - { HDA_CODEC_CMI98802, 0, "CMedia CMI9880" }, - { HDA_CODEC_CXD9872RDK, 0, "Sigmatel CXD9872RD/K" }, - { HDA_CODEC_CXD9872AKD, 0, "Sigmatel CXD9872AKD" }, - { HDA_CODEC_STAC9200D, 0, "Sigmatel STAC9200D" }, - { HDA_CODEC_STAC9204X, 0, "Sigmatel STAC9204X" }, - { HDA_CODEC_STAC9204D, 0, "Sigmatel STAC9204D" }, - { HDA_CODEC_STAC9205X, 0, "Sigmatel STAC9205X" }, - { HDA_CODEC_STAC9205D, 0, "Sigmatel STAC9205D" }, - { HDA_CODEC_STAC9220, 0, "Sigmatel STAC9220" }, - { HDA_CODEC_STAC9220_A1, 0, "Sigmatel STAC9220_A1" }, - { HDA_CODEC_STAC9220_A2, 0, "Sigmatel STAC9220_A2" }, - { HDA_CODEC_STAC9221, 0, "Sigmatel STAC9221" }, - { HDA_CODEC_STAC9221_A2, 0, "Sigmatel STAC9221_A2" }, - { HDA_CODEC_STAC9221D, 0, "Sigmatel STAC9221D" }, - { HDA_CODEC_STAC922XD, 0, "Sigmatel STAC9220D/9223D" }, - { HDA_CODEC_STAC9227X, 0, "Sigmatel STAC9227X" }, - { HDA_CODEC_STAC9227D, 0, "Sigmatel STAC9227D" }, - { HDA_CODEC_STAC9228X, 0, "Sigmatel STAC9228X" }, - { HDA_CODEC_STAC9228D, 0, "Sigmatel STAC9228D" }, - { HDA_CODEC_STAC9229X, 0, "Sigmatel STAC9229X" }, - { HDA_CODEC_STAC9229D, 0, "Sigmatel STAC9229D" }, - { HDA_CODEC_STAC9230X, 0, "Sigmatel STAC9230X" }, - { HDA_CODEC_STAC9230D, 0, "Sigmatel STAC9230D" }, - { HDA_CODEC_STAC9250, 0, "Sigmatel STAC9250" }, - { HDA_CODEC_STAC9251, 0, "Sigmatel STAC9251" }, - { HDA_CODEC_STAC9255, 0, "Sigmatel STAC9255" }, - { HDA_CODEC_STAC9255D, 0, "Sigmatel STAC9255D" }, - { HDA_CODEC_STAC9254, 0, "Sigmatel STAC9254" }, - { HDA_CODEC_STAC9254D, 0, "Sigmatel STAC9254D" }, - { HDA_CODEC_STAC9271X, 0, "Sigmatel STAC9271X" }, - { HDA_CODEC_STAC9271D, 0, "Sigmatel STAC9271D" }, - { HDA_CODEC_STAC9272X, 0, "Sigmatel STAC9272X" }, - { HDA_CODEC_STAC9272D, 0, "Sigmatel STAC9272D" }, - { HDA_CODEC_STAC9273X, 0, "Sigmatel STAC9273X" }, - { HDA_CODEC_STAC9273D, 0, "Sigmatel STAC9273D" }, - { HDA_CODEC_STAC9274, 0, "Sigmatel STAC9274" }, - { HDA_CODEC_STAC9274D, 0, "Sigmatel STAC9274D" }, - { HDA_CODEC_STAC9274X5NH, 0, "Sigmatel STAC9274X5NH" }, - { HDA_CODEC_STAC9274D5NH, 0, "Sigmatel STAC9274D5NH" }, - { HDA_CODEC_STAC9872AK, 0, "Sigmatel STAC9872AK" }, - { HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" }, - { HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" }, - { HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" }, - { HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" }, - { HDA_CODEC_IDT92HD66B1X5, 0, "IDT 92HD66B1X5" }, - { HDA_CODEC_IDT92HD66B2X5, 0, "IDT 92HD66B2X5" }, - { HDA_CODEC_IDT92HD66B3X5, 0, "IDT 92HD66B3X5" }, - { HDA_CODEC_IDT92HD66C1X5, 0, "IDT 92HD66C1X5" }, - { HDA_CODEC_IDT92HD66C2X5, 0, "IDT 92HD66C2X5" }, - { HDA_CODEC_IDT92HD66C3X5, 0, "IDT 92HD66C3X5" }, - { HDA_CODEC_IDT92HD66B1X3, 0, "IDT 92HD66B1X3" }, - { HDA_CODEC_IDT92HD66B2X3, 0, "IDT 92HD66B2X3" }, - { HDA_CODEC_IDT92HD66B3X3, 0, "IDT 92HD66B3X3" }, - { HDA_CODEC_IDT92HD66C1X3, 0, "IDT 92HD66C1X3" }, - { HDA_CODEC_IDT92HD66C2X3, 0, "IDT 92HD66C2X3" }, - { HDA_CODEC_IDT92HD66C3_65, 0, "IDT 92HD66C3_65" }, - { HDA_CODEC_IDT92HD700X, 0, "IDT 92HD700X" }, - { HDA_CODEC_IDT92HD700D, 0, "IDT 92HD700D" }, - { HDA_CODEC_IDT92HD71B5, 0, "IDT 92HD71B5" }, - { HDA_CODEC_IDT92HD71B5_2, 0, "IDT 92HD71B5" }, - { HDA_CODEC_IDT92HD71B6, 0, "IDT 92HD71B6" }, - { HDA_CODEC_IDT92HD71B6_2, 0, "IDT 92HD71B6" }, - { HDA_CODEC_IDT92HD71B7, 0, "IDT 92HD71B7" }, - { HDA_CODEC_IDT92HD71B7_2, 0, "IDT 92HD71B7" }, - { HDA_CODEC_IDT92HD71B8, 0, "IDT 92HD71B8" }, - { HDA_CODEC_IDT92HD71B8_2, 0, "IDT 92HD71B8" }, - { HDA_CODEC_IDT92HD73C1, 0, "IDT 92HD73C1" }, - { HDA_CODEC_IDT92HD73D1, 0, "IDT 92HD73D1" }, - { HDA_CODEC_IDT92HD73E1, 0, "IDT 92HD73E1" }, - { HDA_CODEC_IDT92HD75B3, 0, "IDT 92HD75B3" }, - { HDA_CODEC_IDT92HD75BX, 0, "IDT 92HD75BX" }, - { HDA_CODEC_IDT92HD81B1C, 0, "IDT 92HD81B1C" }, - { HDA_CODEC_IDT92HD81B1X, 0, "IDT 92HD81B1X" }, - { HDA_CODEC_IDT92HD83C1C, 0, "IDT 92HD83C1C" }, - { HDA_CODEC_IDT92HD83C1X, 0, "IDT 92HD83C1X" }, - { HDA_CODEC_IDT92HD87B1_3, 0, "IDT 92HD87B1/3" }, - { HDA_CODEC_IDT92HD87B2_4, 0, "IDT 92HD87B2/4" }, - { HDA_CODEC_IDT92HD89C3, 0, "IDT 92HD89C3" }, - { HDA_CODEC_IDT92HD89C2, 0, "IDT 92HD89C2" }, - { HDA_CODEC_IDT92HD89C1, 0, "IDT 92HD89C1" }, - { HDA_CODEC_IDT92HD89B3, 0, "IDT 92HD89B3" }, - { HDA_CODEC_IDT92HD89B2, 0, "IDT 92HD89B2" }, - { HDA_CODEC_IDT92HD89B1, 0, "IDT 92HD89B1" }, - { HDA_CODEC_IDT92HD89E3, 0, "IDT 92HD89E3" }, - { HDA_CODEC_IDT92HD89E2, 0, "IDT 92HD89E2" }, - { HDA_CODEC_IDT92HD89E1, 0, "IDT 92HD89E1" }, - { HDA_CODEC_IDT92HD89D3, 0, "IDT 92HD89D3" }, - { HDA_CODEC_IDT92HD89D2, 0, "IDT 92HD89D2" }, - { HDA_CODEC_IDT92HD89D1, 0, "IDT 92HD89D1" }, - { HDA_CODEC_IDT92HD89F3, 0, "IDT 92HD89F3" }, - { HDA_CODEC_IDT92HD89F2, 0, "IDT 92HD89F2" }, - { HDA_CODEC_IDT92HD89F1, 0, "IDT 92HD89F1" }, - { HDA_CODEC_IDT92HD90BXX, 0, "IDT 92HD90BXX" }, - { HDA_CODEC_IDT92HD91BXX, 0, "IDT 92HD91BXX" }, - { HDA_CODEC_IDT92HD93BXX, 0, "IDT 92HD93BXX" }, - { HDA_CODEC_IDT92HD95B, 0, "Tempo 92HD95B" }, - { HDA_CODEC_IDT92HD98BXX, 0, "IDT 92HD98BXX" }, - { HDA_CODEC_IDT92HD99BXX, 0, "IDT 92HD99BXX" }, - { HDA_CODEC_CX20549, 0, "Conexant CX20549 (Venice)" }, - { HDA_CODEC_CX20551, 0, "Conexant CX20551 (Waikiki)" }, - { HDA_CODEC_CX20561, 0, "Conexant CX20561 (Hermosa)" }, - { HDA_CODEC_CX20582, 0, "Conexant CX20582 (Pebble)" }, - { HDA_CODEC_CX20583, 0, "Conexant CX20583 (Pebble HSF)" }, - { HDA_CODEC_CX20584, 0, "Conexant CX20584" }, - { HDA_CODEC_CX20585, 0, "Conexant CX20585" }, - { HDA_CODEC_CX20588, 0, "Conexant CX20588" }, - { HDA_CODEC_CX20590, 0, "Conexant CX20590" }, - { HDA_CODEC_CX20631, 0, "Conexant CX20631" }, - { HDA_CODEC_CX20632, 0, "Conexant CX20632" }, - { HDA_CODEC_CX20641, 0, "Conexant CX20641" }, - { HDA_CODEC_CX20642, 0, "Conexant CX20642" }, - { HDA_CODEC_CX20651, 0, "Conexant CX20651" }, - { HDA_CODEC_CX20652, 0, "Conexant CX20652" }, - { HDA_CODEC_CX20664, 0, "Conexant CX20664" }, - { HDA_CODEC_CX20665, 0, "Conexant CX20665" }, - { HDA_CODEC_CX21722, 0, "Conexant CX21722" }, - { HDA_CODEC_CX20722, 0, "Conexant CX20722" }, - { HDA_CODEC_CX21724, 0, "Conexant CX21724" }, - { HDA_CODEC_CX20724, 0, "Conexant CX20724" }, - { HDA_CODEC_CX20751, 0, "Conexant CX20751/2" }, - { HDA_CODEC_CX20751_2, 0, "Conexant CX20751/2" }, - { HDA_CODEC_CX20753, 0, "Conexant CX20753/4" }, - { HDA_CODEC_CX20755, 0, "Conexant CX20755" }, - { HDA_CODEC_CX20756, 0, "Conexant CX20756" }, - { HDA_CODEC_CX20757, 0, "Conexant CX20757" }, - { HDA_CODEC_CX20952, 0, "Conexant CX20952" }, - { HDA_CODEC_VT1708_8, 0, "VIA VT1708_8" }, - { HDA_CODEC_VT1708_9, 0, "VIA VT1708_9" }, - { HDA_CODEC_VT1708_A, 0, "VIA VT1708_A" }, - { HDA_CODEC_VT1708_B, 0, "VIA VT1708_B" }, - { HDA_CODEC_VT1709_0, 0, "VIA VT1709_0" }, - { HDA_CODEC_VT1709_1, 0, "VIA VT1709_1" }, - { HDA_CODEC_VT1709_2, 0, "VIA VT1709_2" }, - { HDA_CODEC_VT1709_3, 0, "VIA VT1709_3" }, - { HDA_CODEC_VT1709_4, 0, "VIA VT1709_4" }, - { HDA_CODEC_VT1709_5, 0, "VIA VT1709_5" }, - { HDA_CODEC_VT1709_6, 0, "VIA VT1709_6" }, - { HDA_CODEC_VT1709_7, 0, "VIA VT1709_7" }, - { HDA_CODEC_VT1708B_0, 0, "VIA VT1708B_0" }, - { HDA_CODEC_VT1708B_1, 0, "VIA VT1708B_1" }, - { HDA_CODEC_VT1708B_2, 0, "VIA VT1708B_2" }, - { HDA_CODEC_VT1708B_3, 0, "VIA VT1708B_3" }, - { HDA_CODEC_VT1708B_4, 0, "VIA VT1708B_4" }, - { HDA_CODEC_VT1708B_5, 0, "VIA VT1708B_5" }, - { HDA_CODEC_VT1708B_6, 0, "VIA VT1708B_6" }, - { HDA_CODEC_VT1708B_7, 0, "VIA VT1708B_7" }, - { HDA_CODEC_VT1708S_0, 0, "VIA VT1708S_0" }, - { HDA_CODEC_VT1708S_1, 0, "VIA VT1708S_1" }, - { HDA_CODEC_VT1708S_2, 0, "VIA VT1708S_2" }, - { HDA_CODEC_VT1708S_3, 0, "VIA VT1708S_3" }, - { HDA_CODEC_VT1708S_4, 0, "VIA VT1708S_4" }, - { HDA_CODEC_VT1708S_5, 0, "VIA VT1708S_5" }, - { HDA_CODEC_VT1708S_6, 0, "VIA VT1708S_6" }, - { HDA_CODEC_VT1708S_7, 0, "VIA VT1708S_7" }, - { HDA_CODEC_VT1702_0, 0, "VIA VT1702_0" }, - { HDA_CODEC_VT1702_1, 0, "VIA VT1702_1" }, - { HDA_CODEC_VT1702_2, 0, "VIA VT1702_2" }, - { HDA_CODEC_VT1702_3, 0, "VIA VT1702_3" }, - { HDA_CODEC_VT1702_4, 0, "VIA VT1702_4" }, - { HDA_CODEC_VT1702_5, 0, "VIA VT1702_5" }, - { HDA_CODEC_VT1702_6, 0, "VIA VT1702_6" }, - { HDA_CODEC_VT1702_7, 0, "VIA VT1702_7" }, - { HDA_CODEC_VT1716S_0, 0, "VIA VT1716S_0" }, - { HDA_CODEC_VT1716S_1, 0, "VIA VT1716S_1" }, - { HDA_CODEC_VT1718S_0, 0, "VIA VT1718S_0" }, - { HDA_CODEC_VT1718S_1, 0, "VIA VT1718S_1" }, - { HDA_CODEC_VT1802_0, 0, "VIA VT1802_0" }, - { HDA_CODEC_VT1802_1, 0, "VIA VT1802_1" }, - { HDA_CODEC_VT1812, 0, "VIA VT1812" }, - { HDA_CODEC_VT1818S, 0, "VIA VT1818S" }, - { HDA_CODEC_VT1828S, 0, "VIA VT1828S" }, - { HDA_CODEC_VT2002P_0, 0, "VIA VT2002P_0" }, - { HDA_CODEC_VT2002P_1, 0, "VIA VT2002P_1" }, - { HDA_CODEC_VT2020, 0, "VIA VT2020" }, - { HDA_CODEC_ATIRS600_1, 0, "ATI RS600" }, - { HDA_CODEC_ATIRS600_2, 0, "ATI RS600" }, - { HDA_CODEC_ATIRS690, 0, "ATI RS690/780" }, - { HDA_CODEC_ATIR6XX, 0, "ATI R6xx" }, - { HDA_CODEC_NVIDIAMCP67, 0, "NVIDIA MCP67" }, - { HDA_CODEC_NVIDIAMCP73, 0, "NVIDIA MCP73" }, - { HDA_CODEC_NVIDIAMCP78, 0, "NVIDIA MCP78" }, - { HDA_CODEC_NVIDIAMCP78_2, 0, "NVIDIA MCP78" }, - { HDA_CODEC_NVIDIAMCP78_3, 0, "NVIDIA MCP78" }, - { HDA_CODEC_NVIDIAMCP78_4, 0, "NVIDIA MCP78" }, - { HDA_CODEC_NVIDIAMCP7A, 0, "NVIDIA MCP7A" }, - { HDA_CODEC_NVIDIAGT220, 0, "NVIDIA GT220" }, - { HDA_CODEC_NVIDIAGT21X, 0, "NVIDIA GT21x" }, - { HDA_CODEC_NVIDIAMCP89, 0, "NVIDIA MCP89" }, - { HDA_CODEC_NVIDIAGT240, 0, "NVIDIA GT240" }, - { HDA_CODEC_NVIDIAGTS450, 0, "NVIDIA GTS450" }, - { HDA_CODEC_NVIDIAGT440, 0, "NVIDIA GT440" }, - { HDA_CODEC_NVIDIAGTX550, 0, "NVIDIA GTX550" }, - { HDA_CODEC_NVIDIAGTX570, 0, "NVIDIA GTX570" }, - { HDA_CODEC_NVIDIATEGRA30, 0, "NVIDIA Tegra30" }, - { HDA_CODEC_NVIDIATEGRA114, 0, "NVIDIA Tegra114" }, - { HDA_CODEC_NVIDIATEGRA124, 0, "NVIDIA Tegra124" }, - { HDA_CODEC_NVIDIATEGRA210, 0, "NVIDIA Tegra210" }, - { HDA_CODEC_INTELIP, 0, "Intel Ibex Peak" }, - { HDA_CODEC_INTELBL, 0, "Intel Bearlake" }, - { HDA_CODEC_INTELCA, 0, "Intel Cantiga" }, - { HDA_CODEC_INTELEL, 0, "Intel Eaglelake" }, - { HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" }, - { HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" }, - { HDA_CODEC_INTELPPT, 0, "Intel Panther Point" }, - { HDA_CODEC_INTELHSW, 0, "Intel Haswell" }, - { HDA_CODEC_INTELBDW, 0, "Intel Broadwell" }, - { HDA_CODEC_INTELSKLK, 0, "Intel Skylake" }, - { HDA_CODEC_INTELKBLK, 0, "Intel Kaby Lake" }, - { HDA_CODEC_INTELJLK, 0, "Intel Jasper Lake" }, - { HDA_CODEC_INTELELLK, 0, "Intel Elkhart Lake" }, - { HDA_CODEC_INTELCT, 0, "Intel Cedar Trail" }, - { HDA_CODEC_INTELVV2, 0, "Intel Valleyview2" }, - { HDA_CODEC_INTELBR, 0, "Intel Braswell" }, - { HDA_CODEC_INTELCL, 0, "Intel Crestline" }, - { HDA_CODEC_INTELBXTN, 0, "Intel Broxton" }, - { HDA_CODEC_INTELCNLK, 0, "Intel Cannon Lake" }, - { HDA_CODEC_INTELGMLK, 0, "Intel Gemini Lake" }, - { HDA_CODEC_INTELGMLK1, 0, "Intel Gemini Lake" }, - { HDA_CODEC_INTELICLK, 0, "Intel Ice Lake" }, - { HDA_CODEC_INTELTGLK, 0, "Intel Tiger Lake" }, - { HDA_CODEC_INTELALLK, 0, "Intel Alder Lake" }, - { HDA_CODEC_SII1390, 0, "Silicon Image SiI1390" }, - { HDA_CODEC_SII1392, 0, "Silicon Image SiI1392" }, - { HDA_CODEC_VMWARE, 0, "VMware" }, + { HDA_CODEC_CS4206, 0, "Cirrus Logic CS4206" }, + { HDA_CODEC_CS4207, 0, "Cirrus Logic CS4207" }, + { HDA_CODEC_CS4210, 0, "Cirrus Logic CS4210" }, + { HDA_CODEC_ALC215, 0, "Realtek ALC215" }, + { HDA_CODEC_ALC221, 0, "Realtek ALC221" }, + { HDA_CODEC_ALC222, 0, "Realtek ALC222" }, + { HDA_CODEC_ALC225, 0, "Realtek ALC225" }, + { HDA_CODEC_ALC230, 0, "Realtek ALC230" }, + { HDA_CODEC_ALC231, 0, "Realtek ALC231" }, + { HDA_CODEC_ALC233, 0, "Realtek ALC233" }, + { HDA_CODEC_ALC234, 0, "Realtek ALC234" }, + { HDA_CODEC_ALC235, 0, "Realtek ALC235" }, + { HDA_CODEC_ALC236, 0, "Realtek ALC236" }, + { HDA_CODEC_ALC245, 0, "Realtek ALC245" }, + { HDA_CODEC_ALC255, 0, "Realtek ALC255" }, + { HDA_CODEC_ALC256, 0, "Realtek ALC256" }, + { HDA_CODEC_ALC257, 0, "Realtek ALC257" }, + { HDA_CODEC_ALC260, 0, "Realtek ALC260" }, + { HDA_CODEC_ALC262, 0, "Realtek ALC262" }, + { HDA_CODEC_ALC267, 0, "Realtek ALC267" }, + { HDA_CODEC_ALC268, 0, "Realtek ALC268" }, + { HDA_CODEC_ALC269, 0, "Realtek ALC269" }, + { HDA_CODEC_ALC270, 0, "Realtek ALC270" }, + { HDA_CODEC_ALC272, 0, "Realtek ALC272" }, + { HDA_CODEC_ALC273, 0, "Realtek ALC273" }, + { HDA_CODEC_ALC274, 0, "Realtek ALC274" }, + { HDA_CODEC_ALC275, 0, "Realtek ALC275" }, + { HDA_CODEC_ALC276, 0, "Realtek ALC276" }, + { HDA_CODEC_ALC292, 0, "Realtek ALC292" }, + { HDA_CODEC_ALC295, 0, "Realtek ALC295" }, + { HDA_CODEC_ALC280, 0, "Realtek ALC280" }, + { HDA_CODEC_ALC282, 0, "Realtek ALC282" }, + { HDA_CODEC_ALC283, 0, "Realtek ALC283" }, + { HDA_CODEC_ALC284, 0, "Realtek ALC284" }, + { HDA_CODEC_ALC285, 0, "Realtek ALC285" }, + { HDA_CODEC_ALC286, 0, "Realtek ALC286" }, + { HDA_CODEC_ALC288, 0, "Realtek ALC288" }, + { HDA_CODEC_ALC289, 0, "Realtek ALC289" }, + { HDA_CODEC_ALC290, 0, "Realtek ALC290" }, + { HDA_CODEC_ALC292, 0, "Realtek ALC292" }, + { HDA_CODEC_ALC293, 0, "Realtek ALC293" }, + { HDA_CODEC_ALC294, 0, "Realtek ALC294" }, + { HDA_CODEC_ALC295, 0, "Realtek ALC295" }, + { HDA_CODEC_ALC298, 0, "Realtek ALC298" }, + { HDA_CODEC_ALC299, 0, "Realtek ALC299" }, + { HDA_CODEC_ALC300, 0, "Realtek ALC300" }, + { HDA_CODEC_ALC623, 0, "Realtek ALC623" }, + { HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" }, + { HDA_CODEC_ALC662, 0x0002, "Realtek ALC662 rev2" }, + { HDA_CODEC_ALC662, 0x0101, "Realtek ALC662 rev1" }, + { HDA_CODEC_ALC662, 0x0300, "Realtek ALC662 rev3" }, + { HDA_CODEC_ALC662, 0, "Realtek ALC662" }, + { HDA_CODEC_ALC663, 0, "Realtek ALC663" }, + { HDA_CODEC_ALC665, 0, "Realtek ALC665" }, + { HDA_CODEC_ALC670, 0, "Realtek ALC670" }, + { HDA_CODEC_ALC671, 0, "Realtek ALC671" }, + { HDA_CODEC_ALC680, 0, "Realtek ALC680" }, + { HDA_CODEC_ALC700, 0, "Realtek ALC700" }, + { HDA_CODEC_ALC701, 0, "Realtek ALC701" }, + { HDA_CODEC_ALC703, 0, "Realtek ALC703" }, + { HDA_CODEC_ALC861, 0x0340, "Realtek ALC660" }, + { HDA_CODEC_ALC861, 0, "Realtek ALC861" }, + { HDA_CODEC_ALC861VD, 0, "Realtek ALC861-VD" }, + { HDA_CODEC_ALC880, 0, "Realtek ALC880" }, + { HDA_CODEC_ALC882, 0, "Realtek ALC882" }, + { HDA_CODEC_ALC883, 0, "Realtek ALC883" }, + { HDA_CODEC_ALC885, 0x0101, "Realtek ALC889A" }, + { HDA_CODEC_ALC885, 0x0103, "Realtek ALC889A" }, + { HDA_CODEC_ALC885, 0, "Realtek ALC885" }, + { HDA_CODEC_ALC887, 0, "Realtek ALC887" }, + { HDA_CODEC_ALC888, 0x0101, "Realtek ALC1200" }, + { HDA_CODEC_ALC888, 0, "Realtek ALC888" }, + { HDA_CODEC_ALC889, 0, "Realtek ALC889" }, + { HDA_CODEC_ALC892, 0, "Realtek ALC892" }, + { HDA_CODEC_ALC897, 0, "Realtek ALC897" }, + { HDA_CODEC_ALC899, 0, "Realtek ALC899" }, + { HDA_CODEC_ALC1150, 0, "Realtek ALC1150" }, + { HDA_CODEC_ALCS1200A, 0, "Realtek ALCS1200A" }, + { HDA_CODEC_ALC1220_1, 0, "Realtek ALC1220" }, + { HDA_CODEC_ALC1220, 0, "Realtek ALC1220" }, + { HDA_CODEC_AD1882, 0, "Analog Devices AD1882" }, + { HDA_CODEC_AD1882A, 0, "Analog Devices AD1882A" }, + { HDA_CODEC_AD1883, 0, "Analog Devices AD1883" }, + { HDA_CODEC_AD1884, 0, "Analog Devices AD1884" }, + { HDA_CODEC_AD1884A, 0, "Analog Devices AD1884A" }, + { HDA_CODEC_AD1981HD, 0, "Analog Devices AD1981HD" }, + { HDA_CODEC_AD1983, 0, "Analog Devices AD1983" }, + { HDA_CODEC_AD1984, 0, "Analog Devices AD1984" }, + { HDA_CODEC_AD1984A, 0, "Analog Devices AD1984A" }, + { HDA_CODEC_AD1984B, 0, "Analog Devices AD1984B" }, + { HDA_CODEC_AD1986A, 0, "Analog Devices AD1986A" }, + { HDA_CODEC_AD1987, 0, "Analog Devices AD1987" }, + { HDA_CODEC_AD1988, 0, "Analog Devices AD1988A" }, + { HDA_CODEC_AD1988B, 0, "Analog Devices AD1988B" }, + { HDA_CODEC_AD1989A, 0, "Analog Devices AD1989A" }, + { HDA_CODEC_AD1989B, 0, "Analog Devices AD1989B" }, + { HDA_CODEC_CA0110, 0, "Creative CA0110-IBG" }, + { HDA_CODEC_CA0110_2, 0, "Creative CA0110-IBG" }, + { HDA_CODEC_CA0132, 0, "Creative CA0132" }, + { HDA_CODEC_SB0880, 0, "Creative SB0880 X-Fi" }, + { HDA_CODEC_CMI9880, 0, "CMedia CMI9880" }, + { HDA_CODEC_CMI98802, 0, "CMedia CMI9880" }, + { HDA_CODEC_CXD9872RDK, 0, "Sigmatel CXD9872RD/K" }, + { HDA_CODEC_CXD9872AKD, 0, "Sigmatel CXD9872AKD" }, + { HDA_CODEC_STAC9200D, 0, "Sigmatel STAC9200D" }, + { HDA_CODEC_STAC9204X, 0, "Sigmatel STAC9204X" }, + { HDA_CODEC_STAC9204D, 0, "Sigmatel STAC9204D" }, + { HDA_CODEC_STAC9205X, 0, "Sigmatel STAC9205X" }, + { HDA_CODEC_STAC9205D, 0, "Sigmatel STAC9205D" }, + { HDA_CODEC_STAC9220, 0, "Sigmatel STAC9220" }, + { HDA_CODEC_STAC9220_A1, 0, "Sigmatel STAC9220_A1" }, + { HDA_CODEC_STAC9220_A2, 0, "Sigmatel STAC9220_A2" }, + { HDA_CODEC_STAC9221, 0, "Sigmatel STAC9221" }, + { HDA_CODEC_STAC9221_A2, 0, "Sigmatel STAC9221_A2" }, + { HDA_CODEC_STAC9221D, 0, "Sigmatel STAC9221D" }, + { HDA_CODEC_STAC922XD, 0, "Sigmatel STAC9220D/9223D" }, + { HDA_CODEC_STAC9227X, 0, "Sigmatel STAC9227X" }, + { HDA_CODEC_STAC9227D, 0, "Sigmatel STAC9227D" }, + { HDA_CODEC_STAC9228X, 0, "Sigmatel STAC9228X" }, + { HDA_CODEC_STAC9228D, 0, "Sigmatel STAC9228D" }, + { HDA_CODEC_STAC9229X, 0, "Sigmatel STAC9229X" }, + { HDA_CODEC_STAC9229D, 0, "Sigmatel STAC9229D" }, + { HDA_CODEC_STAC9230X, 0, "Sigmatel STAC9230X" }, + { HDA_CODEC_STAC9230D, 0, "Sigmatel STAC9230D" }, + { HDA_CODEC_STAC9250, 0, "Sigmatel STAC9250" }, + { HDA_CODEC_STAC9251, 0, "Sigmatel STAC9251" }, + { HDA_CODEC_STAC9255, 0, "Sigmatel STAC9255" }, + { HDA_CODEC_STAC9255D, 0, "Sigmatel STAC9255D" }, + { HDA_CODEC_STAC9254, 0, "Sigmatel STAC9254" }, + { HDA_CODEC_STAC9254D, 0, "Sigmatel STAC9254D" }, + { HDA_CODEC_STAC9271X, 0, "Sigmatel STAC9271X" }, + { HDA_CODEC_STAC9271D, 0, "Sigmatel STAC9271D" }, + { HDA_CODEC_STAC9272X, 0, "Sigmatel STAC9272X" }, + { HDA_CODEC_STAC9272D, 0, "Sigmatel STAC9272D" }, + { HDA_CODEC_STAC9273X, 0, "Sigmatel STAC9273X" }, + { HDA_CODEC_STAC9273D, 0, "Sigmatel STAC9273D" }, + { HDA_CODEC_STAC9274, 0, "Sigmatel STAC9274" }, + { HDA_CODEC_STAC9274D, 0, "Sigmatel STAC9274D" }, + { HDA_CODEC_STAC9274X5NH, 0, "Sigmatel STAC9274X5NH" }, + { HDA_CODEC_STAC9274D5NH, 0, "Sigmatel STAC9274D5NH" }, + { HDA_CODEC_STAC9872AK, 0, "Sigmatel STAC9872AK" }, + { HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" }, + { HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" }, + { HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" }, + { HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" }, + { HDA_CODEC_IDT92HD66B1X5, 0, "IDT 92HD66B1X5" }, + { HDA_CODEC_IDT92HD66B2X5, 0, "IDT 92HD66B2X5" }, + { HDA_CODEC_IDT92HD66B3X5, 0, "IDT 92HD66B3X5" }, + { HDA_CODEC_IDT92HD66C1X5, 0, "IDT 92HD66C1X5" }, + { HDA_CODEC_IDT92HD66C2X5, 0, "IDT 92HD66C2X5" }, + { HDA_CODEC_IDT92HD66C3X5, 0, "IDT 92HD66C3X5" }, + { HDA_CODEC_IDT92HD66B1X3, 0, "IDT 92HD66B1X3" }, + { HDA_CODEC_IDT92HD66B2X3, 0, "IDT 92HD66B2X3" }, + { HDA_CODEC_IDT92HD66B3X3, 0, "IDT 92HD66B3X3" }, + { HDA_CODEC_IDT92HD66C1X3, 0, "IDT 92HD66C1X3" }, + { HDA_CODEC_IDT92HD66C2X3, 0, "IDT 92HD66C2X3" }, + { HDA_CODEC_IDT92HD66C3_65, 0, "IDT 92HD66C3_65" }, + { HDA_CODEC_IDT92HD700X, 0, "IDT 92HD700X" }, + { HDA_CODEC_IDT92HD700D, 0, "IDT 92HD700D" }, + { HDA_CODEC_IDT92HD71B5, 0, "IDT 92HD71B5" }, + { HDA_CODEC_IDT92HD71B5_2, 0, "IDT 92HD71B5" }, + { HDA_CODEC_IDT92HD71B6, 0, "IDT 92HD71B6" }, + { HDA_CODEC_IDT92HD71B6_2, 0, "IDT 92HD71B6" }, + { HDA_CODEC_IDT92HD71B7, 0, "IDT 92HD71B7" }, + { HDA_CODEC_IDT92HD71B7_2, 0, "IDT 92HD71B7" }, + { HDA_CODEC_IDT92HD71B8, 0, "IDT 92HD71B8" }, + { HDA_CODEC_IDT92HD71B8_2, 0, "IDT 92HD71B8" }, + { HDA_CODEC_IDT92HD73C1, 0, "IDT 92HD73C1" }, + { HDA_CODEC_IDT92HD73D1, 0, "IDT 92HD73D1" }, + { HDA_CODEC_IDT92HD73E1, 0, "IDT 92HD73E1" }, + { HDA_CODEC_IDT92HD75B3, 0, "IDT 92HD75B3" }, + { HDA_CODEC_IDT92HD75BX, 0, "IDT 92HD75BX" }, + { HDA_CODEC_IDT92HD81B1C, 0, "IDT 92HD81B1C" }, + { HDA_CODEC_IDT92HD81B1X, 0, "IDT 92HD81B1X" }, + { HDA_CODEC_IDT92HD83C1C, 0, "IDT 92HD83C1C" }, + { HDA_CODEC_IDT92HD83C1X, 0, "IDT 92HD83C1X" }, + { HDA_CODEC_IDT92HD87B1_3, 0, "IDT 92HD87B1/3" }, + { HDA_CODEC_IDT92HD87B2_4, 0, "IDT 92HD87B2/4" }, + { HDA_CODEC_IDT92HD89C3, 0, "IDT 92HD89C3" }, + { HDA_CODEC_IDT92HD89C2, 0, "IDT 92HD89C2" }, + { HDA_CODEC_IDT92HD89C1, 0, "IDT 92HD89C1" }, + { HDA_CODEC_IDT92HD89B3, 0, "IDT 92HD89B3" }, + { HDA_CODEC_IDT92HD89B2, 0, "IDT 92HD89B2" }, + { HDA_CODEC_IDT92HD89B1, 0, "IDT 92HD89B1" }, + { HDA_CODEC_IDT92HD89E3, 0, "IDT 92HD89E3" }, + { HDA_CODEC_IDT92HD89E2, 0, "IDT 92HD89E2" }, + { HDA_CODEC_IDT92HD89E1, 0, "IDT 92HD89E1" }, + { HDA_CODEC_IDT92HD89D3, 0, "IDT 92HD89D3" }, + { HDA_CODEC_IDT92HD89D2, 0, "IDT 92HD89D2" }, + { HDA_CODEC_IDT92HD89D1, 0, "IDT 92HD89D1" }, + { HDA_CODEC_IDT92HD89F3, 0, "IDT 92HD89F3" }, + { HDA_CODEC_IDT92HD89F2, 0, "IDT 92HD89F2" }, + { HDA_CODEC_IDT92HD89F1, 0, "IDT 92HD89F1" }, + { HDA_CODEC_IDT92HD90BXX, 0, "IDT 92HD90BXX" }, + { HDA_CODEC_IDT92HD91BXX, 0, "IDT 92HD91BXX" }, + { HDA_CODEC_IDT92HD93BXX, 0, "IDT 92HD93BXX" }, + { HDA_CODEC_IDT92HD95B, 0, "Tempo 92HD95B" }, + { HDA_CODEC_IDT92HD98BXX, 0, "IDT 92HD98BXX" }, + { HDA_CODEC_IDT92HD99BXX, 0, "IDT 92HD99BXX" }, + { HDA_CODEC_CX20549, 0, "Conexant CX20549 (Venice)" }, + { HDA_CODEC_CX20551, 0, "Conexant CX20551 (Waikiki)" }, + { HDA_CODEC_CX20561, 0, "Conexant CX20561 (Hermosa)" }, + { HDA_CODEC_CX20582, 0, "Conexant CX20582 (Pebble)" }, + { HDA_CODEC_CX20583, 0, "Conexant CX20583 (Pebble HSF)" }, + { HDA_CODEC_CX20584, 0, "Conexant CX20584" }, + { HDA_CODEC_CX20585, 0, "Conexant CX20585" }, + { HDA_CODEC_CX20588, 0, "Conexant CX20588" }, + { HDA_CODEC_CX20590, 0, "Conexant CX20590" }, + { HDA_CODEC_CX20631, 0, "Conexant CX20631" }, + { HDA_CODEC_CX20632, 0, "Conexant CX20632" }, + { HDA_CODEC_CX20641, 0, "Conexant CX20641" }, + { HDA_CODEC_CX20642, 0, "Conexant CX20642" }, + { HDA_CODEC_CX20651, 0, "Conexant CX20651" }, + { HDA_CODEC_CX20652, 0, "Conexant CX20652" }, + { HDA_CODEC_CX20664, 0, "Conexant CX20664" }, + { HDA_CODEC_CX20665, 0, "Conexant CX20665" }, + { HDA_CODEC_CX21722, 0, "Conexant CX21722" }, + { HDA_CODEC_CX20722, 0, "Conexant CX20722" }, + { HDA_CODEC_CX21724, 0, "Conexant CX21724" }, + { HDA_CODEC_CX20724, 0, "Conexant CX20724" }, + { HDA_CODEC_CX20751, 0, "Conexant CX20751/2" }, + { HDA_CODEC_CX20751_2, 0, "Conexant CX20751/2" }, + { HDA_CODEC_CX20753, 0, "Conexant CX20753/4" }, + { HDA_CODEC_CX20755, 0, "Conexant CX20755" }, + { HDA_CODEC_CX20756, 0, "Conexant CX20756" }, + { HDA_CODEC_CX20757, 0, "Conexant CX20757" }, + { HDA_CODEC_CX20952, 0, "Conexant CX20952" }, + { HDA_CODEC_VT1708_8, 0, "VIA VT1708_8" }, + { HDA_CODEC_VT1708_9, 0, "VIA VT1708_9" }, + { HDA_CODEC_VT1708_A, 0, "VIA VT1708_A" }, + { HDA_CODEC_VT1708_B, 0, "VIA VT1708_B" }, + { HDA_CODEC_VT1709_0, 0, "VIA VT1709_0" }, + { HDA_CODEC_VT1709_1, 0, "VIA VT1709_1" }, + { HDA_CODEC_VT1709_2, 0, "VIA VT1709_2" }, + { HDA_CODEC_VT1709_3, 0, "VIA VT1709_3" }, + { HDA_CODEC_VT1709_4, 0, "VIA VT1709_4" }, + { HDA_CODEC_VT1709_5, 0, "VIA VT1709_5" }, + { HDA_CODEC_VT1709_6, 0, "VIA VT1709_6" }, + { HDA_CODEC_VT1709_7, 0, "VIA VT1709_7" }, + { HDA_CODEC_VT1708B_0, 0, "VIA VT1708B_0" }, + { HDA_CODEC_VT1708B_1, 0, "VIA VT1708B_1" }, + { HDA_CODEC_VT1708B_2, 0, "VIA VT1708B_2" }, + { HDA_CODEC_VT1708B_3, 0, "VIA VT1708B_3" }, + { HDA_CODEC_VT1708B_4, 0, "VIA VT1708B_4" }, + { HDA_CODEC_VT1708B_5, 0, "VIA VT1708B_5" }, + { HDA_CODEC_VT1708B_6, 0, "VIA VT1708B_6" }, + { HDA_CODEC_VT1708B_7, 0, "VIA VT1708B_7" }, + { HDA_CODEC_VT1708S_0, 0, "VIA VT1708S_0" }, + { HDA_CODEC_VT1708S_1, 0, "VIA VT1708S_1" }, + { HDA_CODEC_VT1708S_2, 0, "VIA VT1708S_2" }, + { HDA_CODEC_VT1708S_3, 0, "VIA VT1708S_3" }, + { HDA_CODEC_VT1708S_4, 0, "VIA VT1708S_4" }, + { HDA_CODEC_VT1708S_5, 0, "VIA VT1708S_5" }, + { HDA_CODEC_VT1708S_6, 0, "VIA VT1708S_6" }, + { HDA_CODEC_VT1708S_7, 0, "VIA VT1708S_7" }, + { HDA_CODEC_VT1702_0, 0, "VIA VT1702_0" }, + { HDA_CODEC_VT1702_1, 0, "VIA VT1702_1" }, + { HDA_CODEC_VT1702_2, 0, "VIA VT1702_2" }, + { HDA_CODEC_VT1702_3, 0, "VIA VT1702_3" }, + { HDA_CODEC_VT1702_4, 0, "VIA VT1702_4" }, + { HDA_CODEC_VT1702_5, 0, "VIA VT1702_5" }, + { HDA_CODEC_VT1702_6, 0, "VIA VT1702_6" }, + { HDA_CODEC_VT1702_7, 0, "VIA VT1702_7" }, + { HDA_CODEC_VT1716S_0, 0, "VIA VT1716S_0" }, + { HDA_CODEC_VT1716S_1, 0, "VIA VT1716S_1" }, + { HDA_CODEC_VT1718S_0, 0, "VIA VT1718S_0" }, + { HDA_CODEC_VT1718S_1, 0, "VIA VT1718S_1" }, + { HDA_CODEC_VT1802_0, 0, "VIA VT1802_0" }, + { HDA_CODEC_VT1802_1, 0, "VIA VT1802_1" }, + { HDA_CODEC_VT1812, 0, "VIA VT1812" }, + { HDA_CODEC_VT1818S, 0, "VIA VT1818S" }, + { HDA_CODEC_VT1828S, 0, "VIA VT1828S" }, + { HDA_CODEC_VT2002P_0, 0, "VIA VT2002P_0" }, + { HDA_CODEC_VT2002P_1, 0, "VIA VT2002P_1" }, + { HDA_CODEC_VT2020, 0, "VIA VT2020" }, + { HDA_CODEC_ATIRS600_1, 0, "ATI RS600" }, + { HDA_CODEC_ATIRS600_2, 0, "ATI RS600" }, + { HDA_CODEC_ATIRS690, 0, "ATI RS690/780" }, + { HDA_CODEC_ATIR6XX, 0, "ATI R6xx" }, + { HDA_CODEC_NVIDIAMCP67, 0, "NVIDIA MCP67" }, + { HDA_CODEC_NVIDIAMCP73, 0, "NVIDIA MCP73" }, + { HDA_CODEC_NVIDIAMCP78, 0, "NVIDIA MCP78" }, + { HDA_CODEC_NVIDIAMCP78_2, 0, "NVIDIA MCP78" }, + { HDA_CODEC_NVIDIAMCP78_3, 0, "NVIDIA MCP78" }, + { HDA_CODEC_NVIDIAMCP78_4, 0, "NVIDIA MCP78" }, + { HDA_CODEC_NVIDIAMCP7A, 0, "NVIDIA MCP7A" }, + { HDA_CODEC_NVIDIAGT220, 0, "NVIDIA GT220" }, + { HDA_CODEC_NVIDIAGT21X, 0, "NVIDIA GT21x" }, + { HDA_CODEC_NVIDIAMCP89, 0, "NVIDIA MCP89" }, + { HDA_CODEC_NVIDIAGT240, 0, "NVIDIA GT240" }, + { HDA_CODEC_NVIDIAGTS450, 0, "NVIDIA GTS450" }, + { HDA_CODEC_NVIDIAGT440, 0, "NVIDIA GT440" }, + { HDA_CODEC_NVIDIAGTX550, 0, "NVIDIA GTX550" }, + { HDA_CODEC_NVIDIAGTX570, 0, "NVIDIA GTX570" }, + { HDA_CODEC_NVIDIATEGRA30, 0, "NVIDIA Tegra30" }, + { HDA_CODEC_NVIDIATEGRA114, 0, "NVIDIA Tegra114" }, + { HDA_CODEC_NVIDIATEGRA124, 0, "NVIDIA Tegra124" }, + { HDA_CODEC_NVIDIATEGRA210, 0, "NVIDIA Tegra210" }, + { HDA_CODEC_INTELIP, 0, "Intel Ibex Peak" }, + { HDA_CODEC_INTELBL, 0, "Intel Bearlake" }, + { HDA_CODEC_INTELCA, 0, "Intel Cantiga" }, + { HDA_CODEC_INTELEL, 0, "Intel Eaglelake" }, + { HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" }, + { HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" }, + { HDA_CODEC_INTELPPT, 0, "Intel Panther Point" }, + { HDA_CODEC_INTELHSW, 0, "Intel Haswell" }, + { HDA_CODEC_INTELBDW, 0, "Intel Broadwell" }, + { HDA_CODEC_INTELSKLK, 0, "Intel Skylake" }, + { HDA_CODEC_INTELKBLK, 0, "Intel Kaby Lake" }, + { HDA_CODEC_INTELJLK, 0, "Intel Jasper Lake" }, + { HDA_CODEC_INTELELLK, 0, "Intel Elkhart Lake" }, + { HDA_CODEC_INTELCT, 0, "Intel Cedar Trail" }, + { HDA_CODEC_INTELVV2, 0, "Intel Valleyview2" }, + { HDA_CODEC_INTELBR, 0, "Intel Braswell" }, + { HDA_CODEC_INTELCL, 0, "Intel Crestline" }, + { HDA_CODEC_INTELBXTN, 0, "Intel Broxton" }, + { HDA_CODEC_INTELCNLK, 0, "Intel Cannon Lake" }, + { HDA_CODEC_INTELGMLK, 0, "Intel Gemini Lake" }, + { HDA_CODEC_INTELGMLK1, 0, "Intel Gemini Lake" }, + { HDA_CODEC_INTELICLK, 0, "Intel Ice Lake" }, + { HDA_CODEC_INTELTGLK, 0, "Intel Tiger Lake" }, + { HDA_CODEC_INTELALLK, 0, "Intel Alder Lake" }, + { HDA_CODEC_SII1390, 0, "Silicon Image SiI1390" }, + { HDA_CODEC_SII1392, 0, "Silicon Image SiI1392" }, + { HDA_CODEC_VMWARE, 0, "VMware" }, /* Unknown CODECs */ - { HDA_CODEC_ADXXXX, 0, "Analog Devices" }, - { HDA_CODEC_AGEREXXXX, 0, "Lucent/Agere Systems" }, - { HDA_CODEC_ALCXXXX, 0, "Realtek" }, - { HDA_CODEC_ATIXXXX, 0, "ATI" }, - { HDA_CODEC_CAXXXX, 0, "Creative" }, - { HDA_CODEC_CMIXXXX, 0, "CMedia" }, - { HDA_CODEC_CMIXXXX2, 0, "CMedia" }, - { HDA_CODEC_CSXXXX, 0, "Cirrus Logic" }, - { HDA_CODEC_CXXXXX, 0, "Conexant" }, - { HDA_CODEC_CHXXXX, 0, "Chrontel" }, - { HDA_CODEC_IDTXXXX, 0, "IDT" }, - { HDA_CODEC_INTELXXXX, 0, "Intel" }, - { HDA_CODEC_MOTOXXXX, 0, "Motorola" }, - { HDA_CODEC_NVIDIAXXXX, 0, "NVIDIA" }, - { HDA_CODEC_SIIXXXX, 0, "Silicon Image" }, - { HDA_CODEC_STACXXXX, 0, "Sigmatel" }, - { HDA_CODEC_VMWAREXXXX, 0, "VMware" }, - { HDA_CODEC_VTXXXX, 0, "VIA" }, + { HDA_CODEC_ADXXXX, 0, "Analog Devices" }, + { HDA_CODEC_AGEREXXXX, 0, "Lucent/Agere Systems" }, + { HDA_CODEC_ALCXXXX, 0, "Realtek" }, + { HDA_CODEC_ATIXXXX, 0, "ATI" }, + { HDA_CODEC_CAXXXX, 0, "Creative" }, + { HDA_CODEC_CMIXXXX, 0, "CMedia" }, + { HDA_CODEC_CMIXXXX2, 0, "CMedia" }, + { HDA_CODEC_CSXXXX, 0, "Cirrus Logic" }, + { HDA_CODEC_CXXXXX, 0, "Conexant" }, + { HDA_CODEC_CHXXXX, 0, "Chrontel" }, + { HDA_CODEC_IDTXXXX, 0, "IDT" }, + { HDA_CODEC_INTELXXXX, 0, "Intel" }, + { HDA_CODEC_MOTOXXXX, 0, "Motorola" }, + { HDA_CODEC_NVIDIAXXXX, 0, "NVIDIA" }, + { HDA_CODEC_SIIXXXX, 0, "Silicon Image" }, + { HDA_CODEC_STACXXXX, 0, "Sigmatel" }, + { HDA_CODEC_VMWAREXXXX, 0, "VMware" }, + { HDA_CODEC_VTXXXX, 0, "VIA" }, }; static int hdacc_suspend(device_t dev) { - HDA_BOOTHVERBOSE( - device_printf(dev, "Suspend...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Suspend...\n");); bus_generic_suspend(dev); - HDA_BOOTHVERBOSE( - device_printf(dev, "Suspend done\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Suspend done\n");); return (0); } @@ -436,13 +431,9 @@ hdacc_resume(device_t dev) { - HDA_BOOTHVERBOSE( - device_printf(dev, "Resume...\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Resume...\n");); bus_generic_resume(dev); - HDA_BOOTHVERBOSE( - device_printf(dev, "Resume done\n"); - ); + HDA_BOOTHVERBOSE(device_printf(dev, "Resume done\n");); return (0); } @@ -502,21 +493,18 @@ startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode); endnode = startnode + codec->fgcnt; - HDA_BOOTHVERBOSE( - device_printf(dev, - "Root Node at nid=0: %d subnodes %d-%d\n", - HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode), - startnode, endnode - 1); - ); + HDA_BOOTHVERBOSE(device_printf(dev, + "Root Node at nid=0: %d subnodes %d-%d\n", + HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode), startnode, endnode - 1);); - codec->fgs = malloc(sizeof(struct hdacc_fg) * codec->fgcnt, - M_HDACC, M_ZERO | M_WAITOK); + codec->fgs = malloc(sizeof(struct hdacc_fg) * codec->fgcnt, M_HDACC, + M_ZERO | M_WAITOK); for (i = startnode, n = 0; i < endnode; i++, n++) { codec->fgs[n].nid = i; hdacc_lock(codec); - codec->fgs[n].type = - HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hda_command(dev, - HDA_CMD_GET_PARAMETER(0, i, HDA_PARAM_FCT_GRP_TYPE))); + codec->fgs[n].type = HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE( + hda_command(dev, + HDA_CMD_GET_PARAMETER(0, i, HDA_PARAM_FCT_GRP_TYPE))); codec->fgs[n].subsystem_id = hda_command(dev, HDA_CMD_GET_SUBSYSTEM_ID(0, i)); hdacc_unlock(codec); @@ -559,8 +547,8 @@ { struct hdacc_fg *fg = device_get_ivars(child); - sbuf_printf(sb, "type=0x%02x subsystem=0x%08x", - fg->type, fg->subsystem_id); + sbuf_printf(sb, "type=0x%02x subsystem=0x%08x", fg->type, + fg->subsystem_id); return (0); } @@ -583,23 +571,23 @@ struct hdacc_softc *codec = device_get_softc(dev); struct hdacc_fg *fg = device_get_ivars(child); - device_printf(child, "<%s %s Function Group> at nid %d on %s " + device_printf(child, + "<%s %s Function Group> at nid %d on %s " "(no driver attached)\n", device_get_desc(dev), - fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ? "Audio" : - (fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM ? "Modem" : - "Unknown"), fg->nid, device_get_nameunit(dev)); - HDA_BOOTVERBOSE( - device_printf(dev, "Subsystem ID: 0x%08x\n", - hda_get_subsystem_id(dev)); - ); - HDA_BOOTHVERBOSE( - device_printf(dev, "Power down FG nid=%d to the D3 state...\n", - fg->nid); - ); + fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ? + "Audio" : + (fg->type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM ? + "Modem" : + "Unknown"), + fg->nid, device_get_nameunit(dev)); + HDA_BOOTVERBOSE(device_printf(dev, "Subsystem ID: 0x%08x\n", + hda_get_subsystem_id(dev));); + HDA_BOOTHVERBOSE(device_printf(dev, + "Power down FG nid=%d to the D3 state...\n", fg->nid);); hdacc_lock(codec); - hda_command(dev, HDA_CMD_SET_POWER_STATE(0, - fg->nid, HDA_CMD_POWER_STATE_D3)); + hda_command(dev, + HDA_CMD_SET_POWER_STATE(0, fg->nid, HDA_CMD_POWER_STATE_D3)); hdacc_unlock(codec); } @@ -619,8 +607,8 @@ *result = fg->subsystem_id; break; default: - return(BUS_READ_IVAR(device_get_parent(dev), dev, - which, result)); + return ( + BUS_READ_IVAR(device_get_parent(dev), dev, which, result)); } return (0); } @@ -647,8 +635,8 @@ struct hdacc_softc *codec = device_get_softc(dev); int stream; - stream = HDAC_STREAM_ALLOC(device_get_parent(dev), dev, - dir, format, stripe, dmapos); + stream = HDAC_STREAM_ALLOC(device_get_parent(dev), dev, dir, format, + stripe, dmapos); if (stream > 0) codec->streams[dir][stream] = child; return (stream); @@ -668,8 +656,8 @@ bus_addr_t buf, int blksz, int blkcnt) { - return (HDAC_STREAM_START(device_get_parent(dev), dev, - dir, stream, buf, blksz, blkcnt)); + return (HDAC_STREAM_START(device_get_parent(dev), dev, dir, stream, buf, + blksz, blkcnt)); } static void @@ -744,8 +732,10 @@ if ((child = codec->tags[tag]) != NULL) HDAC_UNSOL_INTR(child, resp); else - device_printf(codec->dev, "Unexpected unsolicited " - "response with tag %d: %08x\n", tag, resp); + device_printf(codec->dev, + "Unexpected unsolicited " + "response with tag %d: %08x\n", + tag, resp); } static void @@ -763,31 +753,30 @@ static device_method_t hdacc_methods[] = { /* device interface */ - DEVMETHOD(device_probe, hdacc_probe), - DEVMETHOD(device_attach, hdacc_attach), - DEVMETHOD(device_detach, hdacc_detach), - DEVMETHOD(device_suspend, hdacc_suspend), - DEVMETHOD(device_resume, hdacc_resume), + DEVMETHOD(device_probe, hdacc_probe), + DEVMETHOD(device_attach, hdacc_attach), + DEVMETHOD(device_detach, hdacc_detach), + DEVMETHOD(device_suspend, hdacc_suspend), + DEVMETHOD(device_resume, hdacc_resume), /* Bus interface */ - DEVMETHOD(bus_child_location, hdacc_child_location), - DEVMETHOD(bus_child_pnpinfo, hdacc_child_pnpinfo_method), - DEVMETHOD(bus_print_child, hdacc_print_child), - DEVMETHOD(bus_probe_nomatch, hdacc_probe_nomatch), - DEVMETHOD(bus_read_ivar, hdacc_read_ivar), - DEVMETHOD(hdac_get_mtx, hdacc_get_mtx), - DEVMETHOD(hdac_codec_command, hdacc_codec_command), - DEVMETHOD(hdac_stream_alloc, hdacc_stream_alloc), - DEVMETHOD(hdac_stream_free, hdacc_stream_free), - DEVMETHOD(hdac_stream_start, hdacc_stream_start), - DEVMETHOD(hdac_stream_stop, hdacc_stream_stop), - DEVMETHOD(hdac_stream_reset, hdacc_stream_reset), - DEVMETHOD(hdac_stream_getptr, hdacc_stream_getptr), - DEVMETHOD(hdac_stream_intr, hdacc_stream_intr), - DEVMETHOD(hdac_unsol_alloc, hdacc_unsol_alloc), - DEVMETHOD(hdac_unsol_free, hdacc_unsol_free), - DEVMETHOD(hdac_unsol_intr, hdacc_unsol_intr), - DEVMETHOD(hdac_pindump, hdacc_pindump), - DEVMETHOD_END + DEVMETHOD(bus_child_location, hdacc_child_location), + DEVMETHOD(bus_child_pnpinfo, hdacc_child_pnpinfo_method), + DEVMETHOD(bus_print_child, hdacc_print_child), + DEVMETHOD(bus_probe_nomatch, hdacc_probe_nomatch), + DEVMETHOD(bus_read_ivar, hdacc_read_ivar), + DEVMETHOD(hdac_get_mtx, hdacc_get_mtx), + DEVMETHOD(hdac_codec_command, hdacc_codec_command), + DEVMETHOD(hdac_stream_alloc, hdacc_stream_alloc), + DEVMETHOD(hdac_stream_free, hdacc_stream_free), + DEVMETHOD(hdac_stream_start, hdacc_stream_start), + DEVMETHOD(hdac_stream_stop, hdacc_stream_stop), + DEVMETHOD(hdac_stream_reset, hdacc_stream_reset), + DEVMETHOD(hdac_stream_getptr, hdacc_stream_getptr), + DEVMETHOD(hdac_stream_intr, hdacc_stream_intr), + DEVMETHOD(hdac_unsol_alloc, hdacc_unsol_alloc), + DEVMETHOD(hdac_unsol_free, hdacc_unsol_free), + DEVMETHOD(hdac_unsol_intr, hdacc_unsol_intr), + DEVMETHOD(hdac_pindump, hdacc_pindump), DEVMETHOD_END }; static driver_t hdacc_driver = { Index: sys/dev/sound/pci/hda/pin_patch.h =================================================================== --- sys/dev/sound/pci/hda/pin_patch.h +++ sys/dev/sound/pci/hda/pin_patch.h @@ -30,90 +30,106 @@ #include "hdac.h" -#define PIN_SUBVENDOR(sv) { .id = sv } +#define PIN_SUBVENDOR(sv) \ + { \ + .id = sv \ + } - -#define PIN_PATCH_STRING(n, patchstr) { \ - .nid = n, \ - .type = PIN_PATCH_TYPE_STRING, \ - .patch.string = patchstr \ -} -#define PIN_OVERRIDE(n, newvalue) { \ - .nid = n, \ - .type = PIN_PATCH_TYPE_OVERRIDE, \ - .patch.override = newvalue \ -} -#define PIN_PATCH_NOT_APPLICABLE(n) \ - PIN_PATCH_STRING(n, "as=15 misc=1 color=Black ctype=1/8 device=Speaker loc=Rear conn=None") -#define PIN_PATCH_HP_OUT(n) \ - PIN_PATCH_STRING(n, "seq=15 as=1 color=Green ctype=1/8 device=Headphones loc=Rear") -#define PIN_PATCH_HP(n) \ - PIN_PATCH_STRING(n, "seq=15 as=1 misc=1 color=Green ctype=1/8 device=Headphones loc=Rear") -#define PIN_PATCH_SPEAKER(n) \ +#define PIN_PATCH_STRING(n, patchstr) \ + { \ + .nid = n, .type = PIN_PATCH_TYPE_STRING, \ + .patch.string = patchstr \ + } +#define PIN_OVERRIDE(n, newvalue) \ + { \ + .nid = n, .type = PIN_PATCH_TYPE_OVERRIDE, \ + .patch.override = newvalue \ + } +#define PIN_PATCH_NOT_APPLICABLE(n) \ + PIN_PATCH_STRING(n, \ + "as=15 misc=1 color=Black ctype=1/8 device=Speaker loc=Rear conn=None") +#define PIN_PATCH_HP_OUT(n) \ + PIN_PATCH_STRING(n, \ + "seq=15 as=1 color=Green ctype=1/8 device=Headphones loc=Rear") +#define PIN_PATCH_HP(n) \ + PIN_PATCH_STRING(n, \ + "seq=15 as=1 misc=1 color=Green ctype=1/8 device=Headphones loc=Rear") +#define PIN_PATCH_SPEAKER(n) \ PIN_PATCH_STRING(n, "as=2 misc=1 ctype=ATAPI loc=Onboard conn=Fixed") -#define PIN_PATCH_BASS_SPEAKER(n) \ +#define PIN_PATCH_BASS_SPEAKER(n) \ PIN_PATCH_STRING(n, "as=3 misc=1 ctype=ATAPI loc=Onboard conn=Fixed") -#define PIN_PATCH_MIC_IN(n) \ - PIN_PATCH_STRING(n, "as=5 misc=9 color=Pink ctype=1/8 device=Mic loc=Rear") -#define PIN_PATCH_MIC_INTERNAL(n) \ - PIN_PATCH_STRING(n, "as=6 misc=1 ctype=Digital device=Mic loc=Internal conn=Fixed") -#define PIN_PATCH_MIC_FRONT(n) \ - PIN_PATCH_STRING(n, "as=4 misc=12 color=Pink ctype=1/8 device=Mic loc=Front") -#define PIN_PATCH_LINE_IN(n) \ - PIN_PATCH_STRING(n, "seq=1 as=3 color=Blue ctype=1/8 device=Line-in loc=Rear") -#define PIN_PATCH_LINE_OUT(n) \ +#define PIN_PATCH_MIC_IN(n) \ + PIN_PATCH_STRING(n, \ + "as=5 misc=9 color=Pink ctype=1/8 device=Mic loc=Rear") +#define PIN_PATCH_MIC_INTERNAL(n) \ + PIN_PATCH_STRING(n, \ + "as=6 misc=1 ctype=Digital device=Mic loc=Internal conn=Fixed") +#define PIN_PATCH_MIC_FRONT(n) \ + PIN_PATCH_STRING(n, \ + "as=4 misc=12 color=Pink ctype=1/8 device=Mic loc=Front") +#define PIN_PATCH_LINE_IN(n) \ + PIN_PATCH_STRING(n, \ + "seq=1 as=3 color=Blue ctype=1/8 device=Line-in loc=Rear") +#define PIN_PATCH_LINE_OUT(n) \ PIN_PATCH_STRING(n, "as=1 color=Green ctype=1/8 loc=Rear") -#define PIN_PATCH_SPDIF_OUT(n) \ - PIN_PATCH_STRING(n, "as=4 misc=1 color=Green ctype=Optical device=SPDIF-out loc=Rear") -#define PIN_PATCH_JACK_WO_DETECT(n) \ - PIN_PATCH_STRING(n, "seq=12 as=3 misc=1 color=Pink ctype=1/8 device=Mic loc=Rear") -#define PIN_PATCH_HPMIC_WO_DETECT(n) \ - PIN_PATCH_STRING(n, "seq=13 as=3 misc=1 color=Pink ctype=1/8 device=Mic loc=Rear") -#define PIN_PATCH_HPMIC_WITH_DETECT(n) \ - PIN_PATCH_STRING(n, "seq=12 as=3 color=Pink ctype=1/8 device=Mic loc=Rear") -#define PIN_PATCH_CLFE(n) \ +#define PIN_PATCH_SPDIF_OUT(n) \ + PIN_PATCH_STRING(n, \ + "as=4 misc=1 color=Green ctype=Optical device=SPDIF-out loc=Rear") +#define PIN_PATCH_JACK_WO_DETECT(n) \ + PIN_PATCH_STRING(n, \ + "seq=12 as=3 misc=1 color=Pink ctype=1/8 device=Mic loc=Rear") +#define PIN_PATCH_HPMIC_WO_DETECT(n) \ + PIN_PATCH_STRING(n, \ + "seq=13 as=3 misc=1 color=Pink ctype=1/8 device=Mic loc=Rear") +#define PIN_PATCH_HPMIC_WITH_DETECT(n) \ + PIN_PATCH_STRING(n, \ + "seq=12 as=3 color=Pink ctype=1/8 device=Mic loc=Rear") +#define PIN_PATCH_CLFE(n) \ PIN_PATCH_STRING(n, "seq=1 as=1 misc=4 color=Black ctype=1/8 loc=Rear") -#define PIN_PATCH_SURROUND(n) \ +#define PIN_PATCH_SURROUND(n) \ PIN_PATCH_STRING(n, "seq=2 as=1 misc=4 color=Orange ctype=1/8 loc=Rear") -#define PIN_PATCH_SUBWOOFER(n) \ - PIN_PATCH_STRING(n, "seq=1 as=1 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed") -#define PIN_PATCH_DOCK_LINE_OUT(n) \ +#define PIN_PATCH_SUBWOOFER(n) \ + PIN_PATCH_STRING(n, \ + "seq=1 as=1 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed") +#define PIN_PATCH_DOCK_LINE_OUT(n) \ PIN_PATCH_STRING(n, "seq=15 as=3 color=Black ctype=1/8 loc=Ext-Rear") -#define PIN_PATCH_DOCK_HP(n) \ - PIN_PATCH_STRING(n, "seq=15 as=3 color=Black ctype=1/8 device=Headphones loc=Ext-Rear") -#define PIN_PATCH_DOCK_MIC_IN(n) \ - PIN_PATCH_STRING(n, "as=4 color=Black ctype=1/8 device=Mic loc=Ext-Left") +#define PIN_PATCH_DOCK_HP(n) \ + PIN_PATCH_STRING(n, \ + "seq=15 as=3 color=Black ctype=1/8 device=Headphones loc=Ext-Rear") +#define PIN_PATCH_DOCK_MIC_IN(n) \ + PIN_PATCH_STRING(n, \ + "as=4 color=Black ctype=1/8 device=Mic loc=Ext-Left") enum { - PIN_PATCH_TYPE_EOL, /* end-of-list */ + PIN_PATCH_TYPE_EOL, /* end-of-list */ PIN_PATCH_TYPE_STRING, PIN_PATCH_TYPE_MASK, PIN_PATCH_TYPE_OVERRIDE }; struct pin_patch_t { - nid_t nid; /* nid to patch */ - int type; /* patch type */ + nid_t nid; /* nid to patch */ + int type; /* patch type */ union { - const char *string; /* patch string */ - uint32_t mask[2]; /* pin config mask */ - uint32_t override; /* pin config override */ + const char *string; /* patch string */ + uint32_t mask[2]; /* pin config mask */ + uint32_t override; /* pin config override */ } patch; }; struct pin_machine_model_t { - uint32_t id; /* vendor machine id */ + uint32_t id; /* vendor machine id */ }; struct model_pin_patch_t { - struct pin_machine_model_t *models; /* list of machine models */ - struct pin_patch_t *pin_patches; /* hardcoded overrides */ + struct pin_machine_model_t *models; /* list of machine models */ + struct pin_patch_t *pin_patches; /* hardcoded overrides */ void (*fixup_func)(struct hdaa_widget *); /* for future use */ }; struct hdaa_model_pin_patch_t { - uint32_t id; /* the hdaa id */ - struct model_pin_patch_t *patches; /* list of machine patches */ + uint32_t id; /* the hdaa id */ + struct model_pin_patch_t *patches; /* list of machine patches */ }; #endif /* PIN_PATCH_H */ Index: sys/dev/sound/pci/hda/pin_patch_realtek.h =================================================================== --- sys/dev/sound/pci/hda/pin_patch_realtek.h +++ sys/dev/sound/pci/hda/pin_patch_realtek.h @@ -36,144 +36,115 @@ * Pin patches */ static struct pin_patch_t pin_patches_lg_lw20[] = { - { - .nid = 26, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN } - }, { - .nid = 27, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT } - }, { } + { .nid = 26, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN } }, + { .nid = 27, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT } }, + {} }; static struct pin_patch_t pin_patches_clevo_d900t_asus_m5200[] = { - { - .nid = 24, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN } - }, { - .nid = 25, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN } - }, { - .nid = 26, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN } - }, { - .nid = 27, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN } - }, { - .nid = 28, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_CD } - }, { } + { .nid = 24, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN } }, + { .nid = 25, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN } }, + { .nid = 26, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN } }, + { .nid = 27, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN } }, + { .nid = 28, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_CD } }, + {} }; static struct pin_patch_t pin_patches_msi_ms034a[] = { - { - .nid = 25, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } - }, { - .nid = 28, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_CD | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } - }, { } + { .nid = 25, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } }, + { .nid = 28, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_CD | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } }, + {} }; static struct pin_patch_t pin_patches_asus_w6f[] = { - { - .nid = 11, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } - }, { - .nid = 12, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } - }, { - .nid = 14, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } - }, { - .nid = 15, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK } - }, { - .nid = 16, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } - }, { - .nid = 31, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } - }, { - .nid = 32, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } - }, { } + { .nid = 11, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } }, + { .nid = 12, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } }, + { .nid = 14, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } }, + { .nid = 15, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK } }, + { .nid = 16, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } }, + { .nid = 31, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } }, + { .nid = 32, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED } }, + {} }; static struct pin_patch_t pin_patches_uniwill_9075[] = { - { - .nid = 15, - .type = PIN_PATCH_TYPE_MASK, - .patch.mask = { - HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, - HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT | - HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK } - }, { } + { .nid = 15, + .type = PIN_PATCH_TYPE_MASK, + .patch.mask = { HDA_CONFIG_DEFAULTCONF_DEVICE_MASK | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK, + HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT | + HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK } }, + {} }; static struct pin_patch_t pin_patches_dell_xps_jack[] = { - PIN_PATCH_JACK_WO_DETECT(24), - PIN_PATCH_HPMIC_WO_DETECT(26), - { } + PIN_PATCH_JACK_WO_DETECT(24), PIN_PATCH_HPMIC_WO_DETECT(26), {} }; /* @@ -181,836 +152,712 @@ */ static struct hdaa_model_pin_patch_t realtek_model_pin_patches[] = { { /**** CODEC: HDA_CODEC_ALC255 ****/ - .id = HDA_CODEC_ALC255, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ASUS_X556UR_SUBVENDOR), - PIN_SUBVENDOR(ASUS_X540LA_SUBVENDOR), - PIN_SUBVENDOR(ASUS_Z550MA_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_JACK_WO_DETECT(25), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(DELL_9020M_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_JACK_WO_DETECT(25), - PIN_PATCH_HPMIC_WO_DETECT(26), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC256 ****/ - .id = HDA_CODEC_ALC256, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(DELL_9020M_SUBVENDOR), - PIN_SUBVENDOR(DELL_7000_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(27, "seq=1 as=5 misc=1 ctype=Analog device=Speaker loc=Internal conn=Fixed"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ASUS_X540A_SUBVENDOR), - PIN_SUBVENDOR(ASUS_X540SA_SUBVENDOR), - PIN_SUBVENDOR(ASUS_X541SA_SUBVENDOR), - PIN_SUBVENDOR(ASUS_X541UV_SUBVENDOR), - PIN_SUBVENDOR(ASUS_Z550SA_SUBVENDOR), - PIN_SUBVENDOR(ASUS_X705UD_SUBVENDOR), - PIN_SUBVENDOR(ASUS_X555UB_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_MIC_INTERNAL(19), - PIN_PATCH_STRING(25, "as=2 misc=1 color=Black ctype=1/8 device=Mic loc=Right"), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC260 ****/ - .id = HDA_CODEC_ALC260, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(SONY_S5_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(16, "seq=15 device=Headphones"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(HP_DC5750_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(17, "as=1 misc=1 ctype=ATAPI device=Speaker loc=Internal conn=Fixed"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(SONY_VAIO_TX_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(15, "color=Green ctype=1/8 device=Headphones loc=Rear"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(SONY_81BBID_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(15, "as=2 color=Black ctype=1/8 device=Headphones loc=Rear"), - PIN_PATCH_STRING(16, "seq=15 as=3 ctype=1/8"), - PIN_PATCH_NOT_APPLICABLE(17), - PIN_PATCH_STRING(18, "as=3 misc=9 color=Red ctype=1/8 device=Mic loc=Rear"), - PIN_PATCH_NOT_APPLICABLE(19), - PIN_PATCH_NOT_APPLICABLE(20), - PIN_PATCH_NOT_APPLICABLE(21), - PIN_PATCH_NOT_APPLICABLE(22), - PIN_PATCH_NOT_APPLICABLE(23), - PIN_PATCH_NOT_APPLICABLE(24), - PIN_PATCH_NOT_APPLICABLE(25), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC262 ****/ - .id = HDA_CODEC_ALC262, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(FS_H270_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(20, "as=1 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed"), - PIN_PATCH_STRING(21, "seq=15 as=2 misc=4 color=Black ctype=1/8 device=Headphones loc=Front"), - PIN_PATCH_STRING(22, "seq=15 as=1 misc=4 color=Black ctype=1/8 device=Headphones loc=Rear"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(FL_LB_S7110_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(21, "as=1 misc=1 ctype=Analog device=Speaker loc=Internal conn=Fixed"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(HP_Z200_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(22, "as=2 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(TYAN_N6650W_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(22, "as=15 misc=1 color=White ctype=ATAPI device=AUX loc=Onboard"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(LENOVO_3000_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(22, "seq=1 as=2"), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC268 ****/ - .id = HDA_CODEC_ALC268, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ACER_T5320_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(20, "as=1 seq=15"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ACER_TM_6293_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(30, "as=8 misc=1 color=Black ctype=Combo device=SPDIF-out loc=Rear"), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC269 ****/ - .id = HDA_CODEC_ALC269, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(LENOVO_X1CRBN_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(21, "as=1 seq=15"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(LENOVO_T430_SUBVENDOR), - PIN_SUBVENDOR(LENOVO_T430S_SUBVENDOR), - PIN_SUBVENDOR(LENOVO_X230_SUBVENDOR), - PIN_SUBVENDOR(LENOVO_X230T_SUBVENDOR), - PIN_SUBVENDOR(LENOVO_T431S_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_DOCK_MIC_IN(25), - PIN_PATCH_DOCK_HP(27), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ASUS_UX31A_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(33, "as=1 seq=15"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ASUS_G73JW_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_SUBWOOFER(23), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(FL_1475ID_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_DOCK_LINE_OUT(26), - PIN_PATCH_DOCK_MIC_IN(27), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(FL_LB_U904_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_HPMIC_WITH_DETECT(25), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(FL_LB_T731_SUBVENDOR), - PIN_SUBVENDOR(FL_LB_E725_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(33, "seq=15 as=2 color=Black ctype=1/8 device=Headphones loc=Front"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(DELL_05F4ID_SUBVENDOR), - PIN_SUBVENDOR(DELL_05F5ID_SUBVENDOR), - PIN_SUBVENDOR(DELL_05F6ID_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_JACK_WO_DETECT(25), - PIN_PATCH_HPMIC_WO_DETECT(26), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ACER_V5_571G_SUBVENDOR), - PIN_SUBVENDOR(ACER_V5_122P_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_JACK_WO_DETECT(25), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ASUS_X101CH_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(24, "seq=12 as=2 misc=8 color=Black ctype=1/8 device=Mic loc=Right"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ACER_AC700_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(18, "seq=15 as=2 misc=9 ctype=ATAPI device=Mic loc=Onboard conn=Fixed"), - PIN_PATCH_STRING(20, "as=1 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed"), - PIN_PATCH_STRING(24, "as=1 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed"), - PIN_PATCH_STRING(30, "seq=14 as=1 color=Black ctype=Digital device=SPDIF-out loc=Left"), - PIN_PATCH_STRING(33, "seq=15 as=1 color=Black ctype=1/8 device=Headphones loc=Left"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(HP_225AID_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(24, "seq=15 as=3 color=Black ctype=1/8 device=Line-in loc=Ext-Rear"), - PIN_PATCH_STRING(27, "as=2 color=Black ctype=1/8 loc=Ext-Rear"), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC271 ****/ - .id = HDA_CODEC_ALC271, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ACER_AO725_SUBVENDOR), - PIN_SUBVENDOR(ACER_AO756_SUBVENDOR), - PIN_SUBVENDOR(ACER_E1_472_SUBVENDOR), - PIN_SUBVENDOR(ACER_E1_572_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(20, "as=1 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed"), - PIN_PATCH_STRING(25, "as=2 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), - PIN_PATCH_STRING(27, "seq=15 as=2 misc=1 ctype=Analog device=Mic loc=Onboard conn=Fixed"), - PIN_PATCH_HP_OUT(33), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC280 ****/ - .id = HDA_CODEC_ALC280, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(HP_2272ID_SUBVENDOR), - PIN_SUBVENDOR(HP_2273ID_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(27, "as=2 color=Black ctype=1/8 loc=Ext-Rear"), - PIN_PATCH_HPMIC_WITH_DETECT(26), - PIN_PATCH_STRING(24, "seq=15 as=3 color=Black ctype=1/8 device=Line-in loc=Ext-Rear"), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC282 ****/ - .id = HDA_CODEC_ALC282, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ACER_V5_573G_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(18, "as=3 misc=1 ctype=Digital device=Mic loc=Internal conn=Fixed"), - PIN_PATCH_STRING(20, "as=1 misc=1 ctype=Analog device=Speaker loc=Internal conn=Fixed"), - PIN_PATCH_STRING(23, "seq=8 conn=None"), - PIN_PATCH_NOT_APPLICABLE(24), - PIN_PATCH_JACK_WO_DETECT(25), - PIN_PATCH_NOT_APPLICABLE(26), - PIN_PATCH_NOT_APPLICABLE(27), - PIN_PATCH_STRING(29, "seq=13 as=2 misc=11 color=Pink ctype=DIN device=Other conn=None"), - PIN_PATCH_NOT_APPLICABLE(30), - PIN_PATCH_STRING(33, "seq=15 as=1 color=Black ctype=1/8 device=Headphones loc=Left"), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC285 ****/ - .id = HDA_CODEC_ALC285, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(LENOVO_X120KH_SUBVENDOR), - PIN_SUBVENDOR(LENOVO_X120QD_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(33, "seq=15 as=1 color=Black ctype=1/8 device=Headphones loc=Left"), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC286 ****/ - .id = HDA_CODEC_ALC286, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(SONY_VAIO_P11_SUBVENDOR), - PIN_SUBVENDOR(SONY_VAIO_P13_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_JACK_WO_DETECT(25), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC288 ****/ - .id = HDA_CODEC_ALC288, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(DELL_E7240_SUBVENDOR), - { } - }, - .pin_patches = pin_patches_dell_xps_jack - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC290 ****/ - .id = HDA_CODEC_ALC290, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(DELL_V5470_SUBVENDOR), - PIN_SUBVENDOR(DELL_V5470_1_SUBVENDOR), - PIN_SUBVENDOR(DELL_V5480_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(18, "as=4 misc=1 ctype=Digital device=Mic loc=Internal conn=Fixed"), - PIN_PATCH_STRING(20, "as=1 misc=1 ctype=Analog device=Speaker loc=Internal conn=Fixed"), - PIN_PATCH_STRING(21, "seq=15 as=1 color=Green ctype=1/8 device=Headphones loc=Front"), - PIN_PATCH_STRING(23, "seq=2 as=1 misc=1 ctype=Analog device=Speaker loc=Internal conn=Fixed"), - PIN_PATCH_JACK_WO_DETECT(26), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC292 ****/ - .id = HDA_CODEC_ALC292, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(LENOVO_X120BS_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(21, "as=1 seq=15"), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC293 ****/ - .id = HDA_CODEC_ALC293, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(DELL_064AID_SUBVENDOR), - PIN_SUBVENDOR(DELL_064BID_SUBVENDOR), - PIN_SUBVENDOR(DELL_06D9ID_SUBVENDOR), - PIN_SUBVENDOR(DELL_06DAID_SUBVENDOR), - PIN_SUBVENDOR(DELL_06DBID_SUBVENDOR), - PIN_SUBVENDOR(DELL_06DDID_SUBVENDOR), - PIN_SUBVENDOR(DELL_06DEID_SUBVENDOR), - PIN_SUBVENDOR(DELL_06DFID_SUBVENDOR), - PIN_SUBVENDOR(DELL_06E0ID_SUBVENDOR), - PIN_SUBVENDOR(DELL_164AID_SUBVENDOR), - PIN_SUBVENDOR(DELL_164BID_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_HPMIC_WO_DETECT(24), - PIN_PATCH_JACK_WO_DETECT(26), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC298 ****/ - .id = HDA_CODEC_ALC298, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(DELL_XPS9560_SUBVENDOR), - { } - }, - .pin_patches = pin_patches_dell_xps_jack - }, - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(LENOVO_ALL_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_DOCK_LINE_OUT(23), - PIN_PATCH_HP_OUT(33), - { } - }, - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC861 ****/ - .id = HDA_CODEC_ALC861, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ASUS_W6F_SUBVENDOR), - { } - }, - .pin_patches = pin_patches_asus_w6f - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(UNIWILL_9075_SUBVENDOR), - { } - }, - .pin_patches = pin_patches_uniwill_9075 - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC880 ****/ - .id = HDA_CODEC_ALC880, - .patches = (struct model_pin_patch_t[]){ - { // old patch - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(LG_LW20_SUBVENDOR), - { } - }, - .pin_patches = pin_patches_lg_lw20 - }, { // old patch - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(CLEVO_D900T_SUBVENDOR), - PIN_SUBVENDOR(ASUS_M5200_SUBVENDOR), - { } - }, - .pin_patches = pin_patches_clevo_d900t_asus_m5200 - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(LG_M1_SUBVENDOR), - PIN_SUBVENDOR(LG_P1_SUBVENDOR), - PIN_SUBVENDOR(LG_W1_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_NOT_APPLICABLE(22), - PIN_PATCH_NOT_APPLICABLE(24), - PIN_PATCH_NOT_APPLICABLE(26), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(COEUS_G610P_SUBVENDOR), - PIN_SUBVENDOR(ARIMA_W810_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_NOT_APPLICABLE(23), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(FS_AMILO_M1437_SUBVENDOR), - PIN_SUBVENDOR(FS_AMILO_M1451G_SUBVENDOR), - PIN_SUBVENDOR(FS_AMILO_PI1556_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_HP_OUT(20), - PIN_PATCH_SPEAKER(21), - PIN_PATCH_BASS_SPEAKER(22), - PIN_PATCH_NOT_APPLICABLE(23), - PIN_PATCH_NOT_APPLICABLE(24), - PIN_PATCH_MIC_IN(25), - PIN_PATCH_NOT_APPLICABLE(26), - PIN_PATCH_NOT_APPLICABLE(27), - PIN_PATCH_NOT_APPLICABLE(28), - PIN_PATCH_NOT_APPLICABLE(29), - PIN_PATCH_NOT_APPLICABLE(30), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(UNIWILL_9054_SUBVENDOR), - PIN_SUBVENDOR(FS_AMILO_XI1526_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_HP_OUT(20), - PIN_PATCH_SPEAKER(21), - PIN_PATCH_NOT_APPLICABLE(22), - PIN_PATCH_NOT_APPLICABLE(23), - PIN_PATCH_NOT_APPLICABLE(24), - PIN_PATCH_MIC_IN(25), - PIN_PATCH_NOT_APPLICABLE(26), - PIN_PATCH_NOT_APPLICABLE(27), - PIN_PATCH_NOT_APPLICABLE(28), - PIN_PATCH_NOT_APPLICABLE(29), - PIN_PATCH_SPDIF_OUT(30), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(LG_LW25_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(26, "seq=15 as=4 misc=4 color=Blue ctype=1/8 device=Line-in loc=Rear"), - PIN_PATCH_STRING(27, "seq=15 as=3 color=Green ctype=1/8 device=Headphones loc=Left"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(UNIWILL_9070_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_HP(20), - PIN_PATCH_SPEAKER(21), - PIN_PATCH_BASS_SPEAKER(22), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(UNIWILL_9050_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_NOT_APPLICABLE(23), - PIN_PATCH_NOT_APPLICABLE(25), - PIN_PATCH_NOT_APPLICABLE(27), - PIN_PATCH_NOT_APPLICABLE(31), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ASUS_Z71V_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_SPEAKER(20), - PIN_PATCH_HP(21), - PIN_PATCH_NOT_APPLICABLE(22), - PIN_PATCH_NOT_APPLICABLE(23), - PIN_PATCH_MIC_IN(24), - PIN_PATCH_NOT_APPLICABLE(25), - PIN_PATCH_LINE_IN(26), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ASUS_W5A_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_HP(20), - PIN_PATCH_NOT_APPLICABLE(21), - PIN_PATCH_NOT_APPLICABLE(22), - PIN_PATCH_NOT_APPLICABLE(23), - PIN_PATCH_MIC_INTERNAL(24), - PIN_PATCH_NOT_APPLICABLE(25), - PIN_PATCH_NOT_APPLICABLE(26), - PIN_PATCH_NOT_APPLICABLE(27), - PIN_PATCH_NOT_APPLICABLE(28), - PIN_PATCH_NOT_APPLICABLE(29), - PIN_PATCH_STRING(30, "seq=14 as=1 misc=1 color=Black ctype=ATAPI device=SPDIF-out loc=Lid-In conn=Fixed"), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ACER_E310ID_SUBVENDOR), - PIN_SUBVENDOR(SONY_81A0ID_SUBVENDOR), - PIN_SUBVENDOR(SONY_81D6ID_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_LINE_OUT(20), - PIN_PATCH_NOT_APPLICABLE(21), - PIN_PATCH_NOT_APPLICABLE(22), - PIN_PATCH_NOT_APPLICABLE(23), - PIN_PATCH_STRING(24, "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), - PIN_PATCH_HP(25), - PIN_PATCH_LINE_IN(26), - PIN_PATCH_MIC_FRONT(27), - PIN_PATCH_NOT_APPLICABLE(28), - PIN_PATCH_NOT_APPLICABLE(29), - PIN_PATCH_NOT_APPLICABLE(30), - PIN_PATCH_NOT_APPLICABLE(31), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ACER_0070ID_SUBVENDOR), - PIN_SUBVENDOR(ACER_E309ID_SUBVENDOR), - PIN_SUBVENDOR(INTEL_D402ID_SUBVENDOR), - PIN_SUBVENDOR(INTEL_E305ID_SUBVENDOR), - PIN_SUBVENDOR(INTEL_E308ID_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_LINE_OUT(20), - PIN_PATCH_NOT_APPLICABLE(21), - PIN_PATCH_NOT_APPLICABLE(22), - PIN_PATCH_NOT_APPLICABLE(23), - PIN_PATCH_STRING(24, "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), - PIN_PATCH_HP(25), - PIN_PATCH_LINE_IN(26), - PIN_PATCH_MIC_FRONT(27), - PIN_PATCH_NOT_APPLICABLE(28), - PIN_PATCH_NOT_APPLICABLE(29), - PIN_PATCH_STRING(30, "seq=14 as=1 misc=1 color=Black ctype=RCA device=SPDIF-out loc=Rear"), - PIN_PATCH_NOT_APPLICABLE(31), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(GATEWAY_3032ID_SUBVENDOR), - PIN_SUBVENDOR(GATEWAY_3033ID_SUBVENDOR), - PIN_SUBVENDOR(GATEWAY_4039ID_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_LINE_OUT(20), - PIN_PATCH_NOT_APPLICABLE(21), - PIN_PATCH_CLFE(22), - PIN_PATCH_SURROUND(23), - PIN_PATCH_STRING(24, "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), - PIN_PATCH_HP(25), - PIN_PATCH_LINE_IN(26), - PIN_PATCH_MIC_FRONT(27), - PIN_PATCH_NOT_APPLICABLE(28), - PIN_PATCH_NOT_APPLICABLE(29), - PIN_PATCH_NOT_APPLICABLE(30), - PIN_PATCH_NOT_APPLICABLE(31), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(COEUS_A880ID_SUBVENDOR), - PIN_SUBVENDOR(BIOSTAR_8202ID_SUBVENDOR), - PIN_SUBVENDOR(EPOX_400DID_SUBVENDOR), - PIN_SUBVENDOR(EPOX_EP5LDA_SUBVENDOR), - PIN_SUBVENDOR(INTEL_A100ID_SUBVENDOR), - PIN_SUBVENDOR(INTEL_D400ID_SUBVENDOR), - PIN_SUBVENDOR(INTEL_D401ID_SUBVENDOR), - PIN_SUBVENDOR(INTEL_E224ID_SUBVENDOR), - PIN_SUBVENDOR(INTEL_E400ID_SUBVENDOR), - PIN_SUBVENDOR(INTEL_E401ID_SUBVENDOR), - PIN_SUBVENDOR(INTEL_E402ID_SUBVENDOR), - PIN_SUBVENDOR(AOPEN_I915GMMHFS_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_LINE_OUT(20), - PIN_PATCH_NOT_APPLICABLE(21), - PIN_PATCH_CLFE(22), - PIN_PATCH_SURROUND(23), - PIN_PATCH_STRING(24, "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), - PIN_PATCH_HP(25), - PIN_PATCH_LINE_IN(26), - PIN_PATCH_MIC_FRONT(27), - PIN_PATCH_NOT_APPLICABLE(28), - PIN_PATCH_NOT_APPLICABLE(29), - PIN_PATCH_STRING(30, "seq=14 as=1 misc=1 color=Black ctype=RCA device=SPDIF-out loc=Rear"), - PIN_PATCH_NOT_APPLICABLE(31), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ACER_APFV_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_LINE_OUT(20), - PIN_PATCH_SURROUND(21), - PIN_PATCH_CLFE(22), - PIN_PATCH_STRING(23, "seq=4 as=1 misc=4 color=Grey ctype=1/8 loc=Rear"), - PIN_PATCH_STRING(24, "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), - PIN_PATCH_MIC_FRONT(25), - PIN_PATCH_LINE_IN(26), - PIN_PATCH_HP(27), - PIN_PATCH_NOT_APPLICABLE(28), - PIN_PATCH_NOT_APPLICABLE(29), - PIN_PATCH_NOT_APPLICABLE(30), - PIN_PATCH_NOT_APPLICABLE(31), - { } - } - }, { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(ACER_0077ID_SUBVENDOR), - PIN_SUBVENDOR(ACER_0078ID_SUBVENDOR), - PIN_SUBVENDOR(ACER_0087ID_SUBVENDOR), - PIN_SUBVENDOR(SHUTTLE_ST20G5_SUBVENDOR), - PIN_SUBVENDOR(GB_K8_SUBVENDOR), - PIN_SUBVENDOR(MSI_1150ID_SUBVENDOR), - PIN_SUBVENDOR(FIC_P4M_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_LINE_OUT(20), - PIN_PATCH_SURROUND(21), - PIN_PATCH_CLFE(22), - PIN_PATCH_STRING(23, "seq=4 as=1 misc=4 color=Grey ctype=1/8 loc=Rear"), - PIN_PATCH_STRING(24, "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), - PIN_PATCH_MIC_FRONT(25), - PIN_PATCH_LINE_IN(26), - PIN_PATCH_HP(27), - PIN_PATCH_NOT_APPLICABLE(28), - PIN_PATCH_NOT_APPLICABLE(29), - PIN_PATCH_STRING(30, "seq=14 as=1 misc=1 color=Black ctype=RCA device=SPDIF-out loc=Rear"), - PIN_PATCH_NOT_APPLICABLE(31), - { } - } - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC883 ****/ - .id = HDA_CODEC_ALC883, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(MSI_MS034A_SUBVENDOR), - { } - }, - .pin_patches = pin_patches_msi_ms034a - }, { } - } - }, { /**** CODEC: HDA_CODEC_ALC892 ****/ - .id = HDA_CODEC_ALC892, - .patches = (struct model_pin_patch_t[]){ - { - .models = (struct pin_machine_model_t[]){ - PIN_SUBVENDOR(INTEL_DH87RL_SUBVENDOR), - { } - }, - .pin_patches = (struct pin_patch_t[]){ - PIN_PATCH_STRING(27, "as=1 seq=15"), - { } - } - }, { } - } - } + .id = HDA_CODEC_ALC255, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ASUS_X556UR_SUBVENDOR), + PIN_SUBVENDOR(ASUS_X540LA_SUBVENDOR), + PIN_SUBVENDOR(ASUS_Z550MA_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_JACK_WO_DETECT(25), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(DELL_9020M_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_JACK_WO_DETECT(25), + PIN_PATCH_HPMIC_WO_DETECT(26), {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC256 ****/ + .id = HDA_CODEC_ALC256, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(DELL_9020M_SUBVENDOR), + PIN_SUBVENDOR(DELL_7000_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 27, "seq=1 as=5 misc=1 ctype=Analog device=Speaker loc=Internal conn=Fixed"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ASUS_X540A_SUBVENDOR), + PIN_SUBVENDOR(ASUS_X540SA_SUBVENDOR), + PIN_SUBVENDOR(ASUS_X541SA_SUBVENDOR), + PIN_SUBVENDOR(ASUS_X541UV_SUBVENDOR), + PIN_SUBVENDOR(ASUS_Z550SA_SUBVENDOR), + PIN_SUBVENDOR(ASUS_X705UD_SUBVENDOR), + PIN_SUBVENDOR(ASUS_X555UB_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_MIC_INTERNAL(19), + PIN_PATCH_STRING(25, + "as=2 misc=1 color=Black ctype=1/8 device=Mic loc=Right"), + {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC260 ****/ + .id = HDA_CODEC_ALC260, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(SONY_S5_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 16, "seq=15 device=Headphones"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(HP_DC5750_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 17, "as=1 misc=1 ctype=ATAPI device=Speaker loc=Internal conn=Fixed"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(SONY_VAIO_TX_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 15, "color=Green ctype=1/8 device=Headphones loc=Rear"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(SONY_81BBID_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 15, "as=2 color=Black ctype=1/8 device=Headphones loc=Rear"), + PIN_PATCH_STRING(16, "seq=15 as=3 ctype=1/8"), + PIN_PATCH_NOT_APPLICABLE(17), + PIN_PATCH_STRING( + 18, "as=3 misc=9 color=Red ctype=1/8 device=Mic loc=Rear"), + PIN_PATCH_NOT_APPLICABLE(19), + PIN_PATCH_NOT_APPLICABLE(20), + PIN_PATCH_NOT_APPLICABLE(21), + PIN_PATCH_NOT_APPLICABLE(22), + PIN_PATCH_NOT_APPLICABLE(23), + PIN_PATCH_NOT_APPLICABLE(24), + PIN_PATCH_NOT_APPLICABLE(25), {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC262 ****/ + .id = HDA_CODEC_ALC262, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(FS_H270_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 20, "as=1 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed"), + PIN_PATCH_STRING( + 21, "seq=15 as=2 misc=4 color=Black ctype=1/8 device=Headphones loc=Front"), + PIN_PATCH_STRING( + 22, "seq=15 as=1 misc=4 color=Black ctype=1/8 device=Headphones loc=Rear"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(FL_LB_S7110_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 21, "as=1 misc=1 ctype=Analog device=Speaker loc=Internal conn=Fixed"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(HP_Z200_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 22, "as=2 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(TYAN_N6650W_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 22, "as=15 misc=1 color=White ctype=ATAPI device=AUX loc=Onboard"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(LENOVO_3000_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING(22, "seq=1 as=2"), {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC268 ****/ + .id = HDA_CODEC_ALC268, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ACER_T5320_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING(20, "as=1 seq=15"), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ACER_TM_6293_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 30, "as=8 misc=1 color=Black ctype=Combo device=SPDIF-out loc=Rear"), + {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC269 ****/ + .id = HDA_CODEC_ALC269, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(LENOVO_X1CRBN_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING(21, "as=1 seq=15"), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(LENOVO_T430_SUBVENDOR), + PIN_SUBVENDOR(LENOVO_T430S_SUBVENDOR), + PIN_SUBVENDOR(LENOVO_X230_SUBVENDOR), + PIN_SUBVENDOR(LENOVO_X230T_SUBVENDOR), + PIN_SUBVENDOR(LENOVO_T431S_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_DOCK_MIC_IN(25), + PIN_PATCH_DOCK_HP(27), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ASUS_UX31A_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING(33, "as=1 seq=15"), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ASUS_G73JW_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_SUBWOOFER(23), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(FL_1475ID_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_DOCK_LINE_OUT(26), + PIN_PATCH_DOCK_MIC_IN(27), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(FL_LB_U904_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_HPMIC_WITH_DETECT(25), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(FL_LB_T731_SUBVENDOR), + PIN_SUBVENDOR(FL_LB_E725_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 33, "seq=15 as=2 color=Black ctype=1/8 device=Headphones loc=Front"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(DELL_05F4ID_SUBVENDOR), + PIN_SUBVENDOR(DELL_05F5ID_SUBVENDOR), + PIN_SUBVENDOR(DELL_05F6ID_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_JACK_WO_DETECT(25), + PIN_PATCH_HPMIC_WO_DETECT(26), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ACER_V5_571G_SUBVENDOR), + PIN_SUBVENDOR(ACER_V5_122P_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_JACK_WO_DETECT(25), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ASUS_X101CH_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 24, "seq=12 as=2 misc=8 color=Black ctype=1/8 device=Mic loc=Right"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ACER_AC700_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 18, "seq=15 as=2 misc=9 ctype=ATAPI device=Mic loc=Onboard conn=Fixed"), + PIN_PATCH_STRING( + 20, "as=1 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed"), + PIN_PATCH_STRING( + 24, "as=1 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed"), + PIN_PATCH_STRING( + 30, "seq=14 as=1 color=Black ctype=Digital device=SPDIF-out loc=Left"), + PIN_PATCH_STRING( + 33, "seq=15 as=1 color=Black ctype=1/8 device=Headphones loc=Left"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(HP_225AID_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 24, "seq=15 as=3 color=Black ctype=1/8 device=Line-in loc=Ext-Rear"), + PIN_PATCH_STRING( + 27, "as=2 color=Black ctype=1/8 loc=Ext-Rear"), + {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC271 ****/ + .id = HDA_CODEC_ALC271, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ACER_AO725_SUBVENDOR), + PIN_SUBVENDOR(ACER_AO756_SUBVENDOR), + PIN_SUBVENDOR(ACER_E1_472_SUBVENDOR), + PIN_SUBVENDOR(ACER_E1_572_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 20, "as=1 misc=1 ctype=ATAPI device=Speaker loc=Onboard conn=Fixed"), + PIN_PATCH_STRING( + 25, "as=2 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), + PIN_PATCH_STRING( + 27, "seq=15 as=2 misc=1 ctype=Analog device=Mic loc=Onboard conn=Fixed"), + PIN_PATCH_HP_OUT(33), {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC280 ****/ + .id = HDA_CODEC_ALC280, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(HP_2272ID_SUBVENDOR), + PIN_SUBVENDOR(HP_2273ID_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 27, "as=2 color=Black ctype=1/8 loc=Ext-Rear"), + PIN_PATCH_HPMIC_WITH_DETECT(26), + PIN_PATCH_STRING( + 24, "seq=15 as=3 color=Black ctype=1/8 device=Line-in loc=Ext-Rear"), + {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC282 ****/ + .id = HDA_CODEC_ALC282, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ACER_V5_573G_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 18, "as=3 misc=1 ctype=Digital device=Mic loc=Internal conn=Fixed"), + PIN_PATCH_STRING( + 20, "as=1 misc=1 ctype=Analog device=Speaker loc=Internal conn=Fixed"), + PIN_PATCH_STRING(23, "seq=8 conn=None"), + PIN_PATCH_NOT_APPLICABLE(24), + PIN_PATCH_JACK_WO_DETECT(25), + PIN_PATCH_NOT_APPLICABLE(26), + PIN_PATCH_NOT_APPLICABLE(27), + PIN_PATCH_STRING( + 29, "seq=13 as=2 misc=11 color=Pink ctype=DIN device=Other conn=None"), + PIN_PATCH_NOT_APPLICABLE(30), + PIN_PATCH_STRING( + 33, "seq=15 as=1 color=Black ctype=1/8 device=Headphones loc=Left"), + {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC285 ****/ + .id = HDA_CODEC_ALC285, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(LENOVO_X120KH_SUBVENDOR), + PIN_SUBVENDOR(LENOVO_X120QD_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 33, "seq=15 as=1 color=Black ctype=1/8 device=Headphones loc=Left"), + {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC286 ****/ + .id = HDA_CODEC_ALC286, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(SONY_VAIO_P11_SUBVENDOR), + PIN_SUBVENDOR(SONY_VAIO_P13_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_JACK_WO_DETECT(25), {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC288 ****/ + .id = HDA_CODEC_ALC288, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(DELL_E7240_SUBVENDOR), {} }, + .pin_patches = pin_patches_dell_xps_jack }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC290 ****/ + .id = HDA_CODEC_ALC290, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(DELL_V5470_SUBVENDOR), + PIN_SUBVENDOR(DELL_V5470_1_SUBVENDOR), + PIN_SUBVENDOR(DELL_V5480_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 18, "as=4 misc=1 ctype=Digital device=Mic loc=Internal conn=Fixed"), + PIN_PATCH_STRING( + 20, "as=1 misc=1 ctype=Analog device=Speaker loc=Internal conn=Fixed"), + PIN_PATCH_STRING( + 21, "seq=15 as=1 color=Green ctype=1/8 device=Headphones loc=Front"), + PIN_PATCH_STRING( + 23, "seq=2 as=1 misc=1 ctype=Analog device=Speaker loc=Internal conn=Fixed"), + PIN_PATCH_JACK_WO_DETECT(26), {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC292 ****/ + .id = HDA_CODEC_ALC292, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(LENOVO_X120BS_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING(21, "as=1 seq=15"), {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC293 ****/ + .id = HDA_CODEC_ALC293, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(DELL_064AID_SUBVENDOR), + PIN_SUBVENDOR(DELL_064BID_SUBVENDOR), + PIN_SUBVENDOR(DELL_06D9ID_SUBVENDOR), + PIN_SUBVENDOR(DELL_06DAID_SUBVENDOR), + PIN_SUBVENDOR(DELL_06DBID_SUBVENDOR), + PIN_SUBVENDOR(DELL_06DDID_SUBVENDOR), + PIN_SUBVENDOR(DELL_06DEID_SUBVENDOR), + PIN_SUBVENDOR(DELL_06DFID_SUBVENDOR), + PIN_SUBVENDOR(DELL_06E0ID_SUBVENDOR), + PIN_SUBVENDOR(DELL_164AID_SUBVENDOR), + PIN_SUBVENDOR(DELL_164BID_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_HPMIC_WO_DETECT(24), + PIN_PATCH_JACK_WO_DETECT(26), {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC298 ****/ + .id = HDA_CODEC_ALC298, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(DELL_XPS9560_SUBVENDOR), {} }, + .pin_patches = pin_patches_dell_xps_jack }, + { + .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(LENOVO_ALL_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_DOCK_LINE_OUT(23), + PIN_PATCH_HP_OUT(33), {} }, + }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC861 ****/ + .id = HDA_CODEC_ALC861, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ASUS_W6F_SUBVENDOR), {} }, + .pin_patches = pin_patches_asus_w6f }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(UNIWILL_9075_SUBVENDOR), {} }, + .pin_patches = pin_patches_uniwill_9075 }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC880 ****/ + .id = HDA_CODEC_ALC880, + .patches = + (struct model_pin_patch_t[]) { + { // old patch + .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(LG_LW20_SUBVENDOR), {} }, + .pin_patches = pin_patches_lg_lw20 }, + { // old patch + .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(CLEVO_D900T_SUBVENDOR), + PIN_SUBVENDOR(ASUS_M5200_SUBVENDOR), {} }, + .pin_patches = pin_patches_clevo_d900t_asus_m5200 }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(LG_M1_SUBVENDOR), + PIN_SUBVENDOR(LG_P1_SUBVENDOR), + PIN_SUBVENDOR(LG_W1_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_NOT_APPLICABLE(22), + PIN_PATCH_NOT_APPLICABLE(24), + PIN_PATCH_NOT_APPLICABLE(26), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(COEUS_G610P_SUBVENDOR), + PIN_SUBVENDOR(ARIMA_W810_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_NOT_APPLICABLE(23), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(FS_AMILO_M1437_SUBVENDOR), + PIN_SUBVENDOR(FS_AMILO_M1451G_SUBVENDOR), + PIN_SUBVENDOR(FS_AMILO_PI1556_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_HP_OUT(20), + PIN_PATCH_SPEAKER(21), + PIN_PATCH_BASS_SPEAKER(22), + PIN_PATCH_NOT_APPLICABLE(23), + PIN_PATCH_NOT_APPLICABLE(24), + PIN_PATCH_MIC_IN(25), + PIN_PATCH_NOT_APPLICABLE(26), + PIN_PATCH_NOT_APPLICABLE(27), + PIN_PATCH_NOT_APPLICABLE(28), + PIN_PATCH_NOT_APPLICABLE(29), + PIN_PATCH_NOT_APPLICABLE(30), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(UNIWILL_9054_SUBVENDOR), + PIN_SUBVENDOR(FS_AMILO_XI1526_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_HP_OUT(20), + PIN_PATCH_SPEAKER(21), + PIN_PATCH_NOT_APPLICABLE(22), + PIN_PATCH_NOT_APPLICABLE(23), + PIN_PATCH_NOT_APPLICABLE(24), + PIN_PATCH_MIC_IN(25), + PIN_PATCH_NOT_APPLICABLE(26), + PIN_PATCH_NOT_APPLICABLE(27), + PIN_PATCH_NOT_APPLICABLE(28), + PIN_PATCH_NOT_APPLICABLE(29), + PIN_PATCH_SPDIF_OUT(30), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(LG_LW25_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING( + 26, "seq=15 as=4 misc=4 color=Blue ctype=1/8 device=Line-in loc=Rear"), + PIN_PATCH_STRING( + 27, "seq=15 as=3 color=Green ctype=1/8 device=Headphones loc=Left"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(UNIWILL_9070_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_HP(20), + PIN_PATCH_SPEAKER(21), + PIN_PATCH_BASS_SPEAKER(22), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(UNIWILL_9050_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_NOT_APPLICABLE(23), + PIN_PATCH_NOT_APPLICABLE(25), + PIN_PATCH_NOT_APPLICABLE(27), + PIN_PATCH_NOT_APPLICABLE(31), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ASUS_Z71V_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_SPEAKER(20), + PIN_PATCH_HP(21), PIN_PATCH_NOT_APPLICABLE(22), + PIN_PATCH_NOT_APPLICABLE(23), + PIN_PATCH_MIC_IN(24), + PIN_PATCH_NOT_APPLICABLE(25), + PIN_PATCH_LINE_IN(26), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ASUS_W5A_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_HP(20), + PIN_PATCH_NOT_APPLICABLE(21), + PIN_PATCH_NOT_APPLICABLE(22), + PIN_PATCH_NOT_APPLICABLE(23), + PIN_PATCH_MIC_INTERNAL(24), + PIN_PATCH_NOT_APPLICABLE(25), + PIN_PATCH_NOT_APPLICABLE(26), + PIN_PATCH_NOT_APPLICABLE(27), + PIN_PATCH_NOT_APPLICABLE(28), + PIN_PATCH_NOT_APPLICABLE(29), + PIN_PATCH_STRING( + 30, "seq=14 as=1 misc=1 color=Black ctype=ATAPI device=SPDIF-out loc=Lid-In conn=Fixed"), + {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ACER_E310ID_SUBVENDOR), + PIN_SUBVENDOR(SONY_81A0ID_SUBVENDOR), + PIN_SUBVENDOR(SONY_81D6ID_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_LINE_OUT(20), + PIN_PATCH_NOT_APPLICABLE(21), + PIN_PATCH_NOT_APPLICABLE(22), + PIN_PATCH_NOT_APPLICABLE(23), + PIN_PATCH_STRING(24, + "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), + PIN_PATCH_HP(25), PIN_PATCH_LINE_IN(26), + PIN_PATCH_MIC_FRONT(27), + PIN_PATCH_NOT_APPLICABLE(28), + PIN_PATCH_NOT_APPLICABLE(29), + PIN_PATCH_NOT_APPLICABLE(30), + PIN_PATCH_NOT_APPLICABLE(31), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ACER_0070ID_SUBVENDOR), + PIN_SUBVENDOR(ACER_E309ID_SUBVENDOR), + PIN_SUBVENDOR(INTEL_D402ID_SUBVENDOR), + PIN_SUBVENDOR(INTEL_E305ID_SUBVENDOR), + PIN_SUBVENDOR(INTEL_E308ID_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_LINE_OUT(20), + PIN_PATCH_NOT_APPLICABLE(21), + PIN_PATCH_NOT_APPLICABLE(22), + PIN_PATCH_NOT_APPLICABLE(23), + PIN_PATCH_STRING(24, + "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), + PIN_PATCH_HP(25), PIN_PATCH_LINE_IN(26), + PIN_PATCH_MIC_FRONT(27), + PIN_PATCH_NOT_APPLICABLE(28), + PIN_PATCH_NOT_APPLICABLE(29), + PIN_PATCH_STRING( + 30, "seq=14 as=1 misc=1 color=Black ctype=RCA device=SPDIF-out loc=Rear"), + PIN_PATCH_NOT_APPLICABLE(31), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(GATEWAY_3032ID_SUBVENDOR), + PIN_SUBVENDOR(GATEWAY_3033ID_SUBVENDOR), + PIN_SUBVENDOR(GATEWAY_4039ID_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_LINE_OUT(20), + PIN_PATCH_NOT_APPLICABLE(21), + PIN_PATCH_CLFE(22), PIN_PATCH_SURROUND(23), + PIN_PATCH_STRING(24, + "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), + PIN_PATCH_HP(25), PIN_PATCH_LINE_IN(26), + PIN_PATCH_MIC_FRONT(27), + PIN_PATCH_NOT_APPLICABLE(28), + PIN_PATCH_NOT_APPLICABLE(29), + PIN_PATCH_NOT_APPLICABLE(30), + PIN_PATCH_NOT_APPLICABLE(31), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(COEUS_A880ID_SUBVENDOR), + PIN_SUBVENDOR(BIOSTAR_8202ID_SUBVENDOR), + PIN_SUBVENDOR(EPOX_400DID_SUBVENDOR), + PIN_SUBVENDOR(EPOX_EP5LDA_SUBVENDOR), + PIN_SUBVENDOR(INTEL_A100ID_SUBVENDOR), + PIN_SUBVENDOR(INTEL_D400ID_SUBVENDOR), + PIN_SUBVENDOR(INTEL_D401ID_SUBVENDOR), + PIN_SUBVENDOR(INTEL_E224ID_SUBVENDOR), + PIN_SUBVENDOR(INTEL_E400ID_SUBVENDOR), + PIN_SUBVENDOR(INTEL_E401ID_SUBVENDOR), + PIN_SUBVENDOR(INTEL_E402ID_SUBVENDOR), + PIN_SUBVENDOR(AOPEN_I915GMMHFS_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_LINE_OUT(20), + PIN_PATCH_NOT_APPLICABLE(21), + PIN_PATCH_CLFE(22), PIN_PATCH_SURROUND(23), + PIN_PATCH_STRING(24, + "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), + PIN_PATCH_HP(25), PIN_PATCH_LINE_IN(26), + PIN_PATCH_MIC_FRONT(27), + PIN_PATCH_NOT_APPLICABLE(28), + PIN_PATCH_NOT_APPLICABLE(29), + PIN_PATCH_STRING( + 30, "seq=14 as=1 misc=1 color=Black ctype=RCA device=SPDIF-out loc=Rear"), + PIN_PATCH_NOT_APPLICABLE(31), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ACER_APFV_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_LINE_OUT(20), + PIN_PATCH_SURROUND(21), PIN_PATCH_CLFE(22), + PIN_PATCH_STRING(23, + "seq=4 as=1 misc=4 color=Grey ctype=1/8 loc=Rear"), + PIN_PATCH_STRING( + 24, "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), + PIN_PATCH_MIC_FRONT(25), PIN_PATCH_LINE_IN(26), + PIN_PATCH_HP(27), PIN_PATCH_NOT_APPLICABLE(28), + PIN_PATCH_NOT_APPLICABLE(29), + PIN_PATCH_NOT_APPLICABLE(30), + PIN_PATCH_NOT_APPLICABLE(31), {} } }, + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(ACER_0077ID_SUBVENDOR), + PIN_SUBVENDOR(ACER_0078ID_SUBVENDOR), + PIN_SUBVENDOR(ACER_0087ID_SUBVENDOR), + PIN_SUBVENDOR(SHUTTLE_ST20G5_SUBVENDOR), + PIN_SUBVENDOR(GB_K8_SUBVENDOR), + PIN_SUBVENDOR(MSI_1150ID_SUBVENDOR), + PIN_SUBVENDOR(FIC_P4M_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { PIN_PATCH_LINE_OUT(20), + PIN_PATCH_SURROUND(21), PIN_PATCH_CLFE(22), + PIN_PATCH_STRING(23, + "seq=4 as=1 misc=4 color=Grey ctype=1/8 loc=Rear"), + PIN_PATCH_STRING( + 24, "as=3 misc=12 color=Pink ctype=1/8 device=Mic loc=Rear"), + PIN_PATCH_MIC_FRONT(25), PIN_PATCH_LINE_IN(26), + PIN_PATCH_HP(27), PIN_PATCH_NOT_APPLICABLE(28), + PIN_PATCH_NOT_APPLICABLE(29), + PIN_PATCH_STRING( + 30, "seq=14 as=1 misc=1 color=Black ctype=RCA device=SPDIF-out loc=Rear"), + PIN_PATCH_NOT_APPLICABLE(31), {} } }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC883 ****/ + .id = HDA_CODEC_ALC883, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(MSI_MS034A_SUBVENDOR), {} }, + .pin_patches = pin_patches_msi_ms034a }, + {} } }, + { /**** CODEC: HDA_CODEC_ALC892 ****/ + .id = HDA_CODEC_ALC892, + .patches = + (struct model_pin_patch_t[]) { + { .models = + (struct pin_machine_model_t[]) { + PIN_SUBVENDOR(INTEL_DH87RL_SUBVENDOR), {} }, + .pin_patches = + (struct pin_patch_t[]) { + PIN_PATCH_STRING(27, "as=1 seq=15"), {} } }, + {} } } }; #endif /* PIN_PATCH_REALTEK_H */ Index: sys/dev/sound/pci/hdspe-pcm.c =================================================================== --- sys/dev/sound/pci/hdspe-pcm.c +++ sys/dev/sound/pci/hdspe-pcm.c @@ -32,16 +32,15 @@ * Supported cards: AIO, RayDAT. */ -#include -#include -#include - #include #include +#include +#include +#include #include -#define HDSPE_MATRIX_MAX 8 +#define HDSPE_MATRIX_MAX 8 struct hdspe_latency { uint32_t n; @@ -50,16 +49,16 @@ }; static struct hdspe_latency latency_map[] = { - { 7, 32, 0.7 }, - { 0, 64, 1.5 }, - { 1, 128, 3 }, - { 2, 256, 6 }, - { 3, 512, 12 }, - { 4, 1024, 23 }, - { 5, 2048, 46 }, - { 6, 4096, 93 }, - - { 0, 0, 0 }, + { 7, 32, 0.7 }, + { 0, 64, 1.5 }, + { 1, 128, 3 }, + { 2, 256, 6 }, + { 3, 512, 12 }, + { 4, 1024, 23 }, + { 5, 2048, 46 }, + { 6, 4096, 93 }, + + { 0, 0, 0 }, }; struct hdspe_rate { @@ -68,15 +67,15 @@ }; static struct hdspe_rate rate_map[] = { - { 32000, (HDSPE_FREQ_32000) }, - { 44100, (HDSPE_FREQ_44100) }, - { 48000, (HDSPE_FREQ_48000) }, - { 64000, (HDSPE_FREQ_32000 | HDSPE_FREQ_DOUBLE) }, - { 88200, (HDSPE_FREQ_44100 | HDSPE_FREQ_DOUBLE) }, - { 96000, (HDSPE_FREQ_48000 | HDSPE_FREQ_DOUBLE) }, - { 128000, (HDSPE_FREQ_32000 | HDSPE_FREQ_QUAD) }, - { 176400, (HDSPE_FREQ_44100 | HDSPE_FREQ_QUAD) }, - { 192000, (HDSPE_FREQ_48000 | HDSPE_FREQ_QUAD) }, + { 32000, (HDSPE_FREQ_32000) }, + { 44100, (HDSPE_FREQ_44100) }, + { 48000, (HDSPE_FREQ_48000) }, + { 64000, (HDSPE_FREQ_32000 | HDSPE_FREQ_DOUBLE) }, + { 88200, (HDSPE_FREQ_44100 | HDSPE_FREQ_DOUBLE) }, + { 96000, (HDSPE_FREQ_48000 | HDSPE_FREQ_DOUBLE) }, + { 128000, (HDSPE_FREQ_32000 | HDSPE_FREQ_QUAD) }, + { 176400, (HDSPE_FREQ_44100 | HDSPE_FREQ_QUAD) }, + { 192000, (HDSPE_FREQ_48000 | HDSPE_FREQ_QUAD) }, { 0, 0 }, }; @@ -106,7 +105,7 @@ static uint32_t hdspe_port_first(uint32_t ports) { - return (ports & (~(ports - 1))); /* Extract first bit set. */ + return (ports & (~(ports - 1))); /* Extract first bit set. */ } static uint32_t @@ -116,11 +115,11 @@ /* Restrict ports to one set with contiguous slots. */ if (ports & HDSPE_CHAN_AIO_LINE) - ports = HDSPE_CHAN_AIO_LINE; /* Gap in the AIO slots here. */ + ports = HDSPE_CHAN_AIO_LINE; /* Gap in the AIO slots here. */ else if (ports & HDSPE_CHAN_AIO_ALL) - ports &= HDSPE_CHAN_AIO_ALL; /* Rest of the AIO slots. */ + ports &= HDSPE_CHAN_AIO_ALL; /* Rest of the AIO slots. */ else if (ports & HDSPE_CHAN_RAY_ALL) - ports &= HDSPE_CHAN_RAY_ALL; /* All RayDAT slots. */ + ports &= HDSPE_CHAN_RAY_ALL; /* All RayDAT slots. */ /* Ends of port rows are followed by a port which is not in the set. */ ends = ports & (~(ports >> 1)); @@ -175,9 +174,9 @@ preceding = ports & (~subset & (subset - 1)); if (preceding & HDSPE_CHAN_AIO_ALL) - preceding &= HDSPE_CHAN_AIO_ALL; /* Contiguous AIO slots. */ + preceding &= HDSPE_CHAN_AIO_ALL; /* Contiguous AIO slots. */ else if (preceding & HDSPE_CHAN_RAY_ALL) - preceding &= HDSPE_CHAN_RAY_ALL; /* Contiguous RayDAT slots. */ + preceding &= HDSPE_CHAN_RAY_ALL; /* Contiguous RayDAT slots. */ return (hdspe_channel_count(preceding, adat_width)); } @@ -228,8 +227,8 @@ } static int -hdspe_hw_mixer(struct sc_chinfo *ch, unsigned int dst, - unsigned int src, unsigned short data) +hdspe_hw_mixer(struct sc_chinfo *ch, unsigned int dst, unsigned int src, + unsigned short data) { struct sc_pcminfo *scp; struct sc_info *sc; @@ -242,8 +241,8 @@ if (ch->dir == PCMDIR_PLAY) offs = 64; - hdspe_write_4(sc, HDSPE_MIXER_BASE + - ((offs + src + 128 * dst) * sizeof(uint32_t)), + hdspe_write_4(sc, + HDSPE_MIXER_BASE + ((offs + src + 128 * dst) * sizeof(uint32_t)), data & 0xFFFF); return (0); @@ -264,8 +263,8 @@ port = hdspe_port_first(ports); while (port != 0) { /* Get slot range of the physical port. */ - slot = - hdspe_port_slot_offset(port, hdspe_adat_width(sc->speed)); + slot = hdspe_port_slot_offset(port, + hdspe_adat_width(sc->speed)); end_slot = slot + hdspe_port_slot_width(port, hdspe_adat_width(sc->speed)); @@ -313,8 +312,7 @@ } static int -hdspemixer_set(struct snd_mixer *m, unsigned dev, - unsigned left, unsigned right) +hdspemixer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) { struct sc_pcminfo *scp; struct sc_chinfo *ch; @@ -341,11 +339,9 @@ return (0); } -static kobj_method_t hdspemixer_methods[] = { - KOBJMETHOD(mixer_init, hdspemixer_init), - KOBJMETHOD(mixer_set, hdspemixer_set), - KOBJMETHOD_END -}; +static kobj_method_t hdspemixer_methods[] = { KOBJMETHOD(mixer_init, + hdspemixer_init), + KOBJMETHOD(mixer_set, hdspemixer_set), KOBJMETHOD_END }; MIXER_DECLARE(hdspemixer); static void @@ -371,8 +367,7 @@ ports = ch->ports; row = hdspe_port_first_row(ports); while (row != 0) { - slot = - hdspe_port_slot_offset(row, hdspe_adat_width(sc->speed)); + slot = hdspe_port_slot_offset(row, hdspe_adat_width(sc->speed)); end_slot = slot + hdspe_port_slot_width(row, hdspe_adat_width(sc->speed)); @@ -532,7 +527,6 @@ buffer_demux_read(dma, pcm, pos, samples, slots, channels); } - /* Copy data between DMA and PCM buffers. */ static void buffer_copy(struct sc_chinfo *ch) @@ -678,15 +672,15 @@ ch->rvol = 0; /* Support all possible ADAT widths as channel formats. */ - ch->cap_fmts[0] = - SND_FORMAT(AFMT_S32_LE, hdspe_channel_count(ch->ports, 2), 0); - ch->cap_fmts[1] = - SND_FORMAT(AFMT_S32_LE, hdspe_channel_count(ch->ports, 4), 0); - ch->cap_fmts[2] = - SND_FORMAT(AFMT_S32_LE, hdspe_channel_count(ch->ports, 8), 0); + ch->cap_fmts[0] = SND_FORMAT(AFMT_S32_LE, + hdspe_channel_count(ch->ports, 2), 0); + ch->cap_fmts[1] = SND_FORMAT(AFMT_S32_LE, + hdspe_channel_count(ch->ports, 4), 0); + ch->cap_fmts[2] = SND_FORMAT(AFMT_S32_LE, + hdspe_channel_count(ch->ports, 8), 0); ch->cap_fmts[3] = 0; ch->caps = malloc(sizeof(struct pcmchan_caps), M_HDSPE, M_NOWAIT); - *(ch->caps) = (struct pcmchan_caps) {32000, 192000, ch->cap_fmts, 0}; + *(ch->caps) = (struct pcmchan_caps) { 32000, 192000, ch->cap_fmts, 0 }; /* Allocate maximum buffer size. */ ch->size = HDSPE_CHANBUF_SIZE * hdspe_channel_count(ch->ports, 8); @@ -743,7 +737,7 @@ case PCMTRIG_EMLDMAWR: case PCMTRIG_EMLDMARD: - if(ch->run) + if (ch->run) buffer_copy(ch); break; } @@ -857,8 +851,10 @@ if (hr == NULL) { for (i = 0; rate_map[i].speed != 0; i++) { hr = &rate_map[i]; - threshold = hr->speed + ((rate_map[i + 1].speed != 0) ? - ((rate_map[i + 1].speed - hr->speed) >> 1) : 0); + threshold = hr->speed + + ((rate_map[i + 1].speed != 0) ? + ((rate_map[i + 1].speed - hr->speed) >> 1) : + 0); if (speed < threshold) break; } @@ -937,8 +933,11 @@ if (hl == NULL) { for (i = 0; latency_map[i].period != 0; i++) { hl = &latency_map[i]; - threshold = hl->period + ((latency_map[i + 1].period != 0) ? - ((latency_map[i + 1].period - hl->period) >> 1) : 0); + threshold = hl->period + + ((latency_map[i + 1].period != 0) ? + ((latency_map[i + 1].period - hl->period) >> + 1) : + 0); if (blocksize < threshold) break; } @@ -963,12 +962,9 @@ return (sndbuf_getblksz(ch->buffer)); } -static uint32_t hdspe_bkp_fmt[] = { - SND_FORMAT(AFMT_S32_LE, 2, 0), - 0 -}; +static uint32_t hdspe_bkp_fmt[] = { SND_FORMAT(AFMT_S32_LE, 2, 0), 0 }; -static struct pcmchan_caps hdspe_bkp_caps = {32000, 192000, hdspe_bkp_fmt, 0}; +static struct pcmchan_caps hdspe_bkp_caps = { 32000, 192000, hdspe_bkp_fmt, 0 }; static struct pcmchan_caps * hdspechan_getcaps(kobj_t obj, void *data) @@ -988,17 +984,15 @@ return (&hdspe_bkp_caps); } -static kobj_method_t hdspechan_methods[] = { - KOBJMETHOD(channel_init, hdspechan_init), - KOBJMETHOD(channel_free, hdspechan_free), - KOBJMETHOD(channel_setformat, hdspechan_setformat), - KOBJMETHOD(channel_setspeed, hdspechan_setspeed), +static kobj_method_t hdspechan_methods[] = { KOBJMETHOD(channel_init, + hdspechan_init), + KOBJMETHOD(channel_free, hdspechan_free), + KOBJMETHOD(channel_setformat, hdspechan_setformat), + KOBJMETHOD(channel_setspeed, hdspechan_setspeed), KOBJMETHOD(channel_setblocksize, hdspechan_setblocksize), - KOBJMETHOD(channel_trigger, hdspechan_trigger), - KOBJMETHOD(channel_getptr, hdspechan_getptr), - KOBJMETHOD(channel_getcaps, hdspechan_getcaps), - KOBJMETHOD_END -}; + KOBJMETHOD(channel_trigger, hdspechan_trigger), + KOBJMETHOD(channel_getptr, hdspechan_getptr), + KOBJMETHOD(channel_getcaps, hdspechan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(hdspechan); static int @@ -1082,8 +1076,7 @@ } snprintf(status, SND_STATUSLEN, "port 0x%jx irq %jd on %s", - rman_get_start(scp->sc->cs), - rman_get_start(scp->sc->irq), + rman_get_start(scp->sc->cs), rman_get_start(scp->sc->irq), device_get_nameunit(device_get_parent(dev))); pcm_setstatus(dev, status); @@ -1106,12 +1099,10 @@ return (0); } -static device_method_t hdspe_pcm_methods[] = { - DEVMETHOD(device_probe, hdspe_pcm_probe), - DEVMETHOD(device_attach, hdspe_pcm_attach), - DEVMETHOD(device_detach, hdspe_pcm_detach), - { 0, 0 } -}; +static device_method_t hdspe_pcm_methods[] = { DEVMETHOD(device_probe, + hdspe_pcm_probe), + DEVMETHOD(device_attach, hdspe_pcm_attach), + DEVMETHOD(device_detach, hdspe_pcm_detach), { 0, 0 } }; static driver_t hdspe_pcm_driver = { "pcm", Index: sys/dev/sound/pci/hdspe.h =================================================================== --- sys/dev/sound/pci/hdspe.h +++ sys/dev/sound/pci/hdspe.h @@ -27,221 +27,214 @@ * SUCH DAMAGE. */ -#define PCI_VENDOR_XILINX 0x10ee -#define PCI_DEVICE_XILINX_HDSPE 0x3fc6 /* AIO, MADI, AES, RayDAT */ -#define PCI_CLASS_REVISION 0x08 -#define PCI_REVISION_AIO 212 -#define PCI_REVISION_RAYDAT 211 +#define PCI_VENDOR_XILINX 0x10ee +#define PCI_DEVICE_XILINX_HDSPE 0x3fc6 /* AIO, MADI, AES, RayDAT */ +#define PCI_CLASS_REVISION 0x08 +#define PCI_REVISION_AIO 212 +#define PCI_REVISION_RAYDAT 211 -#define HDSPE_AIO 0 -#define HDSPE_RAYDAT 1 +#define HDSPE_AIO 0 +#define HDSPE_RAYDAT 1 /* Hardware mixer */ -#define HDSPE_OUT_ENABLE_BASE 512 -#define HDSPE_IN_ENABLE_BASE 768 -#define HDSPE_MIXER_BASE 32768 -#define HDSPE_MAX_GAIN 32768 +#define HDSPE_OUT_ENABLE_BASE 512 +#define HDSPE_IN_ENABLE_BASE 768 +#define HDSPE_MIXER_BASE 32768 +#define HDSPE_MAX_GAIN 32768 /* Buffer */ -#define HDSPE_PAGE_ADDR_BUF_OUT 8192 -#define HDSPE_PAGE_ADDR_BUF_IN (HDSPE_PAGE_ADDR_BUF_OUT + 64 * 16 * 4) -#define HDSPE_BUF_POSITION_MASK 0x000FFC0 +#define HDSPE_PAGE_ADDR_BUF_OUT 8192 +#define HDSPE_PAGE_ADDR_BUF_IN (HDSPE_PAGE_ADDR_BUF_OUT + 64 * 16 * 4) +#define HDSPE_BUF_POSITION_MASK 0x000FFC0 /* Frequency */ -#define HDSPE_FREQ_0 (1 << 6) -#define HDSPE_FREQ_1 (1 << 7) -#define HDSPE_FREQ_DOUBLE (1 << 8) -#define HDSPE_FREQ_QUAD (1 << 31) - -#define HDSPE_FREQ_32000 HDSPE_FREQ_0 -#define HDSPE_FREQ_44100 HDSPE_FREQ_1 -#define HDSPE_FREQ_48000 (HDSPE_FREQ_0 | HDSPE_FREQ_1) -#define HDSPE_FREQ_MASK (HDSPE_FREQ_0 | HDSPE_FREQ_1 | \ - HDSPE_FREQ_DOUBLE | HDSPE_FREQ_QUAD) -#define HDSPE_FREQ_MASK_DEFAULT HDSPE_FREQ_48000 -#define HDSPE_FREQ_REG 256 -#define HDSPE_FREQ_AIO 104857600000000ULL - -#define HDSPE_SPEED_DEFAULT 48000 +#define HDSPE_FREQ_0 (1 << 6) +#define HDSPE_FREQ_1 (1 << 7) +#define HDSPE_FREQ_DOUBLE (1 << 8) +#define HDSPE_FREQ_QUAD (1 << 31) + +#define HDSPE_FREQ_32000 HDSPE_FREQ_0 +#define HDSPE_FREQ_44100 HDSPE_FREQ_1 +#define HDSPE_FREQ_48000 (HDSPE_FREQ_0 | HDSPE_FREQ_1) +#define HDSPE_FREQ_MASK \ + (HDSPE_FREQ_0 | HDSPE_FREQ_1 | HDSPE_FREQ_DOUBLE | HDSPE_FREQ_QUAD) +#define HDSPE_FREQ_MASK_DEFAULT HDSPE_FREQ_48000 +#define HDSPE_FREQ_REG 256 +#define HDSPE_FREQ_AIO 104857600000000ULL + +#define HDSPE_SPEED_DEFAULT 48000 /* Latency */ -#define HDSPE_LAT_0 (1 << 1) -#define HDSPE_LAT_1 (1 << 2) -#define HDSPE_LAT_2 (1 << 3) -#define HDSPE_LAT_MASK (HDSPE_LAT_0 | HDSPE_LAT_1 | HDSPE_LAT_2) -#define HDSPE_LAT_BYTES_MAX (4096 * 4) -#define HDSPE_LAT_BYTES_MIN (32 * 4) -#define hdspe_encode_latency(x) (((x)<<1) & HDSPE_LAT_MASK) +#define HDSPE_LAT_0 (1 << 1) +#define HDSPE_LAT_1 (1 << 2) +#define HDSPE_LAT_2 (1 << 3) +#define HDSPE_LAT_MASK (HDSPE_LAT_0 | HDSPE_LAT_1 | HDSPE_LAT_2) +#define HDSPE_LAT_BYTES_MAX (4096 * 4) +#define HDSPE_LAT_BYTES_MIN (32 * 4) +#define hdspe_encode_latency(x) (((x) << 1) & HDSPE_LAT_MASK) /* Gain */ -#define HDSP_ADGain0 (1 << 25) -#define HDSP_ADGain1 (1 << 26) -#define HDSP_DAGain0 (1 << 27) -#define HDSP_DAGain1 (1 << 28) -#define HDSP_PhoneGain0 (1 << 29) -#define HDSP_PhoneGain1 (1 << 30) - -#define HDSP_ADGainMask (HDSP_ADGain0 | HDSP_ADGain1) -#define HDSP_ADGainMinus10dBV (HDSP_ADGainMask) -#define HDSP_ADGainPlus4dBu (HDSP_ADGain0) -#define HDSP_ADGainLowGain 0 - -#define HDSP_DAGainMask (HDSP_DAGain0 | HDSP_DAGain1) -#define HDSP_DAGainHighGain (HDSP_DAGainMask) -#define HDSP_DAGainPlus4dBu (HDSP_DAGain0) -#define HDSP_DAGainMinus10dBV 0 - -#define HDSP_PhoneGainMask (HDSP_PhoneGain0|HDSP_PhoneGain1) -#define HDSP_PhoneGain0dB HDSP_PhoneGainMask -#define HDSP_PhoneGainMinus6dB (HDSP_PhoneGain0) -#define HDSP_PhoneGainMinus12dB 0 +#define HDSP_ADGain0 (1 << 25) +#define HDSP_ADGain1 (1 << 26) +#define HDSP_DAGain0 (1 << 27) +#define HDSP_DAGain1 (1 << 28) +#define HDSP_PhoneGain0 (1 << 29) +#define HDSP_PhoneGain1 (1 << 30) + +#define HDSP_ADGainMask (HDSP_ADGain0 | HDSP_ADGain1) +#define HDSP_ADGainMinus10dBV (HDSP_ADGainMask) +#define HDSP_ADGainPlus4dBu (HDSP_ADGain0) +#define HDSP_ADGainLowGain 0 + +#define HDSP_DAGainMask (HDSP_DAGain0 | HDSP_DAGain1) +#define HDSP_DAGainHighGain (HDSP_DAGainMask) +#define HDSP_DAGainPlus4dBu (HDSP_DAGain0) +#define HDSP_DAGainMinus10dBV 0 + +#define HDSP_PhoneGainMask (HDSP_PhoneGain0 | HDSP_PhoneGain1) +#define HDSP_PhoneGain0dB HDSP_PhoneGainMask +#define HDSP_PhoneGainMinus6dB (HDSP_PhoneGain0) +#define HDSP_PhoneGainMinus12dB 0 /* Settings */ -#define HDSPE_SETTINGS_REG 0 -#define HDSPE_CONTROL_REG 64 -#define HDSPE_STATUS_REG 0 -#define HDSPE_STATUS1_REG 64 -#define HDSPE_STATUS2_REG 192 -#define HDSPE_ENABLE (1 << 0) +#define HDSPE_SETTINGS_REG 0 +#define HDSPE_CONTROL_REG 64 +#define HDSPE_STATUS_REG 0 +#define HDSPE_STATUS1_REG 64 +#define HDSPE_STATUS2_REG 192 +#define HDSPE_ENABLE (1 << 0) /* Interrupts */ -#define HDSPE_AUDIO_IRQ_PENDING (1 << 0) -#define HDSPE_AUDIO_INT_ENABLE (1 << 5) -#define HDSPE_INTERRUPT_ACK 96 +#define HDSPE_AUDIO_IRQ_PENDING (1 << 0) +#define HDSPE_AUDIO_INT_ENABLE (1 << 5) +#define HDSPE_INTERRUPT_ACK 96 /* Channels */ -#define HDSPE_MAX_SLOTS 64 /* Mono channels */ -#define HDSPE_MAX_CHANS (HDSPE_MAX_SLOTS / 2) /* Stereo pairs */ - -#define HDSPE_CHANBUF_SAMPLES (16 * 1024) -#define HDSPE_CHANBUF_SIZE (4 * HDSPE_CHANBUF_SAMPLES) -#define HDSPE_DMASEGSIZE (HDSPE_CHANBUF_SIZE * HDSPE_MAX_SLOTS) - -#define HDSPE_CHAN_AIO_LINE (1 << 0) -#define HDSPE_CHAN_AIO_PHONE (1 << 1) -#define HDSPE_CHAN_AIO_AES (1 << 2) -#define HDSPE_CHAN_AIO_SPDIF (1 << 3) -#define HDSPE_CHAN_AIO_ADAT (1 << 4) -#define HDSPE_CHAN_AIO_ALL_REC (HDSPE_CHAN_AIO_LINE | \ - HDSPE_CHAN_AIO_AES | \ - HDSPE_CHAN_AIO_SPDIF | \ - HDSPE_CHAN_AIO_ADAT) -#define HDSPE_CHAN_AIO_ALL (HDSPE_CHAN_AIO_ALL_REC | \ - HDSPE_CHAN_AIO_PHONE) \ - -#define HDSPE_CHAN_RAY_AES (1 << 5) -#define HDSPE_CHAN_RAY_SPDIF (1 << 6) -#define HDSPE_CHAN_RAY_ADAT1 (1 << 7) -#define HDSPE_CHAN_RAY_ADAT2 (1 << 8) -#define HDSPE_CHAN_RAY_ADAT3 (1 << 9) -#define HDSPE_CHAN_RAY_ADAT4 (1 << 10) -#define HDSPE_CHAN_RAY_ALL (HDSPE_CHAN_RAY_AES | \ - HDSPE_CHAN_RAY_SPDIF | \ - HDSPE_CHAN_RAY_ADAT1 | \ - HDSPE_CHAN_RAY_ADAT2 | \ - HDSPE_CHAN_RAY_ADAT3 | \ - HDSPE_CHAN_RAY_ADAT4) +#define HDSPE_MAX_SLOTS 64 /* Mono channels */ +#define HDSPE_MAX_CHANS (HDSPE_MAX_SLOTS / 2) /* Stereo pairs */ + +#define HDSPE_CHANBUF_SAMPLES (16 * 1024) +#define HDSPE_CHANBUF_SIZE (4 * HDSPE_CHANBUF_SAMPLES) +#define HDSPE_DMASEGSIZE (HDSPE_CHANBUF_SIZE * HDSPE_MAX_SLOTS) + +#define HDSPE_CHAN_AIO_LINE (1 << 0) +#define HDSPE_CHAN_AIO_PHONE (1 << 1) +#define HDSPE_CHAN_AIO_AES (1 << 2) +#define HDSPE_CHAN_AIO_SPDIF (1 << 3) +#define HDSPE_CHAN_AIO_ADAT (1 << 4) +#define HDSPE_CHAN_AIO_ALL_REC \ + (HDSPE_CHAN_AIO_LINE | HDSPE_CHAN_AIO_AES | HDSPE_CHAN_AIO_SPDIF | \ + HDSPE_CHAN_AIO_ADAT) +#define HDSPE_CHAN_AIO_ALL (HDSPE_CHAN_AIO_ALL_REC | HDSPE_CHAN_AIO_PHONE) + +#define HDSPE_CHAN_RAY_AES (1 << 5) +#define HDSPE_CHAN_RAY_SPDIF (1 << 6) +#define HDSPE_CHAN_RAY_ADAT1 (1 << 7) +#define HDSPE_CHAN_RAY_ADAT2 (1 << 8) +#define HDSPE_CHAN_RAY_ADAT3 (1 << 9) +#define HDSPE_CHAN_RAY_ADAT4 (1 << 10) +#define HDSPE_CHAN_RAY_ALL \ + (HDSPE_CHAN_RAY_AES | HDSPE_CHAN_RAY_SPDIF | HDSPE_CHAN_RAY_ADAT1 | \ + HDSPE_CHAN_RAY_ADAT2 | HDSPE_CHAN_RAY_ADAT3 | \ + HDSPE_CHAN_RAY_ADAT4) struct hdspe_channel { - uint32_t ports; - char *descr; + uint32_t ports; + char *descr; }; /* Clock sources */ -#define HDSPE_SETTING_MASTER (1 << 0) -#define HDSPE_SETTING_CLOCK_MASK 0x1f +#define HDSPE_SETTING_MASTER (1 << 0) +#define HDSPE_SETTING_CLOCK_MASK 0x1f -#define HDSPE_STATUS1_CLOCK_SHIFT 28 -#define HDSPE_STATUS1_CLOCK_MASK (0x0f << HDSPE_STATUS1_CLOCK_SHIFT) -#define HDSPE_STATUS1_CLOCK(n) (((n) << HDSPE_STATUS1_CLOCK_SHIFT) & \ - HDSPE_STATUS1_CLOCK_MASK) +#define HDSPE_STATUS1_CLOCK_SHIFT 28 +#define HDSPE_STATUS1_CLOCK_MASK (0x0f << HDSPE_STATUS1_CLOCK_SHIFT) +#define HDSPE_STATUS1_CLOCK(n) \ + (((n) << HDSPE_STATUS1_CLOCK_SHIFT) & HDSPE_STATUS1_CLOCK_MASK) struct hdspe_clock_source { - char *name; - uint32_t setting; - uint32_t status; - uint32_t lock_bit; - uint32_t sync_bit; + char *name; + uint32_t setting; + uint32_t status; + uint32_t lock_bit; + uint32_t sync_bit; }; static MALLOC_DEFINE(M_HDSPE, "hdspe", "hdspe audio"); /* Channel registers */ struct sc_chinfo { - struct snd_dbuf *buffer; - struct pcm_channel *channel; - struct sc_pcminfo *parent; + struct snd_dbuf *buffer; + struct pcm_channel *channel; + struct sc_pcminfo *parent; /* Channel information */ - struct pcmchan_caps *caps; - uint32_t cap_fmts[4]; - uint32_t dir; - uint32_t format; - uint32_t ports; - uint32_t lvol; - uint32_t rvol; + struct pcmchan_caps *caps; + uint32_t cap_fmts[4]; + uint32_t dir; + uint32_t format; + uint32_t ports; + uint32_t lvol; + uint32_t rvol; /* Buffer */ - uint32_t *data; - uint32_t size; - uint32_t position; + uint32_t *data; + uint32_t size; + uint32_t position; /* Flags */ - uint32_t run; + uint32_t run; }; /* PCM device private data */ struct sc_pcminfo { - device_t dev; - uint32_t (*ih) (struct sc_pcminfo *scp); - uint32_t chnum; - struct sc_chinfo chan[HDSPE_MAX_CHANS]; - struct sc_info *sc; - struct hdspe_channel *hc; + device_t dev; + uint32_t (*ih)(struct sc_pcminfo *scp); + uint32_t chnum; + struct sc_chinfo chan[HDSPE_MAX_CHANS]; + struct sc_info *sc; + struct hdspe_channel *hc; }; /* HDSPe device private data */ struct sc_info { - device_t dev; - struct mtx *lock; + device_t dev; + struct mtx *lock; - uint32_t ctrl_register; - uint32_t settings_register; - uint32_t type; + uint32_t ctrl_register; + uint32_t settings_register; + uint32_t type; /* Control/Status register */ - struct resource *cs; - int csid; - bus_space_tag_t cst; - bus_space_handle_t csh; + struct resource *cs; + int csid; + bus_space_tag_t cst; + bus_space_handle_t csh; - struct resource *irq; - int irqid; - void *ih; - bus_dma_tag_t dmat; + struct resource *irq; + int irqid; + void *ih; + bus_dma_tag_t dmat; /* Play/Record DMA buffers */ - uint32_t *pbuf; - uint32_t *rbuf; - uint32_t bufsize; - bus_dmamap_t pmap; - bus_dmamap_t rmap; - uint32_t period; - uint32_t speed; - uint32_t force_period; - uint32_t force_speed; + uint32_t *pbuf; + uint32_t *rbuf; + uint32_t bufsize; + bus_dmamap_t pmap; + bus_dmamap_t rmap; + uint32_t period; + uint32_t speed; + uint32_t force_period; + uint32_t force_speed; }; -#define hdspe_read_1(sc, regno) \ - bus_space_read_1((sc)->cst, (sc)->csh, (regno)) -#define hdspe_read_2(sc, regno) \ - bus_space_read_2((sc)->cst, (sc)->csh, (regno)) -#define hdspe_read_4(sc, regno) \ - bus_space_read_4((sc)->cst, (sc)->csh, (regno)) +#define hdspe_read_1(sc, regno) bus_space_read_1((sc)->cst, (sc)->csh, (regno)) +#define hdspe_read_2(sc, regno) bus_space_read_2((sc)->cst, (sc)->csh, (regno)) +#define hdspe_read_4(sc, regno) bus_space_read_4((sc)->cst, (sc)->csh, (regno)) -#define hdspe_write_1(sc, regno, data) \ +#define hdspe_write_1(sc, regno, data) \ bus_space_write_1((sc)->cst, (sc)->csh, (regno), (data)) -#define hdspe_write_2(sc, regno, data) \ +#define hdspe_write_2(sc, regno, data) \ bus_space_write_2((sc)->cst, (sc)->csh, (regno), (data)) -#define hdspe_write_4(sc, regno, data) \ +#define hdspe_write_4(sc, regno, data) \ bus_space_write_4((sc)->cst, (sc)->csh, (regno), (data)) Index: sys/dev/sound/pci/hdspe.c =================================================================== --- sys/dev/sound/pci/hdspe.c +++ sys/dev/sound/pci/hdspe.c @@ -35,12 +35,11 @@ #include #include -#include -#include -#include - #include #include +#include +#include +#include #include @@ -49,61 +48,61 @@ static SYSCTL_NODE(_hw, OID_AUTO, hdspe, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, "PCI HDSPe"); -SYSCTL_BOOL(_hw_hdspe, OID_AUTO, unified_pcm, CTLFLAG_RWTUN, - &hdspe_unified_pcm, 0, "Combine physical ports in one unified pcm device"); +SYSCTL_BOOL(_hw_hdspe, OID_AUTO, unified_pcm, CTLFLAG_RWTUN, &hdspe_unified_pcm, + 0, "Combine physical ports in one unified pcm device"); static struct hdspe_clock_source hdspe_clock_source_table_rd[] = { - { "internal", 0 << 1 | 1, HDSPE_STATUS1_CLOCK(15), 0, 0 }, - { "word", 0 << 1 | 0, HDSPE_STATUS1_CLOCK( 0), 1 << 24, 1 << 25 }, - { "aes", 1 << 1 | 0, HDSPE_STATUS1_CLOCK( 1), 1 << 0, 1 << 8 }, - { "spdif", 2 << 1 | 0, HDSPE_STATUS1_CLOCK( 2), 1 << 1, 1 << 9 }, - { "adat1", 3 << 1 | 0, HDSPE_STATUS1_CLOCK( 3), 1 << 2, 1 << 10 }, - { "adat2", 4 << 1 | 0, HDSPE_STATUS1_CLOCK( 4), 1 << 3, 1 << 11 }, - { "adat3", 5 << 1 | 0, HDSPE_STATUS1_CLOCK( 5), 1 << 4, 1 << 12 }, - { "adat4", 6 << 1 | 0, HDSPE_STATUS1_CLOCK( 6), 1 << 5, 1 << 13 }, - { "tco", 9 << 1 | 0, HDSPE_STATUS1_CLOCK( 9), 1 << 26, 1 << 27 }, - { "sync_in", 10 << 1 | 0, HDSPE_STATUS1_CLOCK(10), 0, 0 }, - { NULL, 0 << 1 | 0, HDSPE_STATUS1_CLOCK( 0), 0, 0 }, + { "internal", 0 << 1 | 1, HDSPE_STATUS1_CLOCK(15), 0, 0 }, + { "word", 0 << 1 | 0, HDSPE_STATUS1_CLOCK(0), 1 << 24, 1 << 25 }, + { "aes", 1 << 1 | 0, HDSPE_STATUS1_CLOCK(1), 1 << 0, 1 << 8 }, + { "spdif", 2 << 1 | 0, HDSPE_STATUS1_CLOCK(2), 1 << 1, 1 << 9 }, + { "adat1", 3 << 1 | 0, HDSPE_STATUS1_CLOCK(3), 1 << 2, 1 << 10 }, + { "adat2", 4 << 1 | 0, HDSPE_STATUS1_CLOCK(4), 1 << 3, 1 << 11 }, + { "adat3", 5 << 1 | 0, HDSPE_STATUS1_CLOCK(5), 1 << 4, 1 << 12 }, + { "adat4", 6 << 1 | 0, HDSPE_STATUS1_CLOCK(6), 1 << 5, 1 << 13 }, + { "tco", 9 << 1 | 0, HDSPE_STATUS1_CLOCK(9), 1 << 26, 1 << 27 }, + { "sync_in", 10 << 1 | 0, HDSPE_STATUS1_CLOCK(10), 0, 0 }, + { NULL, 0 << 1 | 0, HDSPE_STATUS1_CLOCK(0), 0, 0 }, }; static struct hdspe_clock_source hdspe_clock_source_table_aio[] = { - { "internal", 0 << 1 | 1, HDSPE_STATUS1_CLOCK(15), 0, 0 }, - { "word", 0 << 1 | 0, HDSPE_STATUS1_CLOCK( 0), 1 << 24, 1 << 25 }, - { "aes", 1 << 1 | 0, HDSPE_STATUS1_CLOCK( 1), 1 << 0, 1 << 8 }, - { "spdif", 2 << 1 | 0, HDSPE_STATUS1_CLOCK( 2), 1 << 1, 1 << 9 }, - { "adat", 3 << 1 | 0, HDSPE_STATUS1_CLOCK( 3), 1 << 2, 1 << 10 }, - { "tco", 9 << 1 | 0, HDSPE_STATUS1_CLOCK( 9), 1 << 26, 1 << 27 }, - { "sync_in", 10 << 1 | 0, HDSPE_STATUS1_CLOCK(10), 0, 0 }, - { NULL, 0 << 1 | 0, HDSPE_STATUS1_CLOCK( 0), 0, 0 }, + { "internal", 0 << 1 | 1, HDSPE_STATUS1_CLOCK(15), 0, 0 }, + { "word", 0 << 1 | 0, HDSPE_STATUS1_CLOCK(0), 1 << 24, 1 << 25 }, + { "aes", 1 << 1 | 0, HDSPE_STATUS1_CLOCK(1), 1 << 0, 1 << 8 }, + { "spdif", 2 << 1 | 0, HDSPE_STATUS1_CLOCK(2), 1 << 1, 1 << 9 }, + { "adat", 3 << 1 | 0, HDSPE_STATUS1_CLOCK(3), 1 << 2, 1 << 10 }, + { "tco", 9 << 1 | 0, HDSPE_STATUS1_CLOCK(9), 1 << 26, 1 << 27 }, + { "sync_in", 10 << 1 | 0, HDSPE_STATUS1_CLOCK(10), 0, 0 }, + { NULL, 0 << 1 | 0, HDSPE_STATUS1_CLOCK(0), 0, 0 }, }; static struct hdspe_channel chan_map_aio[] = { - { HDSPE_CHAN_AIO_LINE, "line" }, - { HDSPE_CHAN_AIO_PHONE, "phone" }, - { HDSPE_CHAN_AIO_AES, "aes" }, + { HDSPE_CHAN_AIO_LINE, "line" }, + { HDSPE_CHAN_AIO_PHONE, "phone" }, + { HDSPE_CHAN_AIO_AES, "aes" }, { HDSPE_CHAN_AIO_SPDIF, "s/pdif" }, - { HDSPE_CHAN_AIO_ADAT, "adat" }, - { 0, NULL }, + { HDSPE_CHAN_AIO_ADAT, "adat" }, + { 0, NULL }, }; static struct hdspe_channel chan_map_aio_uni[] = { { HDSPE_CHAN_AIO_ALL, "all" }, - { 0, NULL }, + { 0, NULL }, }; static struct hdspe_channel chan_map_rd[] = { - { HDSPE_CHAN_RAY_AES, "aes" }, + { HDSPE_CHAN_RAY_AES, "aes" }, { HDSPE_CHAN_RAY_SPDIF, "s/pdif" }, - { HDSPE_CHAN_RAY_ADAT1, "adat1" }, - { HDSPE_CHAN_RAY_ADAT2, "adat2" }, - { HDSPE_CHAN_RAY_ADAT3, "adat3" }, - { HDSPE_CHAN_RAY_ADAT4, "adat4" }, - { 0, NULL }, + { HDSPE_CHAN_RAY_ADAT1, "adat1" }, + { HDSPE_CHAN_RAY_ADAT2, "adat2" }, + { HDSPE_CHAN_RAY_ADAT3, "adat3" }, + { HDSPE_CHAN_RAY_ADAT4, "adat4" }, + { 0, NULL }, }; static struct hdspe_channel chan_map_rd_uni[] = { { HDSPE_CHAN_RAY_ALL, "all" }, - { 0, NULL }, + { 0, NULL }, }; static void @@ -123,7 +122,8 @@ status = hdspe_read_1(sc, HDSPE_STATUS_REG); if (status & HDSPE_AUDIO_IRQ_PENDING) { - if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0) + if ((err = device_get_children(sc->dev, &devlist, &devcount)) != + 0) return; for (i = 0; i < devcount; i++) { @@ -153,8 +153,8 @@ /* Allocate resource. */ sc->csid = PCIR_BAR(0); - sc->cs = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, - &sc->csid, RF_ACTIVE); + sc->cs = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY, &sc->csid, + RF_ACTIVE); if (!sc->cs) { device_printf(sc->dev, "Unable to map SYS_RES_MEMORY.\n"); @@ -170,27 +170,27 @@ RF_ACTIVE | RF_SHAREABLE); if (!sc->irq || - bus_setup_intr(sc->dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, - NULL, hdspe_intr, sc, &sc->ih)) { + bus_setup_intr(sc->dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, NULL, + hdspe_intr, sc, &sc->ih)) { device_printf(sc->dev, "Unable to alloc interrupt resource.\n"); return (ENXIO); } /* Allocate DMA resources. */ - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(sc->dev), - /*alignment*/4, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, - /*filterarg*/NULL, - /*maxsize*/2 * HDSPE_DMASEGSIZE, - /*nsegments*/2, - /*maxsegsz*/HDSPE_DMASEGSIZE, - /*flags*/0, - /*lockfunc*/NULL, - /*lockarg*/NULL, - /*dmatag*/&sc->dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(sc->dev), + /*alignment*/ 4, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, + /*filterarg*/ NULL, + /*maxsize*/ 2 * HDSPE_DMASEGSIZE, + /*nsegments*/ 2, + /*maxsegsz*/ HDSPE_DMASEGSIZE, + /*flags*/ 0, + /*lockfunc*/ NULL, + /*lockarg*/ NULL, + /*dmatag*/ &sc->dmat) != 0) { device_printf(sc->dev, "Unable to create dma tag.\n"); return (ENXIO); } @@ -199,26 +199,26 @@ /* pbuf (play buffer). */ if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf, BUS_DMA_WAITOK, - &sc->pmap)) { + &sc->pmap)) { device_printf(sc->dev, "Can't alloc pbuf.\n"); return (ENXIO); } if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->bufsize, - hdspe_dmapsetmap, sc, BUS_DMA_NOWAIT)) { + hdspe_dmapsetmap, sc, BUS_DMA_NOWAIT)) { device_printf(sc->dev, "Can't load pbuf.\n"); return (ENXIO); } /* rbuf (rec buffer). */ if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf, BUS_DMA_WAITOK, - &sc->rmap)) { + &sc->rmap)) { device_printf(sc->dev, "Can't alloc rbuf.\n"); return (ENXIO); } if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->bufsize, - hdspe_dmapsetmap, sc, BUS_DMA_NOWAIT)) { + hdspe_dmapsetmap, sc, BUS_DMA_NOWAIT)) { device_printf(sc->dev, "Can't load rbuf.\n"); return (ENXIO); } @@ -240,9 +240,9 @@ for (i = 0; i < HDSPE_MAX_SLOTS * 16; i++) { hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_OUT + 4 * i, - paddr + i * 4096); + paddr + i * 4096); hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_IN + 4 * i, - raddr + i * 4096); + raddr + i * 4096); } } @@ -280,7 +280,6 @@ return (0); } - static int hdspe_sysctl_period(SYSCTL_HANDLER_ARGS) { @@ -547,8 +546,7 @@ #endif sc = device_get_softc(dev); - sc->lock = snd_mtxcreate(device_get_nameunit(dev), - "snd_hdspe softc"); + sc->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_hdspe softc"); sc->dev = dev; pci_enable_busmaster(dev); @@ -577,7 +575,8 @@ return (ENXIO); for (i = 0; i < HDSPE_MAX_CHANS && chan_map[i].descr != NULL; i++) { - scp = malloc(sizeof(struct sc_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO); + scp = malloc(sizeof(struct sc_pcminfo), M_DEVBUF, + M_NOWAIT | M_ZERO); scp->hc = &chan_map[i]; scp->sc = sc; scp->dev = device_add_child(dev, "pcm", -1); @@ -588,15 +587,14 @@ SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "sync_status", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, - sc, 0, hdspe_sysctl_sync_status, "A", + "sync_status", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0, + hdspe_sysctl_sync_status, "A", "List clock source signal lock and sync status"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "clock_source", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, - sc, 0, hdspe_sysctl_clock_source, "A", - "Currently effective clock source"); + "clock_source", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0, + hdspe_sysctl_clock_source, "A", "Currently effective clock source"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, @@ -606,20 +604,19 @@ SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "clock_list", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, - sc, 0, hdspe_sysctl_clock_list, "A", - "List of supported clock sources"); + "clock_list", CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0, + hdspe_sysctl_clock_list, "A", "List of supported clock sources"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "period", CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_MPSAFE, - sc, 0, hdspe_sysctl_period, "A", + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "period", + CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0, + hdspe_sysctl_period, "A", "Force period of samples per interrupt (32, 64, ... 4096)"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "sample_rate", CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_MPSAFE, - sc, 0, hdspe_sysctl_sample_rate, "A", + "sample_rate", CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0, + hdspe_sysctl_sample_rate, "A", "Force sample rate (32000, 44100, 48000, ... 192000)"); return (bus_generic_attach(dev)); @@ -644,7 +641,7 @@ sc = device_get_softc(dev); if (sc == NULL) { - device_printf(dev,"Can't detach: softc is null.\n"); + device_printf(dev, "Can't detach: softc is null.\n"); return (0); } @@ -668,12 +665,9 @@ return (0); } -static device_method_t hdspe_methods[] = { - DEVMETHOD(device_probe, hdspe_probe), - DEVMETHOD(device_attach, hdspe_attach), - DEVMETHOD(device_detach, hdspe_detach), - { 0, 0 } -}; +static device_method_t hdspe_methods[] = { DEVMETHOD(device_probe, hdspe_probe), + DEVMETHOD(device_attach, hdspe_attach), + DEVMETHOD(device_detach, hdspe_detach), { 0, 0 } }; static driver_t hdspe_driver = { "hdspe", Index: sys/dev/sound/pci/ich.h =================================================================== --- sys/dev/sound/pci/ich.h +++ sys/dev/sound/pci/ich.h @@ -34,41 +34,41 @@ #define PCIR_MBBAR 0x1C #define PCIR_ICH_LEGACY 0x41 -#define ICH_LEGACY_ENABLE 0x01 +#define ICH_LEGACY_ENABLE 0x01 /* Native Audio Bus Master Control Registers */ #define ICH_REG_X_BDBAR 0x00 -#define ICH_REG_X_CIV 0x04 -#define ICH_REG_X_LVI 0x05 -#define ICH_REG_X_SR 0x06 -#define ICH_REG_X_PICB 0x08 -#define ICH_REG_X_PIV 0x0a -#define ICH_REG_X_CR 0x0b +#define ICH_REG_X_CIV 0x04 +#define ICH_REG_X_LVI 0x05 +#define ICH_REG_X_SR 0x06 +#define ICH_REG_X_PICB 0x08 +#define ICH_REG_X_PIV 0x0a +#define ICH_REG_X_CR 0x0b -#define ICH_REG_PI_BASE 0x00 -#define ICH_REG_PO_BASE 0x10 -#define ICH_REG_MC_BASE 0x20 +#define ICH_REG_PI_BASE 0x00 +#define ICH_REG_PO_BASE 0x10 +#define ICH_REG_MC_BASE 0x20 #define ICH_REG_GLOB_CNT 0x2c #define ICH_REG_GLOB_STA 0x30 #define ICH_REG_ACC_SEMA 0x34 /* Status Register Values */ -#define ICH_X_SR_DCH 0x0001 -#define ICH_X_SR_CELV 0x0002 +#define ICH_X_SR_DCH 0x0001 +#define ICH_X_SR_CELV 0x0002 #define ICH_X_SR_LVBCI 0x0004 -#define ICH_X_SR_BCIS 0x0008 +#define ICH_X_SR_BCIS 0x0008 #define ICH_X_SR_FIFOE 0x0010 /* Control Register Values */ -#define ICH_X_CR_RPBM 0x01 -#define ICH_X_CR_RR 0x02 +#define ICH_X_CR_RPBM 0x01 +#define ICH_X_CR_RR 0x02 #define ICH_X_CR_LVBIE 0x04 -#define ICH_X_CR_FEIE 0x08 -#define ICH_X_CR_IOCE 0x10 +#define ICH_X_CR_FEIE 0x08 +#define ICH_X_CR_IOCE 0x10 /* Global Control Register Values */ -#define ICH_GLOB_CTL_GIE 0x00000001 +#define ICH_GLOB_CTL_GIE 0x00000001 #define ICH_GLOB_CTL_COLD 0x00000002 /* negate */ #define ICH_GLOB_CTL_WARM 0x00000004 #define ICH_GLOB_CTL_SHUT 0x00000008 @@ -76,21 +76,24 @@ #define ICH_GLOB_CTL_SRES 0x00000020 /* Global Status Register Values */ -#define ICH_GLOB_STA_GSCI 0x00000001 -#define ICH_GLOB_STA_MIINT 0x00000002 -#define ICH_GLOB_STA_MOINT 0x00000004 -#define ICH_GLOB_STA_PIINT 0x00000020 -#define ICH_GLOB_STA_POINT 0x00000040 -#define ICH_GLOB_STA_MINT 0x00000080 -#define ICH_GLOB_STA_PCR 0x00000100 -#define ICH_GLOB_STA_SCR 0x00000200 -#define ICH_GLOB_STA_PRES 0x00000400 -#define ICH_GLOB_STA_SRES 0x00000800 +#define ICH_GLOB_STA_GSCI 0x00000001 +#define ICH_GLOB_STA_MIINT 0x00000002 +#define ICH_GLOB_STA_MOINT 0x00000004 +#define ICH_GLOB_STA_PIINT 0x00000020 +#define ICH_GLOB_STA_POINT 0x00000040 +#define ICH_GLOB_STA_MINT 0x00000080 +#define ICH_GLOB_STA_PCR 0x00000100 +#define ICH_GLOB_STA_SCR 0x00000200 +#define ICH_GLOB_STA_PRES 0x00000400 +#define ICH_GLOB_STA_SRES 0x00000800 #define ICH_GLOB_STA_SLOT12 0x00007000 #define ICH_GLOB_STA_RCODEC 0x00008000 -#define ICH_GLOB_STA_AD3 0x00010000 -#define ICH_GLOB_STA_MD3 0x00020000 -#define ICH_GLOB_STA_IMASK (ICH_GLOB_STA_MIINT | ICH_GLOB_STA_MOINT | ICH_GLOB_STA_PIINT | ICH_GLOB_STA_POINT | ICH_GLOB_STA_MINT | ICH_GLOB_STA_PRES | ICH_GLOB_STA_SRES) +#define ICH_GLOB_STA_AD3 0x00010000 +#define ICH_GLOB_STA_MD3 0x00020000 +#define ICH_GLOB_STA_IMASK \ + (ICH_GLOB_STA_MIINT | ICH_GLOB_STA_MOINT | ICH_GLOB_STA_PIINT | \ + ICH_GLOB_STA_POINT | ICH_GLOB_STA_MINT | ICH_GLOB_STA_PRES | \ + ICH_GLOB_STA_SRES) /* play/record buffer */ #define ICH_BDC_IOC 0x80000000 Index: sys/dev/sound/pci/ich.c =================================================================== --- sys/dev/sound/pci/ich.c +++ sys/dev/sound/pci/ich.c @@ -31,121 +31,98 @@ #include "opt_snd.h" #endif -#include -#include -#include - #include #include +#include +#include +#include /* -------------------------------------------------------------------- */ -#define ICH_TIMEOUT 1000 /* semaphore timeout polling count */ -#define ICH_DTBL_LENGTH 32 -#define ICH_DEFAULT_BUFSZ 16384 -#define ICH_MAX_BUFSZ 65536 -#define ICH_MIN_BUFSZ 4096 -#define ICH_DEFAULT_BLKCNT 2 -#define ICH_MAX_BLKCNT 32 -#define ICH_MIN_BLKCNT 2 -#define ICH_MIN_BLKSZ 64 - -#define INTEL_VENDORID 0x8086 -#define SIS_VENDORID 0x1039 -#define NVIDIA_VENDORID 0x10de -#define AMD_VENDORID 0x1022 - -#define INTEL_82440MX 0x7195 -#define INTEL_82801AA 0x2415 -#define INTEL_82801AB 0x2425 -#define INTEL_82801BA 0x2445 -#define INTEL_82801CA 0x2485 -#define INTEL_82801DB 0x24c5 /* ICH4 needs special handling */ -#define INTEL_82801EB 0x24d5 /* ICH5 needs to be treated as ICH4 */ -#define INTEL_6300ESB 0x25a6 /* 6300ESB needs to be treated as ICH4 */ -#define INTEL_82801FB 0x266e /* ICH6 needs to be treated as ICH4 */ -#define INTEL_82801GB 0x27de /* ICH7 needs to be treated as ICH4 */ -#define SIS_7012 0x7012 /* SiS 7012 needs special handling */ -#define NVIDIA_NFORCE 0x01b1 -#define NVIDIA_NFORCE2 0x006a -#define NVIDIA_NFORCE2_400 0x008a -#define NVIDIA_NFORCE3 0x00da -#define NVIDIA_NFORCE3_250 0x00ea -#define NVIDIA_NFORCE4 0x0059 -#define NVIDIA_NFORCE_410_MCP 0x026b -#define NVIDIA_NFORCE4_MCP 0x003a -#define AMD_768 0x7445 -#define AMD_8111 0x746d - -#define ICH_LOCK(sc) snd_mtxlock((sc)->ich_lock) -#define ICH_UNLOCK(sc) snd_mtxunlock((sc)->ich_lock) -#define ICH_LOCK_ASSERT(sc) snd_mtxassert((sc)->ich_lock) +#define ICH_TIMEOUT 1000 /* semaphore timeout polling count */ +#define ICH_DTBL_LENGTH 32 +#define ICH_DEFAULT_BUFSZ 16384 +#define ICH_MAX_BUFSZ 65536 +#define ICH_MIN_BUFSZ 4096 +#define ICH_DEFAULT_BLKCNT 2 +#define ICH_MAX_BLKCNT 32 +#define ICH_MIN_BLKCNT 2 +#define ICH_MIN_BLKSZ 64 + +#define INTEL_VENDORID 0x8086 +#define SIS_VENDORID 0x1039 +#define NVIDIA_VENDORID 0x10de +#define AMD_VENDORID 0x1022 + +#define INTEL_82440MX 0x7195 +#define INTEL_82801AA 0x2415 +#define INTEL_82801AB 0x2425 +#define INTEL_82801BA 0x2445 +#define INTEL_82801CA 0x2485 +#define INTEL_82801DB 0x24c5 /* ICH4 needs special handling */ +#define INTEL_82801EB 0x24d5 /* ICH5 needs to be treated as ICH4 */ +#define INTEL_6300ESB 0x25a6 /* 6300ESB needs to be treated as ICH4 */ +#define INTEL_82801FB 0x266e /* ICH6 needs to be treated as ICH4 */ +#define INTEL_82801GB 0x27de /* ICH7 needs to be treated as ICH4 */ +#define SIS_7012 0x7012 /* SiS 7012 needs special handling */ +#define NVIDIA_NFORCE 0x01b1 +#define NVIDIA_NFORCE2 0x006a +#define NVIDIA_NFORCE2_400 0x008a +#define NVIDIA_NFORCE3 0x00da +#define NVIDIA_NFORCE3_250 0x00ea +#define NVIDIA_NFORCE4 0x0059 +#define NVIDIA_NFORCE_410_MCP 0x026b +#define NVIDIA_NFORCE4_MCP 0x003a +#define AMD_768 0x7445 +#define AMD_8111 0x746d + +#define ICH_LOCK(sc) snd_mtxlock((sc)->ich_lock) +#define ICH_UNLOCK(sc) snd_mtxunlock((sc)->ich_lock) +#define ICH_LOCK_ASSERT(sc) snd_mtxassert((sc)->ich_lock) #if 0 -#define ICH_DEBUG(stmt) do { \ - stmt \ -} while (0) +#define ICH_DEBUG(stmt) \ + do { \ + stmt \ + } while (0) #else #define ICH_DEBUG(...) #endif -#define ICH_CALIBRATE_DONE (1 << 0) -#define ICH_IGNORE_PCR (1 << 1) -#define ICH_IGNORE_RESET (1 << 2) -#define ICH_FIXED_RATE (1 << 3) -#define ICH_DMA_NOCACHE (1 << 4) -#define ICH_HIGH_LATENCY (1 << 5) +#define ICH_CALIBRATE_DONE (1 << 0) +#define ICH_IGNORE_PCR (1 << 1) +#define ICH_IGNORE_RESET (1 << 2) +#define ICH_FIXED_RATE (1 << 3) +#define ICH_DMA_NOCACHE (1 << 4) +#define ICH_HIGH_LATENCY (1 << 5) static const struct ich_type { - uint16_t vendor; - uint16_t devid; - uint32_t options; -#define PROBE_LOW 0x01 - char *name; -} ich_devs[] = { - { INTEL_VENDORID, INTEL_82440MX, 0, - "Intel 440MX" }, - { INTEL_VENDORID, INTEL_82801AA, 0, - "Intel ICH (82801AA)" }, - { INTEL_VENDORID, INTEL_82801AB, 0, - "Intel ICH (82801AB)" }, - { INTEL_VENDORID, INTEL_82801BA, 0, - "Intel ICH2 (82801BA)" }, - { INTEL_VENDORID, INTEL_82801CA, 0, - "Intel ICH3 (82801CA)" }, - { INTEL_VENDORID, INTEL_82801DB, PROBE_LOW, - "Intel ICH4 (82801DB)" }, - { INTEL_VENDORID, INTEL_82801EB, PROBE_LOW, - "Intel ICH5 (82801EB)" }, - { INTEL_VENDORID, INTEL_6300ESB, PROBE_LOW, - "Intel 6300ESB" }, - { INTEL_VENDORID, INTEL_82801FB, PROBE_LOW, - "Intel ICH6 (82801FB)" }, - { INTEL_VENDORID, INTEL_82801GB, PROBE_LOW, - "Intel ICH7 (82801GB)" }, - { SIS_VENDORID, SIS_7012, 0, - "SiS 7012" }, - { NVIDIA_VENDORID, NVIDIA_NFORCE, 0, - "nVidia nForce" }, - { NVIDIA_VENDORID, NVIDIA_NFORCE2, 0, - "nVidia nForce2" }, - { NVIDIA_VENDORID, NVIDIA_NFORCE2_400, 0, - "nVidia nForce2 400" }, - { NVIDIA_VENDORID, NVIDIA_NFORCE3, 0, - "nVidia nForce3" }, - { NVIDIA_VENDORID, NVIDIA_NFORCE3_250, 0, - "nVidia nForce3 250" }, - { NVIDIA_VENDORID, NVIDIA_NFORCE4, 0, - "nVidia nForce4" }, - { NVIDIA_VENDORID, NVIDIA_NFORCE_410_MCP, 0, - "nVidia nForce 410 MCP" }, - { NVIDIA_VENDORID, NVIDIA_NFORCE4_MCP, 0, - "nVidia nForce 4 MCP" }, - { AMD_VENDORID, AMD_768, 0, - "AMD-768" }, - { AMD_VENDORID, AMD_8111, 0, - "AMD-8111" } -}; + uint16_t vendor; + uint16_t devid; + uint32_t options; +#define PROBE_LOW 0x01 + char *name; +} ich_devs[] = { { INTEL_VENDORID, INTEL_82440MX, 0, "Intel 440MX" }, + { INTEL_VENDORID, INTEL_82801AA, 0, "Intel ICH (82801AA)" }, + { INTEL_VENDORID, INTEL_82801AB, 0, "Intel ICH (82801AB)" }, + { INTEL_VENDORID, INTEL_82801BA, 0, "Intel ICH2 (82801BA)" }, + { INTEL_VENDORID, INTEL_82801CA, 0, "Intel ICH3 (82801CA)" }, + { INTEL_VENDORID, INTEL_82801DB, PROBE_LOW, "Intel ICH4 (82801DB)" }, + { INTEL_VENDORID, INTEL_82801EB, PROBE_LOW, "Intel ICH5 (82801EB)" }, + { INTEL_VENDORID, INTEL_6300ESB, PROBE_LOW, "Intel 6300ESB" }, + { INTEL_VENDORID, INTEL_82801FB, PROBE_LOW, "Intel ICH6 (82801FB)" }, + { INTEL_VENDORID, INTEL_82801GB, PROBE_LOW, "Intel ICH7 (82801GB)" }, + { SIS_VENDORID, SIS_7012, 0, "SiS 7012" }, + { NVIDIA_VENDORID, NVIDIA_NFORCE, 0, "nVidia nForce" }, + { NVIDIA_VENDORID, NVIDIA_NFORCE2, 0, "nVidia nForce2" }, + { NVIDIA_VENDORID, NVIDIA_NFORCE2_400, 0, "nVidia nForce2 400" }, + { NVIDIA_VENDORID, NVIDIA_NFORCE3, 0, "nVidia nForce3" }, + { NVIDIA_VENDORID, NVIDIA_NFORCE3_250, 0, "nVidia nForce3 250" }, + { NVIDIA_VENDORID, NVIDIA_NFORCE4, 0, "nVidia nForce4" }, + { NVIDIA_VENDORID, NVIDIA_NFORCE_410_MCP, 0, "nVidia nForce 410 MCP" }, + { NVIDIA_VENDORID, NVIDIA_NFORCE4_MCP, 0, "nVidia nForce 4 MCP" }, + { AMD_VENDORID, AMD_768, 0, "AMD-768" }, + { AMD_VENDORID, AMD_8111, 0, "AMD-8111" } }; /* buffer descriptor */ struct ich_desc { @@ -157,7 +134,7 @@ /* channel registers */ struct sc_chinfo { - uint32_t num:8, run:1, run_save:1; + uint32_t num : 8, run : 1, run_save : 1; uint32_t blksz, blkcnt, spd; uint32_t regbase, spdreg; uint32_t imask; @@ -192,7 +169,7 @@ struct ich_desc *dtbl; unsigned int dtbl_size; bus_addr_t desc_addr; - struct intr_config_hook intrhook; + struct intr_config_hook intrhook; uint16_t vendor; uint16_t devid; uint32_t flags; @@ -201,12 +178,9 @@ /* -------------------------------------------------------------------- */ -static uint32_t ich_fmt[] = { - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps ich_vrcaps = {8000, 48000, ich_fmt, 0}; -static struct pcmchan_caps ich_caps = {48000, 48000, ich_fmt, 0}; +static uint32_t ich_fmt[] = { SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; +static struct pcmchan_caps ich_vrcaps = { 8000, 48000, ich_fmt, 0 }; +static struct pcmchan_caps ich_caps = { 48000, 48000, ich_fmt, 0 }; /* -------------------------------------------------------------------- */ /* Hardware */ @@ -284,11 +258,8 @@ return (0); } -static kobj_method_t ich_ac97_methods[] = { - KOBJMETHOD(ac97_read, ich_rdcd), - KOBJMETHOD(ac97_write, ich_wrcd), - KOBJMETHOD_END -}; +static kobj_method_t ich_ac97_methods[] = { KOBJMETHOD(ac97_read, ich_rdcd), + KOBJMETHOD(ac97_write, ich_wrcd), KOBJMETHOD_END }; AC97_DECLARE(ich_ac97); /* -------------------------------------------------------------------- */ @@ -305,7 +276,7 @@ if ((ch->blksz * ch->blkcnt) > sndbuf_getmaxsize(ch->buffer)) ch->blksz = sndbuf_getmaxsize(ch->buffer) / ch->blkcnt; if ((sndbuf_getblksz(ch->buffer) != ch->blksz || - sndbuf_getblkcnt(ch->buffer) != ch->blkcnt) && + sndbuf_getblkcnt(ch->buffer) != ch->blkcnt) && sndbuf_resize(ch->buffer, ch->blkcnt, ch->blksz) != 0) device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n", __func__, ch->blksz, ch->blkcnt); @@ -313,8 +284,8 @@ for (i = 0; i < ICH_DTBL_LENGTH; i++) { ch->dtbl[i].buffer = base + (ch->blksz * (i % ch->blkcnt)); - ch->dtbl[i].length = ICH_BDC_IOC - | (ch->blksz / ch->parent->sample_size); + ch->dtbl[i].length = ICH_BDC_IOC | + (ch->blksz / ch->parent->sample_size); } } @@ -365,7 +336,8 @@ /* channel interface */ static void * -ichchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +ichchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { struct sc_info *sc = devinfo; struct sc_chinfo *ch; @@ -385,7 +357,7 @@ ch->blkcnt = sc->blkcnt; ch->blksz = sc->bufsz / ch->blkcnt; - switch(ch->num) { + switch (ch->num) { case 0: /* play */ KASSERT(dir == PCMDIR_PLAY, ("wrong direction")); ch->regbase = ICH_REG_PO_BASE; @@ -416,8 +388,8 @@ ICH_UNLOCK(sc); if (sndbuf_alloc(ch->buffer, sc->chan_dmat, - ((sc->flags & ICH_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0), - sc->bufsz) != 0) + ((sc->flags & ICH_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0), + sc->bufsz) != 0) return (NULL); ICH_LOCK(sc); @@ -431,14 +403,9 @@ ichchan_setformat(kobj_t obj, void *data, uint32_t format) { - ICH_DEBUG( - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - if (!(sc->flags & ICH_CALIBRATE_DONE)) - device_printf(sc->dev, - "WARNING: %s() called before calibration!\n", - __func__); - ); + ICH_DEBUG(struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; + if (!(sc->flags & ICH_CALIBRATE_DONE)) device_printf(sc->dev, + "WARNING: %s() called before calibration!\n", __func__);); return (0); } @@ -449,12 +416,8 @@ struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; - ICH_DEBUG( - if (!(sc->flags & ICH_CALIBRATE_DONE)) - device_printf(sc->dev, - "WARNING: %s() called before calibration!\n", - __func__); - ); + ICH_DEBUG(if (!(sc->flags & ICH_CALIBRATE_DONE)) device_printf(sc->dev, + "WARNING: %s() called before calibration!\n", __func__);); if (ch->spdreg) { int r, ac97rate; @@ -470,7 +433,8 @@ * the math don't overflow into the negative range. */ ch->spd = ((uint64_t)ac97_setrate(sc->codec, ch->spdreg, r) * - ac97rate) / 48000; + ac97rate) / + 48000; } else { ch->spd = 48000; } @@ -483,12 +447,8 @@ struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; - ICH_DEBUG( - if (!(sc->flags & ICH_CALIBRATE_DONE)) - device_printf(sc->dev, - "WARNING: %s() called before calibration!\n", - __func__); - ); + ICH_DEBUG(if (!(sc->flags & ICH_CALIBRATE_DONE)) device_printf(sc->dev, + "WARNING: %s() called before calibration!\n", __func__);); if (sc->flags & ICH_HIGH_LATENCY) blocksize = sndbuf_getmaxsize(ch->buffer) / ch->blkcnt; @@ -511,19 +471,17 @@ struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; - ICH_DEBUG( - if (!(sc->flags & ICH_CALIBRATE_DONE)) - device_printf(sc->dev, - "WARNING: %s() called before calibration!\n", - __func__); - ); + ICH_DEBUG(if (!(sc->flags & ICH_CALIBRATE_DONE)) device_printf(sc->dev, + "WARNING: %s() called before calibration!\n", __func__);); switch (go) { case PCMTRIG_START: ch->run = 1; ICH_LOCK(sc); - ich_wr(sc, ch->regbase + ICH_REG_X_BDBAR, (uint32_t)(ch->desc_addr), 4); - ich_wr(sc, ch->regbase + ICH_REG_X_CR, ICH_X_CR_RPBM | ICH_X_CR_LVBIE | ICH_X_CR_IOCE, 1); + ich_wr(sc, ch->regbase + ICH_REG_X_BDBAR, + (uint32_t)(ch->desc_addr), 4); + ich_wr(sc, ch->regbase + ICH_REG_X_CR, + ICH_X_CR_RPBM | ICH_X_CR_LVBIE | ICH_X_CR_IOCE, 1); ICH_UNLOCK(sc); break; case PCMTRIG_STOP: @@ -546,12 +504,8 @@ struct sc_info *sc = ch->parent; uint32_t pos; - ICH_DEBUG( - if (!(sc->flags & ICH_CALIBRATE_DONE)) - device_printf(sc->dev, - "WARNING: %s() called before calibration!\n", - __func__); - ); + ICH_DEBUG(if (!(sc->flags & ICH_CALIBRATE_DONE)) device_printf(sc->dev, + "WARNING: %s() called before calibration!\n", __func__);); ICH_LOCK(sc); ch->civ = ich_rd(sc, ch->regbase + ICH_REG_X_CIV, 1) % ch->blkcnt; @@ -568,27 +522,23 @@ struct sc_chinfo *ch = data; ICH_DEBUG( - struct sc_info *sc = ch->parent; + struct sc_info *sc = ch->parent; - if (!(sc->flags & ICH_CALIBRATE_DONE)) - device_printf(ch->parent->dev, - "WARNING: %s() called before calibration!\n", - __func__); - ); + if (!(sc->flags & ICH_CALIBRATE_DONE)) + device_printf(ch->parent->dev, + "WARNING: %s() called before calibration!\n", __func__);); return ((ch->spdreg) ? &ich_vrcaps : &ich_caps); } -static kobj_method_t ichchan_methods[] = { - KOBJMETHOD(channel_init, ichchan_init), - KOBJMETHOD(channel_setformat, ichchan_setformat), - KOBJMETHOD(channel_setspeed, ichchan_setspeed), - KOBJMETHOD(channel_setblocksize, ichchan_setblocksize), - KOBJMETHOD(channel_trigger, ichchan_trigger), - KOBJMETHOD(channel_getptr, ichchan_getptr), - KOBJMETHOD(channel_getcaps, ichchan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t ichchan_methods[] = { KOBJMETHOD(channel_init, + ichchan_init), + KOBJMETHOD(channel_setformat, ichchan_setformat), + KOBJMETHOD(channel_setspeed, ichchan_setspeed), + KOBJMETHOD(channel_setblocksize, ichchan_setblocksize), + KOBJMETHOD(channel_trigger, ichchan_trigger), + KOBJMETHOD(channel_getptr, ichchan_getptr), + KOBJMETHOD(channel_getcaps, ichchan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(ichchan); /* -------------------------------------------------------------------- */ @@ -604,12 +554,8 @@ ICH_LOCK(sc); - ICH_DEBUG( - if (!(sc->flags & ICH_CALIBRATE_DONE)) - device_printf(sc->dev, - "WARNING: %s() called before calibration!\n", - __func__); - ); + ICH_DEBUG(if (!(sc->flags & ICH_CALIBRATE_DONE)) device_printf(sc->dev, + "WARNING: %s() called before calibration!\n", __func__);); gs = ich_rd(sc, ICH_REG_GLOB_STA, 4) & ICH_GLOB_STA_IMASK; if (gs & (ICH_GLOB_STA_PRES | ICH_GLOB_STA_SRES)) { @@ -623,12 +569,13 @@ if ((ch->imask & gs) == 0) continue; gs &= ~ch->imask; - st = ich_rd(sc, ch->regbase + - ((sc->swap_reg) ? ICH_REG_X_PICB : ICH_REG_X_SR), - 2); + st = ich_rd(sc, + ch->regbase + + ((sc->swap_reg) ? ICH_REG_X_PICB : ICH_REG_X_SR), + 2); st &= ICH_X_SR_FIFOE | ICH_X_SR_BCIS | ICH_X_SR_LVBCI; if (st & (ICH_X_SR_BCIS | ICH_X_SR_LVBCI)) { - /* block complete - update buffer */ + /* block complete - update buffer */ if (ch->run) { ICH_UNLOCK(sc); chn_intr(ch->channel); @@ -649,14 +596,15 @@ ich_wr(sc, ch->regbase + ICH_REG_X_LVI, lvi, 1); } /* clear status bit */ - ich_wr(sc, ch->regbase + - ((sc->swap_reg) ? ICH_REG_X_PICB : ICH_REG_X_SR), - st, 2); + ich_wr(sc, + ch->regbase + + ((sc->swap_reg) ? ICH_REG_X_PICB : ICH_REG_X_SR), + st, 2); } ICH_UNLOCK(sc); if (gs != 0) { - device_printf(sc->dev, - "Unhandled interrupt, gs_intr = %x\n", gs); + device_printf(sc->dev, "Unhandled interrupt, gs_intr = %x\n", + gs); } } @@ -666,16 +614,15 @@ */ static int -ich_initsys(struct sc_info* sc) +ich_initsys(struct sc_info *sc) { /* XXX: this should move to a device specific sysctl "dev.pcm.X.yyy" via device_get_sysctl_*() as discussed on multimedia@ in msg-id <861wujij2q.fsf@xps.des.no> */ SYSCTL_ADD_INT(device_get_sysctl_ctx(sc->dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), - OID_AUTO, "ac97rate", CTLFLAG_RW, - &sc->ac97rate, 48000, - "AC97 link rate (default = 48000)"); + SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, + "ac97rate", CTLFLAG_RW, &sc->ac97rate, 48000, + "AC97 link rate (default = 48000)"); return (0); } @@ -685,15 +632,13 @@ { char status[SND_STATUSLEN]; - snprintf(status, SND_STATUSLEN, - "port 0x%jx,0x%jx irq %jd on %s", + snprintf(status, SND_STATUSLEN, "port 0x%jx,0x%jx irq %jd on %s", rman_get_start(sc->nambar), rman_get_start(sc->nabmbar), rman_get_start(sc->irq), device_get_nameunit(device_get_parent(sc->dev))); if (bootverbose && (sc->flags & ICH_DMA_NOCACHE)) - device_printf(sc->dev, - "PCI Master abort workaround enabled\n"); + device_printf(sc->dev, "PCI Master abort workaround enabled\n"); pcm_setstatus(sc->dev, status); } @@ -779,7 +724,9 @@ wait_us = ((t2.tv_sec - t1.tv_sec) * 1000000) + t2.tv_usec - t1.tv_usec; if (nciv == ociv) { - device_printf(sc->dev, "ac97 link rate calibration timed out after %d us\n", wait_us); + device_printf(sc->dev, + "ac97 link rate calibration timed out after %d us\n", + wait_us); sc->flags |= ICH_CALIBRATE_DONE; ICH_UNLOCK(sc); ich_setstatus(sc); @@ -799,7 +746,8 @@ } if (bootverbose || sc->ac97rate != 48000) { - device_printf(sc->dev, "measured ac97 link rate at %d Hz", actual_48k_rate); + device_printf(sc->dev, "measured ac97 link rate at %d Hz", + actual_48k_rate); if (sc->ac97rate != actual_48k_rate) printf(", will use %d Hz", sc->ac97rate); printf("\n"); @@ -834,10 +782,11 @@ if ((stat & ICH_GLOB_STA_PCR) == 0) { /* ICH4/ICH5 may fail when busmastering is enabled. Continue */ - if (sc->vendor == INTEL_VENDORID && ( - sc->devid == INTEL_82801DB || sc->devid == INTEL_82801EB || - sc->devid == INTEL_6300ESB || sc->devid == INTEL_82801FB || - sc->devid == INTEL_82801GB)) { + if (sc->vendor == INTEL_VENDORID && + (sc->devid == INTEL_82801DB || sc->devid == INTEL_82801EB || + sc->devid == INTEL_6300ESB || + sc->devid == INTEL_82801FB || + sc->devid == INTEL_82801GB)) { sc->flags |= ICH_IGNORE_PCR; device_printf(sc->dev, "primary codec not ready!\n"); } @@ -865,9 +814,9 @@ vendor = pci_get_vendor(dev); devid = pci_get_device(dev); - for (i = 0; i < sizeof(ich_devs)/sizeof(ich_devs[0]); i++) { + for (i = 0; i < sizeof(ich_devs) / sizeof(ich_devs[0]); i++) { if (vendor == ich_devs[i].vendor && - devid == ich_devs[i].devid) { + devid == ich_devs[i].devid) { device_set_desc(dev, ich_devs[i].name); /* allow a better driver to override us */ if ((ich_devs[i].options & PROBE_LOW) != 0) @@ -881,11 +830,11 @@ static int ich_pci_attach(device_t dev) { - uint32_t subdev; - uint16_t extcaps; - uint16_t devid, vendor; - struct sc_info *sc; - int i; + uint32_t subdev; + uint16_t extcaps; + uint16_t devid, vendor; + struct sc_info *sc; + int i; sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); sc->ich_lock = snd_mtxcreate(device_get_nameunit(dev), "snd_ich softc"); @@ -928,9 +877,10 @@ * but doing so will mess things up here. ich4 has enough new * features it warrants it's own driver. */ - if (vendor == INTEL_VENDORID && (devid == INTEL_82801DB || - devid == INTEL_82801EB || devid == INTEL_6300ESB || - devid == INTEL_82801FB || devid == INTEL_82801GB)) { + if (vendor == INTEL_VENDORID && + (devid == INTEL_82801DB || devid == INTEL_82801EB || + devid == INTEL_6300ESB || devid == INTEL_82801FB || + devid == INTEL_82801GB)) { sc->nambarid = PCIR_MMBAR; sc->nabmbarid = PCIR_MBBAR; sc->regtype = SYS_RES_MEMORY; @@ -941,10 +891,10 @@ sc->regtype = SYS_RES_IOPORT; } - sc->nambar = bus_alloc_resource_any(dev, sc->regtype, - &sc->nambarid, RF_ACTIVE); - sc->nabmbar = bus_alloc_resource_any(dev, sc->regtype, - &sc->nabmbarid, RF_ACTIVE); + sc->nambar = bus_alloc_resource_any(dev, sc->regtype, &sc->nambarid, + RF_ACTIVE); + sc->nabmbar = bus_alloc_resource_any(dev, sc->regtype, &sc->nabmbarid, + RF_ACTIVE); if (!sc->nambar || !sc->nabmbar) { device_printf(dev, "unable to map IO port space\n"); @@ -956,11 +906,12 @@ sc->nabmbart = rman_get_bustag(sc->nabmbar); sc->nabmbarh = rman_get_bushandle(sc->nabmbar); - sc->bufsz = pcm_getbuffersize(dev, - ICH_MIN_BUFSZ, ICH_DEFAULT_BUFSZ, ICH_MAX_BUFSZ); + sc->bufsz = pcm_getbuffersize(dev, ICH_MIN_BUFSZ, ICH_DEFAULT_BUFSZ, + ICH_MAX_BUFSZ); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "blocksize", &i) == 0 && i > 0) { + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "blocksize", &i) == 0 && + i > 0) { sc->blkcnt = sc->bufsz / i; i = 0; while (sc->blkcnt >> i) @@ -973,25 +924,28 @@ } else sc->blkcnt = ICH_DEFAULT_BLKCNT; - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "highlatency", &i) == 0 && i != 0) { + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "highlatency", &i) == 0 && + i != 0) { sc->flags |= ICH_HIGH_LATENCY; sc->blkcnt = ICH_MIN_BLKCNT; } - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "fixedrate", &i) == 0 && i != 0) + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "fixedrate", &i) == 0 && + i != 0) sc->flags |= ICH_FIXED_RATE; - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "micchannel_enabled", &i) == 0 && i != 0) + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "micchannel_enabled", &i) == 0 && + i != 0) sc->hasmic = 1; sc->irqid = 0; sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, RF_ACTIVE | RF_SHAREABLE); - if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE, ich_intr, - sc, &sc->ih)) { + if (!sc->irq || + snd_setup_intr(dev, sc->irq, INTR_MPSAFE, ich_intr, sc, &sc->ih)) { device_printf(dev, "unable to map interrupt\n"); goto bad; } @@ -1010,19 +964,20 @@ * 'special' boards. */ switch (subdev) { - case 0x202f161f: /* Gateway 7326GZ */ - case 0x203a161f: /* Gateway 4028GZ */ - case 0x203e161f: /* Gateway 3520GZ/M210 */ - case 0x204c161f: /* Kvazar-Micro Senator 3592XT */ - case 0x8144104d: /* Sony VAIO PCG-TR* */ - case 0x8197104d: /* Sony S1XP */ - case 0x81c0104d: /* Sony VAIO type T */ - case 0x81c5104d: /* Sony VAIO VGN B1VP/B1XP */ - case 0x3089103c: /* Compaq Presario B3800 */ - case 0x309a103c: /* HP Compaq nx4300 */ - case 0x82131033: /* NEC VersaPro VJ10F/BH */ - case 0x82be1033: /* NEC VersaPro VJ12F/CH */ - ac97_setflags(sc->codec, ac97_getflags(sc->codec) | AC97_F_EAPD_INV); + case 0x202f161f: /* Gateway 7326GZ */ + case 0x203a161f: /* Gateway 4028GZ */ + case 0x203e161f: /* Gateway 3520GZ/M210 */ + case 0x204c161f: /* Kvazar-Micro Senator 3592XT */ + case 0x8144104d: /* Sony VAIO PCG-TR* */ + case 0x8197104d: /* Sony S1XP */ + case 0x81c0104d: /* Sony VAIO type T */ + case 0x81c5104d: /* Sony VAIO VGN B1VP/B1XP */ + case 0x3089103c: /* Compaq Presario B3800 */ + case 0x309a103c: /* HP Compaq nx4300 */ + case 0x82131033: /* NEC VersaPro VJ10F/BH */ + case 0x82be1033: /* NEC VersaPro VJ12F/CH */ + ac97_setflags(sc->codec, + ac97_getflags(sc->codec) | AC97_F_EAPD_INV); break; default: break; @@ -1035,7 +990,9 @@ sc->hasvra = extcaps & AC97_EXTCAP_VRA; sc->hasvrm = extcaps & AC97_EXTCAP_VRM; sc->hasmic = (sc->hasmic != 0 && - (ac97_getcaps(sc->codec) & AC97_CAP_MICCHANNEL)) ? 1 : 0; + (ac97_getcaps(sc->codec) & AC97_CAP_MICCHANNEL)) ? + 1 : + 0; ac97_setextmode(sc->codec, sc->hasvra | sc->hasvrm); sc->dtbl_size = sizeof(struct ich_desc) * ICH_DTBL_LENGTH * @@ -1043,36 +1000,38 @@ /* BDL tag */ if (bus_dma_tag_create(bus_get_dma_tag(dev), 8, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, - sc->dtbl_size, 1, 0x3ffff, 0, NULL, NULL, &sc->dmat) != 0) { + BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, + sc->dtbl_size, 1, 0x3ffff, 0, NULL, NULL, &sc->dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } /* PCM channel tag */ if (bus_dma_tag_create(bus_get_dma_tag(dev), ICH_MIN_BLKSZ, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, - sc->bufsz, 1, 0x3ffff, 0, NULL, NULL, &sc->chan_dmat) != 0) { + BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, + sc->bufsz, 1, 0x3ffff, 0, NULL, NULL, &sc->chan_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } - if (bus_dmamem_alloc(sc->dmat, (void **)&sc->dtbl, BUS_DMA_NOWAIT | - ((sc->flags & ICH_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0), - &sc->dtmap)) + if (bus_dmamem_alloc(sc->dmat, (void **)&sc->dtbl, + BUS_DMA_NOWAIT | + ((sc->flags & ICH_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0), + &sc->dtmap)) goto bad; if (bus_dmamap_load(sc->dmat, sc->dtmap, sc->dtbl, sc->dtbl_size, - ich_setmap, sc, 0)) + ich_setmap, sc, 0)) goto bad; if (pcm_register(dev, sc, 1, (sc->hasmic) ? 2 : 1)) goto bad; - pcm_addchan(dev, PCMDIR_PLAY, &ichchan_class, sc); /* play */ - pcm_addchan(dev, PCMDIR_REC, &ichchan_class, sc); /* record */ + pcm_addchan(dev, PCMDIR_PLAY, &ichchan_class, sc); /* play */ + pcm_addchan(dev, PCMDIR_REC, &ichchan_class, sc); /* record */ if (sc->hasmic) - pcm_addchan(dev, PCMDIR_REC, &ichchan_class, sc); /* record mic */ + pcm_addchan(dev, PCMDIR_REC, &ichchan_class, + sc); /* record mic */ if (sc->flags & ICH_FIXED_RATE) { sc->flags |= ICH_CALIBRATE_DONE; @@ -1099,11 +1058,11 @@ if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); if (sc->nambar) - bus_release_resource(dev, sc->regtype, - sc->nambarid, sc->nambar); + bus_release_resource(dev, sc->regtype, sc->nambarid, + sc->nambar); if (sc->nabmbar) - bus_release_resource(dev, sc->regtype, - sc->nabmbarid, sc->nabmbar); + bus_release_resource(dev, sc->regtype, sc->nabmbarid, + sc->nabmbar); if (sc->dtmap) bus_dmamap_unload(sc->dmat, sc->dtmap); if (sc->dtbl) @@ -1150,13 +1109,13 @@ control = ich_rd(sc, ICH_REG_GLOB_CNT, 4); control &= ~(ICH_GLOB_CTL_SHUT); - control |= (control & ICH_GLOB_CTL_COLD) ? - ICH_GLOB_CTL_WARM : ICH_GLOB_CTL_COLD; + control |= (control & ICH_GLOB_CTL_COLD) ? ICH_GLOB_CTL_WARM : + ICH_GLOB_CTL_COLD; ich_wr(sc, ICH_REG_GLOB_CNT, control, 4); for (i = 500000; i; i--) { if (ich_rd(sc, ICH_REG_GLOB_STA, 4) & ICH_GLOB_STA_PCR) - break; /* or ICH_SCR? */ + break; /* or ICH_SCR? */ DELAY(1); } @@ -1172,7 +1131,7 @@ sc = pcm_getdevinfo(dev); ICH_LOCK(sc); - for (i = 0 ; i < 3; i++) { + for (i = 0; i < 3; i++) { sc->ch[i].run_save = sc->ch[i].run; if (sc->ch[i].run) { ICH_UNLOCK(sc); @@ -1209,7 +1168,7 @@ return (ENXIO); } /* Re-start DMA engines */ - for (i = 0 ; i < 3; i++) { + for (i = 0; i < 3; i++) { struct sc_chinfo *ch = &sc->ch[i]; if (sc->ch[i].run_save) { ichchan_setblocksize(0, ch, ch->blksz); @@ -1222,12 +1181,11 @@ static device_method_t ich_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, ich_pci_probe), - DEVMETHOD(device_attach, ich_pci_attach), - DEVMETHOD(device_detach, ich_pci_detach), - DEVMETHOD(device_suspend, ich_pci_suspend), - DEVMETHOD(device_resume, ich_pci_resume), - { 0, 0 } + DEVMETHOD(device_probe, ich_pci_probe), + DEVMETHOD(device_attach, ich_pci_attach), + DEVMETHOD(device_detach, ich_pci_detach), + DEVMETHOD(device_suspend, ich_pci_suspend), + DEVMETHOD(device_resume, ich_pci_resume), { 0, 0 } }; static driver_t ich_driver = { Index: sys/dev/sound/pci/maestro3.c =================================================================== --- sys/dev/sound/pci/maestro3.c +++ sys/dev/sound/pci/maestro3.c @@ -58,42 +58,46 @@ #include "opt_snd.h" #endif -#include -#include - #include #include +#include +#include #define M3_MODEL 1 -#include #include +#include /* -------------------------------------------------------------------- */ -enum {CHANGE=0, CALL=1, INTR=2, BORING=3, NONE=-1}; +enum { CHANGE = 0, CALL = 1, INTR = 2, BORING = 3, NONE = -1 }; #ifndef M3_DEBUG_LEVEL #define M3_DEBUG_LEVEL NONE #endif -#define M3_DEBUG(level, _msg) {if ((level) <= M3_DEBUG_LEVEL) {printf _msg;}} +#define M3_DEBUG(level, _msg) \ + { \ + if ((level) <= M3_DEBUG_LEVEL) { \ + printf _msg; \ + } \ + } /* -------------------------------------------------------------------- */ -enum { - ESS_ALLEGRO_1, - ESS_MAESTRO3 -}; +enum { ESS_ALLEGRO_1, ESS_MAESTRO3 }; static struct m3_card_type { - u_int32_t pci_id; int which; int delay1; int delay2; char *name; -} m3_card_types[] = { - { 0x1988125d, ESS_ALLEGRO_1, 50, 800, "ESS Technology Allegro-1" }, + u_int32_t pci_id; + int which; + int delay1; + int delay2; + char *name; +} m3_card_types[] = { { 0x1988125d, ESS_ALLEGRO_1, 50, 800, + "ESS Technology Allegro-1" }, { 0x1998125d, ESS_MAESTRO3, 20, 500, "ESS Technology Maestro3" }, { 0x199a125d, ESS_MAESTRO3, 20, 500, "ESS Technology Maestro3" }, - { 0, 0, 0, 0, NULL } -}; + { 0, 0, 0, 0, NULL } }; -#define M3_BUFSIZE_MIN 4096 -#define M3_BUFSIZE_MAX 65536 +#define M3_BUFSIZE_MIN 4096 +#define M3_BUFSIZE_MAX 65536 #define M3_BUFSIZE_DEFAULT 4096 #define M3_PCHANS 4 /* create /dev/dsp0.[0-N] to use more than one */ #define M3_RCHANS 1 @@ -103,70 +107,71 @@ struct sc_info; struct sc_pchinfo { - u_int32_t spd; - u_int32_t fmt; - struct snd_dbuf *buffer; - struct pcm_channel *channel; - struct sc_info *parent; - u_int32_t bufsize; - u_int32_t dac_data; - u_int32_t dac_idx; - u_int32_t active; - u_int32_t ptr; - u_int32_t prevptr; + u_int32_t spd; + u_int32_t fmt; + struct snd_dbuf *buffer; + struct pcm_channel *channel; + struct sc_info *parent; + u_int32_t bufsize; + u_int32_t dac_data; + u_int32_t dac_idx; + u_int32_t active; + u_int32_t ptr; + u_int32_t prevptr; }; struct sc_rchinfo { - u_int32_t spd; - u_int32_t fmt; - struct snd_dbuf *buffer; - struct pcm_channel *channel; - struct sc_info *parent; - u_int32_t bufsize; - u_int32_t adc_data; - u_int32_t adc_idx; - u_int32_t active; - u_int32_t ptr; - u_int32_t prevptr; + u_int32_t spd; + u_int32_t fmt; + struct snd_dbuf *buffer; + struct pcm_channel *channel; + struct sc_info *parent; + u_int32_t bufsize; + u_int32_t adc_data; + u_int32_t adc_idx; + u_int32_t active; + u_int32_t ptr; + u_int32_t prevptr; }; struct sc_info { - device_t dev; - u_int32_t type; - int which; - int delay1; - int delay2; - - bus_space_tag_t st; - bus_space_handle_t sh; - bus_dma_tag_t parent_dmat; - - struct resource *reg; - struct resource *irq; - int regtype; - int regid; - int irqid; - void *ih; - - struct sc_pchinfo pch[M3_PCHANS]; - struct sc_rchinfo rch[M3_RCHANS]; - int pch_cnt; - int rch_cnt; - int pch_active_cnt; - unsigned int bufsz; - u_int16_t *savemem; - - struct mtx *sc_lock; + device_t dev; + u_int32_t type; + int which; + int delay1; + int delay2; + + bus_space_tag_t st; + bus_space_handle_t sh; + bus_dma_tag_t parent_dmat; + + struct resource *reg; + struct resource *irq; + int regtype; + int regid; + int irqid; + void *ih; + + struct sc_pchinfo pch[M3_PCHANS]; + struct sc_rchinfo rch[M3_RCHANS]; + int pch_cnt; + int rch_cnt; + int pch_active_cnt; + unsigned int bufsz; + u_int16_t *savemem; + + struct mtx *sc_lock; }; -#define M3_LOCK(_sc) snd_mtxlock((_sc)->sc_lock) -#define M3_UNLOCK(_sc) snd_mtxunlock((_sc)->sc_lock) -#define M3_LOCK_ASSERT(_sc) snd_mtxassert((_sc)->sc_lock) +#define M3_LOCK(_sc) snd_mtxlock((_sc)->sc_lock) +#define M3_UNLOCK(_sc) snd_mtxunlock((_sc)->sc_lock) +#define M3_LOCK_ASSERT(_sc) snd_mtxassert((_sc)->sc_lock) /* -------------------------------------------------------------------- */ /* play channel interface */ -static void *m3_pchan_init(kobj_t, void *, struct snd_dbuf *, struct pcm_channel *, int); +static void *m3_pchan_init(kobj_t, void *, struct snd_dbuf *, + struct pcm_channel *, int); static int m3_pchan_free(kobj_t, void *); static int m3_pchan_setformat(kobj_t, void *, u_int32_t); static u_int32_t m3_pchan_setspeed(kobj_t, void *, u_int32_t); @@ -178,7 +183,8 @@ static struct pcmchan_caps *m3_pchan_getcaps(kobj_t, void *); /* record channel interface */ -static void *m3_rchan_init(kobj_t, void *, struct snd_dbuf *, struct pcm_channel *, int); +static void *m3_rchan_init(kobj_t, void *, struct snd_dbuf *, + struct pcm_channel *, int); static int m3_rchan_free(kobj_t, void *); static int m3_rchan_setformat(kobj_t, void *, u_int32_t); static u_int32_t m3_rchan_setspeed(kobj_t, void *, u_int32_t); @@ -193,75 +199,60 @@ /* talk to the codec - called from ac97.c */ static u_int32_t m3_initcd(kobj_t, void *); -static int m3_rdcd(kobj_t, void *, int); -static int m3_wrcd(kobj_t, void *, int, u_int32_t); +static int m3_rdcd(kobj_t, void *, int); +static int m3_wrcd(kobj_t, void *, int, u_int32_t); /* stuff */ -static void m3_intr(void *); -static int m3_power(struct sc_info *, int); -static int m3_init(struct sc_info *); -static int m3_uninit(struct sc_info *); -static u_int8_t m3_assp_halt(struct sc_info *); -static void m3_config(struct sc_info *); -static void m3_amp_enable(struct sc_info *); -static void m3_enable_ints(struct sc_info *); -static void m3_codec_reset(struct sc_info *); +static void m3_intr(void *); +static int m3_power(struct sc_info *, int); +static int m3_init(struct sc_info *); +static int m3_uninit(struct sc_info *); +static u_int8_t m3_assp_halt(struct sc_info *); +static void m3_config(struct sc_info *); +static void m3_amp_enable(struct sc_info *); +static void m3_enable_ints(struct sc_info *); +static void m3_codec_reset(struct sc_info *); /* -------------------------------------------------------------------- */ /* Codec descriptor */ -static kobj_method_t m3_codec_methods[] = { - KOBJMETHOD(ac97_init, m3_initcd), - KOBJMETHOD(ac97_read, m3_rdcd), - KOBJMETHOD(ac97_write, m3_wrcd), - KOBJMETHOD_END -}; +static kobj_method_t m3_codec_methods[] = { KOBJMETHOD(ac97_init, m3_initcd), + KOBJMETHOD(ac97_read, m3_rdcd), KOBJMETHOD(ac97_write, m3_wrcd), + KOBJMETHOD_END }; AC97_DECLARE(m3_codec); /* -------------------------------------------------------------------- */ /* channel descriptors */ -static u_int32_t m3_playfmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps m3_playcaps = {8000, 48000, m3_playfmt, 0}; - -static kobj_method_t m3_pch_methods[] = { - KOBJMETHOD(channel_init, m3_pchan_init), - KOBJMETHOD(channel_setformat, m3_pchan_setformat), - KOBJMETHOD(channel_setspeed, m3_pchan_setspeed), - KOBJMETHOD(channel_setblocksize, m3_pchan_setblocksize), - KOBJMETHOD(channel_trigger, m3_pchan_trigger), - KOBJMETHOD(channel_getptr, m3_pchan_getptr), - KOBJMETHOD(channel_getcaps, m3_pchan_getcaps), - KOBJMETHOD(channel_free, m3_pchan_free), - KOBJMETHOD_END -}; +static u_int32_t m3_playfmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; +static struct pcmchan_caps m3_playcaps = { 8000, 48000, m3_playfmt, 0 }; + +static kobj_method_t m3_pch_methods[] = { KOBJMETHOD(channel_init, + m3_pchan_init), + KOBJMETHOD(channel_setformat, m3_pchan_setformat), + KOBJMETHOD(channel_setspeed, m3_pchan_setspeed), + KOBJMETHOD(channel_setblocksize, m3_pchan_setblocksize), + KOBJMETHOD(channel_trigger, m3_pchan_trigger), + KOBJMETHOD(channel_getptr, m3_pchan_getptr), + KOBJMETHOD(channel_getcaps, m3_pchan_getcaps), + KOBJMETHOD(channel_free, m3_pchan_free), KOBJMETHOD_END }; CHANNEL_DECLARE(m3_pch); -static u_int32_t m3_recfmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps m3_reccaps = {8000, 48000, m3_recfmt, 0}; - -static kobj_method_t m3_rch_methods[] = { - KOBJMETHOD(channel_init, m3_rchan_init), - KOBJMETHOD(channel_setformat, m3_rchan_setformat), - KOBJMETHOD(channel_setspeed, m3_rchan_setspeed), - KOBJMETHOD(channel_setblocksize, m3_rchan_setblocksize), - KOBJMETHOD(channel_trigger, m3_rchan_trigger), - KOBJMETHOD(channel_getptr, m3_rchan_getptr), - KOBJMETHOD(channel_getcaps, m3_rchan_getcaps), - KOBJMETHOD(channel_free, m3_rchan_free), - KOBJMETHOD_END -}; +static u_int32_t m3_recfmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; +static struct pcmchan_caps m3_reccaps = { 8000, 48000, m3_recfmt, 0 }; + +static kobj_method_t m3_rch_methods[] = { KOBJMETHOD(channel_init, + m3_rchan_init), + KOBJMETHOD(channel_setformat, m3_rchan_setformat), + KOBJMETHOD(channel_setspeed, m3_rchan_setspeed), + KOBJMETHOD(channel_setblocksize, m3_rchan_setblocksize), + KOBJMETHOD(channel_trigger, m3_rchan_trigger), + KOBJMETHOD(channel_getptr, m3_rchan_getptr), + KOBJMETHOD(channel_getcaps, m3_rchan_getcaps), + KOBJMETHOD(channel_free, m3_rchan_free), KOBJMETHOD_END }; CHANNEL_DECLARE(m3_rch); /* -------------------------------------------------------------------- */ @@ -273,30 +264,28 @@ #define m3_wr_1(sc, regno, data) bus_space_write_1(sc->st, sc->sh, regno, data) #define m3_wr_2(sc, regno, data) bus_space_write_2(sc->st, sc->sh, regno, data) #define m3_wr_4(sc, regno, data) bus_space_write_4(sc->st, sc->sh, regno, data) -#define m3_rd_assp_code(sc, index) \ - m3_rd_assp(sc, MEMTYPE_INTERNAL_CODE, index) +#define m3_rd_assp_code(sc, index) m3_rd_assp(sc, MEMTYPE_INTERNAL_CODE, index) #define m3_wr_assp_code(sc, index, data) \ - m3_wr_assp(sc, MEMTYPE_INTERNAL_CODE, index, data) -#define m3_rd_assp_data(sc, index) \ - m3_rd_assp(sc, MEMTYPE_INTERNAL_DATA, index) + m3_wr_assp(sc, MEMTYPE_INTERNAL_CODE, index, data) +#define m3_rd_assp_data(sc, index) m3_rd_assp(sc, MEMTYPE_INTERNAL_DATA, index) #define m3_wr_assp_data(sc, index, data) \ - m3_wr_assp(sc, MEMTYPE_INTERNAL_DATA, index, data) + m3_wr_assp(sc, MEMTYPE_INTERNAL_DATA, index, data) static __inline u_int16_t m3_rd_assp(struct sc_info *sc, u_int16_t region, u_int16_t index) { - m3_wr_2(sc, DSP_PORT_MEMORY_TYPE, region & MEMTYPE_MASK); - m3_wr_2(sc, DSP_PORT_MEMORY_INDEX, index); - return m3_rd_2(sc, DSP_PORT_MEMORY_DATA); + m3_wr_2(sc, DSP_PORT_MEMORY_TYPE, region & MEMTYPE_MASK); + m3_wr_2(sc, DSP_PORT_MEMORY_INDEX, index); + return m3_rd_2(sc, DSP_PORT_MEMORY_DATA); } static __inline void m3_wr_assp(struct sc_info *sc, u_int16_t region, u_int16_t index, - u_int16_t data) + u_int16_t data) { - m3_wr_2(sc, DSP_PORT_MEMORY_TYPE, region & MEMTYPE_MASK); - m3_wr_2(sc, DSP_PORT_MEMORY_INDEX, index); - m3_wr_2(sc, DSP_PORT_MEMORY_DATA, data); + m3_wr_2(sc, DSP_PORT_MEMORY_TYPE, region & MEMTYPE_MASK); + m3_wr_2(sc, DSP_PORT_MEMORY_INDEX, index); + m3_wr_2(sc, DSP_PORT_MEMORY_DATA, data); } static __inline int @@ -304,7 +293,7 @@ { int i; - for (i=0 ; i<20 ; i++) { + for (i = 0; i < 20; i++) { if ((m3_rd_1(sc, CODEC_STATUS) & 1) == 0) { return 0; } @@ -367,11 +356,12 @@ /* -------------------------------------------------------------------- */ /* play channel interface */ -#define LO(x) (((x) & 0x0000ffff) ) +#define LO(x) (((x) & 0x0000ffff)) #define HI(x) (((x) & 0xffff0000) >> 16) static void * -m3_pchan_init(kobj_t kobj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +m3_pchan_init(kobj_t kobj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { struct sc_info *sc = devinfo; struct sc_pchinfo *ch; @@ -380,33 +370,31 @@ int dsp_in_size, dsp_out_size, dsp_in_buf, dsp_out_buf; struct data_word { - u_int16_t addr, val; - } pv[] = { - {CDATA_LEFT_VOLUME, M3_DEFAULT_VOL}, - {CDATA_RIGHT_VOLUME, M3_DEFAULT_VOL}, - {SRC3_DIRECTION_OFFSET, 0} , - {SRC3_DIRECTION_OFFSET + 3, 0x0000}, - {SRC3_DIRECTION_OFFSET + 4, 0}, - {SRC3_DIRECTION_OFFSET + 5, 0}, - {SRC3_DIRECTION_OFFSET + 6, 0}, - {SRC3_DIRECTION_OFFSET + 7, 0}, - {SRC3_DIRECTION_OFFSET + 8, 0}, - {SRC3_DIRECTION_OFFSET + 9, 0}, - {SRC3_DIRECTION_OFFSET + 10, 0x8000}, - {SRC3_DIRECTION_OFFSET + 11, 0xFF00}, - {SRC3_DIRECTION_OFFSET + 13, 0}, - {SRC3_DIRECTION_OFFSET + 14, 0}, - {SRC3_DIRECTION_OFFSET + 15, 0}, - {SRC3_DIRECTION_OFFSET + 16, 8}, - {SRC3_DIRECTION_OFFSET + 17, 50*2}, - {SRC3_DIRECTION_OFFSET + 18, MINISRC_BIQUAD_STAGE - 1}, - {SRC3_DIRECTION_OFFSET + 20, 0}, - {SRC3_DIRECTION_OFFSET + 21, 0} - }; + u_int16_t addr, val; + } pv[] = { { CDATA_LEFT_VOLUME, M3_DEFAULT_VOL }, + { CDATA_RIGHT_VOLUME, M3_DEFAULT_VOL }, + { SRC3_DIRECTION_OFFSET, 0 }, + { SRC3_DIRECTION_OFFSET + 3, 0x0000 }, + { SRC3_DIRECTION_OFFSET + 4, 0 }, + { SRC3_DIRECTION_OFFSET + 5, 0 }, + { SRC3_DIRECTION_OFFSET + 6, 0 }, + { SRC3_DIRECTION_OFFSET + 7, 0 }, + { SRC3_DIRECTION_OFFSET + 8, 0 }, + { SRC3_DIRECTION_OFFSET + 9, 0 }, + { SRC3_DIRECTION_OFFSET + 10, 0x8000 }, + { SRC3_DIRECTION_OFFSET + 11, 0xFF00 }, + { SRC3_DIRECTION_OFFSET + 13, 0 }, + { SRC3_DIRECTION_OFFSET + 14, 0 }, + { SRC3_DIRECTION_OFFSET + 15, 0 }, + { SRC3_DIRECTION_OFFSET + 16, 8 }, + { SRC3_DIRECTION_OFFSET + 17, 50 * 2 }, + { SRC3_DIRECTION_OFFSET + 18, MINISRC_BIQUAD_STAGE - 1 }, + { SRC3_DIRECTION_OFFSET + 20, 0 }, + { SRC3_DIRECTION_OFFSET + 21, 0 } }; M3_LOCK(sc); idx = sc->pch_cnt; /* dac instance number, no active reuse! */ - M3_DEBUG(CHANGE, ("m3_pchan_init(dac=%d)\n", idx)); + M3_DEBUG(CHANGE, ("m3_pchan_init(dac=%d)\n", idx)); if (dir != PCMDIR_PLAY) { M3_UNLOCK(sc); @@ -415,19 +403,21 @@ } data_bytes = (((MINISRC_TMP_BUFFER_SIZE & ~1) + - (MINISRC_IN_BUFFER_SIZE & ~1) + - (MINISRC_OUT_BUFFER_SIZE & ~1) + 4) + 255) &~ 255; + (MINISRC_IN_BUFFER_SIZE & ~1) + + (MINISRC_OUT_BUFFER_SIZE & ~1) + 4) + + 255) & + ~255; dac_data = 0x1100 + (data_bytes * idx); dsp_in_size = MINISRC_IN_BUFFER_SIZE - (0x20 * 2); dsp_out_size = MINISRC_OUT_BUFFER_SIZE - (0x20 * 2); - dsp_in_buf = dac_data + (MINISRC_TMP_BUFFER_SIZE/2); - dsp_out_buf = dsp_in_buf + (dsp_in_size/2) + 1; + dsp_in_buf = dac_data + (MINISRC_TMP_BUFFER_SIZE / 2); + dsp_out_buf = dsp_in_buf + (dsp_in_size / 2) + 1; ch = &sc->pch[idx]; ch->dac_idx = idx; ch->dac_data = dac_data; - if (ch->dac_data + data_bytes/2 >= 0x1c00) { + if (ch->dac_data + data_bytes / 2 >= 0x1c00) { M3_UNLOCK(sc); device_printf(sc->dev, "m3_pchan_init: revb mem exhausted\n"); return (NULL); @@ -455,51 +445,50 @@ m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_ADDRL, LO(bus_addr)); m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_ADDRH, HI(bus_addr)); m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_END_PLUS_1L, - LO(bus_addr + ch->bufsize)); + LO(bus_addr + ch->bufsize)); m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_END_PLUS_1H, - HI(bus_addr + ch->bufsize)); + HI(bus_addr + ch->bufsize)); m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTL, - LO(bus_addr)); + LO(bus_addr)); m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTH, - HI(bus_addr)); + HI(bus_addr)); /* dsp buffers */ m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_BEGIN, dsp_in_buf); m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_END_PLUS_1, - dsp_in_buf + dsp_in_size/2); + dsp_in_buf + dsp_in_size / 2); m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_HEAD, dsp_in_buf); m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_TAIL, dsp_in_buf); m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_BEGIN, dsp_out_buf); m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_END_PLUS_1, - dsp_out_buf + dsp_out_size/2); + dsp_out_buf + dsp_out_size / 2); m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_HEAD, dsp_out_buf); m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_TAIL, dsp_out_buf); /* some per client initializers */ m3_wr_assp_data(sc, ch->dac_data + SRC3_DIRECTION_OFFSET + 12, - ch->dac_data + 40 + 8); + ch->dac_data + 40 + 8); m3_wr_assp_data(sc, ch->dac_data + SRC3_DIRECTION_OFFSET + 19, - 0x400 + MINISRC_COEF_LOC); + 0x400 + MINISRC_COEF_LOC); /* enable or disable low pass filter? (0xff if rate> 45000) */ m3_wr_assp_data(sc, ch->dac_data + SRC3_DIRECTION_OFFSET + 22, 0); /* tell it which way dma is going? */ m3_wr_assp_data(sc, ch->dac_data + CDATA_DMA_CONTROL, - DMACONTROL_AUTOREPEAT + DMAC_PAGE3_SELECTOR + - DMAC_BLOCKF_SELECTOR); + DMACONTROL_AUTOREPEAT + DMAC_PAGE3_SELECTOR + DMAC_BLOCKF_SELECTOR); /* set an armload of static initializers */ - for(i = 0 ; i < (sizeof(pv) / sizeof(pv[0])) ; i++) { + for (i = 0; i < (sizeof(pv) / sizeof(pv[0])); i++) { m3_wr_assp_data(sc, ch->dac_data + pv[i].addr, pv[i].val); } /* put us in the packed task lists */ - m3_wr_assp_data(sc, KDATA_INSTANCE0_MINISRC + - (sc->pch_cnt + sc->rch_cnt), - ch->dac_data >> DP_SHIFT_COUNT); + m3_wr_assp_data(sc, + KDATA_INSTANCE0_MINISRC + (sc->pch_cnt + sc->rch_cnt), + ch->dac_data >> DP_SHIFT_COUNT); m3_wr_assp_data(sc, KDATA_DMA_XFER0 + (sc->pch_cnt + sc->rch_cnt), - ch->dac_data >> DP_SHIFT_COUNT); + ch->dac_data >> DP_SHIFT_COUNT); m3_wr_assp_data(sc, KDATA_MIXER_XFER0 + sc->pch_cnt, - ch->dac_data >> DP_SHIFT_COUNT); + ch->dac_data >> DP_SHIFT_COUNT); /* gotta start before stop */ m3_pchan_trigger_locked(NULL, ch, PCMTRIG_START); @@ -519,17 +508,17 @@ struct sc_info *sc = ch->parent; M3_LOCK(sc); - M3_DEBUG(CHANGE, ("m3_pchan_free(dac=%d)\n", ch->dac_idx)); + M3_DEBUG(CHANGE, ("m3_pchan_free(dac=%d)\n", ch->dac_idx)); /* * should remove this exact instance from the packed lists, but all * are released at once (and in a stopped state) so this is ok. */ - m3_wr_assp_data(sc, KDATA_INSTANCE0_MINISRC + - (sc->pch_cnt - 1) + sc->rch_cnt, 0); - m3_wr_assp_data(sc, KDATA_DMA_XFER0 + - (sc->pch_cnt - 1) + sc->rch_cnt, 0); - m3_wr_assp_data(sc, KDATA_MIXER_XFER0 + (sc->pch_cnt-1), 0); + m3_wr_assp_data(sc, + KDATA_INSTANCE0_MINISRC + (sc->pch_cnt - 1) + sc->rch_cnt, 0); + m3_wr_assp_data(sc, KDATA_DMA_XFER0 + (sc->pch_cnt - 1) + sc->rch_cnt, + 0); + m3_wr_assp_data(sc, KDATA_MIXER_XFER0 + (sc->pch_cnt - 1), 0); sc->pch_cnt--; M3_UNLOCK(sc); @@ -545,23 +534,22 @@ M3_LOCK(sc); M3_DEBUG(CHANGE, - ("m3_pchan_setformat(dac=%d, format=0x%x{%s-%s})\n", - ch->dac_idx, format, - format & (AFMT_U8|AFMT_S8) ? "8bit":"16bit", - (AFMT_CHANNEL(format) > 1) ? "STEREO":"MONO")); + ("m3_pchan_setformat(dac=%d, format=0x%x{%s-%s})\n", ch->dac_idx, + format, format & (AFMT_U8 | AFMT_S8) ? "8bit" : "16bit", + (AFMT_CHANNEL(format) > 1) ? "STEREO" : "MONO")); /* mono word */ - data = (AFMT_CHANNEL(format) > 1)? 0 : 1; - m3_wr_assp_data(sc, ch->dac_data + SRC3_MODE_OFFSET, data); + data = (AFMT_CHANNEL(format) > 1) ? 0 : 1; + m3_wr_assp_data(sc, ch->dac_data + SRC3_MODE_OFFSET, data); - /* 8bit word */ - data = ((format & AFMT_U8) || (format & AFMT_S8)) ? 1 : 0; - m3_wr_assp_data(sc, ch->dac_data + SRC3_WORD_LENGTH_OFFSET, data); + /* 8bit word */ + data = ((format & AFMT_U8) || (format & AFMT_S8)) ? 1 : 0; + m3_wr_assp_data(sc, ch->dac_data + SRC3_WORD_LENGTH_OFFSET, data); - ch->fmt = format; + ch->fmt = format; M3_UNLOCK(sc); - return (0); + return (0); } static u_int32_t @@ -572,14 +560,14 @@ u_int32_t freq; M3_LOCK(sc); - M3_DEBUG(CHANGE, ("m3_pchan_setspeed(dac=%d, speed=%d)\n", - ch->dac_idx, speed)); + M3_DEBUG(CHANGE, + ("m3_pchan_setspeed(dac=%d, speed=%d)\n", ch->dac_idx, speed)); - if ((freq = ((speed << 15) + 24000) / 48000) != 0) { - freq--; - } + if ((freq = ((speed << 15) + 24000) / 48000) != 0) { + freq--; + } - m3_wr_assp_data(sc, ch->dac_data + CDATA_FREQUENCY, freq); + m3_wr_assp_data(sc, ch->dac_data + CDATA_FREQUENCY, freq); ch->spd = speed; M3_UNLOCK(sc); @@ -592,8 +580,9 @@ { struct sc_pchinfo *ch = chdata; - M3_DEBUG(CHANGE, ("m3_pchan_setblocksize(dac=%d, blocksize=%d)\n", - ch->dac_idx, blocksize)); + M3_DEBUG(CHANGE, + ("m3_pchan_setblocksize(dac=%d, blocksize=%d)\n", ch->dac_idx, + blocksize)); return (sndbuf_getblksz(ch->buffer)); } @@ -640,15 +629,16 @@ M3_LOCK_ASSERT(sc); M3_DEBUG(go == PCMTRIG_START ? CHANGE : - go == PCMTRIG_STOP ? CHANGE : - go == PCMTRIG_ABORT ? CHANGE : - CALL, - ("m3_pchan_trigger(dac=%d, go=0x%x{%s})\n", ch->dac_idx, go, - go == PCMTRIG_START ? "PCMTRIG_START" : - go == PCMTRIG_STOP ? "PCMTRIG_STOP" : - go == PCMTRIG_ABORT ? "PCMTRIG_ABORT" : "ignore")); - - switch(go) { + go == PCMTRIG_STOP ? CHANGE : + go == PCMTRIG_ABORT ? CHANGE : + CALL, + ("m3_pchan_trigger(dac=%d, go=0x%x{%s})\n", ch->dac_idx, go, + go == PCMTRIG_START ? "PCMTRIG_START" : + go == PCMTRIG_STOP ? "PCMTRIG_STOP" : + go == PCMTRIG_ABORT ? "PCMTRIG_ABORT" : + "ignore")); + + switch (go) { case PCMTRIG_START: if (ch->active) { return 0; @@ -660,15 +650,15 @@ /*[[inc_timer_users]]*/ if (m3_chan_active(sc) == 1) { - m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 240); - m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 240); - data = m3_rd_2(sc, HOST_INT_CTRL); - m3_wr_2(sc, HOST_INT_CTRL, data | CLKRUN_GEN_ENABLE); + m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 240); + m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 240); + data = m3_rd_2(sc, HOST_INT_CTRL); + m3_wr_2(sc, HOST_INT_CTRL, data | CLKRUN_GEN_ENABLE); } - m3_wr_assp_data(sc, ch->dac_data + CDATA_INSTANCE_READY, 1); - m3_wr_assp_data(sc, KDATA_MIXER_TASK_NUMBER, - sc->pch_active_cnt); + m3_wr_assp_data(sc, ch->dac_data + CDATA_INSTANCE_READY, 1); + m3_wr_assp_data(sc, KDATA_MIXER_TASK_NUMBER, + sc->pch_active_cnt); break; case PCMTRIG_STOP: @@ -682,15 +672,15 @@ /* XXX should the channel be drained? */ /*[[dec_timer_users]]*/ if (m3_chan_active(sc) == 0) { - m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 0); - m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 0); + m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 0); + m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 0); data = m3_rd_2(sc, HOST_INT_CTRL); - m3_wr_2(sc, HOST_INT_CTRL, data & ~CLKRUN_GEN_ENABLE); + m3_wr_2(sc, HOST_INT_CTRL, data & ~CLKRUN_GEN_ENABLE); } - m3_wr_assp_data(sc, ch->dac_data + CDATA_INSTANCE_READY, 0); - m3_wr_assp_data(sc, KDATA_MIXER_TASK_NUMBER, - sc->pch_active_cnt); + m3_wr_assp_data(sc, ch->dac_data + CDATA_INSTANCE_READY, 0); + m3_wr_assp_data(sc, KDATA_MIXER_TASK_NUMBER, + sc->pch_active_cnt); break; case PCMTRIG_EMLDMAWR: @@ -711,11 +701,12 @@ bus_base = sndbuf_getbufaddr(ch->buffer); hi = m3_rd_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTH); - lo = m3_rd_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTL); - bus_crnt = lo | (hi << 16); + lo = m3_rd_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTL); + bus_crnt = lo | (hi << 16); - M3_DEBUG(CALL, ("m3_pchan_getptr(dac=%d) result=%d\n", - ch->dac_idx, bus_crnt - bus_base)); + M3_DEBUG(CALL, + ("m3_pchan_getptr(dac=%d) result=%d\n", ch->dac_idx, + bus_crnt - bus_base)); return (bus_crnt - bus_base); /* current byte offset of channel */ } @@ -739,7 +730,7 @@ { struct sc_pchinfo *ch = chdata; - M3_DEBUG(CALL, ("m3_pchan_getcaps(dac=%d)\n", ch->dac_idx)); + M3_DEBUG(CALL, ("m3_pchan_getcaps(dac=%d)\n", ch->dac_idx)); return &m3_playcaps; } @@ -748,7 +739,8 @@ /* rec channel interface */ static void * -m3_rchan_init(kobj_t kobj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +m3_rchan_init(kobj_t kobj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { struct sc_info *sc = devinfo; struct sc_rchinfo *ch; @@ -758,35 +750,33 @@ int dsp_in_size, dsp_out_size, dsp_in_buf, dsp_out_buf; struct data_word { - u_int16_t addr, val; - } rv[] = { - {CDATA_LEFT_VOLUME, M3_DEFAULT_VOL}, - {CDATA_RIGHT_VOLUME, M3_DEFAULT_VOL}, - {SRC3_DIRECTION_OFFSET, 1}, - {SRC3_DIRECTION_OFFSET + 3, 0x0000}, - {SRC3_DIRECTION_OFFSET + 4, 0}, - {SRC3_DIRECTION_OFFSET + 5, 0}, - {SRC3_DIRECTION_OFFSET + 6, 0}, - {SRC3_DIRECTION_OFFSET + 7, 0}, - {SRC3_DIRECTION_OFFSET + 8, 0}, - {SRC3_DIRECTION_OFFSET + 9, 0}, - {SRC3_DIRECTION_OFFSET + 10, 0x8000}, - {SRC3_DIRECTION_OFFSET + 11, 0xFF00}, - {SRC3_DIRECTION_OFFSET + 13, 0}, - {SRC3_DIRECTION_OFFSET + 14, 0}, - {SRC3_DIRECTION_OFFSET + 15, 0}, - {SRC3_DIRECTION_OFFSET + 16, 50}, - {SRC3_DIRECTION_OFFSET + 17, 8}, - {SRC3_DIRECTION_OFFSET + 18, 0}, - {SRC3_DIRECTION_OFFSET + 19, 0}, - {SRC3_DIRECTION_OFFSET + 20, 0}, - {SRC3_DIRECTION_OFFSET + 21, 0}, - {SRC3_DIRECTION_OFFSET + 22, 0xff} - }; + u_int16_t addr, val; + } rv[] = { { CDATA_LEFT_VOLUME, M3_DEFAULT_VOL }, + { CDATA_RIGHT_VOLUME, M3_DEFAULT_VOL }, + { SRC3_DIRECTION_OFFSET, 1 }, + { SRC3_DIRECTION_OFFSET + 3, 0x0000 }, + { SRC3_DIRECTION_OFFSET + 4, 0 }, + { SRC3_DIRECTION_OFFSET + 5, 0 }, + { SRC3_DIRECTION_OFFSET + 6, 0 }, + { SRC3_DIRECTION_OFFSET + 7, 0 }, + { SRC3_DIRECTION_OFFSET + 8, 0 }, + { SRC3_DIRECTION_OFFSET + 9, 0 }, + { SRC3_DIRECTION_OFFSET + 10, 0x8000 }, + { SRC3_DIRECTION_OFFSET + 11, 0xFF00 }, + { SRC3_DIRECTION_OFFSET + 13, 0 }, + { SRC3_DIRECTION_OFFSET + 14, 0 }, + { SRC3_DIRECTION_OFFSET + 15, 0 }, + { SRC3_DIRECTION_OFFSET + 16, 50 }, + { SRC3_DIRECTION_OFFSET + 17, 8 }, + { SRC3_DIRECTION_OFFSET + 18, 0 }, + { SRC3_DIRECTION_OFFSET + 19, 0 }, + { SRC3_DIRECTION_OFFSET + 20, 0 }, + { SRC3_DIRECTION_OFFSET + 21, 0 }, + { SRC3_DIRECTION_OFFSET + 22, 0xff } }; M3_LOCK(sc); idx = sc->rch_cnt; /* adc instance number, no active reuse! */ - M3_DEBUG(CHANGE, ("m3_rchan_init(adc=%d)\n", idx)); + M3_DEBUG(CHANGE, ("m3_rchan_init(adc=%d)\n", idx)); if (dir != PCMDIR_REC) { M3_UNLOCK(sc); @@ -795,9 +785,11 @@ } data_bytes = (((MINISRC_TMP_BUFFER_SIZE & ~1) + - (MINISRC_IN_BUFFER_SIZE & ~1) + - (MINISRC_OUT_BUFFER_SIZE & ~1) + 4) + 255) &~ 255; - adc_data = 0x1100 + (data_bytes * idx) + data_bytes/2; + (MINISRC_IN_BUFFER_SIZE & ~1) + + (MINISRC_OUT_BUFFER_SIZE & ~1) + 4) + + 255) & + ~255; + adc_data = 0x1100 + (data_bytes * idx) + data_bytes / 2; dsp_in_size = MINISRC_IN_BUFFER_SIZE + (0x10 * 2); dsp_out_size = MINISRC_OUT_BUFFER_SIZE - (0x10 * 2); dsp_in_buf = adc_data + (MINISRC_TMP_BUFFER_SIZE / 2); @@ -806,7 +798,7 @@ ch = &sc->rch[idx]; ch->adc_idx = idx; ch->adc_data = adc_data; - if (ch->adc_data + data_bytes/2 >= 0x1c00) { + if (ch->adc_data + data_bytes / 2 >= 0x1c00) { M3_UNLOCK(sc); device_printf(sc->dev, "m3_rchan_init: revb mem exhausted\n"); return (NULL); @@ -834,46 +826,46 @@ m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_ADDRL, LO(bus_addr)); m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_ADDRH, HI(bus_addr)); m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_END_PLUS_1L, - LO(bus_addr + ch->bufsize)); + LO(bus_addr + ch->bufsize)); m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_END_PLUS_1H, - HI(bus_addr + ch->bufsize)); + HI(bus_addr + ch->bufsize)); m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTL, - LO(bus_addr)); + LO(bus_addr)); m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTH, - HI(bus_addr)); + HI(bus_addr)); /* dsp buffers */ m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_BEGIN, dsp_in_buf); m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_END_PLUS_1, - dsp_in_buf + dsp_in_size/2); + dsp_in_buf + dsp_in_size / 2); m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_HEAD, dsp_in_buf); m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_TAIL, dsp_in_buf); m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_BEGIN, dsp_out_buf); m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_END_PLUS_1, - dsp_out_buf + dsp_out_size/2); + dsp_out_buf + dsp_out_size / 2); m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_HEAD, dsp_out_buf); m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_TAIL, dsp_out_buf); /* some per client initializers */ m3_wr_assp_data(sc, ch->adc_data + SRC3_DIRECTION_OFFSET + 12, - ch->adc_data + 40 + 8); + ch->adc_data + 40 + 8); m3_wr_assp_data(sc, ch->adc_data + CDATA_DMA_CONTROL, - DMACONTROL_DIRECTION + DMACONTROL_AUTOREPEAT + - DMAC_PAGE3_SELECTOR + DMAC_BLOCKF_SELECTOR); + DMACONTROL_DIRECTION + DMACONTROL_AUTOREPEAT + DMAC_PAGE3_SELECTOR + + DMAC_BLOCKF_SELECTOR); /* set an armload of static initializers */ - for(i = 0 ; i < (sizeof(rv) / sizeof(rv[0])) ; i++) { + for (i = 0; i < (sizeof(rv) / sizeof(rv[0])); i++) { m3_wr_assp_data(sc, ch->adc_data + rv[i].addr, rv[i].val); } /* put us in the packed task lists */ - m3_wr_assp_data(sc, KDATA_INSTANCE0_MINISRC + - (sc->pch_cnt + sc->rch_cnt), - ch->adc_data >> DP_SHIFT_COUNT); + m3_wr_assp_data(sc, + KDATA_INSTANCE0_MINISRC + (sc->pch_cnt + sc->rch_cnt), + ch->adc_data >> DP_SHIFT_COUNT); m3_wr_assp_data(sc, KDATA_DMA_XFER0 + (sc->pch_cnt + sc->rch_cnt), - ch->adc_data >> DP_SHIFT_COUNT); + ch->adc_data >> DP_SHIFT_COUNT); m3_wr_assp_data(sc, KDATA_ADC1_XFER0 + sc->rch_cnt, - ch->adc_data >> DP_SHIFT_COUNT); + ch->adc_data >> DP_SHIFT_COUNT); /* gotta start before stop */ m3_rchan_trigger_locked(NULL, ch, PCMTRIG_START); @@ -893,16 +885,16 @@ struct sc_info *sc = ch->parent; M3_LOCK(sc); - M3_DEBUG(CHANGE, ("m3_rchan_free(adc=%d)\n", ch->adc_idx)); + M3_DEBUG(CHANGE, ("m3_rchan_free(adc=%d)\n", ch->adc_idx)); /* * should remove this exact instance from the packed lists, but all * are released at once (and in a stopped state) so this is ok. */ - m3_wr_assp_data(sc, KDATA_INSTANCE0_MINISRC + - (sc->rch_cnt - 1) + sc->pch_cnt, 0); - m3_wr_assp_data(sc, KDATA_DMA_XFER0 + - (sc->rch_cnt - 1) + sc->pch_cnt, 0); + m3_wr_assp_data(sc, + KDATA_INSTANCE0_MINISRC + (sc->rch_cnt - 1) + sc->pch_cnt, 0); + m3_wr_assp_data(sc, KDATA_DMA_XFER0 + (sc->rch_cnt - 1) + sc->pch_cnt, + 0); m3_wr_assp_data(sc, KDATA_ADC1_XFER0 + (sc->rch_cnt - 1), 0); sc->rch_cnt--; M3_UNLOCK(sc); @@ -919,22 +911,21 @@ M3_LOCK(sc); M3_DEBUG(CHANGE, - ("m3_rchan_setformat(dac=%d, format=0x%x{%s-%s})\n", - ch->adc_idx, format, - format & (AFMT_U8|AFMT_S8) ? "8bit":"16bit", - (AFMT_CHANNEL(format) > 1) ? "STEREO":"MONO")); + ("m3_rchan_setformat(dac=%d, format=0x%x{%s-%s})\n", ch->adc_idx, + format, format & (AFMT_U8 | AFMT_S8) ? "8bit" : "16bit", + (AFMT_CHANNEL(format) > 1) ? "STEREO" : "MONO")); /* mono word */ - data = (AFMT_CHANNEL(format) > 1) ? 0 : 1; - m3_wr_assp_data(sc, ch->adc_data + SRC3_MODE_OFFSET, data); + data = (AFMT_CHANNEL(format) > 1) ? 0 : 1; + m3_wr_assp_data(sc, ch->adc_data + SRC3_MODE_OFFSET, data); - /* 8bit word */ - data = ((format & AFMT_U8) || (format & AFMT_S8)) ? 1 : 0; - m3_wr_assp_data(sc, ch->adc_data + SRC3_WORD_LENGTH_OFFSET, data); - ch->fmt = format; + /* 8bit word */ + data = ((format & AFMT_U8) || (format & AFMT_S8)) ? 1 : 0; + m3_wr_assp_data(sc, ch->adc_data + SRC3_WORD_LENGTH_OFFSET, data); + ch->fmt = format; M3_UNLOCK(sc); - return (0); + return (0); } static u_int32_t @@ -945,14 +936,14 @@ u_int32_t freq; M3_LOCK(sc); - M3_DEBUG(CHANGE, ("m3_rchan_setspeed(adc=%d, speed=%d)\n", - ch->adc_idx, speed)); + M3_DEBUG(CHANGE, + ("m3_rchan_setspeed(adc=%d, speed=%d)\n", ch->adc_idx, speed)); - if ((freq = ((speed << 15) + 24000) / 48000) != 0) { - freq--; - } + if ((freq = ((speed << 15) + 24000) / 48000) != 0) { + freq--; + } - m3_wr_assp_data(sc, ch->adc_data + CDATA_FREQUENCY, freq); + m3_wr_assp_data(sc, ch->adc_data + CDATA_FREQUENCY, freq); ch->spd = speed; M3_UNLOCK(sc); @@ -965,8 +956,9 @@ { struct sc_rchinfo *ch = chdata; - M3_DEBUG(CHANGE, ("m3_rchan_setblocksize(adc=%d, blocksize=%d)\n", - ch->adc_idx, blocksize)); + M3_DEBUG(CHANGE, + ("m3_rchan_setblocksize(adc=%d, blocksize=%d)\n", ch->adc_idx, + blocksize)); return (sndbuf_getblksz(ch->buffer)); } @@ -997,15 +989,16 @@ M3_LOCK_ASSERT(sc); M3_DEBUG(go == PCMTRIG_START ? CHANGE : - go == PCMTRIG_STOP ? CHANGE : - go == PCMTRIG_ABORT ? CHANGE : - CALL, - ("m3_rchan_trigger(adc=%d, go=0x%x{%s})\n", ch->adc_idx, go, - go == PCMTRIG_START ? "PCMTRIG_START" : - go == PCMTRIG_STOP ? "PCMTRIG_STOP" : - go == PCMTRIG_ABORT ? "PCMTRIG_ABORT" : "ignore")); - - switch(go) { + go == PCMTRIG_STOP ? CHANGE : + go == PCMTRIG_ABORT ? CHANGE : + CALL, + ("m3_rchan_trigger(adc=%d, go=0x%x{%s})\n", ch->adc_idx, go, + go == PCMTRIG_START ? "PCMTRIG_START" : + go == PCMTRIG_STOP ? "PCMTRIG_STOP" : + go == PCMTRIG_ABORT ? "PCMTRIG_ABORT" : + "ignore")); + + switch (go) { case PCMTRIG_START: if (ch->active) { return 0; @@ -1016,14 +1009,14 @@ /*[[inc_timer_users]]*/ if (m3_chan_active(sc) == 1) { - m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 240); - m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 240); + m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 240); + m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 240); data = m3_rd_2(sc, HOST_INT_CTRL); - m3_wr_2(sc, HOST_INT_CTRL, data | CLKRUN_GEN_ENABLE); + m3_wr_2(sc, HOST_INT_CTRL, data | CLKRUN_GEN_ENABLE); } - m3_wr_assp_data(sc, KDATA_ADC1_REQUEST, 1); - m3_wr_assp_data(sc, ch->adc_data + CDATA_INSTANCE_READY, 1); + m3_wr_assp_data(sc, KDATA_ADC1_REQUEST, 1); + m3_wr_assp_data(sc, ch->adc_data + CDATA_INSTANCE_READY, 1); break; case PCMTRIG_STOP: @@ -1035,14 +1028,14 @@ /*[[dec_timer_users]]*/ if (m3_chan_active(sc) == 0) { - m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 0); - m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 0); + m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 0); + m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 0); data = m3_rd_2(sc, HOST_INT_CTRL); - m3_wr_2(sc, HOST_INT_CTRL, data & ~CLKRUN_GEN_ENABLE); + m3_wr_2(sc, HOST_INT_CTRL, data & ~CLKRUN_GEN_ENABLE); } - m3_wr_assp_data(sc, ch->adc_data + CDATA_INSTANCE_READY, 0); - m3_wr_assp_data(sc, KDATA_ADC1_REQUEST, 0); + m3_wr_assp_data(sc, ch->adc_data + CDATA_INSTANCE_READY, 0); + m3_wr_assp_data(sc, KDATA_ADC1_REQUEST, 0); break; case PCMTRIG_EMLDMAWR: @@ -1063,11 +1056,12 @@ bus_base = sndbuf_getbufaddr(ch->buffer); hi = m3_rd_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTH); - lo = m3_rd_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTL); - bus_crnt = lo | (hi << 16); + lo = m3_rd_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTL); + bus_crnt = lo | (hi << 16); - M3_DEBUG(CALL, ("m3_rchan_getptr(adc=%d) result=%d\n", - ch->adc_idx, bus_crnt - bus_base)); + M3_DEBUG(CALL, + ("m3_rchan_getptr(adc=%d) result=%d\n", ch->adc_idx, + bus_crnt - bus_base)); return (bus_crnt - bus_base); /* current byte offset of channel */ } @@ -1091,7 +1085,7 @@ { struct sc_rchinfo *ch = chdata; - M3_DEBUG(CALL, ("m3_rchan_getcaps(adc=%d)\n", ch->adc_idx)); + M3_DEBUG(CALL, ("m3_rchan_getcaps(adc=%d)\n", ch->adc_idx)); return &m3_reccaps; } @@ -1146,7 +1140,7 @@ ctl = m3_rd_1(sc, ASSP_HOST_INT_STATUS); if (ctl & DSP2HOST_REQ_TIMER) { m3_wr_1(sc, ASSP_HOST_INT_STATUS, - DSP2HOST_REQ_TIMER); + DSP2HOST_REQ_TIMER); /*[[ess_update_ptr]]*/ goto m3_handle_channel_intr; } @@ -1156,7 +1150,7 @@ goto m3_handle_channel_intr_out; m3_handle_channel_intr: - for (i=0 ; ipch_cnt ; i++) { + for (i = 0; i < sc->pch_cnt; i++) { pch = &sc->pch[i]; if (pch->active) { pch->ptr = m3_pchan_getptr_internal(pch); @@ -1170,7 +1164,7 @@ M3_LOCK(sc); } } - for (i=0 ; irch_cnt ; i++) { + for (i = 0; i < sc->rch_cnt; i++) { rch = &sc->rch[i]; if (rch->active) { rch->ptr = m3_rchan_getptr_internal(rch); @@ -1215,7 +1209,7 @@ u_int8_t reset_state; M3_LOCK_ASSERT(sc); - M3_DEBUG(CHANGE, ("m3_init\n")); + M3_DEBUG(CHANGE, ("m3_init\n")); /* diable legacy emulations. */ data = pci_read_config(sc->dev, PCI_LEGACY_AUDIO_CTRL, 2); @@ -1231,22 +1225,21 @@ /* [m3_assp_init] */ /* zero kernel data */ size = REV_B_DATA_MEMORY_UNIT_LENGTH * NUM_UNITS_KERNEL_DATA; - for(i = 0 ; i < size / 2 ; i++) { + for (i = 0; i < size / 2; i++) { m3_wr_assp_data(sc, KDATA_BASE_ADDR + i, 0); } /* zero mixer data? */ size = REV_B_DATA_MEMORY_UNIT_LENGTH * NUM_UNITS_KERNEL_DATA; - for(i = 0 ; i < size / 2 ; i++) { + for (i = 0; i < size / 2; i++) { m3_wr_assp_data(sc, KDATA_BASE_ADDR2 + i, 0); } /* init dma pointer */ - m3_wr_assp_data(sc, KDATA_CURRENT_DMA, - KDATA_DMA_XFER0); + m3_wr_assp_data(sc, KDATA_CURRENT_DMA, KDATA_DMA_XFER0); /* write kernel into code memory */ size = sizeof(gaw_kernel_vect_code); - for(i = 0 ; i < size / 2; i++) { + for (i = 0; i < size / 2; i++) { m3_wr_assp_code(sc, REV_B_CODE_MEMORY_BEGIN + i, - gaw_kernel_vect_code[i]); + gaw_kernel_vect_code[i]); } /* * We only have this one client and we know that 0x400 is free in @@ -1254,14 +1247,14 @@ * the minisrc doesn't need vectors, so we won't bother with them.. */ size = sizeof(gaw_minisrc_code_0400); - for(i = 0 ; i < size / 2; i++) { + for (i = 0; i < size / 2; i++) { m3_wr_assp_code(sc, 0x400 + i, gaw_minisrc_code_0400[i]); } /* write the coefficients for the low pass filter? */ size = sizeof(minisrc_lpf); - for(i = 0; i < size / 2 ; i++) { - m3_wr_assp_code(sc,0x400 + MINISRC_COEF_LOC + i, - minisrc_lpf[i]); + for (i = 0; i < size / 2; i++) { + m3_wr_assp_code(sc, 0x400 + MINISRC_COEF_LOC + i, + minisrc_lpf[i]); } m3_wr_assp_code(sc, 0x400 + MINISRC_COEF_LOC + size, 0x8000); /* the minisrc is the only thing on our task list */ @@ -1275,7 +1268,7 @@ m3_amp_enable(sc); /* [m3_assp_client_init] (only one client at index 0) */ - for (i=0x1100 ; i<0x1c00 ; i++) { + for (i = 0x1100; i < 0x1c00; i++) { m3_wr_assp_data(sc, i, 0); /* zero entire dac/adc area */ } @@ -1288,7 +1281,7 @@ static int m3_uninit(struct sc_info *sc) { - M3_DEBUG(CHANGE, ("m3_uninit\n")); + M3_DEBUG(CHANGE, ("m3_uninit\n")); return 0; } @@ -1302,7 +1295,7 @@ M3_DEBUG(CALL, ("m3_pci_probe(0x%x)\n", pci_get_devid(dev))); - for (card = m3_card_types ; card->pci_id ; card++) { + for (card = m3_card_types; card->pci_id; card++) { if (pci_get_devid(dev) == card->pci_id) { device_set_desc(dev, card->name); return BUS_PROBE_DEFAULT; @@ -1327,7 +1320,7 @@ sc->type = pci_get_devid(dev); sc->sc_lock = snd_mtxcreate(device_get_nameunit(dev), "snd_maestro3 softc"); - for (card = m3_card_types ; card->pci_id ; card++) { + for (card = m3_card_types; card->pci_id; card++) { if (sc->type == card->pci_id) { sc->which = card->which; sc->delay1 = card->delay1; @@ -1337,7 +1330,7 @@ } if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "dac", &i) == 0) { + "dac", &i) == 0) { if (i < 1) dacn = 1; else if (i > M3_PCHANS) @@ -1354,11 +1347,11 @@ sc->regid = PCIR_BAR(0); sc->regtype = SYS_RES_MEMORY; sc->reg = bus_alloc_resource_any(dev, sc->regtype, &sc->regid, - RF_ACTIVE); + RF_ACTIVE); if (!sc->reg) { sc->regtype = SYS_RES_IOPORT; sc->reg = bus_alloc_resource_any(dev, sc->regtype, &sc->regid, - RF_ACTIVE); + RF_ACTIVE); } if (!sc->reg) { device_printf(dev, "unable to allocate register space\n"); @@ -1369,7 +1362,7 @@ sc->irqid = 0; sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, - RF_ACTIVE | RF_SHAREABLE); + RF_ACTIVE | RF_SHAREABLE); if (!sc->irq) { device_printf(dev, "unable to allocate interrupt\n"); goto bad; @@ -1383,19 +1376,18 @@ sc->bufsz = pcm_getbuffersize(dev, M3_BUFSIZE_MIN, M3_BUFSIZE_DEFAULT, M3_BUFSIZE_MAX); - if (bus_dma_tag_create( - bus_get_dma_tag(dev), /* parent */ - 2, 0, /* alignment, boundary */ - M3_MAXADDR, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filtfunc, filtfuncarg */ - sc->bufsz, /* maxsize */ - 1, /* nsegments */ - 0x3ffff, /* maxsegz */ - 0, /* flags */ - NULL, /* lockfunc */ - NULL, /* lockfuncarg */ - &sc->parent_dmat) != 0) { + if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ + 2, 0, /* alignment, boundary */ + M3_MAXADDR, /* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filtfunc, filtfuncarg */ + sc->bufsz, /* maxsize */ + 1, /* nsegments */ + 0x3ffff, /* maxsegz */ + 0, /* flags */ + NULL, /* lockfunc */ + NULL, /* lockfuncarg */ + &sc->parent_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } @@ -1427,20 +1419,20 @@ device_printf(dev, "pcm_register error\n"); goto bad; } - for (i=0 ; iregtype == SYS_RES_IOPORT)? "port" : "mem", + (sc->regtype == SYS_RES_IOPORT) ? "port" : "mem", rman_get_start(sc->reg), rman_get_start(sc->irq), device_get_nameunit(device_get_parent(dev))); if (pcm_setstatus(dev, status)) { @@ -1451,13 +1443,13 @@ mixer_hwvol_init(dev); /* Create the buffer for saving the card state during suspend */ - len = sizeof(u_int16_t) * (REV_B_CODE_MEMORY_LENGTH + - REV_B_DATA_MEMORY_LENGTH); - sc->savemem = (u_int16_t*)malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); + len = sizeof(u_int16_t) * + (REV_B_CODE_MEMORY_LENGTH + REV_B_DATA_MEMORY_LENGTH); + sc->savemem = (u_int16_t *)malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); return 0; - bad: +bad: if (codec) ac97_destroy(codec); if (sc->ih) @@ -1487,7 +1479,7 @@ } M3_LOCK(sc); - m3_uninit(sc); /* shutdown chip */ + m3_uninit(sc); /* shutdown chip */ m3_power(sc, 3); /* power off */ M3_UNLOCK(sc); @@ -1508,16 +1500,16 @@ struct sc_info *sc = pcm_getdevinfo(dev); int i, index = 0; - M3_DEBUG(CHANGE, ("m3_pci_suspend\n")); + M3_DEBUG(CHANGE, ("m3_pci_suspend\n")); M3_LOCK(sc); - for (i=0 ; ipch_cnt ; i++) { + for (i = 0; i < sc->pch_cnt; i++) { if (sc->pch[i].active) { m3_pchan_trigger_locked(NULL, &sc->pch[i], PCMTRIG_STOP); } } - for (i=0 ; irch_cnt ; i++) { + for (i = 0; i < sc->rch_cnt; i++) { if (sc->rch[i].active) { m3_rchan_trigger_locked(NULL, &sc->rch[i], PCMTRIG_STOP); @@ -1587,13 +1579,13 @@ M3_LOCK(sc); /* Turn the channels back on */ - for (i=0 ; ipch_cnt ; i++) { + for (i = 0; i < sc->pch_cnt; i++) { if (sc->pch[i].active) { m3_pchan_trigger_locked(NULL, &sc->pch[i], PCMTRIG_START); } } - for (i=0 ; irch_cnt ; i++) { + for (i = 0; i < sc->rch_cnt; i++) { if (sc->rch[i].active) { m3_rchan_trigger_locked(NULL, &sc->rch[i], PCMTRIG_START); @@ -1627,9 +1619,9 @@ data = m3_rd_1(sc, DSP_PORT_CONTROL_REG_B); reset_state = data & ~REGB_STOP_CLOCK; /* remember for continue */ - DELAY(10 * 1000); + DELAY(10 * 1000); m3_wr_1(sc, DSP_PORT_CONTROL_REG_B, reset_state & ~REGB_ENABLE_RESET); - DELAY(10 * 1000); /* necessary? */ + DELAY(10 * 1000); /* necessary? */ return reset_state; } @@ -1650,8 +1642,7 @@ * the proper bits. */ if (resource_int_value(device_get_name(sc->dev), - device_get_unit(sc->dev), - "hwvol_config", &hint) == 0) + device_get_unit(sc->dev), "hwvol_config", &hint) == 0) hv_cfg = (hint > 0) ? HV_BUTTON_FROM_GD : 0; else hv_cfg = HV_BUTTON_FROM_GD; @@ -1707,13 +1698,13 @@ M3_LOCK_ASSERT(sc); switch (sc->which) { - case ESS_ALLEGRO_1: - polarity_port = 0x1800; - break; + case ESS_ALLEGRO_1: + polarity_port = 0x1800; + break; case ESS_MAESTRO3: - polarity_port = 0x1100; - break; - default: + polarity_port = 0x1100; + break; + default: panic("bad sc->which"); } gpo = (polarity_port >> 8) & 0x0f; @@ -1758,8 +1749,8 @@ DELAY(sc->delay1 * 1000); /*delay1 (ALLEGRO:50, MAESTRO3:20)*/ m3_wr_2(sc, GPIO_DATA, GPO_PRIMARY_AC97); DELAY(5); - m3_wr_2(sc, RING_BUS_CTRL_A, IO_SRAM_ENABLE | - SERIAL_AC_LINK_ENABLE); + m3_wr_2(sc, RING_BUS_CTRL_A, + IO_SRAM_ENABLE | SERIAL_AC_LINK_ENABLE); m3_wr_2(sc, GPIO_MASK, ~0); DELAY(sc->delay2 * 1000); /*delay2 (ALLEGRO:800, MAESTRO3:500)*/ @@ -1772,19 +1763,17 @@ break; } device_printf(sc->dev, "Codec reset retry\n"); - } else retry = 0; + } else + retry = 0; } while (retry); } -static device_method_t m3_methods[] = { - DEVMETHOD(device_probe, m3_pci_probe), - DEVMETHOD(device_attach, m3_pci_attach), - DEVMETHOD(device_detach, m3_pci_detach), - DEVMETHOD(device_suspend, m3_pci_suspend), - DEVMETHOD(device_resume, m3_pci_resume), - DEVMETHOD(device_shutdown, m3_pci_shutdown), - { 0, 0 } -}; +static device_method_t m3_methods[] = { DEVMETHOD(device_probe, m3_pci_probe), + DEVMETHOD(device_attach, m3_pci_attach), + DEVMETHOD(device_detach, m3_pci_detach), + DEVMETHOD(device_suspend, m3_pci_suspend), + DEVMETHOD(device_resume, m3_pci_resume), + DEVMETHOD(device_shutdown, m3_pci_shutdown), { 0, 0 } }; static driver_t m3_driver = { "pcm", Index: sys/dev/sound/pci/neomagic-coeff.h =================================================================== --- sys/dev/sound/pci/neomagic-coeff.h +++ sys/dev/sound/pci/neomagic-coeff.h @@ -30,4607 +30,4236 @@ #define NM_TOTAL_COEFF_COUNT 0x3158 -static u_char coefficients[NM_TOTAL_COEFF_COUNT * 4] = { - 0xFF, 0xFF, 0x2F, 0x00, 0x4B, 0xFF, 0xA5, 0x01, 0xEF, 0xFC, 0x21, - 0x05, 0x87, 0xF7, 0x62, 0x11, 0xE9, 0x45, 0x5E, 0xF9, 0xB5, 0x01, - 0xDE, 0xFF, 0xA4, 0xFF, 0x60, 0x00, 0xCA, 0xFF, 0x0D, 0x00, 0xFD, - 0xFF, 0x36, 0x00, 0x36, 0xFF, 0xE6, 0x01, 0x3D, 0xFC, 0xD6, 0x06, - 0x4C, 0xF3, 0xED, 0x20, 0x3D, 0x3D, 0x4A, 0xF3, 0x4E, 0x05, 0xB1, - 0xFD, 0xE1, 0x00, 0xC3, 0xFF, 0x05, 0x00, 0x02, 0x00, 0xFD, 0xFF, - 0x2A, 0x00, 0x5C, 0xFF, 0xAA, 0x01, 0x71, 0xFC, 0x07, 0x07, 0x7E, - 0xF1, 0x44, 0x30, 0x44, 0x30, 0x7E, 0xF1, 0x07, 0x07, 0x71, 0xFC, - 0xAA, 0x01, 0x5C, 0xFF, 0x2A, 0x00, 0xFD, 0xFF, 0x02, 0x00, 0x05, - 0x00, 0xC3, 0xFF, 0xE1, 0x00, 0xB1, 0xFD, 0x4E, 0x05, 0x4A, 0xF3, - 0x3D, 0x3D, 0xED, 0x20, 0x4C, 0xF3, 0xD6, 0x06, 0x3D, 0xFC, 0xE6, - 0x01, 0x36, 0xFF, 0x36, 0x00, 0xFD, 0xFF, 0x0D, 0x00, 0xCA, 0xFF, - 0x60, 0x00, 0xA4, 0xFF, 0xDE, 0xFF, 0xB5, 0x01, 0x5E, 0xF9, 0xE9, - 0x45, 0x62, 0x11, 0x87, 0xF7, 0x21, 0x05, 0xEF, 0xFC, 0xA5, 0x01, - 0x4B, 0xFF, 0x2F, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x1E, 0x00, 0x84, - 0xFF, 0x11, 0x01, 0x34, 0xFE, 0x8F, 0x02, 0xC7, 0xFC, 0xAE, 0x03, - 0xF7, 0x48, 0xAE, 0x03, 0xC7, 0xFC, 0x8F, 0x02, 0x34, 0xFE, 0x11, - 0x01, 0x84, 0xFF, 0x1E, 0x00, 0xFE, 0xFF, 0x34, 0x00, 0x3D, 0xFF, - 0xCA, 0x01, 0x95, 0xFC, 0xEA, 0x05, 0xBB, 0xF5, 0x25, 0x17, 0x3C, - 0x43, 0x8D, 0xF6, 0x43, 0x03, 0xF5, 0xFE, 0x26, 0x00, 0x20, 0x00, - 0xE2, 0xFF, 0x08, 0x00, 0xFD, 0xFF, 0x30, 0x00, 0x4D, 0xFF, 0xC5, - 0x01, 0x4C, 0xFC, 0x26, 0x07, 0xA3, 0xF1, 0xAB, 0x2C, 0xBB, 0x33, - 0x8F, 0xF1, 0xCA, 0x06, 0xA6, 0xFC, 0x85, 0x01, 0x6F, 0xFF, 0x24, - 0x00, 0xFD, 0xFF, 0x03, 0x00, 0xFE, 0xFF, 0xD5, 0xFF, 0xBC, 0x00, - 0xF0, 0xFD, 0xEC, 0x04, 0xD9, 0xF3, 0xB1, 0x3E, 0xCD, 0x1E, 0xC1, - 0xF3, 0xAF, 0x06, 0x49, 0xFC, 0xE4, 0x01, 0x36, 0xFF, 0x36, 0x00, - 0xFE, 0xFF, 0x16, 0x00, 0xA6, 0xFF, 0xBB, 0x00, 0xE9, 0xFE, 0x38, - 0x01, 0x4B, 0xFF, 0x28, 0xFE, 0x3A, 0x48, 0x04, 0x0A, 0x2E, 0xFA, - 0xDF, 0x03, 0x8A, 0xFD, 0x60, 0x01, 0x65, 0xFF, 0x27, 0x00, 0x00, - 0x00, 0xFF, 0xFF, 0x2E, 0x00, 0x50, 0xFF, 0x98, 0x01, 0x0D, 0xFD, - 0xE0, 0x04, 0x14, 0xF8, 0xC3, 0x0F, 0x89, 0x46, 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0xB4, 0xFF, 0x3E, 0x01, 0xE4, 0xFC, 0xF6, 0x05, 0x26, 0xF6, 0x95, - 0x10, 0x26, 0x42, 0x87, 0x02, 0x28, 0xFB, 0x37, 0x04, 0x3B, 0xFD, - 0x60, 0x01, 0x8C, 0xFF, 0x10, 0x00, 0x01, 0x00, 0xF7, 0xFF, 0xD7, - 0xFF, 0x04, 0x01, 0x0F, 0xFD, 0x3E, 0x06, 0x7D, 0xF4, 0x76, 0x17, - 0xF4, 0x3F, 0x9F, 0xFD, 0x7B, 0xFD, 0x26, 0x03, 0xA0, 0xFD, 0x4A, - 0x01, 0x8B, 0xFF, 0x11, 0x00, 0x02, 0x00, 0xE9, 0xFF, 0x04, 0x00, - 0xB1, 0x00, 0x71, 0xFD, 0x26, 0x06, 0x5A, 0xF3, 0x88, 0x1E, 0x87, - 0x3C, 0x98, 0xF9, 0xB3, 0xFF, 0x02, 0x02, 0x1E, 0xFE, 0x22, 0x01, - 0x93, 0xFF, 0x0F, 0x00, 0x04, 0x00, 0xD7, 0xFF, 0x3A, 0x00, 0x45, - 0x00, 0x09, 0xFE, 0xA7, 0x05, 0xE1, 0xF2, 0x8D, 0x25, 0xFD, 0x37, - 0x82, 0xF6, 0xB5, 0x01, 0xDC, 0x00, 0xAA, 0xFE, 0xEE, 0x00, 0xA0, - 0xFF, 0x0D, 0x00, 0x06, 0x00, 0xC4, 0xFF, 0x76, 0x00, 0xC7, 0xFF, - 0xD3, 0xFE, 0xBC, 0x04, 0x31, 0xF3, 0x4A, 0x2C, 0x83, 0x32, 0x61, - 0xF4, 0x68, 0x03, 0xC8, 0xFF, 0x3B, 0xFF, 0xB3, 0x00, 0xB1, 0xFF, - 0x0A, 0x00, 0x0A, 0x00, 0xB1, 0xFF, 0xB3, 0x00, 0x3B, 0xFF, 0xC8, - 0xFF, 0x68, 0x03, 0x61, 0xF4, 0x83, 0x32, 0x4A, 0x2C, 0x31, 0xF3, - 0xBC, 0x04, 0xD3, 0xFE, 0xC7, 0xFF, 0x76, 0x00, 0xC4, 0xFF, 0x06, - 0x00, 0x0D, 0x00, 0xA0, 0xFF, 0xEE, 0x00, 0xAA, 0xFE, 0xDC, 0x00, - 0xB5, 0x01, 0x82, 0xF6, 0xFD, 0x37, 0x8D, 0x25, 0xE1, 0xF2, 0xA7, - 0x05, 0x09, 0xFE, 0x45, 0x00, 0x3A, 0x00, 0xD7, 0xFF, 0x04, 0x00, - 0x0F, 0x00, 0x93, 0xFF, 0x22, 0x01, 0x1E, 0xFE, 0x02, 0x02, 0xB3, - 0xFF, 0x98, 0xF9, 0x87, 0x3C, 0x88, 0x1E, 0x5A, 0xF3, 0x26, 0x06, - 0x71, 0xFD, 0xB1, 0x00, 0x04, 0x00, 0xE9, 0xFF, 0x02, 0x00, 0x11, - 0x00, 0x8B, 0xFF, 0x4A, 0x01, 0xA0, 0xFD, 0x26, 0x03, 0x7B, 0xFD, - 0x9F, 0xFD, 0xF4, 0x3F, 0x76, 0x17, 0x7D, 0xF4, 0x3E, 0x06, 0x0F, - 0xFD, 0x04, 0x01, 0xD7, 0xFF, 0xF7, 0xFF, 0x01, 0x00, 0x10, 0x00, - 0x8C, 0xFF, 0x60, 0x01, 0x3B, 0xFD, 0x37, 0x04, 0x28, 0xFB, 0x87, - 0x02, 0x26, 0x42, 0x95, 0x10, 0x26, 0xF6, 0xF6, 0x05, 0xE4, 0xFC, - 0x3E, 0x01, 0xB4, 0xFF, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x96, - 0xFF, 0x62, 0x01, 0xF8, 0xFC, 0x21, 0x05, 0xDD, 0xF8, 0x37, 0x08, - 0x07, 0x43, 0x19, 0x0A, 0x2F, 0xF8, 0x5D, 0x05, 0xEC, 0xFC, 0x5D, - 0x01, 0x9B, 0xFF, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, - 0xAB, 0xFF, 0x4A, 0x01, 0xE1, 0xFC, 0xCF, 0x05, 0xBE, 0xF6, 0x89, - 0x0E, 0x90, 0x42, 0x34, 0x04, 0x71, 0xFA, 0x84, 0x04, 0x22, 0xFD, - 0x63, 0x01, 0x8E, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0xFB, 0xFF, 0xCB, - 0xFF, 0x19, 0x01, 0xFC, 0xFC, 0x31, 0x06, 0xF4, 0xF4, 0x51, 0x15, - 0xC3, 0x40, 0x0B, 0xFF, 0xC5, 0xFC, 0x7D, 0x03, 0x7E, 0xFD, 0x53, - 0x01, 0x8B, 0xFF, 0x11, 0x00, 0x01, 0x00, 0xED, 0xFF, 0xF5, 0xFF, - 0xCD, 0x00, 0x4D, 0xFD, 0x38, 0x06, 0xA3, 0xF3, 0x5A, 0x1C, 0xB5, - 0x3D, 0xBC, 0xFA, 0x09, 0xFF, 0x5C, 0x02, 0xF5, 0xFD, 0x30, 0x01, - 0x90, 0xFF, 0x10, 0x00, 0x03, 0x00, 0xDD, 0xFF, 0x29, 0x00, 0x69, - 0x00, 0xD4, 0xFD, 0xD9, 0x05, 0xF3, 0xF2, 0x69, 0x23, 0x7E, 0x39, - 0x5B, 0xF7, 0x1E, 0x01, 0x36, 0x01, 0x7E, 0xFE, 0xFF, 0x00, 0x9B, - 0xFF, 0x0E, 0x00, 0x06, 0x00, 0xCA, 0xFF, 0x63, 0x00, 0xEF, 0xFF, - 0x90, 0xFE, 0x0F, 0x05, 0x02, 0xF3, 0x43, 0x2A, 0x49, 0x34, 0xEF, - 0xF4, 0xEB, 0x02, 0x1A, 0x00, 0x0E, 0xFF, 0xC6, 0x00, 0xAC, 0xFF, - 0x0B, 0x00, 0x09, 0x00, 0xB7, 0xFF, 0xA0, 0x00, 0x67, 0xFF, 0x79, - 0xFF, 0xDB, 0x03, 0xEB, 0xF3, 0xAA, 0x30, 0x45, 0x2E, 0x76, 0xF3, - 0x5E, 0x04, 0x1A, 0xFF, 0x9D, 0xFF, 0x89, 0x00, 0xBE, 0xFF, 0x07, - 0x00, 0x0C, 0x00, 0xA5, 0xFF, 0xDD, 0x00, 0xD7, 0xFE, 0x85, 0x00, - 0x44, 0x02, 0xC0, 0xF5, 0x66, 0x36, 0xAB, 0x27, 0xE3, 0xF2, 0x6A, - 0x05, 0x42, 0xFE, 0x20, 0x00, 0x4C, 0x00, 0xD1, 0xFF, 0x04, 0x00, - 0x0F, 0x00, 0x96, 0xFF, 0x13, 0x01, 0x48, 0xFE, 0xA7, 0x01, 0x58, - 0x00, 0x8B, 0xF8, 0x3C, 0x3B, 0xB4, 0x20, 0x22, 0xF3, 0x0A, 0x06, - 0x9A, 0xFD, 0x92, 0x00, 0x14, 0x00, 0xE3, 0xFF, 0x02, 0x00, 0x10, - 0x00, 0x8D, 0xFF, 0x3F, 0x01, 0xC4, 0xFD, 0xCD, 0x02, 0x2E, 0xFE, - 0x49, 0xFC, 0x06, 0x3F, 0xA1, 0x19, 0x14, 0xF4, 0x41, 0x06, 0x27, - 0xFD, 0xED, 0x00, 0xE4, 0xFF, 0xF3, 0xFF, 0x01, 0x00, 0x10, 0x00, - 0x8B, 0xFF, 0x5B, 0x01, 0x57, 0xFD, 0xE6, 0x03, 0xE0, 0xFB, 0xEE, - 0x00, 0x9C, 0x41, 0xAB, 0x12, 0x98, 0xF5, 0x16, 0x06, 0xEC, 0xFC, - 0x2F, 0x01, 0xBD, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x92, - 0xFF, 0x64, 0x01, 0x09, 0xFD, 0xDE, 0x04, 0x8E, 0xF9, 0x64, 0x06, - 0xE6, 0x42, 0x0A, 0x0C, 0x87, 0xF7, 0x94, 0x05, 0xE5, 0xFC, 0x56, - 0x01, 0xA2, 0xFF, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, - 0xA3, 0xFF, 0x54, 0x01, 0xE3, 0xFC, 0xA1, 0x05, 0x5E, 0xF7, 0x88, - 0x0C, 0xD9, 0x42, 0xF2, 0x05, 0xBB, 0xF9, 0xCD, 0x04, 0x0D, 0xFD, - 0x64, 0x01, 0x91, 0xFF, 0x0E, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xC0, - 0xFF, 0x2B, 0x01, 0xEE, 0xFC, 0x1C, 0x06, 0x75, 0xF5, 0x32, 0x13, - 0x75, 0x41, 0x8B, 0x00, 0x0E, 0xFC, 0xD2, 0x03, 0x5E, 0xFD, 0x5A, - 0x01, 0x8B, 0xFF, 0x10, 0x00, 0x01, 0x00, 0xF2, 0xFF, 0xE7, 0xFF, - 0xE7, 0x00, 0x2E, 0xFD, 0x41, 0x06, 0xFC, 0xF3, 0x2C, 0x1A, 0xC6, - 0x3E, 0xF7, 0xFB, 0x5A, 0xFE, 0xB7, 0x02, 0xCE, 0xFD, 0x3C, 0x01, - 0x8D, 0xFF, 0x10, 0x00, 0x02, 0x00, 0xE2, 0xFF, 0x18, 0x00, 0x8A, - 0x00, 0xA5, 0xFD, 0x02, 0x06, 0x16, 0xF3, 0x3F, 0x21, 0xE6, 0x3A, - 0x4B, 0xF8, 0x81, 0x00, 0x90, 0x01, 0x53, 0xFE, 0x0F, 0x01, 0x97, - 0xFF, 0x0E, 0x00, 0x05, 0x00, 0xD0, 0xFF, 0x50, 0x00, 0x17, 0x00, - 0x51, 0xFE, 0x59, 0x05, 0xE7, 0xF2, 0x31, 0x28, 0xFB, 0x35, 0x93, - 0xF5, 0x66, 0x02, 0x6F, 0x00, 0xE2, 0xFE, 0xD8, 0x00, 0xA6, 0xFF, - 0x0C, 0x00, 0x08, 0x00, 0xBD, 0xFF, 0x8D, 0x00, 0x92, 0xFF, 0x2D, - 0xFF, 0x45, 0x04, 0x8B, 0xF3, 0xC1, 0x2E, 0x31, 0x30, 0xD1, 0xF3, - 0xF6, 0x03, 0x65, 0xFF, 0x72, 0xFF, 0x9B, 0x00, 0xB8, 0xFF, 0x08, - 0x00, 0x0B, 0x00, 0xAA, 0xFF, 0xCA, 0x00, 0x03, 0xFF, 0x2F, 0x00, - 0xCB, 0x02, 0x16, 0xF5, 0xB8, 0x34, 0xC0, 0x29, 0xF9, 0xF2, 0x23, - 0x05, 0x80, 0xFE, 0xF9, 0xFF, 0x5E, 0x00, 0xCC, 0xFF, 0x05, 0x00, - 0x0E, 0x00, 0x9A, 0xFF, 0x03, 0x01, 0x73, 0xFE, 0x4C, 0x01, 0xF7, - 0x00, 0x94, 0xF7, 0xDB, 0x39, 0xDF, 0x22, 0xFA, 0xF2, 0xE5, 0x05, - 0xC8, 0xFD, 0x71, 0x00, 0x25, 0x00, 0xDE, 0xFF, 0x03, 0x00, 0x10, - 0x00, 0x8F, 0xFF, 0x33, 0x01, 0xEB, 0xFD, 0x73, 0x02, 0xDE, 0xFE, - 0x08, 0xFB, 0xFB, 0x3D, 0xCE, 0x1B, 0xB8, 0xF3, 0x3B, 0x06, 0x45, - 0xFD, 0xD4, 0x00, 0xF2, 0xFF, 0xEF, 0xFF, 0x01, 0x00, 0x11, 0x00, - 0x8A, 0xFF, 0x55, 0x01, 0x75, 0xFD, 0x92, 0x03, 0x97, 0xFC, 0x69, - 0xFF, 0xF2, 0x40, 0xC8, 0x14, 0x13, 0xF5, 0x2D, 0x06, 0xF8, 0xFC, - 0x1E, 0x01, 0xC8, 0xFF, 0xFC, 0xFF, 0x00, 0x00, 0x0F, 0x00, 0x8F, - 0xFF, 0x64, 0x01, 0x1D, 0xFD, 0x97, 0x04, 0x43, 0xFA, 0xA1, 0x04, - 0xA5, 0x42, 0x08, 0x0E, 0xE6, 0xF6, 0xC4, 0x05, 0xE1, 0xFC, 0x4D, - 0x01, 0xA9, 0xFF, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, - 0x9D, 0xFF, 0x5C, 0x01, 0xEA, 0xFC, 0x6C, 0x05, 0x05, 0xF8, 0x94, - 0x0A, 0x03, 0x43, 0xC1, 0x07, 0x09, 0xF9, 0x10, 0x05, 0xFC, 0xFC, - 0x62, 0x01, 0x95, 0xFF, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x00, 0xB6, - 0xFF, 0x3B, 0x01, 0xE5, 0xFC, 0xFF, 0x05, 0x02, 0xF6, 0x19, 0x11, - 0x06, 0x42, 0x1F, 0x02, 0x56, 0xFB, 0x23, 0x04, 0x41, 0xFD, 0x5F, - 0x01, 0x8B, 0xFF, 0x10, 0x00, 0x01, 0x00, 0xF6, 0xFF, 0xDA, 0xFF, - 0xFF, 0x00, 0x15, 0xFD, 0x40, 0x06, 0x62, 0xF4, 0x01, 0x18, 0xBB, - 0x3F, 0x47, 0xFD, 0xA8, 0xFD, 0x10, 0x03, 0xA9, 0xFD, 0x47, 0x01, - 0x8C, 0xFF, 0x11, 0x00, 0x02, 0x00, 0xE7, 0xFF, 0x08, 0x00, 0xA9, - 0x00, 0x7B, 0xFD, 0x20, 0x06, 0x4B, 0xF3, 0x13, 0x1F, 0x36, 0x3C, - 0x52, 0xF9, 0xDD, 0xFF, 0xEB, 0x01, 0x28, 0xFE, 0x1F, 0x01, 0x93, - 0xFF, 0x0F, 0x00, 0x04, 0x00, 0xD6, 0xFF, 0x3F, 0x00, 0x3C, 0x00, - 0x16, 0xFE, 0x98, 0x05, 0xE0, 0xF2, 0x16, 0x26, 0x99, 0x37, 0x4F, - 0xF6, 0xD9, 0x01, 0xC6, 0x00, 0xB5, 0xFE, 0xEA, 0x00, 0xA1, 0xFF, - 0x0D, 0x00, 0x07, 0x00, 0xC3, 0xFF, 0x7A, 0x00, 0xBC, 0xFF, 0xE4, - 0xFE, 0xA5, 0x04, 0x41, 0xF3, 0xCA, 0x2C, 0x0E, 0x32, 0x42, 0xF4, - 0x85, 0x03, 0xB4, 0xFF, 0x46, 0xFF, 0xAE, 0x00, 0xB3, 0xFF, 0x09, - 0x00, 0x0A, 0x00, 0xB0, 0xFF, 0xB8, 0x00, 0x30, 0xFF, 0xDC, 0xFF, - 0x49, 0x03, 0x83, 0xF4, 0xF5, 0x32, 0xC9, 0x2B, 0x23, 0xF3, 0xD1, - 0x04, 0xC2, 0xFE, 0xD1, 0xFF, 0x71, 0x00, 0xC6, 0xFF, 0x06, 0x00, - 0x0D, 0x00, 0x9F, 0xFF, 0xF3, 0x00, 0x9F, 0xFE, 0xF3, 0x00, 0x90, - 0x01, 0xB6, 0xF6, 0x5F, 0x38, 0x04, 0x25, 0xE4, 0xF2, 0xB4, 0x05, - 0xFB, 0xFD, 0x4E, 0x00, 0x36, 0x00, 0xD9, 0xFF, 0x04, 0x00, 0x0F, - 0x00, 0x92, 0xFF, 0x26, 0x01, 0x13, 0xFE, 0x18, 0x02, 0x89, 0xFF, - 0xDF, 0xF9, 0xD3, 0x3C, 0xFC, 0x1D, 0x6B, 0xF3, 0x2C, 0x06, 0x67, - 0xFD, 0xB8, 0x00, 0x00, 0x00, 0xEA, 0xFF, 0x02, 0x00, 0x11, 0x00, - 0x8B, 0xFF, 0x4C, 0x01, 0x97, 0xFD, 0x3C, 0x03, 0x4D, 0xFD, 0xF8, - 0xFD, 0x2A, 0x40, 0xED, 0x16, 0x9A, 0xF4, 0x3C, 0x06, 0x0A, 0xFD, - 0x0A, 0x01, 0xD4, 0xFF, 0xF8, 0xFF, 0x01, 0x00, 0x10, 0x00, 0x8C, - 0xFF, 0x61, 0x01, 0x34, 0xFD, 0x4B, 0x04, 0xFA, 0xFA, 0xF1, 0x02, - 0x42, 0x42, 0x11, 0x10, 0x4C, 0xF6, 0xED, 0x05, 0xE3, 0xFC, 0x41, - 0x01, 0xB1, 0xFF, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x97, 0xFF, - 0x61, 0x01, 0xF5, 0xFC, 0x30, 0x05, 0xB1, 0xF8, 0xAE, 0x08, 0x0A, - 0x43, 0x9F, 0x09, 0x5A, 0xF8, 0x4F, 0x05, 0xEF, 0xFC, 0x5F, 0x01, - 0x9A, 0xFF, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0xAD, - 0xFF, 0x48, 0x01, 0xE2, 0xFC, 0xDA, 0x05, 0x97, 0xF6, 0x0B, 0x0F, - 0x79, 0x42, 0xC7, 0x03, 0x9E, 0xFA, 0x71, 0x04, 0x28, 0xFD, 0x63, - 0x01, 0x8D, 0xFF, 0x0F, 0x00 -}; +static u_char coefficients[NM_TOTAL_COEFF_COUNT * 4] = { 0xFF, 0xFF, 0x2F, 0x00, + 0x4B, 0xFF, 0xA5, 0x01, 0xEF, 0xFC, 0x21, 0x05, 0x87, 0xF7, 0x62, 0x11, + 0xE9, 0x45, 0x5E, 0xF9, 0xB5, 0x01, 0xDE, 0xFF, 0xA4, 0xFF, 0x60, 0x00, + 0xCA, 0xFF, 0x0D, 0x00, 0xFD, 0xFF, 0x36, 0x00, 0x36, 0xFF, 0xE6, 0x01, + 0x3D, 0xFC, 0xD6, 0x06, 0x4C, 0xF3, 0xED, 0x20, 0x3D, 0x3D, 0x4A, 0xF3, + 0x4E, 0x05, 0xB1, 0xFD, 0xE1, 0x00, 0xC3, 0xFF, 0x05, 0x00, 0x02, 0x00, + 0xFD, 0xFF, 0x2A, 0x00, 0x5C, 0xFF, 0xAA, 0x01, 0x71, 0xFC, 0x07, 0x07, + 0x7E, 0xF1, 0x44, 0x30, 0x44, 0x30, 0x7E, 0xF1, 0x07, 0x07, 0x71, 0xFC, + 0xAA, 0x01, 0x5C, 0xFF, 0x2A, 0x00, 0xFD, 0xFF, 0x02, 0x00, 0x05, 0x00, + 0xC3, 0xFF, 0xE1, 0x00, 0xB1, 0xFD, 0x4E, 0x05, 0x4A, 0xF3, 0x3D, 0x3D, + 0xED, 0x20, 0x4C, 0xF3, 0xD6, 0x06, 0x3D, 0xFC, 0xE6, 0x01, 0x36, 0xFF, + 0x36, 0x00, 0xFD, 0xFF, 0x0D, 0x00, 0xCA, 0xFF, 0x60, 0x00, 0xA4, 0xFF, + 0xDE, 0xFF, 0xB5, 0x01, 0x5E, 0xF9, 0xE9, 0x45, 0x62, 0x11, 0x87, 0xF7, + 0x21, 0x05, 0xEF, 0xFC, 0xA5, 0x01, 0x4B, 0xFF, 0x2F, 0x00, 0xFF, 0xFF, + 0x00, 0x00, 0x1E, 0x00, 0x84, 0xFF, 0x11, 0x01, 0x34, 0xFE, 0x8F, 0x02, + 0xC7, 0xFC, 0xAE, 0x03, 0xF7, 0x48, 0xAE, 0x03, 0xC7, 0xFC, 0x8F, 0x02, + 0x34, 0xFE, 0x11, 0x01, 0x84, 0xFF, 0x1E, 0x00, 0xFE, 0xFF, 0x34, 0x00, + 0x3D, 0xFF, 0xCA, 0x01, 0x95, 0xFC, 0xEA, 0x05, 0xBB, 0xF5, 0x25, 0x17, + 0x3C, 0x43, 0x8D, 0xF6, 0x43, 0x03, 0xF5, 0xFE, 0x26, 0x00, 0x20, 0x00, + 0xE2, 0xFF, 0x08, 0x00, 0xFD, 0xFF, 0x30, 0x00, 0x4D, 0xFF, 0xC5, 0x01, + 0x4C, 0xFC, 0x26, 0x07, 0xA3, 0xF1, 0xAB, 0x2C, 0xBB, 0x33, 0x8F, 0xF1, + 0xCA, 0x06, 0xA6, 0xFC, 0x85, 0x01, 0x6F, 0xFF, 0x24, 0x00, 0xFD, 0xFF, + 0x03, 0x00, 0xFE, 0xFF, 0xD5, 0xFF, 0xBC, 0x00, 0xF0, 0xFD, 0xEC, 0x04, + 0xD9, 0xF3, 0xB1, 0x3E, 0xCD, 0x1E, 0xC1, 0xF3, 0xAF, 0x06, 0x49, 0xFC, + 0xE4, 0x01, 0x36, 0xFF, 0x36, 0x00, 0xFE, 0xFF, 0x16, 0x00, 0xA6, 0xFF, + 0xBB, 0x00, 0xE9, 0xFE, 0x38, 0x01, 0x4B, 0xFF, 0x28, 0xFE, 0x3A, 0x48, + 0x04, 0x0A, 0x2E, 0xFA, 0xDF, 0x03, 0x8A, 0xFD, 0x60, 0x01, 0x65, 0xFF, + 0x27, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x2E, 0x00, 0x50, 0xFF, 0x98, 0x01, + 0x0D, 0xFD, 0xE0, 0x04, 0x14, 0xF8, 0xC3, 0x0F, 0x89, 0x46, 0x4C, 0xFA, + 0x38, 0x01, 0x25, 0x00, 0x7D, 0xFF, 0x73, 0x00, 0xC2, 0xFF, 0x0F, 0x00, + 0xFD, 0xFF, 0x35, 0x00, 0x3A, 0xFF, 0xE3, 0x01, 0x31, 0xFC, 0x0F, 0x07, + 0x84, 0xF2, 0x29, 0x25, 0x1A, 0x3A, 0x67, 0xF2, 0xF6, 0x05, 0x41, 0xFD, + 0x24, 0x01, 0xA1, 0xFF, 0x12, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x15, 0x00, + 0x97, 0xFF, 0x37, 0x01, 0x22, 0xFD, 0x23, 0x06, 0x2F, 0xF2, 0x11, 0x39, + 0x7B, 0x26, 0x50, 0xF2, 0x1B, 0x07, 0x32, 0xFC, 0xE1, 0x01, 0x3C, 0xFF, + 0x35, 0x00, 0xFD, 0xFF, 0x0E, 0x00, 0xC8, 0xFF, 0x64, 0x00, 0x9B, 0xFF, + 0xEE, 0xFF, 0x98, 0x01, 0x93, 0xF9, 0x10, 0x46, 0x03, 0x11, 0xA7, 0xF7, + 0x12, 0x05, 0xF6, 0xFC, 0xA2, 0x01, 0x4C, 0xFF, 0x2F, 0x00, 0xFF, 0xFF, + 0x00, 0x00, 0x26, 0x00, 0x6A, 0xFF, 0x53, 0x01, 0xA6, 0xFD, 0xA6, 0x03, + 0xA1, 0xFA, 0xDE, 0x08, 0x76, 0x48, 0x0C, 0xFF, 0xDE, 0xFE, 0x73, 0x01, + 0xC9, 0xFE, 0xCA, 0x00, 0xA0, 0xFF, 0x17, 0x00, 0xFE, 0xFF, 0x36, 0x00, + 0x36, 0xFF, 0xE1, 0x01, 0x52, 0xFC, 0x93, 0x06, 0x10, 0xF4, 0x78, 0x1D, + 0x90, 0x3F, 0x3E, 0xF4, 0xAA, 0x04, 0x19, 0xFE, 0xA4, 0x00, 0xE2, 0xFF, + 0xFA, 0xFF, 0x03, 0x00, 0xFD, 0xFF, 0x26, 0x00, 0x68, 0xFF, 0x93, 0x01, + 0x92, 0xFC, 0xE2, 0x06, 0x83, 0xF1, 0x8C, 0x32, 0xED, 0x2D, 0x90, 0xF1, + 0x1E, 0x07, 0x57, 0xFC, 0xBD, 0x01, 0x51, 0xFF, 0x2E, 0x00, 0xFD, 0xFF, + 0x07, 0x00, 0xE8, 0xFF, 0x12, 0x00, 0x42, 0x00, 0xC4, 0xFE, 0x94, 0x03, + 0x02, 0xF6, 0x89, 0x42, 0x76, 0x18, 0x5C, 0xF5, 0x12, 0x06, 0x84, 0xFC, + 0xD1, 0x01, 0x3B, 0xFF, 0x34, 0x00, 0xFE, 0xFF, 0x1D, 0x00, 0x8A, 0xFF, + 0x03, 0x01, 0x53, 0xFE, 0x53, 0x02, 0x39, 0xFD, 0xA9, 0x02, 0xF2, 0x48, + 0xB9, 0x04, 0x54, 0xFC, 0xCA, 0x02, 0x16, 0xFE, 0x20, 0x01, 0x7F, 0xFF, + 0x20, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x33, 0x00, 0x40, 0xFF, 0xC3, 0x01, + 0xA7, 0xFC, 0xC0, 0x05, 0x1E, 0xF6, 0xD8, 0x15, 0xE7, 0x43, 0x20, 0xF7, + 0xEF, 0x02, 0x27, 0xFF, 0x0A, 0x00, 0x2E, 0x00, 0xDD, 0xFF, 0x09, 0x00, + 0xFD, 0xFF, 0x31, 0x00, 0x48, 0xFF, 0xCD, 0x01, 0x43, 0xFC, 0x2A, 0x07, + 0xBC, 0xF1, 0x64, 0x2B, 0xE3, 0x34, 0xA3, 0xF1, 0xAE, 0x06, 0xBD, 0xFC, + 0x77, 0x01, 0x77, 0xFF, 0x21, 0x00, 0xFE, 0xFF, 0x02, 0x00, 0x03, 0x00, + 0xCA, 0xFF, 0xD4, 0x00, 0xC8, 0xFD, 0x2A, 0x05, 0x7D, 0xF3, 0xCA, 0x3D, + 0x22, 0x20, 0x76, 0xF3, 0xC8, 0x06, 0x41, 0xFC, 0xE6, 0x01, 0x36, 0xFF, + 0x36, 0x00, 0xFD, 0xFF, 0x14, 0x00, 0xAC, 0xFF, 0xAC, 0x00, 0x08, 0xFF, + 0xFD, 0x00, 0xB5, 0xFF, 0x4B, 0xFD, 0xF4, 0x47, 0x30, 0x0B, 0xBC, 0xF9, + 0x17, 0x04, 0x6E, 0xFD, 0x6D, 0x01, 0x60, 0xFF, 0x29, 0x00, 0x00, 0x00, + 0xFF, 0xFF, 0x2C, 0x00, 0x54, 0xFF, 0x8D, 0x01, 0x26, 0xFD, 0xAD, 0x04, + 0x82, 0xF8, 0x87, 0x0E, 0xF9, 0x46, 0x0C, 0xFB, 0xD4, 0x00, 0x5D, 0x00, + 0x5E, 0xFF, 0x82, 0x00, 0xBD, 0xFF, 0x10, 0x00, 0xFD, 0xFF, 0x36, 0x00, + 0x38, 0xFF, 0xE5, 0x01, 0x33, 0xFC, 0x01, 0x07, 0xBE, 0xF2, 0xD6, 0x23, + 0x1F, 0x3B, 0xA5, 0xF2, 0xC5, 0x05, 0x62, 0xFD, 0x10, 0x01, 0xAB, 0xFF, + 0x0E, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x19, 0x00, 0x8E, 0xFF, 0x49, 0x01, + 0x04, 0xFD, 0x4D, 0x06, 0x00, 0xF2, 0xFE, 0x37, 0xCB, 0x27, 0x21, 0xF2, + 0x23, 0x07, 0x34, 0xFC, 0xDD, 0x01, 0x3F, 0xFF, 0x34, 0x00, 0xFD, 0xFF, + 0x0C, 0x00, 0xCE, 0xFF, 0x56, 0x00, 0xB9, 0xFF, 0xB8, 0xFF, 0xF7, 0x01, + 0xE2, 0xF8, 0x8D, 0x45, 0x46, 0x12, 0x3C, 0xF7, 0x43, 0x05, 0xDF, 0xFC, + 0xAC, 0x01, 0x48, 0xFF, 0x30, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x24, 0x00, + 0x70, 0xFF, 0x46, 0x01, 0xC3, 0xFD, 0x6D, 0x03, 0x14, 0xFB, 0xBE, 0x07, + 0xA6, 0x48, 0xF8, 0xFF, 0x70, 0xFE, 0xAE, 0x01, 0xAA, 0xFE, 0xD9, 0x00, + 0x9A, 0xFF, 0x19, 0x00, 0xFE, 0xFF, 0x36, 0x00, 0x37, 0xFF, 0xDE, 0x01, + 0x5D, 0xFC, 0x74, 0x06, 0x63, 0xF4, 0x23, 0x1C, 0x66, 0x40, 0xAA, 0xF4, + 0x65, 0x04, 0x44, 0xFE, 0x8B, 0x00, 0xEE, 0xFF, 0xF5, 0xFF, 0x04, 0x00, + 0xFD, 0xFF, 0x29, 0x00, 0x61, 0xFF, 0x9F, 0x01, 0x80, 0xFC, 0xF7, 0x06, + 0x7D, 0xF1, 0x5A, 0x31, 0x2C, 0x2F, 0x83, 0xF1, 0x13, 0x07, 0x64, 0xFC, + 0xB3, 0x01, 0x57, 0xFF, 0x2C, 0x00, 0xFD, 0xFF, 0x06, 0x00, 0xED, 0xFF, + 0x05, 0x00, 0x5D, 0x00, 0x95, 0xFE, 0xE2, 0x03, 0x7F, 0xF5, 0xCC, 0x41, + 0xC7, 0x19, 0xFF, 0xF4, 0x37, 0x06, 0x75, 0xFC, 0xD6, 0x01, 0x39, 0xFF, + 0x35, 0x00, 0xFE, 0xFF, 0x1B, 0x00, 0x90, 0xFF, 0xF4, 0x00, 0x72, 0xFE, + 0x18, 0x02, 0xAA, 0xFD, 0xAB, 0x01, 0xDF, 0x48, 0xCA, 0x05, 0xE1, 0xFB, + 0x05, 0x03, 0xF7, 0xFD, 0x2E, 0x01, 0x79, 0xFF, 0x21, 0x00, 0x00, 0x00, + 0xFF, 0xFF, 0x32, 0x00, 0x43, 0xFF, 0xBB, 0x01, 0xBA, 0xFC, 0x95, 0x05, + 0x83, 0xF6, 0x8C, 0x14, 0x87, 0x44, 0xBB, 0xF7, 0x98, 0x02, 0x5A, 0xFF, + 0xEE, 0xFF, 0x3C, 0x00, 0xD8, 0xFF, 0x0A, 0x00, 0xFD, 0xFF, 0x32, 0x00, + 0x44, 0xFF, 0xD3, 0x01, 0x3C, 0xFC, 0x2A, 0x07, 0xDC, 0xF1, 0x1A, 0x2A, + 0x06, 0x36, 0xBE, 0xF1, 0x8E, 0x06, 0xD5, 0xFC, 0x67, 0x01, 0x7F, 0xFF, + 0x1E, 0x00, 0xFE, 0xFF, 0x01, 0x00, 0x07, 0x00, 0xBE, 0xFF, 0xEA, 0x00, + 0xA2, 0xFD, 0x65, 0x05, 0x28, 0xF3, 0xDB, 0x3C, 0x78, 0x21, 0x30, 0xF3, + 0xDF, 0x06, 0x3A, 0xFC, 0xE6, 0x01, 0x37, 0xFF, 0x36, 0x00, 0xFD, 0xFF, + 0x13, 0x00, 0xB2, 0xFF, 0x9D, 0x00, 0x27, 0xFF, 0xC3, 0x00, 0x1F, 0x00, + 0x76, 0xFC, 0xA3, 0x47, 0x60, 0x0C, 0x4A, 0xF9, 0x4E, 0x04, 0x53, 0xFD, + 0x79, 0x01, 0x5C, 0xFF, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2B, 0x00, + 0x58, 0xFF, 0x82, 0x01, 0x3F, 0xFD, 0x78, 0x04, 0xF2, 0xF8, 0x50, 0x0D, + 0x5E, 0x47, 0xD5, 0xFB, 0x6F, 0x00, 0x96, 0x00, 0x40, 0xFF, 0x91, 0x00, + 0xB7, 0xFF, 0x12, 0x00, 0xFD, 0xFF, 0x36, 0x00, 0x37, 0xFF, 0xE6, 0x01, + 0x36, 0xFC, 0xEF, 0x06, 0xFC, 0xF2, 0x81, 0x22, 0x1C, 0x3C, 0xEC, 0xF2, + 0x90, 0x05, 0x85, 0xFD, 0xFB, 0x00, 0xB6, 0xFF, 0x0A, 0x00, 0x01, 0x00, + 0xFE, 0xFF, 0x1C, 0x00, 0x85, 0xFF, 0x5B, 0x01, 0xE9, 0xFC, 0x73, 0x06, + 0xD8, 0xF1, 0xE5, 0x36, 0x19, 0x29, 0xF8, 0xF1, 0x29, 0x07, 0x37, 0xFC, + 0xD8, 0x01, 0x42, 0xFF, 0x33, 0x00, 0xFD, 0xFF, 0x0B, 0x00, 0xD3, 0xFF, + 0x47, 0x00, 0xD7, 0xFF, 0x82, 0xFF, 0x53, 0x02, 0x39, 0xF8, 0xFD, 0x44, + 0x8D, 0x13, 0xD3, 0xF6, 0x72, 0x05, 0xCA, 0xFC, 0xB5, 0x01, 0x45, 0xFF, + 0x31, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x23, 0x00, 0x75, 0xFF, 0x39, 0x01, + 0xE0, 0xFD, 0x33, 0x03, 0x87, 0xFB, 0xA2, 0x06, 0xCB, 0x48, 0xEA, 0x00, + 0x01, 0xFE, 0xE9, 0x01, 0x8A, 0xFE, 0xE8, 0x00, 0x95, 0xFF, 0x1A, 0x00, + 0xFE, 0xFF, 0x35, 0x00, 0x38, 0xFF, 0xDA, 0x01, 0x6A, 0xFC, 0x53, 0x06, + 0xBA, 0xF4, 0xCE, 0x1A, 0x32, 0x41, 0x1F, 0xF5, 0x1D, 0x04, 0x71, 0xFE, + 0x71, 0x00, 0xFB, 0xFF, 0xF0, 0xFF, 0x05, 0x00, 0xFD, 0xFF, 0x2B, 0x00, + 0x5B, 0xFF, 0xAB, 0x01, 0x6F, 0xFC, 0x08, 0x07, 0x7E, 0xF1, 0x21, 0x30, + 0x67, 0x30, 0x7D, 0xF1, 0x05, 0x07, 0x73, 0xFC, 0xA8, 0x01, 0x5C, 0xFF, + 0x2A, 0x00, 0xFD, 0xFF, 0x05, 0x00, 0xF2, 0xFF, 0xF8, 0xFF, 0x77, 0x00, + 0x67, 0xFE, 0x2D, 0x04, 0x04, 0xF5, 0x07, 0x41, 0x1B, 0x1B, 0xA6, 0xF4, + 0x5A, 0x06, 0x67, 0xFC, 0xDB, 0x01, 0x38, 0xFF, 0x36, 0x00, 0xFE, 0xFF, + 0x1A, 0x00, 0x96, 0xFF, 0xE5, 0x00, 0x91, 0xFE, 0xDC, 0x01, 0x1A, 0xFE, + 0xB3, 0x00, 0xC3, 0x48, 0xE1, 0x06, 0x6E, 0xFB, 0x40, 0x03, 0xDA, 0xFD, + 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0xCE, 0x1B, 0xB8, 0xF3, 0x3B, 0x06, 0x45, 0xFD, 0xD4, 0x00, 0xF2, 0xFF, + 0xEF, 0xFF, 0x01, 0x00, 0x11, 0x00, 0x8A, 0xFF, 0x55, 0x01, 0x75, 0xFD, + 0x92, 0x03, 0x97, 0xFC, 0x69, 0xFF, 0xF2, 0x40, 0xC8, 0x14, 0x13, 0xF5, + 0x2D, 0x06, 0xF8, 0xFC, 0x1E, 0x01, 0xC8, 0xFF, 0xFC, 0xFF, 0x00, 0x00, + 0x0F, 0x00, 0x8F, 0xFF, 0x64, 0x01, 0x1D, 0xFD, 0x97, 0x04, 0x43, 0xFA, + 0xA1, 0x04, 0xA5, 0x42, 0x08, 0x0E, 0xE6, 0xF6, 0xC4, 0x05, 0xE1, 0xFC, + 0x4D, 0x01, 0xA9, 0xFF, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, + 0x9D, 0xFF, 0x5C, 0x01, 0xEA, 0xFC, 0x6C, 0x05, 0x05, 0xF8, 0x94, 0x0A, + 0x03, 0x43, 0xC1, 0x07, 0x09, 0xF9, 0x10, 0x05, 0xFC, 0xFC, 0x62, 0x01, + 0x95, 0xFF, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x00, 0xB6, 0xFF, 0x3B, 0x01, + 0xE5, 0xFC, 0xFF, 0x05, 0x02, 0xF6, 0x19, 0x11, 0x06, 0x42, 0x1F, 0x02, + 0x56, 0xFB, 0x23, 0x04, 0x41, 0xFD, 0x5F, 0x01, 0x8B, 0xFF, 0x10, 0x00, + 0x01, 0x00, 0xF6, 0xFF, 0xDA, 0xFF, 0xFF, 0x00, 0x15, 0xFD, 0x40, 0x06, + 0x62, 0xF4, 0x01, 0x18, 0xBB, 0x3F, 0x47, 0xFD, 0xA8, 0xFD, 0x10, 0x03, + 0xA9, 0xFD, 0x47, 0x01, 0x8C, 0xFF, 0x11, 0x00, 0x02, 0x00, 0xE7, 0xFF, + 0x08, 0x00, 0xA9, 0x00, 0x7B, 0xFD, 0x20, 0x06, 0x4B, 0xF3, 0x13, 0x1F, + 0x36, 0x3C, 0x52, 0xF9, 0xDD, 0xFF, 0xEB, 0x01, 0x28, 0xFE, 0x1F, 0x01, + 0x93, 0xFF, 0x0F, 0x00, 0x04, 0x00, 0xD6, 0xFF, 0x3F, 0x00, 0x3C, 0x00, + 0x16, 0xFE, 0x98, 0x05, 0xE0, 0xF2, 0x16, 0x26, 0x99, 0x37, 0x4F, 0xF6, + 0xD9, 0x01, 0xC6, 0x00, 0xB5, 0xFE, 0xEA, 0x00, 0xA1, 0xFF, 0x0D, 0x00, + 0x07, 0x00, 0xC3, 0xFF, 0x7A, 0x00, 0xBC, 0xFF, 0xE4, 0xFE, 0xA5, 0x04, + 0x41, 0xF3, 0xCA, 0x2C, 0x0E, 0x32, 0x42, 0xF4, 0x85, 0x03, 0xB4, 0xFF, + 0x46, 0xFF, 0xAE, 0x00, 0xB3, 0xFF, 0x09, 0x00, 0x0A, 0x00, 0xB0, 0xFF, + 0xB8, 0x00, 0x30, 0xFF, 0xDC, 0xFF, 0x49, 0x03, 0x83, 0xF4, 0xF5, 0x32, + 0xC9, 0x2B, 0x23, 0xF3, 0xD1, 0x04, 0xC2, 0xFE, 0xD1, 0xFF, 0x71, 0x00, + 0xC6, 0xFF, 0x06, 0x00, 0x0D, 0x00, 0x9F, 0xFF, 0xF3, 0x00, 0x9F, 0xFE, + 0xF3, 0x00, 0x90, 0x01, 0xB6, 0xF6, 0x5F, 0x38, 0x04, 0x25, 0xE4, 0xF2, + 0xB4, 0x05, 0xFB, 0xFD, 0x4E, 0x00, 0x36, 0x00, 0xD9, 0xFF, 0x04, 0x00, + 0x0F, 0x00, 0x92, 0xFF, 0x26, 0x01, 0x13, 0xFE, 0x18, 0x02, 0x89, 0xFF, + 0xDF, 0xF9, 0xD3, 0x3C, 0xFC, 0x1D, 0x6B, 0xF3, 0x2C, 0x06, 0x67, 0xFD, + 0xB8, 0x00, 0x00, 0x00, 0xEA, 0xFF, 0x02, 0x00, 0x11, 0x00, 0x8B, 0xFF, + 0x4C, 0x01, 0x97, 0xFD, 0x3C, 0x03, 0x4D, 0xFD, 0xF8, 0xFD, 0x2A, 0x40, + 0xED, 0x16, 0x9A, 0xF4, 0x3C, 0x06, 0x0A, 0xFD, 0x0A, 0x01, 0xD4, 0xFF, + 0xF8, 0xFF, 0x01, 0x00, 0x10, 0x00, 0x8C, 0xFF, 0x61, 0x01, 0x34, 0xFD, + 0x4B, 0x04, 0xFA, 0xFA, 0xF1, 0x02, 0x42, 0x42, 0x11, 0x10, 0x4C, 0xF6, + 0xED, 0x05, 0xE3, 0xFC, 0x41, 0x01, 0xB1, 0xFF, 0x03, 0x00, 0x00, 0x00, + 0x0C, 0x00, 0x97, 0xFF, 0x61, 0x01, 0xF5, 0xFC, 0x30, 0x05, 0xB1, 0xF8, + 0xAE, 0x08, 0x0A, 0x43, 0x9F, 0x09, 0x5A, 0xF8, 0x4F, 0x05, 0xEF, 0xFC, + 0x5F, 0x01, 0x9A, 0xFF, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, + 0xAD, 0xFF, 0x48, 0x01, 0xE2, 0xFC, 0xDA, 0x05, 0x97, 0xF6, 0x0B, 0x0F, + 0x79, 0x42, 0xC7, 0x03, 0x9E, 0xFA, 0x71, 0x04, 0x28, 0xFD, 0x63, 0x01, + 0x8D, 0xFF, 0x0F, 0x00 }; -static u_int16_t -coefficientSizes[] = { - /* Playback */ - 0x00C0, 0x5000, 0x0060, 0x2800, 0x0040, 0x0060, 0x1400, 0x0000, - /* Record */ - 0x0020, 0x1260, 0x0020, 0x1260, 0x0000, 0x0040, 0x1260, 0x0000, +static u_int16_t coefficientSizes[] = { + /* Playback */ + 0x00C0, + 0x5000, + 0x0060, + 0x2800, + 0x0040, + 0x0060, + 0x1400, + 0x0000, + /* Record */ + 0x0020, + 0x1260, + 0x0020, + 0x1260, + 0x0000, + 0x0040, + 0x1260, + 0x0000, }; Index: sys/dev/sound/pci/neomagic.h =================================================================== --- sys/dev/sound/pci/neomagic.h +++ sys/dev/sound/pci/neomagic.h @@ -44,7 +44,7 @@ /* The base offset for the AC97 test */ #define NM_MIXER_PRESENCE 0xa06 -#define NM_PRESENCE_MASK 0x050 +#define NM_PRESENCE_MASK 0x050 #define NM_PRESENCE_VALUE 0x040 /* The maximum size of a coefficient entry. */ @@ -106,12 +106,12 @@ #define NM_RECORD_FREERUN 2 #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4) -#define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10) +#define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10) #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc) #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8) #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4) -#define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14) +#define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14) #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc) #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8) Index: sys/dev/sound/pci/neomagic.c =================================================================== --- sys/dev/sound/pci/neomagic.c +++ sys/dev/sound/pci/neomagic.c @@ -32,20 +32,19 @@ #include "opt_snd.h" #endif -#include -#include -#include -#include - #include #include +#include +#include +#include +#include /* -------------------------------------------------------------------- */ -#define NM_BUFFSIZE 16384 +#define NM_BUFFSIZE 16384 -#define NM256AV_PCI_ID 0x800510c8 -#define NM256ZX_PCI_ID 0x800610c8 +#define NM256AV_PCI_ID 0x800510c8 +#define NM256ZX_PCI_ID 0x800610c8 struct sc_info; @@ -60,17 +59,17 @@ /* device private data */ struct sc_info { - device_t dev; - u_int32_t type; + device_t dev; + u_int32_t type; struct resource *reg, *irq, *buf; - int regid, irqid, bufid; - void *ih; + int regid, irqid, bufid; + void *ih; - u_int32_t ac97_base, ac97_status, ac97_busy; - u_int32_t buftop, pbuf, rbuf, cbuf, acbuf; - u_int32_t playint, recint, misc1int, misc2int; - u_int32_t irsz, badintr; + u_int32_t ac97_base, ac97_status, ac97_busy; + u_int32_t buftop, pbuf, rbuf, cbuf, acbuf; + u_int32_t playint, recint, misc1int, misc2int; + u_int32_t irsz, badintr; struct sc_chinfo pch, rch; }; @@ -82,16 +81,16 @@ */ /* stuff */ -static int nm_loadcoeff(struct sc_info *sc, int dir, int num); -static int nm_setch(struct sc_chinfo *ch); -static int nm_init(struct sc_info *); -static void nm_intr(void *); +static int nm_loadcoeff(struct sc_info *sc, int dir, int num); +static int nm_setch(struct sc_chinfo *ch); +static int nm_init(struct sc_info *); +static void nm_intr(void *); /* talk to the card */ static u_int32_t nm_rd(struct sc_info *, int, int); -static void nm_wr(struct sc_info *, int, u_int32_t, int); +static void nm_wr(struct sc_info *, int, u_int32_t, int); static u_int32_t nm_rdbuf(struct sc_info *, int, int); -static void nm_wrbuf(struct sc_info *, int, u_int32_t, int); +static void nm_wrbuf(struct sc_info *, int, u_int32_t, int); static u_int32_t badcards[] = { 0x0007103c, @@ -102,28 +101,15 @@ #define NUM_BADCARDS (sizeof(badcards) / sizeof(u_int32_t)) /* The actual rates supported by the card. */ -static int samplerates[9] = { - 8000, - 11025, - 16000, - 22050, - 24000, - 32000, - 44100, - 48000, - 99999999 -}; +static int samplerates[9] = { 8000, 11025, 16000, 22050, 24000, 32000, 44100, + 48000, 99999999 }; /* -------------------------------------------------------------------- */ -static u_int32_t nm_fmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps nm_caps = {4000, 48000, nm_fmt, 0}; +static u_int32_t nm_fmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; +static struct pcmchan_caps nm_caps = { 4000, 48000, nm_fmt, 0 }; /* -------------------------------------------------------------------- */ @@ -277,12 +263,9 @@ return -1; } -static kobj_method_t nm_ac97_methods[] = { - KOBJMETHOD(ac97_init, nm_initcd), - KOBJMETHOD(ac97_read, nm_rdcd), - KOBJMETHOD(ac97_write, nm_wrcd), - KOBJMETHOD_END -}; +static kobj_method_t nm_ac97_methods[] = { KOBJMETHOD(ac97_init, nm_initcd), + KOBJMETHOD(ac97_read, nm_rdcd), KOBJMETHOD(ac97_write, nm_wrcd), + KOBJMETHOD_END }; AC97_DECLARE(nm_ac97); /* -------------------------------------------------------------------- */ @@ -303,13 +286,13 @@ int ofs, sz, i; u_int32_t addr; - addr = (dir == PCMDIR_PLAY)? 0x01c : 0x21c; + addr = (dir == PCMDIR_PLAY) ? 0x01c : 0x21c; if (dir == PCMDIR_REC) num += 8; sz = coefficientSizes[num]; ofs = 0; while (num-- > 0) - ofs+= coefficientSizes[num]; + ofs += coefficientSizes[num]; for (i = 0; i < sz; i++) nm_wrbuf(sc, sc->cbuf + i, coefficients[ofs + i], 1); nm_wr(sc, addr, sc->cbuf, 4); @@ -330,39 +313,46 @@ if (ch->spd < (samplerates[x] + samplerates[x + 1]) / 2) break; - if (x == 8) return 1; + if (x == 8) + return 1; ch->spd = samplerates[x]; nm_loadcoeff(sc, ch->dir, x); x <<= 4; x &= NM_RATE_MASK; - if (ch->fmt & AFMT_16BIT) x |= NM_RATE_BITS_16; - if (AFMT_CHANNEL(ch->fmt) > 1) x |= NM_RATE_STEREO; + if (ch->fmt & AFMT_16BIT) + x |= NM_RATE_BITS_16; + if (AFMT_CHANNEL(ch->fmt) > 1) + x |= NM_RATE_STEREO; - base = (ch->dir == PCMDIR_PLAY)? NM_PLAYBACK_REG_OFFSET : NM_RECORD_REG_OFFSET; + base = (ch->dir == PCMDIR_PLAY) ? NM_PLAYBACK_REG_OFFSET : + NM_RECORD_REG_OFFSET; nm_wr(sc, base + NM_RATE_REG_OFFSET, x, 1); return 0; } /* channel interface */ static void * -nmchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +nmchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { struct sc_info *sc = devinfo; struct sc_chinfo *ch; u_int32_t chnbuf; - chnbuf = (dir == PCMDIR_PLAY)? sc->pbuf : sc->rbuf; - ch = (dir == PCMDIR_PLAY)? &sc->pch : &sc->rch; + chnbuf = (dir == PCMDIR_PLAY) ? sc->pbuf : sc->rbuf; + ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch; ch->active = 0; ch->blksize = 0; ch->wmark = 0; ch->buffer = b; - sndbuf_setup(ch->buffer, (u_int8_t *)rman_get_virtual(sc->buf) + chnbuf, NM_BUFFSIZE); + sndbuf_setup(ch->buffer, (u_int8_t *)rman_get_virtual(sc->buf) + chnbuf, + NM_BUFFSIZE); if (bootverbose) - device_printf(sc->dev, "%s buf %p\n", (dir == PCMDIR_PLAY)? - "play" : "rec", sndbuf_getbuf(ch->buffer)); + device_printf(sc->dev, "%s buf %p\n", + (dir == PCMDIR_PLAY) ? "play" : "rec", + sndbuf_getbuf(ch->buffer)); ch->parent = sc; ch->channel = c; ch->dir = dir; @@ -390,7 +380,7 @@ struct sc_chinfo *ch = data; ch->spd = speed; - return nm_setch(ch)? 0 : ch->spd; + return nm_setch(ch) ? 0 : ch->spd; } static u_int32_t @@ -413,7 +403,7 @@ if (!PCMTRIG_COMMON(go)) return 0; - ssz = (ch->fmt & AFMT_16BIT)? 2 : 1; + ssz = (ch->fmt & AFMT_16BIT) ? 2 : 1; if (AFMT_CHANNEL(ch->fmt) > 1) ssz <<= 1; @@ -422,11 +412,12 @@ ch->active = 1; ch->wmark = ch->blksize; nm_wr(sc, NM_PBUFFER_START, sc->pbuf, 4); - nm_wr(sc, NM_PBUFFER_END, sc->pbuf + NM_BUFFSIZE - ssz, 4); + nm_wr(sc, NM_PBUFFER_END, sc->pbuf + NM_BUFFSIZE - ssz, + 4); nm_wr(sc, NM_PBUFFER_CURRP, sc->pbuf, 4); nm_wr(sc, NM_PBUFFER_WMARK, sc->pbuf + ch->wmark, 4); - nm_wr(sc, NM_PLAYBACK_ENABLE_REG, NM_PLAYBACK_FREERUN | - NM_PLAYBACK_ENABLE_FLAG, 1); + nm_wr(sc, NM_PLAYBACK_ENABLE_REG, + NM_PLAYBACK_FREERUN | NM_PLAYBACK_ENABLE_FLAG, 1); nm_wr(sc, NM_AUDIO_MUTE_REG, 0, 2); } else { ch->active = 0; @@ -437,8 +428,8 @@ if (go == PCMTRIG_START) { ch->active = 1; ch->wmark = ch->blksize; - nm_wr(sc, NM_RECORD_ENABLE_REG, NM_RECORD_FREERUN | - NM_RECORD_ENABLE_FLAG, 1); + nm_wr(sc, NM_RECORD_ENABLE_REG, + NM_RECORD_FREERUN | NM_RECORD_ENABLE_FLAG, 1); nm_wr(sc, NM_RBUFFER_START, sc->rbuf, 4); nm_wr(sc, NM_RBUFFER_END, sc->rbuf + NM_BUFFSIZE, 4); nm_wr(sc, NM_RBUFFER_CURRP, sc->rbuf, 4); @@ -469,17 +460,14 @@ return &nm_caps; } -static kobj_method_t nmchan_methods[] = { - KOBJMETHOD(channel_init, nmchan_init), - KOBJMETHOD(channel_free, nmchan_free), - KOBJMETHOD(channel_setformat, nmchan_setformat), - KOBJMETHOD(channel_setspeed, nmchan_setspeed), - KOBJMETHOD(channel_setblocksize, nmchan_setblocksize), - KOBJMETHOD(channel_trigger, nmchan_trigger), - KOBJMETHOD(channel_getptr, nmchan_getptr), - KOBJMETHOD(channel_getcaps, nmchan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t nmchan_methods[] = { KOBJMETHOD(channel_init, nmchan_init), + KOBJMETHOD(channel_free, nmchan_free), + KOBJMETHOD(channel_setformat, nmchan_setformat), + KOBJMETHOD(channel_setspeed, nmchan_setspeed), + KOBJMETHOD(channel_setblocksize, nmchan_setblocksize), + KOBJMETHOD(channel_trigger, nmchan_trigger), + KOBJMETHOD(channel_getptr, nmchan_getptr), + KOBJMETHOD(channel_getcaps, nmchan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(nmchan); /* The interrupt handler */ @@ -559,14 +547,15 @@ sc->ac97_status = NM2_MIXER_STATUS_OFFSET; sc->ac97_busy = NM2_MIXER_READY_MASK; - sc->buftop = (nm_rd(sc, 0xa0b, 2)? 6144 : 4096) * 1024; + sc->buftop = (nm_rd(sc, 0xa0b, 2) ? 6144 : 4096) * 1024; sc->irsz = 4; sc->playint = NM2_PLAYBACK_INT; sc->recint = NM2_RECORD_INT; sc->misc1int = NM2_MISC_INT_1; sc->misc2int = NM2_MISC_INT_2; - } else return -1; + } else + return -1; sc->badintr = 0; ofs = sc->buftop - 0x0400; sc->buftop -= 0x1400; @@ -577,7 +566,8 @@ i = nm_rdbuf(sc, ofs + 4, 4); if (i != 0 && i != 0xffffffff) { if (bootverbose) - device_printf(sc->dev, "buftop is changed to 0x%08x\n", i); + device_printf(sc->dev, + "buftop is changed to 0x%08x\n", i); sc->buftop = i; } } @@ -611,18 +601,19 @@ /* Try to catch other non-ac97 cards */ if (i == NUM_BADCARDS) { - if (!(sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT | M_ZERO))) { + if (!(sc = malloc(sizeof(*sc), M_DEVBUF, + M_NOWAIT | M_ZERO))) { device_printf(dev, "cannot allocate softc\n"); return ENXIO; } sc->regid = PCIR_BAR(1); sc->reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->regid, - RF_ACTIVE); + &sc->regid, RF_ACTIVE); if (!sc->reg) { - device_printf(dev, "unable to map register space\n"); + device_printf(dev, + "unable to map register space\n"); free(sc, M_DEVBUF); return ENXIO; } @@ -635,19 +626,20 @@ nm_wr(sc, 0, 0x11, 1); /* reset device */ if ((nm_rd(sc, NM_MIXER_PRESENCE, 2) & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) { - i = 0; /* non-ac97 card, but not listed */ - DEB(device_printf(dev, "subdev = 0x%x - badcard?\n", - subdev)); + i = 0; /* non-ac97 card, but not listed */ + DEB(device_printf(dev, + "subdev = 0x%x - badcard?\n", subdev)); } bus_release_resource(dev, SYS_RES_MEMORY, sc->regid, - sc->reg); + sc->reg); free(sc, M_DEVBUF); } if (i == NUM_BADCARDS) s = "NeoMagic 256AV"; DEB(else) - DEB(device_printf(dev, "this is a non-ac97 NM256AV, not attaching\n")); + DEB(device_printf(dev, + "this is a non-ac97 NM256AV, not attaching\n")); break; @@ -656,8 +648,9 @@ break; } - if (s) device_set_desc(dev, s); - return s? 0 : ENXIO; + if (s) + device_set_desc(dev, s); + return s ? 0 : ENXIO; } static int @@ -665,7 +658,7 @@ { struct sc_info *sc; struct ac97_info *codec = NULL; - char status[SND_STATUSLEN]; + char status[SND_STATUSLEN]; sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); sc->dev = dev; @@ -675,10 +668,10 @@ sc->bufid = PCIR_BAR(0); sc->buf = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->bufid, - RF_ACTIVE); + RF_ACTIVE); sc->regid = PCIR_BAR(1); sc->reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->regid, - RF_ACTIVE); + RF_ACTIVE); if (!sc->buf || !sc->reg) { device_printf(dev, "unable to map register space\n"); @@ -691,23 +684,26 @@ } codec = AC97_CREATE(dev, sc, nm_ac97); - if (codec == NULL) goto bad; - if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad; + if (codec == NULL) + goto bad; + if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) + goto bad; sc->irqid = 0; sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, - RF_ACTIVE | RF_SHAREABLE); + RF_ACTIVE | RF_SHAREABLE); if (!sc->irq || snd_setup_intr(dev, sc->irq, 0, nm_intr, sc, &sc->ih)) { device_printf(dev, "unable to map interrupt\n"); goto bad; } snprintf(status, SND_STATUSLEN, "mem 0x%jx,0x%jx irq %jd on %s", - rman_get_start(sc->buf), rman_get_start(sc->reg), - rman_get_start(sc->irq), - device_get_nameunit(device_get_parent(dev))); + rman_get_start(sc->buf), rman_get_start(sc->reg), + rman_get_start(sc->irq), + device_get_nameunit(device_get_parent(dev))); - if (pcm_register(dev, sc, 1, 1)) goto bad; + if (pcm_register(dev, sc, 1, 1)) + goto bad; pcm_addchan(dev, PCMDIR_REC, &nmchan_class, sc); pcm_addchan(dev, PCMDIR_PLAY, &nmchan_class, sc); pcm_setstatus(dev, status); @@ -715,11 +711,16 @@ return 0; bad: - if (codec) ac97_destroy(codec); - if (sc->buf) bus_release_resource(dev, SYS_RES_MEMORY, sc->bufid, sc->buf); - if (sc->reg) bus_release_resource(dev, SYS_RES_MEMORY, sc->regid, sc->reg); - if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); - if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); + if (codec) + ac97_destroy(codec); + if (sc->buf) + bus_release_resource(dev, SYS_RES_MEMORY, sc->bufid, sc->buf); + if (sc->reg) + bus_release_resource(dev, SYS_RES_MEMORY, sc->regid, sc->reg); + if (sc->ih) + bus_teardown_intr(dev, sc->irq, sc->ih); + if (sc->irq) + bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); free(sc, M_DEVBUF); return ENXIO; } @@ -788,26 +789,25 @@ } /* restart playing */ if (sc->pch.active) { - nm_wr(sc, NM_PLAYBACK_ENABLE_REG, NM_PLAYBACK_FREERUN | - NM_PLAYBACK_ENABLE_FLAG, 1); + nm_wr(sc, NM_PLAYBACK_ENABLE_REG, + NM_PLAYBACK_FREERUN | NM_PLAYBACK_ENABLE_FLAG, 1); nm_wr(sc, NM_AUDIO_MUTE_REG, 0, 2); } /* restart recording */ if (sc->rch.active) { - nm_wr(sc, NM_RECORD_ENABLE_REG, NM_RECORD_FREERUN | - NM_RECORD_ENABLE_FLAG, 1); + nm_wr(sc, NM_RECORD_ENABLE_REG, + NM_RECORD_FREERUN | NM_RECORD_ENABLE_FLAG, 1); } return 0; } static device_method_t nm_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, nm_pci_probe), - DEVMETHOD(device_attach, nm_pci_attach), - DEVMETHOD(device_detach, nm_pci_detach), - DEVMETHOD(device_suspend, nm_pci_suspend), - DEVMETHOD(device_resume, nm_pci_resume), - { 0, 0 } + DEVMETHOD(device_probe, nm_pci_probe), + DEVMETHOD(device_attach, nm_pci_attach), + DEVMETHOD(device_detach, nm_pci_detach), + DEVMETHOD(device_suspend, nm_pci_suspend), + DEVMETHOD(device_resume, nm_pci_resume), { 0, 0 } }; static driver_t nm_driver = { Index: sys/dev/sound/pci/solo.c =================================================================== --- sys/dev/sound/pci/solo.c +++ sys/dev/sound/pci/solo.c @@ -29,53 +29,39 @@ #include "opt_snd.h" #endif -#include - #include #include - -#include -#include +#include +#include +#include #include "mixer_if.h" #define SOLO_DEFAULT_BUFSZ 16384 -#define ABS(x) (((x) < 0)? -(x) : (x)) +#define ABS(x) (((x) < 0) ? -(x) : (x)) /* if defined, playback always uses the 2nd channel and full duplex works */ -#define ESS18XX_DUPLEX 1 +#define ESS18XX_DUPLEX 1 /* more accurate clocks and split audio1/audio2 rates */ #define ESS18XX_NEWSPEED -static u_int32_t ess_playfmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S8, 1, 0), - SND_FORMAT(AFMT_S8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - SND_FORMAT(AFMT_U16_LE, 1, 0), - SND_FORMAT(AFMT_U16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps ess_playcaps = {6000, 48000, ess_playfmt, 0}; +static u_int32_t ess_playfmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S8, 1, 0), + SND_FORMAT(AFMT_S8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), SND_FORMAT(AFMT_U16_LE, 1, 0), + SND_FORMAT(AFMT_U16_LE, 2, 0), 0 }; +static struct pcmchan_caps ess_playcaps = { 6000, 48000, ess_playfmt, 0 }; /* * Recording output is byte-swapped */ -static u_int32_t ess_recfmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S8, 1, 0), - SND_FORMAT(AFMT_S8, 2, 0), - SND_FORMAT(AFMT_S16_BE, 1, 0), - SND_FORMAT(AFMT_S16_BE, 2, 0), - SND_FORMAT(AFMT_U16_BE, 1, 0), - SND_FORMAT(AFMT_U16_BE, 2, 0), - 0 -}; -static struct pcmchan_caps ess_reccaps = {6000, 48000, ess_recfmt, 0}; +static u_int32_t ess_recfmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S8, 1, 0), + SND_FORMAT(AFMT_S8, 2, 0), SND_FORMAT(AFMT_S16_BE, 1, 0), + SND_FORMAT(AFMT_S16_BE, 2, 0), SND_FORMAT(AFMT_U16_BE, 1, 0), + SND_FORMAT(AFMT_U16_BE, 2, 0), 0 }; +static struct pcmchan_caps ess_reccaps = { 6000, 48000, ess_recfmt, 0 }; struct ess_info; @@ -88,13 +74,14 @@ }; struct ess_info { - struct resource *io, *sb, *vc, *mpu, *gp; /* I/O address for the board */ + struct resource *io, *sb, *vc, *mpu, + *gp; /* I/O address for the board */ struct resource *irq; - void *ih; + void *ih; bus_dma_tag_t parent_dmat; int simplex_dir, type, dmasz[2]; - unsigned int duplex:1, newspeed:1; + unsigned int duplex : 1, newspeed : 1; unsigned int bufsz; struct ess_chinfo pch, rch; @@ -119,11 +106,13 @@ static int ess_read(struct ess_info *sc, u_char reg); static void ess_intr(void *arg); -static int ess_setupch(struct ess_info *sc, int ch, int dir, int spd, u_int32_t fmt, int len); +static int ess_setupch(struct ess_info *sc, int ch, int dir, int spd, + u_int32_t fmt, int len); static int ess_start(struct ess_chinfo *ch); static int ess_stop(struct ess_chinfo *ch); -static int ess_dmasetup(struct ess_info *sc, int ch, u_int32_t base, u_int16_t cnt, int dir); +static int ess_dmasetup(struct ess_info *sc, int ch, u_int32_t base, + u_int16_t cnt, int dir); static int ess_dmapos(struct ess_info *sc, int ch); static int ess_dmatrigger(struct ess_info *sc, int ch, int go); @@ -197,14 +186,15 @@ static int ess_dspwr(struct ess_info *sc, u_char val) { - int i; + int i; for (i = 0; i < 1000; i++) { if (ess_dspready(sc)) { ess_wr(sc, SBDSP_CMD, val); return 1; } - if (i > 10) DELAY((i > 100)? 1000 : 10); + if (i > 10) + DELAY((i > 100) ? 1000 : 10); } printf("ess_dspwr(0x%02x) timed out.\n", val); return 0; @@ -223,16 +213,17 @@ DEB(printf("ess_cmd1: %x, %x\n", cmd, val)); if (ess_dspwr(sc, cmd)) { return ess_dspwr(sc, val & 0xff); - } else return 0; + } else + return 0; } static void ess_setmixer(struct ess_info *sc, u_int port, u_int value) { DEB(printf("ess_setmixer: reg=%x, val=%x\n", port, value);) - ess_wr(sc, SB_MIX_ADDR, (u_char) (port & 0xff)); /* Select register */ + ess_wr(sc, SB_MIX_ADDR, (u_char)(port & 0xff)); /* Select register */ DELAY(10); - ess_wr(sc, SB_MIX_DATA, (u_char) (value & 0xff)); + ess_wr(sc, SB_MIX_DATA, (u_char)(value & 0xff)); DELAY(10); } @@ -241,7 +232,7 @@ { int val; - ess_wr(sc, SB_MIX_ADDR, (u_char) (port & 0xff)); /* Select register */ + ess_wr(sc, SB_MIX_ADDR, (u_char)(port & 0xff)); /* Select register */ DELAY(10); val = ess_rd(sc, SB_MIX_DATA); DELAY(10); @@ -272,7 +263,7 @@ static int ess_read(struct ess_info *sc, u_char reg) { - return (ess_cmd(sc, 0xc0) && ess_cmd(sc, reg))? ess_get_byte(sc) : -1; + return (ess_cmd(sc, 0xc0) && ess_cmd(sc, reg)) ? ess_get_byte(sc) : -1; } static int @@ -284,10 +275,10 @@ ess_wr(sc, SBDSP_RST, 0); if (ess_get_byte(sc) != 0xAA) { DEB(printf("ess_reset_dsp failed\n")); -/* - rman_get_start(d->io_base))); -*/ - return ENXIO; /* Sorry */ + /* + rman_get_start(d->io_base))); + */ + return ENXIO; /* Sorry */ } ess_cmd(sc, 0xc6); return 0; @@ -312,8 +303,8 @@ } if (sc->duplex) { - pirq = (src & sc->pch.hwch)? 1 : 0; - rirq = (src & sc->rch.hwch)? 1 : 0; + pirq = (src & sc->pch.hwch) ? 1 : 0; + rirq = (src & sc->rch.hwch) ? 1 : 0; } else { if (sc->simplex_dir == PCMDIR_PLAY) pirq = 1; @@ -323,7 +314,7 @@ printf("solo: IRQ neither playback nor rec!\n"); } - DEB(printf("ess_intr: pirq:%d rirq:%d\n",pirq,rirq)); + DEB(printf("ess_intr: pirq:%d rirq:%d\n", pirq, rirq)); if (pirq) { if (sc->pch.stopping) { @@ -332,7 +323,8 @@ if (sc->pch.hwch == 1) ess_write(sc, 0xb8, ess_read(sc, 0xb8) & ~0x01); else - ess_setmixer(sc, 0x78, ess_getmixer(sc, 0x78) & ~0x03); + ess_setmixer(sc, 0x78, + ess_getmixer(sc, 0x78) & ~0x03); } ess_unlock(sc); chn_intr(sc->pch.channel); @@ -395,10 +387,10 @@ s1 = 768000 / (128 - t1); t1 |= 0x80; - use0 = (ABS(speed - s0) < ABS(speed - s1))? 1 : 0; + use0 = (ABS(speed - s0) < ABS(speed - s1)) ? 1 : 0; - *spd = use0? s0 : s1; - return use0? t0 : t1; + *spd = use0 ? s0 : s1; + return use0 ? t0 : t1; } static u_int8_t @@ -413,30 +405,33 @@ } static int -ess_setupch(struct ess_info *sc, int ch, int dir, int spd, u_int32_t fmt, int len) +ess_setupch(struct ess_info *sc, int ch, int dir, int spd, u_int32_t fmt, + int len) { - int play = (dir == PCMDIR_PLAY)? 1 : 0; - int b16 = (fmt & AFMT_16BIT)? 1 : 0; - int stereo = (AFMT_CHANNEL(fmt) > 1)? 1 : 0; - int unsign = (!(fmt & AFMT_SIGNED))? 1 : 0; + int play = (dir == PCMDIR_PLAY) ? 1 : 0; + int b16 = (fmt & AFMT_16BIT) ? 1 : 0; + int stereo = (AFMT_CHANNEL(fmt) > 1) ? 1 : 0; + int unsign = (!(fmt & AFMT_SIGNED)) ? 1 : 0; u_int8_t spdval, fmtval; DEB(printf("ess_setupch\n")); - spdval = (sc->newspeed)? ess_calcspeed9(&spd) : ess_calcspeed8(&spd); + spdval = (sc->newspeed) ? ess_calcspeed9(&spd) : ess_calcspeed8(&spd); - sc->simplex_dir = play ? PCMDIR_PLAY : PCMDIR_REC ; + sc->simplex_dir = play ? PCMDIR_PLAY : PCMDIR_REC; if (ch == 1) { - KASSERT((dir == PCMDIR_PLAY) || (dir == PCMDIR_REC), ("ess_setupch: dir1 bad")); + KASSERT((dir == PCMDIR_PLAY) || (dir == PCMDIR_REC), + ("ess_setupch: dir1 bad")); len = -len; /* transfer length low */ ess_write(sc, 0xa4, len & 0x00ff); /* transfer length high */ ess_write(sc, 0xa5, (len & 0xff00) >> 8); /* autoinit, dma dir */ - ess_write(sc, 0xb8, 0x04 | (play? 0x00 : 0x0a)); + ess_write(sc, 0xb8, 0x04 | (play ? 0x00 : 0x0a)); /* mono/stereo */ - ess_write(sc, 0xa8, (ess_read(sc, 0xa8) & ~0x03) | (stereo? 0x01 : 0x02)); + ess_write(sc, 0xa8, + (ess_read(sc, 0xa8) & ~0x03) | (stereo ? 0x01 : 0x02)); /* demand mode, 4 bytes/xfer */ ess_write(sc, 0xb9, 0x02); /* sample rate */ @@ -453,9 +448,9 @@ ess_write(sc, 0xb7, 0x51 | (unsign? 0x00 : 0x20)); */ /* setup fifo */ - ess_write(sc, 0xb7, 0x91 | (unsign? 0x00 : 0x20) | - (b16? 0x04 : 0x00) | - (stereo? 0x08 : 0x40)); + ess_write(sc, 0xb7, + 0x91 | (unsign ? 0x00 : 0x20) | (b16 ? 0x04 : 0x00) | + (stereo ? 0x08 : 0x40)); /* irq control */ ess_write(sc, 0xb1, (ess_read(sc, 0xb1) & 0x0f) | 0x50); /* drq control */ @@ -521,10 +516,11 @@ /* -------------------------------------------------------------------- */ /* channel interface for ESS18xx */ static void * -esschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +esschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { struct ess_info *sc = devinfo; - struct ess_chinfo *ch = (dir == PCMDIR_PLAY)? &sc->pch : &sc->rch; + struct ess_chinfo *ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch; DEB(printf("esschan_init\n")); ch->parent = sc; @@ -580,12 +576,13 @@ if (!PCMTRIG_COMMON(go)) return 0; - DEB(printf("esschan_trigger: %d\n",go)); + DEB(printf("esschan_trigger: %d\n", go)); ess_lock(sc); switch (go) { case PCMTRIG_START: - ess_dmasetup(sc, ch->hwch, sndbuf_getbufaddr(ch->buffer), sndbuf_getsize(ch->buffer), ch->dir); + ess_dmasetup(sc, ch->hwch, sndbuf_getbufaddr(ch->buffer), + sndbuf_getsize(ch->buffer), ch->dir); ess_dmatrigger(sc, ch->hwch, 1); ess_start(ch); break; @@ -618,19 +615,17 @@ { struct ess_chinfo *ch = data; - return (ch->dir == PCMDIR_PLAY)? &ess_playcaps : &ess_reccaps; + return (ch->dir == PCMDIR_PLAY) ? &ess_playcaps : &ess_reccaps; } -static kobj_method_t esschan_methods[] = { - KOBJMETHOD(channel_init, esschan_init), - KOBJMETHOD(channel_setformat, esschan_setformat), - KOBJMETHOD(channel_setspeed, esschan_setspeed), - KOBJMETHOD(channel_setblocksize, esschan_setblocksize), - KOBJMETHOD(channel_trigger, esschan_trigger), - KOBJMETHOD(channel_getptr, esschan_getptr), - KOBJMETHOD(channel_getcaps, esschan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t esschan_methods[] = { KOBJMETHOD(channel_init, + esschan_init), + KOBJMETHOD(channel_setformat, esschan_setformat), + KOBJMETHOD(channel_setspeed, esschan_setspeed), + KOBJMETHOD(channel_setblocksize, esschan_setblocksize), + KOBJMETHOD(channel_trigger, esschan_trigger), + KOBJMETHOD(channel_getptr, esschan_getptr), + KOBJMETHOD(channel_getcaps, esschan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(esschan); /************************************************************/ @@ -640,12 +635,13 @@ { struct ess_info *sc = mix_getdevinfo(m); - mix_setrecdevs(m, SOUND_MASK_CD | SOUND_MASK_MIC | SOUND_MASK_LINE | - SOUND_MASK_IMIX); + mix_setrecdevs(m, + SOUND_MASK_CD | SOUND_MASK_MIC | SOUND_MASK_LINE | SOUND_MASK_IMIX); - mix_setdevs(m, SOUND_MASK_SYNTH | SOUND_MASK_PCM | SOUND_MASK_LINE | - SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VOLUME | - SOUND_MASK_LINE1); + mix_setdevs(m, + SOUND_MASK_SYNTH | SOUND_MASK_PCM | SOUND_MASK_LINE | + SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VOLUME | + SOUND_MASK_LINE1); ess_setmixer(sc, 0, 0); /* reset */ @@ -692,12 +688,12 @@ break; case SOUND_MIXER_VOLUME: - l = left? (left * 63) / 100 : 64; - r = right? (right * 63) / 100 : 64; + l = left ? (left * 63) / 100 : 64; + r = right ? (right * 63) / 100 : 64; ess_setmixer(sc, 0x60, l); ess_setmixer(sc, 0x62, r); - left = (l == 64)? 0 : (l * 100) / 63; - right = (r == 64)? 0 : (r * 100) / 63; + left = (l == 64) ? 0 : (l * 100) / 63; + right = (r == 64) ? 0 : (r * 100) / 63; return left | (right << 8); } @@ -744,17 +740,16 @@ } static kobj_method_t solomixer_methods[] = { - KOBJMETHOD(mixer_init, essmix_init), - KOBJMETHOD(mixer_set, essmix_set), - KOBJMETHOD(mixer_setrecsrc, essmix_setrecsrc), - KOBJMETHOD_END + KOBJMETHOD(mixer_init, essmix_init), KOBJMETHOD(mixer_set, essmix_set), + KOBJMETHOD(mixer_setrecsrc, essmix_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(solomixer); /************************************************************/ static int -ess_dmasetup(struct ess_info *sc, int ch, u_int32_t base, u_int16_t cnt, int dir) +ess_dmasetup(struct ess_info *sc, int ch, u_int32_t base, u_int16_t cnt, + int dir) { KASSERT(ch == 1 || ch == 2, ("bad ch")); sc->dmasz[ch - 1] = cnt; @@ -762,7 +757,8 @@ port_wr(sc->vc, 0x8, 0xc4, 1); /* command */ port_wr(sc->vc, 0xd, 0xff, 1); /* reset */ port_wr(sc->vc, 0xf, 0x01, 1); /* mask */ - port_wr(sc->vc, 0xb, dir == PCMDIR_PLAY? 0x58 : 0x54, 1); /* mode */ + port_wr(sc->vc, 0xb, dir == PCMDIR_PLAY ? 0x58 : 0x54, + 1); /* mode */ port_wr(sc->vc, 0x0, base, 4); port_wr(sc->vc, 0x4, cnt - 1, 2); @@ -781,26 +777,26 @@ KASSERT(ch == 1 || ch == 2, ("bad ch")); if (ch == 1) { -/* - * During recording, this register is known to give back - * garbage if it's not quiescent while being read. That's - * why we spl, stop the DMA, and try over and over until - * adjacent reads are "close", in the right order and not - * bigger than is otherwise possible. - */ + /* + * During recording, this register is known to give back + * garbage if it's not quiescent while being read. That's + * why we spl, stop the DMA, and try over and over until + * adjacent reads are "close", in the right order and not + * bigger than is otherwise possible. + */ ess_dmatrigger(sc, ch, 0); DELAY(20); do { DELAY(10); if (j > 1) - printf("DMA count reg bogus: %04x & %04x\n", - i, p); + printf("DMA count reg bogus: %04x & %04x\n", i, + p); i = port_rd(sc->vc, 0x4, 2) + 1; p = port_rd(sc->vc, 0x4, 2) + 1; - } while ((p > sc->dmasz[ch - 1] || i < p || (p - i) > 0x8) && j++ < 1000); + } while ((p > sc->dmasz[ch - 1] || i < p || (p - i) > 0x8) && + j++ < 1000); ess_dmatrigger(sc, ch, 1); - } - else if (ch == 2) + } else if (ch == 2) p = port_rd(sc->io, 0x4, 2); return sc->dmasz[ch - 1] - p; } @@ -810,9 +806,10 @@ { KASSERT(ch == 1 || ch == 2, ("bad ch")); if (ch == 1) - port_wr(sc->vc, 0xf, go? 0x00 : 0x01, 1); /* mask */ + port_wr(sc->vc, 0xf, go ? 0x00 : 0x01, 1); /* mask */ else if (ch == 2) - port_wr(sc->io, 0x6, 0x08 | (go? 0x02 : 0x00), 1); /* autoinit */ + port_wr(sc->io, 0x6, 0x08 | (go ? 0x02 : 0x00), + 1); /* autoinit */ return 0; } @@ -885,12 +882,14 @@ rid = 0; sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_ACTIVE | RF_SHAREABLE); + RF_ACTIVE | RF_SHAREABLE); sc->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_solo softc"); - return (sc->irq && sc->io && sc->sb && sc->vc && - sc->mpu && sc->gp && sc->lock)? 0 : ENXIO; + return (sc->irq && sc->io && sc->sb && sc->vc && sc->mpu && sc->gp && + sc->lock) ? + 0 : + ENXIO; } static int @@ -916,14 +915,14 @@ return s ? BUS_PROBE_DEFAULT : ENXIO; } -#define ESS_PCI_LEGACYCONTROL 0x40 -#define ESS_PCI_CONFIG 0x50 -#define ESS_PCI_DDMACONTROL 0x60 +#define ESS_PCI_LEGACYCONTROL 0x40 +#define ESS_PCI_CONFIG 0x50 +#define ESS_PCI_DDMACONTROL 0x60 static int ess_suspend(device_t dev) { - return 0; + return 0; } static int @@ -953,7 +952,7 @@ ess_unlock(sc); return 0; - no: +no: return EIO; } @@ -1000,15 +999,15 @@ #if 0 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/65536, /*boundary*/0, #endif - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_24BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/sc->bufsz, /*nsegments*/1, - /*maxsegz*/0x3ffff, - /*flags*/0, - /*lockfunc*/NULL, /*lockarg*/NULL, - &sc->parent_dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_24BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ sc->bufsz, /*nsegments*/ 1, + /*maxsegz*/ 0x3ffff, + /*flags*/ 0, + /*lockfunc*/ NULL, /*lockarg*/ NULL, &sc->parent_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto no; } @@ -1023,9 +1022,9 @@ goto no; snprintf(status, SND_STATUSLEN, "port 0x%jx,0x%jx,0x%jx irq %jd on %s", - rman_get_start(sc->io), rman_get_start(sc->sb), rman_get_start(sc->vc), - rman_get_start(sc->irq), - device_get_nameunit(device_get_parent(dev))); + rman_get_start(sc->io), rman_get_start(sc->sb), + rman_get_start(sc->vc), rman_get_start(sc->irq), + device_get_nameunit(device_get_parent(dev))); if (pcm_register(dev, sc, 1, 1)) goto no; @@ -1057,12 +1056,11 @@ static device_method_t ess_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, ess_probe), - DEVMETHOD(device_attach, ess_attach), - DEVMETHOD(device_detach, ess_detach), - DEVMETHOD(device_resume, ess_resume), - DEVMETHOD(device_suspend, ess_suspend), - { 0, 0 } + DEVMETHOD(device_probe, ess_probe), + DEVMETHOD(device_attach, ess_attach), + DEVMETHOD(device_detach, ess_detach), + DEVMETHOD(device_resume, ess_resume), + DEVMETHOD(device_suspend, ess_suspend), { 0, 0 } }; static driver_t ess_driver = { Index: sys/dev/sound/pci/spicds.h =================================================================== --- sys/dev/sound/pci/spicds.h +++ sys/dev/sound/pci/spicds.h @@ -38,42 +38,42 @@ /* AK4524/AK4528 control registers */ #define AK4524_POWER 0x00 #define AK4528_POWER 0x00 -#define AK452X_POWER_PWDA 0x01 -#define AK452X_POWER_PWAD 0x02 -#define AK452X_POWER_PWVR 0x04 +#define AK452X_POWER_PWDA 0x01 +#define AK452X_POWER_PWAD 0x02 +#define AK452X_POWER_PWVR 0x04 #define AK4524_RESET 0x01 #define AK4528_RESET 0x01 -#define AK452X_RESET_RSDA 0x01 -#define AK452X_RESET_RSAD 0x02 +#define AK452X_RESET_RSDA 0x01 +#define AK452X_RESET_RSAD 0x02 #define AK4524_FORMAT 0x02 #define AK4528_FORMAT 0x02 -#define AK452X_FORMAT_1X 0x00 -#define AK452X_FORMAT_2X 0x01 -#define AK452X_FORMAT_4X1 0x02 -#define AK452X_FORMAT_4X2 0x03 -#define AK452X_FORMAT_256FSN 0x00 -#define AK452X_FORMAT_512FSN 0x04 -#define AK452X_FORMAT_1024FSN 0x08 -#define AK452X_FORMAT_384FSN 0x10 -#define AK452X_FORMAT_768FSN 0x14 -#define AK452X_FORMAT_OM24IL16 0x00 -#define AK452X_FORMAT_OM24IL20 0x20 -#define AK452X_FORMAT_OM24IM24 0x40 -#define AK452X_FORMAT_I2S 0x60 -#define AK452X_FORMAT_OM24IL24 0x80 +#define AK452X_FORMAT_1X 0x00 +#define AK452X_FORMAT_2X 0x01 +#define AK452X_FORMAT_4X1 0x02 +#define AK452X_FORMAT_4X2 0x03 +#define AK452X_FORMAT_256FSN 0x00 +#define AK452X_FORMAT_512FSN 0x04 +#define AK452X_FORMAT_1024FSN 0x08 +#define AK452X_FORMAT_384FSN 0x10 +#define AK452X_FORMAT_768FSN 0x14 +#define AK452X_FORMAT_OM24IL16 0x00 +#define AK452X_FORMAT_OM24IL20 0x20 +#define AK452X_FORMAT_OM24IM24 0x40 +#define AK452X_FORMAT_I2S 0x60 +#define AK452X_FORMAT_OM24IL24 0x80 #define AK4524_DVC 0x03 -#define AK452X_DVC_DEM441 0x00 -#define AK452X_DVC_DEMOFF 0x01 -#define AK452X_DVC_DEM48 0x02 -#define AK452X_DVC_DEM32 0x03 -#define AK452X_DVC_ZTM256 0x00 -#define AK452X_DVC_ZTM512 0x04 -#define AK452X_DVC_ZTM1024 0x08 -#define AK452X_DVC_ZTM2048 0x0c -#define AK452X_DVC_ZCE 0x10 -#define AK452X_DVC_HPFL 0x04 -#define AK452X_DVC_HPFR 0x08 -#define AK452X_DVC_SMUTE 0x80 +#define AK452X_DVC_DEM441 0x00 +#define AK452X_DVC_DEMOFF 0x01 +#define AK452X_DVC_DEM48 0x02 +#define AK452X_DVC_DEM32 0x03 +#define AK452X_DVC_ZTM256 0x00 +#define AK452X_DVC_ZTM512 0x04 +#define AK452X_DVC_ZTM1024 0x08 +#define AK452X_DVC_ZTM2048 0x0c +#define AK452X_DVC_ZCE 0x10 +#define AK452X_DVC_HPFL 0x04 +#define AK452X_DVC_HPFR 0x08 +#define AK452X_DVC_SMUTE 0x80 #define AK4524_LIPGA 0x04 #define AK4524_RIPGA 0x05 #define AK4524_LOATT 0x06 @@ -110,7 +110,8 @@ typedef void (*spicds_ctrl)(void *, unsigned int, unsigned int, unsigned int); -struct spicds_info *spicds_create(device_t dev, void *devinfo, int num, spicds_ctrl); +struct spicds_info *spicds_create(device_t dev, void *devinfo, int num, + spicds_ctrl); void spicds_destroy(struct spicds_info *codec); void spicds_settype(struct spicds_info *codec, unsigned int type); void spicds_setcif(struct spicds_info *codec, unsigned int cif); @@ -118,4 +119,5 @@ void spicds_setdvc(struct spicds_info *codec, unsigned int dvc); void spicds_init(struct spicds_info *codec); void spicds_reinit(struct spicds_info *codec); -void spicds_set(struct spicds_info *codec, int dir, unsigned int left, unsigned int right); +void spicds_set(struct spicds_info *codec, int dir, unsigned int left, + unsigned int right); Index: sys/dev/sound/pci/spicds.c =================================================================== --- sys/dev/sound/pci/spicds.c +++ sys/dev/sound/pci/spicds.c @@ -31,18 +31,17 @@ #include "opt_snd.h" #endif -#include - #include +#include static MALLOC_DEFINE(M_SPICDS, "spicds", "SPI codec"); -#define SPICDS_NAMELEN 16 +#define SPICDS_NAMELEN 16 struct spicds_info { device_t dev; spicds_ctrl ctrl; void *devinfo; - int num; /* number of this device */ + int num; /* number of this device */ unsigned int type; /* codec type */ unsigned int cif; /* Controll data Interface Format (0/1) */ unsigned int format; /* data format and master clock frequency */ @@ -77,8 +76,9 @@ { int mask; -#if(0) - device_printf(codec->dev, "spicds_wrcd(codec, 0x%02x, 0x%02x)\n", reg, val); +#if (0) + device_printf(codec->dev, "spicds_wrcd(codec, 0x%02x, 0x%02x)\n", reg, + val); #endif /* start */ if (codec->cif) @@ -87,49 +87,44 @@ codec->ctrl(codec->devinfo, 0, 1, 0); DELAY(1); if (codec->type != SPICDS_TYPE_WM8770) { - if (codec->type == SPICDS_TYPE_AK4381) { - /* AK4381 chip address */ - spicds_wrbit(codec, 0); - spicds_wrbit(codec, 1); - } - else if (codec->type == SPICDS_TYPE_AK4396) - { - /* AK4396 chip address */ - spicds_wrbit(codec, 0); - spicds_wrbit(codec, 0); - } - else { - /* chip address */ - spicds_wrbit(codec, 1); - spicds_wrbit(codec, 0); - } - /* write */ - spicds_wrbit(codec, 1); - /* register address */ - for (mask = 0x10; mask != 0; mask >>= 1) - spicds_wrbit(codec, reg & mask); - /* data */ - for (mask = 0x80; mask != 0; mask >>= 1) - spicds_wrbit(codec, val & mask); - /* stop */ - DELAY(1); - } - else { - /* register address */ - for (mask = 0x40; mask != 0; mask >>= 1) - spicds_wrbit(codec, reg & mask); - /* data */ - for (mask = 0x100; mask != 0; mask >>= 1) - spicds_wrbit(codec, val & mask); - /* stop */ - DELAY(1); + if (codec->type == SPICDS_TYPE_AK4381) { + /* AK4381 chip address */ + spicds_wrbit(codec, 0); + spicds_wrbit(codec, 1); + } else if (codec->type == SPICDS_TYPE_AK4396) { + /* AK4396 chip address */ + spicds_wrbit(codec, 0); + spicds_wrbit(codec, 0); + } else { + /* chip address */ + spicds_wrbit(codec, 1); + spicds_wrbit(codec, 0); + } + /* write */ + spicds_wrbit(codec, 1); + /* register address */ + for (mask = 0x10; mask != 0; mask >>= 1) + spicds_wrbit(codec, reg & mask); + /* data */ + for (mask = 0x80; mask != 0; mask >>= 1) + spicds_wrbit(codec, val & mask); + /* stop */ + DELAY(1); + } else { + /* register address */ + for (mask = 0x40; mask != 0; mask >>= 1) + spicds_wrbit(codec, reg & mask); + /* data */ + for (mask = 0x100; mask != 0; mask >>= 1) + spicds_wrbit(codec, val & mask); + /* stop */ + DELAY(1); } if (codec->cif) { codec->ctrl(codec->devinfo, 0, 1, 0); DELAY(1); codec->ctrl(codec->devinfo, 1, 1, 0); - } - else { + } else { codec->ctrl(codec->devinfo, 1, 1, 0); } @@ -141,14 +136,15 @@ { struct spicds_info *codec; -#if(0) +#if (0) device_printf(dev, "spicds_create(dev, devinfo, %d, ctrl)\n", num); #endif codec = (struct spicds_info *)malloc(sizeof *codec, M_SPICDS, M_NOWAIT); if (codec == NULL) return NULL; - snprintf(codec->name, SPICDS_NAMELEN, "%s:spicds%d", device_get_nameunit(dev), num); + snprintf(codec->name, SPICDS_NAMELEN, "%s:spicds%d", + device_get_nameunit(dev), num); codec->lock = snd_mtxcreate(codec->name, codec->name); codec->dev = dev; codec->ctrl = ctrl; @@ -156,7 +152,8 @@ codec->num = num; codec->type = SPICDS_TYPE_AK4524; codec->cif = 0; - codec->format = AK452X_FORMAT_I2S | AK452X_FORMAT_256FSN | AK452X_FORMAT_1X; + codec->format = AK452X_FORMAT_I2S | AK452X_FORMAT_256FSN | + AK452X_FORMAT_1X; codec->dvc = AK452X_DVC_DEMOFF | AK452X_DVC_ZTM1024 | AK452X_DVC_ZCE; return codec; @@ -204,11 +201,11 @@ void spicds_init(struct spicds_info *codec) { -#if(0) +#if (0) device_printf(codec->dev, "spicds_init(codec)\n"); #endif snd_mtxlock(codec->lock); - if (codec->type == SPICDS_TYPE_AK4524 ||\ + if (codec->type == SPICDS_TYPE_AK4524 || codec->type == SPICDS_TYPE_AK4528) { /* power off */ spicds_wrcd(codec, AK4524_POWER, 0); @@ -226,24 +223,27 @@ /* WM8770 init values are taken from ALSA */ /* These come first to reduce init pop noise */ - spicds_wrcd(codec, 0x1b, 0x044); /* ADC Mux (AC'97 source) */ - spicds_wrcd(codec, 0x1c, 0x00B); /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */ - spicds_wrcd(codec, 0x1d, 0x009); /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */ + spicds_wrcd(codec, 0x1b, 0x044); /* ADC Mux (AC'97 source) */ + spicds_wrcd(codec, 0x1c, + 0x00B); /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */ + spicds_wrcd(codec, 0x1d, + 0x009); /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */ - spicds_wrcd(codec, 0x18, 0x000); /* All power-up */ + spicds_wrcd(codec, 0x18, 0x000); /* All power-up */ - spicds_wrcd(codec, 0x16, 0x122); /* I2S, normal polarity, 24bit */ - spicds_wrcd(codec, 0x17, 0x022); /* 256fs, slave mode */ + spicds_wrcd(codec, 0x16, + 0x122); /* I2S, normal polarity, 24bit */ + spicds_wrcd(codec, 0x17, 0x022); /* 256fs, slave mode */ - spicds_wrcd(codec, 0x19, 0x000); /* -12dB ADC/L */ - spicds_wrcd(codec, 0x1a, 0x000); /* -12dB ADC/R */ + spicds_wrcd(codec, 0x19, 0x000); /* -12dB ADC/L */ + spicds_wrcd(codec, 0x1a, 0x000); /* -12dB ADC/R */ } if (codec->type == SPICDS_TYPE_AK4358) - spicds_wrcd(codec, 0x00, 0x07); /* I2S, 24bit, power-up */ + spicds_wrcd(codec, 0x00, 0x07); /* I2S, 24bit, power-up */ if (codec->type == SPICDS_TYPE_AK4381) - spicds_wrcd(codec, 0x00, 0x8f); /* I2S, 24bit, power-up */ + spicds_wrcd(codec, 0x00, 0x8f); /* I2S, 24bit, power-up */ if (codec->type == SPICDS_TYPE_AK4396) - spicds_wrcd(codec, 0x00, 0x07); /* I2S, 24bit, power-up */ + spicds_wrcd(codec, 0x00, 0x07); /* I2S, 24bit, power-up */ snd_mtxunlock(codec->lock); } @@ -269,15 +269,17 @@ } void -spicds_set(struct spicds_info *codec, int dir, unsigned int left, unsigned int right) +spicds_set(struct spicds_info *codec, int dir, unsigned int left, + unsigned int right) { -#if(0) - device_printf(codec->dev, "spicds_set(codec, %d, %d, %d)\n", dir, left, right); +#if (0) + device_printf(codec->dev, "spicds_set(codec, %d, %d, %d)\n", dir, left, + right); #endif snd_mtxlock(codec->lock); if (left >= 100) - if ((codec->type == SPICDS_TYPE_AK4381) || \ - (codec->type == SPICDS_TYPE_AK4396)) + if ((codec->type == SPICDS_TYPE_AK4381) || + (codec->type == SPICDS_TYPE_AK4396)) left = 255; else left = 127; @@ -294,73 +296,81 @@ left = left * 127 / 100; } if (right >= 100) - if ((codec->type == SPICDS_TYPE_AK4381) || \ - (codec->type == SPICDS_TYPE_AK4396)) - right = 255; - else - right = 127; + if ((codec->type == SPICDS_TYPE_AK4381) || + (codec->type == SPICDS_TYPE_AK4396)) + right = 255; + else + right = 127; else switch (codec->type) { case SPICDS_TYPE_WM8770: - right = right + 27; + right = right + 27; break; case SPICDS_TYPE_AK4381: case SPICDS_TYPE_AK4396: right = right * 255 / 100; break; - default: - right = right * 127 / 100; + default: + right = right * 127 / 100; } if (dir == PCMDIR_REC && codec->type == SPICDS_TYPE_AK4524) { -#if(0) - device_printf(codec->dev, "spicds_set(): AK4524(REC) %d/%d\n", left, right); +#if (0) + device_printf(codec->dev, "spicds_set(): AK4524(REC) %d/%d\n", + left, right); #endif spicds_wrcd(codec, AK4524_LIPGA, left); spicds_wrcd(codec, AK4524_RIPGA, right); } if (dir == PCMDIR_PLAY && codec->type == SPICDS_TYPE_AK4524) { -#if(0) - device_printf(codec->dev, "spicds_set(): AK4524(PLAY) %d/%d\n", left, right); +#if (0) + device_printf(codec->dev, "spicds_set(): AK4524(PLAY) %d/%d\n", + left, right); #endif spicds_wrcd(codec, AK4524_LOATT, left); spicds_wrcd(codec, AK4524_ROATT, right); } if (dir == PCMDIR_PLAY && codec->type == SPICDS_TYPE_AK4528) { -#if(0) - device_printf(codec->dev, "spicds_set(): AK4528(PLAY) %d/%d\n", left, right); +#if (0) + device_printf(codec->dev, "spicds_set(): AK4528(PLAY) %d/%d\n", + left, right); #endif spicds_wrcd(codec, AK4528_LOATT, left); spicds_wrcd(codec, AK4528_ROATT, right); } - if (dir == PCMDIR_PLAY && codec->type == SPICDS_TYPE_WM8770) { -#if(0) - device_printf(codec->dev, "spicds_set(): WM8770(PLAY) %d/%d\n", left, right); + if (dir == PCMDIR_PLAY && codec->type == SPICDS_TYPE_WM8770) { +#if (0) + device_printf(codec->dev, "spicds_set(): WM8770(PLAY) %d/%d\n", + left, right); #endif - spicds_wrcd(codec, WM8770_AOATT_L1, left | WM8770_AOATT_UPDATE); - spicds_wrcd(codec, WM8770_AOATT_R1, right | WM8770_AOATT_UPDATE); - } - if (dir == PCMDIR_PLAY && codec->type == SPICDS_TYPE_AK4358) { -#if(0) - device_printf(codec->dev, "spicds_set(): AK4358(PLAY) %d/%d\n", left, right); + spicds_wrcd(codec, WM8770_AOATT_L1, left | WM8770_AOATT_UPDATE); + spicds_wrcd(codec, WM8770_AOATT_R1, + right | WM8770_AOATT_UPDATE); + } + if (dir == PCMDIR_PLAY && codec->type == SPICDS_TYPE_AK4358) { +#if (0) + device_printf(codec->dev, "spicds_set(): AK4358(PLAY) %d/%d\n", + left, right); #endif - spicds_wrcd(codec, AK4358_LO1ATT, left | AK4358_OATT_ENABLE); - spicds_wrcd(codec, AK4358_RO1ATT, right | AK4358_OATT_ENABLE); - } - if (dir == PCMDIR_PLAY && codec->type == SPICDS_TYPE_AK4381) { -#if(0) - device_printf(codec->dev, "spicds_set(): AK4381(PLAY) %d/%d\n", left, right); + spicds_wrcd(codec, AK4358_LO1ATT, left | AK4358_OATT_ENABLE); + spicds_wrcd(codec, AK4358_RO1ATT, right | AK4358_OATT_ENABLE); + } + if (dir == PCMDIR_PLAY && codec->type == SPICDS_TYPE_AK4381) { +#if (0) + device_printf(codec->dev, "spicds_set(): AK4381(PLAY) %d/%d\n", + left, right); #endif - spicds_wrcd(codec, AK4381_LOATT, left); - spicds_wrcd(codec, AK4381_ROATT, right); - } + spicds_wrcd(codec, AK4381_LOATT, left); + spicds_wrcd(codec, AK4381_ROATT, right); + } - if (dir == PCMDIR_PLAY && codec->type == SPICDS_TYPE_AK4396) { -#if(0) - device_printf(codec->dev, "spicds_set(): AK4396(PLAY) %d/%d\n", left, right); + if (dir == PCMDIR_PLAY && codec->type == SPICDS_TYPE_AK4396) { +#if (0) + device_printf(codec->dev, "spicds_set(): AK4396(PLAY) %d/%d\n", + left, right); #endif - spicds_wrcd(codec, AK4396_LOATT, left); - spicds_wrcd(codec, AK4396_ROATT, right); - } + spicds_wrcd(codec, AK4396_LOATT, left); + spicds_wrcd(codec, AK4396_ROATT, right); + } snd_mtxunlock(codec->lock); } Index: sys/dev/sound/pci/t4dwave.h =================================================================== --- sys/dev/sound/pci/t4dwave.h +++ sys/dev/sound/pci/t4dwave.h @@ -29,75 +29,75 @@ #ifndef _T4DWAVE_REG_H #define _T4DWAVE_REG_H -#define TR_REG_CIR 0xa0 -#define TR_CIR_MASK 0x0000003f -#define TR_CIR_ADDRENA 0x00001000 -#define TR_CIR_MIDENA 0x00002000 -#define TR_REG_MISCINT 0xb0 -#define TR_INT_ADDR 0x00000020 -#define TR_INT_SB 0x00000004 +#define TR_REG_CIR 0xa0 +#define TR_CIR_MASK 0x0000003f +#define TR_CIR_ADDRENA 0x00001000 +#define TR_CIR_MIDENA 0x00002000 +#define TR_REG_MISCINT 0xb0 +#define TR_INT_ADDR 0x00000020 +#define TR_INT_SB 0x00000004 -#define TR_REG_DMAR0 0x00 -#define TR_REG_DMAR4 0x04 -#define TR_REG_DMAR11 0x0b -#define TR_REG_DMAR15 0x0f -#define TR_REG_SBR4 0x14 -#define TR_REG_SBR5 0x15 -#define TR_SB_INTSTATUS 0x82 -#define TR_REG_SBR9 0x1e -#define TR_REG_SBR10 0x1f -#define TR_REG_SBBL 0xc0 -#define TR_REG_SBCTRL 0xc4 -#define TR_REG_SBDELTA 0xac +#define TR_REG_DMAR0 0x00 +#define TR_REG_DMAR4 0x04 +#define TR_REG_DMAR11 0x0b +#define TR_REG_DMAR15 0x0f +#define TR_REG_SBR4 0x14 +#define TR_REG_SBR5 0x15 +#define TR_SB_INTSTATUS 0x82 +#define TR_REG_SBR9 0x1e +#define TR_REG_SBR10 0x1f +#define TR_REG_SBBL 0xc0 +#define TR_REG_SBCTRL 0xc4 +#define TR_REG_SBDELTA 0xac -#define TR_CDC_DATA 16 -#define TDX_REG_CODECWR 0x40 -#define TDX_REG_CODECRD 0x44 -#define TDX_CDC_RWSTAT 0x00008000 -#define TDX_REG_CODECST 0x48 -#define TDX_CDC_SBCTRL 0x40 -#define TDX_CDC_ACTIVE 0x20 -#define TDX_CDC_READY 0x10 -#define TDX_CDC_ADCON 0x08 -#define TDX_CDC_DACON 0x02 -#define TDX_CDC_RESET 0x01 -#define TDX_CDC_ON (TDX_CDC_ADCON|TDX_CDC_DACON) +#define TR_CDC_DATA 16 +#define TDX_REG_CODECWR 0x40 +#define TDX_REG_CODECRD 0x44 +#define TDX_CDC_RWSTAT 0x00008000 +#define TDX_REG_CODECST 0x48 +#define TDX_CDC_SBCTRL 0x40 +#define TDX_CDC_ACTIVE 0x20 +#define TDX_CDC_READY 0x10 +#define TDX_CDC_ADCON 0x08 +#define TDX_CDC_DACON 0x02 +#define TDX_CDC_RESET 0x01 +#define TDX_CDC_ON (TDX_CDC_ADCON | TDX_CDC_DACON) -#define SPA_REG_CODECRD 0x44 -#define SPA_REG_CODECWR 0x40 -#define SPA_REG_CODECST 0x48 -#define SPA_RST_OFF 0x0f0000 -#define SPA_REG_GPIO 0x48 -#define SPA_CDC_RWSTAT 0x00008000 +#define SPA_REG_CODECRD 0x44 +#define SPA_REG_CODECWR 0x40 +#define SPA_REG_CODECST 0x48 +#define SPA_RST_OFF 0x0f0000 +#define SPA_REG_GPIO 0x48 +#define SPA_CDC_RWSTAT 0x00008000 -#define TNX_REG_CODECWR 0x44 +#define TNX_REG_CODECWR 0x44 #define TNX_REG_CODEC1RD 0x48 #define TNX_REG_CODEC2RD 0x4c -#define TNX_CDC_RWSTAT 0x00000c00 -#define TNX_CDC_SEC 0x00000100 -#define TNX_REG_CODECST 0x40 -#define TNX_CDC_READY2 0x40 -#define TNX_CDC_ADC2ON 0x20 -#define TNX_CDC_DAC2ON 0x10 -#define TNX_CDC_READY1 0x08 -#define TNX_CDC_ADC1ON 0x04 -#define TNX_CDC_DAC1ON 0x02 -#define TNX_CDC_RESET 0x01 -#define TNX_CDC_ON (TNX_CDC_ADC1ON|TNX_CDC_DAC1ON) +#define TNX_CDC_RWSTAT 0x00000c00 +#define TNX_CDC_SEC 0x00000100 +#define TNX_REG_CODECST 0x40 +#define TNX_CDC_READY2 0x40 +#define TNX_CDC_ADC2ON 0x20 +#define TNX_CDC_DAC2ON 0x10 +#define TNX_CDC_READY1 0x08 +#define TNX_CDC_ADC1ON 0x04 +#define TNX_CDC_DAC1ON 0x02 +#define TNX_CDC_RESET 0x01 +#define TNX_CDC_ON (TNX_CDC_ADC1ON | TNX_CDC_DAC1ON) -#define TR_REG_STARTA 0x80 -#define TR_REG_STOPA 0x84 -#define TR_REG_CSPF_A 0x90 -#define TR_REG_ADDRINTA 0x98 -#define TR_REG_INTENA 0xa4 +#define TR_REG_STARTA 0x80 +#define TR_REG_STOPA 0x84 +#define TR_REG_CSPF_A 0x90 +#define TR_REG_ADDRINTA 0x98 +#define TR_REG_INTENA 0xa4 -#define TR_REG_STARTB 0xb4 -#define TR_REG_STOPB 0xb8 -#define TR_REG_CSPF_B 0xbc -#define TR_REG_ADDRINTB 0xd8 -#define TR_REG_INTENB 0xdc +#define TR_REG_STARTB 0xb4 +#define TR_REG_STOPB 0xb8 +#define TR_REG_CSPF_B 0xbc +#define TR_REG_ADDRINTB 0xd8 +#define TR_REG_INTENB 0xdc -#define TR_REG_CHNBASE 0xe0 -#define TR_CHN_REGS 5 +#define TR_REG_CHNBASE 0xe0 +#define TR_CHN_REGS 5 #endif Index: sys/dev/sound/pci/t4dwave.c =================================================================== --- sys/dev/sound/pci/t4dwave.c +++ sys/dev/sound/pci/t4dwave.c @@ -30,37 +30,36 @@ #include "opt_snd.h" #endif -#include -#include -#include - #include #include +#include +#include +#include /* -------------------------------------------------------------------- */ -#define TDX_PCI_ID 0x20001023 -#define TNX_PCI_ID 0x20011023 -#define ALI_PCI_ID 0x545110b9 -#define SPA_PCI_ID 0x70181039 +#define TDX_PCI_ID 0x20001023 +#define TNX_PCI_ID 0x20011023 +#define ALI_PCI_ID 0x545110b9 +#define SPA_PCI_ID 0x70181039 -#define TR_DEFAULT_BUFSZ 0x1000 +#define TR_DEFAULT_BUFSZ 0x1000 /* For ALi M5451 the DMA transfer size appears to be fixed to 64k. */ -#define ALI_BUFSZ 0x10000 -#define TR_BUFALGN 0x8 -#define TR_TIMEOUT_CDC 0xffff -#define TR_MAXHWCH 64 -#define ALI_MAXHWCH 32 -#define TR_MAXPLAYCH 4 -#define ALI_MAXPLAYCH 1 +#define ALI_BUFSZ 0x10000 +#define TR_BUFALGN 0x8 +#define TR_TIMEOUT_CDC 0xffff +#define TR_MAXHWCH 64 +#define ALI_MAXHWCH 32 +#define TR_MAXPLAYCH 4 +#define ALI_MAXPLAYCH 1 /* * Though, it's not clearly documented in the 4DWAVE datasheet, the * DX and NX chips can't handle DMA addresses located above 1GB as the * LBA (loop begin address) register which holds the DMA base address * is 32-bit, but the two MSBs are used for other purposes. */ -#define TR_MAXADDR ((1U << 30) - 1) -#define ALI_MAXADDR ((1U << 31) - 1) +#define TR_MAXADDR ((1U << 30) - 1) +#define ALI_MAXADDR ((1U << 31) - 1) struct tr_info; @@ -71,7 +70,7 @@ u_int32_t eso, delta; u_int32_t rvol, cvol; u_int32_t gvsel, pan, vol, ctrl; - u_int32_t active:1, was_active:1; + u_int32_t active : 1, was_active : 1; int index, bufhalf; struct snd_dbuf *buffer; struct pcm_channel *channel; @@ -80,7 +79,7 @@ struct tr_rchinfo { u_int32_t delta; - u_int32_t active:1, was_active:1; + u_int32_t active : 1, was_active : 1; struct snd_dbuf *buffer; struct pcm_channel *channel; struct tr_info *parent; @@ -111,31 +110,19 @@ /* -------------------------------------------------------------------- */ -static u_int32_t tr_recfmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S8, 1, 0), - SND_FORMAT(AFMT_S8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - SND_FORMAT(AFMT_U16_LE, 1, 0), - SND_FORMAT(AFMT_U16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps tr_reccaps = {4000, 48000, tr_recfmt, 0}; - -static u_int32_t tr_playfmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S8, 1, 0), - SND_FORMAT(AFMT_S8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - SND_FORMAT(AFMT_U16_LE, 1, 0), - SND_FORMAT(AFMT_U16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps tr_playcaps = {4000, 48000, tr_playfmt, 0}; +static u_int32_t tr_recfmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S8, 1, 0), + SND_FORMAT(AFMT_S8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), SND_FORMAT(AFMT_U16_LE, 1, 0), + SND_FORMAT(AFMT_U16_LE, 2, 0), 0 }; +static struct pcmchan_caps tr_reccaps = { 4000, 48000, tr_recfmt, 0 }; + +static u_int32_t tr_playfmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S8, 1, 0), + SND_FORMAT(AFMT_S8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), SND_FORMAT(AFMT_U16_LE, 1, 0), + SND_FORMAT(AFMT_U16_LE, 2, 0), 0 }; +static struct pcmchan_caps tr_playcaps = { 4000, 48000, tr_playfmt, 0 }; /* -------------------------------------------------------------------- */ @@ -144,7 +131,7 @@ static u_int32_t tr_rd(struct tr_info *tr, int regno, int size) { - switch(size) { + switch (size) { case 1: return bus_space_read_1(tr->st, tr->sh, regno); case 2: @@ -159,7 +146,7 @@ static void tr_wr(struct tr_info *tr, int regno, u_int32_t data, int size) { - switch(size) { + switch (size) { case 1: bus_space_write_1(tr->st, tr->sh, regno, data); break; @@ -183,23 +170,23 @@ switch (tr->type) { case SPA_PCI_ID: - treg=SPA_REG_CODECRD; - trw=SPA_CDC_RWSTAT; + treg = SPA_REG_CODECRD; + trw = SPA_CDC_RWSTAT; break; case ALI_PCI_ID: if (tr->rev > 0x01) - treg=TDX_REG_CODECWR; + treg = TDX_REG_CODECWR; else - treg=TDX_REG_CODECRD; - trw=TDX_CDC_RWSTAT; + treg = TDX_REG_CODECRD; + trw = TDX_CDC_RWSTAT; break; case TDX_PCI_ID: - treg=TDX_REG_CODECRD; - trw=TDX_CDC_RWSTAT; + treg = TDX_REG_CODECRD; + trw = TDX_CDC_RWSTAT; break; case TNX_PCI_ID: - treg=(regno & 0x100)? TNX_REG_CODEC2RD : TNX_REG_CODEC1RD; - trw=TNX_CDC_RWSTAT; + treg = (regno & 0x100) ? TNX_REG_CODEC2RD : TNX_REG_CODEC1RD; + trw = TNX_CDC_RWSTAT; break; default: printf("!!! tr_rdcd defaulted !!!\n"); @@ -218,19 +205,19 @@ if (i > 0) { chk1 = tr_rd(tr, 0xc8, 4); chk2 = tr_rd(tr, 0xc8, 4); - for (i = TR_TIMEOUT_CDC; (i > 0) && (chk1 == chk2); - i--) + for (i = TR_TIMEOUT_CDC; (i > 0) && (chk1 == chk2); i--) chk2 = tr_rd(tr, 0xc8, 4); } } if (tr->type != ALI_PCI_ID || i > 0) { tr_wr(tr, treg, regno | trw, 4); - j=trw; - for (i=TR_TIMEOUT_CDC; (i > 0) && (j & trw); i--) - j=tr_rd(tr, treg, 4); + j = trw; + for (i = TR_TIMEOUT_CDC; (i > 0) && (j & trw); i--) + j = tr_rd(tr, treg, 4); } snd_mtxunlock(tr->lock); - if (i == 0) printf("codec timeout during read of register %x\n", regno); + if (i == 0) + printf("codec timeout during read of register %x\n", regno); return (j >> TR_CDC_DATA) & 0xffff; } @@ -242,17 +229,17 @@ switch (tr->type) { case SPA_PCI_ID: - treg=SPA_REG_CODECWR; - trw=SPA_CDC_RWSTAT; + treg = SPA_REG_CODECWR; + trw = SPA_CDC_RWSTAT; break; case ALI_PCI_ID: case TDX_PCI_ID: - treg=TDX_REG_CODECWR; - trw=TDX_CDC_RWSTAT; + treg = TDX_REG_CODECWR; + trw = TDX_CDC_RWSTAT; break; case TNX_PCI_ID: - treg=TNX_REG_CODECWR; - trw=TNX_CDC_RWSTAT | ((regno & 0x100)? TNX_CDC_SEC : 0); + treg = TNX_REG_CODECWR; + trw = TNX_CDC_RWSTAT | ((regno & 0x100) ? TNX_CDC_SEC : 0); break; default: printf("!!! tr_wrcd defaulted !!!"); @@ -265,7 +252,7 @@ #if 0 printf("tr_wrcd: reg %x was %x", regno, tr_rdcd(devinfo, regno)); #endif - j=trw; + j = trw; snd_mtxlock(tr->lock); if (tr->type == ALI_PCI_ID) { j = trw; @@ -275,14 +262,13 @@ u_int32_t chk1, chk2; chk1 = tr_rd(tr, 0xc8, 4); chk2 = tr_rd(tr, 0xc8, 4); - for (i = TR_TIMEOUT_CDC; (i > 0) && (chk1 == chk2); - i--) + for (i = TR_TIMEOUT_CDC; (i > 0) && (chk1 == chk2); i--) chk2 = tr_rd(tr, 0xc8, 4); } } if (tr->type != ALI_PCI_ID || i > 0) { - for (i=TR_TIMEOUT_CDC; (i>0) && (j & trw); i--) - j=tr_rd(tr, treg, 4); + for (i = TR_TIMEOUT_CDC; (i > 0) && (j & trw); i--) + j = tr_rd(tr, treg, 4); if (tr->type == ALI_PCI_ID && tr->rev > 0x01) trw |= 0x0100; tr_wr(tr, treg, (data << TR_CDC_DATA) | regno | trw, 4); @@ -291,15 +277,13 @@ printf(" - wrote %x, now %x\n", data, tr_rdcd(devinfo, regno)); #endif snd_mtxunlock(tr->lock); - if (i==0) printf("codec timeout writing %x, data %x\n", regno, data); - return (i > 0)? 0 : -1; + if (i == 0) + printf("codec timeout writing %x, data %x\n", regno, data); + return (i > 0) ? 0 : -1; } -static kobj_method_t tr_ac97_methods[] = { - KOBJMETHOD(ac97_read, tr_rdcd), - KOBJMETHOD(ac97_write, tr_wrcd), - KOBJMETHOD_END -}; +static kobj_method_t tr_ac97_methods[] = { KOBJMETHOD(ac97_read, tr_rdcd), + KOBJMETHOD(ac97_write, tr_wrcd), KOBJMETHOD_END }; AC97_DECLARE(tr_ac97); /* -------------------------------------------------------------------- */ @@ -326,7 +310,7 @@ bank = (ch->index & 0x20) ? 1 : 0; chan = ch->index & 0x1f; - tr_wr(tr, bank? TR_REG_ADDRINTB : TR_REG_ADDRINTA, 1 << chan, 4); + tr_wr(tr, bank ? TR_REG_ADDRINTB : TR_REG_ADDRINTA, 1 << chan, 4); } static void @@ -339,11 +323,11 @@ snd_mtxlock(tr->lock); bank = (ch->index & 0x20) ? 1 : 0; chan = ch->index & 0x1f; - reg = bank? TR_REG_INTENB : TR_REG_INTENA; + reg = bank ? TR_REG_INTENB : TR_REG_INTENA; i = tr_rd(tr, reg, 4); i &= ~(1 << chan); - i |= (enable? 1 : 0) << chan; + i |= (enable ? 1 : 0) << chan; tr_clrint(ch); tr_wr(tr, reg, i, 4); @@ -372,7 +356,7 @@ bank = (ch->index & 0x20) ? 1 : 0; chan = ch->index & 0x1f; - tr_wr(tr, bank? TR_REG_STARTB : TR_REG_STARTA, 1 << chan, 4); + tr_wr(tr, bank ? TR_REG_STARTB : TR_REG_STARTA, 1 << chan, 4); } static void @@ -383,7 +367,7 @@ bank = (ch->index & 0x20) ? 1 : 0; chan = ch->index & 0x1f; - tr_wr(tr, bank? TR_REG_STOPB : TR_REG_STOPA, 1 << chan, 4); + tr_wr(tr, bank ? TR_REG_STOPB : TR_REG_STOPA, 1 << chan, 4); } static void @@ -392,25 +376,26 @@ struct tr_info *tr = ch->parent; u_int32_t cr[TR_CHN_REGS], i; - ch->gvsel &= 0x00000001; - ch->fmc &= 0x00000003; - ch->fms &= 0x0000000f; - ch->ctrl &= 0x0000000f; - ch->pan &= 0x0000007f; - ch->rvol &= 0x0000007f; - ch->cvol &= 0x0000007f; - ch->vol &= 0x000000ff; - ch->ec &= 0x00000fff; - ch->alpha &= 0x00000fff; - ch->delta &= 0x0000ffff; + ch->gvsel &= 0x00000001; + ch->fmc &= 0x00000003; + ch->fms &= 0x0000000f; + ch->ctrl &= 0x0000000f; + ch->pan &= 0x0000007f; + ch->rvol &= 0x0000007f; + ch->cvol &= 0x0000007f; + ch->vol &= 0x000000ff; + ch->ec &= 0x00000fff; + ch->alpha &= 0x00000fff; + ch->delta &= 0x0000ffff; if (tr->type == ALI_PCI_ID) ch->lba &= ALI_MAXADDR; else ch->lba &= TR_MAXADDR; - cr[1]=ch->lba; - cr[3]=(ch->fmc<<14) | (ch->rvol<<7) | (ch->cvol); - cr[4]=(ch->gvsel<<31) | (ch->pan<<24) | (ch->vol<<16) | (ch->ctrl<<12) | (ch->ec); + cr[1] = ch->lba; + cr[3] = (ch->fmc << 14) | (ch->rvol << 7) | (ch->cvol); + cr[4] = (ch->gvsel << 31) | (ch->pan << 24) | (ch->vol << 16) | + (ch->ctrl << 12) | (ch->ec); switch (tr->type) { case SPA_PCI_ID: @@ -418,21 +403,21 @@ case TDX_PCI_ID: ch->cso &= 0x0000ffff; ch->eso &= 0x0000ffff; - cr[0]=(ch->cso<<16) | (ch->alpha<<4) | (ch->fms); - cr[2]=(ch->eso<<16) | (ch->delta); + cr[0] = (ch->cso << 16) | (ch->alpha << 4) | (ch->fms); + cr[2] = (ch->eso << 16) | (ch->delta); break; case TNX_PCI_ID: ch->cso &= 0x00ffffff; ch->eso &= 0x00ffffff; - cr[0]=((ch->delta & 0xff)<<24) | (ch->cso); - cr[2]=((ch->delta>>8)<<24) | (ch->eso); - cr[3]|=(ch->alpha<<20) | (ch->fms<<16) | (ch->fmc<<14); + cr[0] = ((ch->delta & 0xff) << 24) | (ch->cso); + cr[2] = ((ch->delta >> 8) << 24) | (ch->eso); + cr[3] |= (ch->alpha << 20) | (ch->fms << 16) | (ch->fmc << 14); break; } snd_mtxlock(tr->lock); tr_selch(ch); - for (i=0; ilock); } @@ -444,38 +429,39 @@ snd_mtxlock(tr->lock); tr_selch(ch); - for (i=0; i<5; i++) - cr[i]=tr_rd(tr, TR_REG_CHNBASE+(i<<2), 4); + for (i = 0; i < 5; i++) + cr[i] = tr_rd(tr, TR_REG_CHNBASE + (i << 2), 4); snd_mtxunlock(tr->lock); if (tr->type == ALI_PCI_ID) - ch->lba=(cr[1] & ALI_MAXADDR); + ch->lba = (cr[1] & ALI_MAXADDR); else - ch->lba=(cr[1] & TR_MAXADDR); - ch->fmc= (cr[3] & 0x0000c000) >> 14; - ch->rvol= (cr[3] & 0x00003f80) >> 7; - ch->cvol= (cr[3] & 0x0000007f); - ch->gvsel= (cr[4] & 0x80000000) >> 31; - ch->pan= (cr[4] & 0x7f000000) >> 24; - ch->vol= (cr[4] & 0x00ff0000) >> 16; - ch->ctrl= (cr[4] & 0x0000f000) >> 12; - ch->ec= (cr[4] & 0x00000fff); - switch(tr->type) { + ch->lba = (cr[1] & TR_MAXADDR); + ch->fmc = (cr[3] & 0x0000c000) >> 14; + ch->rvol = (cr[3] & 0x00003f80) >> 7; + ch->cvol = (cr[3] & 0x0000007f); + ch->gvsel = (cr[4] & 0x80000000) >> 31; + ch->pan = (cr[4] & 0x7f000000) >> 24; + ch->vol = (cr[4] & 0x00ff0000) >> 16; + ch->ctrl = (cr[4] & 0x0000f000) >> 12; + ch->ec = (cr[4] & 0x00000fff); + switch (tr->type) { case SPA_PCI_ID: case ALI_PCI_ID: case TDX_PCI_ID: - ch->cso= (cr[0] & 0xffff0000) >> 16; - ch->alpha= (cr[0] & 0x0000fff0) >> 4; - ch->fms= (cr[0] & 0x0000000f); - ch->eso= (cr[2] & 0xffff0000) >> 16; - ch->delta= (cr[2] & 0x0000ffff); + ch->cso = (cr[0] & 0xffff0000) >> 16; + ch->alpha = (cr[0] & 0x0000fff0) >> 4; + ch->fms = (cr[0] & 0x0000000f); + ch->eso = (cr[2] & 0xffff0000) >> 16; + ch->delta = (cr[2] & 0x0000ffff); break; case TNX_PCI_ID: - ch->cso= (cr[0] & 0x00ffffff); - ch->eso= (cr[2] & 0x00ffffff); - ch->delta= ((cr[2] & 0xff000000) >> 16) | ((cr[0] & 0xff000000) >> 24); - ch->alpha= (cr[3] & 0xfff00000) >> 20; - ch->fms= (cr[3] & 0x000f0000) >> 16; + ch->cso = (cr[0] & 0x00ffffff); + ch->eso = (cr[2] & 0x00ffffff); + ch->delta = ((cr[2] & 0xff000000) >> 16) | + ((cr[0] & 0xff000000) >> 24); + ch->alpha = (cr[3] & 0xfff00000) >> 20; + ch->fms = (cr[3] & 0x000f0000) >> 16; break; } } @@ -486,9 +472,9 @@ u_int32_t bits; bits = 0; - bits |= (fmt & AFMT_SIGNED)? 0x2 : 0; - bits |= (AFMT_CHANNEL(fmt) > 1)? 0x4 : 0; - bits |= (fmt & AFMT_16BIT)? 0x8 : 0; + bits |= (fmt & AFMT_SIGNED) ? 0x2 : 0; + bits |= (AFMT_CHANNEL(fmt) > 1) ? 0x4 : 0; + bits |= (fmt & AFMT_16BIT) ? 0x8 : 0; return bits; } @@ -497,7 +483,8 @@ /* channel interface */ static void * -trpchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +trpchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { struct tr_info *tr = devinfo; struct tr_chinfo *ch; @@ -557,7 +544,9 @@ ch->alpha = 0; ch->lba = sndbuf_getbufaddr(ch->buffer); ch->cso = 0; - ch->eso = (sndbuf_getsize(ch->buffer) / sndbuf_getalign(ch->buffer)) - 1; + ch->eso = (sndbuf_getsize(ch->buffer) / + sndbuf_getalign(ch->buffer)) - + 1; ch->rvol = ch->cvol = 0x7f; ch->gvsel = 0; ch->pan = 0; @@ -590,23 +579,22 @@ return &tr_playcaps; } -static kobj_method_t trpchan_methods[] = { - KOBJMETHOD(channel_init, trpchan_init), - KOBJMETHOD(channel_setformat, trpchan_setformat), - KOBJMETHOD(channel_setspeed, trpchan_setspeed), - KOBJMETHOD(channel_setblocksize, trpchan_setblocksize), - KOBJMETHOD(channel_trigger, trpchan_trigger), - KOBJMETHOD(channel_getptr, trpchan_getptr), - KOBJMETHOD(channel_getcaps, trpchan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t trpchan_methods[] = { KOBJMETHOD(channel_init, + trpchan_init), + KOBJMETHOD(channel_setformat, trpchan_setformat), + KOBJMETHOD(channel_setspeed, trpchan_setspeed), + KOBJMETHOD(channel_setblocksize, trpchan_setblocksize), + KOBJMETHOD(channel_trigger, trpchan_trigger), + KOBJMETHOD(channel_getptr, trpchan_getptr), + KOBJMETHOD(channel_getcaps, trpchan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(trpchan); /* -------------------------------------------------------------------- */ /* rec channel interface */ static void * -trrchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +trrchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { struct tr_info *tr = devinfo; struct tr_rchinfo *ch; @@ -631,7 +619,7 @@ bits = tr_fmttobits(format); /* set # of samples between interrupts */ - i = (sndbuf_runsz(ch->buffer) >> ((bits & 0x08)? 1 : 0)) - 1; + i = (sndbuf_runsz(ch->buffer) >> ((bits & 0x08) ? 1 : 0)) - 1; tr_wr(tr, TR_REG_SBBL, i | (i << 16), 4); /* set sample format */ i = 0x18 | (bits << 4); @@ -712,16 +700,14 @@ return &tr_reccaps; } -static kobj_method_t trrchan_methods[] = { - KOBJMETHOD(channel_init, trrchan_init), - KOBJMETHOD(channel_setformat, trrchan_setformat), - KOBJMETHOD(channel_setspeed, trrchan_setspeed), - KOBJMETHOD(channel_setblocksize, trrchan_setblocksize), - KOBJMETHOD(channel_trigger, trrchan_trigger), - KOBJMETHOD(channel_getptr, trrchan_getptr), - KOBJMETHOD(channel_getcaps, trrchan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t trrchan_methods[] = { KOBJMETHOD(channel_init, + trrchan_init), + KOBJMETHOD(channel_setformat, trrchan_setformat), + KOBJMETHOD(channel_setspeed, trrchan_setspeed), + KOBJMETHOD(channel_setblocksize, trrchan_setblocksize), + KOBJMETHOD(channel_trigger, trrchan_trigger), + KOBJMETHOD(channel_getptr, trrchan_getptr), + KOBJMETHOD(channel_getcaps, trrchan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(trrchan); /* -------------------------------------------------------------------- */ @@ -740,18 +726,27 @@ chnum = 0; while (chnum < tr->hwchns) { mask = 0x00000001; - active = tr_rd(tr, (chnum < 32)? TR_REG_ADDRINTA : TR_REG_ADDRINTB, 4); - bufhalf = tr_rd(tr, (chnum < 32)? TR_REG_CSPF_A : TR_REG_CSPF_B, 4); + active = tr_rd(tr, + (chnum < 32) ? TR_REG_ADDRINTA : TR_REG_ADDRINTB, + 4); + bufhalf = tr_rd(tr, + (chnum < 32) ? TR_REG_CSPF_A : TR_REG_CSPF_B, 4); if (active) { do { if (active & mask) { - tmp = (bufhalf & mask)? 1 : 0; + tmp = (bufhalf & mask) ? 1 : 0; if (chnum < tr->playchns) { ch = &tr->chinfo[chnum]; - /* printf("%d @ %d, ", chnum, trpchan_getptr(NULL, ch)); */ - if (ch->bufhalf != tmp) { - chn_intr(ch->channel); - ch->bufhalf = tmp; + /* printf("%d @ %d, ", + * chnum, + * trpchan_getptr(NULL, + * ch)); */ + if (ch->bufhalf != + tmp) { + chn_intr( + ch->channel); + ch->bufhalf = + tmp; } } } @@ -761,7 +756,9 @@ } else chnum += 32; - tr_wr(tr, (chnum <= 32)? TR_REG_ADDRINTA : TR_REG_ADDRINTB, active, 4); + tr_wr(tr, + (chnum <= 32) ? TR_REG_ADDRINTA : TR_REG_ADDRINTB, + active, 4); } } if (intsrc & TR_INT_SB) { @@ -801,18 +798,18 @@ tr_pci_probe(device_t dev) { switch (pci_get_devid(dev)) { - case SPA_PCI_ID: - device_set_desc(dev, "SiS 7018"); - return BUS_PROBE_DEFAULT; - case ALI_PCI_ID: - device_set_desc(dev, "Acer Labs M5451"); - return BUS_PROBE_DEFAULT; - case TDX_PCI_ID: - device_set_desc(dev, "Trident 4DWave DX"); - return BUS_PROBE_DEFAULT; - case TNX_PCI_ID: - device_set_desc(dev, "Trident 4DWave NX"); - return BUS_PROBE_DEFAULT; + case SPA_PCI_ID: + device_set_desc(dev, "SiS 7018"); + return BUS_PROBE_DEFAULT; + case ALI_PCI_ID: + device_set_desc(dev, "Acer Labs M5451"); + return BUS_PROBE_DEFAULT; + case TDX_PCI_ID: + device_set_desc(dev, "Trident 4DWave DX"); + return BUS_PROBE_DEFAULT; + case TNX_PCI_ID: + device_set_desc(dev, "Trident 4DWave NX"); + return BUS_PROBE_DEFAULT; } return ENXIO; @@ -823,9 +820,9 @@ { struct tr_info *tr; struct ac97_info *codec = NULL; - bus_addr_t lowaddr; - int i, dacn; - char status[SND_STATUSLEN]; + bus_addr_t lowaddr; + int i, dacn; + char status[SND_STATUSLEN]; tr = malloc(sizeof(*tr), M_DEVBUF, M_WAITOK | M_ZERO); tr->type = pci_get_devid(dev); @@ -833,7 +830,7 @@ tr->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_t4dwave softc"); if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "dac", &i) == 0) { + "dac", &i) == 0) { if (i < 1) dacn = 1; else if (i > TR_MAXPLAYCH) @@ -856,7 +853,7 @@ tr->regid = PCIR_BAR(0); tr->regtype = SYS_RES_IOPORT; tr->reg = bus_alloc_resource_any(dev, tr->regtype, &tr->regid, - RF_ACTIVE); + RF_ACTIVE); if (tr->reg) { tr->st = rman_get_bustag(tr->reg); tr->sh = rman_get_bushandle(tr->reg); @@ -872,12 +869,14 @@ tr->playchns = 0; codec = AC97_CREATE(dev, tr, tr_ac97); - if (codec == NULL) goto bad; - if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) goto bad; + if (codec == NULL) + goto bad; + if (mixer_init(dev, ac97_getmixerclass(), codec) == -1) + goto bad; tr->irqid = 0; tr->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &tr->irqid, - RF_ACTIVE | RF_SHAREABLE); + RF_ACTIVE | RF_SHAREABLE); if (!tr->irq || snd_setup_intr(dev, tr->irq, 0, tr_intr, tr, &tr->ih)) { device_printf(dev, "unable to map interrupt\n"); goto bad; @@ -904,22 +903,22 @@ 65536); } - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), - /*alignment*/TR_BUFALGN, - /*boundary*/0, - /*lowaddr*/lowaddr, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/tr->bufsz, /*nsegments*/1, /*maxsegz*/tr->bufsz, - /*flags*/0, /*lockfunc*/NULL, /*lockarg*/NULL, + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), + /*alignment*/ TR_BUFALGN, + /*boundary*/ 0, + /*lowaddr*/ lowaddr, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ tr->bufsz, /*nsegments*/ 1, /*maxsegz*/ tr->bufsz, + /*flags*/ 0, /*lockfunc*/ NULL, /*lockarg*/ NULL, &tr->parent_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } snprintf(status, SND_STATUSLEN, "port 0x%jx irq %jd on %s", - rman_get_start(tr->reg), rman_get_start(tr->irq), - device_get_nameunit(device_get_parent(dev))); + rman_get_start(tr->reg), rman_get_start(tr->irq), + device_get_nameunit(device_get_parent(dev))); if (pcm_register(dev, tr, dacn, 1)) goto bad; @@ -931,12 +930,18 @@ return 0; bad: - if (codec) ac97_destroy(codec); - if (tr->reg) bus_release_resource(dev, tr->regtype, tr->regid, tr->reg); - if (tr->ih) bus_teardown_intr(dev, tr->irq, tr->ih); - if (tr->irq) bus_release_resource(dev, SYS_RES_IRQ, tr->irqid, tr->irq); - if (tr->parent_dmat) bus_dma_tag_destroy(tr->parent_dmat); - if (tr->lock) snd_mtxfree(tr->lock); + if (codec) + ac97_destroy(codec); + if (tr->reg) + bus_release_resource(dev, tr->regtype, tr->regid, tr->reg); + if (tr->ih) + bus_teardown_intr(dev, tr->irq, tr->ih); + if (tr->irq) + bus_release_resource(dev, SYS_RES_IRQ, tr->irqid, tr->irq); + if (tr->parent_dmat) + bus_dma_tag_destroy(tr->parent_dmat); + if (tr->lock) + snd_mtxfree(tr->lock); free(tr, M_DEVBUF); return ENXIO; } @@ -1018,12 +1023,11 @@ static device_method_t tr_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, tr_pci_probe), - DEVMETHOD(device_attach, tr_pci_attach), - DEVMETHOD(device_detach, tr_pci_detach), - DEVMETHOD(device_suspend, tr_pci_suspend), - DEVMETHOD(device_resume, tr_pci_resume), - { 0, 0 } + DEVMETHOD(device_probe, tr_pci_probe), + DEVMETHOD(device_attach, tr_pci_attach), + DEVMETHOD(device_detach, tr_pci_detach), + DEVMETHOD(device_suspend, tr_pci_suspend), + DEVMETHOD(device_resume, tr_pci_resume), { 0, 0 } }; static driver_t tr_driver = { Index: sys/dev/sound/pci/via8233.h =================================================================== --- sys/dev/sound/pci/via8233.h +++ sys/dev/sound/pci/via8233.h @@ -39,128 +39,127 @@ * o ALSA driver (very useful comments) */ -#define VIA_PCI_SPDIF 0x49 -#define VIA_SPDIF_EN 0x08 - -#define VIA_DXS0_BASE 0x00 -#define VIA_DXS1_BASE 0x10 -#define VIA_DXS2_BASE 0x20 -#define VIA_DXS3_BASE 0x30 -#define VIA_DXS_BASE(n) (0x10 * (n)) -#define BASE_IS_VIA_DXS_REG(x) ((x) <= VIA_DXS3_BASE) - -#define VIA8233_RP_DXS_LVOL 0x02 -#define VIA8233_RP_DXS_RVOL 0x03 -#define VIA8233_DXS_MUTE 0x3f -#define VIA8233_RP_DXS_RATEFMT 0x08 -#define VIA8233_DXS_STOP_INDEX 0xff000000 -#define VIA8233_DXS_RATEFMT_48K 0x000fffff -#define VIA8233_DXS_RATEFMT_STEREO 0x00100000 -#define VIA8233_DXS_RATEFMT_16BIT 0x00200000 - -#define VIA_PCI_ACLINK_STAT 0x40 -# define VIA_PCI_ACLINK_C11_READY 0x20 -# define VIA_PCI_ACLINK_C10_READY 0x10 -# define VIA_PCI_ACLINK_C01_READY 0x04 -# define VIA_PCI_ACLINK_LOW_POWER 0x02 -# define VIA_PCI_ACLINK_C00_READY 0x01 - -#define VIA_PCI_ACLINK_CTRL 0x41 -# define VIA_PCI_ACLINK_EN 0x80 -# define VIA_PCI_ACLINK_NRST 0x40 -# define VIA_PCI_ACLINK_SYNC 0x20 -# define VIA_PCI_ACLINK_SERIAL 0x10 -# define VIA_PCI_ACLINK_VRATE 0x08 -# define VIA_PCI_ACLINK_SGD 0x04 -# define VIA_PCI_ACLINK_DESIRED (VIA_PCI_ACLINK_EN | \ - VIA_PCI_ACLINK_NRST | \ - VIA_PCI_ACLINK_VRATE | \ - VIA_PCI_ACLINK_SGD) - -#define VIA_MC_SGD_STATUS 0x40 -#define VIA_WR0_SGD_STATUS 0x60 -#define VIA_WR1_SGD_STATUS 0x70 -# define SGD_STATUS_ACTIVE 0x80 -# define SGD_STATUS_AT_STOP 0x40 -# define SGD_STATUS_TRIGGER_Q 0x08 -# define SGD_STATUS_STOP_I_S 0x04 -# define SGD_STATUS_EOL 0x02 -# define SGD_STATUS_FLAG 0x01 -# define SGD_STATUS_INTR (SGD_STATUS_EOL | SGD_STATUS_FLAG) - -#define VIA_WR_BASE(n) (0x60 + (n) * 0x10) - -#define VIA_MC_SGD_CONTROL 0x41 -#define VIA_WR0_SGD_CONTROL 0x61 -#define VIA_WR1_SGD_CONTROL 0x71 -# define SGD_CONTROL_START 0x80 -# define SGD_CONTROL_STOP 0x40 -# define SGD_CONTROL_AUTOSTART 0x20 -# define SGD_CONTROL_PAUSE 0x08 -# define SGD_CONTROL_I_STOP 0x04 -# define SGD_CONTROL_I_EOL 0x02 -# define SGD_CONTROL_I_FLAG 0x01 - -#define VIA_MC_SGD_FORMAT 0x42 -# define MC_SGD_16BIT 0x80 -# define MC_SGD_8BIT 0x00 -# define MC_SGD_CHANNELS(x) (((x)& 0x07) << 4) - -#define VIA_WR0_SGD_FORMAT 0x62 -#define VIA_WR1_SGD_FORMAT 0x72 -#define VIA_WR_RP_SGD_FORMAT 0x02 -# define WR_FIFO_ENABLE 0x40 - -#define VIA_WR0_SGD_INPUT 0x63 -#define VIA_WR1_SGD_INPUT 0x73 -# define WR_LINE_IN 0x00 -# define WR_MIC_IN 0x04 -# define WR_PRIMARY_CODEC 0x00 -# define WR_SECONDARY_CODEC1 0x01 -# define WR_SECONDARY_CODEC2 0x02 -# define WR_SECONDARY_CODEC3 0x03 - -#define VIA_MC_TABLE_PTR_BASE 0x44 -#define VIA_WR0_TABLE_PTR_BASE 0x64 -#define VIA_WR1_TABLE_PTR_BASE 0x74 - -#define VIA_MC_SLOT_SELECT 0x48 -# define SLOT3(x) (x) -# define SLOT4(x) ((x) << 4) -# define SLOT7(x) ((x) << 8) -# define SLOT8(x) ((x) << 12) -# define SLOT6(x) ((x) << 16) -# define SLOT9(x) ((x) << 20) - -#define VIA_MC_CURRENT_COUNT 0x4c - -#define VIA_WR0_FORMAT 0x68 -#define VIA_WR1_FORMAT 0x78 -# define WR_FORMAT_STOP_INDEX 0xff000000 -# define WR_FORMAT_STEREO 0x00100000 -# define WR_FORMAT_16BIT 0x00200000 +#define VIA_PCI_SPDIF 0x49 +#define VIA_SPDIF_EN 0x08 + +#define VIA_DXS0_BASE 0x00 +#define VIA_DXS1_BASE 0x10 +#define VIA_DXS2_BASE 0x20 +#define VIA_DXS3_BASE 0x30 +#define VIA_DXS_BASE(n) (0x10 * (n)) +#define BASE_IS_VIA_DXS_REG(x) ((x) <= VIA_DXS3_BASE) + +#define VIA8233_RP_DXS_LVOL 0x02 +#define VIA8233_RP_DXS_RVOL 0x03 +#define VIA8233_DXS_MUTE 0x3f +#define VIA8233_RP_DXS_RATEFMT 0x08 +#define VIA8233_DXS_STOP_INDEX 0xff000000 +#define VIA8233_DXS_RATEFMT_48K 0x000fffff +#define VIA8233_DXS_RATEFMT_STEREO 0x00100000 +#define VIA8233_DXS_RATEFMT_16BIT 0x00200000 + +#define VIA_PCI_ACLINK_STAT 0x40 +#define VIA_PCI_ACLINK_C11_READY 0x20 +#define VIA_PCI_ACLINK_C10_READY 0x10 +#define VIA_PCI_ACLINK_C01_READY 0x04 +#define VIA_PCI_ACLINK_LOW_POWER 0x02 +#define VIA_PCI_ACLINK_C00_READY 0x01 + +#define VIA_PCI_ACLINK_CTRL 0x41 +#define VIA_PCI_ACLINK_EN 0x80 +#define VIA_PCI_ACLINK_NRST 0x40 +#define VIA_PCI_ACLINK_SYNC 0x20 +#define VIA_PCI_ACLINK_SERIAL 0x10 +#define VIA_PCI_ACLINK_VRATE 0x08 +#define VIA_PCI_ACLINK_SGD 0x04 +#define VIA_PCI_ACLINK_DESIRED \ + (VIA_PCI_ACLINK_EN | VIA_PCI_ACLINK_NRST | VIA_PCI_ACLINK_VRATE | \ + VIA_PCI_ACLINK_SGD) + +#define VIA_MC_SGD_STATUS 0x40 +#define VIA_WR0_SGD_STATUS 0x60 +#define VIA_WR1_SGD_STATUS 0x70 +#define SGD_STATUS_ACTIVE 0x80 +#define SGD_STATUS_AT_STOP 0x40 +#define SGD_STATUS_TRIGGER_Q 0x08 +#define SGD_STATUS_STOP_I_S 0x04 +#define SGD_STATUS_EOL 0x02 +#define SGD_STATUS_FLAG 0x01 +#define SGD_STATUS_INTR (SGD_STATUS_EOL | SGD_STATUS_FLAG) + +#define VIA_WR_BASE(n) (0x60 + (n) * 0x10) + +#define VIA_MC_SGD_CONTROL 0x41 +#define VIA_WR0_SGD_CONTROL 0x61 +#define VIA_WR1_SGD_CONTROL 0x71 +#define SGD_CONTROL_START 0x80 +#define SGD_CONTROL_STOP 0x40 +#define SGD_CONTROL_AUTOSTART 0x20 +#define SGD_CONTROL_PAUSE 0x08 +#define SGD_CONTROL_I_STOP 0x04 +#define SGD_CONTROL_I_EOL 0x02 +#define SGD_CONTROL_I_FLAG 0x01 + +#define VIA_MC_SGD_FORMAT 0x42 +#define MC_SGD_16BIT 0x80 +#define MC_SGD_8BIT 0x00 +#define MC_SGD_CHANNELS(x) (((x) & 0x07) << 4) + +#define VIA_WR0_SGD_FORMAT 0x62 +#define VIA_WR1_SGD_FORMAT 0x72 +#define VIA_WR_RP_SGD_FORMAT 0x02 +#define WR_FIFO_ENABLE 0x40 + +#define VIA_WR0_SGD_INPUT 0x63 +#define VIA_WR1_SGD_INPUT 0x73 +#define WR_LINE_IN 0x00 +#define WR_MIC_IN 0x04 +#define WR_PRIMARY_CODEC 0x00 +#define WR_SECONDARY_CODEC1 0x01 +#define WR_SECONDARY_CODEC2 0x02 +#define WR_SECONDARY_CODEC3 0x03 + +#define VIA_MC_TABLE_PTR_BASE 0x44 +#define VIA_WR0_TABLE_PTR_BASE 0x64 +#define VIA_WR1_TABLE_PTR_BASE 0x74 + +#define VIA_MC_SLOT_SELECT 0x48 +#define SLOT3(x) (x) +#define SLOT4(x) ((x) << 4) +#define SLOT7(x) ((x) << 8) +#define SLOT8(x) ((x) << 12) +#define SLOT6(x) ((x) << 16) +#define SLOT9(x) ((x) << 20) + +#define VIA_MC_CURRENT_COUNT 0x4c + +#define VIA_WR0_FORMAT 0x68 +#define VIA_WR1_FORMAT 0x78 +#define WR_FORMAT_STOP_INDEX 0xff000000 +#define WR_FORMAT_STEREO 0x00100000 +#define WR_FORMAT_16BIT 0x00200000 /* Relative offsets */ -#define VIA_RP_STATUS 0x00 -#define VIA_RP_CONTROL 0x01 -#define VIA_RP_TABLE_PTR 0x04 -#define VIA_RP_CURRENT_COUNT 0x0c - -#define VIA_AC97_CONTROL 0x80 -# define VIA_AC97_CODECID11 0xc0000000 -# define VIA_AC97_CODECID10 0x80000000 -# define VIA_AC97_CODECID01 0x40000000 -# define VIA_AC97_CODEC11_VALID 0x20000000 -# define VIA_AC97_CODEC10_VALID 0x10000000 -# define VIA_AC97_CODEC01_VALID 0x08000000 -# define VIA_AC97_CODEC00_VALID 0x02000000 -# define VIA_AC97_BUSY 0x01000000 -# define VIA_AC97_READ 0x00800000 -# define VIA_AC97_INDEX(x) ((x) << 16) -# define VIA_AC97_DATA(x) ((x) & 0xffff) - -#define VIA_CODEC_BUSY 0x01000000 -#define VIA_CODEC_PRIVALID 0x02000000 -#define VIA_CODEC_INDEX(x) ((x)<<16) +#define VIA_RP_STATUS 0x00 +#define VIA_RP_CONTROL 0x01 +#define VIA_RP_TABLE_PTR 0x04 +#define VIA_RP_CURRENT_COUNT 0x0c + +#define VIA_AC97_CONTROL 0x80 +#define VIA_AC97_CODECID11 0xc0000000 +#define VIA_AC97_CODECID10 0x80000000 +#define VIA_AC97_CODECID01 0x40000000 +#define VIA_AC97_CODEC11_VALID 0x20000000 +#define VIA_AC97_CODEC10_VALID 0x10000000 +#define VIA_AC97_CODEC01_VALID 0x08000000 +#define VIA_AC97_CODEC00_VALID 0x02000000 +#define VIA_AC97_BUSY 0x01000000 +#define VIA_AC97_READ 0x00800000 +#define VIA_AC97_INDEX(x) ((x) << 16) +#define VIA_AC97_DATA(x) ((x) & 0xffff) + +#define VIA_CODEC_BUSY 0x01000000 +#define VIA_CODEC_PRIVALID 0x02000000 +#define VIA_CODEC_INDEX(x) ((x) << 16) #endif /* SYS_SOUND_PCI_VIA8233_H_ */ Index: sys/dev/sound/pci/via8233.c =================================================================== --- sys/dev/sound/pci/via8233.c +++ sys/dev/sound/pci/via8233.c @@ -41,47 +41,46 @@ #include "opt_snd.h" #endif -#include -#include +#include #include #include -#include - #include +#include +#include #define VIA8233_PCI_ID 0x30591106 -#define VIA8233_REV_ID_8233PRE 0x10 -#define VIA8233_REV_ID_8233C 0x20 -#define VIA8233_REV_ID_8233 0x30 -#define VIA8233_REV_ID_8233A 0x40 -#define VIA8233_REV_ID_8235 0x50 -#define VIA8233_REV_ID_8237 0x60 -#define VIA8233_REV_ID_8251 0x70 - -#define SEGS_PER_CHAN 2 /* Segments per channel */ -#define NDXSCHANS 4 /* No of DXS channels */ -#define NMSGDCHANS 1 /* No of multichannel SGD */ -#define NWRCHANS 1 /* No of write channels */ -#define NCHANS (NWRCHANS + NDXSCHANS + NMSGDCHANS) -#define NSEGS NCHANS * SEGS_PER_CHAN /* Segments in SGD table */ -#define VIA_SEGS_MIN 2 -#define VIA_SEGS_MAX 64 -#define VIA_SEGS_DEFAULT 2 -#define VIA_BLK_MIN 32 -#define VIA_BLK_ALIGN (~(VIA_BLK_MIN - 1)) - -#define VIA_DEFAULT_BUFSZ 0x1000 +#define VIA8233_REV_ID_8233PRE 0x10 +#define VIA8233_REV_ID_8233C 0x20 +#define VIA8233_REV_ID_8233 0x30 +#define VIA8233_REV_ID_8233A 0x40 +#define VIA8233_REV_ID_8235 0x50 +#define VIA8233_REV_ID_8237 0x60 +#define VIA8233_REV_ID_8251 0x70 + +#define SEGS_PER_CHAN 2 /* Segments per channel */ +#define NDXSCHANS 4 /* No of DXS channels */ +#define NMSGDCHANS 1 /* No of multichannel SGD */ +#define NWRCHANS 1 /* No of write channels */ +#define NCHANS (NWRCHANS + NDXSCHANS + NMSGDCHANS) +#define NSEGS NCHANS *SEGS_PER_CHAN /* Segments in SGD table */ +#define VIA_SEGS_MIN 2 +#define VIA_SEGS_MAX 64 +#define VIA_SEGS_DEFAULT 2 +#define VIA_BLK_MIN 32 +#define VIA_BLK_ALIGN (~(VIA_BLK_MIN - 1)) + +#define VIA_DEFAULT_BUFSZ 0x1000 /* we rely on this struct being packed to 64 bits */ struct via_dma_op { volatile uint32_t ptr; volatile uint32_t flags; -#define VIA_DMAOP_EOL 0x80000000 -#define VIA_DMAOP_FLAG 0x40000000 -#define VIA_DMAOP_STOP 0x20000000 -#define VIA_DMAOP_COUNT(x) ((x)&0x00FFFFFF) +#define VIA_DMAOP_EOL 0x80000000 +#define VIA_DMAOP_FLAG 0x40000000 +#define VIA_DMAOP_STOP 0x20000000 +#define VIA_DMAOP_COUNT(x) ((x) & 0x00FFFFFF) }; struct via_info; @@ -126,13 +125,9 @@ int poll_ticks, polling; }; -static uint32_t via_fmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; +static uint32_t via_fmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; static struct pcmchan_caps via_vracaps = { 4000, 48000, via_fmt, 0 }; static struct pcmchan_caps via_caps = { 48000, 48000, via_fmt, 0 }; @@ -256,18 +251,18 @@ as discussed on multimedia@ in msg-id <861wujij2q.fsf@xps.des.no> */ SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "spdif_enabled", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, - dev, sizeof(dev), sysctl_via8233_spdif_enable, "I", + "spdif_enabled", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev, + sizeof(dev), sysctl_via8233_spdif_enable, "I", "Enable S/PDIF output on primary playback channel"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "dxs_src", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, - dev, sizeof(dev), sysctl_via8233_dxs_src, "I", + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "dxs_src", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev, sizeof(dev), + sysctl_via8233_dxs_src, "I", "Enable VIA DXS Sample Rate Converter"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "polling", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, - dev, sizeof(dev), sysctl_via_polling, "I", "Enable polling mode"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "polling", + CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev, sizeof(dev), + sysctl_via_polling, "I", "Enable polling mode"); } static __inline uint32_t @@ -344,8 +339,8 @@ return (-1); via_wr(via, VIA_AC97_CONTROL, - VIA_AC97_CODEC00_VALID | VIA_AC97_INDEX(reg) | - VIA_AC97_DATA(val), 4); + VIA_AC97_CODEC00_VALID | VIA_AC97_INDEX(reg) | VIA_AC97_DATA(val), + 4); return (0); } @@ -358,8 +353,8 @@ if (via_waitready_codec(via)) return (-1); - via_wr(via, VIA_AC97_CONTROL, VIA_AC97_CODEC00_VALID | - VIA_AC97_READ | VIA_AC97_INDEX(reg), 4); + via_wr(via, VIA_AC97_CONTROL, + VIA_AC97_CODEC00_VALID | VIA_AC97_READ | VIA_AC97_INDEX(reg), 4); if (via_waitready_codec(via)) return (-1); @@ -370,11 +365,9 @@ return (via_rd(via, VIA_AC97_CONTROL, 2)); } -static kobj_method_t via_ac97_methods[] = { - KOBJMETHOD(ac97_read, via_read_codec), - KOBJMETHOD(ac97_write, via_write_codec), - KOBJMETHOD_END -}; +static kobj_method_t via_ac97_methods[] = { KOBJMETHOD(ac97_read, + via_read_codec), + KOBJMETHOD(ac97_write, via_write_codec), KOBJMETHOD_END }; AC97_DECLARE(via_ac97); /* -------------------------------------------------------------------- */ @@ -447,7 +440,7 @@ struct via_info *via = ch->parent; uint32_t s = 0xff000000; - uint8_t v = (format & AFMT_S16_LE) ? MC_SGD_16BIT : MC_SGD_8BIT; + uint8_t v = (format & AFMT_S16_LE) ? MC_SGD_16BIT : MC_SGD_8BIT; if (AFMT_CHANNEL(format) > 1) { v |= MC_SGD_CHANNELS(2); @@ -560,8 +553,8 @@ /* Common functions */ static int -via8233chan_setfragments(kobj_t obj, void *data, - uint32_t blksz, uint32_t blkcnt) +via8233chan_setfragments(kobj_t obj, void *data, uint32_t blksz, + uint32_t blkcnt) { struct via_chinfo *ch = data; struct via_info *via = ch->parent; @@ -587,7 +580,7 @@ } if ((sndbuf_getblksz(ch->buffer) != blksz || - sndbuf_getblkcnt(ch->buffer) != blkcnt) && + sndbuf_getblkcnt(ch->buffer) != blkcnt) && sndbuf_resize(ch->buffer, blkcnt, blksz) != 0) device_printf(via->dev, "%s: failed blksz=%u blkcnt=%u\n", __func__, blksz, blkcnt); @@ -623,10 +616,10 @@ } else { v = via_rd(via, ch->rbase + VIA_RP_CURRENT_COUNT, 4); snd_mtxunlock(via->lock); - index = v >> 24; /* Last completed buffer */ - count = v & 0x00ffffff; /* Bytes remaining */ + index = v >> 24; /* Last completed buffer */ + count = v & 0x00ffffff; /* Bytes remaining */ ptr = (index + 1) * ch->blksz - count; - ptr %= ch->blkcnt * ch->blksz; /* Wrap to available space */ + ptr %= ch->blkcnt * ch->blksz; /* Wrap to available space */ } return (ptr); @@ -637,8 +630,8 @@ { via_wr(via, ch->rbase + VIA_RP_CONTROL, SGD_CONTROL_STOP, 1); via_wr(via, ch->rbase + VIA_RP_CONTROL, 0x00, 1); - via_wr(via, ch->rbase + VIA_RP_STATUS, - SGD_STATUS_EOL | SGD_STATUS_FLAG, 1); + via_wr(via, ch->rbase + VIA_RP_STATUS, SGD_STATUS_EOL | SGD_STATUS_FLAG, + 1); } /* -------------------------------------------------------------------- */ @@ -648,13 +641,13 @@ via8233chan_sgdinit(struct via_info *via, struct via_chinfo *ch, int chnum) { ch->sgd_table = &via->sgd_table[chnum * VIA_SEGS_MAX]; - ch->sgd_addr = via->sgd_addr + chnum * VIA_SEGS_MAX * - sizeof(struct via_dma_op); + ch->sgd_addr = via->sgd_addr + + chnum * VIA_SEGS_MAX * sizeof(struct via_dma_op); } -static void* +static void * via8233wr_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, - struct pcm_channel *c, int dir) + struct pcm_channel *c, int dir) { struct via_info *via = devinfo; struct via_chinfo *ch; @@ -683,9 +676,9 @@ return (ch); } -static void* +static void * via8233dxs_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, - struct pcm_channel *c, int dir) + struct pcm_channel *c, int dir) { struct via_info *via = devinfo; struct via_chinfo *ch; @@ -720,9 +713,9 @@ return (ch); } -static void* +static void * via8233msgd_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, - struct pcm_channel *c, int dir) + struct pcm_channel *c, int dir) { struct via_info *via = devinfo; struct via_chinfo *ch; @@ -763,7 +756,8 @@ if (r != muted) device_printf(via->dev, "%s: failed to set dxs volume " - "(dxs base 0x%02x).\n", __func__, ch->rbase); + "(dxs base 0x%02x).\n", + __func__, ch->rbase); } } @@ -814,15 +808,15 @@ } for (i = 0; i < NDXSCHANS + NMSGDCHANS; i++) - ptrigger |= (via_poll_channel(&via->pch[i]) != 0) ? - (1 << i) : 0; + ptrigger |= (via_poll_channel(&via->pch[i]) != 0) ? (1 << i) : + 0; for (i = 0; i < NWRCHANS; i++) - rtrigger |= (via_poll_channel(&via->rch[i]) != 0) ? - (1 << i) : 0; + rtrigger |= (via_poll_channel(&via->rch[i]) != 0) ? (1 << i) : + 0; /* XXX */ - callout_reset(&via->poll_timer, 1/*via->poll_ticks*/, + callout_reset(&via->poll_timer, 1 /*via->poll_ticks*/, via_poll_callback, via); snd_mtxunlock(via->lock); @@ -851,7 +845,7 @@ continue; pollticks = ((uint64_t)hz * ch->blksz) / ((uint64_t)sndbuf_getalign(ch->buffer) * - sndbuf_getspd(ch->buffer)); + sndbuf_getspd(ch->buffer)); pollticks >>= 2; if (pollticks > hz) pollticks = hz; @@ -867,7 +861,7 @@ continue; pollticks = ((uint64_t)hz * ch->blksz) / ((uint64_t)sndbuf_getalign(ch->buffer) * - sndbuf_getspd(ch->buffer)); + sndbuf_getspd(ch->buffer)); pollticks >>= 2; if (pollticks > hz) pollticks = hz; @@ -881,7 +875,7 @@ } static int -via8233chan_trigger(kobj_t obj, void* data, int go) +via8233chan_trigger(kobj_t obj, void *data, int go) { struct via_chinfo *ch = data; struct via_info *via = ch->parent; @@ -891,7 +885,7 @@ return (0); snd_mtxlock(via->lock); - switch(go) { + switch (go) { case PCMTRIG_START: via_buildsgdt(ch); via8233chan_mute(via, ch, 0); @@ -901,7 +895,7 @@ ch->prevptr = 0; pollticks = ((uint64_t)hz * ch->blksz) / ((uint64_t)sndbuf_getalign(ch->buffer) * - sndbuf_getspd(ch->buffer)); + sndbuf_getspd(ch->buffer)); pollticks >>= 2; if (pollticks > hz) pollticks = hz; @@ -915,7 +909,7 @@ __func__, pollticks); else printf("%s: " - "pollticks %d -> %d\n", + "pollticks %d -> %d\n", __func__, via->poll_ticks, pollticks); } @@ -926,8 +920,10 @@ } via_wr(via, ch->rbase + VIA_RP_CONTROL, SGD_CONTROL_START | SGD_CONTROL_AUTOSTART | - ((via->polling == 0) ? - (SGD_CONTROL_I_EOL | SGD_CONTROL_I_FLAG) : 0), 1); + ((via->polling == 0) ? + (SGD_CONTROL_I_EOL | SGD_CONTROL_I_FLAG) : + 0), + 1); ch->active = 1; break; case PCMTRIG_STOP: @@ -945,13 +941,12 @@ if (pollticks > via->poll_ticks) { if (bootverbose) printf("%s: pollticks " - "%d -> %d\n", + "%d -> %d\n", __func__, via->poll_ticks, pollticks); via->poll_ticks = pollticks; - callout_reset(&via->poll_timer, - 1, via_poll_callback, - via); + callout_reset(&via->poll_timer, 1, + via_poll_callback, via); } } } @@ -963,43 +958,37 @@ return (0); } -static kobj_method_t via8233wr_methods[] = { - KOBJMETHOD(channel_init, via8233wr_init), - KOBJMETHOD(channel_setformat, via8233wr_setformat), - KOBJMETHOD(channel_setspeed, via8233wr_setspeed), - KOBJMETHOD(channel_getcaps, via8233wr_getcaps), - KOBJMETHOD(channel_setblocksize, via8233chan_setblocksize), - KOBJMETHOD(channel_setfragments, via8233chan_setfragments), - KOBJMETHOD(channel_trigger, via8233chan_trigger), - KOBJMETHOD(channel_getptr, via8233chan_getptr), - KOBJMETHOD_END -}; +static kobj_method_t via8233wr_methods[] = { KOBJMETHOD(channel_init, + via8233wr_init), + KOBJMETHOD(channel_setformat, via8233wr_setformat), + KOBJMETHOD(channel_setspeed, via8233wr_setspeed), + KOBJMETHOD(channel_getcaps, via8233wr_getcaps), + KOBJMETHOD(channel_setblocksize, via8233chan_setblocksize), + KOBJMETHOD(channel_setfragments, via8233chan_setfragments), + KOBJMETHOD(channel_trigger, via8233chan_trigger), + KOBJMETHOD(channel_getptr, via8233chan_getptr), KOBJMETHOD_END }; CHANNEL_DECLARE(via8233wr); -static kobj_method_t via8233dxs_methods[] = { - KOBJMETHOD(channel_init, via8233dxs_init), - KOBJMETHOD(channel_setformat, via8233dxs_setformat), - KOBJMETHOD(channel_setspeed, via8233dxs_setspeed), - KOBJMETHOD(channel_getcaps, via8233dxs_getcaps), - KOBJMETHOD(channel_setblocksize, via8233chan_setblocksize), - KOBJMETHOD(channel_setfragments, via8233chan_setfragments), - KOBJMETHOD(channel_trigger, via8233chan_trigger), - KOBJMETHOD(channel_getptr, via8233chan_getptr), - KOBJMETHOD_END -}; +static kobj_method_t via8233dxs_methods[] = { KOBJMETHOD(channel_init, + via8233dxs_init), + KOBJMETHOD(channel_setformat, via8233dxs_setformat), + KOBJMETHOD(channel_setspeed, via8233dxs_setspeed), + KOBJMETHOD(channel_getcaps, via8233dxs_getcaps), + KOBJMETHOD(channel_setblocksize, via8233chan_setblocksize), + KOBJMETHOD(channel_setfragments, via8233chan_setfragments), + KOBJMETHOD(channel_trigger, via8233chan_trigger), + KOBJMETHOD(channel_getptr, via8233chan_getptr), KOBJMETHOD_END }; CHANNEL_DECLARE(via8233dxs); -static kobj_method_t via8233msgd_methods[] = { - KOBJMETHOD(channel_init, via8233msgd_init), - KOBJMETHOD(channel_setformat, via8233msgd_setformat), - KOBJMETHOD(channel_setspeed, via8233msgd_setspeed), - KOBJMETHOD(channel_getcaps, via8233msgd_getcaps), - KOBJMETHOD(channel_setblocksize, via8233chan_setblocksize), - KOBJMETHOD(channel_setfragments, via8233chan_setfragments), - KOBJMETHOD(channel_trigger, via8233chan_trigger), - KOBJMETHOD(channel_getptr, via8233chan_getptr), - KOBJMETHOD_END -}; +static kobj_method_t via8233msgd_methods[] = { KOBJMETHOD(channel_init, + via8233msgd_init), + KOBJMETHOD(channel_setformat, via8233msgd_setformat), + KOBJMETHOD(channel_setspeed, via8233msgd_setspeed), + KOBJMETHOD(channel_getcaps, via8233msgd_getcaps), + KOBJMETHOD(channel_setblocksize, via8233chan_setblocksize), + KOBJMETHOD(channel_setfragments, via8233chan_setfragments), + KOBJMETHOD(channel_trigger, via8233chan_trigger), + KOBJMETHOD(channel_getptr, via8233chan_getptr), KOBJMETHOD_END }; CHANNEL_DECLARE(via8233msgd); /* -------------------------------------------------------------------- */ @@ -1023,11 +1012,13 @@ reg = via->pch[i].rbase + VIA_RP_STATUS; stat = via_rd(via, reg, 1); if (stat & SGD_STATUS_INTR) { - if (via->dma_eol_wake && ((stat & SGD_STATUS_EOL) || - !(stat & SGD_STATUS_ACTIVE))) + if (via->dma_eol_wake && + ((stat & SGD_STATUS_EOL) || + !(stat & SGD_STATUS_ACTIVE))) via_wr(via, via->pch[i].rbase + VIA_RP_CONTROL, SGD_CONTROL_START | SGD_CONTROL_AUTOSTART | - SGD_CONTROL_I_EOL | SGD_CONTROL_I_FLAG, 1); + SGD_CONTROL_I_EOL | SGD_CONTROL_I_FLAG, + 1); via_wr(via, reg, stat, 1); ptrigger |= 1 << i; } @@ -1039,11 +1030,13 @@ reg = via->rch[i].rbase + VIA_RP_STATUS; stat = via_rd(via, reg, 1); if (stat & SGD_STATUS_INTR) { - if (via->dma_eol_wake && ((stat & SGD_STATUS_EOL) || - !(stat & SGD_STATUS_ACTIVE))) + if (via->dma_eol_wake && + ((stat & SGD_STATUS_EOL) || + !(stat & SGD_STATUS_ACTIVE))) via_wr(via, via->rch[i].rbase + VIA_RP_CONTROL, SGD_CONTROL_START | SGD_CONTROL_AUTOSTART | - SGD_CONTROL_I_EOL | SGD_CONTROL_I_FLAG, 1); + SGD_CONTROL_I_EOL | SGD_CONTROL_I_FLAG, + 1); via_wr(via, reg, stat, 1); rtrigger |= 1 << i; } @@ -1066,9 +1059,9 @@ static int via_probe(device_t dev) { - switch(pci_get_devid(dev)) { + switch (pci_get_devid(dev)) { case VIA8233_PCI_ID: - switch(pci_get_revid(dev)) { + switch (pci_get_revid(dev)) { case VIA8233_REV_ID_8233PRE: device_set_desc(dev, "VIA VT8233 (pre)"); return (BUS_PROBE_DEFAULT); @@ -1091,7 +1084,7 @@ device_set_desc(dev, "VIA VT8251"); return (BUS_PROBE_DEFAULT); default: - device_set_desc(dev, "VIA VT8233X"); /* Unknown */ + device_set_desc(dev, "VIA VT8233X"); /* Unknown */ return (BUS_PROBE_DEFAULT); } } @@ -1116,8 +1109,8 @@ if ((data & VIA_PCI_ACLINK_C00_READY) == 0) { /* Cold reset per ac97r2.3 spec (page 95) */ /* Assert low */ - pci_write_config(dev, VIA_PCI_ACLINK_CTRL, - VIA_PCI_ACLINK_EN, 1); + pci_write_config(dev, VIA_PCI_ACLINK_CTRL, VIA_PCI_ACLINK_EN, + 1); /* Wait T_rst_low */ DELAY(100); /* Assert high */ @@ -1126,13 +1119,13 @@ /* Wait T_rst2clk */ DELAY(5); /* Assert low */ - pci_write_config(dev, VIA_PCI_ACLINK_CTRL, - VIA_PCI_ACLINK_EN, 1); + pci_write_config(dev, VIA_PCI_ACLINK_CTRL, VIA_PCI_ACLINK_EN, + 1); } else { /* Warm reset */ /* Force no sync */ - pci_write_config(dev, VIA_PCI_ACLINK_CTRL, - VIA_PCI_ACLINK_EN, 1); + pci_write_config(dev, VIA_PCI_ACLINK_CTRL, VIA_PCI_ACLINK_EN, + 1); DELAY(100); /* Sync */ pci_write_config(dev, VIA_PCI_ACLINK_CTRL, @@ -1140,8 +1133,8 @@ /* Wait T_sync_high */ DELAY(5); /* Force no sync */ - pci_write_config(dev, VIA_PCI_ACLINK_CTRL, - VIA_PCI_ACLINK_EN, 1); + pci_write_config(dev, VIA_PCI_ACLINK_CTRL, VIA_PCI_ACLINK_EN, + 1); /* Wait T_sync2clk */ DELAY(5); } @@ -1177,8 +1170,9 @@ callout_init(&via->poll_timer, 1); via->poll_ticks = 1; - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "polling", &i) == 0 && i != 0) + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "polling", &i) == 0 && + i != 0) via->polling = 1; else via->polling = 0; @@ -1188,7 +1182,7 @@ via->regid = PCIR_BAR(0); via->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &via->regid, - RF_ACTIVE); + RF_ACTIVE); if (!via->reg) { device_printf(dev, "cannot allocate bus resource."); goto bad; @@ -1200,15 +1194,16 @@ via->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &via->irqid, RF_ACTIVE | RF_SHAREABLE); if (!via->irq || - snd_setup_intr(dev, via->irq, INTR_MPSAFE, - via_intr, via, &via->ih)) { + snd_setup_intr(dev, via->irq, INTR_MPSAFE, via_intr, via, + &via->ih)) { device_printf(dev, "unable to map interrupt\n"); goto bad; } via->bufsz = pcm_getbuffersize(dev, 4096, VIA_DEFAULT_BUFSZ, 65536); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "blocksize", &i) == 0 && i > 0) { + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "blocksize", &i) == 0 && + i > 0) { i &= VIA_BLK_ALIGN; if (i < VIA_BLK_MIN) i = VIA_BLK_MIN; @@ -1248,8 +1243,8 @@ */ via_dxs_disabled = 1; } else if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "via_dxs_disabled", - &via_dxs_disabled) == 0) + device_get_unit(dev), "via_dxs_disabled", + &via_dxs_disabled) == 0) via_dxs_disabled = (via_dxs_disabled > 0) ? 1 : 0; else via_dxs_disabled = 0; @@ -1259,12 +1254,12 @@ via_sgd_chnum = 1; } else { if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "via_dxs_channels", - &via_dxs_chnum) != 0) + device_get_unit(dev), "via_dxs_channels", + &via_dxs_chnum) != 0) via_dxs_chnum = NDXSCHANS; if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "via_sgd_channels", - &via_sgd_chnum) != 0) + device_get_unit(dev), "via_sgd_channels", + &via_sgd_chnum) != 0) via_sgd_chnum = NMSGDCHANS; } if (via_dxs_chnum > NDXSCHANS) @@ -1280,8 +1275,9 @@ via_dxs_chnum = 1; via_sgd_chnum = 0; } - if (via_dxs_chnum > 0 && resource_int_value(device_get_name(dev), - device_get_unit(dev), "via_dxs_src", &via_dxs_src) == 0) + if (via_dxs_chnum > 0 && + resource_int_value(device_get_name(dev), device_get_unit(dev), + "via_dxs_src", &via_dxs_src) == 0) via->dxs_src = (via_dxs_src > 0) ? 1 : 0; else via->dxs_src = 0; @@ -1289,14 +1285,14 @@ nsegs = (via_dxs_chnum + via_sgd_chnum + NWRCHANS) * VIA_SEGS_MAX; /* DMA tag for buffers */ - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/via->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, - /*lockarg*/NULL, &via->parent_dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ via->bufsz, /*nsegments*/ 1, /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, + /*lockarg*/ NULL, &via->parent_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } @@ -1306,24 +1302,24 @@ * requires a list in memory of work to do. We need only 16 bytes * for this list, and it is wasteful to allocate 16K. */ - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/nsegs * sizeof(struct via_dma_op), - /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, - /*lockarg*/NULL, &via->sgd_dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ nsegs * sizeof(struct via_dma_op), + /*nsegments*/ 1, /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, + /*lockarg*/ NULL, &via->sgd_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } if (bus_dmamem_alloc(via->sgd_dmat, (void **)&via->sgd_table, - BUS_DMA_NOWAIT, &via->sgd_dmamap) == -1) + BUS_DMA_NOWAIT, &via->sgd_dmamap) == -1) goto bad; if (bus_dmamap_load(via->sgd_dmat, via->sgd_dmamap, via->sgd_table, - nsegs * sizeof(struct via_dma_op), dma_cb, via, 0)) + nsegs * sizeof(struct via_dma_op), dma_cb, via, 0)) goto bad; if (via_chip_init(dev)) @@ -1341,8 +1337,7 @@ if (via->codec_caps & (AC97_EXTCAP_VRA | AC97_EXTCAP_VRM | AC97_EXTCAP_DRA)) { uint16_t ext = ac97_getextmode(via->codec); - ext |= (via->codec_caps & - (AC97_EXTCAP_VRA | AC97_EXTCAP_VRM)); + ext |= (via->codec_caps & (AC97_EXTCAP_VRA | AC97_EXTCAP_VRM)); ext &= ~AC97_EXTCAP_DRA; ac97_setextmode(via->codec, ext); } @@ -1353,13 +1348,13 @@ /* Register */ if (pcm_register(dev, via, via_dxs_chnum + via_sgd_chnum, NWRCHANS)) - goto bad; + goto bad; for (i = 0; i < via_dxs_chnum; i++) - pcm_addchan(dev, PCMDIR_PLAY, &via8233dxs_class, via); + pcm_addchan(dev, PCMDIR_PLAY, &via8233dxs_class, via); for (i = 0; i < via_sgd_chnum; i++) - pcm_addchan(dev, PCMDIR_PLAY, &via8233msgd_class, via); + pcm_addchan(dev, PCMDIR_PLAY, &via8233msgd_class, via); for (i = 0; i < NWRCHANS; i++) - pcm_addchan(dev, PCMDIR_REC, &via8233wr_class, via); + pcm_addchan(dev, PCMDIR_REC, &via8233wr_class, via); if (via_dxs_chnum > 0) via_init_sysctls(dev); device_printf(dev, "\n", @@ -1425,12 +1420,9 @@ return (0); } -static device_method_t via_methods[] = { - DEVMETHOD(device_probe, via_probe), - DEVMETHOD(device_attach, via_attach), - DEVMETHOD(device_detach, via_detach), - { 0, 0} -}; +static device_method_t via_methods[] = { DEVMETHOD(device_probe, via_probe), + DEVMETHOD(device_attach, via_attach), + DEVMETHOD(device_detach, via_detach), { 0, 0 } }; static driver_t via_driver = { "pcm", Index: sys/dev/sound/pci/via82c686.h =================================================================== --- sys/dev/sound/pci/via82c686.h +++ sys/dev/sound/pci/via82c686.h @@ -42,45 +42,46 @@ * ftp://ftp.alsa-project.org/pub/manuals/ad/AD1881_0.pdf (example AC'97 codec) */ -#define VIA_AC97STATUS 0x40 -#define VIA_AC97STATUS_RDY 0x01 -#define VIA_AC97STATUS_LOWPWR 0x02 -#define VIA_AC97STATUS_2RDY 0x04 +#define VIA_AC97STATUS 0x40 +#define VIA_AC97STATUS_RDY 0x01 +#define VIA_AC97STATUS_LOWPWR 0x02 +#define VIA_AC97STATUS_2RDY 0x04 -#define VIA_ACLINKCTRL 0x41 -#define VIA_ACLINK_EN 0x80 /* ac link enab */ -#define VIA_ACLINK_NRST 0x40 /* ~(ac reset) */ -#define VIA_ACLINK_SYNC 0x20 /* ac sync */ -#define VIA_ACLINK_VSR 0x08 /* var. samp. rate */ -#define VIA_ACLINK_SGD 0x04 /* SGD enab */ -#define VIA_ACLINK_FM 0x02 /* FM enab */ -#define VIA_ACLINK_SB 0x01 /* SB enab */ -#define VIA_ACLINK_DESIRED (VIA_ACLINK_EN|VIA_ACLINK_NRST|VIA_ACLINK_VSR|VIA_ACLINK_SGD) -#define VIA_PCICONF_FUNC_EN 0x42 +#define VIA_ACLINKCTRL 0x41 +#define VIA_ACLINK_EN 0x80 /* ac link enab */ +#define VIA_ACLINK_NRST 0x40 /* ~(ac reset) */ +#define VIA_ACLINK_SYNC 0x20 /* ac sync */ +#define VIA_ACLINK_VSR 0x08 /* var. samp. rate */ +#define VIA_ACLINK_SGD 0x04 /* SGD enab */ +#define VIA_ACLINK_FM 0x02 /* FM enab */ +#define VIA_ACLINK_SB 0x01 /* SB enab */ +#define VIA_ACLINK_DESIRED \ + (VIA_ACLINK_EN | VIA_ACLINK_NRST | VIA_ACLINK_VSR | VIA_ACLINK_SGD) +#define VIA_PCICONF_FUNC_EN 0x42 -#define VIA_PLAY_STAT 0x00 -#define VIA_RECORD_STAT 0x10 -#define VIA_RPSTAT_INTR 0x03 -#define VIA_PLAY_CONTROL 0x01 -#define VIA_RECORD_CONTROL 0x11 -#define VIA_RPCTRL_START 0x80 -#define VIA_RPCTRL_TERMINATE 0x40 -#define VIA_PLAY_MODE 0x02 -#define VIA_RECORD_MODE 0x12 -#define VIA_RPMODE_INTR_FLAG 0x01 -#define VIA_RPMODE_INTR_EOL 0x02 -#define VIA_RPMODE_STEREO 0x10 -#define VIA_RPMODE_16BIT 0x20 -#define VIA_RPMODE_AUTOSTART 0x80 -#define VIA_PLAY_DMAOPS_BASE 0x04 -#define VIA_RECORD_DMAOPS_BASE 0x14 -#define VIA_PLAY_DMAOPS_COUNT 0x0C -#define VIA_RECORD_DMAOPS_COUNT 0x1C +#define VIA_PLAY_STAT 0x00 +#define VIA_RECORD_STAT 0x10 +#define VIA_RPSTAT_INTR 0x03 +#define VIA_PLAY_CONTROL 0x01 +#define VIA_RECORD_CONTROL 0x11 +#define VIA_RPCTRL_START 0x80 +#define VIA_RPCTRL_TERMINATE 0x40 +#define VIA_PLAY_MODE 0x02 +#define VIA_RECORD_MODE 0x12 +#define VIA_RPMODE_INTR_FLAG 0x01 +#define VIA_RPMODE_INTR_EOL 0x02 +#define VIA_RPMODE_STEREO 0x10 +#define VIA_RPMODE_16BIT 0x20 +#define VIA_RPMODE_AUTOSTART 0x80 +#define VIA_PLAY_DMAOPS_BASE 0x04 +#define VIA_RECORD_DMAOPS_BASE 0x14 +#define VIA_PLAY_DMAOPS_COUNT 0x0C +#define VIA_RECORD_DMAOPS_COUNT 0x1C -#define VIA_CODEC_CTL 0x80 -#define VIA_CODEC_READ 0x00800000 -#define VIA_CODEC_BUSY 0x01000000 -#define VIA_CODEC_PRIVALID 0x02000000 -#define VIA_CODEC_INDEX(x) ((x)<<16) +#define VIA_CODEC_CTL 0x80 +#define VIA_CODEC_READ 0x00800000 +#define VIA_CODEC_BUSY 0x01000000 +#define VIA_CODEC_PRIVALID 0x02000000 +#define VIA_CODEC_INDEX(x) ((x) << 16) #endif /* _VIA_H */ Index: sys/dev/sound/pci/via82c686.c =================================================================== --- sys/dev/sound/pci/via82c686.c +++ sys/dev/sound/pci/via82c686.c @@ -30,34 +30,33 @@ #include "opt_snd.h" #endif -#include -#include +#include #include #include -#include - #include +#include +#include #define VIA_PCI_ID 0x30581106 -#define NSEGS 4 /* Number of segments in SGD table */ +#define NSEGS 4 /* Number of segments in SGD table */ -#define SEGS_PER_CHAN (NSEGS/2) +#define SEGS_PER_CHAN (NSEGS / 2) -#define TIMEOUT 50 -#define VIA_DEFAULT_BUFSZ 0x1000 +#define TIMEOUT 50 +#define VIA_DEFAULT_BUFSZ 0x1000 #undef DEB #define DEB(x) /* we rely on this struct being packed to 64 bits */ struct via_dma_op { - u_int32_t ptr; - u_int32_t flags; -#define VIA_DMAOP_EOL 0x80000000 -#define VIA_DMAOP_FLAG 0x40000000 -#define VIA_DMAOP_STOP 0x20000000 -#define VIA_DMAOP_COUNT(x) ((x)&0x00FFFFFF) + u_int32_t ptr; + u_int32_t flags; +#define VIA_DMAOP_EOL 0x80000000 +#define VIA_DMAOP_FLAG 0x40000000 +#define VIA_DMAOP_STOP 0x20000000 +#define VIA_DMAOP_COUNT(x) ((x) & 0x00FFFFFF) }; struct via_info; @@ -93,15 +92,11 @@ struct mtx *lock; }; -static u_int32_t via_fmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; -static struct pcmchan_caps via_vracaps = {4000, 48000, via_fmt, 0}; -static struct pcmchan_caps via_caps = {48000, 48000, via_fmt, 0}; +static u_int32_t via_fmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; +static struct pcmchan_caps via_vracaps = { 4000, 48000, via_fmt, 0 }; +static struct pcmchan_caps via_caps = { 48000, 48000, via_fmt, 0 }; static __inline u_int32_t via_rd(struct via_info *via, int regno, int size) @@ -145,8 +140,9 @@ int i; /* poll until codec not busy */ - for (i = 0; (i < TIMEOUT) && - (via_rd(via, VIA_CODEC_CTL, 4) & VIA_CODEC_BUSY); i++) + for (i = 0; + (i < TIMEOUT) && (via_rd(via, VIA_CODEC_CTL, 4) & VIA_CODEC_BUSY); + i++) DELAY(1); if (i >= TIMEOUT) { printf("via: codec busy\n"); @@ -163,8 +159,9 @@ /* poll until codec valid */ for (i = 0; (i < TIMEOUT) && - !(via_rd(via, VIA_CODEC_CTL, 4) & VIA_CODEC_PRIVALID); i++) - DELAY(1); + !(via_rd(via, VIA_CODEC_CTL, 4) & VIA_CODEC_PRIVALID); + i++) + DELAY(1); if (i >= TIMEOUT) { printf("via: codec invalid\n"); return 1; @@ -178,9 +175,11 @@ { struct via_info *via = addr; - if (via_waitready_codec(via)) return -1; + if (via_waitready_codec(via)) + return -1; - via_wr(via, VIA_CODEC_CTL, VIA_CODEC_PRIVALID | VIA_CODEC_INDEX(reg) | val, 4); + via_wr(via, VIA_CODEC_CTL, + VIA_CODEC_PRIVALID | VIA_CODEC_INDEX(reg) | val, 4); return 0; } @@ -193,7 +192,8 @@ if (via_waitready_codec(via)) return -1; - via_wr(via, VIA_CODEC_CTL, VIA_CODEC_PRIVALID | VIA_CODEC_READ | VIA_CODEC_INDEX(reg),4); + via_wr(via, VIA_CODEC_CTL, + VIA_CODEC_PRIVALID | VIA_CODEC_READ | VIA_CODEC_INDEX(reg), 4); if (via_waitready_codec(via)) return -1; @@ -204,11 +204,9 @@ return via_rd(via, VIA_CODEC_CTL, 2); } -static kobj_method_t via_ac97_methods[] = { - KOBJMETHOD(ac97_read, via_read_codec), - KOBJMETHOD(ac97_write, via_write_codec), - KOBJMETHOD_END -}; +static kobj_method_t via_ac97_methods[] = { KOBJMETHOD(ac97_read, + via_read_codec), + KOBJMETHOD(ac97_write, via_write_codec), KOBJMETHOD_END }; AC97_DECLARE(via_ac97); /* -------------------------------------------------------------------- */ @@ -230,7 +228,7 @@ phys_addr = sndbuf_getbufaddr(ch->buffer); for (i = 0; i < segs; i++) { - flag = (i == segs - 1)? VIA_DMAOP_EOL : VIA_DMAOP_FLAG; + flag = (i == segs - 1) ? VIA_DMAOP_EOL : VIA_DMAOP_FLAG; ch->sgd_table[i].ptr = phys_addr + (i * seg_size); ch->sgd_table[i].flags = flag | seg_size; } @@ -240,7 +238,8 @@ /* channel interface */ static void * -viachan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +viachan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { struct via_info *via = devinfo; struct via_chinfo *ch; @@ -260,7 +259,8 @@ ch->count = VIA_RECORD_DMAOPS_COUNT; ch->ctrl = VIA_RECORD_CONTROL; ch->mode = VIA_RECORD_MODE; - ch->sgd_addr = via->sgd_addr + sizeof(struct via_dma_op) * SEGS_PER_CHAN; + ch->sgd_addr = via->sgd_addr + + sizeof(struct via_dma_op) * SEGS_PER_CHAN; ch->sgd_table = &via->sgd_table[SEGS_PER_CHAN]; } @@ -317,7 +317,8 @@ * return 48 kHz cuz that's all you got. */ if (via->codec_caps & AC97_EXTCAP_VRA) { - reg = (ch->dir == PCMDIR_PLAY)? AC97_REGEXT_FDACRATE : AC97_REGEXT_LADCRATE; + reg = (ch->dir == PCMDIR_PLAY) ? AC97_REGEXT_FDACRATE : + AC97_REGEXT_LADCRATE; return ac97_setrate(via->codec, reg, speed); } else return 48000; @@ -371,7 +372,7 @@ base1 = via_rd(via, ch->base, 4); len = via_rd(via, ch->count, 4); base = via_rd(via, ch->base, 4); - if (base != base1) /* Avoid race hazard */ + if (base != base1) /* Avoid race hazard */ len = via_rd(via, ch->count, 4); snd_mtxunlock(via->lock); @@ -402,19 +403,17 @@ struct via_chinfo *ch = data; struct via_info *via = ch->parent; - return (via->codec_caps & AC97_EXTCAP_VRA)? &via_vracaps : &via_caps; + return (via->codec_caps & AC97_EXTCAP_VRA) ? &via_vracaps : &via_caps; } -static kobj_method_t viachan_methods[] = { - KOBJMETHOD(channel_init, viachan_init), - KOBJMETHOD(channel_setformat, viachan_setformat), - KOBJMETHOD(channel_setspeed, viachan_setspeed), - KOBJMETHOD(channel_setblocksize, viachan_setblocksize), - KOBJMETHOD(channel_trigger, viachan_trigger), - KOBJMETHOD(channel_getptr, viachan_getptr), - KOBJMETHOD(channel_getcaps, viachan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t viachan_methods[] = { KOBJMETHOD(channel_init, + viachan_init), + KOBJMETHOD(channel_setformat, viachan_setformat), + KOBJMETHOD(channel_setspeed, viachan_setspeed), + KOBJMETHOD(channel_setblocksize, viachan_setblocksize), + KOBJMETHOD(channel_trigger, viachan_trigger), + KOBJMETHOD(channel_getptr, viachan_getptr), + KOBJMETHOD(channel_getcaps, viachan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(viachan); /* -------------------------------------------------------------------- */ @@ -482,19 +481,25 @@ if ((data & VIA_AC97STATUS_RDY) == 0) { /* Cold reset per ac97r2.3 spec (page 95) */ - pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, 1); /* Assert low */ - DELAY(100); /* Wait T_rst_low */ - pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN | VIA_ACLINK_NRST, 1); /* Assert high */ - DELAY(5); /* Wait T_rst2clk */ - pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, 1); /* Assert low */ + pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, + 1); /* Assert low */ + DELAY(100); /* Wait T_rst_low */ + pci_write_config(dev, VIA_ACLINKCTRL, + VIA_ACLINK_EN | VIA_ACLINK_NRST, 1); /* Assert high */ + DELAY(5); /* Wait T_rst2clk */ + pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, + 1); /* Assert low */ } else { /* Warm reset */ - pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, 1); /* Force no sync */ + pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, + 1); /* Force no sync */ DELAY(100); - pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN | VIA_ACLINK_SYNC, 1); /* Sync */ - DELAY(5); /* Wait T_sync_high */ - pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, 1); /* Force no sync */ - DELAY(5); /* Wait T_sync2clk */ + pci_write_config(dev, VIA_ACLINKCTRL, + VIA_ACLINK_EN | VIA_ACLINK_SYNC, 1); /* Sync */ + DELAY(5); /* Wait T_sync_high */ + pci_write_config(dev, VIA_ACLINKCTRL, VIA_ACLINK_EN, + 1); /* Force no sync */ + DELAY(5); /* Wait T_sync2clk */ } /* Power everything up */ @@ -509,8 +514,8 @@ } via->regid = PCIR_BAR(0); - via->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, - &via->regid, RF_ACTIVE); + via->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &via->regid, + RF_ACTIVE); if (!via->reg) { device_printf(dev, "cannot allocate bus resource."); goto bad; @@ -522,14 +527,20 @@ via->irqid = 0; via->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &via->irqid, - RF_ACTIVE | RF_SHAREABLE); - if (!via->irq || snd_setup_intr(dev, via->irq, INTR_MPSAFE, via_intr, via, &via->ih)) { + RF_ACTIVE | RF_SHAREABLE); + if (!via->irq || + snd_setup_intr(dev, via->irq, INTR_MPSAFE, via_intr, via, + &via->ih)) { device_printf(dev, "unable to map interrupt\n"); goto bad; } - via_wr(via, VIA_PLAY_MODE, VIA_RPMODE_AUTOSTART | VIA_RPMODE_INTR_FLAG | VIA_RPMODE_INTR_EOL, 1); - via_wr(via, VIA_RECORD_MODE, VIA_RPMODE_AUTOSTART | VIA_RPMODE_INTR_FLAG | VIA_RPMODE_INTR_EOL, 1); + via_wr(via, VIA_PLAY_MODE, + VIA_RPMODE_AUTOSTART | VIA_RPMODE_INTR_FLAG | VIA_RPMODE_INTR_EOL, + 1); + via_wr(via, VIA_RECORD_MODE, + VIA_RPMODE_AUTOSTART | VIA_RPMODE_INTR_FLAG | VIA_RPMODE_INTR_EOL, + 1); via->codec = AC97_CREATE(dev, via, via_ac97); if (!via->codec) @@ -540,17 +551,17 @@ via->codec_caps = ac97_getextcaps(via->codec); ac97_setextmode(via->codec, - via->codec_caps & (AC97_EXTCAP_VRA | AC97_EXTCAP_VRM)); + via->codec_caps & (AC97_EXTCAP_VRA | AC97_EXTCAP_VRM)); /* DMA tag for buffers */ - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/via->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, - /*lockarg*/NULL, &via->parent_dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ via->bufsz, /*nsegments*/ 1, /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, + /*lockarg*/ NULL, &via->parent_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } @@ -560,47 +571,58 @@ * requires a list in memory of work to do. We need only 16 bytes * for this list, and it is wasteful to allocate 16K. */ - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/NSEGS * sizeof(struct via_dma_op), - /*nsegments*/1, /*maxsegz*/0x3ffff, - /*flags*/0, /*lockfunc*/NULL, - /*lockarg*/NULL, &via->sgd_dmat) != 0) { + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ NSEGS * sizeof(struct via_dma_op), + /*nsegments*/ 1, /*maxsegz*/ 0x3ffff, + /*flags*/ 0, /*lockfunc*/ NULL, + /*lockarg*/ NULL, &via->sgd_dmat) != 0) { device_printf(dev, "unable to create dma tag\n"); goto bad; } if (bus_dmamem_alloc(via->sgd_dmat, (void **)&via->sgd_table, - BUS_DMA_NOWAIT, &via->sgd_dmamap) != 0) + BUS_DMA_NOWAIT, &via->sgd_dmamap) != 0) goto bad; if (bus_dmamap_load(via->sgd_dmat, via->sgd_dmamap, via->sgd_table, - NSEGS * sizeof(struct via_dma_op), dma_cb, via, 0) != 0) + NSEGS * sizeof(struct via_dma_op), dma_cb, via, 0) != 0) goto bad; snprintf(status, SND_STATUSLEN, "port 0x%jx irq %jd on %s", - rman_get_start(via->reg), rman_get_start(via->irq), - device_get_nameunit(device_get_parent(dev))); + rman_get_start(via->reg), rman_get_start(via->irq), + device_get_nameunit(device_get_parent(dev))); /* Register */ - if (pcm_register(dev, via, 1, 1)) goto bad; + if (pcm_register(dev, via, 1, 1)) + goto bad; pcm_addchan(dev, PCMDIR_PLAY, &viachan_class, via); pcm_addchan(dev, PCMDIR_REC, &viachan_class, via); pcm_setstatus(dev, status); return 0; bad: - if (via->codec) ac97_destroy(via->codec); - if (via->reg) bus_release_resource(dev, SYS_RES_IOPORT, via->regid, via->reg); - if (via->ih) bus_teardown_intr(dev, via->irq, via->ih); - if (via->irq) bus_release_resource(dev, SYS_RES_IRQ, via->irqid, via->irq); - if (via->parent_dmat) bus_dma_tag_destroy(via->parent_dmat); - if (via->sgd_addr) bus_dmamap_unload(via->sgd_dmat, via->sgd_dmamap); - if (via->sgd_table) bus_dmamem_free(via->sgd_dmat, via->sgd_table, via->sgd_dmamap); - if (via->sgd_dmat) bus_dma_tag_destroy(via->sgd_dmat); - if (via->lock) snd_mtxfree(via->lock); - if (via) free(via, M_DEVBUF); + if (via->codec) + ac97_destroy(via->codec); + if (via->reg) + bus_release_resource(dev, SYS_RES_IOPORT, via->regid, via->reg); + if (via->ih) + bus_teardown_intr(dev, via->irq, via->ih); + if (via->irq) + bus_release_resource(dev, SYS_RES_IRQ, via->irqid, via->irq); + if (via->parent_dmat) + bus_dma_tag_destroy(via->parent_dmat); + if (via->sgd_addr) + bus_dmamap_unload(via->sgd_dmat, via->sgd_dmamap); + if (via->sgd_table) + bus_dmamem_free(via->sgd_dmat, via->sgd_table, via->sgd_dmamap); + if (via->sgd_dmat) + bus_dma_tag_destroy(via->sgd_dmat); + if (via->lock) + snd_mtxfree(via->lock); + if (via) + free(via, M_DEVBUF); return ENXIO; } @@ -627,12 +649,9 @@ return 0; } -static device_method_t via_methods[] = { - DEVMETHOD(device_probe, via_probe), - DEVMETHOD(device_attach, via_attach), - DEVMETHOD(device_detach, via_detach), - { 0, 0} -}; +static device_method_t via_methods[] = { DEVMETHOD(device_probe, via_probe), + DEVMETHOD(device_attach, via_attach), + DEVMETHOD(device_detach, via_detach), { 0, 0 } }; static driver_t via_driver = { "pcm", Index: sys/dev/sound/pci/vibes.h =================================================================== --- sys/dev/sound/pci/vibes.h +++ sys/dev/sound/pci/vibes.h @@ -29,175 +29,175 @@ /* ------------------------------------------------------------------------- */ /* PCI Configuration Register Offsets */ -#define SV_PCI_COMPAT 0x10 +#define SV_PCI_COMPAT 0x10 #define SV_PCI_ENHANCED 0x14 -#define SV_PCI_FMSYNTH 0x18 -#define SV_PCI_MIDI 0x1c -#define SV_PCI_GAMES 0x20 -#define SV_PCI_DMAA 0x40 -#define SV_PCI_DMAC 0x48 +#define SV_PCI_FMSYNTH 0x18 +#define SV_PCI_MIDI 0x1c +#define SV_PCI_GAMES 0x20 +#define SV_PCI_DMAA 0x40 +#define SV_PCI_DMAC 0x48 -#define SV_PCI_DMAA_SIZE 0x10 -#define SV_PCI_DMAA_ALIGN 0x10 -#define SV_PCI_DMAC_SIZE 0x10 -#define SV_PCI_DMAC_ALIGN 0x10 +#define SV_PCI_DMAA_SIZE 0x10 +#define SV_PCI_DMAA_ALIGN 0x10 +#define SV_PCI_DMAC_SIZE 0x10 +#define SV_PCI_DMAC_ALIGN 0x10 -#define SV_PCI_ENHANCED_SIZE 0x08 +#define SV_PCI_ENHANCED_SIZE 0x08 -#define SV_PCI_DMA_ENABLE 0x00000001 -#define SV_PCI_DMA_EXTENDED 0x00000008 +#define SV_PCI_DMA_ENABLE 0x00000001 +#define SV_PCI_DMA_EXTENDED 0x00000008 /* ------------------------------------------------------------------------- */ /* DMA Configuration Registers */ -#define SV_DMA_ADDR 0x00 -#define SV_DMA_COUNT 0x04 +#define SV_DMA_ADDR 0x00 +#define SV_DMA_COUNT 0x04 -#define SV_DMA_MODE 0x0B -#define SV_DMA_MODE_AUTO 0x10 -#define SV_DMA_MODE_RD 0x04 -#define SV_DMA_MODE_WR 0x08 +#define SV_DMA_MODE 0x0B +#define SV_DMA_MODE_AUTO 0x10 +#define SV_DMA_MODE_RD 0x04 +#define SV_DMA_MODE_WR 0x08 /* ------------------------------------------------------------------------- */ /* Enhanced Mode Configuration Registers */ -#define SV_CM_CONTROL 0x00 -#define SV_CM_CONTROL_ENHANCED 0x01 -#define SV_CM_CONTROL_TEST 0x02 -#define SV_CM_CONTROL_REVERB 0x04 -#define SV_CM_CONTROL_PWS 0x08 -#define SV_CM_CONTROL_INTA 0x20 -#define SV_CM_CONTROL_RESET 0x80 - -#define SV_CM_IMR 0x01 -#define SV_CM_IMR_AMSK 0x01 -#define SV_CM_IMR_CMSK 0x04 -#define SV_CM_IMR_SMSK 0x08 -#define SV_CM_IMR_UDM 0x40 -#define SV_CM_IMR_MIDM 0x80 - -#define SV_CM_STATUS 0x02 -#define SV_CM_STATUS_AINT 0x01 -#define SV_CM_STATUS_CINT 0x04 -#define SV_CM_STATUS_SINT 0x08 -#define SV_CM_STATUS_UDI 0x40 -#define SV_CM_STATUS_MI 0x80 - -#define SV_CM_INDEX 0x04 -#define SV_CM_INDEX_MASK 0x3f -#define SV_CM_INDEX_MCE 0x40 -#define SV_CM_INDEX_TRD 0x80 - -#define SV_CM_DATA 0x05 +#define SV_CM_CONTROL 0x00 +#define SV_CM_CONTROL_ENHANCED 0x01 +#define SV_CM_CONTROL_TEST 0x02 +#define SV_CM_CONTROL_REVERB 0x04 +#define SV_CM_CONTROL_PWS 0x08 +#define SV_CM_CONTROL_INTA 0x20 +#define SV_CM_CONTROL_RESET 0x80 + +#define SV_CM_IMR 0x01 +#define SV_CM_IMR_AMSK 0x01 +#define SV_CM_IMR_CMSK 0x04 +#define SV_CM_IMR_SMSK 0x08 +#define SV_CM_IMR_UDM 0x40 +#define SV_CM_IMR_MIDM 0x80 + +#define SV_CM_STATUS 0x02 +#define SV_CM_STATUS_AINT 0x01 +#define SV_CM_STATUS_CINT 0x04 +#define SV_CM_STATUS_SINT 0x08 +#define SV_CM_STATUS_UDI 0x40 +#define SV_CM_STATUS_MI 0x80 + +#define SV_CM_INDEX 0x04 +#define SV_CM_INDEX_MASK 0x3f +#define SV_CM_INDEX_MCE 0x40 +#define SV_CM_INDEX_TRD 0x80 + +#define SV_CM_DATA 0x05 /* ------------------------------------------------------------------------- */ /* Indexed Codec/Mixer Registers (left channels were applicable) */ -#define SV_REG_ADC_INPUT 0x00 -#define SV_INPUT_GAIN_MASK 0x0f -#define SV_INPUT_MICGAIN 0x10 -#define SV_INPUT_CD 0x20 -#define SV_INPUT_DAC 0x40 -#define SV_INPUT_AUX2 0x60 -#define SV_INPUT_LINE 0x80 -#define SV_INPUT_AUX1 0xa0 -#define SV_INPUT_MIC 0xc0 -#define SV_INPUT_MIXOUT 0xe0 - -#define SV_REG_AUX1 0x02 -#define SV_REG_CD 0x04 -#define SV_REG_LINE 0x06 -#define SV_REG_MIC 0x08 -#define SV_REG_SYNTH 0x0a -#define SV_REG_AUX2 0x0c -#define SV_REG_MIX 0x0e -#define SV_REG_PCM 0x10 -#define SV_DEFAULT_MAX 0x1f -#define SV_ADC_MAX 0x0f -#define SV_MIC_MAX 0x0f -#define SV_PCM_MAX 0x3f -#define SV_MUTE 0x80 - -#define SV_REG_FORMAT 0x12 -#define SV_AFMT_MONO 0x00 -#define SV_AFMT_STEREO 0x01 -#define SV_AFMT_S16 0x02 -#define SV_AFMT_U8 0x00 -#define SV_AFMT_DMAA(x) (x) -#define SV_AFMT_DMAA_MSK 0x03 -#define SV_AFMT_DMAC(x) ((x) << 4) -#define SV_AFMT_DMAC_MSK 0x30 - -#define SV_REG_ENABLE 0x13 -#define SV_PLAY_ENABLE 0x01 -#define SV_RECORD_ENABLE 0x02 -#define SV_PLAYBACK_PAUSE 0x04 - -#define SV_REG_REVISION 0x15 - -#define SV_REG_LOOPBACK 0x16 -#define SV_LOOPBACK_ENABLE 0x01 -#define SV_LOOPBACK_MAX 0x3f -#define SV_LOOPBACK_LEVEL(x) ((x) << 2) - -#define SV_REG_DMAA_COUNT_HI 0x18 -#define SV_REG_DMAA_COUNT_LO 0x19 -#define SV_REG_DMAC_COUNT_HI 0x1c -#define SV_REG_DMAC_COUNT_LO 0x1d - -#define SV_REG_PCM_SAMPLING_LO 0x1e -#define SV_REG_PCM_SAMPLING_HI 0x1f - -#define SV_REG_SYN_SAMPLING_LO 0x20 -#define SV_REG_SYN_SAMPLING_HI 0x21 - -#define SV_REG_CLOCK_SOURCE 0x22 -#define SV_CLOCK_ALTERNATE 0x10 -#define SV_REG_ALT_RATE 0x23 - -#define SV_REG_ADC_PLLM 0x24 -#define SV_REG_ADC_PLLN 0x25 -#define SV_ADC_PLLN(x) ((x) & 0x1f) -#define SV_ADC_PLLR(x) ((x) << 5) - -#define SV_REG_SYNTH_PLLM 0x26 -#define SV_REG_SYNTH_PLLN 0x27 -#define SV_SYNTH_PLLN(x) ((x) & 0x1f) -#define SV_SYNTH_PLLR(x) ((x) << 5) - -#define SV_REG_SRS_SPACE 0x2c -#define SV_SRS_SPACE_100 0x00 -#define SV_SRS_SPACE_75 0x01 -#define SV_SRS_SPACE_50 0x02 -#define SV_SRS_SPACE_25 0x03 -#define SV_SRS_SPACE_0 0x04 -#define SV_SRS_DISABLED 0x80 - -#define SV_REG_SRS_CENTER 0x2d -#define SV_SRS_CENTER_100 0x00 -#define SV_SRS_CENTER_75 0x01 -#define SV_SRS_CENTER_50 0x02 -#define SV_SRS_CENTER_25 0x03 -#define SV_SRS_CENTER_0 0x04 - -#define SV_REG_ANALOG_PWR 0x30 -#define SV_ANALOG_OFF_DAC 0x01 -#define SV_ANALOG_OFF_ADC 0x08 -#define SV_ANALOG_OFF_MIX 0x10 -#define SV_ANALOG_OFF_SRS 0x20 -#define SV_ANALOG_OFF_SPLL 0x40 -#define SV_ANALOG_OFF_APLL 0x80 -#define SV_ANALOG_OFF 0xf9 - -#define SV_REG_DIGITAL_PWR 0x31 -#define SV_DIGITAL_OFF_SYN 0x01 -#define SV_DIGITAL_OFF_MU 0x02 -#define SV_DIGITAL_OFF_GP 0x04 -#define SV_DIGITAL_OFF_BI 0x08 -#define SV_DIGITAL_OFF 0x0f +#define SV_REG_ADC_INPUT 0x00 +#define SV_INPUT_GAIN_MASK 0x0f +#define SV_INPUT_MICGAIN 0x10 +#define SV_INPUT_CD 0x20 +#define SV_INPUT_DAC 0x40 +#define SV_INPUT_AUX2 0x60 +#define SV_INPUT_LINE 0x80 +#define SV_INPUT_AUX1 0xa0 +#define SV_INPUT_MIC 0xc0 +#define SV_INPUT_MIXOUT 0xe0 + +#define SV_REG_AUX1 0x02 +#define SV_REG_CD 0x04 +#define SV_REG_LINE 0x06 +#define SV_REG_MIC 0x08 +#define SV_REG_SYNTH 0x0a +#define SV_REG_AUX2 0x0c +#define SV_REG_MIX 0x0e +#define SV_REG_PCM 0x10 +#define SV_DEFAULT_MAX 0x1f +#define SV_ADC_MAX 0x0f +#define SV_MIC_MAX 0x0f +#define SV_PCM_MAX 0x3f +#define SV_MUTE 0x80 + +#define SV_REG_FORMAT 0x12 +#define SV_AFMT_MONO 0x00 +#define SV_AFMT_STEREO 0x01 +#define SV_AFMT_S16 0x02 +#define SV_AFMT_U8 0x00 +#define SV_AFMT_DMAA(x) (x) +#define SV_AFMT_DMAA_MSK 0x03 +#define SV_AFMT_DMAC(x) ((x) << 4) +#define SV_AFMT_DMAC_MSK 0x30 + +#define SV_REG_ENABLE 0x13 +#define SV_PLAY_ENABLE 0x01 +#define SV_RECORD_ENABLE 0x02 +#define SV_PLAYBACK_PAUSE 0x04 + +#define SV_REG_REVISION 0x15 + +#define SV_REG_LOOPBACK 0x16 +#define SV_LOOPBACK_ENABLE 0x01 +#define SV_LOOPBACK_MAX 0x3f +#define SV_LOOPBACK_LEVEL(x) ((x) << 2) + +#define SV_REG_DMAA_COUNT_HI 0x18 +#define SV_REG_DMAA_COUNT_LO 0x19 +#define SV_REG_DMAC_COUNT_HI 0x1c +#define SV_REG_DMAC_COUNT_LO 0x1d + +#define SV_REG_PCM_SAMPLING_LO 0x1e +#define SV_REG_PCM_SAMPLING_HI 0x1f + +#define SV_REG_SYN_SAMPLING_LO 0x20 +#define SV_REG_SYN_SAMPLING_HI 0x21 + +#define SV_REG_CLOCK_SOURCE 0x22 +#define SV_CLOCK_ALTERNATE 0x10 +#define SV_REG_ALT_RATE 0x23 + +#define SV_REG_ADC_PLLM 0x24 +#define SV_REG_ADC_PLLN 0x25 +#define SV_ADC_PLLN(x) ((x) & 0x1f) +#define SV_ADC_PLLR(x) ((x) << 5) + +#define SV_REG_SYNTH_PLLM 0x26 +#define SV_REG_SYNTH_PLLN 0x27 +#define SV_SYNTH_PLLN(x) ((x) & 0x1f) +#define SV_SYNTH_PLLR(x) ((x) << 5) + +#define SV_REG_SRS_SPACE 0x2c +#define SV_SRS_SPACE_100 0x00 +#define SV_SRS_SPACE_75 0x01 +#define SV_SRS_SPACE_50 0x02 +#define SV_SRS_SPACE_25 0x03 +#define SV_SRS_SPACE_0 0x04 +#define SV_SRS_DISABLED 0x80 + +#define SV_REG_SRS_CENTER 0x2d +#define SV_SRS_CENTER_100 0x00 +#define SV_SRS_CENTER_75 0x01 +#define SV_SRS_CENTER_50 0x02 +#define SV_SRS_CENTER_25 0x03 +#define SV_SRS_CENTER_0 0x04 + +#define SV_REG_ANALOG_PWR 0x30 +#define SV_ANALOG_OFF_DAC 0x01 +#define SV_ANALOG_OFF_ADC 0x08 +#define SV_ANALOG_OFF_MIX 0x10 +#define SV_ANALOG_OFF_SRS 0x20 +#define SV_ANALOG_OFF_SPLL 0x40 +#define SV_ANALOG_OFF_APLL 0x80 +#define SV_ANALOG_OFF 0xf9 + +#define SV_REG_DIGITAL_PWR 0x31 +#define SV_DIGITAL_OFF_SYN 0x01 +#define SV_DIGITAL_OFF_MU 0x02 +#define SV_DIGITAL_OFF_GP 0x04 +#define SV_DIGITAL_OFF_BI 0x08 +#define SV_DIGITAL_OFF 0x0f /* ------------------------------------------------------------------------- */ /* ADC PLL constants */ -#define SV_F_SCALE 512 -#define SV_F_REF 24576000 +#define SV_F_SCALE 512 +#define SV_F_REF 24576000 Index: sys/dev/sound/pci/vibes.c =================================================================== --- sys/dev/sound/pci/vibes.c +++ sys/dev/sound/pci/vibes.c @@ -36,21 +36,20 @@ #include "opt_snd.h" #endif -#include -#include - #include #include +#include +#include #include "mixer_if.h" /* ------------------------------------------------------------------------- */ /* Constants */ -#define SV_PCI_ID 0xca005333 -#define SV_DEFAULT_BUFSZ 16384 -#define SV_MIN_BLKSZ 128 -#define SV_INTR_PER_BUFFER 2 +#define SV_PCI_ID 0xca005333 +#define SV_DEFAULT_BUFSZ 16384 +#define SV_MIN_BLKSZ 128 +#define SV_INTR_PER_BUFFER 2 #ifndef DEB #define DEB(x) /* (x) */ @@ -62,55 +61,51 @@ struct sc_info; struct sc_chinfo { - struct sc_info *parent; - struct pcm_channel *channel; - struct snd_dbuf *buffer; - u_int32_t fmt, spd; - int dir; - int dma_active, dma_was_active; + struct sc_info *parent; + struct pcm_channel *channel; + struct snd_dbuf *buffer; + u_int32_t fmt, spd; + int dir; + int dma_active, dma_was_active; }; struct sc_info { - device_t dev; + device_t dev; /* DMA buffer allocator */ - bus_dma_tag_t parent_dmat; + bus_dma_tag_t parent_dmat; /* Enhanced register resources */ - struct resource *enh_reg; - bus_space_tag_t enh_st; - bus_space_handle_t enh_sh; - int enh_type; - int enh_rid; + struct resource *enh_reg; + bus_space_tag_t enh_st; + bus_space_handle_t enh_sh; + int enh_type; + int enh_rid; /* DMA configuration */ - struct resource *dmaa_reg, *dmac_reg; - bus_space_tag_t dmaa_st, dmac_st; - bus_space_handle_t dmaa_sh, dmac_sh; - int dmaa_type, dmac_type; - int dmaa_rid, dmac_rid; + struct resource *dmaa_reg, *dmac_reg; + bus_space_tag_t dmaa_st, dmac_st; + bus_space_handle_t dmaa_sh, dmac_sh; + int dmaa_type, dmac_type; + int dmaa_rid, dmac_rid; /* Interrupt resources */ - struct resource *irq; - int irqid; - void *ih; + struct resource *irq; + int irqid; + void *ih; /* User configurable buffer size */ - unsigned int bufsz; + unsigned int bufsz; - struct sc_chinfo rch, pch; - u_int8_t rev; + struct sc_chinfo rch, pch; + u_int8_t rev; }; -static u_int32_t sc_fmt[] = { - SND_FORMAT(AFMT_U8, 1, 0), - SND_FORMAT(AFMT_U8, 2, 0), - SND_FORMAT(AFMT_S16_LE, 1, 0), - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; +static u_int32_t sc_fmt[] = { SND_FORMAT(AFMT_U8, 1, 0), + SND_FORMAT(AFMT_U8, 2, 0), SND_FORMAT(AFMT_S16_LE, 1, 0), + SND_FORMAT(AFMT_S16_LE, 2, 0), 0 }; -static struct pcmchan_caps sc_caps = {8000, 48000, sc_fmt, 0}; +static struct pcmchan_caps sc_caps = { 8000, 48000, sc_fmt, 0 }; /* ------------------------------------------------------------------------- */ /* Register Manipulations */ @@ -131,7 +126,9 @@ n = sv_direct_get(sc, reg); if (n != val) { - device_printf(sc->dev, "sv_direct_set register 0x%02x %d != %d from line %d\n", reg, n, val, line); + device_printf(sc->dev, + "sv_direct_set register 0x%02x %d != %d from line %d\n", + reg, n, val, line); } } @@ -161,21 +158,22 @@ u_int8_t n; n = sv_indirect_get(sc, reg); if (n != val) { - device_printf(sc->dev, "sv_indirect_set register 0x%02x %d != %d line %d\n", reg, n, val, line); + device_printf(sc->dev, + "sv_indirect_set register 0x%02x %d != %d line %d\n", + reg, n, val, line); } } } static void -sv_dma_set_config(bus_space_tag_t st, bus_space_handle_t sh, - u_int32_t base, u_int32_t count, u_int8_t mode) +sv_dma_set_config(bus_space_tag_t st, bus_space_handle_t sh, u_int32_t base, + u_int32_t count, u_int8_t mode) { bus_space_write_4(st, sh, SV_DMA_ADDR, base); bus_space_write_4(st, sh, SV_DMA_COUNT, count & 0xffffff); bus_space_write_1(st, sh, SV_DMA_MODE, mode); - DEB(printf("base 0x%08x count %5d mode 0x%02x\n", - base, count, mode)); + DEB(printf("base 0x%08x count %5d mode 0x%02x\n", base, count, mode)); } static u_int32_t @@ -188,10 +186,11 @@ /* Play / Record Common Interface */ static void * -svchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +svchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { - struct sc_info *sc = devinfo; - struct sc_chinfo *ch; + struct sc_info *sc = devinfo; + struct sc_chinfo *ch; ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch; ch->parent = sc; @@ -213,7 +212,7 @@ static struct pcmchan_caps * svchan_getcaps(kobj_t obj, void *data) { - return &sc_caps; + return &sc_caps; } static u_int32_t @@ -222,7 +221,7 @@ struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; - /* user has requested interrupts every blocksize bytes */ + /* user has requested interrupts every blocksize bytes */ RANGE(blocksize, SV_MIN_BLKSZ, sc->bufsz / SV_INTR_PER_BUFFER); sndbuf_resize(ch->buffer, SV_INTR_PER_BUFFER, blocksize); DEB(printf("svchan_setblocksize: %d\n", blocksize)); @@ -235,7 +234,7 @@ struct sc_chinfo *ch = data; /* NB Just note format here as setting format register * generates noise if dma channel is inactive. */ - ch->fmt = (AFMT_CHANNEL(format) > 1) ? SV_AFMT_STEREO : SV_AFMT_MONO; + ch->fmt = (AFMT_CHANNEL(format) > 1) ? SV_AFMT_STEREO : SV_AFMT_MONO; ch->fmt |= (format & AFMT_16BIT) ? SV_AFMT_S16 : SV_AFMT_U8; return 0; } @@ -255,9 +254,9 @@ static int sv_set_recspeed(struct sc_info *sc, u_int32_t speed) { - u_int32_t f_out, f_actual; - u_int32_t rs, re, r, best_r = 0, r2, t, n, best_n = 0; - int32_t m, best_m = 0, ms, me, err, min_err; + u_int32_t f_out, f_actual; + u_int32_t rs, re, r, best_r = 0, r2, t, n, best_n = 0; + int32_t m, best_m = 0, ms, me, err, min_err; /* This algorithm is a variant described in sonicvibes.pdf * appendix A. This search is marginally more extensive and @@ -268,11 +267,14 @@ /* Find bounds of r to examine, rs <= r <= re */ t = 80000000 / f_out; - for (rs = 1; (1 << rs) < t; rs++); + for (rs = 1; (1 << rs) < t; rs++) + ; t = 150000000 / f_out; - for (re = 1; (2 << re) < t; re++); - if (re > 7) re = 7; + for (re = 1; (2 << re) < t; re++) + ; + if (re > 7) + re = 7; /* Search over r, n, m */ for (r = rs; r <= re; r++) { @@ -293,7 +295,8 @@ best_m = m - 2; best_n = n - 2; min_err = err; - if (err == 0) break; + if (err == 0) + break; } } } @@ -301,38 +304,36 @@ sv_indirect_set(sc, SV_REG_ADC_PLLM, best_m); sv_indirect_set(sc, SV_REG_ADC_PLLN, - SV_ADC_PLLN(best_n) | SV_ADC_PLLR(best_r)); - DEB(printf("svrchan_setspeed: %d -> PLLM 0x%02x PLLNR 0x%08x\n", - speed, - sv_indirect_get(sc, SV_REG_ADC_PLLM), - sv_indirect_get(sc, SV_REG_ADC_PLLN))); + SV_ADC_PLLN(best_n) | SV_ADC_PLLR(best_r)); + DEB(printf("svrchan_setspeed: %d -> PLLM 0x%02x PLLNR 0x%08x\n", speed, + sv_indirect_get(sc, SV_REG_ADC_PLLM), + sv_indirect_get(sc, SV_REG_ADC_PLLN))); return 0; } static int svrchan_trigger(kobj_t obj, void *data, int go) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - u_int32_t count, enable; - u_int8_t v; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; + u_int32_t count, enable; + u_int8_t v; - switch(go) { + switch (go) { case PCMTRIG_START: /* Set speed */ sv_set_recspeed(sc, ch->spd); /* Set format */ - v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAC_MSK; + v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAC_MSK; v |= SV_AFMT_DMAC(ch->fmt); sv_indirect_set(sc, SV_REG_FORMAT, v); /* Program DMA */ count = sndbuf_getsize(ch->buffer) / 2; /* DMAC uses words */ sv_dma_set_config(sc->dmac_st, sc->dmac_sh, - sndbuf_getbufaddr(ch->buffer), - count - 1, - SV_DMA_MODE_AUTO | SV_DMA_MODE_RD); + sndbuf_getbufaddr(ch->buffer), count - 1, + SV_DMA_MODE_AUTO | SV_DMA_MODE_RD); count = count / SV_INTR_PER_BUFFER - 1; sv_indirect_set(sc, SV_REG_DMAC_COUNT_HI, count >> 8); sv_indirect_set(sc, SV_REG_DMAC_COUNT_LO, count & 0xff); @@ -356,8 +357,8 @@ static u_int32_t svrchan_getptr(kobj_t obj, void *data) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; u_int32_t sz, remain; sz = sndbuf_getsize(ch->buffer); @@ -366,16 +367,14 @@ return sz - remain; } -static kobj_method_t svrchan_methods[] = { - KOBJMETHOD(channel_init, svchan_init), - KOBJMETHOD(channel_setformat, svchan_setformat), - KOBJMETHOD(channel_setspeed, svchan_setspeed), - KOBJMETHOD(channel_setblocksize, svchan_setblocksize), - KOBJMETHOD(channel_trigger, svrchan_trigger), - KOBJMETHOD(channel_getptr, svrchan_getptr), - KOBJMETHOD(channel_getcaps, svchan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t svrchan_methods[] = { KOBJMETHOD(channel_init, + svchan_init), + KOBJMETHOD(channel_setformat, svchan_setformat), + KOBJMETHOD(channel_setspeed, svchan_setspeed), + KOBJMETHOD(channel_setblocksize, svchan_setblocksize), + KOBJMETHOD(channel_trigger, svrchan_trigger), + KOBJMETHOD(channel_getptr, svrchan_getptr), + KOBJMETHOD(channel_getcaps, svchan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(svrchan); /* ------------------------------------------------------------------------- */ @@ -384,12 +383,12 @@ static int svpchan_trigger(kobj_t obj, void *data, int go) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; - u_int32_t count, enable, speed; - u_int8_t v; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; + u_int32_t count, enable, speed; + u_int8_t v; - switch(go) { + switch (go) { case PCMTRIG_START: /* Set speed */ speed = (ch->spd * 65536) / 48000; @@ -399,16 +398,15 @@ sv_indirect_set(sc, SV_REG_PCM_SAMPLING_LO, speed & 0xff); /* Set format */ - v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAA_MSK; + v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAA_MSK; v |= SV_AFMT_DMAA(ch->fmt); sv_indirect_set(sc, SV_REG_FORMAT, v); /* Program DMA */ count = sndbuf_getsize(ch->buffer); sv_dma_set_config(sc->dmaa_st, sc->dmaa_sh, - sndbuf_getbufaddr(ch->buffer), - count - 1, - SV_DMA_MODE_AUTO | SV_DMA_MODE_WR); + sndbuf_getbufaddr(ch->buffer), count - 1, + SV_DMA_MODE_AUTO | SV_DMA_MODE_WR); count = count / SV_INTR_PER_BUFFER - 1; sv_indirect_set(sc, SV_REG_DMAA_COUNT_HI, count >> 8); sv_indirect_set(sc, SV_REG_DMAA_COUNT_LO, count & 0xff); @@ -433,8 +431,8 @@ static u_int32_t svpchan_getptr(kobj_t obj, void *data) { - struct sc_chinfo *ch = data; - struct sc_info *sc = ch->parent; + struct sc_chinfo *ch = data; + struct sc_info *sc = ch->parent; u_int32_t sz, remain; sz = sndbuf_getsize(ch->buffer); @@ -443,50 +441,52 @@ return (sz - remain); } -static kobj_method_t svpchan_methods[] = { - KOBJMETHOD(channel_init, svchan_init), - KOBJMETHOD(channel_setformat, svchan_setformat), - KOBJMETHOD(channel_setspeed, svchan_setspeed), - KOBJMETHOD(channel_setblocksize, svchan_setblocksize), - KOBJMETHOD(channel_trigger, svpchan_trigger), - KOBJMETHOD(channel_getptr, svpchan_getptr), - KOBJMETHOD(channel_getcaps, svchan_getcaps), - KOBJMETHOD_END -}; +static kobj_method_t svpchan_methods[] = { KOBJMETHOD(channel_init, + svchan_init), + KOBJMETHOD(channel_setformat, svchan_setformat), + KOBJMETHOD(channel_setspeed, svchan_setspeed), + KOBJMETHOD(channel_setblocksize, svchan_setblocksize), + KOBJMETHOD(channel_trigger, svpchan_trigger), + KOBJMETHOD(channel_getptr, svpchan_getptr), + KOBJMETHOD(channel_getcaps, svchan_getcaps), KOBJMETHOD_END }; CHANNEL_DECLARE(svpchan); /* ------------------------------------------------------------------------- */ /* Mixer support */ struct sv_mix_props { - u_int8_t reg; /* Register */ - u_int8_t stereo:1; /* Supports 2 channels */ - u_int8_t mute:1; /* Supports muting */ - u_int8_t neg:1; /* Negative gain */ - u_int8_t max; /* Max gain */ - u_int8_t iselect; /* Input selector */ -} static const mt [SOUND_MIXER_NRDEVICES] = { - [SOUND_MIXER_LINE1] = {SV_REG_AUX1, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX1}, - [SOUND_MIXER_CD] = {SV_REG_CD, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_CD}, - [SOUND_MIXER_LINE] = {SV_REG_LINE, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_LINE}, - [SOUND_MIXER_MIC] = {SV_REG_MIC, 0, 1, 1, SV_MIC_MAX, SV_INPUT_MIC}, - [SOUND_MIXER_SYNTH] = {SV_REG_SYNTH, 0, 1, 1, SV_DEFAULT_MAX, 0}, - [SOUND_MIXER_LINE2] = {SV_REG_AUX2, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX2}, - [SOUND_MIXER_VOLUME] = {SV_REG_MIX, 1, 1, 1, SV_DEFAULT_MAX, 0}, - [SOUND_MIXER_PCM] = {SV_REG_PCM, 1, 1, 1, SV_PCM_MAX, 0}, - [SOUND_MIXER_RECLEV] = {SV_REG_ADC_INPUT, 1, 0, 0, SV_ADC_MAX, 0}, + u_int8_t reg; /* Register */ + u_int8_t stereo : 1; /* Supports 2 channels */ + u_int8_t mute : 1; /* Supports muting */ + u_int8_t neg : 1; /* Negative gain */ + u_int8_t max; /* Max gain */ + u_int8_t iselect; /* Input selector */ +} static const mt[SOUND_MIXER_NRDEVICES] = { + [SOUND_MIXER_LINE1] = { SV_REG_AUX1, 1, 1, 1, SV_DEFAULT_MAX, + SV_INPUT_AUX1 }, + [SOUND_MIXER_CD] = { SV_REG_CD, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_CD }, + [SOUND_MIXER_LINE] = { SV_REG_LINE, 1, 1, 1, SV_DEFAULT_MAX, + SV_INPUT_LINE }, + [SOUND_MIXER_MIC] = { SV_REG_MIC, 0, 1, 1, SV_MIC_MAX, SV_INPUT_MIC }, + [SOUND_MIXER_SYNTH] = { SV_REG_SYNTH, 0, 1, 1, SV_DEFAULT_MAX, 0 }, + [SOUND_MIXER_LINE2] = { SV_REG_AUX2, 1, 1, 1, SV_DEFAULT_MAX, + SV_INPUT_AUX2 }, + [SOUND_MIXER_VOLUME] = { SV_REG_MIX, 1, 1, 1, SV_DEFAULT_MAX, 0 }, + [SOUND_MIXER_PCM] = { SV_REG_PCM, 1, 1, 1, SV_PCM_MAX, 0 }, + [SOUND_MIXER_RECLEV] = { SV_REG_ADC_INPUT, 1, 0, 0, SV_ADC_MAX, 0 }, }; static void -sv_channel_gain(struct sc_info *sc, u_int32_t dev, u_int32_t gain, u_int32_t channel) +sv_channel_gain(struct sc_info *sc, u_int32_t dev, u_int32_t gain, + u_int32_t channel) { - u_int8_t v; - int32_t g; + u_int8_t v; + int32_t g; g = mt[dev].max * gain / 100; if (mt[dev].neg) g = mt[dev].max - g; - v = sv_indirect_get(sc, mt[dev].reg + channel) & ~mt[dev].max; + v = sv_indirect_get(sc, mt[dev].reg + channel) & ~mt[dev].max; v |= g; if (mt[dev].mute) { @@ -513,22 +513,25 @@ { int32_t i; for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { - if (mt[i].reg) sv_gain(sc, i, 0, 0); + if (mt[i].reg) + sv_gain(sc, i, 0, 0); } } static int sv_mix_init(struct snd_mixer *m) { - u_int32_t i, v; + u_int32_t i, v; - for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { - if (mt[i].max) v |= (1 << i); + for (i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { + if (mt[i].max) + v |= (1 << i); } mix_setdevs(m, v); - for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { - if (mt[i].iselect) v |= (1 << i); + for (i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { + if (mt[i].iselect) + v |= (1 << i); } mix_setrecdevs(m, v); @@ -538,33 +541,31 @@ static int sv_mix_set(struct snd_mixer *m, u_int32_t dev, u_int32_t left, u_int32_t right) { - struct sc_info *sc = mix_getdevinfo(m); + struct sc_info *sc = mix_getdevinfo(m); return sv_gain(sc, dev, left, right); } static u_int32_t sv_mix_setrecsrc(struct snd_mixer *m, u_int32_t mask) { - struct sc_info *sc = mix_getdevinfo(m); - u_int32_t i, v; + struct sc_info *sc = mix_getdevinfo(m); + u_int32_t i, v; v = sv_indirect_get(sc, SV_REG_ADC_INPUT) & SV_INPUT_GAIN_MASK; - for(i = 0; i < SOUND_MIXER_NRDEVICES; i++) { + for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { if ((1 << i) & mask) { v |= mt[i].iselect; } } - DEB(printf("sv_mix_setrecsrc: mask 0x%08x adc_input 0x%02x\n", mask, v)); + DEB(printf("sv_mix_setrecsrc: mask 0x%08x adc_input 0x%02x\n", mask, + v)); sv_indirect_set(sc, SV_REG_ADC_INPUT, v); return mask; } -static kobj_method_t sv_mixer_methods[] = { - KOBJMETHOD(mixer_init, sv_mix_init), - KOBJMETHOD(mixer_set, sv_mix_set), - KOBJMETHOD(mixer_setrecsrc, sv_mix_setrecsrc), - KOBJMETHOD_END -}; +static kobj_method_t sv_mixer_methods[] = { KOBJMETHOD(mixer_init, sv_mix_init), + KOBJMETHOD(mixer_set, sv_mix_set), + KOBJMETHOD(mixer_setrecsrc, sv_mix_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(sv_mixer); /* ------------------------------------------------------------------------- */ @@ -575,34 +576,34 @@ { u_int8_t v; - switch (state) { - case 0: + switch (state) { + case 0: /* power on */ - v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) &~ SV_ANALOG_OFF; + v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) & ~SV_ANALOG_OFF; v |= SV_ANALOG_OFF_SRS | SV_ANALOG_OFF_SPLL; sv_indirect_set(sc, SV_REG_ANALOG_PWR, v); - v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) &~ SV_DIGITAL_OFF; + v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) & ~SV_DIGITAL_OFF; v |= SV_DIGITAL_OFF_SYN | SV_DIGITAL_OFF_MU | SV_DIGITAL_OFF_GP; sv_indirect_set(sc, SV_REG_DIGITAL_PWR, v); - break; - default: + break; + default: /* power off */ v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) | SV_ANALOG_OFF; sv_indirect_set(sc, SV_REG_ANALOG_PWR, v); v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) | SV_DIGITAL_OFF; sv_indirect_set(sc, SV_REG_DIGITAL_PWR, SV_DIGITAL_OFF); - break; - } - DEB(printf("Power state %d\n", state)); + break; + } + DEB(printf("Power state %d\n", state)); } static int sv_init(struct sc_info *sc) { - u_int8_t v; + u_int8_t v; /* Effect reset */ - v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_ENHANCED; + v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_ENHANCED; v |= SV_CM_CONTROL_RESET; sv_direct_set(sc, SV_CM_CONTROL, v); DELAY(50); @@ -642,7 +643,7 @@ static int sv_suspend(device_t dev) { - struct sc_info *sc = pcm_getdevinfo(dev); + struct sc_info *sc = pcm_getdevinfo(dev); sc->rch.dma_was_active = sc->rch.dma_active; svrchan_trigger(NULL, &sc->rch, PCMTRIG_ABORT); @@ -659,7 +660,7 @@ static int sv_resume(device_t dev) { - struct sc_info *sc = pcm_getdevinfo(dev); + struct sc_info *sc = pcm_getdevinfo(dev); sv_mix_mute_all(sc); sv_power(sc, 0); @@ -670,8 +671,8 @@ if (mixer_reinit(dev) == -1) { device_printf(dev, "unable to reinitialize the mixer\n"); - return ENXIO; - } + return ENXIO; + } if (sc->rch.dma_was_active) { svrchan_trigger(0, &sc->rch, PCMTRIG_START); @@ -690,8 +691,8 @@ static void sv_intr(void *data) { - struct sc_info *sc = data; - u_int8_t status; + struct sc_info *sc = data; + u_int8_t status; status = sv_direct_get(sc, SV_CM_STATUS); if (status & SV_CM_STATUS_AINT) @@ -700,7 +701,7 @@ if (status & SV_CM_STATUS_CINT) chn_intr(sc->rch.channel); - status &= ~(SV_CM_STATUS_AINT|SV_CM_STATUS_CINT); + status &= ~(SV_CM_STATUS_AINT | SV_CM_STATUS_CINT); DEB(if (status) printf("intr 0x%02x ?\n", status)); return; @@ -709,7 +710,7 @@ static int sv_probe(device_t dev) { - switch(pci_get_devid(dev)) { + switch (pci_get_devid(dev)) { case SV_PCI_ID: device_set_desc(dev, "S3 Sonicvibes"); return BUS_PROBE_DEFAULT; @@ -719,27 +720,30 @@ } static int -sv_attach(device_t dev) { - struct sc_info *sc; - rman_res_t count, midi_start, games_start; - u_int32_t data; - char status[SND_STATUSLEN]; - u_long sdmaa, sdmac, ml, mu; +sv_attach(device_t dev) +{ + struct sc_info *sc; + rman_res_t count, midi_start, games_start; + u_int32_t data; + char status[SND_STATUSLEN]; + u_long sdmaa, sdmac, ml, mu; sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); sc->dev = dev; pci_enable_busmaster(dev); - if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { - device_printf(dev, "chip is in D%d power mode " - "-- setting to D0\n", pci_get_powerstate(dev)); - pci_set_powerstate(dev, PCI_POWERSTATE_D0); - } - sc->enh_rid = SV_PCI_ENHANCED; + if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { + device_printf(dev, + "chip is in D%d power mode " + "-- setting to D0\n", + pci_get_powerstate(dev)); + pci_set_powerstate(dev, PCI_POWERSTATE_D0); + } + sc->enh_rid = SV_PCI_ENHANCED; sc->enh_type = SYS_RES_IOPORT; - sc->enh_reg = bus_alloc_resource_any(dev, sc->enh_type, - &sc->enh_rid, RF_ACTIVE); + sc->enh_reg = bus_alloc_resource_any(dev, sc->enh_type, &sc->enh_rid, + RF_ACTIVE); if (sc->enh_reg == NULL) { device_printf(dev, "sv_attach: cannot allocate enh\n"); return ENXIO; @@ -758,27 +762,25 @@ /* Register IRQ handler */ sc->irqid = 0; - sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, - RF_ACTIVE | RF_SHAREABLE); - if (!sc->irq || - snd_setup_intr(dev, sc->irq, 0, sv_intr, sc, &sc->ih)) { - device_printf(dev, "sv_attach: Unable to map interrupt\n"); - goto fail; - } + sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, + RF_ACTIVE | RF_SHAREABLE); + if (!sc->irq || snd_setup_intr(dev, sc->irq, 0, sv_intr, sc, &sc->ih)) { + device_printf(dev, "sv_attach: Unable to map interrupt\n"); + goto fail; + } sc->bufsz = pcm_getbuffersize(dev, 4096, SV_DEFAULT_BUFSZ, 65536); - if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, - /*boundary*/0, - /*lowaddr*/BUS_SPACE_MAXADDR_24BIT, - /*highaddr*/BUS_SPACE_MAXADDR, - /*filter*/NULL, /*filterarg*/NULL, - /*maxsize*/sc->bufsz, /*nsegments*/1, - /*maxsegz*/0x3ffff, /*flags*/0, - /*lockfunc*/NULL, /*lockarg*/NULL, - &sc->parent_dmat) != 0) { - device_printf(dev, "sv_attach: Unable to create dma tag\n"); - goto fail; - } + if (bus_dma_tag_create(/*parent*/ bus_get_dma_tag(dev), /*alignment*/ 2, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_24BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, /*filterarg*/ NULL, + /*maxsize*/ sc->bufsz, /*nsegments*/ 1, + /*maxsegz*/ 0x3ffff, /*flags*/ 0, + /*lockfunc*/ NULL, /*lockarg*/ NULL, &sc->parent_dmat) != 0) { + device_printf(dev, "sv_attach: Unable to create dma tag\n"); + goto fail; + } /* Power up and initialize */ sv_mix_mute_all(sc); @@ -799,7 +801,8 @@ * for space between midi and game ports. */ bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_MIDI, &midi_start, &count); - bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_GAMES, &games_start, &count); + bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_GAMES, &games_start, + &count); if (games_start < midi_start) { ml = games_start; @@ -809,13 +812,13 @@ mu = games_start; } /* Check assumptions about space availability and - alignment. How driver loaded can determine whether - games_start > midi_start or vice versa */ - if ((mu - ml >= 0x800) || - ((mu - ml) % 0x200)) { - device_printf(dev, "sv_attach: resource assumptions not met " - "(midi 0x%08lx, games 0x%08lx)\n", - (u_long)midi_start, (u_long)games_start); + alignment. How driver loaded can determine whether + games_start > midi_start or vice versa */ + if ((mu - ml >= 0x800) || ((mu - ml) % 0x200)) { + device_printf(dev, + "sv_attach: resource assumptions not met " + "(midi 0x%08lx, games 0x%08lx)\n", + (u_long)midi_start, (u_long)games_start); goto fail; } @@ -824,14 +827,16 @@ /* Add resources to list of pci resources for this device - from here on * they look like normal pci resources. */ - bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAA, sdmaa, SV_PCI_DMAA_SIZE); - bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAC, sdmac, SV_PCI_DMAC_SIZE); + bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAA, sdmaa, + SV_PCI_DMAA_SIZE); + bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAC, sdmac, + SV_PCI_DMAC_SIZE); /* Cache resource short-cuts for dma_a */ sc->dmaa_rid = SV_PCI_DMAA; sc->dmaa_type = SYS_RES_IOPORT; - sc->dmaa_reg = bus_alloc_resource_any(dev, sc->dmaa_type, - &sc->dmaa_rid, RF_ACTIVE); + sc->dmaa_reg = bus_alloc_resource_any(dev, sc->dmaa_type, &sc->dmaa_rid, + RF_ACTIVE); if (sc->dmaa_reg == NULL) { device_printf(dev, "sv_attach: cannot allocate dmaa\n"); goto fail; @@ -840,16 +845,18 @@ sc->dmaa_sh = rman_get_bushandle(sc->dmaa_reg); /* Poke port into dma_a configuration, nb bit flags to enable dma */ - data = pci_read_config(dev, SV_PCI_DMAA, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED; + data = pci_read_config(dev, SV_PCI_DMAA, 4) | SV_PCI_DMA_ENABLE | + SV_PCI_DMA_EXTENDED; data = ((u_int32_t)sdmaa & 0xfffffff0) | (data & 0x0f); pci_write_config(dev, SV_PCI_DMAA, data, 4); - DEB(printf("dmaa: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAA, 4))); + DEB(printf("dmaa: 0x%x 0x%x\n", data, + pci_read_config(dev, SV_PCI_DMAA, 4))); /* Cache resource short-cuts for dma_c */ sc->dmac_rid = SV_PCI_DMAC; sc->dmac_type = SYS_RES_IOPORT; - sc->dmac_reg = bus_alloc_resource_any(dev, sc->dmac_type, - &sc->dmac_rid, RF_ACTIVE); + sc->dmac_reg = bus_alloc_resource_any(dev, sc->dmac_type, &sc->dmac_rid, + RF_ACTIVE); if (sc->dmac_reg == NULL) { device_printf(dev, "sv_attach: cannot allocate dmac\n"); goto fail; @@ -858,54 +865,61 @@ sc->dmac_sh = rman_get_bushandle(sc->dmac_reg); /* Poke port into dma_c configuration, nb bit flags to enable dma */ - data = pci_read_config(dev, SV_PCI_DMAC, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED; + data = pci_read_config(dev, SV_PCI_DMAC, 4) | SV_PCI_DMA_ENABLE | + SV_PCI_DMA_EXTENDED; data = ((u_int32_t)sdmac & 0xfffffff0) | (data & 0x0f); pci_write_config(dev, SV_PCI_DMAC, data, 4); - DEB(printf("dmac: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAC, 4))); + DEB(printf("dmac: 0x%x 0x%x\n", data, + pci_read_config(dev, SV_PCI_DMAC, 4))); if (bootverbose) printf("Sonicvibes: revision %d.\n", sc->rev); - if (pcm_register(dev, sc, 1, 1)) { + if (pcm_register(dev, sc, 1, 1)) { device_printf(dev, "sv_attach: pcm_register fail\n"); - goto fail; + goto fail; } - pcm_addchan(dev, PCMDIR_PLAY, &svpchan_class, sc); - pcm_addchan(dev, PCMDIR_REC, &svrchan_class, sc); + pcm_addchan(dev, PCMDIR_PLAY, &svpchan_class, sc); + pcm_addchan(dev, PCMDIR_REC, &svrchan_class, sc); - snprintf(status, SND_STATUSLEN, "port 0x%jx irq %jd on %s", - rman_get_start(sc->enh_reg), rman_get_start(sc->irq), - device_get_nameunit(device_get_parent(dev))); - pcm_setstatus(dev, status); + snprintf(status, SND_STATUSLEN, "port 0x%jx irq %jd on %s", + rman_get_start(sc->enh_reg), rman_get_start(sc->irq), + device_get_nameunit(device_get_parent(dev))); + pcm_setstatus(dev, status); - DEB(printf("sv_attach: succeeded\n")); + DEB(printf("sv_attach: succeeded\n")); return 0; - fail: +fail: if (sc->parent_dmat) bus_dma_tag_destroy(sc->parent_dmat); - if (sc->ih) + if (sc->ih) bus_teardown_intr(dev, sc->irq, sc->ih); - if (sc->irq) + if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); if (sc->enh_reg) - bus_release_resource(dev, sc->enh_type, sc->enh_rid, sc->enh_reg); + bus_release_resource(dev, sc->enh_type, sc->enh_rid, + sc->enh_reg); if (sc->dmaa_reg) - bus_release_resource(dev, sc->dmaa_type, sc->dmaa_rid, sc->dmaa_reg); + bus_release_resource(dev, sc->dmaa_type, sc->dmaa_rid, + sc->dmaa_reg); if (sc->dmac_reg) - bus_release_resource(dev, sc->dmac_type, sc->dmac_rid, sc->dmac_reg); + bus_release_resource(dev, sc->dmac_type, sc->dmac_rid, + sc->dmac_reg); return ENXIO; } static int -sv_detach(device_t dev) { - struct sc_info *sc; - int r; +sv_detach(device_t dev) +{ + struct sc_info *sc; + int r; r = pcm_unregister(dev); - if (r) return r; + if (r) + return r; sc = pcm_getdevinfo(dev); sv_mix_mute_all(sc); @@ -923,20 +937,13 @@ return 0; } -static device_method_t sc_methods[] = { - DEVMETHOD(device_probe, sv_probe), - DEVMETHOD(device_attach, sv_attach), - DEVMETHOD(device_detach, sv_detach), - DEVMETHOD(device_resume, sv_resume), - DEVMETHOD(device_suspend, sv_suspend), - { 0, 0 } -}; +static device_method_t sc_methods[] = { DEVMETHOD(device_probe, sv_probe), + DEVMETHOD(device_attach, sv_attach), + DEVMETHOD(device_detach, sv_detach), + DEVMETHOD(device_resume, sv_resume), + DEVMETHOD(device_suspend, sv_suspend), { 0, 0 } }; -static driver_t sonicvibes_driver = { - "pcm", - sc_methods, - PCM_SOFTC_SIZE -}; +static driver_t sonicvibes_driver = { "pcm", sc_methods, PCM_SOFTC_SIZE }; DRIVER_MODULE(snd_vibes, pci, sonicvibes_driver, 0, 0); MODULE_DEPEND(snd_vibes, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); Index: sys/dev/sound/pcm/ac97.h =================================================================== --- sys/dev/sound/pcm/ac97.h +++ sys/dev/sound/pcm/ac97.h @@ -26,65 +26,66 @@ * SUCH DAMAGE. */ -#define AC97_MUTE 0x8080 +#define AC97_MUTE 0x8080 -#define AC97_REG_RESET 0x00 -#define AC97_CAP_MICCHANNEL (1 << 0) -#define AC97_CAP_TONE (1 << 2) -#define AC97_CAP_SIMSTEREO (1 << 3) -#define AC97_CAP_HEADPHONE (1 << 4) -#define AC97_CAP_LOUDNESS (1 << 5) -#define AC97_CAP_DAC_18 (1 << 6) -#define AC97_CAP_DAC_20 (1 << 7) -#define AC97_CAP_ADC_18 (1 << 8) -#define AC97_CAP_ADC_20 (1 << 9) -#define AC97_MIX_MASTER 0x02 -#define AC97_MIX_AUXOUT 0x04 -#define AC97_MIX_MONO 0x06 -#define AC97_MIX_TONE 0x08 -#define AC97_MIX_BEEP 0x0a -#define AC97_MIX_PHONE 0x0c -#define AC97_MIX_MIC 0x0e -#define AC97_MIX_LINE 0x10 -#define AC97_MIX_CD 0x12 -#define AC97_MIX_VIDEO 0x14 -#define AC97_MIX_AUX 0x16 -#define AC97_MIX_PCM 0x18 -#define AC97_REG_RECSEL 0x1a -#define AC97_MIX_RGAIN 0x1c -#define AC97_MIX_MGAIN 0x1e -#define AC97_REG_GEN 0x20 -#define AC97_REG_3D 0x22 -#define AC97_REG_POWER 0x26 -#define AC97_POWER_ADC (1 << 0) -#define AC97_POWER_DAC (1 << 1) -#define AC97_POWER_ANL (1 << 2) -#define AC97_POWER_REF (1 << 3) -#define AC97_POWER_STATUS (AC97_POWER_ADC | AC97_POWER_DAC | \ - AC97_POWER_REF | AC97_POWER_ANL ) -#define AC97_REGEXT_ID 0x28 -#define AC97_EXTCAP_VRA (1 << 0) -#define AC97_EXTCAP_DRA (1 << 1) -#define AC97_EXTCAP_VRM (1 << 3) -#define AC97_EXTCAPS (AC97_EXTCAP_VRA | AC97_EXTCAP_DRA | AC97_EXTCAP_VRM) -#define AC97_EXTCAP_SDAC (1 << 7) +#define AC97_REG_RESET 0x00 +#define AC97_CAP_MICCHANNEL (1 << 0) +#define AC97_CAP_TONE (1 << 2) +#define AC97_CAP_SIMSTEREO (1 << 3) +#define AC97_CAP_HEADPHONE (1 << 4) +#define AC97_CAP_LOUDNESS (1 << 5) +#define AC97_CAP_DAC_18 (1 << 6) +#define AC97_CAP_DAC_20 (1 << 7) +#define AC97_CAP_ADC_18 (1 << 8) +#define AC97_CAP_ADC_20 (1 << 9) +#define AC97_MIX_MASTER 0x02 +#define AC97_MIX_AUXOUT 0x04 +#define AC97_MIX_MONO 0x06 +#define AC97_MIX_TONE 0x08 +#define AC97_MIX_BEEP 0x0a +#define AC97_MIX_PHONE 0x0c +#define AC97_MIX_MIC 0x0e +#define AC97_MIX_LINE 0x10 +#define AC97_MIX_CD 0x12 +#define AC97_MIX_VIDEO 0x14 +#define AC97_MIX_AUX 0x16 +#define AC97_MIX_PCM 0x18 +#define AC97_REG_RECSEL 0x1a +#define AC97_MIX_RGAIN 0x1c +#define AC97_MIX_MGAIN 0x1e +#define AC97_REG_GEN 0x20 +#define AC97_REG_3D 0x22 +#define AC97_REG_POWER 0x26 +#define AC97_POWER_ADC (1 << 0) +#define AC97_POWER_DAC (1 << 1) +#define AC97_POWER_ANL (1 << 2) +#define AC97_POWER_REF (1 << 3) +#define AC97_POWER_STATUS \ + (AC97_POWER_ADC | AC97_POWER_DAC | AC97_POWER_REF | AC97_POWER_ANL) +#define AC97_REGEXT_ID 0x28 +#define AC97_EXTCAP_VRA (1 << 0) +#define AC97_EXTCAP_DRA (1 << 1) +#define AC97_EXTCAP_VRM (1 << 3) +#define AC97_EXTCAPS (AC97_EXTCAP_VRA | AC97_EXTCAP_DRA | AC97_EXTCAP_VRM) +#define AC97_EXTCAP_SDAC (1 << 7) -#define AC97_REGEXT_STAT 0x2a -#define AC97_REGEXT_FDACRATE 0x2c -#define AC97_REGEXT_SDACRATE 0x2e -#define AC97_REGEXT_LDACRATE 0x30 -#define AC97_REGEXT_LADCRATE 0x32 -#define AC97_REGEXT_MADCRATE 0x34 -#define AC97_MIXEXT_CLFE 0x36 -#define AC97_MIXEXT_SURROUND 0x38 -#define AC97_REG_ID1 0x7c -#define AC97_REG_ID2 0x7e +#define AC97_REGEXT_STAT 0x2a +#define AC97_REGEXT_FDACRATE 0x2c +#define AC97_REGEXT_SDACRATE 0x2e +#define AC97_REGEXT_LDACRATE 0x30 +#define AC97_REGEXT_LADCRATE 0x32 +#define AC97_REGEXT_MADCRATE 0x34 +#define AC97_MIXEXT_CLFE 0x36 +#define AC97_MIXEXT_SURROUND 0x38 +#define AC97_REG_ID1 0x7c +#define AC97_REG_ID2 0x7e -#define AC97_F_EAPD_INV 0x00000001 -#define AC97_F_RDCD_BUG 0x00000002 +#define AC97_F_EAPD_INV 0x00000001 +#define AC97_F_RDCD_BUG 0x00000002 -#define AC97_DECLARE(name) static DEFINE_CLASS(name, name ## _methods, sizeof(struct kobj)) -#define AC97_CREATE(dev, devinfo, cls) ac97_create(dev, devinfo, &cls ## _class) +#define AC97_DECLARE(name) \ + static DEFINE_CLASS(name, name##_methods, sizeof(struct kobj)) +#define AC97_CREATE(dev, devinfo, cls) ac97_create(dev, devinfo, &cls##_class) struct ac97_info; @@ -104,4 +105,4 @@ u_int32_t ac97_getsubvendor(struct ac97_info *codec); u_int16_t ac97_rdcd(struct ac97_info *codec, int reg); -void ac97_wrcd(struct ac97_info *codec, int reg, u_int16_t val); +void ac97_wrcd(struct ac97_info *codec, int reg, u_int16_t val); Index: sys/dev/sound/pcm/ac97.c =================================================================== --- sys/dev/sound/pcm/ac97.c +++ sys/dev/sound/pcm/ac97.c @@ -30,29 +30,28 @@ #include "opt_snd.h" #endif -#include +#include #include #include - -#include +#include #include "mixer_if.h" static MALLOC_DEFINE(M_AC97, "ac97", "ac97 codec"); struct ac97mixtable_entry { - int reg; /* register index */ - /* reg < 0 if inverted polarity */ - unsigned bits:4; /* width of control field */ - unsigned ofs:4; /* offset (only if stereo=0) */ - unsigned stereo:1; /* set for stereo controls */ - unsigned mute:1; /* bit15 is MUTE */ - unsigned recidx:4; /* index in rec mux */ - unsigned mask:1; /* use only masked bits */ - unsigned enable:1; /* entry is enabled */ + int reg; /* register index */ + /* reg < 0 if inverted polarity */ + unsigned bits : 4; /* width of control field */ + unsigned ofs : 4; /* offset (only if stereo=0) */ + unsigned stereo : 1; /* set for stereo controls */ + unsigned mute : 1; /* bit15 is MUTE */ + unsigned recidx : 4; /* index in rec mux */ + unsigned mask : 1; /* use only masked bits */ + unsigned enable : 1; /* entry is enabled */ }; -#define AC97_MIXER_SIZE SOUND_MIXER_NRDEVICES +#define AC97_MIXER_SIZE SOUND_MIXER_NRDEVICES struct ac97_info { kobj_t methods; @@ -60,7 +59,7 @@ void *devinfo; u_int32_t id; u_int32_t subvendor; - unsigned count, caps, se, extcaps, extid, extstat, noext:1; + unsigned count, caps, se, extcaps, extid, extstat, noext : 1; u_int32_t flags; struct ac97mixtable_entry mix[AC97_MIXER_SIZE]; char name[16]; @@ -68,225 +67,187 @@ }; struct ac97_vendorid { - u_int32_t id; + u_int32_t id; const char *name; }; struct ac97_codecid { - u_int32_t id; - u_int8_t stepmask; - u_int8_t noext:1; - char *name; + u_int32_t id; + u_int8_t stepmask; + u_int8_t noext : 1; + char *name; ac97_patch patch; }; static const struct ac97mixtable_entry ac97mixtable_default[AC97_MIXER_SIZE] = { - /* [offset] reg bits of st mu re mk en */ - [SOUND_MIXER_VOLUME] = { AC97_MIX_MASTER, 5, 0, 1, 1, 6, 0, 1 }, - [SOUND_MIXER_OGAIN] = { AC97_MIX_AUXOUT, 5, 0, 1, 1, 0, 0, 0 }, - [SOUND_MIXER_PHONEOUT] = { AC97_MIX_MONO, 5, 0, 0, 1, 7, 0, 0 }, - [SOUND_MIXER_BASS] = { AC97_MIX_TONE, 4, 8, 0, 0, 0, 1, 0 }, - [SOUND_MIXER_TREBLE] = { AC97_MIX_TONE, 4, 0, 0, 0, 0, 1, 0 }, - [SOUND_MIXER_PCM] = { AC97_MIX_PCM, 5, 0, 1, 1, 0, 0, 1 }, - [SOUND_MIXER_SPEAKER] = { AC97_MIX_BEEP, 4, 1, 0, 1, 0, 0, 0 }, - [SOUND_MIXER_LINE] = { AC97_MIX_LINE, 5, 0, 1, 1, 5, 0, 1 }, - [SOUND_MIXER_PHONEIN] = { AC97_MIX_PHONE, 5, 0, 0, 1, 8, 0, 0 }, - [SOUND_MIXER_MIC] = { AC97_MIX_MIC, 5, 0, 0, 1, 1, 1, 1 }, + /* [offset] reg bits of st mu re mk + en */ + [SOUND_MIXER_VOLUME] = { AC97_MIX_MASTER, 5, 0, 1, 1, 6, 0, 1 }, + [SOUND_MIXER_OGAIN] = { AC97_MIX_AUXOUT, 5, 0, 1, 1, 0, 0, 0 }, + [SOUND_MIXER_PHONEOUT] = { AC97_MIX_MONO, 5, 0, 0, 1, 7, 0, 0 }, + [SOUND_MIXER_BASS] = { AC97_MIX_TONE, 4, 8, 0, 0, 0, 1, 0 }, + [SOUND_MIXER_TREBLE] = { AC97_MIX_TONE, 4, 0, 0, 0, 0, 1, 0 }, + [SOUND_MIXER_PCM] = { AC97_MIX_PCM, 5, 0, 1, 1, 0, 0, 1 }, + [SOUND_MIXER_SPEAKER] = { AC97_MIX_BEEP, 4, 1, 0, 1, 0, 0, 0 }, + [SOUND_MIXER_LINE] = { AC97_MIX_LINE, 5, 0, 1, 1, 5, 0, 1 }, + [SOUND_MIXER_PHONEIN] = { AC97_MIX_PHONE, 5, 0, 0, 1, 8, 0, 0 }, + [SOUND_MIXER_MIC] = { AC97_MIX_MIC, 5, 0, 0, 1, 1, 1, 1 }, /* use igain for the mic 20dB boost */ - [SOUND_MIXER_IGAIN] = { -AC97_MIX_MIC, 1, 6, 0, 0, 0, 1, 1 }, - [SOUND_MIXER_CD] = { AC97_MIX_CD, 5, 0, 1, 1, 2, 0, 1 }, - [SOUND_MIXER_LINE1] = { AC97_MIX_AUX, 5, 0, 1, 1, 4, 0, 0 }, - [SOUND_MIXER_VIDEO] = { AC97_MIX_VIDEO, 5, 0, 1, 1, 3, 0, 0 }, - [SOUND_MIXER_RECLEV] = { -AC97_MIX_RGAIN, 4, 0, 1, 1, 0, 0, 1 } + [SOUND_MIXER_IGAIN] = { -AC97_MIX_MIC, 1, 6, 0, 0, 0, 1, 1 }, + [SOUND_MIXER_CD] = { AC97_MIX_CD, 5, 0, 1, 1, 2, 0, 1 }, + [SOUND_MIXER_LINE1] = { AC97_MIX_AUX, 5, 0, 1, 1, 4, 0, 0 }, + [SOUND_MIXER_VIDEO] = { AC97_MIX_VIDEO, 5, 0, 1, 1, 3, 0, 0 }, + [SOUND_MIXER_RECLEV] = { -AC97_MIX_RGAIN, 4, 0, 1, 1, 0, 0, 1 } }; static const struct ac97_vendorid ac97vendorid[] = { - { 0x41445300, "Analog Devices" }, - { 0x414b4d00, "Asahi Kasei" }, - { 0x414c4300, "Realtek" }, - { 0x414c4700, "Avance Logic" }, - { 0x43525900, "Cirrus Logic" }, - { 0x434d4900, "C-Media Electronics" }, - { 0x43585400, "Conexant" }, - { 0x44543000, "Diamond Technology" }, - { 0x454d4300, "eMicro" }, - { 0x45838300, "ESS Technology" }, - { 0x48525300, "Intersil" }, - { 0x49434500, "ICEnsemble" }, - { 0x49544500, "ITE, Inc." }, - { 0x4e534300, "National Semiconductor" }, - { 0x50534300, "Philips Semiconductor" }, - { 0x83847600, "SigmaTel" }, - { 0x53494c00, "Silicon Laboratories" }, - { 0x54524100, "TriTech" }, - { 0x54584e00, "Texas Instruments" }, - { 0x56494100, "VIA Technologies" }, - { 0x57454300, "Winbond" }, - { 0x574d4c00, "Wolfson" }, + { 0x41445300, "Analog Devices" }, { 0x414b4d00, "Asahi Kasei" }, + { 0x414c4300, "Realtek" }, { 0x414c4700, "Avance Logic" }, + { 0x43525900, "Cirrus Logic" }, { 0x434d4900, "C-Media Electronics" }, + { 0x43585400, "Conexant" }, { 0x44543000, "Diamond Technology" }, + { 0x454d4300, "eMicro" }, { 0x45838300, "ESS Technology" }, + { 0x48525300, "Intersil" }, { 0x49434500, "ICEnsemble" }, + { 0x49544500, "ITE, Inc." }, { 0x4e534300, "National Semiconductor" }, + { 0x50534300, "Philips Semiconductor" }, { 0x83847600, "SigmaTel" }, + { 0x53494c00, "Silicon Laboratories" }, { 0x54524100, "TriTech" }, + { 0x54584e00, "Texas Instruments" }, { 0x56494100, "VIA Technologies" }, + { 0x57454300, "Winbond" }, { 0x574d4c00, "Wolfson" }, { 0x594d4800, "Yamaha" }, /* * XXX This is a fluke, really! The real vendor * should be SigmaTel, not this! This should be * removed someday! */ - { 0x01408300, "Creative" }, - { 0x00000000, NULL } + { 0x01408300, "Creative" }, { 0x00000000, NULL } }; static struct ac97_codecid ac97codecid[] = { - { 0x41445303, 0x00, 0, "AD1819", 0 }, - { 0x41445340, 0x00, 0, "AD1881", 0 }, - { 0x41445348, 0x00, 0, "AD1881A", 0 }, - { 0x41445360, 0x00, 0, "AD1885", 0 }, - { 0x41445361, 0x00, 0, "AD1886", ad1886_patch }, - { 0x41445362, 0x00, 0, "AD1887", 0 }, - { 0x41445363, 0x00, 0, "AD1886A", 0 }, - { 0x41445368, 0x00, 0, "AD1888", ad198x_patch }, - { 0x41445370, 0x00, 0, "AD1980", ad198x_patch }, - { 0x41445372, 0x00, 0, "AD1981A", 0 }, - { 0x41445374, 0x00, 0, "AD1981B", ad1981b_patch }, - { 0x41445375, 0x00, 0, "AD1985", ad198x_patch }, - { 0x41445378, 0x00, 0, "AD1986", ad198x_patch }, - { 0x414b4d00, 0x00, 1, "AK4540", 0 }, - { 0x414b4d01, 0x00, 1, "AK4542", 0 }, - { 0x414b4d02, 0x00, 1, "AK4543", 0 }, - { 0x414b4d06, 0x00, 0, "AK4544A", 0 }, - { 0x454b4d07, 0x00, 0, "AK4545", 0 }, - { 0x414c4320, 0x0f, 0, "ALC100", 0 }, - { 0x414c4730, 0x0f, 0, "ALC101", 0 }, - { 0x414c4710, 0x0f, 0, "ALC200", 0 }, - { 0x414c4740, 0x0f, 0, "ALC202", 0 }, - { 0x414c4720, 0x0f, 0, "ALC650", 0 }, - { 0x414c4752, 0x0f, 0, "ALC250", 0 }, - { 0x414c4760, 0x0f, 0, "ALC655", alc655_patch }, - { 0x414c4770, 0x0f, 0, "ALC203", 0 }, - { 0x414c4780, 0x0f, 0, "ALC658", 0 }, - { 0x414c4790, 0x0f, 0, "ALC850", 0 }, - { 0x43525900, 0x07, 0, "CS4297", 0 }, - { 0x43525910, 0x07, 0, "CS4297A", 0 }, - { 0x43525920, 0x07, 0, "CS4294/98", 0 }, - { 0x4352592d, 0x07, 0, "CS4294", 0 }, - { 0x43525930, 0x07, 0, "CS4299", 0 }, - { 0x43525940, 0x07, 0, "CS4201", 0 }, - { 0x43525958, 0x07, 0, "CS4205", 0 }, - { 0x43525960, 0x07, 0, "CS4291A", 0 }, - { 0x434d4961, 0x00, 0, "CMI9739", cmi9739_patch }, - { 0x434d4941, 0x00, 0, "CMI9738", 0 }, - { 0x434d4978, 0x00, 0, "CMI9761", 0 }, - { 0x434d4982, 0x00, 0, "CMI9761", 0 }, - { 0x434d4983, 0x00, 0, "CMI9761", 0 }, - { 0x43585421, 0x00, 0, "HSD11246", 0 }, - { 0x43585428, 0x07, 0, "CX20468", 0 }, - { 0x43585430, 0x00, 0, "CX20468-21", 0 }, - { 0x44543000, 0x00, 0, "DT0398", 0 }, - { 0x454d4323, 0x00, 0, "EM28023", 0 }, - { 0x454d4328, 0x00, 0, "EM28028", 0 }, - { 0x45838308, 0x00, 0, "ES1988", 0 }, /* Formerly ES1921(?) */ - { 0x48525300, 0x00, 0, "HMP9701", 0 }, - { 0x49434501, 0x00, 0, "ICE1230", 0 }, - { 0x49434511, 0x00, 0, "ICE1232", 0 }, - { 0x49434514, 0x00, 0, "ICE1232A", 0 }, - { 0x49434551, 0x03, 0, "VT1616", 0 }, /* Via badged ICE */ - { 0x49544520, 0x00, 0, "ITE2226E", 0 }, - { 0x49544560, 0x07, 0, "ITE2646E", 0 }, /* XXX: patch needed */ - { 0x4e534340, 0x00, 0, "LM4540", 0 }, /* Spec blank on revid */ - { 0x4e534343, 0x00, 0, "LM4543", 0 }, /* Ditto */ - { 0x4e534346, 0x00, 0, "LM4546A", 0 }, - { 0x4e534348, 0x00, 0, "LM4548A", 0 }, - { 0x4e534331, 0x00, 0, "LM4549", 0 }, - { 0x4e534349, 0x00, 0, "LM4549A", 0 }, - { 0x4e534350, 0x00, 0, "LM4550", 0 }, - { 0x50534301, 0x00, 0, "UCB1510", 0 }, - { 0x50534304, 0x00, 0, "UCB1400", 0 }, - { 0x83847600, 0x00, 0, "STAC9700/83/84", 0 }, + { 0x41445303, 0x00, 0, "AD1819", 0 }, + { 0x41445340, 0x00, 0, "AD1881", 0 }, + { 0x41445348, 0x00, 0, "AD1881A", 0 }, + { 0x41445360, 0x00, 0, "AD1885", 0 }, + { 0x41445361, 0x00, 0, "AD1886", ad1886_patch }, + { 0x41445362, 0x00, 0, "AD1887", 0 }, + { 0x41445363, 0x00, 0, "AD1886A", 0 }, + { 0x41445368, 0x00, 0, "AD1888", ad198x_patch }, + { 0x41445370, 0x00, 0, "AD1980", ad198x_patch }, + { 0x41445372, 0x00, 0, "AD1981A", 0 }, + { 0x41445374, 0x00, 0, "AD1981B", ad1981b_patch }, + { 0x41445375, 0x00, 0, "AD1985", ad198x_patch }, + { 0x41445378, 0x00, 0, "AD1986", ad198x_patch }, + { 0x414b4d00, 0x00, 1, "AK4540", 0 }, + { 0x414b4d01, 0x00, 1, "AK4542", 0 }, + { 0x414b4d02, 0x00, 1, "AK4543", 0 }, + { 0x414b4d06, 0x00, 0, "AK4544A", 0 }, + { 0x454b4d07, 0x00, 0, "AK4545", 0 }, + { 0x414c4320, 0x0f, 0, "ALC100", 0 }, + { 0x414c4730, 0x0f, 0, "ALC101", 0 }, + { 0x414c4710, 0x0f, 0, "ALC200", 0 }, + { 0x414c4740, 0x0f, 0, "ALC202", 0 }, + { 0x414c4720, 0x0f, 0, "ALC650", 0 }, + { 0x414c4752, 0x0f, 0, "ALC250", 0 }, + { 0x414c4760, 0x0f, 0, "ALC655", alc655_patch }, + { 0x414c4770, 0x0f, 0, "ALC203", 0 }, + { 0x414c4780, 0x0f, 0, "ALC658", 0 }, + { 0x414c4790, 0x0f, 0, "ALC850", 0 }, + { 0x43525900, 0x07, 0, "CS4297", 0 }, + { 0x43525910, 0x07, 0, "CS4297A", 0 }, + { 0x43525920, 0x07, 0, "CS4294/98", 0 }, + { 0x4352592d, 0x07, 0, "CS4294", 0 }, + { 0x43525930, 0x07, 0, "CS4299", 0 }, + { 0x43525940, 0x07, 0, "CS4201", 0 }, + { 0x43525958, 0x07, 0, "CS4205", 0 }, + { 0x43525960, 0x07, 0, "CS4291A", 0 }, + { 0x434d4961, 0x00, 0, "CMI9739", cmi9739_patch }, + { 0x434d4941, 0x00, 0, "CMI9738", 0 }, + { 0x434d4978, 0x00, 0, "CMI9761", 0 }, + { 0x434d4982, 0x00, 0, "CMI9761", 0 }, + { 0x434d4983, 0x00, 0, "CMI9761", 0 }, + { 0x43585421, 0x00, 0, "HSD11246", 0 }, + { 0x43585428, 0x07, 0, "CX20468", 0 }, + { 0x43585430, 0x00, 0, "CX20468-21", 0 }, + { 0x44543000, 0x00, 0, "DT0398", 0 }, + { 0x454d4323, 0x00, 0, "EM28023", 0 }, + { 0x454d4328, 0x00, 0, "EM28028", 0 }, + { 0x45838308, 0x00, 0, "ES1988", 0 }, /* Formerly ES1921(?) */ + { 0x48525300, 0x00, 0, "HMP9701", 0 }, + { 0x49434501, 0x00, 0, "ICE1230", 0 }, + { 0x49434511, 0x00, 0, "ICE1232", 0 }, + { 0x49434514, 0x00, 0, "ICE1232A", 0 }, + { 0x49434551, 0x03, 0, "VT1616", 0 }, /* Via badged ICE */ + { 0x49544520, 0x00, 0, "ITE2226E", 0 }, + { 0x49544560, 0x07, 0, "ITE2646E", 0 }, /* XXX: patch needed */ + { 0x4e534340, 0x00, 0, "LM4540", 0 }, /* Spec blank on revid */ + { 0x4e534343, 0x00, 0, "LM4543", 0 }, /* Ditto */ + { 0x4e534346, 0x00, 0, "LM4546A", 0 }, + { 0x4e534348, 0x00, 0, "LM4548A", 0 }, + { 0x4e534331, 0x00, 0, "LM4549", 0 }, + { 0x4e534349, 0x00, 0, "LM4549A", 0 }, + { 0x4e534350, 0x00, 0, "LM4550", 0 }, + { 0x50534301, 0x00, 0, "UCB1510", 0 }, + { 0x50534304, 0x00, 0, "UCB1400", 0 }, + { 0x83847600, 0x00, 0, "STAC9700/83/84", 0 }, { 0x83847604, 0x00, 0, "STAC9701/03/04/05", 0 }, - { 0x83847605, 0x00, 0, "STAC9704", 0 }, - { 0x83847608, 0x00, 0, "STAC9708/11", 0 }, - { 0x83847609, 0x00, 0, "STAC9721/23", 0 }, - { 0x83847644, 0x00, 0, "STAC9744/45", 0 }, - { 0x83847650, 0x00, 0, "STAC9750/51", 0 }, - { 0x83847652, 0x00, 0, "STAC9752/53", 0 }, - { 0x83847656, 0x00, 0, "STAC9756/57", 0 }, - { 0x83847658, 0x00, 0, "STAC9758/59", 0 }, - { 0x83847660, 0x00, 0, "STAC9760/61", 0 }, /* Extrapolated */ - { 0x83847662, 0x00, 0, "STAC9762/63", 0 }, /* Extrapolated */ - { 0x83847666, 0x00, 0, "STAC9766/67", 0 }, - { 0x53494c22, 0x00, 0, "Si3036", 0 }, - { 0x53494c23, 0x00, 0, "Si3038", 0 }, - { 0x54524103, 0x00, 0, "TR28023", 0 }, /* Extrapolated */ - { 0x54524106, 0x00, 0, "TR28026", 0 }, - { 0x54524108, 0x00, 0, "TR28028", 0 }, - { 0x54524123, 0x00, 0, "TR28602", 0 }, - { 0x54524e03, 0x07, 0, "TLV320AIC27", 0 }, - { 0x54584e20, 0x00, 0, "TLC320AD90", 0 }, - { 0x56494161, 0x00, 0, "VIA1612A", 0 }, - { 0x56494170, 0x00, 0, "VIA1617A", 0 }, - { 0x574d4c00, 0x00, 0, "WM9701A", 0 }, - { 0x574d4c03, 0x00, 0, "WM9703/4/7/8", 0 }, - { 0x574d4c04, 0x00, 0, "WM9704Q", 0 }, - { 0x574d4c05, 0x00, 0, "WM9705/10", 0 }, - { 0x574d4d09, 0x00, 0, "WM9709", 0 }, - { 0x574d4c12, 0x00, 0, "WM9711/12", 0 }, /* XXX: patch needed */ - { 0x57454301, 0x00, 0, "W83971D", 0 }, - { 0x594d4800, 0x00, 0, "YMF743", 0 }, - { 0x594d4802, 0x00, 0, "YMF752", 0 }, - { 0x594d4803, 0x00, 0, "YMF753", 0 }, + { 0x83847605, 0x00, 0, "STAC9704", 0 }, + { 0x83847608, 0x00, 0, "STAC9708/11", 0 }, + { 0x83847609, 0x00, 0, "STAC9721/23", 0 }, + { 0x83847644, 0x00, 0, "STAC9744/45", 0 }, + { 0x83847650, 0x00, 0, "STAC9750/51", 0 }, + { 0x83847652, 0x00, 0, "STAC9752/53", 0 }, + { 0x83847656, 0x00, 0, "STAC9756/57", 0 }, + { 0x83847658, 0x00, 0, "STAC9758/59", 0 }, + { 0x83847660, 0x00, 0, "STAC9760/61", 0 }, /* Extrapolated */ + { 0x83847662, 0x00, 0, "STAC9762/63", 0 }, /* Extrapolated */ + { 0x83847666, 0x00, 0, "STAC9766/67", 0 }, + { 0x53494c22, 0x00, 0, "Si3036", 0 }, + { 0x53494c23, 0x00, 0, "Si3038", 0 }, + { 0x54524103, 0x00, 0, "TR28023", 0 }, /* Extrapolated */ + { 0x54524106, 0x00, 0, "TR28026", 0 }, + { 0x54524108, 0x00, 0, "TR28028", 0 }, + { 0x54524123, 0x00, 0, "TR28602", 0 }, + { 0x54524e03, 0x07, 0, "TLV320AIC27", 0 }, + { 0x54584e20, 0x00, 0, "TLC320AD90", 0 }, + { 0x56494161, 0x00, 0, "VIA1612A", 0 }, + { 0x56494170, 0x00, 0, "VIA1617A", 0 }, + { 0x574d4c00, 0x00, 0, "WM9701A", 0 }, + { 0x574d4c03, 0x00, 0, "WM9703/4/7/8", 0 }, + { 0x574d4c04, 0x00, 0, "WM9704Q", 0 }, + { 0x574d4c05, 0x00, 0, "WM9705/10", 0 }, + { 0x574d4d09, 0x00, 0, "WM9709", 0 }, + { 0x574d4c12, 0x00, 0, "WM9711/12", 0 }, /* XXX: patch needed */ + { 0x57454301, 0x00, 0, "W83971D", 0 }, + { 0x594d4800, 0x00, 0, "YMF743", 0 }, + { 0x594d4802, 0x00, 0, "YMF752", 0 }, + { 0x594d4803, 0x00, 0, "YMF753", 0 }, /* * XXX This is a fluke, really! The real codec * should be STAC9704, not this! This should be * removed someday! */ - { 0x01408384, 0x00, 0, "EV1938", 0 }, - { 0, 0, 0, NULL, 0 } + { 0x01408384, 0x00, 0, "EV1938", 0 }, { 0, 0, 0, NULL, 0 } }; -static char *ac97enhancement[] = { - "no 3D Stereo Enhancement", - "Analog Devices Phat Stereo", - "Creative Stereo Enhancement", - "National Semi 3D Stereo Enhancement", - "Yamaha Ymersion", - "BBE 3D Stereo Enhancement", - "Crystal Semi 3D Stereo Enhancement", - "Qsound QXpander", - "Spatializer 3D Stereo Enhancement", - "SRS 3D Stereo Enhancement", - "Platform Tech 3D Stereo Enhancement", - "AKM 3D Audio", - "Aureal Stereo Enhancement", - "Aztech 3D Enhancement", - "Binaura 3D Audio Enhancement", - "ESS Technology Stereo Enhancement", - "Harman International VMAx", - "Nvidea 3D Stereo Enhancement", - "Philips Incredible Sound", - "Texas Instruments 3D Stereo Enhancement", +static char *ac97enhancement[] = { "no 3D Stereo Enhancement", + "Analog Devices Phat Stereo", "Creative Stereo Enhancement", + "National Semi 3D Stereo Enhancement", "Yamaha Ymersion", + "BBE 3D Stereo Enhancement", "Crystal Semi 3D Stereo Enhancement", + "Qsound QXpander", "Spatializer 3D Stereo Enhancement", + "SRS 3D Stereo Enhancement", "Platform Tech 3D Stereo Enhancement", + "AKM 3D Audio", "Aureal Stereo Enhancement", "Aztech 3D Enhancement", + "Binaura 3D Audio Enhancement", "ESS Technology Stereo Enhancement", + "Harman International VMAx", "Nvidea 3D Stereo Enhancement", + "Philips Incredible Sound", "Texas Instruments 3D Stereo Enhancement", "VLSI Technology 3D Stereo Enhancement", - "TriTech 3D Stereo Enhancement", - "Realtek 3D Stereo Enhancement", + "TriTech 3D Stereo Enhancement", "Realtek 3D Stereo Enhancement", "Samsung 3D Stereo Enhancement", "Wolfson Microelectronics 3D Enhancement", - "Delta Integration 3D Enhancement", - "SigmaTel 3D Enhancement", - "Reserved 27", - "Rockwell 3D Stereo Enhancement", - "Reserved 29", - "Reserved 30", - "Reserved 31" -}; + "Delta Integration 3D Enhancement", "SigmaTel 3D Enhancement", + "Reserved 27", "Rockwell 3D Stereo Enhancement", "Reserved 29", + "Reserved 30", "Reserved 31" }; -static char *ac97feature[] = { - "mic channel", - "reserved", - "tone", - "simulated stereo", - "headphone", - "bass boost", - "18 bit DAC", - "20 bit DAC", - "18 bit ADC", - "20 bit ADC" -}; +static char *ac97feature[] = { "mic channel", "reserved", "tone", + "simulated stereo", "headphone", "bass boost", "18 bit DAC", + "20 bit DAC", "18 bit ADC", "20 bit ADC" }; static char *ac97extfeature[] = { "variable rate PCM", @@ -314,7 +275,8 @@ i[0] = AC97_READ(codec->methods, codec->devinfo, reg); i[1] = AC97_READ(codec->methods, codec->devinfo, reg); while (i[0] != i[1] && j) - i[j-- & 1] = AC97_READ(codec->methods, codec->devinfo, reg); + i[j-- & 1] = AC97_READ(codec->methods, codec->devinfo, + reg); #if 0 if (j < 100) { device_printf(codec->dev, "%s(): Inconsistent register value at" @@ -351,7 +313,7 @@ { u_int16_t v; - switch(which) { + switch (which) { case AC97_REGEXT_FDACRATE: case AC97_REGEXT_SDACRATE: case AC97_REGEXT_LDACRATE: @@ -383,14 +345,14 @@ mode &= AC97_EXTCAPS; if ((mode & ~codec->extcaps) != 0) { device_printf(codec->dev, "ac97 invalid mode set 0x%04x\n", - mode); + mode); return -1; } snd_mtxlock(codec->lock); ac97_wrcd(codec, AC97_REGEXT_STAT, mode); codec->extstat = ac97_rdcd(codec, AC97_REGEXT_STAT) & AC97_EXTCAPS; snd_mtxunlock(codec->lock); - return (mode == codec->extstat)? 0 : -1; + return (mode == codec->extstat) ? 0 : -1; } u_int16_t @@ -434,14 +396,15 @@ } static int -ac97_setmixer(struct ac97_info *codec, unsigned channel, unsigned left, unsigned right) +ac97_setmixer(struct ac97_info *codec, unsigned channel, unsigned left, + unsigned right) { struct ac97mixtable_entry *e = &codec->mix[channel]; if (e->reg && e->enable && e->bits) { int mask, max, val, reg; - reg = (e->reg >= 0) ? e->reg : -e->reg; /* AC97 register */ + reg = (e->reg >= 0) ? e->reg : -e->reg; /* AC97 register */ max = (1 << e->bits) - 1; /* actual range */ mask = (max << 8) | max; /* bits of interest */ @@ -543,7 +506,7 @@ if (keep_ogain == 0) { bzero(&codec->mix[SOUND_MIXER_OGAIN], - sizeof(codec->mix[SOUND_MIXER_OGAIN])); + sizeof(codec->mix[SOUND_MIXER_OGAIN])); } } @@ -555,12 +518,12 @@ * in the AC97_REG_RESET register. */ switch (codec->id) { - case 0x594d4800: /* YMF743 */ - case 0x594d4803: /* YMF753 */ + case 0x594d4800: /* YMF743 */ + case 0x594d4803: /* YMF753 */ codec->caps |= AC97_CAP_TONE; codec->se |= 0x04; break; - case 0x594d4802: /* YMF752 */ + case 0x594d4802: /* YMF752 */ codec->se |= 0x04; break; default: @@ -570,24 +533,26 @@ /* Hide treble and bass if they don't exist */ if ((codec->caps & AC97_CAP_TONE) == 0) { bzero(&codec->mix[SOUND_MIXER_BASS], - sizeof(codec->mix[SOUND_MIXER_BASS])); + sizeof(codec->mix[SOUND_MIXER_BASS])); bzero(&codec->mix[SOUND_MIXER_TREBLE], - sizeof(codec->mix[SOUND_MIXER_TREBLE])); + sizeof(codec->mix[SOUND_MIXER_TREBLE])); } } -static const char* -ac97_hw_desc(u_int32_t id, const char* vname, const char* cname, char* buf) +static const char * +ac97_hw_desc(u_int32_t id, const char *vname, const char *cname, char *buf) { if (cname == NULL) { sprintf(buf, "Unknown AC97 Codec (id = 0x%08x)", id); return buf; } - if (vname == NULL) vname = "Unknown"; + if (vname == NULL) + vname = "Unknown"; if (bootverbose) { - sprintf(buf, "%s %s AC97 Codec (id = 0x%08x)", vname, cname, id); + sprintf(buf, "%s %s AC97 Codec (id = 0x%08x)", vname, cname, + id); } else { sprintf(buf, "%s %s AC97 Codec", vname, cname); } @@ -613,9 +578,11 @@ return ENODEV; } - ac97_wrcd(codec, AC97_REG_POWER, (codec->flags & AC97_F_EAPD_INV)? 0x8000 : 0x0000); + ac97_wrcd(codec, AC97_REG_POWER, + (codec->flags & AC97_F_EAPD_INV) ? 0x8000 : 0x0000); ac97_reset(codec); - ac97_wrcd(codec, AC97_REG_POWER, (codec->flags & AC97_F_EAPD_INV)? 0x8000 : 0x0000); + ac97_wrcd(codec, AC97_REG_POWER, + (codec->flags & AC97_F_EAPD_INV) ? 0x8000 : 0x0000); i = ac97_rdcd(codec, AC97_REG_RESET); j = ac97_rdcd(codec, AC97_REG_RESET); @@ -630,11 +597,13 @@ i = ac97_rdcd(codec, AC97_REG_RESET); } codec->caps = i & 0x03ff; - codec->se = (i & 0x7c00) >> 10; + codec->se = (i & 0x7c00) >> 10; - id = (ac97_rdcd(codec, AC97_REG_ID1) << 16) | ac97_rdcd(codec, AC97_REG_ID2); + id = (ac97_rdcd(codec, AC97_REG_ID1) << 16) | + ac97_rdcd(codec, AC97_REG_ID2); if (id == 0 || id == 0xffffffff) { - device_printf(codec->dev, "ac97 codec invalid or not present (id == %x)\n", id); + device_printf(codec->dev, + "ac97 codec invalid or not present (id == %x)\n", id); snd_mtxunlock(codec->lock); return ENODEV; } @@ -646,8 +615,7 @@ } codec->id = id; codec->subvendor = (u_int32_t)pci_get_subdevice(pdev) << 16; - codec->subvendor |= (u_int32_t)pci_get_subvendor(pdev) & - 0x0000ffff; + codec->subvendor |= (u_int32_t)pci_get_subvendor(pdev) & 0x0000ffff; codec->noext = 0; codec_patch = NULL; @@ -677,8 +645,9 @@ i = ac97_rdcd(codec, AC97_REGEXT_ID); if (i != 0xffff) { codec->extcaps = i & 0x3fff; - codec->extid = (i & 0xc000) >> 14; - codec->extstat = ac97_rdcd(codec, AC97_REGEXT_STAT) & AC97_EXTCAPS; + codec->extid = (i & 0xc000) >> 14; + codec->extstat = ac97_rdcd(codec, AC97_REGEXT_STAT) & + AC97_EXTCAPS; } } @@ -691,7 +660,7 @@ codec_patch(codec); for (i = 0; i < AC97_MIXER_SIZE; i++) { - k = codec->noext? codec->mix[i].enable : 1; + k = codec->noext ? codec->mix[i].enable : 1; reg = codec->mix[i].reg; if (reg < 0) reg = -reg; @@ -721,11 +690,11 @@ bit++; j = ((1 << bit) - 1) << codec->mix[i].ofs; ac97_wrcd(codec, reg, - j | (codec->mix[i].mute ? 0x8000 : 0)); + j | (codec->mix[i].mute ? 0x8000 : 0)); k = ac97_rdcd(codec, reg) & j; k >>= codec->mix[i].ofs; if (reg == AC97_MIX_TONE && - ((k & 0x0001) == 0x0000)) + ((k & 0x0001) == 0x0000)) k >>= 1; for (j = 0; k >> j; j++) ; @@ -755,26 +724,29 @@ } device_printf(codec->dev, "<%s>\n", - ac97_hw_desc(codec->id, vname, cname, desc)); + ac97_hw_desc(codec->id, vname, cname, desc)); if (bootverbose) { if (codec->flags & AC97_F_RDCD_BUG) - device_printf(codec->dev, "Buggy AC97 Codec: aggressive ac97_rdcd() workaround enabled\n"); + device_printf(codec->dev, + "Buggy AC97 Codec: aggressive ac97_rdcd() workaround enabled\n"); device_printf(codec->dev, "Codec features "); for (i = j = 0; i < 10; i++) if (codec->caps & (1 << i)) - printf("%s%s", j++? ", " : "", ac97feature[i]); - printf("%s%d bit master volume", j++? ", " : "", codec->mix[SOUND_MIXER_VOLUME].bits); - printf("%s%s\n", j? ", " : "", ac97enhancement[codec->se]); + printf("%s%s", j++ ? ", " : "", ac97feature[i]); + printf("%s%d bit master volume", j++ ? ", " : "", + codec->mix[SOUND_MIXER_VOLUME].bits); + printf("%s%s\n", j ? ", " : "", ac97enhancement[codec->se]); if (codec->extcaps != 0 || codec->extid) { device_printf(codec->dev, "%s codec", - codec->extid? "Secondary" : "Primary"); + codec->extid ? "Secondary" : "Primary"); if (codec->extcaps) printf(" extended features "); for (i = j = 0; i < 14; i++) if (codec->extcaps & (1 << i)) - printf("%s%s", j++? ", " : "", ac97extfeature[i]); + printf("%s%s", j++ ? ", " : "", + ac97extfeature[i]); printf("\n"); } } @@ -782,13 +754,15 @@ i = 0; while ((ac97_rdcd(codec, AC97_REG_POWER) & 2) == 0) { if (++i == 100) { - device_printf(codec->dev, "ac97 codec reports dac not ready\n"); + device_printf(codec->dev, + "ac97 codec reports dac not ready\n"); break; } DELAY(1000); } if (bootverbose) - device_printf(codec->dev, "ac97 codec dac ready count: %d\n", i); + device_printf(codec->dev, "ac97 codec dac ready count: %d\n", + i); snd_mtxunlock(codec->lock); return 0; } @@ -804,18 +778,20 @@ return ENODEV; } - ac97_wrcd(codec, AC97_REG_POWER, (codec->flags & AC97_F_EAPD_INV)? 0x8000 : 0x0000); + ac97_wrcd(codec, AC97_REG_POWER, + (codec->flags & AC97_F_EAPD_INV) ? 0x8000 : 0x0000); ac97_reset(codec); - ac97_wrcd(codec, AC97_REG_POWER, (codec->flags & AC97_F_EAPD_INV)? 0x8000 : 0x0000); + ac97_wrcd(codec, AC97_REG_POWER, + (codec->flags & AC97_F_EAPD_INV) ? 0x8000 : 0x0000); if (!codec->noext) { ac97_wrcd(codec, AC97_REGEXT_STAT, codec->extstat); - if ((ac97_rdcd(codec, AC97_REGEXT_STAT) & AC97_EXTCAPS) - != codec->extstat) - device_printf(codec->dev, "ac97 codec failed to reset extended mode (%x, got %x)\n", - codec->extstat, - ac97_rdcd(codec, AC97_REGEXT_STAT) & - AC97_EXTCAPS); + if ((ac97_rdcd(codec, AC97_REGEXT_STAT) & AC97_EXTCAPS) != + codec->extstat) + device_printf(codec->dev, + "ac97 codec failed to reset extended mode (%x, got %x)\n", + codec->extstat, + ac97_rdcd(codec, AC97_REGEXT_STAT) & AC97_EXTCAPS); } if ((ac97_rdcd(codec, AC97_REG_POWER) & 2) == 0) @@ -840,11 +816,13 @@ codec->flags = 0; if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "eapdinv", &i) == 0 && i != 0) + "eapdinv", &i) == 0 && + i != 0) codec->flags |= AC97_F_EAPD_INV; if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "softpcmvol", &i) == 0 && i != 0) + "softpcmvol", &i) == 0 && + i != 0) pcm_setflags(dev, pcm_getflags(dev) | SD_F_SOFTPCMVOL); return codec; @@ -918,11 +896,10 @@ if ((val & 0x8000) == (orig & 0x8000)) return; SYSCTL_ADD_PROC(device_get_sysctl_ctx(codec->dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(codec->dev)), - OID_AUTO, "eapd", - CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, - codec, sizeof(codec), sysctl_hw_snd_ac97_eapd, - "I", "AC97 External Amplifier"); + SYSCTL_CHILDREN(device_get_sysctl_tree(codec->dev)), OID_AUTO, + "eapd", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, codec, + sizeof(codec), sysctl_hw_snd_ac97_eapd, "I", + "AC97 External Amplifier"); } static int @@ -938,7 +915,7 @@ return -1; switch (codec->id) { - case 0x41445374: /* AD1981B */ + case 0x41445374: /* AD1981B */ switch (codec->subvendor) { case 0x02d91014: /* @@ -954,11 +931,9 @@ if (codec->mix[SOUND_MIXER_PHONEOUT].enable) mask |= SOUND_MASK_PHONEOUT; if (codec->mix[SOUND_MIXER_VOLUME].enable) - mix_setparentchild(m, SOUND_MIXER_VOLUME, - mask); + mix_setparentchild(m, SOUND_MIXER_VOLUME, mask); else { - mix_setparentchild(m, SOUND_MIXER_VOLUME, - mask); + mix_setparentchild(m, SOUND_MIXER_VOLUME, mask); mix_setrealdev(m, SOUND_MIXER_VOLUME, SOUND_MIXER_NONE); } @@ -977,8 +952,7 @@ codec->mix[SOUND_MIXER_PHONEOUT].enable = 1; mix_setrealdev(m, SOUND_MIXER_PHONEOUT, SOUND_MIXER_VOLUME); - mix_setrealdev(m, SOUND_MIXER_VOLUME, - SOUND_MIXER_NONE); + mix_setrealdev(m, SOUND_MIXER_VOLUME, SOUND_MIXER_NONE); mix_setparentchild(m, SOUND_MIXER_VOLUME, SOUND_MASK_OGAIN | SOUND_MASK_PHONEOUT); break; @@ -986,15 +960,15 @@ break; } break; - case 0x434d4941: /* CMI9738 */ - case 0x434d4961: /* CMI9739 */ - case 0x434d4978: /* CMI9761 */ - case 0x434d4982: /* CMI9761 */ - case 0x434d4983: /* CMI9761 */ + case 0x434d4941: /* CMI9738 */ + case 0x434d4961: /* CMI9739 */ + case 0x434d4978: /* CMI9761 */ + case 0x434d4982: /* CMI9761 */ + case 0x434d4983: /* CMI9761 */ bzero(&codec->mix[SOUND_MIXER_PCM], sizeof(codec->mix[SOUND_MIXER_PCM])); - pcm_setflags(codec->dev, pcm_getflags(codec->dev) | - SD_F_SOFTPCMVOL); + pcm_setflags(codec->dev, + pcm_getflags(codec->dev) | SD_F_SOFTPCMVOL); /* XXX How about master volume ? */ break; default: @@ -1013,12 +987,12 @@ mask = 0; for (i = 0; i < AC97_MIXER_SIZE; i++) - mask |= codec->mix[i].enable? 1 << i : 0; + mask |= codec->mix[i].enable ? 1 << i : 0; mix_setdevs(m, mask); mask = 0; for (i = 0; i < AC97_MIXER_SIZE; i++) - mask |= codec->mix[i].recidx? 1 << i : 0; + mask |= codec->mix[i].recidx ? 1 << i : 0; mix_setrecdevs(m, mask); ac97_init_sysctl(codec); @@ -1072,17 +1046,15 @@ for (i = 0; i < AC97_MIXER_SIZE; i++) if ((src & (1 << i)) != 0) break; - return (ac97_setrecsrc(codec, i) == 0)? 1U << i : 0xffffffffU; + return (ac97_setrecsrc(codec, i) == 0) ? 1U << i : 0xffffffffU; } -static kobj_method_t ac97mixer_methods[] = { - KOBJMETHOD(mixer_init, ac97mix_init), - KOBJMETHOD(mixer_uninit, ac97mix_uninit), - KOBJMETHOD(mixer_reinit, ac97mix_reinit), - KOBJMETHOD(mixer_set, ac97mix_set), - KOBJMETHOD(mixer_setrecsrc, ac97mix_setrecsrc), - KOBJMETHOD_END -}; +static kobj_method_t ac97mixer_methods[] = { KOBJMETHOD(mixer_init, + ac97mix_init), + KOBJMETHOD(mixer_uninit, ac97mix_uninit), + KOBJMETHOD(mixer_reinit, ac97mix_reinit), + KOBJMETHOD(mixer_set, ac97mix_set), + KOBJMETHOD(mixer_setrecsrc, ac97mix_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(ac97mixer); /* -------------------------------------------------------------------- */ Index: sys/dev/sound/pcm/ac97_patch.h =================================================================== --- sys/dev/sound/pcm/ac97_patch.h +++ sys/dev/sound/pcm/ac97_patch.h @@ -26,10 +26,10 @@ * SUCH DAMAGE. */ -typedef void (*ac97_patch)(struct ac97_info*); +typedef void (*ac97_patch)(struct ac97_info *); -void ad1886_patch(struct ac97_info*); -void ad198x_patch(struct ac97_info*); -void ad1981b_patch(struct ac97_info*); -void cmi9739_patch(struct ac97_info*); -void alc655_patch(struct ac97_info*); +void ad1886_patch(struct ac97_info *); +void ad198x_patch(struct ac97_info *); +void ad1981b_patch(struct ac97_info *); +void cmi9739_patch(struct ac97_info *); +void alc655_patch(struct ac97_info *); Index: sys/dev/sound/pcm/ac97_patch.c =================================================================== --- sys/dev/sound/pcm/ac97_patch.c +++ sys/dev/sound/pcm/ac97_patch.c @@ -30,11 +30,12 @@ #include "opt_snd.h" #endif -#include #include #include +#include -void ad1886_patch(struct ac97_info* codec) +void +ad1886_patch(struct ac97_info *codec) { #define AC97_AD_JACK_SPDIF 0x72 /* @@ -46,10 +47,11 @@ ac97_wrcd(codec, AC97_AD_JACK_SPDIF, 0x0010); } -void ad198x_patch(struct ac97_info* codec) +void +ad198x_patch(struct ac97_info *codec) { switch (ac97_getsubvendor(codec)) { - case 0x11931043: /* Not for ASUS A9T (probably else too). */ + case 0x11931043: /* Not for ASUS A9T (probably else too). */ break; default: ac97_wrcd(codec, 0x76, ac97_rdcd(codec, 0x76) | 0x0420); @@ -57,14 +59,15 @@ } } -void ad1981b_patch(struct ac97_info* codec) +void +ad1981b_patch(struct ac97_info *codec) { /* * Enable headphone jack sensing. */ switch (ac97_getsubvendor(codec)) { - case 0x02d91014: /* IBM Thinkcentre */ - case 0x099c103c: /* HP nx6110 */ + case 0x02d91014: /* IBM Thinkcentre */ + case 0x099c103c: /* HP nx6110 */ ac97_wrcd(codec, AC97_AD_JACK_SPDIF, ac97_rdcd(codec, AC97_AD_JACK_SPDIF) | 0x0800); break; @@ -73,14 +76,15 @@ } } -void cmi9739_patch(struct ac97_info* codec) +void +cmi9739_patch(struct ac97_info *codec) { /* * Few laptops need extra register initialization * to power up the internal speakers. */ switch (ac97_getsubvendor(codec)) { - case 0x18431043: /* ASUS W1000N */ + case 0x18431043: /* ASUS W1000N */ ac97_wrcd(codec, AC97_REG_POWER, 0x000f); ac97_wrcd(codec, AC97_MIXEXT_CLFE, 0x0000); ac97_wrcd(codec, 0x64, 0x7110); @@ -90,16 +94,17 @@ } } -void alc655_patch(struct ac97_info* codec) +void +alc655_patch(struct ac97_info *codec) { /* * MSI (Micro-Star International) specific EAPD quirk. */ switch (ac97_getsubvendor(codec)) { - case 0x00611462: /* MSI S250 */ - case 0x01311462: /* MSI S270 */ - case 0x01611462: /* LG K1 Express */ - case 0x03511462: /* MSI L725 */ + case 0x00611462: /* MSI S250 */ + case 0x01311462: /* MSI S270 */ + case 0x01611462: /* LG K1 Express */ + case 0x03511462: /* MSI L725 */ ac97_wrcd(codec, 0x7a, ac97_rdcd(codec, 0x7a) & 0xfffd); break; case 0x10ca1734: Index: sys/dev/sound/pcm/buffer.h =================================================================== --- sys/dev/sound/pcm/buffer.h +++ sys/dev/sound/pcm/buffer.h @@ -28,22 +28,22 @@ #define SNDBUF_LOCKASSERT(b) -#define SNDBUF_F_MANAGED 0x00000008 +#define SNDBUF_F_MANAGED 0x00000008 -#define SNDBUF_NAMELEN 48 +#define SNDBUF_NAMELEN 48 struct snd_dbuf { device_t dev; u_int8_t *buf, *tmpbuf; u_int8_t *shadbuf; /**< shadow buffer used w/ S_D_SILENCE/SKIP */ - volatile int sl; /**< shadbuf ready length in # of bytes */ + volatile int sl; /**< shadbuf ready length in # of bytes */ unsigned int bufsize, maxsize, allocsize; volatile int dl; /* transfer size */ volatile int rp; /* pointers to the ready area */ volatile int rl; /* length of ready area */ volatile int hp; volatile u_int64_t total, prev_total; - int dmachan, dir; /* dma channel */ + int dmachan, dir; /* dma channel */ u_int32_t fmt, spd, bps, align; unsigned int blksz, blkcnt; int xrun; @@ -57,16 +57,19 @@ char name[SNDBUF_NAMELEN]; }; -struct snd_dbuf *sndbuf_create(device_t dev, char *drv, char *desc, struct pcm_channel *channel); +struct snd_dbuf *sndbuf_create(device_t dev, char *drv, char *desc, + struct pcm_channel *channel); void sndbuf_destroy(struct snd_dbuf *b); void sndbuf_dump(struct snd_dbuf *b, char *s, u_int32_t what); -int sndbuf_alloc(struct snd_dbuf *b, bus_dma_tag_t dmatag, int dmaflags, unsigned int size); +int sndbuf_alloc(struct snd_dbuf *b, bus_dma_tag_t dmatag, int dmaflags, + unsigned int size); int sndbuf_setup(struct snd_dbuf *b, void *buf, unsigned int size); void sndbuf_free(struct snd_dbuf *b); int sndbuf_resize(struct snd_dbuf *b, unsigned int blkcnt, unsigned int blksz); -int sndbuf_remalloc(struct snd_dbuf *b, unsigned int blkcnt, unsigned int blksz); +int sndbuf_remalloc(struct snd_dbuf *b, unsigned int blkcnt, + unsigned int blksz); void sndbuf_reset(struct snd_dbuf *b); void sndbuf_clear(struct snd_dbuf *b, unsigned int length); void sndbuf_fillsilence(struct snd_dbuf *b); @@ -108,13 +111,15 @@ u_int64_t sndbuf_getprevblocks(struct snd_dbuf *b); u_int64_t sndbuf_gettotal(struct snd_dbuf *b); u_int64_t sndbuf_getprevtotal(struct snd_dbuf *b); -unsigned int sndbuf_xbytes(unsigned int v, struct snd_dbuf *from, struct snd_dbuf *to); +unsigned int sndbuf_xbytes(unsigned int v, struct snd_dbuf *from, + struct snd_dbuf *to); u_int8_t sndbuf_zerodata(u_int32_t fmt); void sndbuf_updateprevtotal(struct snd_dbuf *b); int sndbuf_acquire(struct snd_dbuf *b, u_int8_t *from, unsigned int count); int sndbuf_dispose(struct snd_dbuf *b, u_int8_t *to, unsigned int count); -int sndbuf_feed(struct snd_dbuf *from, struct snd_dbuf *to, struct pcm_channel *channel, struct pcm_feeder *feeder, unsigned int count); +int sndbuf_feed(struct snd_dbuf *from, struct snd_dbuf *to, + struct pcm_channel *channel, struct pcm_feeder *feeder, unsigned int count); u_int32_t sndbuf_getflags(struct snd_dbuf *b); void sndbuf_setflags(struct snd_dbuf *b, u_int32_t flags, int on); Index: sys/dev/sound/pcm/buffer.c =================================================================== --- sys/dev/sound/pcm/buffer.c +++ sys/dev/sound/pcm/buffer.c @@ -37,7 +37,7 @@ #include "feeder_if.h" #define SND_USE_FXDIV -#define SND_DECLARE_FXDIV +#define SND_DECLARE_FXDIV #include "snd_fxdiv_gen.h" struct snd_dbuf * @@ -100,12 +100,13 @@ b->buf_addr = 0; b->flags |= SNDBUF_F_MANAGED; if (bus_dmamem_alloc(b->dmatag, (void **)&b->buf, b->dmaflags, - &b->dmamap)) { + &b->dmamap)) { sndbuf_free(b); return (ENOMEM); } if (bus_dmamap_load(b->dmatag, b->dmamap, b->buf, b->maxsize, - sndbuf_setmap, b, BUS_DMA_NOWAIT) != 0 || b->buf_addr == 0) { + sndbuf_setmap, b, BUS_DMA_NOWAIT) != 0 || + b->buf_addr == 0) { sndbuf_free(b); return (ENOMEM); } @@ -154,7 +155,7 @@ b->dmamap = NULL; } -#define SNDBUF_CACHE_SHIFT 5 +#define SNDBUF_CACHE_SHIFT 5 int sndbuf_resize(struct snd_dbuf *b, unsigned int blkcnt, unsigned int blksz) @@ -186,15 +187,15 @@ CHN_LOCK(b->channel); if (snd_verbose > 3) printf("%s(): b=%p %p -> %p [%d -> %d : %d]\n", - __func__, b, b->tmpbuf, tmpbuf, - b->allocsize, allocsize, bufsize); + __func__, b, b->tmpbuf, tmpbuf, b->allocsize, + allocsize, bufsize); if (b->tmpbuf != NULL) free(b->tmpbuf, M_DEVBUF); b->tmpbuf = tmpbuf; b->allocsize = allocsize; } else if (snd_verbose > 3) - printf("%s(): b=%p %d [%d] NOCHANGE\n", - __func__, b, b->allocsize, b->bufsize); + printf("%s(): b=%p %d [%d] NOCHANGE\n", __func__, b, + b->allocsize, b->bufsize); b->blkcnt = blkcnt; b->blksz = blksz; @@ -209,7 +210,7 @@ int sndbuf_remalloc(struct snd_dbuf *b, unsigned int blkcnt, unsigned int blksz) { - unsigned int bufsize, allocsize; + unsigned int bufsize, allocsize; u_int8_t *buf, *tmpbuf, *shadbuf; if (blkcnt < 2 || blksz < 16) @@ -235,12 +236,12 @@ free(b->shadbuf, M_DEVBUF); b->shadbuf = shadbuf; if (snd_verbose > 3) - printf("%s(): b=%p %d -> %d [%d]\n", - __func__, b, b->allocsize, allocsize, bufsize); + printf("%s(): b=%p %d -> %d [%d]\n", __func__, b, + b->allocsize, allocsize, bufsize); b->allocsize = allocsize; } else if (snd_verbose > 3) - printf("%s(): b=%p %d [%d] NOCHANGE\n", - __func__, b, b->allocsize, b->bufsize); + printf("%s(): b=%p %d [%d] NOCHANGE\n", __func__, b, + b->allocsize, b->bufsize); b->blkcnt = blkcnt; b->blksz = blksz; @@ -454,7 +455,7 @@ void sndbuf_setrun(struct snd_dbuf *b, int go) { - b->dl = go? b->blksz : 0; + b->dl = go ? b->blksz : 0; } struct selinfo * @@ -500,7 +501,8 @@ sndbuf_getready(struct snd_dbuf *b) { SNDBUF_LOCKASSERT(b); - KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), ("%s: b->rl invalid %d", __func__, b->rl)); + KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), + ("%s: b->rl invalid %d", __func__, b->rl)); return b->rl; } @@ -509,7 +511,8 @@ sndbuf_getreadyptr(struct snd_dbuf *b) { SNDBUF_LOCKASSERT(b); - KASSERT((b->rp >= 0) && (b->rp <= b->bufsize), ("%s: b->rp invalid %d", __func__, b->rp)); + KASSERT((b->rp >= 0) && (b->rp <= b->bufsize), + ("%s: b->rp invalid %d", __func__, b->rp)); return b->rp; } @@ -518,7 +521,8 @@ sndbuf_getfree(struct snd_dbuf *b) { SNDBUF_LOCKASSERT(b); - KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), ("%s: b->rl invalid %d", __func__, b->rl)); + KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), + ("%s: b->rl invalid %d", __func__, b->rl)); return b->bufsize - b->rl; } @@ -527,8 +531,10 @@ sndbuf_getfreeptr(struct snd_dbuf *b) { SNDBUF_LOCKASSERT(b); - KASSERT((b->rp >= 0) && (b->rp <= b->bufsize), ("%s: b->rp invalid %d", __func__, b->rp)); - KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), ("%s: b->rl invalid %d", __func__, b->rl)); + KASSERT((b->rp >= 0) && (b->rp <= b->bufsize), + ("%s: b->rp invalid %d", __func__, b->rp)); + KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), + ("%s: b->rl invalid %d", __func__, b->rl)); return (b->rp + b->rl) % b->bufsize; } @@ -615,20 +621,25 @@ { int l; - KASSERT(count <= sndbuf_getfree(b), ("%s: count %d > free %d", __func__, count, sndbuf_getfree(b))); - KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), ("%s: b->rl invalid %d", __func__, b->rl)); + KASSERT(count <= sndbuf_getfree(b), + ("%s: count %d > free %d", __func__, count, sndbuf_getfree(b))); + KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), + ("%s: b->rl invalid %d", __func__, b->rl)); b->total += count; if (from != NULL) { while (count > 0) { - l = min(count, sndbuf_getsize(b) - sndbuf_getfreeptr(b)); - bcopy(from, sndbuf_getbufofs(b, sndbuf_getfreeptr(b)), l); + l = min(count, + sndbuf_getsize(b) - sndbuf_getfreeptr(b)); + bcopy(from, sndbuf_getbufofs(b, sndbuf_getfreeptr(b)), + l); from += l; b->rl += l; count -= l; } } else b->rl += count; - KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), ("%s: b->rl invalid %d, count %d", __func__, b->rl, count)); + KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), + ("%s: b->rl invalid %d, count %d", __func__, b->rl, count)); return 0; } @@ -652,12 +663,16 @@ { int l; - KASSERT(count <= sndbuf_getready(b), ("%s: count %d > ready %d", __func__, count, sndbuf_getready(b))); - KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), ("%s: b->rl invalid %d", __func__, b->rl)); + KASSERT(count <= sndbuf_getready(b), + ("%s: count %d > ready %d", __func__, count, sndbuf_getready(b))); + KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), + ("%s: b->rl invalid %d", __func__, b->rl)); if (to != NULL) { while (count > 0) { - l = min(count, sndbuf_getsize(b) - sndbuf_getreadyptr(b)); - bcopy(sndbuf_getbufofs(b, sndbuf_getreadyptr(b)), to, l); + l = min(count, + sndbuf_getsize(b) - sndbuf_getreadyptr(b)); + bcopy(sndbuf_getbufofs(b, sndbuf_getreadyptr(b)), to, + l); to += l; b->rl -= l; b->rp = (b->rp + l) % b->bufsize; @@ -667,15 +682,16 @@ b->rl -= count; b->rp = (b->rp + count) % b->bufsize; } - KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), ("%s: b->rl invalid %d, count %d", __func__, b->rl, count)); + KASSERT((b->rl >= 0) && (b->rl <= b->bufsize), + ("%s: b->rl invalid %d, count %d", __func__, b->rl, count)); return 0; } #ifdef SND_DIAGNOSTIC static uint32_t snd_feeder_maxfeed = 0; -SYSCTL_UINT(_hw_snd, OID_AUTO, feeder_maxfeed, CTLFLAG_RD, - &snd_feeder_maxfeed, 0, "maximum feeder count request"); +SYSCTL_UINT(_hw_snd, OID_AUTO, feeder_maxfeed, CTLFLAG_RD, &snd_feeder_maxfeed, + 0, "maximum feeder count request"); static uint32_t snd_feeder_maxcycle = 0; SYSCTL_UINT(_hw_snd, OID_AUTO, feeder_maxcycle, CTLFLAG_RD, @@ -684,7 +700,8 @@ /* count is number of bytes we want added to destination buffer */ int -sndbuf_feed(struct snd_dbuf *from, struct snd_dbuf *to, struct pcm_channel *channel, struct pcm_feeder *feeder, unsigned int count) +sndbuf_feed(struct snd_dbuf *from, struct snd_dbuf *to, + struct pcm_channel *channel, struct pcm_feeder *feeder, unsigned int count) { unsigned int cnt, maxfeed; #ifdef SND_DIAGNOSTIC @@ -732,13 +749,16 @@ if (what & 0x01) printf(" bufsize: %d, maxsize: %d", b->bufsize, b->maxsize); if (what & 0x02) - printf(" dl: %d, rp: %d, rl: %d, hp: %d", b->dl, b->rp, b->rl, b->hp); + printf(" dl: %d, rp: %d, rl: %d, hp: %d", b->dl, b->rp, b->rl, + b->hp); if (what & 0x04) - printf(" total: %ju, prev_total: %ju, xrun: %d", (uintmax_t)b->total, (uintmax_t)b->prev_total, b->xrun); + printf(" total: %ju, prev_total: %ju, xrun: %d", + (uintmax_t)b->total, (uintmax_t)b->prev_total, b->xrun); if (what & 0x08) printf(" fmt: 0x%x, spd: %d", b->fmt, b->spd); if (what & 0x10) - printf(" blksz: %d, blkcnt: %d, flags: 0x%x", b->blksz, b->blkcnt, b->flags); + printf(" blksz: %d, blkcnt: %d, flags: 0x%x", b->blksz, + b->blkcnt, b->flags); printf(" ]\n"); } Index: sys/dev/sound/pcm/channel.h =================================================================== --- sys/dev/sound/pcm/channel.h +++ sys/dev/sound/pcm/channel.h @@ -53,10 +53,10 @@ extern struct mtx snd_pcm_syncgroups_mtx; extern SLIST_HEAD(pcm_synclist, pcmchan_syncgroup) snd_pcm_syncgroups; -#define PCM_SG_LOCK() mtx_lock(&snd_pcm_syncgroups_mtx) -#define PCM_SG_TRYLOCK() mtx_trylock(&snd_pcm_syncgroups_mtx) -#define PCM_SG_UNLOCK() mtx_unlock(&snd_pcm_syncgroups_mtx) -#define PCM_SG_LOCKASSERT(arg) mtx_assert(&snd_pcm_syncgroups_mtx, arg) +#define PCM_SG_LOCK() mtx_lock(&snd_pcm_syncgroups_mtx) +#define PCM_SG_TRYLOCK() mtx_trylock(&snd_pcm_syncgroups_mtx) +#define PCM_SG_UNLOCK() mtx_unlock(&snd_pcm_syncgroups_mtx) +#define PCM_SG_LOCKASSERT(arg) mtx_assert(&snd_pcm_syncgroups_mtx, arg) /** * @brief Specifies an audio device sync group @@ -76,9 +76,9 @@ struct pcm_channel *ch; }; -#define CHN_NAMELEN 32 -#define CHN_COMM_UNUSED "" -#define CHN_COMM_UNKNOWN "" +#define CHN_NAMELEN 32 +#define CHN_COMM_UNUSED "" +#define CHN_COMM_UNKNOWN "" struct pcm_channel { kobj_t methods; @@ -137,7 +137,7 @@ */ struct pcmchan_syncmember *sm; #ifdef OSSV4_EXPERIMENT - u_int16_t lpeak, rpeak; /**< Peak value from 0-32767. */ + u_int16_t lpeak, rpeak; /**< Peak value from 0-32767. */ #endif struct { @@ -170,87 +170,95 @@ void *data1, *data2; }; -#define CHN_HEAD(x, y) &(x)->y.head -#define CHN_INIT(x, y) SLIST_INIT(CHN_HEAD(x, y)) -#define CHN_LINK(y) y.link -#define CHN_EMPTY(x, y) SLIST_EMPTY(CHN_HEAD(x, y)) -#define CHN_FIRST(x, y) SLIST_FIRST(CHN_HEAD(x, y)) +#define CHN_HEAD(x, y) &(x)->y.head +#define CHN_INIT(x, y) SLIST_INIT(CHN_HEAD(x, y)) +#define CHN_LINK(y) y.link +#define CHN_EMPTY(x, y) SLIST_EMPTY(CHN_HEAD(x, y)) +#define CHN_FIRST(x, y) SLIST_FIRST(CHN_HEAD(x, y)) -#define CHN_FOREACH(x, y, z) \ - SLIST_FOREACH(x, CHN_HEAD(y, z), CHN_LINK(z)) +#define CHN_FOREACH(x, y, z) SLIST_FOREACH (x, CHN_HEAD(y, z), CHN_LINK(z)) -#define CHN_FOREACH_SAFE(w, x, y, z) \ - SLIST_FOREACH_SAFE(w, CHN_HEAD(x, z), CHN_LINK(z), y) +#define CHN_FOREACH_SAFE(w, x, y, z) \ + SLIST_FOREACH_SAFE (w, CHN_HEAD(x, z), CHN_LINK(z), y) -#define CHN_INSERT_HEAD(x, y, z) \ +#define CHN_INSERT_HEAD(x, y, z) \ SLIST_INSERT_HEAD(CHN_HEAD(x, z), y, CHN_LINK(z)) -#define CHN_INSERT_AFTER(x, y, z) \ - SLIST_INSERT_AFTER(x, y, CHN_LINK(z)) +#define CHN_INSERT_AFTER(x, y, z) SLIST_INSERT_AFTER(x, y, CHN_LINK(z)) -#define CHN_REMOVE(x, y, z) \ +#define CHN_REMOVE(x, y, z) \ SLIST_REMOVE(CHN_HEAD(x, z), y, pcm_channel, CHN_LINK(z)) -#define CHN_INSERT_HEAD_SAFE(x, y, z) do { \ - struct pcm_channel *t = NULL; \ - CHN_FOREACH(t, x, z) { \ - if (t == y) \ - break; \ - } \ - if (t != y) \ - CHN_INSERT_HEAD(x, y, z); \ -} while (0) - -#define CHN_INSERT_AFTER_SAFE(w, x, y, z) do { \ - struct pcm_channel *t = NULL; \ - CHN_FOREACH(t, w, z) { \ - if (t == y) \ - break; \ - } \ - if (t != y) \ - CHN_INSERT_AFTER(x, y, z); \ -} while (0) - -#define CHN_REMOVE_SAFE(x, y, z) do { \ - struct pcm_channel *t = NULL; \ - CHN_FOREACH(t, x, z) { \ - if (t == y) \ - break; \ - } \ - if (t == y) \ - CHN_REMOVE(x, y, z); \ -} while (0) - -#define CHN_INSERT_SORT(w, x, y, z) do { \ - struct pcm_channel *t, *a = NULL; \ - CHN_FOREACH(t, x, z) { \ - if ((y)->unit w t->unit) \ - a = t; \ - else \ - break; \ - } \ - if (a != NULL) \ - CHN_INSERT_AFTER(a, y, z); \ - else \ - CHN_INSERT_HEAD(x, y, z); \ -} while (0) - -#define CHN_INSERT_SORT_ASCEND(x, y, z) CHN_INSERT_SORT(>, x, y, z) -#define CHN_INSERT_SORT_DESCEND(x, y, z) CHN_INSERT_SORT(<, x, y, z) - -#define CHN_UNIT(x) (snd_unit2u((x)->unit)) -#define CHN_DEV(x) (snd_unit2d((x)->unit)) -#define CHN_CHAN(x) (snd_unit2c((x)->unit)) - -#define CHN_BUF_PARENT(x, y) \ - (((x) != NULL && (x)->parentchannel != NULL && \ - (x)->parentchannel->bufhard != NULL) ? \ - (x)->parentchannel->bufhard : (y)) - -#define CHN_BROADCAST(x) do { \ - if ((x)->cv_waiters != 0) \ - cv_broadcastpri(x, PRIBIO); \ -} while (0) +#define CHN_INSERT_HEAD_SAFE(x, y, z) \ + do { \ + struct pcm_channel *t = NULL; \ + CHN_FOREACH(t, x, z) \ + { \ + if (t == y) \ + break; \ + } \ + if (t != y) \ + CHN_INSERT_HEAD(x, y, z); \ + } while (0) + +#define CHN_INSERT_AFTER_SAFE(w, x, y, z) \ + do { \ + struct pcm_channel *t = NULL; \ + CHN_FOREACH(t, w, z) \ + { \ + if (t == y) \ + break; \ + } \ + if (t != y) \ + CHN_INSERT_AFTER(x, y, z); \ + } while (0) + +#define CHN_REMOVE_SAFE(x, y, z) \ + do { \ + struct pcm_channel *t = NULL; \ + CHN_FOREACH(t, x, z) \ + { \ + if (t == y) \ + break; \ + } \ + if (t == y) \ + CHN_REMOVE(x, y, z); \ + } while (0) + +#define CHN_INSERT_SORT(w, x, y, z) \ + do { \ + struct pcm_channel *t, *a = NULL; \ + CHN_FOREACH(t, x, z) \ + { \ + if ((y)->unit w t->unit) \ + a = t; \ + else \ + break; \ + } \ + if (a != NULL) \ + CHN_INSERT_AFTER(a, y, z); \ + else \ + CHN_INSERT_HEAD(x, y, z); \ + } while (0) + +#define CHN_INSERT_SORT_ASCEND(x, y, z) CHN_INSERT_SORT(>, x, y, z) +#define CHN_INSERT_SORT_DESCEND(x, y, z) CHN_INSERT_SORT(<, x, y, z) + +#define CHN_UNIT(x) (snd_unit2u((x)->unit)) +#define CHN_DEV(x) (snd_unit2d((x)->unit)) +#define CHN_CHAN(x) (snd_unit2c((x)->unit)) + +#define CHN_BUF_PARENT(x, y) \ + (((x) != NULL && (x)->parentchannel != NULL && \ + (x)->parentchannel->bufhard != NULL) ? \ + (x)->parentchannel->bufhard : \ + (y)) + +#define CHN_BROADCAST(x) \ + do { \ + if ((x)->cv_waiters != 0) \ + cv_broadcastpri(x, PRIBIO); \ + } while (0) #include "channel_if.h" @@ -302,42 +310,42 @@ int chn_getrates(struct pcm_channel *c, int **rates); int chn_syncdestroy(struct pcm_channel *c); -#define CHN_SETVOLUME(...) chn_setvolume_matrix(__VA_ARGS__) +#define CHN_SETVOLUME(...) chn_setvolume_matrix(__VA_ARGS__) #if defined(SND_DIAGNOSTIC) || defined(INVARIANTS) -#define CHN_GETVOLUME(...) chn_getvolume_matrix(__VA_ARGS__) +#define CHN_GETVOLUME(...) chn_getvolume_matrix(__VA_ARGS__) #else -#define CHN_GETVOLUME(x, y, z) ((x)->volume[y][z]) +#define CHN_GETVOLUME(x, y, z) ((x)->volume[y][z]) #endif -#define CHN_GETMUTE(x, y, z) ((x)->muted[y][z]) +#define CHN_GETMUTE(x, y, z) ((x)->muted[y][z]) #ifdef OSSV4_EXPERIMENT int chn_getpeaks(struct pcm_channel *c, int *lpeak, int *rpeak); #endif -#define CHN_LOCKOWNED(c) mtx_owned((c)->lock) -#define CHN_LOCK(c) mtx_lock((c)->lock) -#define CHN_UNLOCK(c) mtx_unlock((c)->lock) -#define CHN_TRYLOCK(c) mtx_trylock((c)->lock) -#define CHN_LOCKASSERT(c) mtx_assert((c)->lock, MA_OWNED) -#define CHN_UNLOCKASSERT(c) mtx_assert((c)->lock, MA_NOTOWNED) +#define CHN_LOCKOWNED(c) mtx_owned((c)->lock) +#define CHN_LOCK(c) mtx_lock((c)->lock) +#define CHN_UNLOCK(c) mtx_unlock((c)->lock) +#define CHN_TRYLOCK(c) mtx_trylock((c)->lock) +#define CHN_LOCKASSERT(c) mtx_assert((c)->lock, MA_OWNED) +#define CHN_UNLOCKASSERT(c) mtx_assert((c)->lock, MA_NOTOWNED) int snd_fmtvalid(uint32_t fmt, uint32_t *fmtlist); uint32_t snd_str2afmt(const char *); uint32_t snd_afmt2str(uint32_t, char *, size_t); -#define AFMTSTR_LEN 16 +#define AFMTSTR_LEN 16 extern int chn_latency; extern int chn_latency_profile; extern int report_soft_formats; extern int report_soft_matrix; -#define PCMDIR_PLAY 1 -#define PCMDIR_PLAY_VIRTUAL 2 -#define PCMDIR_REC -1 -#define PCMDIR_REC_VIRTUAL -2 +#define PCMDIR_PLAY 1 +#define PCMDIR_PLAY_VIRTUAL 2 +#define PCMDIR_REC -1 +#define PCMDIR_REC_VIRTUAL -2 #define PCMTRIG_START 1 #define PCMTRIG_EMLDMAWR 2 @@ -345,105 +353,103 @@ #define PCMTRIG_STOP 0 #define PCMTRIG_ABORT -1 -#define PCMTRIG_COMMON(x) ((x) == PCMTRIG_START || \ - (x) == PCMTRIG_STOP || \ - (x) == PCMTRIG_ABORT) - -#define CHN_F_CLOSING 0x00000001 /* a pending close */ -#define CHN_F_ABORTING 0x00000002 /* a pending abort */ -#define CHN_F_RUNNING 0x00000004 /* dma is running */ -#define CHN_F_TRIGGERED 0x00000008 -#define CHN_F_NOTRIGGER 0x00000010 -#define CHN_F_SLEEPING 0x00000020 - -#define CHN_F_NBIO 0x00000040 /* do non-blocking i/o */ -#define CHN_F_MMAP 0x00000080 /* has been mmap()ed */ - -#define CHN_F_BUSY 0x00000100 /* has been opened */ -#define CHN_F_DIRTY 0x00000200 /* need re-config */ -#define CHN_F_DEAD 0x00000400 /* too many errors, dead, mdk */ -#define CHN_F_SILENCE 0x00000800 /* silence, nil, null, yada */ - -#define CHN_F_HAS_SIZE 0x00001000 /* user set block size */ -#define CHN_F_HAS_VCHAN 0x00002000 /* vchan master */ - -#define CHN_F_VCHAN_PASSTHROUGH 0x00004000 /* digital ac3/dts passthrough */ -#define CHN_F_VCHAN_ADAPTIVE 0x00008000 /* adaptive format/rate selection */ -#define CHN_F_VCHAN_DYNAMIC (CHN_F_VCHAN_PASSTHROUGH | CHN_F_VCHAN_ADAPTIVE) - -#define CHN_F_VIRTUAL 0x10000000 /* not backed by hardware */ -#define CHN_F_BITPERFECT 0x20000000 /* un-cooked, Heh.. */ -#define CHN_F_PASSTHROUGH 0x40000000 /* passthrough re-config */ -#define CHN_F_EXCLUSIVE 0x80000000 /* exclusive access */ - -#define CHN_F_BITS "\020" \ - "\001CLOSING" \ - "\002ABORTING" \ - "\003RUNNING" \ - "\004TRIGGERED" \ - "\005NOTRIGGER" \ - "\006SLEEPING" \ - "\007NBIO" \ - "\010MMAP" \ - "\011BUSY" \ - "\012DIRTY" \ - "\013DEAD" \ - "\014SILENCE" \ - "\015HAS_SIZE" \ - "\016HAS_VCHAN" \ - "\017VCHAN_PASSTHROUGH" \ - "\020VCHAN_ADAPTIVE" \ - "\035VIRTUAL" \ - "\036BITPERFECT" \ - "\037PASSTHROUGH" \ - "\040EXCLUSIVE" - -#define CHN_F_RESET (CHN_F_BUSY | CHN_F_DEAD | \ - CHN_F_VIRTUAL | CHN_F_HAS_VCHAN | \ - CHN_F_VCHAN_DYNAMIC | \ - CHN_F_PASSTHROUGH | CHN_F_EXCLUSIVE) - -#define CHN_F_MMAP_INVALID (CHN_F_DEAD | CHN_F_RUNNING) - - - -#define CHN_N_RATE 0x00000001 -#define CHN_N_FORMAT 0x00000002 -#define CHN_N_VOLUME 0x00000004 -#define CHN_N_BLOCKSIZE 0x00000008 -#define CHN_N_TRIGGER 0x00000010 - -#define CHN_LATENCY_MIN 0 -#define CHN_LATENCY_MAX 10 -#define CHN_LATENCY_DEFAULT 2 /* 21.3ms total buffering */ -#define CHN_POLICY_MIN CHN_LATENCY_MIN -#define CHN_POLICY_MAX CHN_LATENCY_MAX -#define CHN_POLICY_DEFAULT CHN_LATENCY_DEFAULT - -#define CHN_LATENCY_PROFILE_MIN 0 -#define CHN_LATENCY_PROFILE_MAX 1 -#define CHN_LATENCY_PROFILE_DEFAULT CHN_LATENCY_PROFILE_MAX - -#define CHN_STARTED(c) ((c)->flags & CHN_F_TRIGGERED) -#define CHN_STOPPED(c) (!CHN_STARTED(c)) -#define CHN_DIRSTR(c) (((c)->direction == PCMDIR_PLAY) ? \ - "PCMDIR_PLAY" : "PCMDIR_REC") -#define CHN_BITPERFECT(c) ((c)->flags & CHN_F_BITPERFECT) -#define CHN_PASSTHROUGH(c) ((c)->flags & CHN_F_PASSTHROUGH) - -#define CHN_TIMEOUT 5 -#define CHN_TIMEOUT_MIN 1 -#define CHN_TIMEOUT_MAX 10 +#define PCMTRIG_COMMON(x) \ + ((x) == PCMTRIG_START || (x) == PCMTRIG_STOP || (x) == PCMTRIG_ABORT) + +#define CHN_F_CLOSING 0x00000001 /* a pending close */ +#define CHN_F_ABORTING 0x00000002 /* a pending abort */ +#define CHN_F_RUNNING 0x00000004 /* dma is running */ +#define CHN_F_TRIGGERED 0x00000008 +#define CHN_F_NOTRIGGER 0x00000010 +#define CHN_F_SLEEPING 0x00000020 + +#define CHN_F_NBIO 0x00000040 /* do non-blocking i/o */ +#define CHN_F_MMAP 0x00000080 /* has been mmap()ed */ + +#define CHN_F_BUSY 0x00000100 /* has been opened */ +#define CHN_F_DIRTY 0x00000200 /* need re-config */ +#define CHN_F_DEAD 0x00000400 /* too many errors, dead, mdk */ +#define CHN_F_SILENCE 0x00000800 /* silence, nil, null, yada */ + +#define CHN_F_HAS_SIZE 0x00001000 /* user set block size */ +#define CHN_F_HAS_VCHAN 0x00002000 /* vchan master */ + +#define CHN_F_VCHAN_PASSTHROUGH 0x00004000 /* digital ac3/dts passthrough */ +#define CHN_F_VCHAN_ADAPTIVE 0x00008000 /* adaptive format/rate selection */ +#define CHN_F_VCHAN_DYNAMIC (CHN_F_VCHAN_PASSTHROUGH | CHN_F_VCHAN_ADAPTIVE) + +#define CHN_F_VIRTUAL 0x10000000 /* not backed by hardware */ +#define CHN_F_BITPERFECT 0x20000000 /* un-cooked, Heh.. */ +#define CHN_F_PASSTHROUGH 0x40000000 /* passthrough re-config */ +#define CHN_F_EXCLUSIVE 0x80000000 /* exclusive access */ + +#define CHN_F_BITS \ + "\020" \ + "\001CLOSING" \ + "\002ABORTING" \ + "\003RUNNING" \ + "\004TRIGGERED" \ + "\005NOTRIGGER" \ + "\006SLEEPING" \ + "\007NBIO" \ + "\010MMAP" \ + "\011BUSY" \ + "\012DIRTY" \ + "\013DEAD" \ + "\014SILENCE" \ + "\015HAS_SIZE" \ + "\016HAS_VCHAN" \ + "\017VCHAN_PASSTHROUGH" \ + "\020VCHAN_ADAPTIVE" \ + "\035VIRTUAL" \ + "\036BITPERFECT" \ + "\037PASSTHROUGH" \ + "\040EXCLUSIVE" + +#define CHN_F_RESET \ + (CHN_F_BUSY | CHN_F_DEAD | CHN_F_VIRTUAL | CHN_F_HAS_VCHAN | \ + CHN_F_VCHAN_DYNAMIC | CHN_F_PASSTHROUGH | CHN_F_EXCLUSIVE) + +#define CHN_F_MMAP_INVALID (CHN_F_DEAD | CHN_F_RUNNING) + +#define CHN_N_RATE 0x00000001 +#define CHN_N_FORMAT 0x00000002 +#define CHN_N_VOLUME 0x00000004 +#define CHN_N_BLOCKSIZE 0x00000008 +#define CHN_N_TRIGGER 0x00000010 + +#define CHN_LATENCY_MIN 0 +#define CHN_LATENCY_MAX 10 +#define CHN_LATENCY_DEFAULT 2 /* 21.3ms total buffering */ +#define CHN_POLICY_MIN CHN_LATENCY_MIN +#define CHN_POLICY_MAX CHN_LATENCY_MAX +#define CHN_POLICY_DEFAULT CHN_LATENCY_DEFAULT + +#define CHN_LATENCY_PROFILE_MIN 0 +#define CHN_LATENCY_PROFILE_MAX 1 +#define CHN_LATENCY_PROFILE_DEFAULT CHN_LATENCY_PROFILE_MAX + +#define CHN_STARTED(c) ((c)->flags & CHN_F_TRIGGERED) +#define CHN_STOPPED(c) (!CHN_STARTED(c)) +#define CHN_DIRSTR(c) \ + (((c)->direction == PCMDIR_PLAY) ? "PCMDIR_PLAY" : "PCMDIR_REC") +#define CHN_BITPERFECT(c) ((c)->flags & CHN_F_BITPERFECT) +#define CHN_PASSTHROUGH(c) ((c)->flags & CHN_F_PASSTHROUGH) + +#define CHN_TIMEOUT 5 +#define CHN_TIMEOUT_MIN 1 +#define CHN_TIMEOUT_MAX 10 /* * This should be large enough to hold all pcm data between * tsleeps in chn_{read,write} at the highest sample rate. * (which is usually 48kHz * 16bit * stereo = 192000 bytes/sec) */ -#define CHN_2NDBUFBLKSIZE (2 * 1024) +#define CHN_2NDBUFBLKSIZE (2 * 1024) /* The total number of blocks per secondary bufhard. */ -#define CHN_2NDBUFBLKNUM (32) +#define CHN_2NDBUFBLKNUM (32) /* The size of a whole secondary bufhard. */ -#define CHN_2NDBUFMAXSIZE (131072) +#define CHN_2NDBUFMAXSIZE (131072) -#define CHANNEL_DECLARE(name) static DEFINE_CLASS(name, name ## _methods, sizeof(struct kobj)) +#define CHANNEL_DECLARE(name) \ + static DEFINE_CLASS(name, name##_methods, sizeof(struct kobj)) Index: sys/dev/sound/pcm/channel.c =================================================================== --- sys/dev/sound/pcm/channel.c +++ sys/dev/sound/pcm/channel.c @@ -40,11 +40,11 @@ int report_soft_formats = 1; SYSCTL_INT(_hw_snd, OID_AUTO, report_soft_formats, CTLFLAG_RW, - &report_soft_formats, 0, "report software-emulated formats"); + &report_soft_formats, 0, "report software-emulated formats"); int report_soft_matrix = 1; SYSCTL_INT(_hw_snd, OID_AUTO, report_soft_matrix, CTLFLAG_RW, - &report_soft_matrix, 0, "report software-emulated channel matrixing"); + &report_soft_matrix, 0, "report software-emulated channel matrixing"); int chn_latency = CHN_LATENCY_DEFAULT; @@ -66,8 +66,7 @@ } SYSCTL_PROC(_hw_snd, OID_AUTO, latency, CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, 0, sizeof(int), - sysctl_hw_snd_latency, "I", - "buffering latency (0=low ... 10=high)"); + sysctl_hw_snd_latency, "I", "buffering latency (0=low ... 10=high)"); int chn_latency_profile = CHN_LATENCY_PROFILE_DEFAULT; @@ -112,12 +111,11 @@ } SYSCTL_PROC(_hw_snd, OID_AUTO, timeout, CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, 0, sizeof(int), - sysctl_hw_snd_timeout, "I", - "interrupt timeout (1 - 10) seconds"); + sysctl_hw_snd_timeout, "I", "interrupt timeout (1 - 10) seconds"); static int chn_vpc_autoreset = 1; -SYSCTL_INT(_hw_snd, OID_AUTO, vpc_autoreset, CTLFLAG_RWTUN, - &chn_vpc_autoreset, 0, "automatically reset channels volume to 0db"); +SYSCTL_INT(_hw_snd, OID_AUTO, vpc_autoreset, CTLFLAG_RWTUN, &chn_vpc_autoreset, + 0, "automatically reset channels volume to 0db"); static int chn_vol_0db_pcm = SND_VOL_0DB_PCM; @@ -128,15 +126,17 @@ struct pcm_channel *c; int i; - for (i = 0; pcm_devclass != NULL && - i < devclass_get_maxunit(pcm_devclass); i++) { + for (i = 0; + pcm_devclass != NULL && i < devclass_get_maxunit(pcm_devclass); + i++) { d = devclass_get_softc(pcm_devclass, i); if (!PCM_REGISTERED(d)) continue; PCM_LOCK(d); PCM_WAIT(d); PCM_ACQUIRE(d); - CHN_FOREACH(c, d, channels.pcm) { + CHN_FOREACH(c, d, channels.pcm) + { CHN_LOCK(c); CHN_SETVOLUME(c, SND_VOL_C_PCM, SND_CHN_T_VOL_0DB, db); if (reset != 0) @@ -167,8 +167,7 @@ } SYSCTL_PROC(_hw_snd, OID_AUTO, vpc_0db, CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_NEEDGIANT, 0, sizeof(int), - sysctl_hw_snd_vpc_0db, "I", - "0db relative level"); + sysctl_hw_snd_vpc_0db, "I", "0db relative level"); static int sysctl_hw_snd_vpc_reset(SYSCTL_HANDLER_ARGS) @@ -187,17 +186,15 @@ } SYSCTL_PROC(_hw_snd, OID_AUTO, vpc_reset, CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 0, sizeof(int), - sysctl_hw_snd_vpc_reset, "I", - "reset volume on all channels"); + sysctl_hw_snd_vpc_reset, "I", "reset volume on all channels"); static int chn_usefrags = 0; static int chn_syncdelay = -1; -SYSCTL_INT(_hw_snd, OID_AUTO, usefrags, CTLFLAG_RWTUN, - &chn_usefrags, 0, "prefer setfragments() over setblocksize()"); -SYSCTL_INT(_hw_snd, OID_AUTO, syncdelay, CTLFLAG_RWTUN, - &chn_syncdelay, 0, - "append (0-1000) millisecond trailing buffer delay on each sync"); +SYSCTL_INT(_hw_snd, OID_AUTO, usefrags, CTLFLAG_RWTUN, &chn_usefrags, 0, + "prefer setfragments() over setblocksize()"); +SYSCTL_INT(_hw_snd, OID_AUTO, syncdelay, CTLFLAG_RWTUN, &chn_syncdelay, 0, + "append (0-1000) millisecond trailing buffer delay on each sync"); /** * @brief Channel sync group lock @@ -206,7 +203,8 @@ * before touching syncgroups or the main syncgroup list. */ struct mtx snd_pcm_syncgroups_mtx; -MTX_SYSINIT(pcm_syncgroup, &snd_pcm_syncgroups_mtx, "PCM channel sync group lock", MTX_DEF); +MTX_SYSINIT(pcm_syncgroup, &snd_pcm_syncgroups_mtx, + "PCM channel sync group lock", MTX_DEF); /** * @brief syncgroups' master list * @@ -215,7 +213,8 @@ * * See SNDCTL_DSP_SYNCGROUP for more information. */ -struct pcm_synclist snd_pcm_syncgroups = SLIST_HEAD_INITIALIZER(snd_pcm_syncgroups); +struct pcm_synclist snd_pcm_syncgroups = SLIST_HEAD_INITIALIZER( + snd_pcm_syncgroups); static void chn_lockinit(struct pcm_channel *c, int dir) @@ -318,7 +317,8 @@ CHN_BROADCAST(&c->intr_cv); } } else { - CHN_FOREACH(ch, c, children.busy) { + CHN_FOREACH(ch, c, children.busy) + { CHN_LOCK(ch); chn_wakeup(ch); CHN_UNLOCK(ch); @@ -371,14 +371,15 @@ amt = min(delta, sndbuf_getfree(b)); amt -= amt % sndbuf_getalign(b); if (amt > 0) - sndbuf_acquire(b, NULL, amt); + sndbuf_acquire(b, NULL, amt); } if (snd_verbose > 3 && CHN_STARTED(c) && delta == 0) { - device_printf(c->dev, "WARNING: %s DMA completion " - "too fast/slow ! hwptr=%u, old=%u " - "delta=%u amt=%u ready=%u free=%u\n", - CHN_DIRSTR(c), hwptr, old, delta, amt, - sndbuf_getready(b), sndbuf_getfree(b)); + device_printf(c->dev, + "WARNING: %s DMA completion " + "too fast/slow ! hwptr=%u, old=%u " + "delta=%u amt=%u ready=%u free=%u\n", + CHN_DIRSTR(c), hwptr, old, delta, amt, sndbuf_getready(b), + sndbuf_getfree(b)); } return delta; @@ -398,8 +399,8 @@ wasfree = sndbuf_getfree(b); want = min(sndbuf_getsize(b), - imax(0, sndbuf_xbytes(sndbuf_getsize(bs), bs, b) - - sndbuf_getready(b))); + imax(0, + sndbuf_xbytes(sndbuf_getsize(bs), bs, b) - sndbuf_getready(b))); amt = min(wasfree, want); if (amt > 0) sndbuf_feed(bs, b, c, c->feeder, amt); @@ -494,9 +495,10 @@ * not sure if it at all violates the "write * should be allowed to block" model. * - * The idea is that, while set with CHN_F_NOTRIGGER, - * a channel isn't playing, *but* without this we - * end up with "interrupt timeout / channel dead". + * The idea is that, while set with + *CHN_F_NOTRIGGER, a channel isn't playing, *but* + *without this we end up with "interrupt timeout / + *channel dead". */ ret = EAGAIN; } else { @@ -504,7 +506,8 @@ if (ret == EAGAIN) { ret = EINVAL; c->flags |= CHN_F_DEAD; - device_printf(c->dev, "%s(): %s: " + device_printf(c->dev, + "%s(): %s: " "play interrupt timeout, channel dead\n", __func__, c->name); } else if (ret == ERESTART || ret == EINTR) @@ -627,7 +630,8 @@ if (ret == EAGAIN) { ret = EINVAL; c->flags |= CHN_F_DEAD; - device_printf(c->dev, "%s(): %s: " + device_printf(c->dev, + "%s(): %s: " "record interrupt timeout, channel dead\n", __func__, c->name); } else if (ret == ERESTART || ret == EINTR) @@ -701,10 +705,12 @@ } } if (snd_verbose > 3 && CHN_EMPTY(c, children)) - device_printf(c->dev, "%s(): %s (%s) threshold " - "i=%d j=%d\n", __func__, CHN_DIRSTR(c), - (c->flags & CHN_F_VIRTUAL) ? "virtual" : - "hardware", i, j); + device_printf(c->dev, + "%s(): %s (%s) threshold " + "i=%d j=%d\n", + __func__, CHN_DIRSTR(c), + (c->flags & CHN_F_VIRTUAL) ? "virtual" : "hardware", + i, j); } if (i >= j) { @@ -728,13 +734,15 @@ "intrtimeout=%u latency=%dms)\n", __func__, (c->flags & CHN_F_HAS_VCHAN) ? - "VCHAN PARENT" : "HW", CHN_DIRSTR(c), + "VCHAN PARENT" : + "HW", + CHN_DIRSTR(c), (c->flags & CHN_F_CLOSING) ? "closing" : - "running", - sndbuf_getready(b), - force, i, j, c->timeout, + "running", + sndbuf_getready(b), force, i, j, c->timeout, (sndbuf_getsize(b) * 1000) / - (sndbuf_getalign(b) * sndbuf_getspd(b))); + (sndbuf_getalign(b) * + sndbuf_getspd(b))); } err = chn_trigger(c, PCMTRIG_START); } @@ -802,7 +810,8 @@ */ if (syncdelay > 0) minflush += (sndbuf_getalign(bs) * sndbuf_getspd(bs) * - ((syncdelay > 1000) ? 1000 : syncdelay)) / 1000; + ((syncdelay > 1000) ? 1000 : syncdelay)) / + 1000; minflush -= minflush % sndbuf_getalign(bs); @@ -831,9 +840,10 @@ ret = 0; if (snd_verbose > 3) - device_printf(c->dev, "%s(): [begin] timeout=%d count=%d " - "minflush=%d resid=%d\n", __func__, c->timeout, count, - minflush, resid); + device_printf(c->dev, + "%s(): [begin] timeout=%d count=%d " + "minflush=%d resid=%d\n", + __func__, c->timeout, count, minflush, resid); cflag = c->flags & CHN_F_CLOSING; c->flags |= CHN_F_CLOSING; @@ -851,8 +861,8 @@ "%s(): [stalled] timeout=%d " "count=%d hcount=%d " "resid=%d minflush=%d\n", - __func__, c->timeout, count, - hcount, resid, minflush); + __func__, c->timeout, count, hcount, + resid, minflush); } else if (resid < residp && count < hcount) { ++count; if (snd_verbose > 3) @@ -860,12 +870,11 @@ "%s((): [resume] timeout=%d " "count=%d hcount=%d " "resid=%d minflush=%d\n", - __func__, c->timeout, count, - hcount, resid, minflush); + __func__, c->timeout, count, hcount, + resid, minflush); } if (minflush > 0 && sndbuf_getfree(bs) > 0) { - threshold = min(minflush, - sndbuf_getfree(bs)); + threshold = min(minflush, sndbuf_getfree(bs)); sndbuf_clear(bs, threshold); sndbuf_acquire(bs, NULL, threshold); resid = sndbuf_getready(bs); @@ -982,7 +991,7 @@ for (i = 0; fmtlist[i] != 0; i++) { if (fmt == fmtlist[i] || ((fmt & AFMT_PASSTHROUGH) && - (AFMT_ENCODING(fmt) & fmtlist[i]))) + (AFMT_ENCODING(fmt) & fmtlist[i]))) return (1); } @@ -992,36 +1001,32 @@ static const struct { char *name, *alias1, *alias2; uint32_t afmt; -} afmt_tab[] = { - { "alaw", NULL, NULL, AFMT_A_LAW }, - { "mulaw", NULL, NULL, AFMT_MU_LAW }, - { "u8", "8", NULL, AFMT_U8 }, - { "s8", NULL, NULL, AFMT_S8 }, +} afmt_tab[] = { { "alaw", NULL, NULL, AFMT_A_LAW }, + { "mulaw", NULL, NULL, AFMT_MU_LAW }, { "u8", "8", NULL, AFMT_U8 }, + { "s8", NULL, NULL, AFMT_S8 }, #if BYTE_ORDER == LITTLE_ENDIAN { "s16le", "s16", "16", AFMT_S16_LE }, - { "s16be", NULL, NULL, AFMT_S16_BE }, + { "s16be", NULL, NULL, AFMT_S16_BE }, #else - { "s16le", NULL, NULL, AFMT_S16_LE }, + { "s16le", NULL, NULL, AFMT_S16_LE }, { "s16be", "s16", "16", AFMT_S16_BE }, #endif - { "u16le", NULL, NULL, AFMT_U16_LE }, - { "u16be", NULL, NULL, AFMT_U16_BE }, - { "s24le", NULL, NULL, AFMT_S24_LE }, - { "s24be", NULL, NULL, AFMT_S24_BE }, - { "u24le", NULL, NULL, AFMT_U24_LE }, - { "u24be", NULL, NULL, AFMT_U24_BE }, + { "u16le", NULL, NULL, AFMT_U16_LE }, + { "u16be", NULL, NULL, AFMT_U16_BE }, + { "s24le", NULL, NULL, AFMT_S24_LE }, + { "s24be", NULL, NULL, AFMT_S24_BE }, + { "u24le", NULL, NULL, AFMT_U24_LE }, + { "u24be", NULL, NULL, AFMT_U24_BE }, #if BYTE_ORDER == LITTLE_ENDIAN { "s32le", "s32", "32", AFMT_S32_LE }, - { "s32be", NULL, NULL, AFMT_S32_BE }, + { "s32be", NULL, NULL, AFMT_S32_BE }, #else - { "s32le", NULL, NULL, AFMT_S32_LE }, + { "s32le", NULL, NULL, AFMT_S32_LE }, { "s32be", "s32", "32", AFMT_S32_BE }, #endif - { "u32le", NULL, NULL, AFMT_U32_LE }, - { "u32be", NULL, NULL, AFMT_U32_BE }, - { "ac3", NULL, NULL, AFMT_AC3 }, - { NULL, NULL, NULL, 0 } -}; + { "u32le", NULL, NULL, AFMT_U32_LE }, + { "u32be", NULL, NULL, AFMT_U32_BE }, { "ac3", NULL, NULL, AFMT_AC3 }, + { NULL, NULL, NULL, 0 } }; uint32_t snd_str2afmt(const char *req) @@ -1111,8 +1116,7 @@ if (enc != afmt_tab[i].afmt) continue; /* found a match */ - snprintf(buf, len, "%s:%d.%d", - afmt_tab[i].name, ch - ext, ext); + snprintf(buf, len, "%s:%d.%d", afmt_tab[i].name, ch - ext, ext); return (SND_FORMAT(enc, ch, ext)); } return (0); @@ -1131,7 +1135,8 @@ c->xruns = 0; c->flags |= (pcm_getflags(c->dev) & SD_F_BITPERFECT) ? - CHN_F_BITPERFECT : 0; + CHN_F_BITPERFECT : + 0; r = CHANNEL_RESET(c->methods, c->devinfo); if (r == 0 && fmt != 0 && spd != 0) { @@ -1305,8 +1310,8 @@ int ret; ret = chn_setvolume_matrix(c, SND_VOL_C_MASTER, SND_CHN_T_FL, left); - ret |= chn_setvolume_matrix(c, SND_VOL_C_MASTER, SND_CHN_T_FR, - right) << 8; + ret |= chn_setvolume_matrix(c, SND_VOL_C_MASTER, SND_CHN_T_FR, right) + << 8; return (ret); } @@ -1337,12 +1342,13 @@ int i; KASSERT(c != NULL && vc >= SND_VOL_C_MASTER && vc < SND_VOL_C_MAX && - (vc == SND_VOL_C_MASTER || (vc & 1)) && - (vt == SND_CHN_T_VOL_0DB || (vt >= SND_CHN_T_BEGIN && - vt <= SND_CHN_T_END)) && (vt != SND_CHN_T_VOL_0DB || - (val >= SND_VOL_0DB_MIN && val <= SND_VOL_0DB_MAX)), - ("%s(): invalid volume matrix c=%p vc=%d vt=%d val=%d", - __func__, c, vc, vt, val)); + (vc == SND_VOL_C_MASTER || (vc & 1)) && + (vt == SND_CHN_T_VOL_0DB || + (vt >= SND_CHN_T_BEGIN && vt <= SND_CHN_T_END)) && + (vt != SND_CHN_T_VOL_0DB || + (val >= SND_VOL_0DB_MIN && val <= SND_VOL_0DB_MAX)), + ("%s(): invalid volume matrix c=%p vc=%d vt=%d val=%d", __func__, c, + vc, vt, val)); CHN_LOCKASSERT(c); if (val < 0) @@ -1358,13 +1364,13 @@ */ if (vc == SND_VOL_C_MASTER) { for (vc = SND_VOL_C_BEGIN; vc <= SND_VOL_C_END; - vc += SND_VOL_C_STEP) + vc += SND_VOL_C_STEP) c->volume[SND_VOL_C_VAL(vc)][vt] = SND_VOL_CALC_VAL(c->volume, vc, vt); } else if (vc & 1) { if (vt == SND_CHN_T_VOL_0DB) for (i = SND_CHN_T_BEGIN; i <= SND_CHN_T_END; - i += SND_CHN_T_STEP) { + i += SND_CHN_T_STEP) { c->volume[SND_VOL_C_VAL(vc)][i] = SND_VOL_CALC_VAL(c->volume, vc, i); } @@ -1380,10 +1386,10 @@ chn_getvolume_matrix(struct pcm_channel *c, int vc, int vt) { KASSERT(c != NULL && vc >= SND_VOL_C_MASTER && vc < SND_VOL_C_MAX && - (vt == SND_CHN_T_VOL_0DB || - (vt >= SND_CHN_T_BEGIN && vt <= SND_CHN_T_END)), - ("%s(): invalid volume matrix c=%p vc=%d vt=%d", - __func__, c, vc, vt)); + (vt == SND_CHN_T_VOL_0DB || + (vt >= SND_CHN_T_BEGIN && vt <= SND_CHN_T_END)), + ("%s(): invalid volume matrix c=%p vc=%d vt=%d", __func__, c, vc, + vt)); CHN_LOCKASSERT(c); return (c->volume[vc][vt]); @@ -1413,10 +1419,11 @@ int i; KASSERT(c != NULL && vc >= SND_VOL_C_MASTER && vc < SND_VOL_C_MAX && - (vc == SND_VOL_C_MASTER || (vc & 1)) && - (vt == SND_CHN_T_VOL_0DB || (vt >= SND_CHN_T_BEGIN && vt <= SND_CHN_T_END)), - ("%s(): invalid mute matrix c=%p vc=%d vt=%d mute=%d", - __func__, c, vc, vt, mute)); + (vc == SND_VOL_C_MASTER || (vc & 1)) && + (vt == SND_CHN_T_VOL_0DB || + (vt >= SND_CHN_T_BEGIN && vt <= SND_CHN_T_END)), + ("%s(): invalid mute matrix c=%p vc=%d vt=%d mute=%d", __func__, c, + vc, vt, mute)); CHN_LOCKASSERT(c); @@ -1430,12 +1437,12 @@ */ if (vc == SND_VOL_C_MASTER) { for (vc = SND_VOL_C_BEGIN; vc <= SND_VOL_C_END; - vc += SND_VOL_C_STEP) + vc += SND_VOL_C_STEP) c->muted[SND_VOL_C_VAL(vc)][vt] = mute; } else if (vc & 1) { if (vt == SND_CHN_T_VOL_0DB) { for (i = SND_CHN_T_BEGIN; i <= SND_CHN_T_END; - i += SND_CHN_T_STEP) { + i += SND_CHN_T_STEP) { c->muted[SND_VOL_C_VAL(vc)][i] = mute; } } else { @@ -1449,10 +1456,10 @@ chn_getmute_matrix(struct pcm_channel *c, int vc, int vt) { KASSERT(c != NULL && vc >= SND_VOL_C_MASTER && vc < SND_VOL_C_MAX && - (vt == SND_CHN_T_VOL_0DB || - (vt >= SND_CHN_T_BEGIN && vt <= SND_CHN_T_END)), - ("%s(): invalid mute matrix c=%p vc=%d vt=%d", - __func__, c, vc, vt)); + (vt == SND_CHN_T_VOL_0DB || + (vt >= SND_CHN_T_BEGIN && vt <= SND_CHN_T_END)), + ("%s(): invalid mute matrix c=%p vc=%d vt=%d", __func__, c, vc, + vt)); CHN_LOCKASSERT(c); return (c->muted[vc][vt]); @@ -1526,10 +1533,10 @@ return (chn_setmatrix(c, &m)); } -#define SND_CHN_OSS_FRONT (SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR) -#define SND_CHN_OSS_SURR (SND_CHN_T_MASK_SL | SND_CHN_T_MASK_SR) -#define SND_CHN_OSS_CENTER_LFE (SND_CHN_T_MASK_FC | SND_CHN_T_MASK_LF) -#define SND_CHN_OSS_REAR (SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR) +#define SND_CHN_OSS_FRONT (SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR) +#define SND_CHN_OSS_SURR (SND_CHN_T_MASK_SL | SND_CHN_T_MASK_SR) +#define SND_CHN_OSS_CENTER_LFE (SND_CHN_T_MASK_FC | SND_CHN_T_MASK_LF) +#define SND_CHN_OSS_REAR (SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR) int chn_oss_getmask(struct pcm_channel *c, uint32_t *retmask) @@ -1699,46 +1706,61 @@ * aggressively through possibly real time programming technique. * */ -#define CHN_LATENCY_PBLKCNT_REF \ - {{1, 2, 3, 4, 5, 5, 4, 3, 2, 1, 1}, \ - {1, 2, 3, 4, 5, 5, 4, 3, 2, 1, 1}} -#define CHN_LATENCY_PBUFSZ_REF \ - {{7, 9, 12, 13, 14, 15, 15, 15, 15, 15, 16}, \ - {11, 12, 13, 14, 15, 16, 16, 16, 16, 16, 17}} - -#define CHN_LATENCY_RBLKCNT_REF \ - {{9, 8, 7, 6, 5, 5, 4, 3, 2, 1, 1}, \ - {9, 8, 7, 6, 5, 5, 4, 3, 2, 1, 1}} -#define CHN_LATENCY_RBUFSZ_REF \ - {{14, 14, 14, 14, 14, 15, 15, 15, 15, 15, 16}, \ - {15, 15, 15, 15, 15, 16, 16, 16, 16, 16, 17}} - -#define CHN_LATENCY_DATA_REF 192000 /* 48khz stereo 16bit ~ 48000 x 2 x 2 */ +#define CHN_LATENCY_PBLKCNT_REF \ + { \ + { 1, 2, 3, 4, 5, 5, 4, 3, 2, 1, 1 }, \ + { \ + 1, 2, 3, 4, 5, 5, 4, 3, 2, 1, 1 \ + } \ + } +#define CHN_LATENCY_PBUFSZ_REF \ + { \ + { 7, 9, 12, 13, 14, 15, 15, 15, 15, 15, 16 }, \ + { \ + 11, 12, 13, 14, 15, 16, 16, 16, 16, 16, 17 \ + } \ + } + +#define CHN_LATENCY_RBLKCNT_REF \ + { \ + { 9, 8, 7, 6, 5, 5, 4, 3, 2, 1, 1 }, \ + { \ + 9, 8, 7, 6, 5, 5, 4, 3, 2, 1, 1 \ + } \ + } +#define CHN_LATENCY_RBUFSZ_REF \ + { \ + { 14, 14, 14, 14, 14, 15, 15, 15, 15, 15, 16 }, \ + { \ + 15, 15, 15, 15, 15, 16, 16, 16, 16, 16, 17 \ + } \ + } + +#define CHN_LATENCY_DATA_REF 192000 /* 48khz stereo 16bit ~ 48000 x 2 x 2 */ static int chn_calclatency(int dir, int latency, int bps, u_int32_t datarate, - u_int32_t max, int *rblksz, int *rblkcnt) + u_int32_t max, int *rblksz, int *rblkcnt) { static int pblkcnts[CHN_LATENCY_PROFILE_MAX + 1][CHN_LATENCY_MAX + 1] = CHN_LATENCY_PBLKCNT_REF; - static int pbufszs[CHN_LATENCY_PROFILE_MAX + 1][CHN_LATENCY_MAX + 1] = + static int pbufszs[CHN_LATENCY_PROFILE_MAX + 1][CHN_LATENCY_MAX + 1] = CHN_LATENCY_PBUFSZ_REF; static int rblkcnts[CHN_LATENCY_PROFILE_MAX + 1][CHN_LATENCY_MAX + 1] = CHN_LATENCY_RBLKCNT_REF; - static int rbufszs[CHN_LATENCY_PROFILE_MAX + 1][CHN_LATENCY_MAX + 1] = + static int rbufszs[CHN_LATENCY_PROFILE_MAX + 1][CHN_LATENCY_MAX + 1] = CHN_LATENCY_RBUFSZ_REF; u_int32_t bufsz; int lprofile, blksz, blkcnt; - if (latency < CHN_LATENCY_MIN || latency > CHN_LATENCY_MAX || - bps < 1 || datarate < 1 || - !(dir == PCMDIR_PLAY || dir == PCMDIR_REC)) { + if (latency < CHN_LATENCY_MIN || latency > CHN_LATENCY_MAX || bps < 1 || + datarate < 1 || !(dir == PCMDIR_PLAY || dir == PCMDIR_REC)) { if (rblksz != NULL) *rblksz = CHN_2NDBUFMAXSIZE >> 1; if (rblkcnt != NULL) *rblkcnt = 2; printf("%s(): FAILED dir=%d latency=%d bps=%d " - "datarate=%u max=%u\n", + "datarate=%u max=%u\n", __func__, dir, latency, bps, datarate, max); return CHN_2NDBUFMAXSIZE; } @@ -1753,8 +1775,8 @@ bufsz = rbufszs[lprofile][latency]; } - bufsz = round_pow2(snd_xbytes(1 << bufsz, CHN_LATENCY_DATA_REF, - datarate)); + bufsz = round_pow2( + snd_xbytes(1 << bufsz, CHN_LATENCY_DATA_REF, datarate)); if (bufsz > max) bufsz = max; blksz = round_blksz(bufsz >> blkcnt, bps); @@ -1768,8 +1790,7 @@ } static int -chn_resizebuf(struct pcm_channel *c, int latency, - int blkcnt, int blksz) +chn_resizebuf(struct pcm_channel *c, int latency, int blkcnt, int blksz) { struct snd_dbuf *b, *bs, *pb; int sblksz, sblkcnt, hblksz, hblkcnt, limit = 0, nsblksz, nsblkcnt; @@ -1799,12 +1820,12 @@ if (!(blksz == 0 || blkcnt == -1) && (blksz < 16 || blksz < sndbuf_getalign(bs) || blkcnt < 2 || - (blksz * blkcnt) > CHN_2NDBUFMAXSIZE)) + (blksz * blkcnt) > CHN_2NDBUFMAXSIZE)) return EINVAL; chn_calclatency(c->direction, latency, sndbuf_getalign(bs), - sndbuf_getalign(bs) * sndbuf_getspd(bs), CHN_2NDBUFMAXSIZE, - &sblksz, &sblkcnt); + sndbuf_getalign(bs) * sndbuf_getspd(bs), CHN_2NDBUFMAXSIZE, &sblksz, + &sblkcnt); if (blksz == 0 || blkcnt == -1) { if (blkcnt == -1) @@ -1837,10 +1858,12 @@ CHN_LOCK(c); if (c->direction == PCMDIR_PLAY) { limit = (pb != NULL) ? - sndbuf_xbytes(sndbuf_getsize(pb), pb, bs) : 0; + sndbuf_xbytes(sndbuf_getsize(pb), pb, bs) : + 0; } else { limit = (pb != NULL) ? - sndbuf_xbytes(sndbuf_getblksz(pb), pb, bs) * 2 : 0; + sndbuf_xbytes(sndbuf_getblksz(pb), pb, bs) * 2 : + 0; } } else { hblkcnt = 2; @@ -1875,15 +1898,16 @@ CHN_UNLOCK(c); if (chn_usefrags == 0 || - CHANNEL_SETFRAGMENTS(c->methods, c->devinfo, - hblksz, hblkcnt) != 0) - sndbuf_setblksz(b, CHANNEL_SETBLOCKSIZE(c->methods, - c->devinfo, hblksz)); + CHANNEL_SETFRAGMENTS(c->methods, c->devinfo, hblksz, + hblkcnt) != 0) + sndbuf_setblksz(b, + CHANNEL_SETBLOCKSIZE(c->methods, c->devinfo, + hblksz)); CHN_LOCK(c); if (!CHN_EMPTY(c, children)) { - nsblksz = round_blksz( - sndbuf_xbytes(sndbuf_getblksz(b), b, bs), + nsblksz = round_blksz(sndbuf_xbytes(sndbuf_getblksz(b), + b, bs), sndbuf_getalign(bs)); nsblkcnt = sndbuf_getblkcnt(b); if (c->direction == PCMDIR_PLAY) { @@ -1927,8 +1951,8 @@ sndbuf_getsize(bs) != (sblkcnt * sblksz)) { ret = sndbuf_remalloc(bs, sblkcnt, sblksz); if (ret != 0) { - device_printf(c->dev, "%s(): Failed: %d %d\n", - __func__, sblkcnt, sblksz); + device_printf(c->dev, "%s(): Failed: %d %d\n", __func__, + sblkcnt, sblksz); return ret; } } @@ -1951,15 +1975,14 @@ chn_resetbuf(c); if (snd_verbose > 3) - device_printf(c->dev, "%s(): %s (%s) timeout=%u " + device_printf(c->dev, + "%s(): %s (%s) timeout=%u " "b[%d/%d/%d] bs[%d/%d/%d] limit=%d\n", __func__, CHN_DIRSTR(c), (c->flags & CHN_F_VIRTUAL) ? "virtual" : "hardware", - c->timeout, - sndbuf_getsize(b), sndbuf_getblksz(b), - sndbuf_getblkcnt(b), - sndbuf_getsize(bs), sndbuf_getblksz(bs), - sndbuf_getblkcnt(bs), limit); + c->timeout, sndbuf_getsize(b), sndbuf_getblksz(b), + sndbuf_getblkcnt(b), sndbuf_getsize(bs), + sndbuf_getblksz(bs), sndbuf_getblkcnt(bs), limit); return 0; } @@ -2000,8 +2023,8 @@ hwspeed = speed; RANGE(hwspeed, caps->minspeed, caps->maxspeed); - sndbuf_setspd(c->bufhard, CHANNEL_SETSPEED(c->methods, c->devinfo, - hwspeed)); + sndbuf_setspd(c->bufhard, + CHANNEL_SETSPEED(c->methods, c->devinfo, hwspeed)); hwspeed = sndbuf_getspd(c->bufhard); delta = (hwspeed > speed) ? (hwspeed - speed) : (speed - hwspeed); @@ -2086,8 +2109,7 @@ struct snd_mixer *m; d = (c != NULL) ? c->parentsnddev : NULL; - m = (d != NULL && d->mixer_dev != NULL) ? d->mixer_dev->si_drv1 : - NULL; + m = (d != NULL && d->mixer_dev != NULL) ? d->mixer_dev->si_drv1 : NULL; if (d == NULL || m == NULL) return; @@ -2146,8 +2168,8 @@ if (treble == -1) treble = 50; else - treble = ((treble & 0x7f) + - ((treble >> 8) & 0x7f)) >> 1; + treble = ((treble & 0x7f) + ((treble >> 8) & 0x7f)) >> + 1; if (bass == -1) bass = 50; @@ -2158,12 +2180,10 @@ if (f != NULL) { if (FEEDER_SET(f, FEEDEQ_TREBLE, treble) != 0) device_printf(c->dev, - "EQ: Failed to set treble -- %d\n", - treble); + "EQ: Failed to set treble -- %d\n", treble); if (FEEDER_SET(f, FEEDEQ_BASS, bass) != 0) device_printf(c->dev, - "EQ: Failed to set bass -- %d\n", - bass); + "EQ: Failed to set bass -- %d\n", bass); if (FEEDER_SET(f, FEEDEQ_PREAMP, d->eqpreamp) != 0) device_printf(c->dev, "EQ: Failed to set preamp -- %d\n", @@ -2203,8 +2223,8 @@ if (snd_verbose > 3) device_printf(c->dev, "%s() %s: calling go=0x%08x , " - "prev=0x%08x\n", __func__, c->name, go, - c->trigger); + "prev=0x%08x\n", + __func__, c->name, go, c->trigger); if (c->trigger != PCMTRIG_START) { c->trigger = go; CHN_UNLOCK(c); @@ -2220,8 +2240,8 @@ if (snd_verbose > 3) device_printf(c->dev, "%s() %s: calling go=0x%08x , " - "prev=0x%08x\n", __func__, c->name, go, - c->trigger); + "prev=0x%08x\n", + __func__, c->name, go, c->trigger); if (c->trigger == PCMTRIG_START) { c->trigger = go; CHN_UNLOCK(c); @@ -2372,7 +2392,8 @@ dirty = 0; vpflags = 0; - CHN_FOREACH(ch, c, children.busy) { + CHN_FOREACH(ch, c, children.busy) + { CHN_LOCK(ch); if ((ch->format & AFMT_PASSTHROUGH) && snd_fmtvalid(ch->format, caps->fmtlist)) { @@ -2419,7 +2440,7 @@ AFMT_CHANNEL(bestformat)) bestformat = besthwformat; else if (AFMT_CHANNEL(besthwformat) == - AFMT_CHANNEL(bestformat) && + AFMT_CHANNEL(bestformat) && AFMT_BIT(besthwformat) > AFMT_BIT(bestformat)) bestformat = besthwformat; CHN_UNLOCK(ch); @@ -2444,7 +2465,8 @@ err = chn_reset(c, bestformat, bestspeed); } if (err == 0 && dirty) { - CHN_FOREACH(ch, c, children.busy) { + CHN_FOREACH(ch, c, children.busy) + { CHN_LOCK(ch); if (VCHAN_SYNC_REQUIRED(ch)) vchan_sync(ch); @@ -2464,7 +2486,8 @@ bestspeed); err = chn_reset(c, bestformat, bestspeed); if (err == 0) { - CHN_FOREACH(ch, c, children.busy) { + CHN_FOREACH(ch, c, children.busy) + { CHN_LOCK(ch); if (VCHAN_SYNC_REQUIRED(ch)) vchan_sync(ch); @@ -2558,7 +2581,8 @@ free(sm, M_DEVBUF); if (SLIST_EMPTY(&sg->members)) { - SLIST_REMOVE(&snd_pcm_syncgroups, sg, pcmchan_syncgroup, link); + SLIST_REMOVE(&snd_pcm_syncgroups, sg, pcmchan_syncgroup, + link); sg_id = sg->id; free(sg, M_DEVBUF); } Index: sys/dev/sound/pcm/dsp.c =================================================================== --- sys/dev/sound/pcm/dsp.c +++ sys/dev/sound/pcm/dsp.c @@ -36,7 +36,6 @@ #include "opt_snd.h" #endif -#include #include #include #include @@ -47,6 +46,8 @@ #include #include +#include + struct dsp_cdevpriv { struct snddev_info *sc; struct pcm_channel *rdch; @@ -62,10 +63,9 @@ static int dsp_basename_clone = 1; SYSCTL_INT(_hw_snd, OID_AUTO, basename_clone, CTLFLAG_RWTUN, - &dsp_basename_clone, 0, - "DSP basename cloning (0: Disable; 1: Enabled)"); + &dsp_basename_clone, 0, "DSP basename cloning (0: Disable; 1: Enabled)"); -#define DSP_REGISTERED(x) (PCM_REGISTERED(x) && (x)->dsp_dev != NULL) +#define DSP_REGISTERED(x) (PCM_REGISTERED(x) && (x)->dsp_dev != NULL) #define OLDPCM_IOCTL @@ -78,32 +78,43 @@ static d_mmap_single_t dsp_mmap_single; struct cdevsw dsp_cdevsw = { - .d_version = D_VERSION, - .d_open = dsp_open, - .d_read = dsp_read, - .d_write = dsp_write, - .d_ioctl = dsp_ioctl, - .d_poll = dsp_poll, - .d_mmap = dsp_mmap, + .d_version = D_VERSION, + .d_open = dsp_open, + .d_read = dsp_read, + .d_write = dsp_write, + .d_ioctl = dsp_ioctl, + .d_poll = dsp_poll, + .d_mmap = dsp_mmap, .d_mmap_single = dsp_mmap_single, - .d_name = "dsp", + .d_name = "dsp", }; static eventhandler_tag dsp_ehtag = NULL; -static int dsp_oss_syncgroup(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_syncgroup *group); +static int dsp_oss_syncgroup(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_syncgroup *group); static int dsp_oss_syncstart(int sg_id); -static int dsp_oss_policy(struct pcm_channel *wrch, struct pcm_channel *rdch, int policy); -static int dsp_oss_cookedmode(struct pcm_channel *wrch, struct pcm_channel *rdch, int enabled); -static int dsp_oss_getchnorder(struct pcm_channel *wrch, struct pcm_channel *rdch, unsigned long long *map); -static int dsp_oss_setchnorder(struct pcm_channel *wrch, struct pcm_channel *rdch, unsigned long long *map); -static int dsp_oss_getchannelmask(struct pcm_channel *wrch, struct pcm_channel *rdch, int *mask); +static int dsp_oss_policy(struct pcm_channel *wrch, struct pcm_channel *rdch, + int policy); +static int dsp_oss_cookedmode(struct pcm_channel *wrch, + struct pcm_channel *rdch, int enabled); +static int dsp_oss_getchnorder(struct pcm_channel *wrch, + struct pcm_channel *rdch, unsigned long long *map); +static int dsp_oss_setchnorder(struct pcm_channel *wrch, + struct pcm_channel *rdch, unsigned long long *map); +static int dsp_oss_getchannelmask(struct pcm_channel *wrch, + struct pcm_channel *rdch, int *mask); #ifdef OSSV4_EXPERIMENT -static int dsp_oss_getlabel(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_label_t *label); -static int dsp_oss_setlabel(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_label_t *label); -static int dsp_oss_getsong(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_longname_t *song); -static int dsp_oss_setsong(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_longname_t *song); -static int dsp_oss_setname(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_longname_t *name); +static int dsp_oss_getlabel(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_label_t *label); +static int dsp_oss_setlabel(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_label_t *label); +static int dsp_oss_getsong(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_longname_t *song); +static int dsp_oss_setsong(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_longname_t *song); +static int dsp_oss_setname(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_longname_t *name); #endif int @@ -124,8 +135,8 @@ devargs.mda_si_drv1 = sc; err = make_dev_s(&devargs, &sc->dsp_dev, "dsp%d", unit); if (err != 0) { - device_printf(dev, "failed to create dsp%d: error %d", - unit, err); + device_printf(dev, "failed to create dsp%d: error %d", unit, + err); return (ENXIO); } @@ -205,16 +216,16 @@ /* duplex / simplex cdev type */ enum { - DSP_CDEV_TYPE_RDONLY, /* simplex read-only (record) */ - DSP_CDEV_TYPE_WRONLY, /* simplex write-only (play) */ - DSP_CDEV_TYPE_RDWR /* duplex read, write, or both */ + DSP_CDEV_TYPE_RDONLY, /* simplex read-only (record) */ + DSP_CDEV_TYPE_WRONLY, /* simplex write-only (play) */ + DSP_CDEV_TYPE_RDWR /* duplex read, write, or both */ }; -#define DSP_F_VALID(x) ((x) & (FREAD | FWRITE)) -#define DSP_F_DUPLEX(x) (((x) & (FREAD | FWRITE)) == (FREAD | FWRITE)) -#define DSP_F_SIMPLEX(x) (!DSP_F_DUPLEX(x)) -#define DSP_F_READ(x) ((x) & FREAD) -#define DSP_F_WRITE(x) ((x) & FWRITE) +#define DSP_F_VALID(x) ((x) & (FREAD | FWRITE)) +#define DSP_F_DUPLEX(x) (((x) & (FREAD | FWRITE)) == (FREAD | FWRITE)) +#define DSP_F_SIMPLEX(x) (!DSP_F_DUPLEX(x)) +#define DSP_F_READ(x) ((x) & FREAD) +#define DSP_F_WRITE(x) ((x) & FWRITE) static const struct { int type; @@ -228,41 +239,35 @@ uint32_t fmt, spd; int query; } dsp_cdevs[] = { - { SND_DEV_DSP, "dsp", ".", NULL, 0, 0, 0, 0, - SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, - DSP_CDEV_TYPE_RDWR }, - { SND_DEV_AUDIO, "audio", ".", NULL, 0, 0, 0, 0, - SND_FORMAT(AFMT_MU_LAW, 1, 0), DSP_DEFAULT_SPEED, - DSP_CDEV_TYPE_RDWR }, - { SND_DEV_DSP16, "dspW", ".", NULL, 0, 0, 0, 0, - SND_FORMAT(AFMT_S16_LE, 1, 0), DSP_DEFAULT_SPEED, - DSP_CDEV_TYPE_RDWR }, - { SND_DEV_DSPHW_PLAY, "dsp", ".p", NULL, 1, 1, SND_MAXHWCHAN, 1, - SND_FORMAT(AFMT_S16_LE, 2, 0), 48000, DSP_CDEV_TYPE_WRONLY }, - { SND_DEV_DSPHW_VPLAY, "dsp", ".vp", NULL, 1, 1, SND_MAXVCHANS, 1, - SND_FORMAT(AFMT_S16_LE, 2, 0), 48000, DSP_CDEV_TYPE_WRONLY }, - { SND_DEV_DSPHW_REC, "dsp", ".r", NULL, 1, 1, SND_MAXHWCHAN, 1, - SND_FORMAT(AFMT_S16_LE, 2, 0), 48000, DSP_CDEV_TYPE_RDONLY }, - { SND_DEV_DSPHW_VREC, "dsp", ".vr", NULL, 1, 1, SND_MAXVCHANS, 1, - SND_FORMAT(AFMT_S16_LE, 2, 0), 48000, DSP_CDEV_TYPE_RDONLY }, - { SND_DEV_DSPHW_CD, "dspcd", ".", NULL, 0, 0, 0, 0, - SND_FORMAT(AFMT_S16_LE, 2, 0), 44100, DSP_CDEV_TYPE_RDWR }, + { SND_DEV_DSP, "dsp", ".", NULL, 0, 0, 0, 0, SND_FORMAT(AFMT_U8, 1, 0), + DSP_DEFAULT_SPEED, DSP_CDEV_TYPE_RDWR }, + { SND_DEV_AUDIO, "audio", ".", NULL, 0, 0, 0, 0, + SND_FORMAT(AFMT_MU_LAW, 1, 0), DSP_DEFAULT_SPEED, + DSP_CDEV_TYPE_RDWR }, + { SND_DEV_DSP16, "dspW", ".", NULL, 0, 0, 0, 0, + SND_FORMAT(AFMT_S16_LE, 1, 0), DSP_DEFAULT_SPEED, + DSP_CDEV_TYPE_RDWR }, + { SND_DEV_DSPHW_PLAY, "dsp", ".p", NULL, 1, 1, SND_MAXHWCHAN, 1, + SND_FORMAT(AFMT_S16_LE, 2, 0), 48000, DSP_CDEV_TYPE_WRONLY }, + { SND_DEV_DSPHW_VPLAY, "dsp", ".vp", NULL, 1, 1, SND_MAXVCHANS, 1, + SND_FORMAT(AFMT_S16_LE, 2, 0), 48000, DSP_CDEV_TYPE_WRONLY }, + { SND_DEV_DSPHW_REC, "dsp", ".r", NULL, 1, 1, SND_MAXHWCHAN, 1, + SND_FORMAT(AFMT_S16_LE, 2, 0), 48000, DSP_CDEV_TYPE_RDONLY }, + { SND_DEV_DSPHW_VREC, "dsp", ".vr", NULL, 1, 1, SND_MAXVCHANS, 1, + SND_FORMAT(AFMT_S16_LE, 2, 0), 48000, DSP_CDEV_TYPE_RDONLY }, + { SND_DEV_DSPHW_CD, "dspcd", ".", NULL, 0, 0, 0, 0, + SND_FORMAT(AFMT_S16_LE, 2, 0), 44100, DSP_CDEV_TYPE_RDWR }, /* Low priority, OSSv4 aliases. */ - { SND_DEV_DSP, "dsp_ac3", ".", "dsp", 0, 0, 0, 0, - SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, - DSP_CDEV_TYPE_RDWR }, - { SND_DEV_DSP, "dsp_mmap", ".", "dsp", 0, 0, 0, 0, - SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, - DSP_CDEV_TYPE_RDWR }, - { SND_DEV_DSP, "dsp_multich", ".", "dsp", 0, 0, 0, 0, - SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, - DSP_CDEV_TYPE_RDWR }, - { SND_DEV_DSP, "dsp_spdifout", ".", "dsp", 0, 0, 0, 0, - SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, - DSP_CDEV_TYPE_RDWR }, - { SND_DEV_DSP, "dsp_spdifin", ".", "dsp", 0, 0, 0, 0, - SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, - DSP_CDEV_TYPE_RDWR }, + { SND_DEV_DSP, "dsp_ac3", ".", "dsp", 0, 0, 0, 0, + SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, DSP_CDEV_TYPE_RDWR }, + { SND_DEV_DSP, "dsp_mmap", ".", "dsp", 0, 0, 0, 0, + SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, DSP_CDEV_TYPE_RDWR }, + { SND_DEV_DSP, "dsp_multich", ".", "dsp", 0, 0, 0, 0, + SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, DSP_CDEV_TYPE_RDWR }, + { SND_DEV_DSP, "dsp_spdifout", ".", "dsp", 0, 0, 0, 0, + SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, DSP_CDEV_TYPE_RDWR }, + { SND_DEV_DSP, "dsp_spdifin", ".", "dsp", 0, 0, 0, 0, + SND_FORMAT(AFMT_U8, 1, 0), DSP_DEFAULT_SPEED, DSP_CDEV_TYPE_RDWR }, }; static void @@ -369,19 +374,20 @@ priv = NULL; } -#define DSP_FIXUP_ERROR() do { \ - prio = pcm_getflags(d->dev); \ - if (!DSP_F_VALID(flags)) \ - error = EINVAL; \ - if (!DSP_F_DUPLEX(flags) && \ - ((DSP_F_READ(flags) && d->reccount == 0) || \ - (DSP_F_WRITE(flags) && d->playcount == 0))) \ - error = ENOTSUP; \ - else if (!DSP_F_DUPLEX(flags) && (prio & SD_F_SIMPLEX) && \ - ((DSP_F_READ(flags) && (prio & SD_F_PRIO_WR)) || \ - (DSP_F_WRITE(flags) && (prio & SD_F_PRIO_RD)))) \ - error = EBUSY; \ -} while (0) +#define DSP_FIXUP_ERROR() \ + do { \ + prio = pcm_getflags(d->dev); \ + if (!DSP_F_VALID(flags)) \ + error = EINVAL; \ + if (!DSP_F_DUPLEX(flags) && \ + ((DSP_F_READ(flags) && d->reccount == 0) || \ + (DSP_F_WRITE(flags) && d->playcount == 0))) \ + error = ENOTSUP; \ + else if (!DSP_F_DUPLEX(flags) && (prio & SD_F_SIMPLEX) && \ + ((DSP_F_READ(flags) && (prio & SD_F_PRIO_WR)) || \ + (DSP_F_WRITE(flags) && (prio & SD_F_PRIO_RD)))) \ + error = EBUSY; \ + } while (0) static int dsp_open(struct cdev *i_dev, int flags, int mode, struct thread *td) @@ -443,8 +449,8 @@ if (DSP_F_READ(flags)) { /* open for read */ - rderror = pcm_chnalloc(d, &rdch, PCMDIR_REC, - td->td_proc->p_pid, td->td_proc->p_comm, -1); + rderror = pcm_chnalloc(d, &rdch, PCMDIR_REC, td->td_proc->p_pid, + td->td_proc->p_comm, -1); if (rderror == 0 && chn_reset(rdch, fmt, spd) != 0) rderror = ENXIO; @@ -543,7 +549,7 @@ pid_t runpid; KASSERT(buf != NULL && - (buf->uio_rw == UIO_READ || buf->uio_rw == UIO_WRITE), + (buf->uio_rw == UIO_READ || buf->uio_rw == UIO_WRITE), ("%s(): io train wreck!", __func__)); d = priv->sc; @@ -663,7 +669,8 @@ unit = dev2unit(d->dsp_dev); - CHN_FOREACH(c, d, channels.pcm) { + CHN_FOREACH(c, d, channels.pcm) + { CHN_LOCK(c); if (c->unit != unit) { CHN_UNLOCK(c); @@ -721,7 +728,8 @@ /* Look super harder */ if (volch == NULL && (devtype == SND_DEV_DSPHW_PLAY || devtype == SND_DEV_DSPHW_VPLAY || - devtype == SND_DEV_DSPHW_REC || devtype == SND_DEV_DSPHW_VREC)) { + devtype == SND_DEV_DSPHW_REC || + devtype == SND_DEV_DSPHW_VREC)) { ret = dsp_get_volume_channel(priv, &volch); if (ret != 0) return (ret); @@ -744,9 +752,11 @@ switch (j) { case SOUND_MIXER_MUTE: if (volch->direction == PCMDIR_REC) { - chn_setmute_multi(volch, SND_VOL_C_PCM, (*(int *)arg & SOUND_MASK_RECLEV) != 0); + chn_setmute_multi(volch, SND_VOL_C_PCM, + (*(int *)arg & SOUND_MASK_RECLEV) != 0); } else { - chn_setmute_multi(volch, SND_VOL_C_PCM, (*(int *)arg & SOUND_MASK_PCM) != 0); + chn_setmute_multi(volch, SND_VOL_C_PCM, + (*(int *)arg & SOUND_MASK_PCM) != 0); } break; case SOUND_MIXER_PCM: @@ -755,8 +765,8 @@ left = *(int *)arg & 0x7f; right = ((*(int *)arg) >> 8) & 0x7f; center = (left + right) >> 1; - chn_setvolume_multi(volch, SND_VOL_C_PCM, - left, right, center); + chn_setvolume_multi(volch, SND_VOL_C_PCM, left, right, + center); break; case SOUND_MIXER_RECLEV: if (volch->direction != PCMDIR_REC) @@ -764,8 +774,8 @@ left = *(int *)arg & 0x7f; right = ((*(int *)arg) >> 8) & 0x7f; center = (left + right) >> 1; - chn_setvolume_multi(volch, SND_VOL_C_PCM, - left, right, center); + chn_setvolume_multi(volch, SND_VOL_C_PCM, left, right, + center); break; default: /* ignore all other mixer writes */ @@ -776,7 +786,8 @@ case MIXER_READ(0): switch (j) { case SOUND_MIXER_MUTE: - mute = CHN_GETMUTE(volch, SND_VOL_C_PCM, SND_CHN_T_FL) || + mute = CHN_GETMUTE(volch, SND_VOL_C_PCM, + SND_CHN_T_FL) || CHN_GETMUTE(volch, SND_VOL_C_PCM, SND_CHN_T_FR); if (volch->direction == PCMDIR_REC) { *(int *)arg = mute << SOUND_MIXER_RECLEV; @@ -787,18 +798,20 @@ case SOUND_MIXER_PCM: if (volch->direction != PCMDIR_PLAY) break; - *(int *)arg = CHN_GETVOLUME(volch, - SND_VOL_C_PCM, SND_CHN_T_FL); - *(int *)arg |= CHN_GETVOLUME(volch, - SND_VOL_C_PCM, SND_CHN_T_FR) << 8; + *(int *)arg = CHN_GETVOLUME(volch, SND_VOL_C_PCM, + SND_CHN_T_FL); + *(int *)arg |= + CHN_GETVOLUME(volch, SND_VOL_C_PCM, SND_CHN_T_FR) + << 8; break; case SOUND_MIXER_RECLEV: if (volch->direction != PCMDIR_REC) break; - *(int *)arg = CHN_GETVOLUME(volch, - SND_VOL_C_PCM, SND_CHN_T_FL); - *(int *)arg |= CHN_GETVOLUME(volch, - SND_VOL_C_PCM, SND_CHN_T_FR) << 8; + *(int *)arg = CHN_GETVOLUME(volch, SND_VOL_C_PCM, + SND_CHN_T_FL); + *(int *)arg |= + CHN_GETVOLUME(volch, SND_VOL_C_PCM, SND_CHN_T_FR) + << 8; break; case SOUND_MIXER_DEVMASK: case SOUND_MIXER_CAPS: @@ -876,7 +889,7 @@ */ if (IOCGROUP(cmd) == 'X') { PCM_ACQUIRE_QUICK(d); - switch(cmd) { + switch (cmd) { case SNDCTL_SYSINFO: sound_oss_sysinfo((oss_sysinfo *)arg); break; @@ -913,18 +926,18 @@ return (EINVAL); } - switch(cmd) { + switch (cmd) { #ifdef OLDPCM_IOCTL /* * we start with the new ioctl interface. */ - case AIONWRITE: /* how many bytes can write ? */ + case AIONWRITE: /* how many bytes can write ? */ if (wrch) { CHN_LOCK(wrch); -/* - if (wrch && wrch->bufhard.dl) - while (chn_wrfeed(wrch) == 0); -*/ + /* + if (wrch && wrch->bufhard.dl) + while (chn_wrfeed(wrch) == 0); + */ *arg_i = sndbuf_getfree(wrch->bufsoft); CHN_UNLOCK(wrch); } else { @@ -933,133 +946,128 @@ } break; - case AIOSSIZE: /* set the current blocksize */ - { - struct snd_size *p = (struct snd_size *)arg; + case AIOSSIZE: /* set the current blocksize */ + { + struct snd_size *p = (struct snd_size *)arg; - p->play_size = 0; - p->rec_size = 0; - PCM_ACQUIRE_QUICK(d); - if (wrch) { - CHN_LOCK(wrch); - chn_setblocksize(wrch, 2, p->play_size); - p->play_size = sndbuf_getblksz(wrch->bufsoft); - CHN_UNLOCK(wrch); - } - if (rdch) { - CHN_LOCK(rdch); - chn_setblocksize(rdch, 2, p->rec_size); - p->rec_size = sndbuf_getblksz(rdch->bufsoft); - CHN_UNLOCK(rdch); - } - PCM_RELEASE_QUICK(d); + p->play_size = 0; + p->rec_size = 0; + PCM_ACQUIRE_QUICK(d); + if (wrch) { + CHN_LOCK(wrch); + chn_setblocksize(wrch, 2, p->play_size); + p->play_size = sndbuf_getblksz(wrch->bufsoft); + CHN_UNLOCK(wrch); } - break; - case AIOGSIZE: /* get the current blocksize */ - { - struct snd_size *p = (struct snd_size *)arg; + if (rdch) { + CHN_LOCK(rdch); + chn_setblocksize(rdch, 2, p->rec_size); + p->rec_size = sndbuf_getblksz(rdch->bufsoft); + CHN_UNLOCK(rdch); + } + PCM_RELEASE_QUICK(d); + } break; + case AIOGSIZE: /* get the current blocksize */ + { + struct snd_size *p = (struct snd_size *)arg; - if (wrch) { - CHN_LOCK(wrch); - p->play_size = sndbuf_getblksz(wrch->bufsoft); - CHN_UNLOCK(wrch); - } - if (rdch) { - CHN_LOCK(rdch); - p->rec_size = sndbuf_getblksz(rdch->bufsoft); - CHN_UNLOCK(rdch); - } + if (wrch) { + CHN_LOCK(wrch); + p->play_size = sndbuf_getblksz(wrch->bufsoft); + CHN_UNLOCK(wrch); } - break; + if (rdch) { + CHN_LOCK(rdch); + p->rec_size = sndbuf_getblksz(rdch->bufsoft); + CHN_UNLOCK(rdch); + } + } break; case AIOSFMT: - case AIOGFMT: - { - snd_chan_param *p = (snd_chan_param *)arg; + case AIOGFMT: { + snd_chan_param *p = (snd_chan_param *)arg; - if (cmd == AIOSFMT && - ((p->play_format != 0 && p->play_rate == 0) || - (p->rec_format != 0 && p->rec_rate == 0))) { - ret = EINVAL; - break; - } - PCM_ACQUIRE_QUICK(d); - if (wrch) { - CHN_LOCK(wrch); - if (cmd == AIOSFMT && p->play_format != 0) { - chn_setformat(wrch, - SND_FORMAT(p->play_format, - AFMT_CHANNEL(wrch->format), - AFMT_EXTCHANNEL(wrch->format))); - chn_setspeed(wrch, p->play_rate); - } - p->play_rate = wrch->speed; - p->play_format = AFMT_ENCODING(wrch->format); - CHN_UNLOCK(wrch); - } else { - p->play_rate = 0; - p->play_format = 0; + if (cmd == AIOSFMT && + ((p->play_format != 0 && p->play_rate == 0) || + (p->rec_format != 0 && p->rec_rate == 0))) { + ret = EINVAL; + break; + } + PCM_ACQUIRE_QUICK(d); + if (wrch) { + CHN_LOCK(wrch); + if (cmd == AIOSFMT && p->play_format != 0) { + chn_setformat(wrch, + SND_FORMAT(p->play_format, + AFMT_CHANNEL(wrch->format), + AFMT_EXTCHANNEL(wrch->format))); + chn_setspeed(wrch, p->play_rate); } - if (rdch) { - CHN_LOCK(rdch); - if (cmd == AIOSFMT && p->rec_format != 0) { - chn_setformat(rdch, - SND_FORMAT(p->rec_format, - AFMT_CHANNEL(rdch->format), - AFMT_EXTCHANNEL(rdch->format))); - chn_setspeed(rdch, p->rec_rate); - } - p->rec_rate = rdch->speed; - p->rec_format = AFMT_ENCODING(rdch->format); - CHN_UNLOCK(rdch); - } else { - p->rec_rate = 0; - p->rec_format = 0; + p->play_rate = wrch->speed; + p->play_format = AFMT_ENCODING(wrch->format); + CHN_UNLOCK(wrch); + } else { + p->play_rate = 0; + p->play_format = 0; + } + if (rdch) { + CHN_LOCK(rdch); + if (cmd == AIOSFMT && p->rec_format != 0) { + chn_setformat(rdch, + SND_FORMAT(p->rec_format, + AFMT_CHANNEL(rdch->format), + AFMT_EXTCHANNEL(rdch->format))); + chn_setspeed(rdch, p->rec_rate); } - PCM_RELEASE_QUICK(d); + p->rec_rate = rdch->speed; + p->rec_format = AFMT_ENCODING(rdch->format); + CHN_UNLOCK(rdch); + } else { + p->rec_rate = 0; + p->rec_format = 0; } - break; + PCM_RELEASE_QUICK(d); + } break; - case AIOGCAP: /* get capabilities */ - { - snd_capabilities *p = (snd_capabilities *)arg; - struct pcmchan_caps *pcaps = NULL, *rcaps = NULL; - struct cdev *pdev; + case AIOGCAP: /* get capabilities */ + { + snd_capabilities *p = (snd_capabilities *)arg; + struct pcmchan_caps *pcaps = NULL, *rcaps = NULL; + struct cdev *pdev; - PCM_LOCK(d); - if (rdch) { - CHN_LOCK(rdch); - rcaps = chn_getcaps(rdch); - } - if (wrch) { - CHN_LOCK(wrch); - pcaps = chn_getcaps(wrch); - } - p->rate_min = max(rcaps? rcaps->minspeed : 0, - pcaps? pcaps->minspeed : 0); - p->rate_max = min(rcaps? rcaps->maxspeed : 1000000, - pcaps? pcaps->maxspeed : 1000000); - p->bufsize = min(rdch? sndbuf_getsize(rdch->bufsoft) : 1000000, - wrch? sndbuf_getsize(wrch->bufsoft) : 1000000); - /* XXX bad on sb16 */ - p->formats = (rdch? chn_getformats(rdch) : 0xffffffff) & - (wrch? chn_getformats(wrch) : 0xffffffff); - if (rdch && wrch) { - p->formats |= - (pcm_getflags(d->dev) & SD_F_SIMPLEX) ? 0 : - AFMT_FULLDUPLEX; - } - pdev = d->mixer_dev; - p->mixers = 1; /* default: one mixer */ - p->inputs = pdev->si_drv1? mix_getdevs(pdev->si_drv1) : 0; - p->left = p->right = 100; - if (wrch) - CHN_UNLOCK(wrch); - if (rdch) - CHN_UNLOCK(rdch); - PCM_UNLOCK(d); + PCM_LOCK(d); + if (rdch) { + CHN_LOCK(rdch); + rcaps = chn_getcaps(rdch); } - break; + if (wrch) { + CHN_LOCK(wrch); + pcaps = chn_getcaps(wrch); + } + p->rate_min = max(rcaps ? rcaps->minspeed : 0, + pcaps ? pcaps->minspeed : 0); + p->rate_max = min(rcaps ? rcaps->maxspeed : 1000000, + pcaps ? pcaps->maxspeed : 1000000); + p->bufsize = min(rdch ? sndbuf_getsize(rdch->bufsoft) : 1000000, + wrch ? sndbuf_getsize(wrch->bufsoft) : 1000000); + /* XXX bad on sb16 */ + p->formats = (rdch ? chn_getformats(rdch) : 0xffffffff) & + (wrch ? chn_getformats(wrch) : 0xffffffff); + if (rdch && wrch) { + p->formats |= (pcm_getflags(d->dev) & SD_F_SIMPLEX) ? + 0 : + AFMT_FULLDUPLEX; + } + pdev = d->mixer_dev; + p->mixers = 1; /* default: one mixer */ + p->inputs = pdev->si_drv1 ? mix_getdevs(pdev->si_drv1) : 0; + p->left = p->right = 100; + if (wrch) + CHN_UNLOCK(wrch); + if (rdch) + CHN_UNLOCK(rdch); + PCM_UNLOCK(d); + } break; case AIOSTOP: if (*arg_i == AIOSYNC_PLAY && wrch) { @@ -1078,7 +1086,7 @@ case AIOSYNC: printf("AIOSYNC chan 0x%03lx pos %lu unimplemented\n", - ((snd_sync_parm *)arg)->chan, ((snd_sync_parm *)arg)->pos); + ((snd_sync_parm *)arg)->chan, ((snd_sync_parm *)arg)->pos); break; #endif /* @@ -1087,9 +1095,10 @@ case FIONREAD: /* get # bytes to read */ if (rdch) { CHN_LOCK(rdch); -/* if (rdch && rdch->bufhard.dl) - while (chn_rdfeed(rdch) == 0); -*/ + /* if (rdch && rdch->bufhard.dl) + while (chn_rdfeed(rdch) + == 0); + */ *arg_i = sndbuf_getready(rdch->bufsoft); CHN_UNLOCK(rdch); } else { @@ -1099,11 +1108,11 @@ break; case FIOASYNC: /*set/clear async i/o */ - DEB( printf("FIOASYNC\n") ; ) + DEB(printf("FIOASYNC\n");) break; case SNDCTL_DSP_NONBLOCK: /* set non-blocking i/o */ - case FIONBIO: /* set/clear non-blocking i/o */ + case FIONBIO: /* set/clear non-blocking i/o */ if (rdch) { CHN_LOCK(rdch); if (cmd == SNDCTL_DSP_NONBLOCK || *arg_i) @@ -1122,9 +1131,9 @@ } break; - /* - * Finally, here is the linux-compatible ioctl interface - */ + /* + * Finally, here is the linux-compatible ioctl interface + */ #define THE_REAL_SNDCTL_DSP_GETBLKSIZE _IOWR('P', 4, int) case THE_REAL_SNDCTL_DSP_GETBLKSIZE: case SNDCTL_DSP_GETBLKSIZE: @@ -1216,13 +1225,13 @@ case SNDCTL_DSP_STEREO: tmp = -1; - *arg_i = (*arg_i)? 2 : 1; + *arg_i = (*arg_i) ? 2 : 1; PCM_ACQUIRE_QUICK(d); if (wrch) { CHN_LOCK(wrch); ret = chn_setformat(wrch, SND_FORMAT(wrch->format, *arg_i, 0)); - tmp = (AFMT_CHANNEL(wrch->format) > 1)? 1 : 0; + tmp = (AFMT_CHANNEL(wrch->format) > 1) ? 1 : 0; CHN_UNLOCK(wrch); } if (rdch && ret == 0) { @@ -1230,7 +1239,7 @@ ret = chn_setformat(rdch, SND_FORMAT(rdch->format, *arg_i, 0)); if (tmp == -1) - tmp = (AFMT_CHANNEL(rdch->format) > 1)? 1 : 0; + tmp = (AFMT_CHANNEL(rdch->format) > 1) ? 1 : 0; CHN_UNLOCK(rdch); } PCM_RELEASE_QUICK(d); @@ -1238,7 +1247,8 @@ break; case SOUND_PCM_WRITE_CHANNELS: -/* case SNDCTL_DSP_CHANNELS: ( == SOUND_PCM_WRITE_CHANNELS) */ + /* case SNDCTL_DSP_CHANNELS: ( == SOUND_PCM_WRITE_CHANNELS) + */ if (*arg_i < 0 || *arg_i > AFMT_CHANNEL_MAX) { *arg_i = 0; ret = EINVAL; @@ -1303,7 +1313,7 @@ } break; - case SNDCTL_DSP_GETFMTS: /* returns a mask of supported fmts */ + case SNDCTL_DSP_GETFMTS: /* returns a mask of supported fmts */ chn = wrch ? wrch : rdch; if (chn) { CHN_LOCK(chn); @@ -1315,23 +1325,25 @@ } break; - case SNDCTL_DSP_SETFMT: /* sets _one_ format */ + case SNDCTL_DSP_SETFMT: /* sets _one_ format */ if (*arg_i != AFMT_QUERY) { tmp = 0; PCM_ACQUIRE_QUICK(d); if (wrch) { CHN_LOCK(wrch); - ret = chn_setformat(wrch, SND_FORMAT(*arg_i, - AFMT_CHANNEL(wrch->format), - AFMT_EXTCHANNEL(wrch->format))); + ret = chn_setformat(wrch, + SND_FORMAT(*arg_i, + AFMT_CHANNEL(wrch->format), + AFMT_EXTCHANNEL(wrch->format))); tmp = wrch->format; CHN_UNLOCK(wrch); } if (rdch && ret == 0) { CHN_LOCK(rdch); - ret = chn_setformat(rdch, SND_FORMAT(*arg_i, - AFMT_CHANNEL(rdch->format), - AFMT_EXTCHANNEL(rdch->format))); + ret = chn_setformat(rdch, + SND_FORMAT(*arg_i, + AFMT_CHANNEL(rdch->format), + AFMT_EXTCHANNEL(rdch->format))); if (tmp == 0) tmp = rdch->format; CHN_UNLOCK(rdch); @@ -1364,7 +1376,8 @@ if (maxfrags * fragsz > CHN_2NDBUFMAXSIZE) maxfrags = CHN_2NDBUFMAXSIZE / fragsz; - DEB(printf("SNDCTL_DSP_SETFRAGMENT %d frags, %d sz\n", maxfrags, fragsz)); + DEB(printf("SNDCTL_DSP_SETFRAGMENT %d frags, %d sz\n", + maxfrags, fragsz)); PCM_ACQUIRE_QUICK(d); if (rdch) { CHN_LOCK(rdch); @@ -1423,7 +1436,8 @@ struct snd_dbuf *bs = wrch->bufsoft; CHN_LOCK(wrch); - /* XXX abusive DMA update: chn_wrupdate(wrch); */ + /* XXX abusive DMA update: chn_wrupdate(wrch); + */ a->bytes = sndbuf_getfree(bs); a->fragments = a->bytes / sndbuf_getblksz(bs); a->fragstotal = sndbuf_getblkcnt(bs); @@ -1434,41 +1448,37 @@ } break; - case SNDCTL_DSP_GETIPTR: - { - count_info *a = (count_info *)arg; - if (rdch) { - struct snd_dbuf *bs = rdch->bufsoft; + case SNDCTL_DSP_GETIPTR: { + count_info *a = (count_info *)arg; + if (rdch) { + struct snd_dbuf *bs = rdch->bufsoft; - CHN_LOCK(rdch); - /* XXX abusive DMA update: chn_rdupdate(rdch); */ - a->bytes = sndbuf_gettotal(bs); - a->blocks = sndbuf_getblocks(bs) - rdch->blocks; - a->ptr = sndbuf_getfreeptr(bs); - rdch->blocks = sndbuf_getblocks(bs); - CHN_UNLOCK(rdch); - } else - ret = EINVAL; - } - break; + CHN_LOCK(rdch); + /* XXX abusive DMA update: chn_rdupdate(rdch); */ + a->bytes = sndbuf_gettotal(bs); + a->blocks = sndbuf_getblocks(bs) - rdch->blocks; + a->ptr = sndbuf_getfreeptr(bs); + rdch->blocks = sndbuf_getblocks(bs); + CHN_UNLOCK(rdch); + } else + ret = EINVAL; + } break; - case SNDCTL_DSP_GETOPTR: - { - count_info *a = (count_info *)arg; - if (wrch) { - struct snd_dbuf *bs = wrch->bufsoft; + case SNDCTL_DSP_GETOPTR: { + count_info *a = (count_info *)arg; + if (wrch) { + struct snd_dbuf *bs = wrch->bufsoft; - CHN_LOCK(wrch); - /* XXX abusive DMA update: chn_wrupdate(wrch); */ - a->bytes = sndbuf_gettotal(bs); - a->blocks = sndbuf_getblocks(bs) - wrch->blocks; - a->ptr = sndbuf_getreadyptr(bs); - wrch->blocks = sndbuf_getblocks(bs); - CHN_UNLOCK(wrch); - } else - ret = EINVAL; - } - break; + CHN_LOCK(wrch); + /* XXX abusive DMA update: chn_wrupdate(wrch); */ + a->bytes = sndbuf_gettotal(bs); + a->blocks = sndbuf_getblocks(bs) - wrch->blocks; + a->ptr = sndbuf_getreadyptr(bs); + wrch->blocks = sndbuf_getblocks(bs); + CHN_UNLOCK(wrch); + } else + ret = EINVAL; + } break; case SNDCTL_DSP_GETCAPS: PCM_LOCK(d); @@ -1574,7 +1584,8 @@ */ PCM_LOCK(d); if (rdch && wrch && (pcm_getflags(d->dev) & SD_F_SIMPLEX)) - pcm_setflags(d->dev, pcm_getflags(d->dev)^SD_F_SIMPLEX); + pcm_setflags(d->dev, + pcm_getflags(d->dev) ^ SD_F_SIMPLEX); PCM_UNLOCK(d); break; @@ -1641,27 +1652,24 @@ * instance), so there's only a single output routing to use (i.e., * the wrch bound to this cdev). */ - case SNDCTL_DSP_GET_PLAYTGT_NAMES: - { - oss_mixer_enuminfo *ei; - ei = (oss_mixer_enuminfo *)arg; - ei->dev = 0; - ei->ctrl = 0; - ei->version = 0; /* static for now */ - ei->strindex[0] = 0; + case SNDCTL_DSP_GET_PLAYTGT_NAMES: { + oss_mixer_enuminfo *ei; + ei = (oss_mixer_enuminfo *)arg; + ei->dev = 0; + ei->ctrl = 0; + ei->version = 0; /* static for now */ + ei->strindex[0] = 0; - if (wrch != NULL) { - ei->nvalues = 1; - strlcpy(ei->strings, wrch->name, - sizeof(ei->strings)); - } else { - ei->nvalues = 0; - ei->strings[0] = '\0'; - } + if (wrch != NULL) { + ei->nvalues = 1; + strlcpy(ei->strings, wrch->name, sizeof(ei->strings)); + } else { + ei->nvalues = 0; + ei->strings[0] = '\0'; } - break; + } break; case SNDCTL_DSP_GET_PLAYTGT: - case SNDCTL_DSP_SET_PLAYTGT: /* yes, they are the same for now */ + case SNDCTL_DSP_SET_PLAYTGT: /* yes, they are the same for now */ /* * Re: SET_PLAYTGT * OSSv4: "The value that was accepted by the device will @@ -1675,12 +1683,12 @@ break; case SNDCTL_DSP_SILENCE: - /* - * Flush the software (pre-feed) buffer, but try to minimize playback - * interruption. (I.e., record unplayed samples with intent to - * restore by SNDCTL_DSP_SKIP.) Intended for application "pause" - * functionality. - */ + /* + * Flush the software (pre-feed) buffer, but try to minimize + * playback interruption. (I.e., record unplayed samples with + * intent to restore by SNDCTL_DSP_SKIP.) Intended for + * application "pause" functionality. + */ if (wrch == NULL) ret = EINVAL; else { @@ -1689,9 +1697,11 @@ while (wrch->inprog != 0) cv_wait(&wrch->cv, wrch->lock); bs = wrch->bufsoft; - if ((bs->shadbuf != NULL) && (sndbuf_getready(bs) > 0)) { + if ((bs->shadbuf != NULL) && + (sndbuf_getready(bs) > 0)) { bs->sl = sndbuf_getready(bs); - sndbuf_dispose(bs, bs->shadbuf, sndbuf_getready(bs)); + sndbuf_dispose(bs, bs->shadbuf, + sndbuf_getready(bs)); sndbuf_fillsilence(bs); chn_start(wrch, 0); } @@ -1700,11 +1710,12 @@ break; case SNDCTL_DSP_SKIP: - /* - * OSSv4 docs: "This ioctl call discards all unplayed samples in the - * playback buffer by moving the current write position immediately - * before the point where the device is currently reading the samples." - */ + /* + * OSSv4 docs: "This ioctl call discards all unplayed samples in + * the playback buffer by moving the current write position + * immediately before the point where the device is currently + * reading the samples." + */ if (wrch == NULL) ret = EINVAL; else { @@ -1725,18 +1736,18 @@ case SNDCTL_DSP_CURRENT_OPTR: case SNDCTL_DSP_CURRENT_IPTR: - /** - * @note Changing formats resets the buffer counters, which differs - * from the 4Front drivers. However, I don't expect this to be - * much of a problem. - * - * @note In a test where @c CURRENT_OPTR is called immediately after write - * returns, this driver is about 32K samples behind whereas - * 4Front's is about 8K samples behind. Should determine source - * of discrepancy, even if only out of curiosity. - * - * @todo Actually test SNDCTL_DSP_CURRENT_IPTR. - */ + /** + * @note Changing formats resets the buffer counters, which + *differs from the 4Front drivers. However, I don't expect this + *to be much of a problem. + * + * @note In a test where @c CURRENT_OPTR is called immediately + *after write returns, this driver is about 32K samples behind + *whereas 4Front's is about 8K samples behind. Should determine + *source of discrepancy, even if only out of curiosity. + * + * @todo Actually test SNDCTL_DSP_CURRENT_IPTR. + */ chn = (cmd == SNDCTL_DSP_CURRENT_OPTR) ? wrch : rdch; if (chn == NULL) ret = EINVAL; @@ -1754,7 +1765,8 @@ oc->fifo_samples = (sndbuf_getready(b) - tmp) / sndbuf_getalign(b); #else oc->samples = sndbuf_gettotal(bs) / sndbuf_getalign(bs); - oc->fifo_samples = sndbuf_getready(bs) / sndbuf_getalign(bs); + oc->fifo_samples = sndbuf_getready(bs) / + sndbuf_getalign(bs); #endif CHN_UNLOCK(chn); } @@ -1773,10 +1785,10 @@ break; case SNDCTL_DSP_LOW_WATER: - /* - * Set the number of bytes required to attract attention by - * select/poll. - */ + /* + * Set the number of bytes required to attract attention by + * select/poll. + */ if (wrch != NULL) { CHN_LOCK(wrch); wrch->lw = (*arg_i > 1) ? *arg_i : 1; @@ -1790,13 +1802,13 @@ break; case SNDCTL_DSP_GETERROR: - /* - * OSSv4 docs: "All errors and counters will automatically be - * cleared to zeroes after the call so each call will return only - * the errors that occurred after the previous invocation. ... The - * play_underruns and rec_overrun fields are the only useful fields - * returned by OSS 4.0." - */ + /* + * OSSv4 docs: "All errors and counters will automatically be + * cleared to zeroes after the call so each call will return + * only the errors that occurred after the previous invocation. + * ... The play_underruns and rec_overrun fields are the only + * useful fields returned by OSS 4.0." + */ { audio_errinfo *ei = (audio_errinfo *)arg; @@ -1843,23 +1855,25 @@ break; case SNDCTL_DSP_GET_CHNORDER: PCM_ACQUIRE_QUICK(d); - ret = dsp_oss_getchnorder(wrch, rdch, (unsigned long long *)arg); + ret = dsp_oss_getchnorder(wrch, rdch, + (unsigned long long *)arg); PCM_RELEASE_QUICK(d); break; case SNDCTL_DSP_SET_CHNORDER: PCM_ACQUIRE_QUICK(d); - ret = dsp_oss_setchnorder(wrch, rdch, (unsigned long long *)arg); + ret = dsp_oss_setchnorder(wrch, rdch, + (unsigned long long *)arg); PCM_RELEASE_QUICK(d); break; - case SNDCTL_DSP_GETCHANNELMASK: /* XXX vlc */ + case SNDCTL_DSP_GETCHANNELMASK: /* XXX vlc */ PCM_ACQUIRE_QUICK(d); ret = dsp_oss_getchannelmask(wrch, rdch, (int *)arg); PCM_RELEASE_QUICK(d); break; - case SNDCTL_DSP_BIND_CHANNEL: /* XXX what?!? */ + case SNDCTL_DSP_BIND_CHANNEL: /* XXX what?!? */ ret = EINVAL; break; -#ifdef OSSV4_EXPERIMENT +#ifdef OSSV4_EXPERIMENT /* * XXX The following ioctls are not yet supported and just return * EINVAL. @@ -1914,9 +1928,9 @@ case SNDCTL_DSP_WRITECTL: ret = EINVAL; break; -#endif /* !0 (explicitly omitted ioctls) */ +#endif /* !0 (explicitly omitted ioctls) */ -#endif /* !OSSV4_EXPERIMENT */ +#endif /* !OSSV4_EXPERIMENT */ case SNDCTL_DSP_MAPINBUF: case SNDCTL_DSP_MAPOUTBUF: case SNDCTL_DSP_SETSYNCRO: @@ -1951,8 +1965,9 @@ d = priv->sc; if (PCM_DETACHING(d) || !DSP_REGISTERED(d)) { /* XXX many clients don't understand POLLNVAL */ - return (events & (POLLHUP | POLLPRI | POLLIN | - POLLRDNORM | POLLOUT | POLLWRNORM)); + return (events & + (POLLHUP | POLLPRI | POLLIN | POLLRDNORM | POLLOUT | + POLLWRNORM)); } PCM_GIANT_ENTER(d); @@ -1982,8 +1997,8 @@ } static int -dsp_mmap(struct cdev *i_dev, vm_ooffset_t offset, vm_paddr_t *paddr, - int nprot, vm_memattr_t *memattr) +dsp_mmap(struct cdev *i_dev, vm_ooffset_t offset, vm_paddr_t *paddr, int nprot, + vm_memattr_t *memattr) { /* @@ -1995,8 +2010,8 @@ } static int -dsp_mmap_single(struct cdev *i_dev, vm_ooffset_t *offset, - vm_size_t size, struct vm_object **object, int nprot) +dsp_mmap_single(struct cdev *i_dev, vm_ooffset_t *offset, vm_size_t size, + struct vm_object **object, int nprot) { struct dsp_cdevpriv *priv; struct snddev_info *d; @@ -2012,9 +2027,10 @@ * */ #ifdef SV_ABI_LINUX - if ((nprot & PROT_EXEC) && (dsp_mmap_allow_prot_exec < 0 || - (dsp_mmap_allow_prot_exec == 0 && - SV_CURPROC_ABI() != SV_ABI_LINUX))) + if ((nprot & PROT_EXEC) && + (dsp_mmap_allow_prot_exec < 0 || + (dsp_mmap_allow_prot_exec == 0 && + SV_CURPROC_ABI() != SV_ABI_LINUX))) #else if ((nprot & PROT_EXEC) && dsp_mmap_allow_prot_exec < 1) #endif @@ -2042,7 +2058,7 @@ c = ((nprot & PROT_WRITE) != 0) ? wrch : rdch; if (c == NULL || (c->flags & CHN_F_MMAP_INVALID) || - (*offset + size) > sndbuf_getallocsize(c->bufsoft) || + (*offset + size) > sndbuf_getallocsize(c->bufsoft) || (wrch != NULL && (wrch->flags & CHN_F_MMAP_INVALID)) || (rdch != NULL && (rdch->flags & CHN_F_MMAP_INVALID))) { relchns(priv, SD_F_PRIO_RD | SD_F_PRIO_WR); @@ -2057,13 +2073,13 @@ *offset = (uintptr_t)sndbuf_getbufofs(c->bufsoft, *offset); relchns(priv, SD_F_PRIO_RD | SD_F_PRIO_WR); - *object = vm_pager_allocate(OBJT_DEVICE, i_dev, - size, nprot, *offset, curthread->td_ucred); + *object = vm_pager_allocate(OBJT_DEVICE, i_dev, size, nprot, *offset, + curthread->td_ucred); PCM_GIANT_LEAVE(d); if (*object == NULL) - return (EINVAL); + return (EINVAL); return (0); } @@ -2197,8 +2213,9 @@ * Search for the requested audio device (channel). Start by * iterating over pcm devices. */ - for (i = 0; pcm_devclass != NULL && - i < devclass_get_maxunit(pcm_devclass); i++) { + for (i = 0; + pcm_devclass != NULL && i < devclass_get_maxunit(pcm_devclass); + i++) { d = devclass_get_softc(pcm_devclass, i); if (!PCM_REGISTERED(d)) continue; @@ -2209,12 +2226,13 @@ PCM_UNLOCKASSERT(d); PCM_LOCK(d); - CHN_FOREACH(ch, d, channels.pcm) { + CHN_FOREACH(ch, d, channels.pcm) + { CHN_UNLOCKASSERT(ch); CHN_LOCK(ch); if (ai->dev == -1) { if (devfs_foreach_cdevpriv(i_dev, - dsp_oss_audioinfo_cb, ch) != 0) { + dsp_oss_audioinfo_cb, ch) != 0) { devname = dsp_unit2name(buf, sizeof(buf), ch->unit); } @@ -2246,12 +2264,14 @@ bzero((void *)ai, sizeof(oss_audioinfo)); ai->dev = nchan; - strlcpy(ai->name, ch->name, sizeof(ai->name)); + strlcpy(ai->name, ch->name, sizeof(ai->name)); if ((ch->flags & CHN_F_BUSY) == 0) ai->busy = 0; else - ai->busy = (ch->direction == PCMDIR_PLAY) ? OPEN_WRITE : OPEN_READ; + ai->busy = (ch->direction == PCMDIR_PLAY) ? + OPEN_WRITE : + OPEN_READ; /** * @note @@ -2271,9 +2291,12 @@ * @todo @c SNDCTL_AUDIOINFO::caps - Make drivers keep * these in pcmchan::caps? */ - ai->caps = PCM_CAP_REALTIME | PCM_CAP_MMAP | PCM_CAP_TRIGGER | - ((ch->flags & CHN_F_VIRTUAL) ? PCM_CAP_VIRTUAL : 0) | - ((ch->direction == PCMDIR_PLAY) ? PCM_CAP_OUTPUT : PCM_CAP_INPUT); + ai->caps = PCM_CAP_REALTIME | PCM_CAP_MMAP | + PCM_CAP_TRIGGER | + ((ch->flags & CHN_F_VIRTUAL) ? PCM_CAP_VIRTUAL : + 0) | + ((ch->direction == PCMDIR_PLAY) ? PCM_CAP_OUTPUT : + PCM_CAP_INPUT); /* * Collect formats supported @b natively by the @@ -2322,14 +2345,16 @@ * @todo @c port_number - routing information? */ ai->port_number = -1; - ai->mixer_dev = (d->mixer_dev != NULL) ? PCMUNIT(d->mixer_dev) : -1; + ai->mixer_dev = (d->mixer_dev != NULL) ? + PCMUNIT(d->mixer_dev) : + -1; /** * @note * @c real_device - OSSv4 docs: "Obsolete." */ ai->real_device = -1; - snprintf(ai->devnode, sizeof(ai->devnode), - "/dev/dsp%d", device_get_unit(d->dev)); + snprintf(ai->devnode, sizeof(ai->devnode), "/dev/dsp%d", + device_get_unit(d->dev)); ai->enabled = device_is_attached(d->dev) ? 1 : 0; /** * @note @@ -2395,7 +2420,8 @@ * @retval non-zero error to be propagated upstream */ static int -dsp_oss_syncgroup(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_syncgroup *group) +dsp_oss_syncgroup(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_syncgroup *group) { struct pcmchan_syncmember *smrd, *smwr; struct pcmchan_syncgroup *sg; @@ -2449,7 +2475,8 @@ * syncgroup. */ if (group->id == 0) { - sg = (struct pcmchan_syncgroup *)malloc(sizeof(*sg), M_DEVBUF, M_NOWAIT); + sg = (struct pcmchan_syncgroup *)malloc(sizeof(*sg), M_DEVBUF, + M_NOWAIT); if (sg != NULL) { SLIST_INIT(&sg->members); sg->id = alloc_unr(pcmsg_unrhdr); @@ -2459,7 +2486,7 @@ } else ret = ENOMEM; } else { - SLIST_FOREACH(sg, &snd_pcm_syncgroups, link) { + SLIST_FOREACH (sg, &snd_pcm_syncgroups, link) { if (sg->id == group->id) break; } @@ -2476,7 +2503,8 @@ * insert into syncgroup. */ if (group->mode & PCM_ENABLE_INPUT) { - smrd = (struct pcmchan_syncmember *)malloc(sizeof(*smrd), M_DEVBUF, M_NOWAIT); + smrd = (struct pcmchan_syncmember *)malloc(sizeof(*smrd), + M_DEVBUF, M_NOWAIT); if (smrd == NULL) { ret = ENOMEM; goto out; @@ -2492,7 +2520,8 @@ } if (group->mode & PCM_ENABLE_OUTPUT) { - smwr = (struct pcmchan_syncmember *)malloc(sizeof(*smwr), M_DEVBUF, M_NOWAIT); + smwr = (struct pcmchan_syncmember *)malloc(sizeof(*smwr), + M_DEVBUF, M_NOWAIT); if (smwr == NULL) { ret = ENOMEM; goto out; @@ -2513,7 +2542,8 @@ free(smrd, M_DEVBUF); if ((sg != NULL) && SLIST_EMPTY(&sg->members)) { sg_ids[2] = sg->id; - SLIST_REMOVE(&snd_pcm_syncgroups, sg, pcmchan_syncgroup, link); + SLIST_REMOVE(&snd_pcm_syncgroups, sg, pcmchan_syncgroup, + link); free(sg, M_DEVBUF); } @@ -2569,7 +2599,7 @@ needlocks = 0; /* Search for syncgroup by ID */ - SLIST_FOREACH(sg, &snd_pcm_syncgroups, link) { + SLIST_FOREACH (sg, &snd_pcm_syncgroups, link) { if (sg->id == sg_id) break; } @@ -2580,7 +2610,8 @@ break; } - /* Any removals resulting in an empty group should've handled this */ + /* Any removals resulting in an empty group should've handled + * this */ KASSERT(!SLIST_EMPTY(&sg->members), ("found empty syncgroup")); /* @@ -2588,14 +2619,14 @@ * locked, unlock those acquired, sleep for a bit, and try * again. */ - SLIST_FOREACH(sm, &sg->members, link) { + SLIST_FOREACH (sm, &sg->members, link) { if (CHN_TRYLOCK(sm->ch) == 0) { - int timo = hz * 5/1000; + int timo = hz * 5 / 1000; if (timo < 1) timo = 1; /* Release all locked channels so far, retry */ - SLIST_FOREACH(sm_tmp, &sg->members, link) { + SLIST_FOREACH (sm_tmp, &sg->members, link) { /* sm is the member already locked */ if (sm == sm_tmp) break; @@ -2727,7 +2758,8 @@ * @retval EINVAL Operation not yet supported. */ static int -dsp_oss_cookedmode(struct pcm_channel *wrch, struct pcm_channel *rdch, int enabled) +dsp_oss_cookedmode(struct pcm_channel *wrch, struct pcm_channel *rdch, + int enabled) { /* @@ -2781,7 +2813,8 @@ * @retval EINVAL Operation not yet supported. */ static int -dsp_oss_getchnorder(struct pcm_channel *wrch, struct pcm_channel *rdch, unsigned long long *map) +dsp_oss_getchnorder(struct pcm_channel *wrch, struct pcm_channel *rdch, + unsigned long long *map) { struct pcm_channel *ch; int ret; @@ -2812,7 +2845,8 @@ * @retval EINVAL Operation not yet supported. */ static int -dsp_oss_setchnorder(struct pcm_channel *wrch, struct pcm_channel *rdch, unsigned long long *map) +dsp_oss_setchnorder(struct pcm_channel *wrch, struct pcm_channel *rdch, + unsigned long long *map) { int ret; @@ -2881,7 +2915,8 @@ * @retval EINVAL Operation not yet supported. */ static int -dsp_oss_getlabel(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_label_t *label) +dsp_oss_getlabel(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_label_t *label) { return (EINVAL); } @@ -2905,7 +2940,8 @@ * @retval EINVAL Operation not yet supported. */ static int -dsp_oss_setlabel(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_label_t *label) +dsp_oss_setlabel(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_label_t *label) { return (EINVAL); } @@ -2930,7 +2966,8 @@ * @retval EINVAL Operation not yet supported. */ static int -dsp_oss_getsong(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_longname_t *song) +dsp_oss_getsong(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_longname_t *song) { return (EINVAL); } @@ -2955,7 +2992,8 @@ * @retval EINVAL Operation not yet supported. */ static int -dsp_oss_setsong(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_longname_t *song) +dsp_oss_setsong(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_longname_t *song) { return (EINVAL); } @@ -2984,8 +3022,9 @@ * @retval EINVAL Operation not yet supported. */ static int -dsp_oss_setname(struct pcm_channel *wrch, struct pcm_channel *rdch, oss_longname_t *name) +dsp_oss_setname(struct pcm_channel *wrch, struct pcm_channel *rdch, + oss_longname_t *name) { return (EINVAL); } -#endif /* !OSSV4_EXPERIMENT */ +#endif /* !OSSV4_EXPERIMENT */ Index: sys/dev/sound/pcm/feeder.h =================================================================== --- sys/dev/sound/pcm/feeder.h +++ sys/dev/sound/pcm/feeder.h @@ -47,7 +47,6 @@ void *data; struct feeder_class *class; struct pcm_feeder *source, *parent; - }; void feeder_register(void *p); @@ -65,16 +64,16 @@ void feeder_printchain(struct pcm_feeder *head); int feeder_chain(struct pcm_channel *); -#define FEEDER_DECLARE(feeder, pdata) \ -static struct feeder_class feeder ## _class = { \ - .name = #feeder, \ - .methods = feeder ## _methods, \ - .size = sizeof(struct pcm_feeder), \ - .desc = feeder ## _desc, \ - .data = pdata, \ -}; \ -SYSINIT(feeder, SI_SUB_DRIVERS, SI_ORDER_ANY, feeder_register, \ - &feeder ## _class) +#define FEEDER_DECLARE(feeder, pdata) \ + static struct feeder_class feeder##_class = { \ + .name = #feeder, \ + .methods = feeder##_methods, \ + .size = sizeof(struct pcm_feeder), \ + .desc = feeder##_desc, \ + .data = pdata, \ + }; \ + SYSINIT(feeder, SI_SUB_DRIVERS, SI_ORDER_ANY, feeder_register, \ + &feeder##_class) enum { FEEDER_ROOT, @@ -88,30 +87,21 @@ }; /* feeder_format */ -enum { - FEEDFORMAT_CHANNELS -}; +enum { FEEDFORMAT_CHANNELS }; /* feeder_mixer */ -enum { - FEEDMIXER_CHANNELS -}; +enum { FEEDMIXER_CHANNELS }; /* feeder_rate */ -enum { - FEEDRATE_SRC, - FEEDRATE_DST, - FEEDRATE_QUALITY, - FEEDRATE_CHANNELS -}; +enum { FEEDRATE_SRC, FEEDRATE_DST, FEEDRATE_QUALITY, FEEDRATE_CHANNELS }; -#define FEEDRATE_RATEMIN 1 -#define FEEDRATE_RATEMAX 2016000 /* 48000 * 42 */ -#define FEEDRATE_MIN 1 -#define FEEDRATE_MAX 0x7fffff /* sign 24bit ~ 8ghz ! */ -#define FEEDRATE_ROUNDHZ 25 -#define FEEDRATE_ROUNDHZ_MIN 0 -#define FEEDRATE_ROUNDHZ_MAX 500 +#define FEEDRATE_RATEMIN 1 +#define FEEDRATE_RATEMAX 2016000 /* 48000 * 42 */ +#define FEEDRATE_MIN 1 +#define FEEDRATE_MAX 0x7fffff /* sign 24bit ~ 8ghz ! */ +#define FEEDRATE_ROUNDHZ 25 +#define FEEDRATE_ROUNDHZ_MIN 0 +#define FEEDRATE_ROUNDHZ_MAX 500 extern int feeder_rate_min; extern int feeder_rate_max; @@ -185,12 +175,12 @@ FEEDMATRIX_TYPE_2X2 }; -#define FEEDMATRIX_TYPE_STEREO_TO_MONO FEEDMATRIX_TYPE_2X1 -#define FEEDMATRIX_TYPE_MONO_TO_STEREO FEEDMATRIX_TYPE_1X2 -#define FEEDMATRIX_TYPE_SWAP_STEREO FEEDMATRIX_TYPE_2X2 -#define FEEDMATRIX_MAP(x, y) ((((x) & 0x3f) << 6) | ((y) & 0x3f)) -#define FEEDMATRIX_MAP_SRC(x) ((x) & 0x3f) -#define FEEDMATRIX_MAP_DST(x) (((x) >> 6) & 0x3f) +#define FEEDMATRIX_TYPE_STEREO_TO_MONO FEEDMATRIX_TYPE_2X1 +#define FEEDMATRIX_TYPE_MONO_TO_STEREO FEEDMATRIX_TYPE_1X2 +#define FEEDMATRIX_TYPE_SWAP_STEREO FEEDMATRIX_TYPE_2X2 +#define FEEDMATRIX_MAP(x, y) ((((x) & 0x3f) << 6) | ((y) & 0x3f)) +#define FEEDMATRIX_MAP_SRC(x) ((x) & 0x3f) +#define FEEDMATRIX_MAP_DST(x) (((x) >> 6) & 0x3f) #endif /* @@ -208,5 +198,5 @@ */ #ifdef SND_FEEDER_FULL_MULTIFORMAT #undef SND_FEEDER_MULTIFORMAT -#define SND_FEEDER_MULTIFORMAT 1 +#define SND_FEEDER_MULTIFORMAT 1 #endif Index: sys/dev/sound/pcm/feeder.c =================================================================== --- sys/dev/sound/pcm/feeder.c +++ sys/dev/sound/pcm/feeder.c @@ -37,7 +37,7 @@ static MALLOC_DEFINE(M_FEEDER, "feeder", "pcm feeder"); -#define MAXFEEDERS 256 +#define MAXFEEDERS 256 #undef FEEDER_DEBUG struct feedertab_entry { @@ -61,7 +61,8 @@ int i; if (feedercnt == 0) { - KASSERT(fc->desc == NULL, ("first feeder not root: %s", fc->name)); + KASSERT(fc->desc == NULL, + ("first feeder not root: %s", fc->name)); SLIST_INIT(&feedertab); fte = malloc(sizeof(*fte), M_FEEDER, M_NOWAIT | M_ZERO); @@ -87,8 +88,7 @@ if (snd_unit < 0 || snd_unit > PCMMAXUNIT) snd_unit = -1; - if (snd_maxautovchans < 0 || - snd_maxautovchans > SND_MAXVCHANS) + if (snd_maxautovchans < 0 || snd_maxautovchans > SND_MAXVCHANS) snd_maxautovchans = 0; if (chn_latency < CHN_LATENCY_MIN || @@ -100,29 +100,29 @@ chn_latency_profile = CHN_LATENCY_PROFILE_DEFAULT; if (feeder_rate_min < FEEDRATE_MIN || - feeder_rate_max < FEEDRATE_MIN || - feeder_rate_min > FEEDRATE_MAX || - feeder_rate_max > FEEDRATE_MAX || - !(feeder_rate_min < feeder_rate_max)) { + feeder_rate_max < FEEDRATE_MIN || + feeder_rate_min > FEEDRATE_MAX || + feeder_rate_max > FEEDRATE_MAX || + !(feeder_rate_min < feeder_rate_max)) { feeder_rate_min = FEEDRATE_RATEMIN; feeder_rate_max = FEEDRATE_RATEMAX; } if (feeder_rate_round < FEEDRATE_ROUNDHZ_MIN || - feeder_rate_round > FEEDRATE_ROUNDHZ_MAX) + feeder_rate_round > FEEDRATE_ROUNDHZ_MAX) feeder_rate_round = FEEDRATE_ROUNDHZ; if (bootverbose) printf("%s: snd_unit=%d snd_maxautovchans=%d " - "latency=%d " - "feeder_rate_min=%d feeder_rate_max=%d " - "feeder_rate_round=%d\n", - __func__, snd_unit, snd_maxautovchans, - chn_latency, + "latency=%d " + "feeder_rate_min=%d feeder_rate_max=%d " + "feeder_rate_round=%d\n", + __func__, snd_unit, snd_maxautovchans, chn_latency, feeder_rate_min, feeder_rate_max, feeder_rate_round); - /* we've got our root feeder so don't veto pcm loading anymore */ + /* we've got our root feeder so don't veto pcm loading anymore + */ pcm_veto_load = 0; return; @@ -130,13 +130,17 @@ KASSERT(fc->desc != NULL, ("feeder '%s' has no descriptor", fc->name)); - /* beyond this point failure is non-fatal but may result in some translations being unavailable */ + /* beyond this point failure is non-fatal but may result in some + * translations being unavailable */ i = 0; while ((feedercnt < MAXFEEDERS) && (fc->desc[i].type > 0)) { - /* printf("adding feeder %s, %x -> %x\n", fc->name, fc->desc[i].in, fc->desc[i].out); */ + /* printf("adding feeder %s, %x -> %x\n", fc->name, + * fc->desc[i].in, fc->desc[i].out); */ fte = malloc(sizeof(*fte), M_FEEDER, M_NOWAIT | M_ZERO); if (fte == NULL) { - printf("can't allocate memory for feeder '%s', %x -> %x\n", fc->name, fc->desc[i].in, fc->desc[i].out); + printf( + "can't allocate memory for feeder '%s', %x -> %x\n", + fc->name, fc->desc[i].in, fc->desc[i].out); return; } @@ -149,7 +153,8 @@ } feedercnt++; if (feedercnt >= MAXFEEDERS) - printf("MAXFEEDERS (%d >= %d) exceeded\n", feedercnt, MAXFEEDERS); + printf("MAXFEEDERS (%d >= %d) exceeded\n", feedercnt, + MAXFEEDERS); } static void @@ -168,10 +173,8 @@ static int cmpdesc(struct pcm_feederdesc *n, struct pcm_feederdesc *m) { - return ((n->type == m->type) && - ((n->in == 0) || (n->in == m->in)) && - ((n->out == 0) || (n->out == m->out)) && - (n->flags == m->flags)); + return ((n->type == m->type) && ((n->in == 0) || (n->in == m->in)) && + ((n->out == 0) || (n->out == m->out)) && (n->flags == m->flags)); } static void @@ -187,7 +190,8 @@ struct pcm_feeder *f; int err; - f = (struct pcm_feeder *)kobj_create((kobj_class_t)fc, M_FEEDER, M_NOWAIT | M_ZERO); + f = (struct pcm_feeder *)kobj_create((kobj_class_t)fc, M_FEEDER, + M_NOWAIT | M_ZERO); if (f == NULL) return NULL; @@ -223,17 +227,19 @@ { struct feedertab_entry *fte; - SLIST_FOREACH(fte, &feedertab, link) { + SLIST_FOREACH (fte, &feedertab, link) { if ((desc == NULL) && (fte->desc == NULL)) return fte->feederclass; - if ((fte->desc != NULL) && (desc != NULL) && cmpdesc(desc, fte->desc)) + if ((fte->desc != NULL) && (desc != NULL) && + cmpdesc(desc, fte->desc)) return fte->feederclass; } return NULL; } int -chn_addfeeder(struct pcm_channel *c, struct feeder_class *fc, struct pcm_feederdesc *desc) +chn_addfeeder(struct pcm_channel *c, struct feeder_class *fc, + struct pcm_feederdesc *desc) { struct pcm_feeder *nf; @@ -306,13 +312,13 @@ * | * +--------------------------------------------> AFMT_32BIT */ -#define score_signeq(s1, s2) (((s1) & 0x1) == ((s2) & 0x1)) -#define score_endianeq(s1, s2) (((s1) & 0x2) == ((s2) & 0x2)) -#define score_cheq(s1, s2) (((s1) & 0xfc) == ((s2) & 0xfc)) -#define score_chgt(s1, s2) (((s1) & 0xfc) > ((s2) & 0xfc)) -#define score_chlt(s1, s2) (((s1) & 0xfc) < ((s2) & 0xfc)) -#define score_val(s1) ((s1) & 0x3f00) -#define score_cse(s1) ((s1) & 0x7f) +#define score_signeq(s1, s2) (((s1) & 0x1) == ((s2) & 0x1)) +#define score_endianeq(s1, s2) (((s1) & 0x2) == ((s2) & 0x2)) +#define score_cheq(s1, s2) (((s1) & 0xfc) == ((s2) & 0xfc)) +#define score_chgt(s1, s2) (((s1) & 0xfc) > ((s2) & 0xfc)) +#define score_chlt(s1, s2) (((s1) & 0xfc) < ((s2) & 0xfc)) +#define score_val(s1) ((s1) & 0x3f00) +#define score_cse(s1) ((s1) & 0x7f) u_int32_t snd_fmtscore(u_int32_t fmt) @@ -364,24 +370,23 @@ score2 = snd_fmtscore(fmts[i]); if (cheq && !score_cheq(score, score2) && (score_chlt(score2, score) || - (oldscore != 0 && score_chgt(score2, oldscore)))) - continue; - if (oldscore == 0 || - (score_val(score2) == score_val(score)) || - (score_val(score2) == score_val(oldscore)) || - (score_val(score2) > score_val(oldscore) && - score_val(score2) < score_val(score)) || - (score_val(score2) < score_val(oldscore) && - score_val(score2) > score_val(score)) || - (score_val(oldscore) < score_val(score) && - score_val(score2) > score_val(oldscore))) { + (oldscore != 0 && score_chgt(score2, oldscore)))) + continue; + if (oldscore == 0 || (score_val(score2) == score_val(score)) || + (score_val(score2) == score_val(oldscore)) || + (score_val(score2) > score_val(oldscore) && + score_val(score2) < score_val(score)) || + (score_val(score2) < score_val(oldscore) && + score_val(score2) > score_val(score)) || + (score_val(oldscore) < score_val(score) && + score_val(score2) > score_val(oldscore))) { if (score_val(oldscore) != score_val(score2) || - score_cse(score) == score_cse(score2) || - ((score_cse(oldscore) != score_cse(score) && - !score_endianeq(score, oldscore) && - (score_endianeq(score, score2) || + score_cse(score) == score_cse(score2) || + ((score_cse(oldscore) != score_cse(score) && + !score_endianeq(score, oldscore) && + (score_endianeq(score, score2) || (!score_signeq(score, oldscore) && - score_signeq(score, score2)))))) { + score_signeq(score, score2)))))) { best = fmts[i]; oldscore = score2; } @@ -453,7 +458,8 @@ /*****************************************************************************/ static int -feed_root(struct pcm_feeder *feeder, struct pcm_channel *ch, u_int8_t *buffer, u_int32_t count, void *source) +feed_root(struct pcm_feeder *feeder, struct pcm_channel *ch, u_int8_t *buffer, + u_int32_t count, void *source) { struct snd_dbuf *src = source; int l, offset; @@ -476,15 +482,15 @@ if (offset > 0) { if (snd_verbose > 3) printf("%s: (%s) %spending %d bytes " - "(count=%d l=%d feed=%d)\n", + "(count=%d l=%d feed=%d)\n", __func__, - (ch->flags & CHN_F_VIRTUAL) ? "virtual" : "hardware", - (ch->feedcount == 1) ? "pre" : "ap", - offset, count, l, ch->feedcount); + (ch->flags & CHN_F_VIRTUAL) ? "virtual" : + "hardware", + (ch->feedcount == 1) ? "pre" : "ap", offset, count, + l, ch->feedcount); if (ch->feedcount == 1) { - memset(buffer, - sndbuf_zerodata(sndbuf_getfmt(src)), + memset(buffer, sndbuf_zerodata(sndbuf_getfmt(src)), offset); if (l > 0) sndbuf_dispose(src, buffer + offset, l); @@ -493,8 +499,7 @@ } else { if (l > 0) sndbuf_dispose(src, buffer, l); - memset(buffer + l, - sndbuf_zerodata(sndbuf_getfmt(src)), + memset(buffer + l, sndbuf_zerodata(sndbuf_getfmt(src)), offset); if (!(ch->flags & CHN_F_CLOSING)) ch->xruns++; @@ -506,15 +511,16 @@ } static kobj_method_t feeder_root_methods[] = { - KOBJMETHOD(feeder_feed, feed_root), - KOBJMETHOD_END + KOBJMETHOD(feeder_feed, feed_root), KOBJMETHOD_END }; static struct feeder_class feeder_root_class = { - .name = "feeder_root", - .methods = feeder_root_methods, - .size = sizeof(struct pcm_feeder), - .desc = NULL, - .data = NULL, + .name = "feeder_root", + .methods = feeder_root_methods, + .size = sizeof(struct pcm_feeder), + .desc = NULL, + .data = NULL, }; -SYSINIT(feeder_root, SI_SUB_DRIVERS, SI_ORDER_FIRST, feeder_register, &feeder_root_class); -SYSUNINIT(feeder_root, SI_SUB_DRIVERS, SI_ORDER_FIRST, feeder_unregisterall, NULL); +SYSINIT(feeder_root, SI_SUB_DRIVERS, SI_ORDER_FIRST, feeder_register, + &feeder_root_class); +SYSUNINIT(feeder_root, SI_SUB_DRIVERS, SI_ORDER_FIRST, feeder_unregisterall, + NULL); Index: sys/dev/sound/pcm/feeder_chain.c =================================================================== --- sys/dev/sound/pcm/feeder_chain.c +++ sys/dev/sound/pcm/feeder_chain.c @@ -36,9 +36,9 @@ /* chain state */ struct feeder_chain_state { - uint32_t afmt; /* audio format */ - uint32_t rate; /* sampling rate */ - struct pcmchan_matrix *matrix; /* matrix map */ + uint32_t afmt; /* audio format */ + uint32_t rate; /* sampling rate */ + struct pcmchan_matrix *matrix; /* matrix map */ }; /* @@ -46,32 +46,32 @@ * end of chain process. */ struct feeder_chain_desc { - struct feeder_chain_state origin; /* original state */ - struct feeder_chain_state current; /* current state */ - struct feeder_chain_state target; /* target state */ - struct pcm_feederdesc desc; /* feeder descriptor */ - uint32_t afmt_ne; /* preferred native endian */ - int mode; /* chain mode */ - int use_eq; /* need EQ? */ - int use_matrix; /* need channel matrixing? */ - int use_volume; /* need softpcmvol? */ - int dummy; /* dummy passthrough */ - int expensive; /* possibly expensive */ + struct feeder_chain_state origin; /* original state */ + struct feeder_chain_state current; /* current state */ + struct feeder_chain_state target; /* target state */ + struct pcm_feederdesc desc; /* feeder descriptor */ + uint32_t afmt_ne; /* preferred native endian */ + int mode; /* chain mode */ + int use_eq; /* need EQ? */ + int use_matrix; /* need channel matrixing? */ + int use_volume; /* need softpcmvol? */ + int dummy; /* dummy passthrough */ + int expensive; /* possibly expensive */ }; -#define FEEDER_CHAIN_LEAN 0 -#define FEEDER_CHAIN_16 1 -#define FEEDER_CHAIN_32 2 -#define FEEDER_CHAIN_MULTI 3 -#define FEEDER_CHAIN_FULLMULTI 4 -#define FEEDER_CHAIN_LAST 5 +#define FEEDER_CHAIN_LEAN 0 +#define FEEDER_CHAIN_16 1 +#define FEEDER_CHAIN_32 2 +#define FEEDER_CHAIN_MULTI 3 +#define FEEDER_CHAIN_FULLMULTI 4 +#define FEEDER_CHAIN_LAST 5 #if defined(SND_FEEDER_FULL_MULTIFORMAT) -#define FEEDER_CHAIN_DEFAULT FEEDER_CHAIN_FULLMULTI +#define FEEDER_CHAIN_DEFAULT FEEDER_CHAIN_FULLMULTI #elif defined(SND_FEEDER_MULTIFORMAT) -#define FEEDER_CHAIN_DEFAULT FEEDER_CHAIN_MULTI +#define FEEDER_CHAIN_DEFAULT FEEDER_CHAIN_MULTI #else -#define FEEDER_CHAIN_DEFAULT FEEDER_CHAIN_LEAN +#define FEEDER_CHAIN_DEFAULT FEEDER_CHAIN_LEAN #endif /* @@ -80,51 +80,37 @@ */ /* 'Lean' mode, signed 16 or 32 bit native endian. */ -static uint32_t feeder_chain_formats_lean[] = { - AFMT_S16_NE, AFMT_S32_NE, - 0 -}; +static uint32_t feeder_chain_formats_lean[] = { AFMT_S16_NE, AFMT_S32_NE, 0 }; /* Force everything to signed 16 bit native endian. */ -static uint32_t feeder_chain_formats_16[] = { - AFMT_S16_NE, - 0 -}; +static uint32_t feeder_chain_formats_16[] = { AFMT_S16_NE, 0 }; /* Force everything to signed 32 bit native endian. */ -static uint32_t feeder_chain_formats_32[] = { - AFMT_S32_NE, - 0 -}; +static uint32_t feeder_chain_formats_32[] = { AFMT_S32_NE, 0 }; /* Multiple choices, all except 8 bit. */ -static uint32_t feeder_chain_formats_multi[] = { - AFMT_S16_LE, AFMT_S16_BE, AFMT_U16_LE, AFMT_U16_BE, - AFMT_S24_LE, AFMT_S24_BE, AFMT_U24_LE, AFMT_U24_BE, - AFMT_S32_LE, AFMT_S32_BE, AFMT_U32_LE, AFMT_U32_BE, - 0 -}; +static uint32_t feeder_chain_formats_multi[] = { AFMT_S16_LE, AFMT_S16_BE, + AFMT_U16_LE, AFMT_U16_BE, AFMT_S24_LE, AFMT_S24_BE, AFMT_U24_LE, + AFMT_U24_BE, AFMT_S32_LE, AFMT_S32_BE, AFMT_U32_LE, AFMT_U32_BE, 0 }; /* Everything that is convertible. */ -static uint32_t feeder_chain_formats_fullmulti[] = { - AFMT_S8, AFMT_U8, - AFMT_S16_LE, AFMT_S16_BE, AFMT_U16_LE, AFMT_U16_BE, - AFMT_S24_LE, AFMT_S24_BE, AFMT_U24_LE, AFMT_U24_BE, - AFMT_S32_LE, AFMT_S32_BE, AFMT_U32_LE, AFMT_U32_BE, - 0 -}; +static uint32_t feeder_chain_formats_fullmulti[] = { AFMT_S8, AFMT_U8, + AFMT_S16_LE, AFMT_S16_BE, AFMT_U16_LE, AFMT_U16_BE, AFMT_S24_LE, + AFMT_S24_BE, AFMT_U24_LE, AFMT_U24_BE, AFMT_S32_LE, AFMT_S32_BE, + AFMT_U32_LE, AFMT_U32_BE, 0 }; static uint32_t *feeder_chain_formats[FEEDER_CHAIN_LAST] = { - [FEEDER_CHAIN_LEAN] = feeder_chain_formats_lean, - [FEEDER_CHAIN_16] = feeder_chain_formats_16, - [FEEDER_CHAIN_32] = feeder_chain_formats_32, - [FEEDER_CHAIN_MULTI] = feeder_chain_formats_multi, + [FEEDER_CHAIN_LEAN] = feeder_chain_formats_lean, + [FEEDER_CHAIN_16] = feeder_chain_formats_16, + [FEEDER_CHAIN_32] = feeder_chain_formats_32, + [FEEDER_CHAIN_MULTI] = feeder_chain_formats_multi, [FEEDER_CHAIN_FULLMULTI] = feeder_chain_formats_fullmulti }; static int feeder_chain_mode = FEEDER_CHAIN_DEFAULT; -#if defined(_KERNEL) && defined(SND_DEBUG) && defined(SND_FEEDER_FULL_MULTIFORMAT) +#if defined(_KERNEL) && defined(SND_DEBUG) && \ + defined(SND_FEEDER_FULL_MULTIFORMAT) SYSCTL_INT(_hw_snd, OID_AUTO, feeder_chain_mode, CTLFLAG_RWTUN, &feeder_chain_mode, 0, "feeder chain mode " @@ -149,8 +135,8 @@ fc = feeder_getclass(desc); if (fc == NULL) { - device_printf(c->dev, - "%s(): can't find feeder_format\n", __func__); + device_printf(c->dev, "%s(): can't find feeder_format\n", + __func__); return (ENOTSUP); } @@ -159,8 +145,8 @@ ret = chn_addfeeder(c, fc, desc); if (ret != 0) { - device_printf(c->dev, - "%s(): can't add feeder_format\n", __func__); + device_printf(c->dev, "%s(): can't add feeder_format\n", + __func__); return (ret); } @@ -222,8 +208,8 @@ fc = feeder_getclass(desc); if (fc == NULL) { - device_printf(c->dev, - "%s(): can't find feeder_rate\n", __func__); + device_printf(c->dev, "%s(): can't find feeder_rate\n", + __func__); return (ENOTSUP); } @@ -232,8 +218,8 @@ ret = chn_addfeeder(c, fc, desc); if (ret != 0) { - device_printf(c->dev, - "%s(): can't add feeder_rate\n", __func__); + device_printf(c->dev, "%s(): can't add feeder_rate\n", + __func__); return (ret); } @@ -258,15 +244,15 @@ ret = FEEDER_SET(f, FEEDRATE_SRC, cdesc->current.rate); if (ret != 0) { - device_printf(c->dev, - "%s(): can't set source rate\n", __func__); + device_printf(c->dev, "%s(): can't set source rate\n", + __func__); return (ret); } ret = FEEDER_SET(f, FEEDRATE_DST, cdesc->target.rate); if (ret != 0) { - device_printf(c->dev, - "%s(): can't set destination rate\n", __func__); + device_printf(c->dev, "%s(): can't set destination rate\n", + __func__); return (ret); } @@ -300,8 +286,8 @@ fc = feeder_getclass(desc); if (fc == NULL) { - device_printf(c->dev, - "%s(): can't find feeder_matrix\n", __func__); + device_printf(c->dev, "%s(): can't find feeder_matrix\n", + __func__); return (ENOTSUP); } @@ -311,8 +297,8 @@ ret = chn_addfeeder(c, fc, desc); if (ret != 0) { - device_printf(c->dev, - "%s(): can't add feeder_matrix\n", __func__); + device_printf(c->dev, "%s(): can't add feeder_matrix\n", + __func__); return (ret); } @@ -320,8 +306,8 @@ ret = feeder_matrix_setup(f, cdesc->current.matrix, cdesc->target.matrix); if (ret != 0) { - device_printf(c->dev, - "%s(): feeder_matrix_setup() failed\n", __func__); + device_printf(c->dev, "%s(): feeder_matrix_setup() failed\n", + __func__); return (ret); } @@ -357,8 +343,8 @@ fc = feeder_getclass(desc); if (fc == NULL) { - device_printf(c->dev, - "%s(): can't find feeder_volume\n", __func__); + device_printf(c->dev, "%s(): can't find feeder_volume\n", + __func__); return (ENOTSUP); } @@ -367,8 +353,8 @@ ret = chn_addfeeder(c, fc, desc); if (ret != 0) { - device_printf(c->dev, - "%s(): can't add feeder_volume\n", __func__); + device_printf(c->dev, "%s(): can't add feeder_volume\n", + __func__); return (ret); } @@ -382,8 +368,8 @@ if (cdesc->dummy != 0) { ret = FEEDER_SET(f, FEEDVOLUME_STATE, FEEDVOLUME_BYPASS); if (ret != 0) { - device_printf(c->dev, - "%s(): can't set volume bypass\n", __func__); + device_printf(c->dev, "%s(): can't set volume bypass\n", + __func__); return (ret); } } @@ -425,8 +411,7 @@ fc = feeder_getclass(desc); if (fc == NULL) { - device_printf(c->dev, - "%s(): can't find feeder_eq\n", __func__); + device_printf(c->dev, "%s(): can't find feeder_eq\n", __func__); return (ENOTSUP); } @@ -435,8 +420,7 @@ ret = chn_addfeeder(c, fc, desc); if (ret != 0) { - device_printf(c->dev, - "%s(): can't add feeder_eq\n", __func__); + device_printf(c->dev, "%s(): can't add feeder_eq\n", __func__); return (ret); } @@ -444,8 +428,8 @@ ret = FEEDER_SET(f, FEEDEQ_RATE, cdesc->current.rate); if (ret != 0) { - device_printf(c->dev, - "%s(): can't set rate on feeder_eq\n", __func__); + device_printf(c->dev, "%s(): can't set rate on feeder_eq\n", + __func__); return (ret); } @@ -467,15 +451,15 @@ fc = feeder_getclass(NULL); if (fc == NULL) { - device_printf(c->dev, - "%s(): can't find feeder_root\n", __func__); + device_printf(c->dev, "%s(): can't find feeder_root\n", + __func__); return (ENOTSUP); } ret = chn_addfeeder(c, fc, NULL); if (ret != 0) { - device_printf(c->dev, - "%s(): can't add feeder_root\n", __func__); + device_printf(c->dev, "%s(): can't add feeder_root\n", + __func__); return (ret); } @@ -505,8 +489,8 @@ fc = feeder_getclass(desc); if (fc == NULL) { - device_printf(c->dev, - "%s(): can't find feeder_mixer\n", __func__); + device_printf(c->dev, "%s(): can't find feeder_mixer\n", + __func__); return (ENOTSUP); } @@ -515,8 +499,8 @@ ret = chn_addfeeder(c, fc, desc); if (ret != 0) { - device_printf(c->dev, - "%s(): can't add feeder_mixer\n", __func__); + device_printf(c->dev, "%s(): can't add feeder_mixer\n", + __func__); return (ret); } @@ -526,40 +510,39 @@ } /* Macrosses to ease our job doing stuffs later. */ -#define FEEDER_BW(c, t) ((c)->t.matrix->channels * (c)->t.rate) - -#define FEEDRATE_UP(c) ((c)->target.rate > (c)->current.rate) -#define FEEDRATE_DOWN(c) ((c)->target.rate < (c)->current.rate) -#define FEEDRATE_REQUIRED(c) (FEEDRATE_UP(c) || FEEDRATE_DOWN(c)) - -#define FEEDMATRIX_UP(c) ((c)->target.matrix->channels > \ - (c)->current.matrix->channels) -#define FEEDMATRIX_DOWN(c) ((c)->target.matrix->channels < \ - (c)->current.matrix->channels) -#define FEEDMATRIX_REQUIRED(c) (FEEDMATRIX_UP(c) || \ - FEEDMATRIX_DOWN(c) || (c)->use_matrix != 0) - -#define FEEDFORMAT_REQUIRED(c) (AFMT_ENCODING((c)->current.afmt) != \ - AFMT_ENCODING((c)->target.afmt)) - -#define FEEDVOLUME_REQUIRED(c) ((c)->use_volume != 0) - -#define FEEDEQ_VALIDRATE(c, t) (feeder_eq_validrate((c)->t.rate) != 0) -#define FEEDEQ_ECONOMY(c) (FEEDER_BW(c, current) < FEEDER_BW(c, target)) -#define FEEDEQ_REQUIRED(c) ((c)->use_eq != 0 && \ - FEEDEQ_VALIDRATE(c, current)) - -#define FEEDFORMAT_NE_REQUIRED(c) \ - ((c)->afmt_ne != AFMT_S32_NE && \ - (((c)->mode == FEEDER_CHAIN_16 && \ - AFMT_ENCODING((c)->current.afmt) != AFMT_S16_NE) || \ - ((c)->mode == FEEDER_CHAIN_32 && \ - AFMT_ENCODING((c)->current.afmt) != AFMT_S32_NE) || \ - (c)->mode == FEEDER_CHAIN_FULLMULTI || \ - ((c)->mode == FEEDER_CHAIN_MULTI && \ - ((c)->current.afmt & AFMT_8BIT)) || \ - ((c)->mode == FEEDER_CHAIN_LEAN && \ - !((c)->current.afmt & (AFMT_S16_NE | AFMT_S32_NE))))) +#define FEEDER_BW(c, t) ((c)->t.matrix->channels * (c)->t.rate) + +#define FEEDRATE_UP(c) ((c)->target.rate > (c)->current.rate) +#define FEEDRATE_DOWN(c) ((c)->target.rate < (c)->current.rate) +#define FEEDRATE_REQUIRED(c) (FEEDRATE_UP(c) || FEEDRATE_DOWN(c)) + +#define FEEDMATRIX_UP(c) \ + ((c)->target.matrix->channels > (c)->current.matrix->channels) +#define FEEDMATRIX_DOWN(c) \ + ((c)->target.matrix->channels < (c)->current.matrix->channels) +#define FEEDMATRIX_REQUIRED(c) \ + (FEEDMATRIX_UP(c) || FEEDMATRIX_DOWN(c) || (c)->use_matrix != 0) + +#define FEEDFORMAT_REQUIRED(c) \ + (AFMT_ENCODING((c)->current.afmt) != AFMT_ENCODING((c)->target.afmt)) + +#define FEEDVOLUME_REQUIRED(c) ((c)->use_volume != 0) + +#define FEEDEQ_VALIDRATE(c, t) (feeder_eq_validrate((c)->t.rate) != 0) +#define FEEDEQ_ECONOMY(c) (FEEDER_BW(c, current) < FEEDER_BW(c, target)) +#define FEEDEQ_REQUIRED(c) ((c)->use_eq != 0 && FEEDEQ_VALIDRATE(c, current)) + +#define FEEDFORMAT_NE_REQUIRED(c) \ + ((c)->afmt_ne != AFMT_S32_NE && \ + (((c)->mode == FEEDER_CHAIN_16 && \ + AFMT_ENCODING((c)->current.afmt) != AFMT_S16_NE) || \ + ((c)->mode == FEEDER_CHAIN_32 && \ + AFMT_ENCODING((c)->current.afmt) != AFMT_S32_NE) || \ + (c)->mode == FEEDER_CHAIN_FULLMULTI || \ + ((c)->mode == FEEDER_CHAIN_MULTI && \ + ((c)->current.afmt & AFMT_8BIT)) || \ + ((c)->mode == FEEDER_CHAIN_LEAN && \ + !((c)->current.afmt & (AFMT_S16_NE | AFMT_S32_NE))))) static void feeder_default_matrix(struct pcmchan_matrix *m, uint32_t fmt, int id) @@ -613,11 +596,11 @@ } cdesc.mode = feeder_chain_mode; - cdesc.expensive = 1; /* XXX faster.. */ + cdesc.expensive = 1; /* XXX faster.. */ -#define VCHAN_PASSTHROUGH(c) (((c)->flags & (CHN_F_VIRTUAL | \ - CHN_F_PASSTHROUGH)) == \ - (CHN_F_VIRTUAL | CHN_F_PASSTHROUGH)) +#define VCHAN_PASSTHROUGH(c) \ + (((c)->flags & (CHN_F_VIRTUAL | CHN_F_PASSTHROUGH)) == \ + (CHN_F_VIRTUAL | CHN_F_PASSTHROUGH)) /* Get the best possible hardware format. */ if (VCHAN_PASSTHROUGH(c)) @@ -637,8 +620,8 @@ hwfmt = snd_fmtbest(c->format, caps->fmtlist); if (hwfmt == 0 || !snd_fmtvalid(hwfmt, caps->fmtlist)) { device_printf(c->dev, - "%s(): invalid hardware format 0x%08x\n", - __func__, hwfmt); + "%s(): invalid hardware format 0x%08x\n", __func__, + hwfmt); { int i; for (i = 0; caps->fmtlist[i] != 0; i++) @@ -657,8 +640,7 @@ if (hwmatrix == NULL) { /* setup a default matrix */ hwmatrix = &c->matrix_scratch; - feeder_default_matrix(hwmatrix, hwfmt, - SND_CHN_MATRIX_UNKNOWN); + feeder_default_matrix(hwmatrix, hwfmt, SND_CHN_MATRIX_UNKNOWN); } /* ..... and rebuild hwfmt. */ hwfmt = SND_FORMAT(hwfmt, hwmatrix->channels, hwmatrix->ext); @@ -689,19 +671,19 @@ * PLAY and REC are opposite. */ if (c->direction == PCMDIR_PLAY) { - cdesc.origin.afmt = softfmt; - cdesc.origin.matrix = softmatrix; - cdesc.origin.rate = c->speed; - cdesc.target.afmt = hwfmt; - cdesc.target.matrix = hwmatrix; - cdesc.target.rate = sndbuf_getspd(c->bufhard); + cdesc.origin.afmt = softfmt; + cdesc.origin.matrix = softmatrix; + cdesc.origin.rate = c->speed; + cdesc.target.afmt = hwfmt; + cdesc.target.matrix = hwmatrix; + cdesc.target.rate = sndbuf_getspd(c->bufhard); } else { - cdesc.origin.afmt = hwfmt; - cdesc.origin.matrix = hwmatrix; - cdesc.origin.rate = sndbuf_getspd(c->bufhard); - cdesc.target.afmt = softfmt; - cdesc.target.matrix = softmatrix; - cdesc.target.rate = c->speed; + cdesc.origin.afmt = hwfmt; + cdesc.origin.matrix = hwmatrix; + cdesc.origin.rate = sndbuf_getspd(c->bufhard); + cdesc.target.afmt = softfmt; + cdesc.target.matrix = softmatrix; + cdesc.target.rate = c->speed; } d = c->parentsnddev; @@ -717,7 +699,7 @@ else cdesc.target = cdesc.origin; c->format = cdesc.target.afmt; - c->speed = cdesc.target.rate; + c->speed = cdesc.target.rate; } else { /* hwfmt is not convertible, so 'dummy' it. */ if (hwfmt & AFMT_PASSTHROUGH) @@ -725,37 +707,39 @@ if ((softfmt & AFMT_CONVERTIBLE) && (((d->flags & SD_F_VPC) && !(c->flags & CHN_F_HAS_VCHAN)) || - (!(d->flags & SD_F_VPC) && (d->flags & SD_F_SOFTPCMVOL) && - !(c->flags & CHN_F_VIRTUAL)))) + (!(d->flags & SD_F_VPC) && + (d->flags & SD_F_SOFTPCMVOL) && + !(c->flags & CHN_F_VIRTUAL)))) cdesc.use_volume = 1; if (feeder_matrix_compare(cdesc.origin.matrix, - cdesc.target.matrix) != 0) + cdesc.target.matrix) != 0) cdesc.use_matrix = 1; /* Soft EQ only applicable for PLAY. */ - if (cdesc.dummy == 0 && - c->direction == PCMDIR_PLAY && (d->flags & SD_F_EQ) && + if (cdesc.dummy == 0 && c->direction == PCMDIR_PLAY && + (d->flags & SD_F_EQ) && (((d->flags & SD_F_EQ_PC) && - !(c->flags & CHN_F_HAS_VCHAN)) || - (!(d->flags & SD_F_EQ_PC) && !(c->flags & CHN_F_VIRTUAL)))) + !(c->flags & CHN_F_HAS_VCHAN)) || + (!(d->flags & SD_F_EQ_PC) && + !(c->flags & CHN_F_VIRTUAL)))) cdesc.use_eq = 1; if (FEEDFORMAT_NE_REQUIRED(&cdesc)) { - cdesc.afmt_ne = - (cdesc.dummy != 0) ? + cdesc.afmt_ne = (cdesc.dummy != 0) ? snd_fmtbest(AFMT_ENCODING(softfmt), - feeder_chain_formats[cdesc.mode]) : + feeder_chain_formats[cdesc.mode]) : snd_fmtbest(AFMT_ENCODING(cdesc.target.afmt), - feeder_chain_formats[cdesc.mode]); + feeder_chain_formats[cdesc.mode]); if (cdesc.afmt_ne == 0) { device_printf(c->dev, "%s(): snd_fmtbest failed!\n", __func__); - cdesc.afmt_ne = - (((cdesc.dummy != 0) ? softfmt : - cdesc.target.afmt) & - (AFMT_24BIT | AFMT_32BIT)) ? - AFMT_S32_NE : AFMT_S16_NE; + cdesc.afmt_ne = (((cdesc.dummy != 0) ? + softfmt : + cdesc.target.afmt) & + (AFMT_24BIT | AFMT_32BIT)) ? + AFMT_S32_NE : + AFMT_S16_NE; } } } @@ -766,10 +750,11 @@ c->feederflags = 0; -#define FEEDER_BUILD(t) do { \ - ret = feeder_build_##t(c, &cdesc); \ - if (ret != 0) \ - return (ret); \ +#define FEEDER_BUILD(t) \ + do { \ + ret = feeder_build_##t(c, &cdesc); \ + if (ret != 0) \ + return (ret); \ } while (0) if (!(c->flags & CHN_F_HAS_VCHAN) || c->direction == PCMDIR_REC) @@ -795,7 +780,7 @@ if (FEEDMATRIX_UP(&cdesc)) { if (FEEDEQ_REQUIRED(&cdesc) && (!FEEDEQ_VALIDRATE(&cdesc, target) || - (cdesc.expensive == 0 && FEEDEQ_ECONOMY(&cdesc)))) + (cdesc.expensive == 0 && FEEDEQ_ECONOMY(&cdesc)))) FEEDER_BUILD(eq); if (FEEDRATE_REQUIRED(&cdesc)) FEEDER_BUILD(rate); @@ -810,7 +795,7 @@ FEEDER_BUILD(volume); if (FEEDEQ_REQUIRED(&cdesc) && (!FEEDEQ_VALIDRATE(&cdesc, target) || - FEEDEQ_ECONOMY(&cdesc))) + FEEDEQ_ECONOMY(&cdesc))) FEEDER_BUILD(eq); if (FEEDRATE_REQUIRED(&cdesc)) FEEDER_BUILD(rate); Index: sys/dev/sound/pcm/feeder_eq.c =================================================================== --- sys/dev/sound/pcm/feeder_eq.c +++ sys/dev/sound/pcm/feeder_eq.c @@ -39,8 +39,9 @@ #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include #include +#include + #include "feeder_if.h" #define SND_USE_FXDIV @@ -49,46 +50,47 @@ #include "feeder_eq_gen.h" -#define FEEDEQ_LEVELS \ - (((FEEDEQ_GAIN_MAX - FEEDEQ_GAIN_MIN) * \ - (FEEDEQ_GAIN_DIV / FEEDEQ_GAIN_STEP)) + 1) +#define FEEDEQ_LEVELS \ + (((FEEDEQ_GAIN_MAX - FEEDEQ_GAIN_MIN) * \ + (FEEDEQ_GAIN_DIV / FEEDEQ_GAIN_STEP)) + \ + 1) -#define FEEDEQ_L2GAIN(v) \ +#define FEEDEQ_L2GAIN(v) \ ((int)min(((v) * FEEDEQ_LEVELS) / 100, FEEDEQ_LEVELS - 1)) -#define FEEDEQ_PREAMP_IPART(x) (abs(x) >> FEEDEQ_GAIN_SHIFT) -#define FEEDEQ_PREAMP_FPART(x) (abs(x) & FEEDEQ_GAIN_FMASK) -#define FEEDEQ_PREAMP_SIGNVAL(x) ((x) < 0 ? -1 : 1) -#define FEEDEQ_PREAMP_SIGNMARK(x) (((x) < 0) ? '-' : '+') +#define FEEDEQ_PREAMP_IPART(x) (abs(x) >> FEEDEQ_GAIN_SHIFT) +#define FEEDEQ_PREAMP_FPART(x) (abs(x) & FEEDEQ_GAIN_FMASK) +#define FEEDEQ_PREAMP_SIGNVAL(x) ((x) < 0 ? -1 : 1) +#define FEEDEQ_PREAMP_SIGNMARK(x) (((x) < 0) ? '-' : '+') -#define FEEDEQ_PREAMP_IMIN -192 -#define FEEDEQ_PREAMP_IMAX 192 -#define FEEDEQ_PREAMP_FMIN 0 -#define FEEDEQ_PREAMP_FMAX 9 +#define FEEDEQ_PREAMP_IMIN -192 +#define FEEDEQ_PREAMP_IMAX 192 +#define FEEDEQ_PREAMP_FMIN 0 +#define FEEDEQ_PREAMP_FMAX 9 -#define FEEDEQ_PREAMP_INVALID INT_MAX +#define FEEDEQ_PREAMP_INVALID INT_MAX -#define FEEDEQ_IF2PREAMP(i, f) \ - ((abs(i) << FEEDEQ_GAIN_SHIFT) | \ - (((abs(f) / FEEDEQ_GAIN_STEP) * FEEDEQ_GAIN_STEP) & \ - FEEDEQ_GAIN_FMASK)) +#define FEEDEQ_IF2PREAMP(i, f) \ + ((abs(i) << FEEDEQ_GAIN_SHIFT) | \ + (((abs(f) / FEEDEQ_GAIN_STEP) * FEEDEQ_GAIN_STEP) & \ + FEEDEQ_GAIN_FMASK)) -#define FEEDEQ_PREAMP_MIN \ - (FEEDEQ_PREAMP_SIGNVAL(FEEDEQ_GAIN_MIN) * \ - FEEDEQ_IF2PREAMP(FEEDEQ_GAIN_MIN, 0)) +#define FEEDEQ_PREAMP_MIN \ + (FEEDEQ_PREAMP_SIGNVAL(FEEDEQ_GAIN_MIN) * \ + FEEDEQ_IF2PREAMP(FEEDEQ_GAIN_MIN, 0)) -#define FEEDEQ_PREAMP_MAX \ - (FEEDEQ_PREAMP_SIGNVAL(FEEDEQ_GAIN_MAX) * \ - FEEDEQ_IF2PREAMP(FEEDEQ_GAIN_MAX, 0)) +#define FEEDEQ_PREAMP_MAX \ + (FEEDEQ_PREAMP_SIGNVAL(FEEDEQ_GAIN_MAX) * \ + FEEDEQ_IF2PREAMP(FEEDEQ_GAIN_MAX, 0)) -#define FEEDEQ_PREAMP_DEFAULT FEEDEQ_IF2PREAMP(0, 0) +#define FEEDEQ_PREAMP_DEFAULT FEEDEQ_IF2PREAMP(0, 0) -#define FEEDEQ_PREAMP2IDX(v) \ - ((int32_t)((FEEDEQ_GAIN_MAX * (FEEDEQ_GAIN_DIV / \ - FEEDEQ_GAIN_STEP)) + (FEEDEQ_PREAMP_SIGNVAL(v) * \ - FEEDEQ_PREAMP_IPART(v) * (FEEDEQ_GAIN_DIV / \ - FEEDEQ_GAIN_STEP)) + (FEEDEQ_PREAMP_SIGNVAL(v) * \ - (FEEDEQ_PREAMP_FPART(v) / FEEDEQ_GAIN_STEP)))) +#define FEEDEQ_PREAMP2IDX(v) \ + ((int32_t)((FEEDEQ_GAIN_MAX * (FEEDEQ_GAIN_DIV / FEEDEQ_GAIN_STEP)) + \ + (FEEDEQ_PREAMP_SIGNVAL(v) * FEEDEQ_PREAMP_IPART(v) * \ + (FEEDEQ_GAIN_DIV / FEEDEQ_GAIN_STEP)) + \ + (FEEDEQ_PREAMP_SIGNVAL(v) * \ + (FEEDEQ_PREAMP_FPART(v) / FEEDEQ_GAIN_STEP)))) static int feeder_eq_exact_rate = 0; @@ -126,90 +128,94 @@ }; #if !defined(_KERNEL) && defined(FEEDEQ_ERR_CLIP) -#define FEEDEQ_ERR_CLIP_CHECK(t, v) do { \ - if ((v) < PCM_S32_MIN || (v) > PCM_S32_MAX) \ - errx(1, "\n\n%s(): ["#t"] Sample clipping: %jd\n", \ - __func__, (intmax_t)(v)); \ -} while (0) +#define FEEDEQ_ERR_CLIP_CHECK(t, v) \ + do { \ + if ((v) < PCM_S32_MIN || (v) > PCM_S32_MAX) \ + errx(1, "\n\n%s(): [" #t "] Sample clipping: %jd\n", \ + __func__, (intmax_t)(v)); \ + } while (0) #else #define FEEDEQ_ERR_CLIP_CHECK(...) #endif -#define FEEDEQ_CLAMP(v) (((v) > PCM_S32_MAX) ? PCM_S32_MAX : \ - (((v) < PCM_S32_MIN) ? PCM_S32_MIN : \ - (v))) - -#define FEEDEQ_DECLARE(SIGN, BIT, ENDIAN) \ -static void \ -feed_eq_biquad_##SIGN##BIT##ENDIAN(struct feed_eq_info *info, \ - uint8_t *dst, uint32_t count) \ -{ \ - struct feed_eq_coeff_tone *treble, *bass; \ - intpcm64_t w; \ - intpcm_t v; \ - uint32_t i, j; \ - int32_t pmul, pshift; \ - \ - pmul = feed_eq_preamp[info->preamp].mul; \ - pshift = feed_eq_preamp[info->preamp].shift; \ - \ - if (info->state == FEEDEQ_DISABLE) { \ - j = count * info->channels; \ - dst += j * PCM_##BIT##_BPS; \ - do { \ - dst -= PCM_##BIT##_BPS; \ - v = _PCM_READ_##SIGN##BIT##_##ENDIAN(dst); \ - v = ((intpcm64_t)pmul * v) >> pshift; \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, v); \ - } while (--j != 0); \ - \ - return; \ - } \ - \ - treble = &(info->coeff[info->treble.gain].treble); \ - bass = &(info->coeff[info->bass.gain].bass); \ - \ - do { \ - i = 0; \ - j = info->channels; \ - do { \ - v = _PCM_READ_##SIGN##BIT##_##ENDIAN(dst); \ - v <<= 32 - BIT; \ - v = ((intpcm64_t)pmul * v) >> pshift; \ - \ - w = (intpcm64_t)v * treble->b0; \ - w += (intpcm64_t)info->treble.i1[i] * treble->b1; \ - w += (intpcm64_t)info->treble.i2[i] * treble->b2; \ - w -= (intpcm64_t)info->treble.o1[i] * treble->a1; \ - w -= (intpcm64_t)info->treble.o2[i] * treble->a2; \ - info->treble.i2[i] = info->treble.i1[i]; \ - info->treble.i1[i] = v; \ - info->treble.o2[i] = info->treble.o1[i]; \ - w >>= FEEDEQ_COEFF_SHIFT; \ - FEEDEQ_ERR_CLIP_CHECK(treble, w); \ - v = FEEDEQ_CLAMP(w); \ - info->treble.o1[i] = v; \ - \ - w = (intpcm64_t)v * bass->b0; \ - w += (intpcm64_t)info->bass.i1[i] * bass->b1; \ - w += (intpcm64_t)info->bass.i2[i] * bass->b2; \ - w -= (intpcm64_t)info->bass.o1[i] * bass->a1; \ - w -= (intpcm64_t)info->bass.o2[i] * bass->a2; \ - info->bass.i2[i] = info->bass.i1[i]; \ - info->bass.i1[i] = v; \ - info->bass.o2[i] = info->bass.o1[i]; \ - w >>= FEEDEQ_COEFF_SHIFT; \ - FEEDEQ_ERR_CLIP_CHECK(bass, w); \ - v = FEEDEQ_CLAMP(w); \ - info->bass.o1[i] = v; \ - \ - v >>= 32 - BIT; \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, v); \ - dst += PCM_##BIT##_BPS; \ - i++; \ - } while (--j != 0); \ - } while (--count != 0); \ -} +#define FEEDEQ_CLAMP(v) \ + (((v) > PCM_S32_MAX) ? PCM_S32_MAX : \ + (((v) < PCM_S32_MIN) ? PCM_S32_MIN : (v))) + +#define FEEDEQ_DECLARE(SIGN, BIT, ENDIAN) \ + static void feed_eq_biquad_##SIGN##BIT##ENDIAN( \ + struct feed_eq_info *info, uint8_t *dst, uint32_t count) \ + { \ + struct feed_eq_coeff_tone *treble, *bass; \ + intpcm64_t w; \ + intpcm_t v; \ + uint32_t i, j; \ + int32_t pmul, pshift; \ + \ + pmul = feed_eq_preamp[info->preamp].mul; \ + pshift = feed_eq_preamp[info->preamp].shift; \ + \ + if (info->state == FEEDEQ_DISABLE) { \ + j = count * info->channels; \ + dst += j * PCM_##BIT##_BPS; \ + do { \ + dst -= PCM_##BIT##_BPS; \ + v = _PCM_READ_##SIGN##BIT##_##ENDIAN(dst); \ + v = ((intpcm64_t)pmul * v) >> pshift; \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, v); \ + } while (--j != 0); \ + \ + return; \ + } \ + \ + treble = &(info->coeff[info->treble.gain].treble); \ + bass = &(info->coeff[info->bass.gain].bass); \ + \ + do { \ + i = 0; \ + j = info->channels; \ + do { \ + v = _PCM_READ_##SIGN##BIT##_##ENDIAN(dst); \ + v <<= 32 - BIT; \ + v = ((intpcm64_t)pmul * v) >> pshift; \ + \ + w = (intpcm64_t)v * treble->b0; \ + w += (intpcm64_t)info->treble.i1[i] * \ + treble->b1; \ + w += (intpcm64_t)info->treble.i2[i] * \ + treble->b2; \ + w -= (intpcm64_t)info->treble.o1[i] * \ + treble->a1; \ + w -= (intpcm64_t)info->treble.o2[i] * \ + treble->a2; \ + info->treble.i2[i] = info->treble.i1[i]; \ + info->treble.i1[i] = v; \ + info->treble.o2[i] = info->treble.o1[i]; \ + w >>= FEEDEQ_COEFF_SHIFT; \ + FEEDEQ_ERR_CLIP_CHECK(treble, w); \ + v = FEEDEQ_CLAMP(w); \ + info->treble.o1[i] = v; \ + \ + w = (intpcm64_t)v * bass->b0; \ + w += (intpcm64_t)info->bass.i1[i] * bass->b1; \ + w += (intpcm64_t)info->bass.i2[i] * bass->b2; \ + w -= (intpcm64_t)info->bass.o1[i] * bass->a1; \ + w -= (intpcm64_t)info->bass.o2[i] * bass->a2; \ + info->bass.i2[i] = info->bass.i1[i]; \ + info->bass.i1[i] = v; \ + info->bass.o2[i] = info->bass.o1[i]; \ + w >>= FEEDEQ_COEFF_SHIFT; \ + FEEDEQ_ERR_CLIP_CHECK(bass, w); \ + v = FEEDEQ_CLAMP(w); \ + info->bass.o1[i] = v; \ + \ + v >>= 32 - BIT; \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, v); \ + dst += PCM_##BIT##_BPS; \ + i++; \ + } while (--j != 0); \ + } while (--count != 0); \ + } #if BYTE_ORDER == LITTLE_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) FEEDEQ_DECLARE(S, 16, LE) @@ -220,10 +226,10 @@ FEEDEQ_DECLARE(S, 32, BE) #endif #ifdef SND_FEEDER_MULTIFORMAT -FEEDEQ_DECLARE(S, 8, NE) +FEEDEQ_DECLARE(S, 8, NE) FEEDEQ_DECLARE(S, 24, LE) FEEDEQ_DECLARE(S, 24, BE) -FEEDEQ_DECLARE(U, 8, NE) +FEEDEQ_DECLARE(U, 8, NE) FEEDEQ_DECLARE(U, 16, LE) FEEDEQ_DECLARE(U, 24, LE) FEEDEQ_DECLARE(U, 32, LE) @@ -232,10 +238,10 @@ FEEDEQ_DECLARE(U, 32, BE) #endif -#define FEEDEQ_ENTRY(SIGN, BIT, ENDIAN) \ - { \ - AFMT_##SIGN##BIT##_##ENDIAN, \ - feed_eq_biquad_##SIGN##BIT##ENDIAN \ +#define FEEDEQ_ENTRY(SIGN, BIT, ENDIAN) \ + { \ + AFMT_##SIGN##BIT##_##ENDIAN, \ + feed_eq_biquad_##SIGN##BIT##ENDIAN \ } static const struct { @@ -243,28 +249,21 @@ feed_eq_t biquad; } feed_eq_biquad_tab[] = { #if BYTE_ORDER == LITTLE_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) - FEEDEQ_ENTRY(S, 16, LE), - FEEDEQ_ENTRY(S, 32, LE), + FEEDEQ_ENTRY(S, 16, LE), FEEDEQ_ENTRY(S, 32, LE), #endif #if BYTE_ORDER == BIG_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) - FEEDEQ_ENTRY(S, 16, BE), - FEEDEQ_ENTRY(S, 32, BE), + FEEDEQ_ENTRY(S, 16, BE), FEEDEQ_ENTRY(S, 32, BE), #endif #ifdef SND_FEEDER_MULTIFORMAT - FEEDEQ_ENTRY(S, 8, NE), - FEEDEQ_ENTRY(S, 24, LE), - FEEDEQ_ENTRY(S, 24, BE), - FEEDEQ_ENTRY(U, 8, NE), - FEEDEQ_ENTRY(U, 16, LE), - FEEDEQ_ENTRY(U, 24, LE), - FEEDEQ_ENTRY(U, 32, LE), - FEEDEQ_ENTRY(U, 16, BE), - FEEDEQ_ENTRY(U, 24, BE), - FEEDEQ_ENTRY(U, 32, BE) + FEEDEQ_ENTRY(S, 8, NE), FEEDEQ_ENTRY(S, 24, LE), + FEEDEQ_ENTRY(S, 24, BE), FEEDEQ_ENTRY(U, 8, NE), + FEEDEQ_ENTRY(U, 16, LE), FEEDEQ_ENTRY(U, 24, LE), + FEEDEQ_ENTRY(U, 32, LE), FEEDEQ_ENTRY(U, 16, BE), + FEEDEQ_ENTRY(U, 24, BE), FEEDEQ_ENTRY(U, 32, BE) #endif }; -#define FEEDEQ_BIQUAD_TAB_SIZE \ +#define FEEDEQ_BIQUAD_TAB_SIZE \ ((int32_t)(sizeof(feed_eq_biquad_tab) / sizeof(feed_eq_biquad_tab[0]))) static struct feed_eq_coeff * @@ -282,9 +281,11 @@ */ for (i = 0; i < FEEDEQ_TAB_SIZE; i++) { spd = feed_eq_tab[i].rate; - threshold = spd + ((i < (FEEDEQ_TAB_SIZE - 1) && - feed_eq_tab[i + 1].rate > spd) ? - ((feed_eq_tab[i + 1].rate - spd) >> 1) : 0); + threshold = spd + + ((i < (FEEDEQ_TAB_SIZE - 1) && + feed_eq_tab[i + 1].rate > spd) ? + ((feed_eq_tab[i + 1].rate - spd) >> 1) : + 0); if (rate == spd || (feeder_eq_exact_rate == 0 && rate <= threshold)) return (feed_eq_tab[i].coeff); @@ -412,7 +413,7 @@ break; case FEEDEQ_STATE: if (!(value == FEEDEQ_BYPASS || value == FEEDEQ_ENABLE || - value == FEEDEQ_DISABLE)) + value == FEEDEQ_DISABLE)) return (EINVAL); info->state = value; feed_eq_reset(info); @@ -481,18 +482,14 @@ return (dst - b); } -static struct pcm_feederdesc feeder_eq_desc[] = { - { FEEDER_EQ, 0, 0, 0, 0 }, - { 0, 0, 0, 0, 0 } -}; +static struct pcm_feederdesc feeder_eq_desc[] = { { FEEDER_EQ, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 } }; -static kobj_method_t feeder_eq_methods[] = { - KOBJMETHOD(feeder_init, feed_eq_init), - KOBJMETHOD(feeder_free, feed_eq_free), - KOBJMETHOD(feeder_set, feed_eq_set), - KOBJMETHOD(feeder_feed, feed_eq_feed), - KOBJMETHOD_END -}; +static kobj_method_t feeder_eq_methods[] = { KOBJMETHOD(feeder_init, + feed_eq_init), + KOBJMETHOD(feeder_free, feed_eq_free), + KOBJMETHOD(feeder_set, feed_eq_set), + KOBJMETHOD(feeder_feed, feed_eq_feed), KOBJMETHOD_END }; FEEDER_DECLARE(feeder_eq, NULL); @@ -510,14 +507,14 @@ r = sscanf(s, "%d.%d", &i, &f); if (r == 1 && !(i < FEEDEQ_PREAMP_IMIN || i > FEEDEQ_PREAMP_IMAX)) { - snprintf(buf, sizeof(buf), "%c%d", - FEEDEQ_PREAMP_SIGNMARK(i), abs(i)); + snprintf(buf, sizeof(buf), "%c%d", FEEDEQ_PREAMP_SIGNMARK(i), + abs(i)); f = 0; } else if (r == 2 && !(i < FEEDEQ_PREAMP_IMIN || i > FEEDEQ_PREAMP_IMAX || - f < FEEDEQ_PREAMP_FMIN || f > FEEDEQ_PREAMP_FMAX)) - snprintf(buf, sizeof(buf), "%c%d.%d", - FEEDEQ_PREAMP_SIGNMARK(i), abs(i), f); + f < FEEDEQ_PREAMP_FMIN || f > FEEDEQ_PREAMP_FMAX)) + snprintf(buf, sizeof(buf), "%c%d.%d", FEEDEQ_PREAMP_SIGNMARK(i), + abs(i), f); else return (FEEDEQ_PREAMP_INVALID); @@ -582,7 +579,8 @@ } else val = FEEDEQ_DISABLE; - CHN_FOREACH(c, d, channels.pcm.busy) { + CHN_FOREACH(c, d, channels.pcm.busy) + { CHN_LOCK(c); f = chn_findfeeder(c, FEEDER_EQ); if (f != NULL) @@ -641,7 +639,8 @@ d->eqpreamp = val; - CHN_FOREACH(c, d, channels.pcm.busy) { + CHN_FOREACH(c, d, channels.pcm.busy) + { CHN_LOCK(c); f = chn_findfeeder(c, FEEDER_EQ); if (f != NULL) @@ -668,9 +667,9 @@ d = device_get_softc(dev); if (!(resource_string_value(device_get_name(dev), device_get_unit(dev), - "eq_preamp", &preamp) == 0 && - (d->eqpreamp = feed_eq_scan_preamp_arg(preamp)) != - FEEDEQ_PREAMP_INVALID)) + "eq_preamp", &preamp) == 0 && + (d->eqpreamp = feed_eq_scan_preamp_arg(preamp)) != + FEEDEQ_PREAMP_INVALID)) d->eqpreamp = FEEDEQ_PREAMP_DEFAULT; if (d->eqpreamp < FEEDEQ_PREAMP_MIN) @@ -679,20 +678,21 @@ d->eqpreamp = FEEDEQ_PREAMP_MAX; SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "eq", CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, d, - sizeof(d), sysctl_dev_pcm_eq, "I", + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "eq", + CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, d, sizeof(d), + sysctl_dev_pcm_eq, "I", "Bass/Treble Equalizer (0=disable, 1=enable, 2=bypass)"); - (void)snprintf(buf, sizeof(buf), "Bass/Treble Equalizer Preamp " + (void)snprintf(buf, sizeof(buf), + "Bass/Treble Equalizer Preamp " "(-/+ %d.0dB , %d.%ddB step)", FEEDEQ_GAIN_MAX, FEEDEQ_GAIN_STEP / FEEDEQ_GAIN_DIV, - FEEDEQ_GAIN_STEP - ((FEEDEQ_GAIN_STEP / FEEDEQ_GAIN_DIV) * - FEEDEQ_GAIN_DIV)); + FEEDEQ_GAIN_STEP - + ((FEEDEQ_GAIN_STEP / FEEDEQ_GAIN_DIV) * FEEDEQ_GAIN_DIV)); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "eq_preamp", CTLTYPE_STRING | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, - d, sizeof(d), sysctl_dev_pcm_eq_preamp, "A", buf); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "eq_preamp", + CTLTYPE_STRING | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, d, sizeof(d), + sysctl_dev_pcm_eq_preamp, "A", buf); } #endif Index: sys/dev/sound/pcm/feeder_format.c =================================================================== --- sys/dev/sound/pcm/feeder_format.c +++ sys/dev/sound/pcm/feeder_format.c @@ -35,17 +35,18 @@ #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include -#include #include #include +#include +#include + #include "feeder_if.h" #define SND_USE_FXDIV #include "snd_fxdiv_gen.h" #endif -#define FEEDFORMAT_RESERVOIR (SND_CHN_MAX * PCM_32_BPS) +#define FEEDFORMAT_RESERVOIR (SND_CHN_MAX * PCM_32_BPS) INTPCM_DECLARE(intpcm_conv_tables) @@ -75,47 +76,28 @@ _PCM_WRITE_S16_LE(dst, 0); } -#define FEEDFORMAT_ENTRY(SIGN, BIT, ENDIAN) \ - { \ - AFMT_##SIGN##BIT##_##ENDIAN, \ - intpcm_read_##SIGN##BIT##ENDIAN, \ - intpcm_write_##SIGN##BIT##ENDIAN \ +#define FEEDFORMAT_ENTRY(SIGN, BIT, ENDIAN) \ + { \ + AFMT_##SIGN##BIT##_##ENDIAN, intpcm_read_##SIGN##BIT##ENDIAN, \ + intpcm_write_##SIGN##BIT##ENDIAN \ } static const struct { uint32_t format; intpcm_read_t *read; intpcm_write_t *write; -} feed_format_ops[] = { - FEEDFORMAT_ENTRY(S, 8, NE), - FEEDFORMAT_ENTRY(S, 16, LE), - FEEDFORMAT_ENTRY(S, 24, LE), - FEEDFORMAT_ENTRY(S, 32, LE), - FEEDFORMAT_ENTRY(S, 16, BE), - FEEDFORMAT_ENTRY(S, 24, BE), - FEEDFORMAT_ENTRY(S, 32, BE), - FEEDFORMAT_ENTRY(U, 8, NE), - FEEDFORMAT_ENTRY(U, 16, LE), - FEEDFORMAT_ENTRY(U, 24, LE), - FEEDFORMAT_ENTRY(U, 32, LE), - FEEDFORMAT_ENTRY(U, 16, BE), - FEEDFORMAT_ENTRY(U, 24, BE), - FEEDFORMAT_ENTRY(U, 32, BE), - { - AFMT_MU_LAW, - intpcm_read_ulaw, intpcm_write_ulaw - }, - { - AFMT_A_LAW, - intpcm_read_alaw, intpcm_write_alaw - }, - { - AFMT_AC3, - intpcm_read_null, intpcm_write_null - } -}; - -#define FEEDFORMAT_TAB_SIZE \ +} feed_format_ops[] = { FEEDFORMAT_ENTRY(S, 8, NE), FEEDFORMAT_ENTRY(S, 16, LE), + FEEDFORMAT_ENTRY(S, 24, LE), FEEDFORMAT_ENTRY(S, 32, LE), + FEEDFORMAT_ENTRY(S, 16, BE), FEEDFORMAT_ENTRY(S, 24, BE), + FEEDFORMAT_ENTRY(S, 32, BE), FEEDFORMAT_ENTRY(U, 8, NE), + FEEDFORMAT_ENTRY(U, 16, LE), FEEDFORMAT_ENTRY(U, 24, LE), + FEEDFORMAT_ENTRY(U, 32, LE), FEEDFORMAT_ENTRY(U, 16, BE), + FEEDFORMAT_ENTRY(U, 24, BE), FEEDFORMAT_ENTRY(U, 32, BE), + { AFMT_MU_LAW, intpcm_read_ulaw, intpcm_write_ulaw }, + { AFMT_A_LAW, intpcm_read_alaw, intpcm_write_alaw }, + { AFMT_AC3, intpcm_read_null, intpcm_write_null } }; + +#define FEEDFORMAT_TAB_SIZE \ ((int32_t)(sizeof(feed_format_ops) / sizeof(feed_format_ops[0]))) static int @@ -133,8 +115,8 @@ rd_op = NULL; wr_op = NULL; - for (i = 0; i < FEEDFORMAT_TAB_SIZE && - (rd_op == NULL || wr_op == NULL); i++) { + for (i = 0; i < FEEDFORMAT_TAB_SIZE && (rd_op == NULL || wr_op == NULL); + i++) { if (rd_op == NULL && AFMT_ENCODING(f->desc->in) == feed_format_ops[i].format) rd_op = feed_format_ops[i].read; @@ -145,7 +127,7 @@ if (rd_op == NULL || wr_op == NULL) { printf("%s(): failed to initialize io ops " - "in=0x%08x out=0x%08x\n", + "in=0x%08x out=0x%08x\n", __func__, f->desc->in, f->desc->out); return (EINVAL); } @@ -258,17 +240,14 @@ } static struct pcm_feederdesc feeder_format_desc[] = { - { FEEDER_FORMAT, 0, 0, 0, 0 }, - { 0, 0, 0, 0, 0 } + { FEEDER_FORMAT, 0, 0, 0, 0 }, { 0, 0, 0, 0, 0 } }; -static kobj_method_t feeder_format_methods[] = { - KOBJMETHOD(feeder_init, feed_format_init), - KOBJMETHOD(feeder_free, feed_format_free), - KOBJMETHOD(feeder_set, feed_format_set), - KOBJMETHOD(feeder_feed, feed_format_feed), - KOBJMETHOD_END -}; +static kobj_method_t feeder_format_methods[] = { KOBJMETHOD(feeder_init, + feed_format_init), + KOBJMETHOD(feeder_free, feed_format_free), + KOBJMETHOD(feeder_set, feed_format_set), + KOBJMETHOD(feeder_feed, feed_format_feed), KOBJMETHOD_END }; FEEDER_DECLARE(feeder_format, NULL); Index: sys/dev/sound/pcm/feeder_matrix.c =================================================================== --- sys/dev/sound/pcm/feeder_matrix.c +++ sys/dev/sound/pcm/feeder_matrix.c @@ -47,23 +47,24 @@ #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include #include +#include + #include "feeder_if.h" #define SND_USE_FXDIV #include "snd_fxdiv_gen.h" #endif -#define FEEDMATRIX_RESERVOIR (SND_CHN_MAX * PCM_32_BPS) +#define FEEDMATRIX_RESERVOIR (SND_CHN_MAX * PCM_32_BPS) -#define SND_CHN_T_EOF 0x00e0fe0f -#define SND_CHN_T_NULL 0x0e0e0e0e +#define SND_CHN_T_EOF 0x00e0fe0f +#define SND_CHN_T_NULL 0x0e0e0e0e struct feed_matrix_info; -typedef void (*feed_matrix_t)(struct feed_matrix_info *, uint8_t *, - uint8_t *, uint32_t); +typedef void ( + *feed_matrix_t)(struct feed_matrix_info *, uint8_t *, uint8_t *, uint32_t); struct feed_matrix_info { uint32_t bps; @@ -97,8 +98,7 @@ [SND_CHN_MATRIX_7_1] = SND_CHN_MATRIX_MAP_7_1 }; -static int feeder_matrix_default_ids[9] = { - [0] = SND_CHN_MATRIX_UNKNOWN, +static int feeder_matrix_default_ids[9] = { [0] = SND_CHN_MATRIX_UNKNOWN, [1] = SND_CHN_MATRIX_1, [2] = SND_CHN_MATRIX_2, [3] = SND_CHN_MATRIX_3, @@ -106,71 +106,72 @@ [5] = SND_CHN_MATRIX_5, [6] = SND_CHN_MATRIX_6, [7] = SND_CHN_MATRIX_7, - [8] = SND_CHN_MATRIX_8 -}; + [8] = SND_CHN_MATRIX_8 }; #ifdef _KERNEL #define FEEDMATRIX_CLIP_CHECK(...) #else -#define FEEDMATRIX_CLIP_CHECK(v, BIT) do { \ - if ((v) < PCM_S##BIT##_MIN || (v) > PCM_S##BIT##_MAX) \ - errx(1, "\n\n%s(): Sample clipping: %jd\n", \ - __func__, (intmax_t)(v)); \ -} while (0) +#define FEEDMATRIX_CLIP_CHECK(v, BIT) \ + do { \ + if ((v) < PCM_S##BIT##_MIN || (v) > PCM_S##BIT##_MAX) \ + errx(1, "\n\n%s(): Sample clipping: %jd\n", __func__, \ + (intmax_t)(v)); \ + } while (0) #endif -#define FEEDMATRIX_DECLARE(SIGN, BIT, ENDIAN) \ -static void \ -feed_matrix_##SIGN##BIT##ENDIAN(struct feed_matrix_info *info, \ - uint8_t *src, uint8_t *dst, uint32_t count) \ -{ \ - intpcm64_t accum; \ - intpcm_t v; \ - int i, j; \ - \ - do { \ - for (i = 0; info->matrix[i].chn[0] != SND_CHN_T_EOF; \ - i++) { \ - if (info->matrix[i].chn[0] == SND_CHN_T_NULL) { \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, \ - 0); \ - dst += PCM_##BIT##_BPS; \ - continue; \ - } else if (info->matrix[i].chn[1] == \ - SND_CHN_T_EOF) { \ - v = _PCM_READ_##SIGN##BIT##_##ENDIAN( \ - src + info->matrix[i].chn[0]); \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, \ - v); \ - dst += PCM_##BIT##_BPS; \ - continue; \ - } \ - \ - accum = 0; \ - for (j = 0; \ - info->matrix[i].chn[j] != SND_CHN_T_EOF; \ - j++) { \ - v = _PCM_READ_##SIGN##BIT##_##ENDIAN( \ - src + info->matrix[i].chn[j]); \ - accum += v; \ - } \ - \ - accum = (accum * info->matrix[i].mul) >> \ - info->matrix[i].shift; \ - \ - FEEDMATRIX_CLIP_CHECK(accum, BIT); \ - \ - v = (accum > PCM_S##BIT##_MAX) ? \ - PCM_S##BIT##_MAX : \ - ((accum < PCM_S##BIT##_MIN) ? \ - PCM_S##BIT##_MIN : \ - accum); \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, v); \ - dst += PCM_##BIT##_BPS; \ - } \ - src += info->ialign; \ - } while (--count != 0); \ -} +#define FEEDMATRIX_DECLARE(SIGN, BIT, ENDIAN) \ + static void feed_matrix_##SIGN##BIT##ENDIAN( \ + struct feed_matrix_info *info, uint8_t *src, uint8_t *dst, \ + uint32_t count) \ + { \ + intpcm64_t accum; \ + intpcm_t v; \ + int i, j; \ + \ + do { \ + for (i = 0; info->matrix[i].chn[0] != SND_CHN_T_EOF; \ + i++) { \ + if (info->matrix[i].chn[0] == \ + SND_CHN_T_NULL) { \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, \ + 0); \ + dst += PCM_##BIT##_BPS; \ + continue; \ + } else if (info->matrix[i].chn[1] == \ + SND_CHN_T_EOF) { \ + v = _PCM_READ_##SIGN##BIT##_##ENDIAN( \ + src + info->matrix[i].chn[0]); \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, \ + v); \ + dst += PCM_##BIT##_BPS; \ + continue; \ + } \ + \ + accum = 0; \ + for (j = 0; \ + info->matrix[i].chn[j] != SND_CHN_T_EOF; \ + j++) { \ + v = _PCM_READ_##SIGN##BIT##_##ENDIAN( \ + src + info->matrix[i].chn[j]); \ + accum += v; \ + } \ + \ + accum = (accum * info->matrix[i].mul) >> \ + info->matrix[i].shift; \ + \ + FEEDMATRIX_CLIP_CHECK(accum, BIT); \ + \ + v = (accum > PCM_S##BIT##_MAX) ? \ + PCM_S##BIT##_MAX : \ + ((accum < PCM_S##BIT##_MIN) ? \ + PCM_S##BIT##_MIN : \ + accum); \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, v); \ + dst += PCM_##BIT##_BPS; \ + } \ + src += info->ialign; \ + } while (--count != 0); \ + } #if BYTE_ORDER == LITTLE_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) FEEDMATRIX_DECLARE(S, 16, LE) @@ -181,10 +182,10 @@ FEEDMATRIX_DECLARE(S, 32, BE) #endif #ifdef SND_FEEDER_MULTIFORMAT -FEEDMATRIX_DECLARE(S, 8, NE) +FEEDMATRIX_DECLARE(S, 8, NE) FEEDMATRIX_DECLARE(S, 24, LE) FEEDMATRIX_DECLARE(S, 24, BE) -FEEDMATRIX_DECLARE(U, 8, NE) +FEEDMATRIX_DECLARE(U, 8, NE) FEEDMATRIX_DECLARE(U, 16, LE) FEEDMATRIX_DECLARE(U, 24, LE) FEEDMATRIX_DECLARE(U, 32, LE) @@ -193,10 +194,9 @@ FEEDMATRIX_DECLARE(U, 32, BE) #endif -#define FEEDMATRIX_ENTRY(SIGN, BIT, ENDIAN) \ - { \ - AFMT_##SIGN##BIT##_##ENDIAN, \ - feed_matrix_##SIGN##BIT##ENDIAN \ +#define FEEDMATRIX_ENTRY(SIGN, BIT, ENDIAN) \ + { \ + AFMT_##SIGN##BIT##_##ENDIAN, feed_matrix_##SIGN##BIT##ENDIAN \ } static const struct { @@ -204,24 +204,17 @@ feed_matrix_t apply; } feed_matrix_tab[] = { #if BYTE_ORDER == LITTLE_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) - FEEDMATRIX_ENTRY(S, 16, LE), - FEEDMATRIX_ENTRY(S, 32, LE), + FEEDMATRIX_ENTRY(S, 16, LE), FEEDMATRIX_ENTRY(S, 32, LE), #endif #if BYTE_ORDER == BIG_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) - FEEDMATRIX_ENTRY(S, 16, BE), - FEEDMATRIX_ENTRY(S, 32, BE), + FEEDMATRIX_ENTRY(S, 16, BE), FEEDMATRIX_ENTRY(S, 32, BE), #endif #ifdef SND_FEEDER_MULTIFORMAT - FEEDMATRIX_ENTRY(S, 8, NE), - FEEDMATRIX_ENTRY(S, 24, LE), - FEEDMATRIX_ENTRY(S, 24, BE), - FEEDMATRIX_ENTRY(U, 8, NE), - FEEDMATRIX_ENTRY(U, 16, LE), - FEEDMATRIX_ENTRY(U, 24, LE), - FEEDMATRIX_ENTRY(U, 32, LE), - FEEDMATRIX_ENTRY(U, 16, BE), - FEEDMATRIX_ENTRY(U, 24, BE), - FEEDMATRIX_ENTRY(U, 32, BE) + FEEDMATRIX_ENTRY(S, 8, NE), FEEDMATRIX_ENTRY(S, 24, LE), + FEEDMATRIX_ENTRY(S, 24, BE), FEEDMATRIX_ENTRY(U, 8, NE), + FEEDMATRIX_ENTRY(U, 16, LE), FEEDMATRIX_ENTRY(U, 24, LE), + FEEDMATRIX_ENTRY(U, 32, LE), FEEDMATRIX_ENTRY(U, 16, BE), + FEEDMATRIX_ENTRY(U, 24, BE), FEEDMATRIX_ENTRY(U, 32, BE) #endif }; @@ -231,34 +224,32 @@ uint32_t i, j; for (i = 0; i < (sizeof(info->matrix) / sizeof(info->matrix[0])); i++) { - for (j = 0; - j < (sizeof(info->matrix[i].chn) / - sizeof(info->matrix[i].chn[0])); j++) { + for (j = 0; j < (sizeof(info->matrix[i].chn) / + sizeof(info->matrix[i].chn[0])); + j++) { info->matrix[i].chn[j] = SND_CHN_T_EOF; } - info->matrix[i].mul = 1; + info->matrix[i].mul = 1; info->matrix[i].shift = 0; } } #ifdef FEEDMATRIX_GENERIC static void -feed_matrix_apply_generic(struct feed_matrix_info *info, - uint8_t *src, uint8_t *dst, uint32_t count) +feed_matrix_apply_generic(struct feed_matrix_info *info, uint8_t *src, + uint8_t *dst, uint32_t count) { intpcm64_t accum; intpcm_t v; int i, j; do { - for (i = 0; info->matrix[i].chn[0] != SND_CHN_T_EOF; - i++) { + for (i = 0; info->matrix[i].chn[0] != SND_CHN_T_EOF; i++) { if (info->matrix[i].chn[0] == SND_CHN_T_NULL) { info->wr(dst, 0); dst += info->bps; continue; - } else if (info->matrix[i].chn[1] == - SND_CHN_T_EOF) { + } else if (info->matrix[i].chn[1] == SND_CHN_T_EOF) { v = info->rd(src + info->matrix[i].chn[0]); info->wr(dst, v); dst += info->bps; @@ -266,9 +257,8 @@ } accum = 0; - for (j = 0; - info->matrix[i].chn[j] != SND_CHN_T_EOF; - j++) { + for (j = 0; info->matrix[i].chn[j] != SND_CHN_T_EOF; + j++) { v = info->rd(src + info->matrix[i].chn[j]); accum += v; } @@ -278,7 +268,8 @@ FEEDMATRIX_CLIP_CHECK(accum, 32); - v = (accum > PCM_S32_MAX) ? PCM_S32_MAX : + v = (accum > PCM_S32_MAX) ? + PCM_S32_MAX : ((accum < PCM_S32_MIN) ? PCM_S32_MIN : accum); info->wr(dst, v); dst += info->bps; @@ -308,8 +299,8 @@ * If both in and out are part of standard matrix and identical, skip * everything altogether. */ - if (m_in->id == m_out->id && !(m_in->id < SND_CHN_MATRIX_BEGIN || - m_in->id > SND_CHN_MATRIX_END)) + if (m_in->id == m_out->id && + !(m_in->id < SND_CHN_MATRIX_BEGIN || m_in->id > SND_CHN_MATRIX_END)) return (0); /* @@ -328,8 +319,9 @@ in_mask = m_in->mask; /* Merge, reduce, expand all possibilites. */ - for (ch = SND_CHN_T_BEGIN; ch <= SND_CHN_T_END && - m_out->map[ch].type != SND_CHN_T_MAX; ch += SND_CHN_T_STEP) { + for (ch = SND_CHN_T_BEGIN; + ch <= SND_CHN_T_END && m_out->map[ch].type != SND_CHN_T_MAX; + ch += SND_CHN_T_STEP) { merge_mask = m_out->map[ch].members & in_mask; if (merge_mask == 0) { info->matrix[ch].chn[0] = SND_CHN_T_NULL; @@ -338,7 +330,7 @@ j = 0; for (i = SND_CHN_T_BEGIN; i <= SND_CHN_T_END; - i += SND_CHN_T_STEP) { + i += SND_CHN_T_STEP) { if (merge_mask & (1 << i)) { if (m_in->offset[i] >= 0 && m_in->offset[i] < (int)m_in->channels) @@ -352,7 +344,7 @@ } } -#define FEEDMATRIX_ATTN_SHIFT 16 +#define FEEDMATRIX_ATTN_SHIFT 16 if (j > 1) { /* @@ -360,13 +352,13 @@ * multiple channels, apply a slight attenuation to * avoid clipping. */ - mul = (1 << (FEEDMATRIX_ATTN_SHIFT - 1)) + 143 - j; + mul = (1 << (FEEDMATRIX_ATTN_SHIFT - 1)) + 143 - j; shift = FEEDMATRIX_ATTN_SHIFT; while ((mul & 1) == 0 && shift > 0) { mul >>= 1; shift--; } - info->matrix[ch].mul = mul; + info->matrix[ch].mul = mul; info->matrix[ch].shift = shift; } } @@ -381,10 +373,11 @@ fprintf(stderr, ", "); fprintf(stderr, "%d", (info->matrix[i].chn[j] == SND_CHN_T_NULL) ? - 0xffffffff : info->matrix[i].chn[j] / info->bps); + 0xffffffff : + info->matrix[i].chn[j] / info->bps); } - fprintf(stderr, "] attn: (x * %d) >> %d\n", - info->matrix[i].mul, info->matrix[i].shift); + fprintf(stderr, "] attn: (x * %d) >> %d\n", info->matrix[i].mul, + info->matrix[i].shift); } #endif @@ -414,7 +407,8 @@ info->apply = NULL; for (i = 0; info->apply == NULL && - i < (sizeof(feed_matrix_tab) / sizeof(feed_matrix_tab[0])); i++) { + i < (sizeof(feed_matrix_tab) / sizeof(feed_matrix_tab[0])); + i++) { if (AFMT_ENCODING(info->in) == feed_matrix_tab[i].format) info->apply = feed_matrix_tab[i].apply; } @@ -434,7 +428,7 @@ #endif } - m_in = feeder_matrix_format_map(info->in); + m_in = feeder_matrix_format_map(info->in); m_out = feeder_matrix_format_map(info->out); ret = feed_matrix_setup(info, m_in, m_out); @@ -522,16 +516,13 @@ } static struct pcm_feederdesc feeder_matrix_desc[] = { - { FEEDER_MATRIX, 0, 0, 0, 0 }, - { 0, 0, 0, 0, 0 } + { FEEDER_MATRIX, 0, 0, 0, 0 }, { 0, 0, 0, 0, 0 } }; -static kobj_method_t feeder_matrix_methods[] = { - KOBJMETHOD(feeder_init, feed_matrix_init), - KOBJMETHOD(feeder_free, feed_matrix_free), - KOBJMETHOD(feeder_feed, feed_matrix_feed), - KOBJMETHOD_END -}; +static kobj_method_t feeder_matrix_methods[] = { KOBJMETHOD(feeder_init, + feed_matrix_init), + KOBJMETHOD(feeder_free, feed_matrix_free), + KOBJMETHOD(feeder_feed, feed_matrix_feed), KOBJMETHOD_END }; FEEDER_DECLARE(feeder_matrix, NULL); @@ -598,7 +589,7 @@ for (i = SND_CHN_MATRIX_BEGIN; i <= SND_CHN_MATRIX_END; i++) { if (feeder_matrix_maps[i].channels == ch && feeder_matrix_maps[i].ext == ext) - return (SND_FORMAT(format, ch, ext)); + return (SND_FORMAT(format, ch, ext)); } } @@ -701,37 +692,32 @@ * conflicting with "rear"/"back". Map it to "side". Well.. * who cares? */ -static int snd_chn_to_oss[SND_CHN_T_MAX] = { - [SND_CHN_T_FL] = CHID_L, +static int snd_chn_to_oss[SND_CHN_T_MAX] = { [SND_CHN_T_FL] = CHID_L, [SND_CHN_T_FR] = CHID_R, [SND_CHN_T_FC] = CHID_C, [SND_CHN_T_LF] = CHID_LFE, [SND_CHN_T_SL] = CHID_LS, [SND_CHN_T_SR] = CHID_RS, [SND_CHN_T_BL] = CHID_LR, - [SND_CHN_T_BR] = CHID_RR -}; + [SND_CHN_T_BR] = CHID_RR }; -#define SND_CHN_OSS_VALIDMASK \ - (SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \ - SND_CHN_T_MASK_FC | SND_CHN_T_MASK_LF | \ - SND_CHN_T_MASK_SL | SND_CHN_T_MASK_SR | \ - SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR) +#define SND_CHN_OSS_VALIDMASK \ + (SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | SND_CHN_T_MASK_FC | \ + SND_CHN_T_MASK_LF | SND_CHN_T_MASK_SL | SND_CHN_T_MASK_SR | \ + SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR) -#define SND_CHN_OSS_MAX 8 -#define SND_CHN_OSS_BEGIN CHID_L -#define SND_CHN_OSS_END CHID_RR +#define SND_CHN_OSS_MAX 8 +#define SND_CHN_OSS_BEGIN CHID_L +#define SND_CHN_OSS_END CHID_RR -static int oss_to_snd_chn[SND_CHN_OSS_END + 1] = { - [CHID_L] = SND_CHN_T_FL, - [CHID_R] = SND_CHN_T_FR, - [CHID_C] = SND_CHN_T_FC, +static int oss_to_snd_chn[SND_CHN_OSS_END + 1] = { [CHID_L] = SND_CHN_T_FL, + [CHID_R] = SND_CHN_T_FR, + [CHID_C] = SND_CHN_T_FC, [CHID_LFE] = SND_CHN_T_LF, - [CHID_LS] = SND_CHN_T_SL, - [CHID_RS] = SND_CHN_T_SR, - [CHID_LR] = SND_CHN_T_BL, - [CHID_RR] = SND_CHN_T_BR -}; + [CHID_LS] = SND_CHN_T_SL, + [CHID_RS] = SND_CHN_T_SR, + [CHID_LR] = SND_CHN_T_BL, + [CHID_RR] = SND_CHN_T_BR }; /* * Used by SNDCTL_DSP_GET_CHNORDER. @@ -750,12 +736,11 @@ tmpmap = 0x0000000000000000ULL; for (i = 0; i < SND_CHN_OSS_MAX && m->map[i].type != SND_CHN_T_MAX; - i++) { + i++) { if ((1 << m->map[i].type) & ~SND_CHN_OSS_VALIDMASK) return (EINVAL); - tmpmap |= - (unsigned long long)snd_chn_to_oss[m->map[i].type] << - (i * 4); + tmpmap |= (unsigned long long)snd_chn_to_oss[m->map[i].type] + << (i * 4); } *map = tmpmap; @@ -816,8 +801,7 @@ } if (tmp.channels != m->channels || tmp.ext != m->ext || - tmp.mask != m->mask || - tmp.map[m->channels].type != SND_CHN_T_MAX) + tmp.mask != m->mask || tmp.map[m->channels].type != SND_CHN_T_MAX) return (EINVAL); *m = tmp; Index: sys/dev/sound/pcm/feeder_mixer.c =================================================================== --- sys/dev/sound/pcm/feeder_mixer.c +++ sys/dev/sound/pcm/feeder_mixer.c @@ -30,9 +30,10 @@ #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include #include +#include #include + #include "feeder_if.h" #define SND_USE_FXDIV @@ -40,32 +41,31 @@ #endif #undef SND_FEEDER_MULTIFORMAT -#define SND_FEEDER_MULTIFORMAT 1 +#define SND_FEEDER_MULTIFORMAT 1 typedef void (*feed_mixer_t)(uint8_t *, uint8_t *, uint32_t); -#define FEEDMIXER_DECLARE(SIGN, BIT, ENDIAN) \ -static void \ -feed_mixer_##SIGN##BIT##ENDIAN(uint8_t *src, uint8_t *dst, \ - uint32_t count) \ -{ \ - intpcm##BIT##_t z; \ - intpcm_t x, y; \ - \ - src += count; \ - dst += count; \ - \ - do { \ - src -= PCM_##BIT##_BPS; \ - dst -= PCM_##BIT##_BPS; \ - count -= PCM_##BIT##_BPS; \ - x = PCM_READ_##SIGN##BIT##_##ENDIAN(src); \ - y = PCM_READ_##SIGN##BIT##_##ENDIAN(dst); \ - z = INTPCM##BIT##_T(x) + y; \ - x = PCM_CLAMP_##SIGN##BIT(z); \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, x); \ - } while (count != 0); \ -} +#define FEEDMIXER_DECLARE(SIGN, BIT, ENDIAN) \ + static void feed_mixer_##SIGN##BIT##ENDIAN(uint8_t *src, uint8_t *dst, \ + uint32_t count) \ + { \ + intpcm##BIT##_t z; \ + intpcm_t x, y; \ + \ + src += count; \ + dst += count; \ + \ + do { \ + src -= PCM_##BIT##_BPS; \ + dst -= PCM_##BIT##_BPS; \ + count -= PCM_##BIT##_BPS; \ + x = PCM_READ_##SIGN##BIT##_##ENDIAN(src); \ + y = PCM_READ_##SIGN##BIT##_##ENDIAN(dst); \ + z = INTPCM##BIT##_T(x) + y; \ + x = PCM_CLAMP_##SIGN##BIT(z); \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, x); \ + } while (count != 0); \ + } #if BYTE_ORDER == LITTLE_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) FEEDMIXER_DECLARE(S, 16, LE) @@ -76,10 +76,10 @@ FEEDMIXER_DECLARE(S, 32, BE) #endif #ifdef SND_FEEDER_MULTIFORMAT -FEEDMIXER_DECLARE(S, 8, NE) +FEEDMIXER_DECLARE(S, 8, NE) FEEDMIXER_DECLARE(S, 24, LE) FEEDMIXER_DECLARE(S, 24, BE) -FEEDMIXER_DECLARE(U, 8, NE) +FEEDMIXER_DECLARE(U, 8, NE) FEEDMIXER_DECLARE(U, 16, LE) FEEDMIXER_DECLARE(U, 24, LE) FEEDMIXER_DECLARE(U, 32, LE) @@ -94,47 +94,40 @@ feed_mixer_t mix; }; -#define FEEDMIXER_ENTRY(SIGN, BIT, ENDIAN) \ - { \ - AFMT_##SIGN##BIT##_##ENDIAN, PCM_##BIT##_BPS, \ - feed_mixer_##SIGN##BIT##ENDIAN \ +#define FEEDMIXER_ENTRY(SIGN, BIT, ENDIAN) \ + { \ + AFMT_##SIGN##BIT##_##ENDIAN, PCM_##BIT##_BPS, \ + feed_mixer_##SIGN##BIT##ENDIAN \ } static struct feed_mixer_info feed_mixer_info_tab[] = { - FEEDMIXER_ENTRY(S, 8, NE), + FEEDMIXER_ENTRY(S, 8, NE), #if BYTE_ORDER == LITTLE_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) - FEEDMIXER_ENTRY(S, 16, LE), - FEEDMIXER_ENTRY(S, 32, LE), + FEEDMIXER_ENTRY(S, 16, LE), FEEDMIXER_ENTRY(S, 32, LE), #endif #if BYTE_ORDER == BIG_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) - FEEDMIXER_ENTRY(S, 16, BE), - FEEDMIXER_ENTRY(S, 32, BE), + FEEDMIXER_ENTRY(S, 16, BE), FEEDMIXER_ENTRY(S, 32, BE), #endif #ifdef SND_FEEDER_MULTIFORMAT - FEEDMIXER_ENTRY(S, 24, LE), - FEEDMIXER_ENTRY(S, 24, BE), - FEEDMIXER_ENTRY(U, 8, NE), - FEEDMIXER_ENTRY(U, 16, LE), - FEEDMIXER_ENTRY(U, 24, LE), - FEEDMIXER_ENTRY(U, 32, LE), - FEEDMIXER_ENTRY(U, 16, BE), - FEEDMIXER_ENTRY(U, 24, BE), + FEEDMIXER_ENTRY(S, 24, LE), FEEDMIXER_ENTRY(S, 24, BE), + FEEDMIXER_ENTRY(U, 8, NE), FEEDMIXER_ENTRY(U, 16, LE), + FEEDMIXER_ENTRY(U, 24, LE), FEEDMIXER_ENTRY(U, 32, LE), + FEEDMIXER_ENTRY(U, 16, BE), FEEDMIXER_ENTRY(U, 24, BE), FEEDMIXER_ENTRY(U, 32, BE), #endif - { AFMT_AC3, PCM_16_BPS, NULL }, - { AFMT_MU_LAW, PCM_8_BPS, feed_mixer_U8NE }, /* dummy */ - { AFMT_A_LAW, PCM_8_BPS, feed_mixer_U8NE } /* dummy */ + { AFMT_AC3, PCM_16_BPS, NULL }, + { AFMT_MU_LAW, PCM_8_BPS, feed_mixer_U8NE }, /* dummy */ + { AFMT_A_LAW, PCM_8_BPS, feed_mixer_U8NE } /* dummy */ }; -#define FEEDMIXER_TAB_SIZE ((int32_t) \ - (sizeof(feed_mixer_info_tab) / \ - sizeof(feed_mixer_info_tab[0]))) +#define FEEDMIXER_TAB_SIZE \ + ((int32_t)(sizeof(feed_mixer_info_tab) / \ + sizeof(feed_mixer_info_tab[0]))) -#define FEEDMIXER_DATA(i, c) ((void *) \ - ((uintptr_t)((((i) & 0x1f) << 7) | \ - ((c) & 0x7f)))) -#define FEEDMIXER_INFOIDX(d) ((uint32_t)((uintptr_t)(d) >> 7) & 0x1f) -#define FEEDMIXER_CHANNELS(d) ((uint32_t)((uintptr_t)(d)) & 0x7f) +#define FEEDMIXER_DATA(i, c) \ + ((void *)((uintptr_t)((((i) & 0x1f) << 7) | ((c) & 0x7f)))) +#define FEEDMIXER_INFOIDX(d) ((uint32_t)((uintptr_t)(d) >> 7) & 0x1f) +#define FEEDMIXER_CHANNELS(d) ((uint32_t)((uintptr_t)(d)) & 0x7f) static int feed_mixer_init(struct pcm_feeder *f) @@ -147,8 +140,7 @@ for (i = 0; i < FEEDMIXER_TAB_SIZE; i++) { if (AFMT_ENCODING(f->desc->in) == feed_mixer_info_tab[i].format) { - f->data = - FEEDMIXER_DATA(i, AFMT_CHANNEL(f->desc->in)); + f->data = FEEDMIXER_DATA(i, AFMT_CHANNEL(f->desc->in)); return (0); } } @@ -215,7 +207,8 @@ */ rdy = b->rl; - CHN_FOREACH(ch, c, children.busy) { + CHN_FOREACH(ch, c, children.busy) + { CHN_LOCK(ch); if (CHN_STOPPED(ch) || (ch->flags & CHN_F_DIRTY)) { CHN_UNLOCK(ch); @@ -309,9 +302,10 @@ tmp = sndbuf_getbuf(src); rcnt = 0; mcnt = 0; - passthrough = 0; /* 'passthrough' / 'exclusive' marker */ + passthrough = 0; /* 'passthrough' / 'exclusive' marker */ - CHN_FOREACH(ch, c, children.busy) { + CHN_FOREACH(ch, c, children.busy) + { CHN_LOCK(ch); if (CHN_STOPPED(ch) || (ch->flags & CHN_F_DIRTY)) { CHN_UNLOCK(ch); @@ -337,7 +331,8 @@ if (passthrough == 0 && (ch->format & AFMT_PASSTHROUGH)) { rcnt = SND_FXROUND(FEEDER_FEED(ch->feeder, ch, - b, count, ch->bufsoft), sz); + b, count, ch->bufsoft), + sz); passthrough = 1; } else FEEDER_FEED(ch->feeder, ch, tmp, count, @@ -350,7 +345,8 @@ */ if (passthrough == 0 && (ch->flags & CHN_F_EXCLUSIVE)) { rcnt = SND_FXROUND(FEEDER_FEED(ch->feeder, ch, - b, count, ch->bufsoft), sz); + b, count, ch->bufsoft), + sz); passthrough = 1; } else FEEDER_FEED(ch->feeder, ch, tmp, count, @@ -358,16 +354,19 @@ } else { if (rcnt == 0) { rcnt = SND_FXROUND(FEEDER_FEED(ch->feeder, ch, - b, count, ch->bufsoft), sz); + b, count, ch->bufsoft), + sz); mcnt = count - rcnt; } else { cnt = SND_FXROUND(FEEDER_FEED(ch->feeder, ch, - tmp, count, ch->bufsoft), sz); + tmp, count, ch->bufsoft), + sz); if (cnt != 0) { if (mcnt != 0) { memset(b + rcnt, sndbuf_zerodata( - f->desc->out), mcnt); + f->desc->out), + mcnt); mcnt = 0; } info->mix(tmp, b, cnt); @@ -388,15 +387,12 @@ } static struct pcm_feederdesc feeder_mixer_desc[] = { - { FEEDER_MIXER, 0, 0, 0, 0 }, - { 0, 0, 0, 0, 0 } + { FEEDER_MIXER, 0, 0, 0, 0 }, { 0, 0, 0, 0, 0 } }; -static kobj_method_t feeder_mixer_methods[] = { - KOBJMETHOD(feeder_init, feed_mixer_init), - KOBJMETHOD(feeder_set, feed_mixer_set), - KOBJMETHOD(feeder_feed, feed_mixer_feed), - KOBJMETHOD_END -}; +static kobj_method_t feeder_mixer_methods[] = { KOBJMETHOD(feeder_init, + feed_mixer_init), + KOBJMETHOD(feeder_set, feed_mixer_set), + KOBJMETHOD(feeder_feed, feed_mixer_feed), KOBJMETHOD_END }; FEEDER_DECLARE(feeder_mixer, NULL); Index: sys/dev/sound/pcm/feeder_rate.c =================================================================== --- sys/dev/sound/pcm/feeder_rate.c +++ sys/dev/sound/pcm/feeder_rate.c @@ -54,8 +54,9 @@ #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include #include +#include + #include "feeder_if.h" #define SND_USE_FXDIV @@ -66,87 +67,87 @@ #if !defined(_KERNEL) && defined(SND_DIAGNOSTIC) #undef Z_DIAGNOSTIC -#define Z_DIAGNOSTIC 1 +#define Z_DIAGNOSTIC 1 #elif defined(_KERNEL) #undef Z_DIAGNOSTIC #endif #ifndef Z_QUALITY_DEFAULT -#define Z_QUALITY_DEFAULT Z_QUALITY_LINEAR +#define Z_QUALITY_DEFAULT Z_QUALITY_LINEAR #endif -#define Z_RESERVOIR 2048 -#define Z_RESERVOIR_MAX 131072 +#define Z_RESERVOIR 2048 +#define Z_RESERVOIR_MAX 131072 -#define Z_SINC_MAX 0x3fffff -#define Z_SINC_DOWNMAX 48 /* 384000 / 8000 */ +#define Z_SINC_MAX 0x3fffff +#define Z_SINC_DOWNMAX 48 /* 384000 / 8000 */ #ifdef _KERNEL -#define Z_POLYPHASE_MAX 183040 /* 286 taps, 640 phases */ +#define Z_POLYPHASE_MAX 183040 /* 286 taps, 640 phases */ #else -#define Z_POLYPHASE_MAX 1464320 /* 286 taps, 5120 phases */ +#define Z_POLYPHASE_MAX 1464320 /* 286 taps, 5120 phases */ #endif -#define Z_RATE_DEFAULT 48000 +#define Z_RATE_DEFAULT 48000 -#define Z_RATE_MIN FEEDRATE_RATEMIN -#define Z_RATE_MAX FEEDRATE_RATEMAX -#define Z_ROUNDHZ FEEDRATE_ROUNDHZ -#define Z_ROUNDHZ_MIN FEEDRATE_ROUNDHZ_MIN -#define Z_ROUNDHZ_MAX FEEDRATE_ROUNDHZ_MAX +#define Z_RATE_MIN FEEDRATE_RATEMIN +#define Z_RATE_MAX FEEDRATE_RATEMAX +#define Z_ROUNDHZ FEEDRATE_ROUNDHZ +#define Z_ROUNDHZ_MIN FEEDRATE_ROUNDHZ_MIN +#define Z_ROUNDHZ_MAX FEEDRATE_ROUNDHZ_MAX -#define Z_RATE_SRC FEEDRATE_SRC -#define Z_RATE_DST FEEDRATE_DST -#define Z_RATE_QUALITY FEEDRATE_QUALITY -#define Z_RATE_CHANNELS FEEDRATE_CHANNELS +#define Z_RATE_SRC FEEDRATE_SRC +#define Z_RATE_DST FEEDRATE_DST +#define Z_RATE_QUALITY FEEDRATE_QUALITY +#define Z_RATE_CHANNELS FEEDRATE_CHANNELS -#define Z_PARANOID 1 +#define Z_PARANOID 1 -#define Z_MULTIFORMAT 1 +#define Z_MULTIFORMAT 1 #ifdef _KERNEL #undef Z_USE_ALPHADRIFT -#define Z_USE_ALPHADRIFT 1 +#define Z_USE_ALPHADRIFT 1 #endif -#define Z_FACTOR_MIN 1 -#define Z_FACTOR_MAX Z_MASK -#define Z_FACTOR_SAFE(v) (!((v) < Z_FACTOR_MIN || (v) > Z_FACTOR_MAX)) +#define Z_FACTOR_MIN 1 +#define Z_FACTOR_MAX Z_MASK +#define Z_FACTOR_SAFE(v) (!((v) < Z_FACTOR_MIN || (v) > Z_FACTOR_MAX)) struct z_info; typedef void (*z_resampler_t)(struct z_info *, uint8_t *); struct z_info { - int32_t rsrc, rdst; /* original source / destination rates */ - int32_t src, dst; /* rounded source / destination rates */ - int32_t channels; /* total channels */ - int32_t bps; /* bytes-per-sample */ - int32_t quality; /* resampling quality */ - - int32_t z_gx, z_gy; /* interpolation / decimation ratio */ - int32_t z_alpha; /* output sample time phase / drift */ - uint8_t *z_delay; /* FIR delay line / linear buffer */ - int32_t *z_coeff; /* FIR coefficients */ - int32_t *z_dcoeff; /* FIR coefficients differences */ - int32_t *z_pcoeff; /* FIR polyphase coefficients */ - int32_t z_scale; /* output scaling */ - int32_t z_dx; /* input sample drift increment */ - int32_t z_dy; /* output sample drift increment */ + int32_t rsrc, rdst; /* original source / destination rates */ + int32_t src, dst; /* rounded source / destination rates */ + int32_t channels; /* total channels */ + int32_t bps; /* bytes-per-sample */ + int32_t quality; /* resampling quality */ + + int32_t z_gx, z_gy; /* interpolation / decimation ratio */ + int32_t z_alpha; /* output sample time phase / drift */ + uint8_t *z_delay; /* FIR delay line / linear buffer */ + int32_t *z_coeff; /* FIR coefficients */ + int32_t *z_dcoeff; /* FIR coefficients differences */ + int32_t *z_pcoeff; /* FIR polyphase coefficients */ + int32_t z_scale; /* output scaling */ + int32_t z_dx; /* input sample drift increment */ + int32_t z_dy; /* output sample drift increment */ #ifdef Z_USE_ALPHADRIFT - int32_t z_alphadrift; /* alpha drift rate */ - int32_t z_startdrift; /* buffer start position drift rate */ + int32_t z_alphadrift; /* alpha drift rate */ + int32_t z_startdrift; /* buffer start position drift rate */ #endif - int32_t z_mask; /* delay line full length mask */ - int32_t z_size; /* half width of FIR taps */ - int32_t z_full; /* full size of delay line */ - int32_t z_alloc; /* largest allocated full size of delay line */ - int32_t z_start; /* buffer processing start position */ - int32_t z_pos; /* current position for the next feed */ + int32_t z_mask; /* delay line full length mask */ + int32_t z_size; /* half width of FIR taps */ + int32_t z_full; /* full size of delay line */ + int32_t z_alloc; /* largest allocated full size of delay line */ + int32_t z_start; /* buffer processing start position */ + int32_t z_pos; /* current position for the next feed */ #ifdef Z_DIAGNOSTIC - uint32_t z_cycle; /* output cycle, purely for statistical */ + uint32_t z_cycle; /* output cycle, purely for statistical */ #endif - int32_t z_maxfeed; /* maximum feed to avoid 32bit overflow */ + int32_t z_maxfeed; /* maximum feed to avoid 32bit overflow */ z_resampler_t z_resample; }; @@ -185,8 +186,7 @@ } SYSCTL_PROC(_hw_snd, OID_AUTO, feeder_rate_min, CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, 0, sizeof(int), - sysctl_hw_snd_feeder_rate_min, "I", - "minimum allowable rate"); + sysctl_hw_snd_feeder_rate_min, "I", "minimum allowable rate"); static int sysctl_hw_snd_feeder_rate_max(SYSCTL_HANDLER_ARGS) @@ -208,8 +208,7 @@ } SYSCTL_PROC(_hw_snd, OID_AUTO, feeder_rate_max, CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, 0, sizeof(int), - sysctl_hw_snd_feeder_rate_max, "I", - "maximum allowable rate"); + sysctl_hw_snd_feeder_rate_max, "I", "maximum allowable rate"); static int sysctl_hw_snd_feeder_rate_round(SYSCTL_HANDLER_ARGS) @@ -258,15 +257,17 @@ * set resampler quality if and only if it is exist as * part of feeder chains and the channel is idle. */ - for (i = 0; pcm_devclass != NULL && - i < devclass_get_maxunit(pcm_devclass); i++) { + for (i = 0; + pcm_devclass != NULL && i < devclass_get_maxunit(pcm_devclass); + i++) { d = devclass_get_softc(pcm_devclass, i); if (!PCM_REGISTERED(d)) continue; PCM_LOCK(d); PCM_WAIT(d); PCM_ACQUIRE(d); - CHN_FOREACH(c, d, channels.pcm) { + CHN_FOREACH(c, d, channels.pcm) + { CHN_LOCK(c); f = chn_findfeeder(c, FEEDER_RATE); if (f == NULL || f->data == NULL || CHN_STARTED(c)) { @@ -285,16 +286,16 @@ SYSCTL_PROC(_hw_snd, OID_AUTO, feeder_rate_quality, CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_NEEDGIANT, 0, sizeof(int), sysctl_hw_snd_feeder_rate_quality, "I", - "sample rate converter quality ("__XSTRING(Z_QUALITY_MIN)"=low .. " - __XSTRING(Z_QUALITY_MAX)"=high)"); -#endif /* _KERNEL */ + "sample rate converter quality ("__XSTRING( + Z_QUALITY_MIN) "=low .. " __XSTRING(Z_QUALITY_MAX) "=high)"); +#endif /* _KERNEL */ /* * Resampler type. */ -#define Z_IS_ZOH(i) ((i)->quality == Z_QUALITY_ZOH) -#define Z_IS_LINEAR(i) ((i)->quality == Z_QUALITY_LINEAR) -#define Z_IS_SINC(i) ((i)->quality > Z_QUALITY_LINEAR) +#define Z_IS_ZOH(i) ((i)->quality == Z_QUALITY_ZOH) +#define Z_IS_LINEAR(i) ((i)->quality == Z_QUALITY_LINEAR) +#define Z_IS_SINC(i) ((i)->quality > Z_QUALITY_LINEAR) /* * Macroses for accurate sample time drift calculations. @@ -306,7 +307,7 @@ * drift : given the amount of input and output, return the elapsed * sample-time. */ -#define _Z_GCAST(x) ((uint64_t)(x)) +#define _Z_GCAST(x) ((uint64_t)(x)) #if defined(__i386__) /* @@ -333,39 +334,38 @@ quo = lo / d; else __asm("divl %2" - : "=a" (quo), "=d" (rem) - : "r" (d), "0" (lo), "1" (hi)); + : "=a"(quo), "=d"(rem) + : "r"(d), "0"(lo), "1"(hi)); return (quo); } #else -#define Z_DIV(x, y) ((x) / (y)) +#define Z_DIV(x, y) ((x) / (y)) #endif -#define _Z_GY2GX(i, a, v) \ - Z_DIV(((_Z_GCAST((i)->z_gx) * (v)) + ((i)->z_gy - (a) - 1)), \ - (i)->z_gy) +#define _Z_GY2GX(i, a, v) \ + Z_DIV(((_Z_GCAST((i)->z_gx) * (v)) + ((i)->z_gy - (a)-1)), (i)->z_gy) -#define _Z_GX2GY(i, a, v) \ - Z_DIV(((_Z_GCAST((i)->z_gy) * (v)) + (a)), (i)->z_gx) +#define _Z_GX2GY(i, a, v) Z_DIV(((_Z_GCAST((i)->z_gy) * (v)) + (a)), (i)->z_gx) -#define _Z_DRIFT(i, x, y) \ +#define _Z_DRIFT(i, x, y) \ ((_Z_GCAST((i)->z_gy) * (x)) - (_Z_GCAST((i)->z_gx) * (y))) -#define z_gy2gx(i, v) _Z_GY2GX(i, (i)->z_alpha, v) -#define z_gx2gy(i, v) _Z_GX2GY(i, (i)->z_alpha, v) -#define z_drift(i, x, y) _Z_DRIFT(i, x, y) +#define z_gy2gx(i, v) _Z_GY2GX(i, (i)->z_alpha, v) +#define z_gx2gy(i, v) _Z_GX2GY(i, (i)->z_alpha, v) +#define z_drift(i, x, y) _Z_DRIFT(i, x, y) /* * Macroses for SINC coefficients table manipulations.. whatever. */ -#define Z_SINC_COEFF_IDX(i) ((i)->quality - Z_QUALITY_LINEAR - 1) +#define Z_SINC_COEFF_IDX(i) ((i)->quality - Z_QUALITY_LINEAR - 1) -#define Z_SINC_LEN(i) \ - ((int32_t)(((uint64_t)z_coeff_tab[Z_SINC_COEFF_IDX(i)].len << \ - Z_SHIFT) / (i)->z_dy)) +#define Z_SINC_LEN(i) \ + ((int32_t)(((uint64_t)z_coeff_tab[Z_SINC_COEFF_IDX(i)].len \ + << Z_SHIFT) / \ + (i)->z_dy)) -#define Z_SINC_BASE_LEN(i) \ +#define Z_SINC_BASE_LEN(i) \ ((z_coeff_tab[Z_SINC_COEFF_IDX(i)].len - 1) >> (Z_DRIFT_SHIFT - 1)) /* @@ -375,17 +375,17 @@ * the linear block operations does not need guarding at all due to * accurate drifting! */ -#define z_align(i, v) ((v) & (i)->z_mask) -#define z_next(i, o, v) z_align(i, (o) + (v)) -#define z_prev(i, o, v) z_align(i, (o) - (v)) -#define z_fetched(i) (z_align(i, (i)->z_pos - (i)->z_start) - 1) -#define z_free(i) ((i)->z_full - (i)->z_pos) +#define z_align(i, v) ((v) & (i)->z_mask) +#define z_next(i, o, v) z_align(i, (o) + (v)) +#define z_prev(i, o, v) z_align(i, (o) - (v)) +#define z_fetched(i) (z_align(i, (i)->z_pos - (i)->z_start) - 1) +#define z_free(i) ((i)->z_full - (i)->z_pos) /* * Macroses for Bla Bla .. :) */ -#define z_copy(src, dst, sz) (void)memcpy(dst, src, sz) -#define z_feed(...) FEEDER_FEED(__VA_ARGS__) +#define z_copy(src, dst, sz) (void)memcpy(dst, src, sz) +#define z_feed(...) FEEDER_FEED(__VA_ARGS__) static __inline uint32_t z_min(uint32_t x, uint32_t y) @@ -459,33 +459,34 @@ * Z_LINEAR_ONE between the present and previous sample and everything is * done with simple 32bit scaling arithmetic. */ -#define Z_DECLARE_LINEAR(SIGN, BIT, ENDIAN) \ -static void \ -z_feed_linear_##SIGN##BIT##ENDIAN(struct z_info *info, uint8_t *dst) \ -{ \ - int32_t z; \ - intpcm_t x, y; \ - uint32_t ch; \ - uint8_t *sx, *sy; \ - \ - z = ((uint32_t)info->z_alpha * info->z_dx) >> Z_LINEAR_UNSHIFT; \ - \ - sx = info->z_delay + (info->z_start * info->channels * \ - PCM_##BIT##_BPS); \ - sy = sx - (info->channels * PCM_##BIT##_BPS); \ - \ - ch = info->channels; \ - \ - do { \ - x = _PCM_READ_##SIGN##BIT##_##ENDIAN(sx); \ - y = _PCM_READ_##SIGN##BIT##_##ENDIAN(sy); \ - x = Z_LINEAR_INTERPOLATE_##BIT(z, x, y); \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, x); \ - sx += PCM_##BIT##_BPS; \ - sy += PCM_##BIT##_BPS; \ - dst += PCM_##BIT##_BPS; \ - } while (--ch != 0); \ -} +#define Z_DECLARE_LINEAR(SIGN, BIT, ENDIAN) \ + static void z_feed_linear_##SIGN##BIT##ENDIAN(struct z_info *info, \ + uint8_t *dst) \ + { \ + int32_t z; \ + intpcm_t x, y; \ + uint32_t ch; \ + uint8_t *sx, *sy; \ + \ + z = ((uint32_t)info->z_alpha * info->z_dx) >> \ + Z_LINEAR_UNSHIFT; \ + \ + sx = info->z_delay + \ + (info->z_start * info->channels * PCM_##BIT##_BPS); \ + sy = sx - (info->channels * PCM_##BIT##_BPS); \ + \ + ch = info->channels; \ + \ + do { \ + x = _PCM_READ_##SIGN##BIT##_##ENDIAN(sx); \ + y = _PCM_READ_##SIGN##BIT##_##ENDIAN(sy); \ + x = Z_LINEAR_INTERPOLATE_##BIT(z, x, y); \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, x); \ + sx += PCM_##BIT##_BPS; \ + sy += PCM_##BIT##_BPS; \ + dst += PCM_##BIT##_BPS; \ + } while (--ch != 0); \ + } /* * Userland clipping diagnostic check, not enabled in kernel compilation. @@ -495,22 +496,24 @@ * music/sounds/samples (hint: ReplayGain). */ #ifdef Z_DIAGNOSTIC -#define Z_CLIP_CHECK(v, BIT) do { \ - if ((v) > PCM_S##BIT##_MAX) { \ - fprintf(stderr, "Overflow: v=%jd, max=%jd\n", \ - (intmax_t)(v), (intmax_t)PCM_S##BIT##_MAX); \ - } else if ((v) < PCM_S##BIT##_MIN) { \ - fprintf(stderr, "Underflow: v=%jd, min=%jd\n", \ - (intmax_t)(v), (intmax_t)PCM_S##BIT##_MIN); \ - } \ -} while (0) +#define Z_CLIP_CHECK(v, BIT) \ + do { \ + if ((v) > PCM_S##BIT##_MAX) { \ + fprintf(stderr, "Overflow: v=%jd, max=%jd\n", \ + (intmax_t)(v), (intmax_t)PCM_S##BIT##_MAX); \ + } else if ((v) < PCM_S##BIT##_MIN) { \ + fprintf(stderr, "Underflow: v=%jd, min=%jd\n", \ + (intmax_t)(v), (intmax_t)PCM_S##BIT##_MIN); \ + } \ + } while (0) #else #define Z_CLIP_CHECK(...) #endif -#define Z_CLAMP(v, BIT) \ - (((v) > PCM_S##BIT##_MAX) ? PCM_S##BIT##_MAX : \ - (((v) < PCM_S##BIT##_MIN) ? PCM_S##BIT##_MIN : (v))) +#define Z_CLAMP(v, BIT) \ + (((v) > PCM_S##BIT##_MAX) ? \ + PCM_S##BIT##_MAX : \ + (((v) < PCM_S##BIT##_MIN) ? PCM_S##BIT##_MIN : (v))) /* * Sine Cardinal (SINC) Interpolation. Scaling is done in 64 bit, so @@ -518,114 +521,123 @@ * shifted to a full 32 bit, scaled and restored during write for * maximum dynamic range (only for downsampling). */ -#define _Z_SINC_ACCUMULATE(SIGN, BIT, ENDIAN, adv) \ - c += z >> Z_SHIFT; \ - z &= Z_MASK; \ - coeff = Z_COEFF_INTERPOLATE(z, z_coeff[c], z_dcoeff[c]); \ - x = _PCM_READ_##SIGN##BIT##_##ENDIAN(p); \ - v += Z_NORM_##BIT((intpcm64_t)x * coeff); \ - z += info->z_dy; \ - p adv##= info->channels * PCM_##BIT##_BPS +#define _Z_SINC_ACCUMULATE(SIGN, BIT, ENDIAN, adv) \ + c += z >> Z_SHIFT; \ + z &= Z_MASK; \ + coeff = Z_COEFF_INTERPOLATE(z, z_coeff[c], z_dcoeff[c]); \ + x = _PCM_READ_##SIGN##BIT##_##ENDIAN(p); \ + v += Z_NORM_##BIT((intpcm64_t)x * coeff); \ + z += info->z_dy; \ + p adv## = info->channels * PCM_##BIT##_BPS /* * XXX GCC4 optimization is such a !@#$%, need manual unrolling. */ #if defined(__GNUC__) && __GNUC__ >= 4 -#define Z_SINC_ACCUMULATE(...) do { \ - _Z_SINC_ACCUMULATE(__VA_ARGS__); \ - _Z_SINC_ACCUMULATE(__VA_ARGS__); \ -} while (0) -#define Z_SINC_ACCUMULATE_DECR 2 +#define Z_SINC_ACCUMULATE(...) \ + do { \ + _Z_SINC_ACCUMULATE(__VA_ARGS__); \ + _Z_SINC_ACCUMULATE(__VA_ARGS__); \ + } while (0) +#define Z_SINC_ACCUMULATE_DECR 2 #else -#define Z_SINC_ACCUMULATE(...) do { \ - _Z_SINC_ACCUMULATE(__VA_ARGS__); \ -} while (0) -#define Z_SINC_ACCUMULATE_DECR 1 +#define Z_SINC_ACCUMULATE(...) \ + do { \ + _Z_SINC_ACCUMULATE(__VA_ARGS__); \ + } while (0) +#define Z_SINC_ACCUMULATE_DECR 1 #endif -#define Z_DECLARE_SINC(SIGN, BIT, ENDIAN) \ -static void \ -z_feed_sinc_##SIGN##BIT##ENDIAN(struct z_info *info, uint8_t *dst) \ -{ \ - intpcm64_t v; \ - intpcm_t x; \ - uint8_t *p; \ - int32_t coeff, z, *z_coeff, *z_dcoeff; \ - uint32_t c, center, ch, i; \ - \ - z_coeff = info->z_coeff; \ - z_dcoeff = info->z_dcoeff; \ - center = z_prev(info, info->z_start, info->z_size); \ - ch = info->channels * PCM_##BIT##_BPS; \ - dst += ch; \ - \ - do { \ - dst -= PCM_##BIT##_BPS; \ - ch -= PCM_##BIT##_BPS; \ - v = 0; \ - z = info->z_alpha * info->z_dx; \ - c = 0; \ - p = info->z_delay + (z_next(info, center, 1) * \ - info->channels * PCM_##BIT##_BPS) + ch; \ - for (i = info->z_size; i != 0; i -= Z_SINC_ACCUMULATE_DECR) \ - Z_SINC_ACCUMULATE(SIGN, BIT, ENDIAN, +); \ - z = info->z_dy - (info->z_alpha * info->z_dx); \ - c = 0; \ - p = info->z_delay + (center * info->channels * \ - PCM_##BIT##_BPS) + ch; \ - for (i = info->z_size; i != 0; i -= Z_SINC_ACCUMULATE_DECR) \ - Z_SINC_ACCUMULATE(SIGN, BIT, ENDIAN, -); \ - if (info->z_scale != Z_ONE) \ - v = Z_SCALE_##BIT(v, info->z_scale); \ - else \ - v >>= Z_COEFF_SHIFT - Z_GUARD_BIT_##BIT; \ - Z_CLIP_CHECK(v, BIT); \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, Z_CLAMP(v, BIT)); \ - } while (ch != 0); \ -} +#define Z_DECLARE_SINC(SIGN, BIT, ENDIAN) \ + static void z_feed_sinc_##SIGN##BIT##ENDIAN(struct z_info *info, \ + uint8_t *dst) \ + { \ + intpcm64_t v; \ + intpcm_t x; \ + uint8_t *p; \ + int32_t coeff, z, *z_coeff, *z_dcoeff; \ + uint32_t c, center, ch, i; \ + \ + z_coeff = info->z_coeff; \ + z_dcoeff = info->z_dcoeff; \ + center = z_prev(info, info->z_start, info->z_size); \ + ch = info->channels * PCM_##BIT##_BPS; \ + dst += ch; \ + \ + do { \ + dst -= PCM_##BIT##_BPS; \ + ch -= PCM_##BIT##_BPS; \ + v = 0; \ + z = info->z_alpha * info->z_dx; \ + c = 0; \ + p = info->z_delay + \ + (z_next(info, center, 1) * info->channels * \ + PCM_##BIT##_BPS) + \ + ch; \ + for (i = info->z_size; i != 0; \ + i -= Z_SINC_ACCUMULATE_DECR) \ + Z_SINC_ACCUMULATE(SIGN, BIT, ENDIAN, +); \ + z = info->z_dy - (info->z_alpha * info->z_dx); \ + c = 0; \ + p = info->z_delay + \ + (center * info->channels * PCM_##BIT##_BPS) + ch; \ + for (i = info->z_size; i != 0; \ + i -= Z_SINC_ACCUMULATE_DECR) \ + Z_SINC_ACCUMULATE(SIGN, BIT, ENDIAN, -); \ + if (info->z_scale != Z_ONE) \ + v = Z_SCALE_##BIT(v, info->z_scale); \ + else \ + v >>= Z_COEFF_SHIFT - Z_GUARD_BIT_##BIT; \ + Z_CLIP_CHECK(v, BIT); \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, \ + Z_CLAMP(v, BIT)); \ + } while (ch != 0); \ + } -#define Z_DECLARE_SINC_POLYPHASE(SIGN, BIT, ENDIAN) \ -static void \ -z_feed_sinc_polyphase_##SIGN##BIT##ENDIAN(struct z_info *info, uint8_t *dst) \ -{ \ - intpcm64_t v; \ - intpcm_t x; \ - uint8_t *p; \ - int32_t ch, i, start, *z_pcoeff; \ - \ - ch = info->channels * PCM_##BIT##_BPS; \ - dst += ch; \ - start = z_prev(info, info->z_start, (info->z_size << 1) - 1) * ch; \ - \ - do { \ - dst -= PCM_##BIT##_BPS; \ - ch -= PCM_##BIT##_BPS; \ - v = 0; \ - p = info->z_delay + start + ch; \ - z_pcoeff = info->z_pcoeff + \ - ((info->z_alpha * info->z_size) << 1); \ - for (i = info->z_size; i != 0; i--) { \ - x = _PCM_READ_##SIGN##BIT##_##ENDIAN(p); \ - v += Z_NORM_##BIT((intpcm64_t)x * *z_pcoeff); \ - z_pcoeff++; \ - p += info->channels * PCM_##BIT##_BPS; \ - x = _PCM_READ_##SIGN##BIT##_##ENDIAN(p); \ - v += Z_NORM_##BIT((intpcm64_t)x * *z_pcoeff); \ - z_pcoeff++; \ - p += info->channels * PCM_##BIT##_BPS; \ - } \ - if (info->z_scale != Z_ONE) \ - v = Z_SCALE_##BIT(v, info->z_scale); \ - else \ - v >>= Z_COEFF_SHIFT - Z_GUARD_BIT_##BIT; \ - Z_CLIP_CHECK(v, BIT); \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, Z_CLAMP(v, BIT)); \ - } while (ch != 0); \ -} +#define Z_DECLARE_SINC_POLYPHASE(SIGN, BIT, ENDIAN) \ + static void z_feed_sinc_polyphase_##SIGN##BIT##ENDIAN( \ + struct z_info *info, uint8_t *dst) \ + { \ + intpcm64_t v; \ + intpcm_t x; \ + uint8_t *p; \ + int32_t ch, i, start, *z_pcoeff; \ + \ + ch = info->channels * PCM_##BIT##_BPS; \ + dst += ch; \ + start = z_prev(info, info->z_start, (info->z_size << 1) - 1) * \ + ch; \ + \ + do { \ + dst -= PCM_##BIT##_BPS; \ + ch -= PCM_##BIT##_BPS; \ + v = 0; \ + p = info->z_delay + start + ch; \ + z_pcoeff = info->z_pcoeff + \ + ((info->z_alpha * info->z_size) << 1); \ + for (i = info->z_size; i != 0; i--) { \ + x = _PCM_READ_##SIGN##BIT##_##ENDIAN(p); \ + v += Z_NORM_##BIT((intpcm64_t)x * *z_pcoeff); \ + z_pcoeff++; \ + p += info->channels * PCM_##BIT##_BPS; \ + x = _PCM_READ_##SIGN##BIT##_##ENDIAN(p); \ + v += Z_NORM_##BIT((intpcm64_t)x * *z_pcoeff); \ + z_pcoeff++; \ + p += info->channels * PCM_##BIT##_BPS; \ + } \ + if (info->z_scale != Z_ONE) \ + v = Z_SCALE_##BIT(v, info->z_scale); \ + else \ + v >>= Z_COEFF_SHIFT - Z_GUARD_BIT_##BIT; \ + Z_CLIP_CHECK(v, BIT); \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, \ + Z_CLAMP(v, BIT)); \ + } while (ch != 0); \ + } -#define Z_DECLARE(SIGN, BIT, ENDIAN) \ - Z_DECLARE_LINEAR(SIGN, BIT, ENDIAN) \ - Z_DECLARE_SINC(SIGN, BIT, ENDIAN) \ +#define Z_DECLARE(SIGN, BIT, ENDIAN) \ + Z_DECLARE_LINEAR(SIGN, BIT, ENDIAN) \ + Z_DECLARE_SINC(SIGN, BIT, ENDIAN) \ Z_DECLARE_SINC_POLYPHASE(SIGN, BIT, ENDIAN) #if BYTE_ORDER == LITTLE_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) @@ -637,10 +649,10 @@ Z_DECLARE(S, 32, BE) #endif #ifdef SND_FEEDER_MULTIFORMAT -Z_DECLARE(S, 8, NE) +Z_DECLARE(S, 8, NE) Z_DECLARE(S, 24, LE) Z_DECLARE(S, 24, BE) -Z_DECLARE(U, 8, NE) +Z_DECLARE(U, 8, NE) Z_DECLARE(U, 16, LE) Z_DECLARE(U, 24, LE) Z_DECLARE(U, 32, LE) @@ -657,19 +669,19 @@ Z_RESAMPLER_LAST }; -#define Z_RESAMPLER_IDX(i) \ - (Z_IS_SINC(i) ? Z_RESAMPLER_SINC : (i)->quality) - -#define Z_RESAMPLER_ENTRY(SIGN, BIT, ENDIAN) \ - { \ - AFMT_##SIGN##BIT##_##ENDIAN, \ - { \ - [Z_RESAMPLER_ZOH] = z_feed_zoh, \ - [Z_RESAMPLER_LINEAR] = z_feed_linear_##SIGN##BIT##ENDIAN, \ - [Z_RESAMPLER_SINC] = z_feed_sinc_##SIGN##BIT##ENDIAN, \ - [Z_RESAMPLER_SINC_POLYPHASE] = \ - z_feed_sinc_polyphase_##SIGN##BIT##ENDIAN \ - } \ +#define Z_RESAMPLER_IDX(i) (Z_IS_SINC(i) ? Z_RESAMPLER_SINC : (i)->quality) + +#define Z_RESAMPLER_ENTRY(SIGN, BIT, ENDIAN) \ + { \ + AFMT_##SIGN##BIT##_##ENDIAN, \ + { \ + [Z_RESAMPLER_ZOH] = z_feed_zoh, \ + [Z_RESAMPLER_LINEAR] = \ + z_feed_linear_##SIGN##BIT##ENDIAN, \ + [Z_RESAMPLER_SINC] = z_feed_sinc_##SIGN##BIT##ENDIAN, \ + [Z_RESAMPLER_SINC_POLYPHASE] = \ + z_feed_sinc_polyphase_##SIGN##BIT##ENDIAN \ + } \ } static const struct { @@ -685,10 +697,10 @@ Z_RESAMPLER_ENTRY(S, 32, BE), #endif #ifdef SND_FEEDER_MULTIFORMAT - Z_RESAMPLER_ENTRY(S, 8, NE), + Z_RESAMPLER_ENTRY(S, 8, NE), Z_RESAMPLER_ENTRY(S, 24, LE), Z_RESAMPLER_ENTRY(S, 24, BE), - Z_RESAMPLER_ENTRY(U, 8, NE), + Z_RESAMPLER_ENTRY(U, 8, NE), Z_RESAMPLER_ENTRY(U, 16, LE), Z_RESAMPLER_ENTRY(U, 24, LE), Z_RESAMPLER_ENTRY(U, 32, LE), @@ -698,17 +710,23 @@ #endif }; -#define Z_RESAMPLER_TAB_SIZE \ +#define Z_RESAMPLER_TAB_SIZE \ ((int32_t)(sizeof(z_resampler_tab) / sizeof(z_resampler_tab[0]))) static void z_resampler_reset(struct z_info *info) { - info->src = info->rsrc - (info->rsrc % ((feeder_rate_round > 0 && - info->rsrc > feeder_rate_round) ? feeder_rate_round : 1)); - info->dst = info->rdst - (info->rdst % ((feeder_rate_round > 0 && - info->rdst > feeder_rate_round) ? feeder_rate_round : 1)); + info->src = info->rsrc - + (info->rsrc % + ((feeder_rate_round > 0 && info->rsrc > feeder_rate_round) ? + feeder_rate_round : + 1)); + info->dst = info->rdst - + (info->rdst % + ((feeder_rate_round > 0 && info->rdst > feeder_rate_round) ? + feeder_rate_round : + 1)); info->z_gx = 1; info->z_gy = 1; info->z_alpha = 0; @@ -759,11 +777,11 @@ if (len != Z_SINC_LEN(info)) { #ifdef _KERNEL - printf("%s(): sinc l=%d != Z_SINC_LEN=%d\n", - __func__, len, Z_SINC_LEN(info)); + printf("%s(): sinc l=%d != Z_SINC_LEN=%d\n", __func__, len, + Z_SINC_LEN(info)); #else - fprintf(stderr, "%s(): sinc l=%d != Z_SINC_LEN=%d\n", - __func__, len, Z_SINC_LEN(info)); + fprintf(stderr, "%s(): sinc l=%d != Z_SINC_LEN=%d\n", __func__, + len, Z_SINC_LEN(info)); return (-1); #endif } @@ -771,32 +789,32 @@ return (len); } #else -#define z_resampler_sinc_len(i) (Z_IS_SINC(i) ? Z_SINC_LEN(i) : 1) +#define z_resampler_sinc_len(i) (Z_IS_SINC(i) ? Z_SINC_LEN(i) : 1) #endif -#define Z_POLYPHASE_COEFF_SHIFT 0 +#define Z_POLYPHASE_COEFF_SHIFT 0 /* * Pick suitable polynomial interpolators based on filter oversampled ratio * (2 ^ Z_DRIFT_SHIFT). */ -#if !(defined(Z_COEFF_INTERP_ZOH) || defined(Z_COEFF_INTERP_LINEAR) || \ - defined(Z_COEFF_INTERP_QUADRATIC) || defined(Z_COEFF_INTERP_HERMITE) || \ - defined(Z_COEFF_INTER_BSPLINE) || defined(Z_COEFF_INTERP_OPT32X) || \ - defined(Z_COEFF_INTERP_OPT16X) || defined(Z_COEFF_INTERP_OPT8X) || \ +#if !(defined(Z_COEFF_INTERP_ZOH) || defined(Z_COEFF_INTERP_LINEAR) || \ + defined(Z_COEFF_INTERP_QUADRATIC) || defined(Z_COEFF_INTERP_HERMITE) || \ + defined(Z_COEFF_INTER_BSPLINE) || defined(Z_COEFF_INTERP_OPT32X) || \ + defined(Z_COEFF_INTERP_OPT16X) || defined(Z_COEFF_INTERP_OPT8X) || \ defined(Z_COEFF_INTERP_OPT4X) || defined(Z_COEFF_INTERP_OPT2X)) #if Z_DRIFT_SHIFT >= 6 -#define Z_COEFF_INTERP_BSPLINE 1 +#define Z_COEFF_INTERP_BSPLINE 1 #elif Z_DRIFT_SHIFT >= 5 -#define Z_COEFF_INTERP_OPT32X 1 +#define Z_COEFF_INTERP_OPT32X 1 #elif Z_DRIFT_SHIFT == 4 -#define Z_COEFF_INTERP_OPT16X 1 +#define Z_COEFF_INTERP_OPT16X 1 #elif Z_DRIFT_SHIFT == 3 -#define Z_COEFF_INTERP_OPT8X 1 +#define Z_COEFF_INTERP_OPT8X 1 #elif Z_DRIFT_SHIFT == 2 -#define Z_COEFF_INTERP_OPT4X 1 +#define Z_COEFF_INTERP_OPT4X 1 #elif Z_DRIFT_SHIFT == 1 -#define Z_COEFF_INTERP_OPT2X 1 +#define Z_COEFF_INTERP_OPT2X 1 #else #error "Z_DRIFT_SHIFT screwed!" #endif @@ -838,8 +856,9 @@ zq1 = z_coeff[1] - z_coeff[-1]; zq2 = z_coeff[1] + z_coeff[-1] - (z_coeff[0] << 1); - coeff = Z_RSHIFT((Z_RSHIFT((int64_t)zq2 * z, Z_SHIFT) + - zq1) * z, Z_SHIFT + 1) + zq0; + coeff = Z_RSHIFT((Z_RSHIFT((int64_t)zq2 * z, Z_SHIFT) + zq1) * z, + Z_SHIFT + 1) + + zq0; #elif defined(Z_COEFF_INTERP_HERMITE) int32_t zh0, zh1, zh2, zh3; @@ -850,21 +869,34 @@ z_coeff[2]; zh3 = z_coeff[2] - z_coeff[-1] + ((z_coeff[0] - z_coeff[1]) * 3); - coeff = Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((int64_t)zh3 * z, Z_SHIFT) + - zh2) * z, Z_SHIFT) + zh1) * z, Z_SHIFT + 1) + zh0; + coeff = Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((int64_t)zh3 * z, Z_SHIFT) + zh2) * + z, + Z_SHIFT) + + zh1) * + z, + Z_SHIFT + 1) + + zh0; #elif defined(Z_COEFF_INTERP_BSPLINE) int32_t zb0, zb1, zb2, zb3; /* 4-point, 3rd-order B-Spline */ - zb0 = Z_RSHIFT(0x15555555LL * (((int64_t)z_coeff[0] << 2) + - z_coeff[-1] + z_coeff[1]), 30); + zb0 = Z_RSHIFT(0x15555555LL * + (((int64_t)z_coeff[0] << 2) + z_coeff[-1] + z_coeff[1]), + 30); zb1 = z_coeff[1] - z_coeff[-1]; zb2 = z_coeff[-1] + z_coeff[1] - (z_coeff[0] << 1); - zb3 = Z_RSHIFT(0x15555555LL * (((z_coeff[0] - z_coeff[1]) * 3) + - z_coeff[2] - z_coeff[-1]), 30); - - coeff = (Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((int64_t)zb3 * z, Z_SHIFT) + - zb2) * z, Z_SHIFT) + zb1) * z, Z_SHIFT) + zb0 + 1) >> 1; + zb3 = Z_RSHIFT(0x15555555LL * + (((z_coeff[0] - z_coeff[1]) * 3) + z_coeff[2] - z_coeff[-1]), + 30); + + coeff = + (Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((int64_t)zb3 * z, Z_SHIFT) + zb2) * z, + Z_SHIFT) + + zb1) * + z, + Z_SHIFT) + + zb0 + 1) >> + 1; #elif defined(Z_COEFF_INTERP_OPT32X) int32_t zoz, zoe1, zoe2, zoe3, zoo1, zoo2, zoo3; int32_t zoc0, zoc1, zoc2, zoc3, zoc4, zoc5; @@ -879,22 +911,40 @@ zoo3 = z_coeff[3] - z_coeff[-2]; zoc0 = Z_RSHIFT((0x1ac2260dLL * zoe1) + (0x0526cdcaLL * zoe2) + - (0x00170c29LL * zoe3), 30); + (0x00170c29LL * zoe3), + 30); zoc1 = Z_RSHIFT((0x14f8a49aLL * zoo1) + (0x0d6d1109LL * zoo2) + - (0x008cd4dcLL * zoo3), 30); + (0x008cd4dcLL * zoo3), + 30); zoc2 = Z_RSHIFT((-0x0d3e94a4LL * zoe1) + (0x0bddded4LL * zoe2) + - (0x0160b5d0LL * zoe3), 30); + (0x0160b5d0LL * zoe3), + 30); zoc3 = Z_RSHIFT((-0x0de10cc4LL * zoo1) + (0x019b2a7dLL * zoo2) + - (0x01cfe914LL * zoo3), 30); + (0x01cfe914LL * zoo3), + 30); zoc4 = Z_RSHIFT((0x02aa12d7LL * zoe1) + (-0x03ff1bb3LL * zoe2) + - (0x015508ddLL * zoe3), 30); + (0x015508ddLL * zoe3), + 30); zoc5 = Z_RSHIFT((0x051d29e5LL * zoo1) + (-0x028e7647LL * zoo2) + - (0x0082d81aLL * zoo3), 30); - - coeff = Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT( - (int64_t)zoc5 * zoz, Z_SHIFT) + - zoc4) * zoz, Z_SHIFT) + zoc3) * zoz, Z_SHIFT) + - zoc2) * zoz, Z_SHIFT) + zoc1) * zoz, Z_SHIFT) + zoc0; + (0x0082d81aLL * zoo3), + 30); + + coeff = Z_RSHIFT( + (Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((int64_t)zoc5 * zoz, + Z_SHIFT) + + zoc4) * + zoz, + Z_SHIFT) + + zoc3) * + zoz, + Z_SHIFT) + + zoc2) * + zoz, + Z_SHIFT) + + zoc1) * + zoz, + Z_SHIFT) + + zoc0; #elif defined(Z_COEFF_INTERP_OPT16X) int32_t zoz, zoe1, zoe2, zoe3, zoo1, zoo2, zoo3; int32_t zoc0, zoc1, zoc2, zoc3, zoc4, zoc5; @@ -909,22 +959,40 @@ zoo3 = z_coeff[3] - z_coeff[-2]; zoc0 = Z_RSHIFT((0x1ac2260dLL * zoe1) + (0x0526cdcaLL * zoe2) + - (0x00170c29LL * zoe3), 30); + (0x00170c29LL * zoe3), + 30); zoc1 = Z_RSHIFT((0x14f8a49aLL * zoo1) + (0x0d6d1109LL * zoo2) + - (0x008cd4dcLL * zoo3), 30); + (0x008cd4dcLL * zoo3), + 30); zoc2 = Z_RSHIFT((-0x0d3e94a4LL * zoe1) + (0x0bddded4LL * zoe2) + - (0x0160b5d0LL * zoe3), 30); + (0x0160b5d0LL * zoe3), + 30); zoc3 = Z_RSHIFT((-0x0de10cc4LL * zoo1) + (0x019b2a7dLL * zoo2) + - (0x01cfe914LL * zoo3), 30); + (0x01cfe914LL * zoo3), + 30); zoc4 = Z_RSHIFT((0x02aa12d7LL * zoe1) + (-0x03ff1bb3LL * zoe2) + - (0x015508ddLL * zoe3), 30); + (0x015508ddLL * zoe3), + 30); zoc5 = Z_RSHIFT((0x051d29e5LL * zoo1) + (-0x028e7647LL * zoo2) + - (0x0082d81aLL * zoo3), 30); - - coeff = Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT( - (int64_t)zoc5 * zoz, Z_SHIFT) + - zoc4) * zoz, Z_SHIFT) + zoc3) * zoz, Z_SHIFT) + - zoc2) * zoz, Z_SHIFT) + zoc1) * zoz, Z_SHIFT) + zoc0; + (0x0082d81aLL * zoo3), + 30); + + coeff = Z_RSHIFT( + (Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((int64_t)zoc5 * zoz, + Z_SHIFT) + + zoc4) * + zoz, + Z_SHIFT) + + zoc3) * + zoz, + Z_SHIFT) + + zoc2) * + zoz, + Z_SHIFT) + + zoc1) * + zoz, + Z_SHIFT) + + zoc0; #elif defined(Z_COEFF_INTERP_OPT8X) int32_t zoz, zoe1, zoe2, zoe3, zoo1, zoo2, zoo3; int32_t zoc0, zoc1, zoc2, zoc3, zoc4, zoc5; @@ -939,22 +1007,40 @@ zoo3 = z_coeff[3] - z_coeff[-2]; zoc0 = Z_RSHIFT((0x1aa9b47dLL * zoe1) + (0x053d9944LL * zoe2) + - (0x0018b23fLL * zoe3), 30); + (0x0018b23fLL * zoe3), + 30); zoc1 = Z_RSHIFT((0x14a104d1LL * zoo1) + (0x0d7d2504LL * zoo2) + - (0x0094b599LL * zoo3), 30); + (0x0094b599LL * zoo3), + 30); zoc2 = Z_RSHIFT((-0x0d22530bLL * zoe1) + (0x0bb37a2cLL * zoe2) + - (0x016ed8e0LL * zoe3), 30); + (0x016ed8e0LL * zoe3), + 30); zoc3 = Z_RSHIFT((-0x0d744b1cLL * zoo1) + (0x01649591LL * zoo2) + - (0x01dae93aLL * zoo3), 30); + (0x01dae93aLL * zoo3), + 30); zoc4 = Z_RSHIFT((0x02a7ee1bLL * zoe1) + (-0x03fbdb24LL * zoe2) + - (0x0153ed07LL * zoe3), 30); + (0x0153ed07LL * zoe3), + 30); zoc5 = Z_RSHIFT((0x04cf9b6cLL * zoo1) + (-0x0266b378LL * zoo2) + - (0x007a7c26LL * zoo3), 30); - - coeff = Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT( - (int64_t)zoc5 * zoz, Z_SHIFT) + - zoc4) * zoz, Z_SHIFT) + zoc3) * zoz, Z_SHIFT) + - zoc2) * zoz, Z_SHIFT) + zoc1) * zoz, Z_SHIFT) + zoc0; + (0x007a7c26LL * zoo3), + 30); + + coeff = Z_RSHIFT( + (Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((int64_t)zoc5 * zoz, + Z_SHIFT) + + zoc4) * + zoz, + Z_SHIFT) + + zoc3) * + zoz, + Z_SHIFT) + + zoc2) * + zoz, + Z_SHIFT) + + zoc1) * + zoz, + Z_SHIFT) + + zoc0; #elif defined(Z_COEFF_INTERP_OPT4X) int32_t zoz, zoe1, zoe2, zoe3, zoo1, zoo2, zoo3; int32_t zoc0, zoc1, zoc2, zoc3, zoc4, zoc5; @@ -969,22 +1055,40 @@ zoo3 = z_coeff[3] - z_coeff[-2]; zoc0 = Z_RSHIFT((0x1a8eda43LL * zoe1) + (0x0556ee38LL * zoe2) + - (0x001a3784LL * zoe3), 30); + (0x001a3784LL * zoe3), + 30); zoc1 = Z_RSHIFT((0x143d863eLL * zoo1) + (0x0d910e36LL * zoo2) + - (0x009ca889LL * zoo3), 30); + (0x009ca889LL * zoo3), + 30); zoc2 = Z_RSHIFT((-0x0d026821LL * zoe1) + (0x0b837773LL * zoe2) + - (0x017ef0c6LL * zoe3), 30); + (0x017ef0c6LL * zoe3), + 30); zoc3 = Z_RSHIFT((-0x0cef1502LL * zoo1) + (0x01207a8eLL * zoo2) + - (0x01e936dbLL * zoo3), 30); + (0x01e936dbLL * zoo3), + 30); zoc4 = Z_RSHIFT((0x029fe643LL * zoe1) + (-0x03ef3fc8LL * zoe2) + - (0x014f5923LL * zoe3), 30); + (0x014f5923LL * zoe3), + 30); zoc5 = Z_RSHIFT((0x043a9d08LL * zoo1) + (-0x02154febLL * zoo2) + - (0x00670dbdLL * zoo3), 30); - - coeff = Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT( - (int64_t)zoc5 * zoz, Z_SHIFT) + - zoc4) * zoz, Z_SHIFT) + zoc3) * zoz, Z_SHIFT) + - zoc2) * zoz, Z_SHIFT) + zoc1) * zoz, Z_SHIFT) + zoc0; + (0x00670dbdLL * zoo3), + 30); + + coeff = Z_RSHIFT( + (Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((int64_t)zoc5 * zoz, + Z_SHIFT) + + zoc4) * + zoz, + Z_SHIFT) + + zoc3) * + zoz, + Z_SHIFT) + + zoc2) * + zoz, + Z_SHIFT) + + zoc1) * + zoz, + Z_SHIFT) + + zoc0; #elif defined(Z_COEFF_INTERP_OPT2X) int32_t zoz, zoe1, zoe2, zoe3, zoo1, zoo2, zoo3; int32_t zoc0, zoc1, zoc2, zoc3, zoc4, zoc5; @@ -999,22 +1103,40 @@ zoo3 = z_coeff[3] - z_coeff[-2]; zoc0 = Z_RSHIFT((0x19edb6fdLL * zoe1) + (0x05ebd062LL * zoe2) + - (0x00267881LL * zoe3), 30); + (0x00267881LL * zoe3), + 30); zoc1 = Z_RSHIFT((0x1223af76LL * zoo1) + (0x0de3dd6bLL * zoo2) + - (0x00d683cdLL * zoo3), 30); + (0x00d683cdLL * zoo3), + 30); zoc2 = Z_RSHIFT((-0x0c3ee068LL * zoe1) + (0x0a5c3769LL * zoe2) + - (0x01e2aceaLL * zoe3), 30); + (0x01e2aceaLL * zoe3), + 30); zoc3 = Z_RSHIFT((-0x0a8ab614LL * zoo1) + (-0x0019522eLL * zoo2) + - (0x022cefc7LL * zoo3), 30); + (0x022cefc7LL * zoo3), + 30); zoc4 = Z_RSHIFT((0x0276187dLL * zoe1) + (-0x03a801e8LL * zoe2) + - (0x0131d935LL * zoe3), 30); + (0x0131d935LL * zoe3), + 30); zoc5 = Z_RSHIFT((0x02c373f5LL * zoo1) + (-0x01275f83LL * zoo2) + - (0x0018ee79LL * zoo3), 30); - - coeff = Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT( - (int64_t)zoc5 * zoz, Z_SHIFT) + - zoc4) * zoz, Z_SHIFT) + zoc3) * zoz, Z_SHIFT) + - zoc2) * zoz, Z_SHIFT) + zoc1) * zoz, Z_SHIFT) + zoc0; + (0x0018ee79LL * zoo3), + 30); + + coeff = Z_RSHIFT( + (Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((Z_RSHIFT((int64_t)zoc5 * zoz, + Z_SHIFT) + + zoc4) * + zoz, + Z_SHIFT) + + zoc3) * + zoz, + Z_SHIFT) + + zoc2) * + zoz, + Z_SHIFT) + + zoc1) * + zoz, + Z_SHIFT) + + zoc0; #else #error "Interpolation type screwed!" #endif @@ -1050,8 +1172,8 @@ return (E2BIG); } - info->z_pcoeff = malloc(sizeof(int32_t) * - info->z_size * info->z_gy * 2, M_DEVBUF, M_NOWAIT | M_ZERO); + info->z_pcoeff = malloc(sizeof(int32_t) * info->z_size * info->z_gy * 2, + M_DEVBUF, M_NOWAIT | M_ZERO); if (info->z_pcoeff == NULL) return (ENOMEM); @@ -1061,10 +1183,10 @@ for (i = info->z_size; i != 0; i--) { c += z >> Z_SHIFT; z &= Z_MASK; - idx = (alpha * info->z_size * 2) + - (info->z_size * 2) - i; - info->z_pcoeff[idx] = - z_coeff_interpolate(z, info->z_coeff + c); + idx = (alpha * info->z_size * 2) + (info->z_size * 2) - + i; + info->z_pcoeff[idx] = z_coeff_interpolate(z, + info->z_coeff + c); z += info->z_dy; } z = info->z_dy - (alpha * info->z_dx); @@ -1073,15 +1195,15 @@ c += z >> Z_SHIFT; z &= Z_MASK; idx = (alpha * info->z_size * 2) + i - 1; - info->z_pcoeff[idx] = - z_coeff_interpolate(z, info->z_coeff + c); + info->z_pcoeff[idx] = z_coeff_interpolate(z, + info->z_coeff + c); z += info->z_dy; } } #ifndef _KERNEL - fprintf(stderr, "Polyphase: [%d/%d] %d entries\n", - info->z_gx, info->z_gy, info->z_size * info->z_gy * 2); + fprintf(stderr, "Polyphase: [%d/%d] %d entries\n", info->z_gx, + info->z_gy, info->z_size * info->z_gy * 2); #endif return (0); @@ -1155,7 +1277,7 @@ * If anything goes wrong, revisit again and enable * adaptive mode. */ -z_setup_adaptive_sinc: + z_setup_adaptive_sinc: if (info->z_pcoeff != NULL) { free(info->z_pcoeff, M_DEVBUF); info->z_pcoeff = NULL; @@ -1172,8 +1294,8 @@ } #if 0 -#define Z_SCALE_DIV 10000 -#define Z_SCALE_LIMIT(s, v) \ +#define Z_SCALE_DIV 10000 +#define Z_SCALE_LIMIT(s, v) \ ((((uint64_t)(s) * (v)) + (Z_SCALE_DIV >> 1)) / Z_SCALE_DIV) info->z_scale = Z_SCALE_LIMIT(info->z_scale, 9780); @@ -1361,70 +1483,62 @@ /* * XXX Debuging mess !@#$%^ */ -#define dumpz(x) fprintf(stderr, "\t%12s = %10u : %-11d\n", \ - "z_"__STRING(x), (uint32_t)info->z_##x, \ - (int32_t)info->z_##x) +#define dumpz(x) \ + fprintf(stderr, "\t%12s = %10u : %-11d\n", "z_"__STRING(x), \ + (uint32_t)info->z_##x, (int32_t)info->z_##x) fprintf(stderr, "\n%s():\n", __func__); fprintf(stderr, "\tchannels=%d, bps=%d, format=0x%08x, quality=%d\n", info->channels, info->bps, format, info->quality); - fprintf(stderr, "\t%d (%d) -> %d (%d), ", - info->src, info->rsrc, info->dst, info->rdst); + fprintf(stderr, "\t%d (%d) -> %d (%d), ", info->src, info->rsrc, + info->dst, info->rdst); fprintf(stderr, "[%d/%d]\n", info->z_gx, info->z_gy); fprintf(stderr, "\tminreq=%d, ", z_gy2gx(info, 1)); if (adaptive != 0) z_scale = Z_ONE; - fprintf(stderr, "factor=0x%08x/0x%08x (%f)\n", - z_scale, Z_ONE, (double)z_scale / Z_ONE); + fprintf(stderr, "factor=0x%08x/0x%08x (%f)\n", z_scale, Z_ONE, + (double)z_scale / Z_ONE); fprintf(stderr, "\tbase_length=%d, ", Z_SINC_BASE_LEN(info)); fprintf(stderr, "adaptive=%s\n", (adaptive != 0) ? "YES" : "NO"); dumpz(size); dumpz(alloc); if (info->z_alloc < 1024) - fprintf(stderr, "\t%15s%10d Bytes\n", - "", info->z_alloc); + fprintf(stderr, "\t%15s%10d Bytes\n", "", info->z_alloc); else if (info->z_alloc < (1024 << 10)) - fprintf(stderr, "\t%15s%10d KBytes\n", - "", info->z_alloc >> 10); + fprintf(stderr, "\t%15s%10d KBytes\n", "", info->z_alloc >> 10); else if (info->z_alloc < (1024 << 20)) - fprintf(stderr, "\t%15s%10d MBytes\n", - "", info->z_alloc >> 20); + fprintf(stderr, "\t%15s%10d MBytes\n", "", info->z_alloc >> 20); else - fprintf(stderr, "\t%15s%10d GBytes\n", - "", info->z_alloc >> 30); - fprintf(stderr, "\t%12s %10d (min output samples)\n", - "", + fprintf(stderr, "\t%15s%10d GBytes\n", "", info->z_alloc >> 30); + fprintf(stderr, "\t%12s %10d (min output samples)\n", "", (int32_t)z_gx2gy(info, info->z_full - (info->z_size << 1))); - fprintf(stderr, "\t%12s %10d (min allocated output samples)\n", - "", - (int32_t)z_gx2gy(info, (info->z_alloc / align) - - (info->z_size << 1))); - fprintf(stderr, "\t%12s = %10d\n", - "z_gy2gx()", (int32_t)z_gy2gx(info, 1)); - fprintf(stderr, "\t%12s = %10d -> z_gy2gx() -> %d\n", - "Max", (int32_t)gy2gx_max, (int32_t)z_gy2gx(info, gy2gx_max)); - fprintf(stderr, "\t%12s = %10d\n", - "z_gx2gy()", (int32_t)z_gx2gy(info, 1)); - fprintf(stderr, "\t%12s = %10d -> z_gx2gy() -> %d\n", - "Max", (int32_t)gx2gy_max, (int32_t)z_gx2gy(info, gx2gy_max)); + fprintf(stderr, "\t%12s %10d (min allocated output samples)\n", "", + (int32_t)z_gx2gy(info, + (info->z_alloc / align) - (info->z_size << 1))); + fprintf(stderr, "\t%12s = %10d\n", "z_gy2gx()", + (int32_t)z_gy2gx(info, 1)); + fprintf(stderr, "\t%12s = %10d -> z_gy2gx() -> %d\n", "Max", + (int32_t)gy2gx_max, (int32_t)z_gy2gx(info, gy2gx_max)); + fprintf(stderr, "\t%12s = %10d\n", "z_gx2gy()", + (int32_t)z_gx2gy(info, 1)); + fprintf(stderr, "\t%12s = %10d -> z_gx2gy() -> %d\n", "Max", + (int32_t)gx2gy_max, (int32_t)z_gx2gy(info, gx2gy_max)); dumpz(maxfeed); dumpz(full); dumpz(start); dumpz(pos); dumpz(scale); - fprintf(stderr, "\t%12s %10f\n", "", - (double)info->z_scale / Z_ONE); + fprintf(stderr, "\t%12s %10f\n", "", (double)info->z_scale / Z_ONE); dumpz(dx); - fprintf(stderr, "\t%12s %10f\n", "", - (double)info->z_dx / info->z_dy); + fprintf(stderr, "\t%12s %10f\n", "", (double)info->z_dx / info->z_dy); dumpz(dy); fprintf(stderr, "\t%12s %10d (drift step)\n", "", info->z_dy >> Z_SHIFT); fprintf(stderr, "\t%12s %10d (scaling differences)\n", "", (z_scale << Z_DRIFT_SHIFT) - info->z_dy); - fprintf(stderr, "\t%12s = %u bytes\n", - "intpcm32_t", sizeof(intpcm32_t)); - fprintf(stderr, "\t%12s = 0x%08x, smallest=%.16lf\n", - "Z_ONE", Z_ONE, (double)1.0 / (double)Z_ONE); + fprintf(stderr, "\t%12s = %u bytes\n", "intpcm32_t", + sizeof(intpcm32_t)); + fprintf(stderr, "\t%12s = 0x%08x, smallest=%.16lf\n", "Z_ONE", Z_ONE, + (double)1.0 / (double)Z_ONE); #endif return (0); @@ -1618,10 +1732,10 @@ cp = (info->z_size << 1) + fetched; z_copy(info->z_delay + (start * align), info->z_delay, cp * align); - info->z_start = - z_prev(info, info->z_size << 1, 1); - info->z_pos = - z_next(info, info->z_start, fetched + 1); + info->z_start = z_prev(info, info->z_size << 1, + 1); + info->z_pos = z_next(info, info->z_start, + fetched + 1); fetch = z_min(z_free(info), reqin); #ifdef Z_DIAGNOSTIC if (1) { @@ -1641,9 +1755,11 @@ * Fetch in byte domain and jump back * to sample domain. */ - fetched = SND_FXDIV(z_feed(f->source, c, - info->z_delay + (info->z_pos * align), - fetch * align, source), align); + fetched = SND_FXDIV( + z_feed(f->source, c, + info->z_delay + (info->z_pos * align), + fetch * align, source), + align); /* * Prepare to convert fetched buffer, * or mark us done if we cannot fulfill @@ -1713,8 +1829,8 @@ left = count; do { - feed = z_resampler_feed_internal(f, c, b, - z_min(maxfeed, left), source); + feed = z_resampler_feed_internal(f, c, b, z_min(maxfeed, left), + source); b += feed; left -= feed; } while (left != 0 && feed != 0); @@ -1727,13 +1843,11 @@ { 0, 0, 0, 0, 0 }, }; -static kobj_method_t feeder_rate_methods[] = { - KOBJMETHOD(feeder_init, z_resampler_init), - KOBJMETHOD(feeder_free, z_resampler_free), - KOBJMETHOD(feeder_set, z_resampler_set), - KOBJMETHOD(feeder_get, z_resampler_get), - KOBJMETHOD(feeder_feed, z_resampler_feed), - KOBJMETHOD_END -}; +static kobj_method_t feeder_rate_methods[] = { KOBJMETHOD(feeder_init, + z_resampler_init), + KOBJMETHOD(feeder_free, z_resampler_free), + KOBJMETHOD(feeder_set, z_resampler_set), + KOBJMETHOD(feeder_get, z_resampler_get), + KOBJMETHOD(feeder_feed, z_resampler_feed), KOBJMETHOD_END }; FEEDER_DECLARE(feeder_rate, NULL); Index: sys/dev/sound/pcm/feeder_volume.c =================================================================== --- sys/dev/sound/pcm/feeder_volume.c +++ sys/dev/sound/pcm/feeder_volume.c @@ -32,8 +32,9 @@ #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif -#include #include +#include + #include "feeder_if.h" #define SND_USE_FXDIV @@ -42,34 +43,32 @@ typedef void (*feed_volume_t)(int *, int *, uint32_t, uint8_t *, uint32_t); -#define FEEDVOLUME_CALC8(s, v) (SND_VOL_CALC_SAMPLE((intpcm_t) \ - (s) << 8, v) >> 8) -#define FEEDVOLUME_CALC16(s, v) SND_VOL_CALC_SAMPLE((intpcm_t)(s), v) -#define FEEDVOLUME_CALC24(s, v) SND_VOL_CALC_SAMPLE((intpcm64_t)(s), v) -#define FEEDVOLUME_CALC32(s, v) SND_VOL_CALC_SAMPLE((intpcm64_t)(s), v) - -#define FEEDVOLUME_DECLARE(SIGN, BIT, ENDIAN) \ -static void \ -feed_volume_##SIGN##BIT##ENDIAN(int *vol, int *matrix, \ - uint32_t channels, uint8_t *dst, uint32_t count) \ -{ \ - intpcm##BIT##_t v; \ - intpcm_t x; \ - uint32_t i; \ - \ - dst += count * PCM_##BIT##_BPS * channels; \ - do { \ - i = channels; \ - do { \ - dst -= PCM_##BIT##_BPS; \ - i--; \ - x = PCM_READ_##SIGN##BIT##_##ENDIAN(dst); \ - v = FEEDVOLUME_CALC##BIT(x, vol[matrix[i]]); \ - x = PCM_CLAMP_##SIGN##BIT(v); \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, x); \ - } while (i != 0); \ - } while (--count != 0); \ -} +#define FEEDVOLUME_CALC8(s, v) (SND_VOL_CALC_SAMPLE((intpcm_t)(s) << 8, v) >> 8) +#define FEEDVOLUME_CALC16(s, v) SND_VOL_CALC_SAMPLE((intpcm_t)(s), v) +#define FEEDVOLUME_CALC24(s, v) SND_VOL_CALC_SAMPLE((intpcm64_t)(s), v) +#define FEEDVOLUME_CALC32(s, v) SND_VOL_CALC_SAMPLE((intpcm64_t)(s), v) + +#define FEEDVOLUME_DECLARE(SIGN, BIT, ENDIAN) \ + static void feed_volume_##SIGN##BIT##ENDIAN(int *vol, int *matrix, \ + uint32_t channels, uint8_t *dst, uint32_t count) \ + { \ + intpcm##BIT##_t v; \ + intpcm_t x; \ + uint32_t i; \ + \ + dst += count * PCM_##BIT##_BPS * channels; \ + do { \ + i = channels; \ + do { \ + dst -= PCM_##BIT##_BPS; \ + i--; \ + x = PCM_READ_##SIGN##BIT##_##ENDIAN(dst); \ + v = FEEDVOLUME_CALC##BIT(x, vol[matrix[i]]); \ + x = PCM_CLAMP_##SIGN##BIT(v); \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, x); \ + } while (i != 0); \ + } while (--count != 0); \ + } #if BYTE_ORDER == LITTLE_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) FEEDVOLUME_DECLARE(S, 16, LE) @@ -80,10 +79,10 @@ FEEDVOLUME_DECLARE(S, 32, BE) #endif #ifdef SND_FEEDER_MULTIFORMAT -FEEDVOLUME_DECLARE(S, 8, NE) +FEEDVOLUME_DECLARE(S, 8, NE) FEEDVOLUME_DECLARE(S, 24, LE) FEEDVOLUME_DECLARE(S, 24, BE) -FEEDVOLUME_DECLARE(U, 8, NE) +FEEDVOLUME_DECLARE(U, 8, NE) FEEDVOLUME_DECLARE(U, 16, LE) FEEDVOLUME_DECLARE(U, 24, LE) FEEDVOLUME_DECLARE(U, 32, LE) @@ -100,10 +99,9 @@ int matrix[SND_CHN_MAX]; }; -#define FEEDVOLUME_ENTRY(SIGN, BIT, ENDIAN) \ - { \ - AFMT_##SIGN##BIT##_##ENDIAN, \ - feed_volume_##SIGN##BIT##ENDIAN \ +#define FEEDVOLUME_ENTRY(SIGN, BIT, ENDIAN) \ + { \ + AFMT_##SIGN##BIT##_##ENDIAN, feed_volume_##SIGN##BIT##ENDIAN \ } static const struct { @@ -111,30 +109,23 @@ feed_volume_t apply; } feed_volume_info_tab[] = { #if BYTE_ORDER == LITTLE_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) - FEEDVOLUME_ENTRY(S, 16, LE), - FEEDVOLUME_ENTRY(S, 32, LE), + FEEDVOLUME_ENTRY(S, 16, LE), FEEDVOLUME_ENTRY(S, 32, LE), #endif #if BYTE_ORDER == BIG_ENDIAN || defined(SND_FEEDER_MULTIFORMAT) - FEEDVOLUME_ENTRY(S, 16, BE), - FEEDVOLUME_ENTRY(S, 32, BE), + FEEDVOLUME_ENTRY(S, 16, BE), FEEDVOLUME_ENTRY(S, 32, BE), #endif #ifdef SND_FEEDER_MULTIFORMAT - FEEDVOLUME_ENTRY(S, 8, NE), - FEEDVOLUME_ENTRY(S, 24, LE), - FEEDVOLUME_ENTRY(S, 24, BE), - FEEDVOLUME_ENTRY(U, 8, NE), - FEEDVOLUME_ENTRY(U, 16, LE), - FEEDVOLUME_ENTRY(U, 24, LE), - FEEDVOLUME_ENTRY(U, 32, LE), - FEEDVOLUME_ENTRY(U, 16, BE), - FEEDVOLUME_ENTRY(U, 24, BE), - FEEDVOLUME_ENTRY(U, 32, BE) + FEEDVOLUME_ENTRY(S, 8, NE), FEEDVOLUME_ENTRY(S, 24, LE), + FEEDVOLUME_ENTRY(S, 24, BE), FEEDVOLUME_ENTRY(U, 8, NE), + FEEDVOLUME_ENTRY(U, 16, LE), FEEDVOLUME_ENTRY(U, 24, LE), + FEEDVOLUME_ENTRY(U, 32, LE), FEEDVOLUME_ENTRY(U, 16, BE), + FEEDVOLUME_ENTRY(U, 24, BE), FEEDVOLUME_ENTRY(U, 32, BE) #endif }; -#define FEEDVOLUME_TAB_SIZE ((int32_t) \ - (sizeof(feed_volume_info_tab) / \ - sizeof(feed_volume_info_tab[0]))) +#define FEEDVOLUME_TAB_SIZE \ + ((int32_t)(sizeof(feed_volume_info_tab) / \ + sizeof(feed_volume_info_tab[0]))) static int feed_volume_init(struct pcm_feeder *f) @@ -261,8 +252,7 @@ j = 0; i = info->channels; while (i--) { - if (vol[matrix[i]] != SND_VOL_FLAT || - muted[matrix[i]] != 0) { + if (vol[matrix[i]] != SND_VOL_FLAT || muted[matrix[i]] != 0) { j = 1; break; } @@ -300,17 +290,14 @@ } static struct pcm_feederdesc feeder_volume_desc[] = { - { FEEDER_VOLUME, 0, 0, 0, 0 }, - { 0, 0, 0, 0, 0 } + { FEEDER_VOLUME, 0, 0, 0, 0 }, { 0, 0, 0, 0, 0 } }; -static kobj_method_t feeder_volume_methods[] = { - KOBJMETHOD(feeder_init, feed_volume_init), - KOBJMETHOD(feeder_free, feed_volume_free), - KOBJMETHOD(feeder_set, feed_volume_set), - KOBJMETHOD(feeder_feed, feed_volume_feed), - KOBJMETHOD_END -}; +static kobj_method_t feeder_volume_methods[] = { KOBJMETHOD(feeder_init, + feed_volume_init), + KOBJMETHOD(feeder_free, feed_volume_free), + KOBJMETHOD(feeder_set, feed_volume_set), + KOBJMETHOD(feeder_feed, feed_volume_feed), KOBJMETHOD_END }; FEEDER_DECLARE(feeder_volume, NULL); Index: sys/dev/sound/pcm/g711.h =================================================================== --- sys/dev/sound/pcm/g711.h +++ sys/dev/sound/pcm/g711.h @@ -29,195 +29,150 @@ #ifndef _SND_G711_H_ #define _SND_G711_H_ -#define G711_TABLE_SIZE 256 +#define G711_TABLE_SIZE 256 -#define ULAW_TO_U8 { \ - 3, 7, 11, 15, 19, 23, 27, 31, \ - 35, 39, 43, 47, 51, 55, 59, 63, \ - 66, 68, 70, 72, 74, 76, 78, 80, \ - 82, 84, 86, 88, 90, 92, 94, 96, \ - 98, 99, 100, 101, 102, 103, 104, 105, \ - 106, 107, 108, 109, 110, 111, 112, 113, \ - 113, 114, 114, 115, 115, 116, 116, 117, \ - 117, 118, 118, 119, 119, 120, 120, 121, \ - 121, 121, 122, 122, 122, 122, 123, 123, \ - 123, 123, 124, 124, 124, 124, 125, 125, \ - 125, 125, 125, 125, 126, 126, 126, 126, \ - 126, 126, 126, 126, 127, 127, 127, 127, \ - 127, 127, 127, 127, 127, 127, 127, 127, \ - 128, 128, 128, 128, 128, 128, 128, 128, \ - 128, 128, 128, 128, 128, 128, 128, 128, \ - 128, 128, 128, 128, 128, 128, 128, 128, \ - 253, 249, 245, 241, 237, 233, 229, 225, \ - 221, 217, 213, 209, 205, 201, 197, 193, \ - 190, 188, 186, 184, 182, 180, 178, 176, \ - 174, 172, 170, 168, 166, 164, 162, 160, \ - 158, 157, 156, 155, 154, 153, 152, 151, \ - 150, 149, 148, 147, 146, 145, 144, 143, \ - 143, 142, 142, 141, 141, 140, 140, 139, \ - 139, 138, 138, 137, 137, 136, 136, 135, \ - 135, 135, 134, 134, 134, 134, 133, 133, \ - 133, 133, 132, 132, 132, 132, 131, 131, \ - 131, 131, 131, 131, 130, 130, 130, 130, \ - 130, 130, 130, 130, 129, 129, 129, 129, \ - 129, 129, 129, 129, 129, 129, 129, 129, \ - 128, 128, 128, 128, 128, 128, 128, 128, \ - 128, 128, 128, 128, 128, 128, 128, 128, \ - 128, 128, 128, 128, 128, 128, 128, 128, \ +#define ULAW_TO_U8 \ + { \ + 3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47, 51, 55, 59, 63, \ + 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, \ + 94, 96, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, \ + 108, 109, 110, 111, 112, 113, 113, 114, 114, 115, 115, \ + 116, 116, 117, 117, 118, 118, 119, 119, 120, 120, 121, \ + 121, 121, 122, 122, 122, 122, 123, 123, 123, 123, 124, \ + 124, 124, 124, 125, 125, 125, 125, 125, 125, 126, 126, \ + 126, 126, 126, 126, 126, 126, 127, 127, 127, 127, 127, \ + 127, 127, 127, 127, 127, 127, 127, 128, 128, 128, 128, \ + 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, \ + 128, 128, 128, 128, 128, 128, 128, 128, 128, 253, 249, \ + 245, 241, 237, 233, 229, 225, 221, 217, 213, 209, 205, \ + 201, 197, 193, 190, 188, 186, 184, 182, 180, 178, 176, \ + 174, 172, 170, 168, 166, 164, 162, 160, 158, 157, 156, \ + 155, 154, 153, 152, 151, 150, 149, 148, 147, 146, 145, \ + 144, 143, 143, 142, 142, 141, 141, 140, 140, 139, 139, \ + 138, 138, 137, 137, 136, 136, 135, 135, 135, 134, 134, \ + 134, 134, 133, 133, 133, 133, 132, 132, 132, 132, 131, \ + 131, 131, 131, 131, 131, 130, 130, 130, 130, 130, 130, \ + 130, 130, 129, 129, 129, 129, 129, 129, 129, 129, 129, \ + 129, 129, 129, 128, 128, 128, 128, 128, 128, 128, 128, \ + 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, \ + 128, 128, 128, 128, 128, \ } -#define ALAW_TO_U8 { \ - 108, 109, 106, 107, 112, 113, 110, 111, \ - 100, 101, 98, 99, 104, 105, 102, 103, \ - 118, 118, 117, 117, 120, 120, 119, 119, \ - 114, 114, 113, 113, 116, 116, 115, 115, \ - 43, 47, 35, 39, 59, 63, 51, 55, \ - 11, 15, 3, 7, 27, 31, 19, 23, \ - 86, 88, 82, 84, 94, 96, 90, 92, \ - 70, 72, 66, 68, 78, 80, 74, 76, \ - 127, 127, 127, 127, 127, 127, 127, 127, \ - 127, 127, 127, 127, 127, 127, 127, 127, \ - 128, 128, 128, 128, 128, 128, 128, 128, \ - 128, 128, 128, 128, 128, 128, 128, 128, \ - 123, 123, 123, 123, 124, 124, 124, 124, \ - 121, 121, 121, 121, 122, 122, 122, 122, \ - 126, 126, 126, 126, 126, 126, 126, 126, \ - 125, 125, 125, 125, 125, 125, 125, 125, \ - 148, 147, 150, 149, 144, 143, 146, 145, \ - 156, 155, 158, 157, 152, 151, 154, 153, \ - 138, 138, 139, 139, 136, 136, 137, 137, \ - 142, 142, 143, 143, 140, 140, 141, 141, \ - 213, 209, 221, 217, 197, 193, 205, 201, \ - 245, 241, 253, 249, 229, 225, 237, 233, \ - 170, 168, 174, 172, 162, 160, 166, 164, \ - 186, 184, 190, 188, 178, 176, 182, 180, \ - 129, 129, 129, 129, 129, 129, 129, 129, \ - 129, 129, 129, 129, 129, 129, 129, 129, \ - 128, 128, 128, 128, 128, 128, 128, 128, \ - 128, 128, 128, 128, 128, 128, 128, 128, \ - 133, 133, 133, 133, 132, 132, 132, 132, \ - 135, 135, 135, 135, 134, 134, 134, 134, \ - 130, 130, 130, 130, 130, 130, 130, 130, \ - 131, 131, 131, 131, 131, 131, 131, 131, \ +#define ALAW_TO_U8 \ + { \ + 108, 109, 106, 107, 112, 113, 110, 111, 100, 101, 98, 99, 104, \ + 105, 102, 103, 118, 118, 117, 117, 120, 120, 119, 119, \ + 114, 114, 113, 113, 116, 116, 115, 115, 43, 47, 35, 39, \ + 59, 63, 51, 55, 11, 15, 3, 7, 27, 31, 19, 23, 86, 88, 82, \ + 84, 94, 96, 90, 92, 70, 72, 66, 68, 78, 80, 74, 76, 127, \ + 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, \ + 127, 127, 127, 127, 128, 128, 128, 128, 128, 128, 128, \ + 128, 128, 128, 128, 128, 128, 128, 128, 128, 123, 123, \ + 123, 123, 124, 124, 124, 124, 121, 121, 121, 121, 122, \ + 122, 122, 122, 126, 126, 126, 126, 126, 126, 126, 126, \ + 125, 125, 125, 125, 125, 125, 125, 125, 148, 147, 150, \ + 149, 144, 143, 146, 145, 156, 155, 158, 157, 152, 151, \ + 154, 153, 138, 138, 139, 139, 136, 136, 137, 137, 142, \ + 142, 143, 143, 140, 140, 141, 141, 213, 209, 221, 217, \ + 197, 193, 205, 201, 245, 241, 253, 249, 229, 225, 237, \ + 233, 170, 168, 174, 172, 162, 160, 166, 164, 186, 184, \ + 190, 188, 178, 176, 182, 180, 129, 129, 129, 129, 129, \ + 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, 129, \ + 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, \ + 128, 128, 128, 128, 128, 133, 133, 133, 133, 132, 132, \ + 132, 132, 135, 135, 135, 135, 134, 134, 134, 134, 130, \ + 130, 130, 130, 130, 130, 130, 130, 131, 131, 131, 131, \ + 131, 131, 131, 131, \ } -#define U8_TO_ULAW { \ - 0, 0, 0, 0, 0, 1, 1, 1, \ - 1, 2, 2, 2, 2, 3, 3, 3, \ - 3, 4, 4, 4, 4, 5, 5, 5, \ - 5, 6, 6, 6, 6, 7, 7, 7, \ - 7, 8, 8, 8, 8, 9, 9, 9, \ - 9, 10, 10, 10, 10, 11, 11, 11, \ - 11, 12, 12, 12, 12, 13, 13, 13, \ - 13, 14, 14, 14, 14, 15, 15, 15, \ - 15, 16, 16, 17, 17, 18, 18, 19, \ - 19, 20, 20, 21, 21, 22, 22, 23, \ - 23, 24, 24, 25, 25, 26, 26, 27, \ - 27, 28, 28, 29, 29, 30, 30, 31, \ - 31, 32, 33, 34, 35, 36, 37, 38, \ - 39, 40, 41, 42, 43, 44, 45, 46, \ - 47, 49, 51, 53, 55, 57, 59, 61, \ - 63, 66, 70, 74, 78, 84, 92, 104, \ - 254, 231, 219, 211, 205, 201, 197, 193, \ - 190, 188, 186, 184, 182, 180, 178, 176, \ - 175, 174, 173, 172, 171, 170, 169, 168, \ - 167, 166, 165, 164, 163, 162, 161, 160, \ - 159, 159, 158, 158, 157, 157, 156, 156, \ - 155, 155, 154, 154, 153, 153, 152, 152, \ - 151, 151, 150, 150, 149, 149, 148, 148, \ - 147, 147, 146, 146, 145, 145, 144, 144, \ - 143, 143, 143, 143, 142, 142, 142, 142, \ - 141, 141, 141, 141, 140, 140, 140, 140, \ - 139, 139, 139, 139, 138, 138, 138, 138, \ - 137, 137, 137, 137, 136, 136, 136, 136, \ - 135, 135, 135, 135, 134, 134, 134, 134, \ - 133, 133, 133, 133, 132, 132, 132, 132, \ - 131, 131, 131, 131, 130, 130, 130, 130, \ - 129, 129, 129, 129, 128, 128, 128, 128, \ +#define U8_TO_ULAW \ + { \ + 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, \ + 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 9, 9, 9, \ + 9, 10, 10, 10, 10, 11, 11, 11, 11, 12, 12, 12, 12, 13, 13, \ + 13, 13, 14, 14, 14, 14, 15, 15, 15, 15, 16, 16, 17, 17, \ + 18, 18, 19, 19, 20, 20, 21, 21, 22, 22, 23, 23, 24, 24, \ + 25, 25, 26, 26, 27, 27, 28, 28, 29, 29, 30, 30, 31, 31, \ + 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, \ + 46, 47, 49, 51, 53, 55, 57, 59, 61, 63, 66, 70, 74, 78, \ + 84, 92, 104, 254, 231, 219, 211, 205, 201, 197, 193, 190, \ + 188, 186, 184, 182, 180, 178, 176, 175, 174, 173, 172, \ + 171, 170, 169, 168, 167, 166, 165, 164, 163, 162, 161, \ + 160, 159, 159, 158, 158, 157, 157, 156, 156, 155, 155, \ + 154, 154, 153, 153, 152, 152, 151, 151, 150, 150, 149, \ + 149, 148, 148, 147, 147, 146, 146, 145, 145, 144, 144, \ + 143, 143, 143, 143, 142, 142, 142, 142, 141, 141, 141, \ + 141, 140, 140, 140, 140, 139, 139, 139, 139, 138, 138, \ + 138, 138, 137, 137, 137, 137, 136, 136, 136, 136, 135, \ + 135, 135, 135, 134, 134, 134, 134, 133, 133, 133, 133, \ + 132, 132, 132, 132, 131, 131, 131, 131, 130, 130, 130, \ + 130, 129, 129, 129, 129, 128, 128, 128, 128, \ } -#define U8_TO_ALAW { \ - 42, 42, 42, 42, 42, 43, 43, 43, \ - 43, 40, 40, 40, 40, 41, 41, 41, \ - 41, 46, 46, 46, 46, 47, 47, 47, \ - 47, 44, 44, 44, 44, 45, 45, 45, \ - 45, 34, 34, 34, 34, 35, 35, 35, \ - 35, 32, 32, 32, 32, 33, 33, 33, \ - 33, 38, 38, 38, 38, 39, 39, 39, \ - 39, 36, 36, 36, 36, 37, 37, 37, \ - 37, 58, 58, 59, 59, 56, 56, 57, \ - 57, 62, 62, 63, 63, 60, 60, 61, \ - 61, 50, 50, 51, 51, 48, 48, 49, \ - 49, 54, 54, 55, 55, 52, 52, 53, \ - 53, 10, 11, 8, 9, 14, 15, 12, \ - 13, 2, 3, 0, 1, 6, 7, 4, \ - 5, 24, 30, 28, 18, 16, 22, 20, \ - 106, 110, 98, 102, 122, 114, 75, 90, \ - 213, 197, 245, 253, 229, 225, 237, 233, \ - 149, 151, 145, 147, 157, 159, 153, 155, \ - 133, 132, 135, 134, 129, 128, 131, 130, \ - 141, 140, 143, 142, 137, 136, 139, 138, \ - 181, 181, 180, 180, 183, 183, 182, 182, \ - 177, 177, 176, 176, 179, 179, 178, 178, \ - 189, 189, 188, 188, 191, 191, 190, 190, \ - 185, 185, 184, 184, 187, 187, 186, 186, \ - 165, 165, 165, 165, 164, 164, 164, 164, \ - 167, 167, 167, 167, 166, 166, 166, 166, \ - 161, 161, 161, 161, 160, 160, 160, 160, \ - 163, 163, 163, 163, 162, 162, 162, 162, \ - 173, 173, 173, 173, 172, 172, 172, 172, \ - 175, 175, 175, 175, 174, 174, 174, 174, \ - 169, 169, 169, 169, 168, 168, 168, 168, \ - 171, 171, 171, 171, 170, 170, 170, 170, \ +#define U8_TO_ALAW \ + { \ + 42, 42, 42, 42, 42, 43, 43, 43, 43, 40, 40, 40, 40, 41, 41, \ + 41, 41, 46, 46, 46, 46, 47, 47, 47, 47, 44, 44, 44, 44, \ + 45, 45, 45, 45, 34, 34, 34, 34, 35, 35, 35, 35, 32, 32, \ + 32, 32, 33, 33, 33, 33, 38, 38, 38, 38, 39, 39, 39, 39, \ + 36, 36, 36, 36, 37, 37, 37, 37, 58, 58, 59, 59, 56, 56, \ + 57, 57, 62, 62, 63, 63, 60, 60, 61, 61, 50, 50, 51, 51, \ + 48, 48, 49, 49, 54, 54, 55, 55, 52, 52, 53, 53, 10, 11, 8, \ + 9, 14, 15, 12, 13, 2, 3, 0, 1, 6, 7, 4, 5, 24, 30, 28, 18, \ + 16, 22, 20, 106, 110, 98, 102, 122, 114, 75, 90, 213, 197, \ + 245, 253, 229, 225, 237, 233, 149, 151, 145, 147, 157, \ + 159, 153, 155, 133, 132, 135, 134, 129, 128, 131, 130, \ + 141, 140, 143, 142, 137, 136, 139, 138, 181, 181, 180, \ + 180, 183, 183, 182, 182, 177, 177, 176, 176, 179, 179, \ + 178, 178, 189, 189, 188, 188, 191, 191, 190, 190, 185, \ + 185, 184, 184, 187, 187, 186, 186, 165, 165, 165, 165, \ + 164, 164, 164, 164, 167, 167, 167, 167, 166, 166, 166, \ + 166, 161, 161, 161, 161, 160, 160, 160, 160, 163, 163, \ + 163, 163, 162, 162, 162, 162, 173, 173, 173, 173, 172, \ + 172, 172, 172, 175, 175, 175, 175, 174, 174, 174, 174, \ + 169, 169, 169, 169, 168, 168, 168, 168, 171, 171, 171, \ + 171, 170, 170, 170, 170, \ } -#define _G711_TO_INTPCM(t, v) ((intpcm_t) \ - ((int8_t)((t)[(uint8_t)(v)] ^ 0x80))) +#define _G711_TO_INTPCM(t, v) ((intpcm_t)((int8_t)((t)[(uint8_t)(v)] ^ 0x80))) -#define _INTPCM_TO_G711(t, v) ((t)[(uint8_t)((v) ^ 0x80)]) +#define _INTPCM_TO_G711(t, v) ((t)[(uint8_t)((v) ^ 0x80)]) -#define G711_DECLARE_TABLE(t) \ -static const struct { \ - const uint8_t ulaw_to_u8[G711_TABLE_SIZE]; \ - const uint8_t alaw_to_u8[G711_TABLE_SIZE]; \ - const uint8_t u8_to_ulaw[G711_TABLE_SIZE]; \ - const uint8_t u8_to_alaw[G711_TABLE_SIZE]; \ -} t = { \ - ULAW_TO_U8, ALAW_TO_U8, \ - U8_TO_ULAW, U8_TO_ALAW \ -} +#define G711_DECLARE_TABLE(t) \ + static const struct { \ + const uint8_t ulaw_to_u8[G711_TABLE_SIZE]; \ + const uint8_t alaw_to_u8[G711_TABLE_SIZE]; \ + const uint8_t u8_to_ulaw[G711_TABLE_SIZE]; \ + const uint8_t u8_to_alaw[G711_TABLE_SIZE]; \ + } t = { ULAW_TO_U8, ALAW_TO_U8, U8_TO_ULAW, U8_TO_ALAW } -#define G711_DECLARE_OP(t) \ -static __inline intpcm_t \ -pcm_read_ulaw(uint8_t v) \ -{ \ - \ - return (_G711_TO_INTPCM((t).ulaw_to_u8, v)); \ -} \ - \ -static __inline intpcm_t \ -pcm_read_alaw(uint8_t v) \ -{ \ - \ - return (_G711_TO_INTPCM((t).alaw_to_u8, v)); \ -} \ - \ -static __inline void \ -pcm_write_ulaw(uint8_t *dst, intpcm_t v) \ -{ \ - \ - *dst = _INTPCM_TO_G711((t).u8_to_ulaw, v); \ -} \ - \ -static __inline void \ -pcm_write_alaw(uint8_t *dst, intpcm_t v) \ -{ \ - \ - *dst = _INTPCM_TO_G711((t).u8_to_alaw, v); \ -} +#define G711_DECLARE_OP(t) \ + static __inline intpcm_t pcm_read_ulaw(uint8_t v) \ + { \ + \ + return (_G711_TO_INTPCM((t).ulaw_to_u8, v)); \ + } \ + \ + static __inline intpcm_t pcm_read_alaw(uint8_t v) \ + { \ + \ + return (_G711_TO_INTPCM((t).alaw_to_u8, v)); \ + } \ + \ + static __inline void pcm_write_ulaw(uint8_t *dst, intpcm_t v) \ + { \ + \ + *dst = _INTPCM_TO_G711((t).u8_to_ulaw, v); \ + } \ + \ + static __inline void pcm_write_alaw(uint8_t *dst, intpcm_t v) \ + { \ + \ + *dst = _INTPCM_TO_G711((t).u8_to_alaw, v); \ + } -#define G711_DECLARE(t) \ - G711_DECLARE_TABLE(t); \ +#define G711_DECLARE(t) \ + G711_DECLARE_TABLE(t); \ G711_DECLARE_OP(t) -#endif /* !_SND_G711_H_ */ +#endif /* !_SND_G711_H_ */ Index: sys/dev/sound/pcm/intpcm.h =================================================================== --- sys/dev/sound/pcm/intpcm.h +++ sys/dev/sound/pcm/intpcm.h @@ -35,101 +35,93 @@ extern intpcm_read_t *feeder_format_read_op(uint32_t); extern intpcm_write_t *feeder_format_write_op(uint32_t); -#define INTPCM_DECLARE_OP_WRITE(SIGN, BIT, ENDIAN, SHIFT) \ -static __inline void \ -intpcm_write_##SIGN##BIT##ENDIAN(uint8_t *dst, intpcm_t v) \ -{ \ - \ - _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, v >> SHIFT); \ -} +#define INTPCM_DECLARE_OP_WRITE(SIGN, BIT, ENDIAN, SHIFT) \ + static __inline void intpcm_write_##SIGN##BIT##ENDIAN(uint8_t *dst, \ + intpcm_t v) \ + { \ + \ + _PCM_WRITE_##SIGN##BIT##_##ENDIAN(dst, v >> SHIFT); \ + } -#define INTPCM_DECLARE_OP_8(SIGN, ENDIAN) \ -static __inline intpcm_t \ -intpcm_read_##SIGN##8##ENDIAN(uint8_t *src) \ -{ \ - \ - return (_PCM_READ_##SIGN##8##_##ENDIAN(src) << 24); \ -} \ -INTPCM_DECLARE_OP_WRITE(SIGN, 8, ENDIAN, 24) +#define INTPCM_DECLARE_OP_8(SIGN, ENDIAN) \ + static __inline intpcm_t intpcm_read_##SIGN##8##ENDIAN(uint8_t *src) \ + { \ + \ + return (_PCM_READ_##SIGN##8##_##ENDIAN(src) << 24); \ + } \ + INTPCM_DECLARE_OP_WRITE(SIGN, 8, ENDIAN, 24) -#define INTPCM_DECLARE_OP_16(SIGN, ENDIAN) \ -static __inline intpcm_t \ -intpcm_read_##SIGN##16##ENDIAN(uint8_t *src) \ -{ \ - \ - return (_PCM_READ_##SIGN##16##_##ENDIAN(src) << 16); \ -} \ -INTPCM_DECLARE_OP_WRITE(SIGN, 16, ENDIAN, 16) +#define INTPCM_DECLARE_OP_16(SIGN, ENDIAN) \ + static __inline intpcm_t intpcm_read_##SIGN##16##ENDIAN(uint8_t *src) \ + { \ + \ + return (_PCM_READ_##SIGN##16##_##ENDIAN(src) << 16); \ + } \ + INTPCM_DECLARE_OP_WRITE(SIGN, 16, ENDIAN, 16) -#define INTPCM_DECLARE_OP_24(SIGN, ENDIAN) \ -static __inline intpcm_t \ -intpcm_read_##SIGN##24##ENDIAN(uint8_t *src) \ -{ \ - \ - return (_PCM_READ_##SIGN##24##_##ENDIAN(src) << 8); \ -} \ -INTPCM_DECLARE_OP_WRITE(SIGN, 24, ENDIAN, 8) +#define INTPCM_DECLARE_OP_24(SIGN, ENDIAN) \ + static __inline intpcm_t intpcm_read_##SIGN##24##ENDIAN(uint8_t *src) \ + { \ + \ + return (_PCM_READ_##SIGN##24##_##ENDIAN(src) << 8); \ + } \ + INTPCM_DECLARE_OP_WRITE(SIGN, 24, ENDIAN, 8) -#define INTPCM_DECLARE_OP_32(SIGN, ENDIAN) \ -static __inline intpcm_t \ -intpcm_read_##SIGN##32##ENDIAN(uint8_t *src) \ -{ \ - \ - return (_PCM_READ_##SIGN##32##_##ENDIAN(src)); \ -} \ - \ -static __inline void \ -intpcm_write_##SIGN##32##ENDIAN(uint8_t *dst, intpcm_t v) \ -{ \ - \ - _PCM_WRITE_##SIGN##32##_##ENDIAN(dst, v); \ -} +#define INTPCM_DECLARE_OP_32(SIGN, ENDIAN) \ + static __inline intpcm_t intpcm_read_##SIGN##32##ENDIAN(uint8_t *src) \ + { \ + \ + return (_PCM_READ_##SIGN##32##_##ENDIAN(src)); \ + } \ + \ + static __inline void intpcm_write_##SIGN##32##ENDIAN(uint8_t *dst, \ + intpcm_t v) \ + { \ + \ + _PCM_WRITE_##SIGN##32##_##ENDIAN(dst, v); \ + } -#define INTPCM_DECLARE(t) \ - \ -G711_DECLARE_TABLE(t); \ - \ -static __inline intpcm_t \ -intpcm_read_ulaw(uint8_t *src) \ -{ \ - \ - return (_G711_TO_INTPCM((t).ulaw_to_u8, *src) << 24); \ -} \ - \ -static __inline intpcm_t \ -intpcm_read_alaw(uint8_t *src) \ -{ \ - \ - return (_G711_TO_INTPCM((t).alaw_to_u8, *src) << 24); \ -} \ - \ -static __inline void \ -intpcm_write_ulaw(uint8_t *dst, intpcm_t v) \ -{ \ - \ - *dst = _INTPCM_TO_G711((t).u8_to_ulaw, v >> 24); \ -} \ - \ -static __inline void \ -intpcm_write_alaw(uint8_t *dst, intpcm_t v) \ -{ \ - \ - *dst = _INTPCM_TO_G711((t).u8_to_alaw, v >> 24); \ -} \ - \ -INTPCM_DECLARE_OP_8(S, NE) \ -INTPCM_DECLARE_OP_16(S, LE) \ -INTPCM_DECLARE_OP_16(S, BE) \ -INTPCM_DECLARE_OP_24(S, LE) \ -INTPCM_DECLARE_OP_24(S, BE) \ -INTPCM_DECLARE_OP_32(S, LE) \ -INTPCM_DECLARE_OP_32(S, BE) \ -INTPCM_DECLARE_OP_8(U, NE) \ -INTPCM_DECLARE_OP_16(U, LE) \ -INTPCM_DECLARE_OP_16(U, BE) \ -INTPCM_DECLARE_OP_24(U, LE) \ -INTPCM_DECLARE_OP_24(U, BE) \ -INTPCM_DECLARE_OP_32(U, LE) \ -INTPCM_DECLARE_OP_32(U, BE) +#define INTPCM_DECLARE(t) \ + \ + G711_DECLARE_TABLE(t); \ + \ + static __inline intpcm_t intpcm_read_ulaw(uint8_t *src) \ + { \ + \ + return (_G711_TO_INTPCM((t).ulaw_to_u8, *src) << 24); \ + } \ + \ + static __inline intpcm_t intpcm_read_alaw(uint8_t *src) \ + { \ + \ + return (_G711_TO_INTPCM((t).alaw_to_u8, *src) << 24); \ + } \ + \ + static __inline void intpcm_write_ulaw(uint8_t *dst, intpcm_t v) \ + { \ + \ + *dst = _INTPCM_TO_G711((t).u8_to_ulaw, v >> 24); \ + } \ + \ + static __inline void intpcm_write_alaw(uint8_t *dst, intpcm_t v) \ + { \ + \ + *dst = _INTPCM_TO_G711((t).u8_to_alaw, v >> 24); \ + } \ + \ + INTPCM_DECLARE_OP_8(S, NE) \ + INTPCM_DECLARE_OP_16(S, LE) \ + INTPCM_DECLARE_OP_16(S, BE) \ + INTPCM_DECLARE_OP_24(S, LE) \ + INTPCM_DECLARE_OP_24(S, BE) \ + INTPCM_DECLARE_OP_32(S, LE) \ + INTPCM_DECLARE_OP_32(S, BE) \ + INTPCM_DECLARE_OP_8(U, NE) \ + INTPCM_DECLARE_OP_16(U, LE) \ + INTPCM_DECLARE_OP_16(U, BE) \ + INTPCM_DECLARE_OP_24(U, LE) \ + INTPCM_DECLARE_OP_24(U, BE) \ + INTPCM_DECLARE_OP_32(U, LE) \ + INTPCM_DECLARE_OP_32(U, BE) -#endif /* !_SND_INTPCM_H_ */ +#endif /* !_SND_INTPCM_H_ */ Index: sys/dev/sound/pcm/matrix.h =================================================================== --- sys/dev/sound/pcm/matrix.h +++ sys/dev/sound/pcm/matrix.h @@ -31,156 +31,146 @@ #undef SND_MULTICHANNEL #ifndef SND_OLDSTEREO -#define SND_MULTICHANNEL 1 +#define SND_MULTICHANNEL 1 #endif /* * XXX = unused, but part of the definition (will be used someday, maybe). */ -#define SND_CHN_T_FL 0 /* Front Left */ -#define SND_CHN_T_FR 1 /* Front Right */ -#define SND_CHN_T_FC 2 /* Front Center */ -#define SND_CHN_T_LF 3 /* Low Frequency */ -#define SND_CHN_T_BL 4 /* Back Left */ -#define SND_CHN_T_BR 5 /* Back Right */ -#define SND_CHN_T_FLC 6 /* Front Left Center XXX */ -#define SND_CHN_T_FRC 7 /* Front Right Center XXX */ -#define SND_CHN_T_BC 8 /* Back Center */ -#define SND_CHN_T_SL 9 /* Side Left */ -#define SND_CHN_T_SR 10 /* Side Right */ -#define SND_CHN_T_TC 11 /* Top Center XXX */ -#define SND_CHN_T_TFL 12 /* Top Front Left XXX */ -#define SND_CHN_T_TFC 13 /* Top Front Center XXX */ -#define SND_CHN_T_TFR 14 /* Top Front Right XXX */ -#define SND_CHN_T_TBL 15 /* Top Back Left XXX */ -#define SND_CHN_T_TBC 16 /* Top Back Center XXX */ -#define SND_CHN_T_TBR 17 /* Top Back Right XXX */ -#define SND_CHN_T_MAX 18 /* Maximum channels */ - -#define SND_CHN_T_ZERO (SND_CHN_T_MAX + 1) /* Zero samples */ - -#define SND_CHN_T_LABELS { \ - "fl", "fr", "fc", "lf", "bl", "br", \ - "flc", "frc", "bc", "sl", "sr", "tc", \ - "tfl", "tfc", "tfr", "tbl", "tbc", "tbr" \ -} - -#define SND_CHN_T_NAMES { \ - "Front Left", "Front Right", "Front Center", \ - "Low Frequency Effects", \ - "Back Left", "Back Right", \ - "Front Left Center", "Front Right Center", \ - "Back Center", \ - "Side Left", "Side Right", \ - "Top Center", \ - "Top Front Left", "Top Front Center", "Top Front Right", \ - "Top Back Left", "Top Back Center", "Top Back Right" \ -} - -#define SND_CHN_T_MASK_FL (1 << SND_CHN_T_FL) -#define SND_CHN_T_MASK_FR (1 << SND_CHN_T_FR) -#define SND_CHN_T_MASK_FC (1 << SND_CHN_T_FC) -#define SND_CHN_T_MASK_LF (1 << SND_CHN_T_LF) -#define SND_CHN_T_MASK_BL (1 << SND_CHN_T_BL) -#define SND_CHN_T_MASK_BR (1 << SND_CHN_T_BR) -#define SND_CHN_T_MASK_FLC (1 << SND_CHN_T_FLC) -#define SND_CHN_T_MASK_FRC (1 << SND_CHN_T_FRC) -#define SND_CHN_T_MASK_BC (1 << SND_CHN_T_BC) -#define SND_CHN_T_MASK_SL (1 << SND_CHN_T_SL) -#define SND_CHN_T_MASK_SR (1 << SND_CHN_T_SR) -#define SND_CHN_T_MASK_TC (1 << SND_CHN_T_TC) -#define SND_CHN_T_MASK_TFL (1 << SND_CHN_T_TFL) -#define SND_CHN_T_MASK_TFC (1 << SND_CHN_T_TFC) -#define SND_CHN_T_MASK_TFR (1 << SND_CHN_T_TFR) -#define SND_CHN_T_MASK_TBL (1 << SND_CHN_T_TBL) -#define SND_CHN_T_MASK_TBC (1 << SND_CHN_T_TBC) -#define SND_CHN_T_MASK_TBR (1 << SND_CHN_T_TBR) - -#define SND_CHN_LEFT_MASK (SND_CHN_T_MASK_FL | \ - SND_CHN_T_MASK_BL | \ - SND_CHN_T_MASK_FLC | \ - SND_CHN_T_MASK_SL | \ - SND_CHN_T_MASK_TFL | \ - SND_CHN_T_MASK_TBL) - -#define SND_CHN_RIGHT_MASK (SND_CHN_T_MASK_FR | \ - SND_CHN_T_MASK_BR | \ - SND_CHN_T_MASK_FRC | \ - SND_CHN_T_MASK_SR | \ - SND_CHN_T_MASK_TFR | \ - SND_CHN_T_MASK_TBR) - -#define SND_CHN_CENTER_MASK (SND_CHN_T_MASK_FC | \ - SND_CHN_T_MASK_BC | \ - SND_CHN_T_MASK_TC | \ - SND_CHN_T_MASK_TFC | \ - SND_CHN_T_MASK_TBC | \ - SND_CHN_T_MASK_LF) /* XXX what?!? */ +#define SND_CHN_T_FL 0 /* Front Left */ +#define SND_CHN_T_FR 1 /* Front Right */ +#define SND_CHN_T_FC 2 /* Front Center */ +#define SND_CHN_T_LF 3 /* Low Frequency */ +#define SND_CHN_T_BL 4 /* Back Left */ +#define SND_CHN_T_BR 5 /* Back Right */ +#define SND_CHN_T_FLC 6 /* Front Left Center XXX */ +#define SND_CHN_T_FRC 7 /* Front Right Center XXX */ +#define SND_CHN_T_BC 8 /* Back Center */ +#define SND_CHN_T_SL 9 /* Side Left */ +#define SND_CHN_T_SR 10 /* Side Right */ +#define SND_CHN_T_TC 11 /* Top Center XXX */ +#define SND_CHN_T_TFL 12 /* Top Front Left XXX */ +#define SND_CHN_T_TFC 13 /* Top Front Center XXX */ +#define SND_CHN_T_TFR 14 /* Top Front Right XXX */ +#define SND_CHN_T_TBL 15 /* Top Back Left XXX */ +#define SND_CHN_T_TBC 16 /* Top Back Center XXX */ +#define SND_CHN_T_TBR 17 /* Top Back Right XXX */ +#define SND_CHN_T_MAX 18 /* Maximum channels */ + +#define SND_CHN_T_ZERO (SND_CHN_T_MAX + 1) /* Zero samples */ + +#define SND_CHN_T_LABELS \ + { \ + "fl", "fr", "fc", "lf", "bl", "br", "flc", "frc", "bc", "sl", \ + "sr", "tc", "tfl", "tfc", "tfr", "tbl", "tbc", "tbr" \ + } + +#define SND_CHN_T_NAMES \ + { \ + "Front Left", "Front Right", "Front Center", \ + "Low Frequency Effects", "Back Left", "Back Right", \ + "Front Left Center", "Front Right Center", "Back Center", \ + "Side Left", "Side Right", "Top Center", "Top Front Left", \ + "Top Front Center", "Top Front Right", "Top Back Left", \ + "Top Back Center", "Top Back Right" \ + } + +#define SND_CHN_T_MASK_FL (1 << SND_CHN_T_FL) +#define SND_CHN_T_MASK_FR (1 << SND_CHN_T_FR) +#define SND_CHN_T_MASK_FC (1 << SND_CHN_T_FC) +#define SND_CHN_T_MASK_LF (1 << SND_CHN_T_LF) +#define SND_CHN_T_MASK_BL (1 << SND_CHN_T_BL) +#define SND_CHN_T_MASK_BR (1 << SND_CHN_T_BR) +#define SND_CHN_T_MASK_FLC (1 << SND_CHN_T_FLC) +#define SND_CHN_T_MASK_FRC (1 << SND_CHN_T_FRC) +#define SND_CHN_T_MASK_BC (1 << SND_CHN_T_BC) +#define SND_CHN_T_MASK_SL (1 << SND_CHN_T_SL) +#define SND_CHN_T_MASK_SR (1 << SND_CHN_T_SR) +#define SND_CHN_T_MASK_TC (1 << SND_CHN_T_TC) +#define SND_CHN_T_MASK_TFL (1 << SND_CHN_T_TFL) +#define SND_CHN_T_MASK_TFC (1 << SND_CHN_T_TFC) +#define SND_CHN_T_MASK_TFR (1 << SND_CHN_T_TFR) +#define SND_CHN_T_MASK_TBL (1 << SND_CHN_T_TBL) +#define SND_CHN_T_MASK_TBC (1 << SND_CHN_T_TBC) +#define SND_CHN_T_MASK_TBR (1 << SND_CHN_T_TBR) + +#define SND_CHN_LEFT_MASK \ + (SND_CHN_T_MASK_FL | SND_CHN_T_MASK_BL | SND_CHN_T_MASK_FLC | \ + SND_CHN_T_MASK_SL | SND_CHN_T_MASK_TFL | SND_CHN_T_MASK_TBL) + +#define SND_CHN_RIGHT_MASK \ + (SND_CHN_T_MASK_FR | SND_CHN_T_MASK_BR | SND_CHN_T_MASK_FRC | \ + SND_CHN_T_MASK_SR | SND_CHN_T_MASK_TFR | SND_CHN_T_MASK_TBR) + +#define SND_CHN_CENTER_MASK \ + (SND_CHN_T_MASK_FC | SND_CHN_T_MASK_BC | SND_CHN_T_MASK_TC | \ + SND_CHN_T_MASK_TFC | SND_CHN_T_MASK_TBC | \ + SND_CHN_T_MASK_LF) /* XXX what?!? */ /* * Matrix identity. */ /* 1 @ Mono 1.0 */ -#define SND_CHN_MATRIX_1_0 0 -#define SND_CHN_MATRIX_1 SND_CHN_MATRIX_1_0 +#define SND_CHN_MATRIX_1_0 0 +#define SND_CHN_MATRIX_1 SND_CHN_MATRIX_1_0 /* 2 @ Stereo 2.0 */ -#define SND_CHN_MATRIX_2_0 1 -#define SND_CHN_MATRIX_2 SND_CHN_MATRIX_2_0 +#define SND_CHN_MATRIX_2_0 1 +#define SND_CHN_MATRIX_2 SND_CHN_MATRIX_2_0 /* 3 @ 2.1 (lfe), 3.0 (rear center, DEFAULT) */ -#define SND_CHN_MATRIX_2_1 2 -#define SND_CHN_MATRIX_3_0 3 -#define SND_CHN_MATRIX_3 SND_CHN_MATRIX_3_0 +#define SND_CHN_MATRIX_2_1 2 +#define SND_CHN_MATRIX_3_0 3 +#define SND_CHN_MATRIX_3 SND_CHN_MATRIX_3_0 /* 4 @ 3.1 (lfe), 4.0 (Quadraphonic, DEFAULT) */ -#define SND_CHN_MATRIX_3_1 4 -#define SND_CHN_MATRIX_4_0 5 -#define SND_CHN_MATRIX_4 SND_CHN_MATRIX_4_0 +#define SND_CHN_MATRIX_3_1 4 +#define SND_CHN_MATRIX_4_0 5 +#define SND_CHN_MATRIX_4 SND_CHN_MATRIX_4_0 /* 5 @ 4.1 (lfe), 5.0 (center, DEFAULT) */ -#define SND_CHN_MATRIX_4_1 6 -#define SND_CHN_MATRIX_5_0 7 -#define SND_CHN_MATRIX_5 SND_CHN_MATRIX_5_0 +#define SND_CHN_MATRIX_4_1 6 +#define SND_CHN_MATRIX_5_0 7 +#define SND_CHN_MATRIX_5 SND_CHN_MATRIX_5_0 /* 6 @ 5.1 (lfe, DEFAULT), 6.0 (rear center) */ -#define SND_CHN_MATRIX_5_1 8 -#define SND_CHN_MATRIX_6_0 9 -#define SND_CHN_MATRIX_6 SND_CHN_MATRIX_5_1 +#define SND_CHN_MATRIX_5_1 8 +#define SND_CHN_MATRIX_6_0 9 +#define SND_CHN_MATRIX_6 SND_CHN_MATRIX_5_1 /* 7 @ 6.1 (lfe, DEFAULT), 7.0 */ -#define SND_CHN_MATRIX_6_1 10 -#define SND_CHN_MATRIX_7_0 11 -#define SND_CHN_MATRIX_7 SND_CHN_MATRIX_6_1 +#define SND_CHN_MATRIX_6_1 10 +#define SND_CHN_MATRIX_7_0 11 +#define SND_CHN_MATRIX_7 SND_CHN_MATRIX_6_1 /* 8 @ 7.1 (lfe) */ -#define SND_CHN_MATRIX_7_1 12 -#define SND_CHN_MATRIX_8 SND_CHN_MATRIX_7_1 +#define SND_CHN_MATRIX_7_1 12 +#define SND_CHN_MATRIX_8 SND_CHN_MATRIX_7_1 -#define SND_CHN_MATRIX_MAX 13 +#define SND_CHN_MATRIX_MAX 13 -#define SND_CHN_MATRIX_BEGIN SND_CHN_MATRIX_1_0 -#define SND_CHN_MATRIX_END SND_CHN_MATRIX_7_1 +#define SND_CHN_MATRIX_BEGIN SND_CHN_MATRIX_1_0 +#define SND_CHN_MATRIX_END SND_CHN_MATRIX_7_1 /* Custom matrix identity */ -#define SND_CHN_MATRIX_DRV -4 /* driver own identity */ -#define SND_CHN_MATRIX_PCMCHANNEL -3 /* PCM channel identity */ -#define SND_CHN_MATRIX_MISC -2 /* misc, custom defined */ -#define SND_CHN_MATRIX_UNKNOWN -1 /* unknown */ +#define SND_CHN_MATRIX_DRV -4 /* driver own identity */ +#define SND_CHN_MATRIX_PCMCHANNEL -3 /* PCM channel identity */ +#define SND_CHN_MATRIX_MISC -2 /* misc, custom defined */ +#define SND_CHN_MATRIX_UNKNOWN -1 /* unknown */ -#define SND_CHN_T_VOL_0DB SND_CHN_T_MAX -#define SND_CHN_T_VOL_MAX (SND_CHN_T_VOL_0DB + 1) +#define SND_CHN_T_VOL_0DB SND_CHN_T_MAX +#define SND_CHN_T_VOL_MAX (SND_CHN_T_VOL_0DB + 1) -#define SND_CHN_T_BEGIN SND_CHN_T_FL -#define SND_CHN_T_END SND_CHN_T_TBR -#define SND_CHN_T_STEP 1 -#define SND_CHN_MIN 1 +#define SND_CHN_T_BEGIN SND_CHN_T_FL +#define SND_CHN_T_END SND_CHN_T_TBR +#define SND_CHN_T_STEP 1 +#define SND_CHN_MIN 1 #ifdef SND_MULTICHANNEL -#define SND_CHN_MAX 8 +#define SND_CHN_MAX 8 #else -#define SND_CHN_MAX 2 +#define SND_CHN_MAX 2 #endif /* @@ -189,32 +179,31 @@ * chn_setvolume_matrix() or the equivalent CHN_SETVOLUME() macros is * used (see channel.c). */ -#define SND_VOL_C_MASTER 0 -#define SND_VOL_C_PCM 1 -#define SND_VOL_C_PCM_VAL 2 -#define SND_VOL_C_MAX 3 +#define SND_VOL_C_MASTER 0 +#define SND_VOL_C_PCM 1 +#define SND_VOL_C_PCM_VAL 2 +#define SND_VOL_C_MAX 3 -#define SND_VOL_C_BEGIN SND_VOL_C_PCM -#define SND_VOL_C_END SND_VOL_C_PCM -#define SND_VOL_C_STEP 2 +#define SND_VOL_C_BEGIN SND_VOL_C_PCM +#define SND_VOL_C_END SND_VOL_C_PCM +#define SND_VOL_C_STEP 2 -#define SND_VOL_C_VAL(x) ((x) + 1) +#define SND_VOL_C_VAL(x) ((x) + 1) -#define SND_VOL_0DB_MIN 1 -#define SND_VOL_0DB_MAX 100 +#define SND_VOL_0DB_MIN 1 +#define SND_VOL_0DB_MAX 100 -#define SND_VOL_0DB_MASTER 100 -#define SND_VOL_0DB_PCM 45 +#define SND_VOL_0DB_MASTER 100 +#define SND_VOL_0DB_PCM 45 -#define SND_VOL_RESOLUTION 8 -#define SND_VOL_FLAT (1 << SND_VOL_RESOLUTION) +#define SND_VOL_RESOLUTION 8 +#define SND_VOL_FLAT (1 << SND_VOL_RESOLUTION) -#define SND_VOL_CALC_SAMPLE(x, y) (((x) * (y)) >> SND_VOL_RESOLUTION) +#define SND_VOL_CALC_SAMPLE(x, y) (((x) * (y)) >> SND_VOL_RESOLUTION) -#define SND_VOL_CALC_VAL(x, y, z) \ - (((((x)[y][z] << SND_VOL_RESOLUTION) / \ - (x)[y][SND_CHN_T_VOL_0DB]) * \ - (x)[SND_VOL_C_MASTER][z]) / \ - (x)[SND_VOL_C_MASTER][SND_CHN_T_VOL_0DB]) \ +#define SND_VOL_CALC_VAL(x, y, z) \ + (((((x)[y][z] << SND_VOL_RESOLUTION) / (x)[y][SND_CHN_T_VOL_0DB]) * \ + (x)[SND_VOL_C_MASTER][z]) / \ + (x)[SND_VOL_C_MASTER][SND_CHN_T_VOL_0DB]) -#endif /* !_SND_MATRIX_H_ */ +#endif /* !_SND_MATRIX_H_ */ Index: sys/dev/sound/pcm/matrix_map.h =================================================================== --- sys/dev/sound/pcm/matrix_map.h +++ sys/dev/sound/pcm/matrix_map.h @@ -63,8 +63,9 @@ * */ -#define SND_CHN_MATRIX_MAP_1_0 { \ - .id = SND_CHN_MATRIX_1_0, \ +#define SND_CHN_MATRIX_MAP_1_0 \ + { \ + .id = SND_CHN_MATRIX_1_0, \ .channels = 1, \ .ext = 0, \ .map = { \ @@ -86,11 +87,12 @@ .mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \ SND_CHN_T_MASK_FC, \ .offset = { 0, 0, 0, 0, 0, 0, -1, -1, 0, \ - 0, 0, -1, -1, -1, -1, -1, -1, -1 } \ -} + 0, 0, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_2_0 { \ - .id = SND_CHN_MATRIX_2_0, \ +#define SND_CHN_MATRIX_MAP_2_0 \ + { \ + .id = SND_CHN_MATRIX_2_0, \ .channels = 2, \ .ext = 0, \ .map = { \ @@ -117,11 +119,12 @@ }, \ .mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR, \ .offset = { 0, 1, -1, -1, -1, -1, -1, -1, -1, \ - -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ -} + -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_2_1 { \ - .id = SND_CHN_MATRIX_2_1, \ +#define SND_CHN_MATRIX_MAP_2_1 \ + { \ + .id = SND_CHN_MATRIX_2_1, \ .channels = 3, \ .ext = 1, \ .map = { \ @@ -154,11 +157,12 @@ .mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \ SND_CHN_T_MASK_LF, \ .offset = { 0, 1, -1, 2, -1, -1, -1, -1, -1, \ - -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ -} + -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_3_0 { /* 3 channels default */ \ - .id = SND_CHN_MATRIX_3_0, \ +#define SND_CHN_MATRIX_MAP_3_0 \ + { /* 3 channels default */ \ + .id = SND_CHN_MATRIX_3_0, \ .channels = 3, \ .ext = 0, \ .map = { \ @@ -192,11 +196,12 @@ .mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \ SND_CHN_T_MASK_BC, \ .offset = { 0, 1, -1, -1, -1, -1, -1, -1, 2, \ - -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ -} + -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_3_1 { \ - .id = SND_CHN_MATRIX_3_1, \ +#define SND_CHN_MATRIX_MAP_3_1 \ + { \ + .id = SND_CHN_MATRIX_3_1, \ .channels = 4, \ .ext = 1, \ .map = { \ @@ -235,11 +240,12 @@ .mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \ SND_CHN_T_MASK_LF | SND_CHN_T_MASK_BC, \ .offset = { 0, 1, -1, 2, -1, -1, -1, -1, 3, \ - -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ -} + -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_4_0 { \ - .id = SND_CHN_MATRIX_4_0, \ +#define SND_CHN_MATRIX_MAP_4_0 \ + { \ + .id = SND_CHN_MATRIX_4_0, \ .channels = 4, \ .ext = 0, \ .map = { \ @@ -279,11 +285,12 @@ .mask = SND_CHN_T_MASK_FL | SND_CHN_T_MASK_FR | \ SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR, \ .offset = { 0, 1, -1, -1, 2, 3, -1, -1, -1, \ - -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ -} + -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_4_1 { \ - .id = SND_CHN_MATRIX_4_1, \ +#define SND_CHN_MATRIX_MAP_4_1 \ + { \ + .id = SND_CHN_MATRIX_4_1, \ .channels = 5, \ .ext = 1, \ .map = { \ @@ -329,11 +336,12 @@ SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR | \ SND_CHN_T_MASK_LF, \ .offset = { 0, 1, -1, 4, 2, 3, -1, -1, -1, \ - -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ -} + -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_5_0 { /* 5 channels default */ \ - .id = SND_CHN_MATRIX_5_0, \ +#define SND_CHN_MATRIX_MAP_5_0 \ + { /* 5 channels default */ \ + .id = SND_CHN_MATRIX_5_0, \ .channels = 5, \ .ext = 0, \ .map = { \ @@ -379,11 +387,12 @@ SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR | \ SND_CHN_T_MASK_FC, \ .offset = { 0, 1, 4, -1, 2, 3, -1, -1, -1, \ - -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ -} + -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_5_1 { /* 6 channels default */ \ - .id = SND_CHN_MATRIX_5_1, \ +#define SND_CHN_MATRIX_MAP_5_1 \ + { /* 6 channels default */ \ + .id = SND_CHN_MATRIX_5_1, \ .channels = 6, \ .ext = 1, \ .map = { \ @@ -432,11 +441,12 @@ SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR | \ SND_CHN_T_MASK_FC | SND_CHN_T_MASK_LF, \ .offset = { 0, 1, 4, 5, 2, 3, -1, -1, -1, \ - -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ -} + -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_6_0 { \ - .id = SND_CHN_MATRIX_6_0, \ +#define SND_CHN_MATRIX_MAP_6_0 \ + { \ + .id = SND_CHN_MATRIX_6_0, \ .channels = 6, \ .ext = 0, \ .map = { \ @@ -487,11 +497,12 @@ SND_CHN_T_MASK_BL | SND_CHN_T_MASK_BR | \ SND_CHN_T_MASK_FC | SND_CHN_T_MASK_BC, \ .offset = { 0, 1, 4, -1, 2, 3, -1, -1, 5, \ - -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ -} + -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_6_1 { \ - .id = SND_CHN_MATRIX_6_1, \ +#define SND_CHN_MATRIX_MAP_6_1 \ + { \ + .id = SND_CHN_MATRIX_6_1, \ .channels = 7, \ .ext = 1, \ .map = { \ @@ -544,11 +555,12 @@ SND_CHN_T_MASK_FC | SND_CHN_T_MASK_LF | \ SND_CHN_T_MASK_BC, \ .offset = { 0, 1, 4, 5, 2, 3, -1, -1, 6, \ - -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ -} + -1, -1, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_7_0 { \ - .id = SND_CHN_MATRIX_7_0, \ +#define SND_CHN_MATRIX_MAP_7_0 \ + { \ + .id = SND_CHN_MATRIX_7_0, \ .channels = 7, \ .ext = 0, \ .map = { \ @@ -606,11 +618,12 @@ SND_CHN_T_MASK_FC | \ SND_CHN_T_MASK_SL | SND_CHN_T_MASK_SR, \ .offset = { 0, 1, 4, -1, 2, 3, -1, -1, -1, \ - 5, 6, -1, -1, -1, -1, -1, -1, -1 } \ -} + 5, 6, -1, -1, -1, -1, -1, -1, -1 } \ + } -#define SND_CHN_MATRIX_MAP_7_1 { \ - .id = SND_CHN_MATRIX_7_1, \ +#define SND_CHN_MATRIX_MAP_7_1 \ + { \ + .id = SND_CHN_MATRIX_7_1, \ .channels = 8, \ .ext = 1, \ .map = { \ @@ -666,7 +679,7 @@ SND_CHN_T_MASK_FC | SND_CHN_T_MASK_LF | \ SND_CHN_T_MASK_SL | SND_CHN_T_MASK_SR, \ .offset = { 0, 1, 4, 5, 2, 3, -1, -1, -1, \ - 6, 7, -1, -1, -1, -1, -1, -1, -1 } \ -} + 6, 7, -1, -1, -1, -1, -1, -1, -1 } \ + } -#endif /* !_SND_MATRIX_MAP_H_ */ +#endif /* !_SND_MATRIX_MAP_H_ */ Index: sys/dev/sound/pcm/mixer.h =================================================================== --- sys/dev/sound/pcm/mixer.h +++ sys/dev/sound/pcm/mixer.h @@ -28,7 +28,7 @@ */ #ifndef _PCM_MIXER_H_ -#define _PCM_MIXER_H_ +#define _PCM_MIXER_H_ struct snd_mixer *mixer_create(device_t dev, kobj_class_t cls, void *devinfo, const char *desc); @@ -36,7 +36,8 @@ int mixer_init(device_t dev, kobj_class_t cls, void *devinfo); int mixer_uninit(device_t dev); int mixer_reinit(device_t dev); -int mixer_ioctl_cmd(struct cdev *i_dev, u_long cmd, caddr_t arg, int mode, struct thread *td, int from); +int mixer_ioctl_cmd(struct cdev *i_dev, u_long cmd, caddr_t arg, int mode, + struct thread *td, int from); int mixer_oss_mixerinfo(struct cdev *i_dev, oss_mixerinfo *mi); int mixer_hwvol_init(device_t dev); @@ -62,7 +63,8 @@ u_int32_t mix_getdevs(struct snd_mixer *m); u_int32_t mix_getrecdevs(struct snd_mixer *m); u_int32_t mix_getmutedevs(struct snd_mixer *m); -void mix_setparentchild(struct snd_mixer *m, u_int32_t parent, u_int32_t childs); +void mix_setparentchild(struct snd_mixer *m, u_int32_t parent, + u_int32_t childs); void mix_setrealdev(struct snd_mixer *m, u_int32_t dev, u_int32_t realdev); u_int32_t mix_getparent(struct snd_mixer *m, u_int32_t dev); u_int32_t mix_getchild(struct snd_mixer *m, u_int32_t dev); @@ -71,19 +73,19 @@ extern int mixer_count; -#define MIXER_CMD_DIRECT 0 /* send command within driver */ -#define MIXER_CMD_CDEV 1 /* send command from cdev/ioctl */ +#define MIXER_CMD_DIRECT 0 /* send command within driver */ +#define MIXER_CMD_CDEV 1 /* send command from cdev/ioctl */ -#define MIXER_TYPE_PRIMARY 0 /* mixer_init() */ -#define MIXER_TYPE_SECONDARY 1 /* mixer_create() */ +#define MIXER_TYPE_PRIMARY 0 /* mixer_init() */ +#define MIXER_TYPE_SECONDARY 1 /* mixer_create() */ /* * this is a kludge to allow hiding of the struct snd_mixer definition * 512 should be enough for all architectures */ -#define MIXER_SIZE (512 + sizeof(struct kobj) + \ - sizeof(oss_mixer_enuminfo)) +#define MIXER_SIZE (512 + sizeof(struct kobj) + sizeof(oss_mixer_enuminfo)) -#define MIXER_DECLARE(name) static DEFINE_CLASS(name, name ## _methods, MIXER_SIZE) +#define MIXER_DECLARE(name) \ + static DEFINE_CLASS(name, name##_methods, MIXER_SIZE) -#endif /* _PCM_MIXER_H_ */ +#endif /* _PCM_MIXER_H_ */ Index: sys/dev/sound/pcm/mixer.c =================================================================== --- sys/dev/sound/pcm/mixer.c +++ sys/dev/sound/pcm/mixer.c @@ -40,11 +40,10 @@ static MALLOC_DEFINE(M_MIXER, "mixer", "mixer"); static int mixer_bypass = 1; -SYSCTL_INT(_hw_snd, OID_AUTO, vpc_mixer_bypass, CTLFLAG_RWTUN, - &mixer_bypass, 0, +SYSCTL_INT(_hw_snd, OID_AUTO, vpc_mixer_bypass, CTLFLAG_RWTUN, &mixer_bypass, 0, "control channel pcm/rec volume, bypassing real mixer device"); -#define MIXER_NAMELEN 16 +#define MIXER_NAMELEN 16 struct snd_mixer { KOBJ_FIELDS; void *devinfo; @@ -74,35 +73,35 @@ }; static u_int16_t snd_mixerdefaults[SOUND_MIXER_NRDEVICES] = { - [SOUND_MIXER_VOLUME] = 75, - [SOUND_MIXER_BASS] = 50, - [SOUND_MIXER_TREBLE] = 50, - [SOUND_MIXER_SYNTH] = 75, - [SOUND_MIXER_PCM] = 75, - [SOUND_MIXER_SPEAKER] = 75, - [SOUND_MIXER_LINE] = 75, - [SOUND_MIXER_MIC] = 25, - [SOUND_MIXER_CD] = 75, - [SOUND_MIXER_IGAIN] = 0, - [SOUND_MIXER_LINE1] = 75, - [SOUND_MIXER_VIDEO] = 75, - [SOUND_MIXER_RECLEV] = 75, - [SOUND_MIXER_OGAIN] = 50, - [SOUND_MIXER_MONITOR] = 75, + [SOUND_MIXER_VOLUME] = 75, + [SOUND_MIXER_BASS] = 50, + [SOUND_MIXER_TREBLE] = 50, + [SOUND_MIXER_SYNTH] = 75, + [SOUND_MIXER_PCM] = 75, + [SOUND_MIXER_SPEAKER] = 75, + [SOUND_MIXER_LINE] = 75, + [SOUND_MIXER_MIC] = 25, + [SOUND_MIXER_CD] = 75, + [SOUND_MIXER_IGAIN] = 0, + [SOUND_MIXER_LINE1] = 75, + [SOUND_MIXER_VIDEO] = 75, + [SOUND_MIXER_RECLEV] = 75, + [SOUND_MIXER_OGAIN] = 50, + [SOUND_MIXER_MONITOR] = 75, }; -static char* snd_mixernames[SOUND_MIXER_NRDEVICES] = SOUND_DEVICE_NAMES; +static char *snd_mixernames[SOUND_MIXER_NRDEVICES] = SOUND_DEVICE_NAMES; static d_open_t mixer_open; static d_close_t mixer_close; static d_ioctl_t mixer_ioctl; static struct cdevsw mixer_cdevsw = { - .d_version = D_VERSION, - .d_open = mixer_open, - .d_close = mixer_close, - .d_ioctl = mixer_ioctl, - .d_name = "mixer", + .d_version = D_VERSION, + .d_open = mixer_open, + .d_close = mixer_close, + .d_ioctl = mixer_ioctl, + .d_name = "mixer", }; /** @@ -129,24 +128,26 @@ for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) if (strncmp(devname, snd_mixernames[i], - strlen(snd_mixernames[i])) == 0) + strlen(snd_mixernames[i])) == 0) return i; return -1; } -#define MIXER_SET_UNLOCK(x, y) do { \ - if ((y) != 0) \ - snd_mtxunlock((x)->lock); \ -} while (0) +#define MIXER_SET_UNLOCK(x, y) \ + do { \ + if ((y) != 0) \ + snd_mtxunlock((x)->lock); \ + } while (0) -#define MIXER_SET_LOCK(x, y) do { \ - if ((y) != 0) \ - snd_mtxlock((x)->lock); \ -} while (0) +#define MIXER_SET_LOCK(x, y) \ + do { \ + if ((y) != 0) \ + snd_mtxlock((x)->lock); \ + } while (0) static int -mixer_set_softpcmvol(struct snd_mixer *m, struct snddev_info *d, - u_int left, u_int right) +mixer_set_softpcmvol(struct snd_mixer *m, struct snddev_info *d, u_int left, + u_int right) { struct pcm_channel *c; int dropmtx, acquiremtx; @@ -174,7 +175,8 @@ MIXER_SET_UNLOCK(m, dropmtx); MIXER_SET_LOCK(d, acquiremtx); - CHN_FOREACH(c, d, channels.pcm.busy) { + CHN_FOREACH(c, d, channels.pcm.busy) + { CHN_LOCK(c); if (c->direction == PCMDIR_PLAY && (c->feederflags & (1 << FEEDER_VOLUME))) @@ -190,8 +192,7 @@ } static int -mixer_set_eq(struct snd_mixer *m, struct snddev_info *d, - u_int dev, u_int level) +mixer_set_eq(struct snd_mixer *m, struct snddev_info *d, u_int dev, u_int level) { struct pcm_channel *c; struct pcm_feeder *f; @@ -227,7 +228,8 @@ MIXER_SET_UNLOCK(m, dropmtx); MIXER_SET_LOCK(d, acquiremtx); - CHN_FOREACH(c, d, channels.pcm.busy) { + CHN_FOREACH(c, d, channels.pcm.busy) + { CHN_LOCK(c); f = chn_findfeeder(c, FEEDER_EQ); if (f != NULL) @@ -315,7 +317,8 @@ if (dev == SOUND_MIXER_PCM && (d->flags & SD_F_SOFTPCMVOL)) (void)mixer_set_softpcmvol(m, d, l, r); else if ((dev == SOUND_MIXER_TREBLE || - dev == SOUND_MIXER_BASS) && (d->flags & SD_F_EQ)) + dev == SOUND_MIXER_BASS) && + (d->flags & SD_F_EQ)) (void)mixer_set_eq(m, d, dev, (l + r) >> 1); else if (realdev != SOUND_MIXER_NONE && MIXER_SET(m, realdev, l, r) < 0) { @@ -541,7 +544,7 @@ if ((1 << i) & v) { ei->strindex[nvalues] = nwrote; ncopied = strlcpy(loc, snd_mixernames[i], nleft) + 1; - /* strlcpy retval doesn't include terminator */ + /* strlcpy retval doesn't include terminator */ nwrote += ncopied; nleft -= ncopied; @@ -646,15 +649,15 @@ } static struct snd_mixer * -mixer_obj_create(device_t dev, kobj_class_t cls, void *devinfo, - int type, const char *desc) +mixer_obj_create(device_t dev, kobj_class_t cls, void *devinfo, int type, + const char *desc) { struct snd_mixer *m; int i; KASSERT(dev != NULL && cls != NULL && devinfo != NULL, - ("%s(): NULL data dev=%p cls=%p devinfo=%p", - __func__, dev, cls, devinfo)); + ("%s(): NULL data dev=%p cls=%p devinfo=%p", __func__, dev, cls, + devinfo)); KASSERT(type == MIXER_TYPE_PRIMARY || type == MIXER_TYPE_SECONDARY, ("invalid mixer type=%d", type)); @@ -665,8 +668,9 @@ strlcat(m->name, ":", sizeof(m->name)); strlcat(m->name, desc, sizeof(m->name)); } - m->lock = snd_mtxcreate(m->name, (type == MIXER_TYPE_PRIMARY) ? - "primary pcm mixer" : "secondary pcm mixer"); + m->lock = snd_mtxcreate(m->name, + (type == MIXER_TYPE_PRIMARY) ? "primary pcm mixer" : + "secondary pcm mixer"); m->type = type; m->devinfo = devinfo; m->busy = 0; @@ -732,8 +736,9 @@ if (snddev == NULL) return (-1); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "eq", &val) == 0 && val != 0) { + if (resource_int_value(device_get_name(dev), device_get_unit(dev), "eq", + &val) == 0 && + val != 0) { snddev->flags |= SD_F_EQ; if ((val & SD_F_EQ_MASK) == val) snddev->flags |= val; @@ -750,9 +755,9 @@ v = snd_mixerdefaults[i]; if (resource_int_value(device_get_name(dev), - device_get_unit(dev), snd_mixernames[i], &val) == 0) { + device_get_unit(dev), snd_mixernames[i], &val) == 0) { if (val >= 0 && val <= 100) { - v = (u_int16_t) val; + v = (u_int16_t)val; } } @@ -763,8 +768,8 @@ unit = device_get_unit(dev); devunit = snd_mkunit(unit, SND_DEV_CTL, 0); - pdev = make_dev(&mixer_cdevsw, PCMMINOR(devunit), - UID_ROOT, GID_WHEEL, 0666, "mixer%d", unit); + pdev = make_dev(&mixer_cdevsw, PCMMINOR(devunit), UID_ROOT, GID_WHEEL, + 0666, "mixer%d", unit); pdev->si_drv1 = m; snddev->mixer_dev = pdev; @@ -778,10 +783,11 @@ device_printf(dev, "Mixer \"%s\" -> \"%s\":", snd_mixernames[i], (m->realdev[i] < SOUND_MIXER_NRDEVICES) ? - snd_mixernames[m->realdev[i]] : "none"); + snd_mixernames[m->realdev[i]] : + "none"); } else { - device_printf(dev, "Mixer \"%s\":", - snd_mixernames[i]); + device_printf(dev, + "Mixer \"%s\":", snd_mixernames[i]); } if (m->parent[i] < SOUND_MIXER_NRDEVICES) printf(" parent=\"%s\"", @@ -911,12 +917,12 @@ m->hwvol_mixer = SOUND_MIXER_VOLUME; m->hwvol_step = 5; SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "hwvol_step", CTLFLAG_RWTUN, &m->hwvol_step, 0, ""); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, + "hwvol_step", CTLFLAG_RWTUN, &m->hwvol_step, 0, ""); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "hwvol_mixer", CTLTYPE_STRING | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, - m, 0, sysctl_hw_snd_hwvol_mixer, "A", ""); + "hwvol_mixer", CTLTYPE_STRING | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, m, + 0, sysctl_hw_snd_hwvol_mixer, "A", ""); return 0; } @@ -1153,10 +1159,10 @@ * (SNDCTL_DSP_[SET|GET][PLAY|REC]VOL / SOUND_MIXER_[PCM|RECLEV] * on its open fd, rather than cracky mixer bypassing here. */ - CHN_FOREACH(c, d, channels.pcm.opened) { + CHN_FOREACH(c, d, channels.pcm.opened) + { CHN_LOCK(c); - if (c->pid != pid || - !(c->feederflags & (1 << FEEDER_VOLUME))) { + if (c->pid != pid || !(c->feederflags & (1 << FEEDER_VOLUME))) { CHN_UNLOCK(c); continue; } @@ -1178,7 +1184,7 @@ return (-1); if ((j == SOUND_MIXER_DEVMASK || j == SOUND_MIXER_CAPS || - j == SOUND_MIXER_STEREODEVS) && + j == SOUND_MIXER_STEREODEVS) && (cmd & ~0xff) == MIXER_READ(0)) { snd_mtxlock(m->lock); *(int *)arg = mix_getdevs(m); @@ -1206,8 +1212,8 @@ chn_setvolume_multi(c, SND_VOL_C_PCM, left, right, center); } else if ((cmd & ~0xff) == MIXER_READ(0)) { *(int *)arg = CHN_GETVOLUME(c, SND_VOL_C_PCM, SND_CHN_T_FL); - *(int *)arg |= - CHN_GETVOLUME(c, SND_VOL_C_PCM, SND_CHN_T_FR) << 8; + *(int *)arg |= CHN_GETVOLUME(c, SND_VOL_C_PCM, SND_CHN_T_FR) + << 8; } CHN_UNLOCK(c); @@ -1285,7 +1291,8 @@ case SNDCTL_ENGINEINFO: return (dsp_oss_audioinfo(i_dev, (oss_audioinfo *)arg)); case SNDCTL_MIXERINFO: - return (mixer_oss_mixerinfo(i_dev, (oss_mixerinfo *)arg)); + return ( + mixer_oss_mixerinfo(i_dev, (oss_mixerinfo *)arg)); } return (EINVAL); } @@ -1366,9 +1373,8 @@ } static void -mixer_clone(void *arg, - struct ucred *cred, - char *name, int namelen, struct cdev **dev) +mixer_clone(void *arg, struct ucred *cred, char *name, int namelen, + struct cdev **dev) { struct snddev_info *d; @@ -1401,7 +1407,8 @@ } SYSINIT(mixer_sysinit, SI_SUB_DRIVERS, SI_ORDER_MIDDLE, mixer_sysinit, NULL); -SYSUNINIT(mixer_sysuninit, SI_SUB_DRIVERS, SI_ORDER_MIDDLE, mixer_sysuninit, NULL); +SYSUNINIT(mixer_sysuninit, SI_SUB_DRIVERS, SI_ORDER_MIDDLE, mixer_sysuninit, + NULL); /** * @brief Handler for SNDCTL_MIXERINFO @@ -1444,8 +1451,9 @@ * There's a 1:1 relationship between mixers and PCM devices, so * begin by iterating over PCM devices and search for our mixer. */ - for (i = 0; pcm_devclass != NULL && - i < devclass_get_maxunit(pcm_devclass); i++) { + for (i = 0; + pcm_devclass != NULL && i < devclass_get_maxunit(pcm_devclass); + i++) { d = devclass_get_softc(pcm_devclass, i); if (!PCM_REGISTERED(d) || PCM_DETACHING(d)) continue; @@ -1458,7 +1466,7 @@ if (d->mixer_dev != NULL && d->mixer_dev->si_drv1 != NULL && ((mi->dev == -1 && d->mixer_dev == i_dev) || - mi->dev == nmix)) { + mi->dev == nmix)) { m = d->mixer_dev->si_drv1; mtx_lock(m->lock); Index: sys/dev/sound/pcm/pcm.h =================================================================== --- sys/dev/sound/pcm/pcm.h +++ sys/dev/sound/pcm/pcm.h @@ -46,7 +46,7 @@ */ #if LONG_BIT >= 64 #undef SND_PCM_64 -#define SND_PCM_64 1 +#define SND_PCM_64 1 #endif typedef int32_t intpcm_t; @@ -62,10 +62,10 @@ typedef uint32_t uintpcm24_t; #ifdef SND_PCM_64 -typedef int64_t intpcm32_t; +typedef int64_t intpcm32_t; typedef uint64_t uintpcm32_t; #else -typedef int32_t intpcm32_t; +typedef int32_t intpcm32_t; typedef uint32_t uintpcm32_t; #endif @@ -73,247 +73,262 @@ typedef uint64_t uintpcm64_t; /* 32bit fixed point shift */ -#define PCM_FXSHIFT 8 - -#define PCM_S8_MAX 0x7f -#define PCM_S8_MIN -0x80 -#define PCM_S16_MAX 0x7fff -#define PCM_S16_MIN -0x8000 -#define PCM_S24_MAX 0x7fffff -#define PCM_S24_MIN -0x800000 +#define PCM_FXSHIFT 8 + +#define PCM_S8_MAX 0x7f +#define PCM_S8_MIN -0x80 +#define PCM_S16_MAX 0x7fff +#define PCM_S16_MIN -0x8000 +#define PCM_S24_MAX 0x7fffff +#define PCM_S24_MIN -0x800000 #ifdef SND_PCM_64 #if LONG_BIT >= 64 -#define PCM_S32_MAX 0x7fffffffL -#define PCM_S32_MIN -0x80000000L +#define PCM_S32_MAX 0x7fffffffL +#define PCM_S32_MIN -0x80000000L #else -#define PCM_S32_MAX 0x7fffffffLL -#define PCM_S32_MIN -0x80000000LL +#define PCM_S32_MAX 0x7fffffffLL +#define PCM_S32_MIN -0x80000000LL #endif #else -#define PCM_S32_MAX 0x7fffffff -#define PCM_S32_MIN (-0x7fffffff - 1) +#define PCM_S32_MAX 0x7fffffff +#define PCM_S32_MIN (-0x7fffffff - 1) #endif /* Bytes-per-sample definition */ -#define PCM_8_BPS 1 -#define PCM_16_BPS 2 -#define PCM_24_BPS 3 -#define PCM_32_BPS 4 +#define PCM_8_BPS 1 +#define PCM_16_BPS 2 +#define PCM_24_BPS 3 +#define PCM_32_BPS 4 -#define INTPCM_T(v) ((intpcm_t)(v)) -#define INTPCM8_T(v) ((intpcm8_t)(v)) -#define INTPCM16_T(v) ((intpcm16_t)(v)) -#define INTPCM24_T(v) ((intpcm24_t)(v)) -#define INTPCM32_T(v) ((intpcm32_t)(v)) +#define INTPCM_T(v) ((intpcm_t)(v)) +#define INTPCM8_T(v) ((intpcm8_t)(v)) +#define INTPCM16_T(v) ((intpcm16_t)(v)) +#define INTPCM24_T(v) ((intpcm24_t)(v)) +#define INTPCM32_T(v) ((intpcm32_t)(v)) #if BYTE_ORDER == LITTLE_ENDIAN -#define _PCM_READ_S16_LE(b8) INTPCM_T(*((int16_t *)(b8))) -#define _PCM_READ_S32_LE(b8) INTPCM_T(*((int32_t *)(b8))) -#define _PCM_READ_S16_BE(b8) \ - INTPCM_T((b8)[1] | (((int8_t)((b8)[0])) << 8)) -#define _PCM_READ_S32_BE(b8) \ - INTPCM_T((b8)[3] | ((b8)[2] << 8) | ((b8)[1] << 16) | \ +#define _PCM_READ_S16_LE(b8) INTPCM_T(*((int16_t *)(b8))) +#define _PCM_READ_S32_LE(b8) INTPCM_T(*((int32_t *)(b8))) +#define _PCM_READ_S16_BE(b8) INTPCM_T((b8)[1] | (((int8_t)((b8)[0])) << 8)) +#define _PCM_READ_S32_BE(b8) \ + INTPCM_T((b8)[3] | ((b8)[2] << 8) | ((b8)[1] << 16) | \ (((int8_t)((b8)[0])) << 24)) -#define _PCM_WRITE_S16_LE(b8, val) do { \ - *((int16_t *)(b8)) = (val); \ -} while (0) -#define _PCM_WRITE_S32_LE(b8, val) do { \ - *((int32_t *)(b8)) = (val); \ -} while (0) -#define _PCM_WRITE_S16_BE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[1] = val; \ - b8[0] = val >> 8; \ -} while (0) -#define _PCM_WRITE_S32_BE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[3] = val; \ - b8[2] = val >> 8; \ - b8[1] = val >> 16; \ - b8[0] = val >> 24; \ -} while (0) - -#define _PCM_READ_U16_LE(b8) \ - INTPCM_T((int16_t)(*((uint16_t *)(b8)) ^ 0x8000)) -#define _PCM_READ_U32_LE(b8) \ +#define _PCM_WRITE_S16_LE(b8, val) \ + do { \ + *((int16_t *)(b8)) = (val); \ + } while (0) +#define _PCM_WRITE_S32_LE(b8, val) \ + do { \ + *((int32_t *)(b8)) = (val); \ + } while (0) +#define _PCM_WRITE_S16_BE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[1] = val; \ + b8[0] = val >> 8; \ + } while (0) +#define _PCM_WRITE_S32_BE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[3] = val; \ + b8[2] = val >> 8; \ + b8[1] = val >> 16; \ + b8[0] = val >> 24; \ + } while (0) + +#define _PCM_READ_U16_LE(b8) INTPCM_T((int16_t)(*((uint16_t *)(b8)) ^ 0x8000)) +#define _PCM_READ_U32_LE(b8) \ INTPCM_T((int32_t)(*((uint32_t *)(b8)) ^ 0x80000000)) -#define _PCM_READ_U16_BE(b8) \ +#define _PCM_READ_U16_BE(b8) \ INTPCM_T((b8)[1] | (((int8_t)((b8)[0] ^ 0x80)) << 8)) -#define _PCM_READ_U32_BE(b8) \ - INTPCM_T((b8)[3] | ((b8)[2] << 8) | ((b8)[1] << 16) | \ +#define _PCM_READ_U32_BE(b8) \ + INTPCM_T((b8)[3] | ((b8)[2] << 8) | ((b8)[1] << 16) | \ (((int8_t)((b8)[0] ^ 0x80)) << 24)) -#define _PCM_WRITE_U16_LE(b8, val) do { \ - *((uint16_t *)(b8)) = (val) ^ 0x8000; \ -} while (0) -#define _PCM_WRITE_U32_LE(b8, val) do { \ - *((uint32_t *)(b8)) = (val) ^ 0x80000000; \ -} while (0) -#define _PCM_WRITE_U16_BE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[1] = val; \ - b8[0] = (val >> 8) ^ 0x80; \ -} while (0) -#define _PCM_WRITE_U32_BE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[3] = val; \ - b8[2] = val >> 8; \ - b8[1] = val >> 16; \ - b8[0] = (val >> 24) ^ 0x80; \ -} while (0) - -#define _PCM_READ_S16_NE(b8) _PCM_READ_S16_LE(b8) -#define _PCM_READ_U16_NE(b8) _PCM_READ_U16_LE(b8) -#define _PCM_READ_S32_NE(b8) _PCM_READ_S32_LE(b8) -#define _PCM_READ_U32_NE(b8) _PCM_READ_U32_LE(b8) -#define _PCM_WRITE_S16_NE(b6) _PCM_WRITE_S16_LE(b8) -#define _PCM_WRITE_U16_NE(b6) _PCM_WRITE_U16_LE(b8) -#define _PCM_WRITE_S32_NE(b6) _PCM_WRITE_S32_LE(b8) -#define _PCM_WRITE_U32_NE(b6) _PCM_WRITE_U32_LE(b8) -#else /* !LITTLE_ENDIAN */ -#define _PCM_READ_S16_LE(b8) \ - INTPCM_T((b8)[0] | (((int8_t)((b8)[1])) << 8)) -#define _PCM_READ_S32_LE(b8) \ - INTPCM_T((b8)[0] | ((b8)[1] << 8) | ((b8)[2] << 16) | \ +#define _PCM_WRITE_U16_LE(b8, val) \ + do { \ + *((uint16_t *)(b8)) = (val) ^ 0x8000; \ + } while (0) +#define _PCM_WRITE_U32_LE(b8, val) \ + do { \ + *((uint32_t *)(b8)) = (val) ^ 0x80000000; \ + } while (0) +#define _PCM_WRITE_U16_BE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[1] = val; \ + b8[0] = (val >> 8) ^ 0x80; \ + } while (0) +#define _PCM_WRITE_U32_BE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[3] = val; \ + b8[2] = val >> 8; \ + b8[1] = val >> 16; \ + b8[0] = (val >> 24) ^ 0x80; \ + } while (0) + +#define _PCM_READ_S16_NE(b8) _PCM_READ_S16_LE(b8) +#define _PCM_READ_U16_NE(b8) _PCM_READ_U16_LE(b8) +#define _PCM_READ_S32_NE(b8) _PCM_READ_S32_LE(b8) +#define _PCM_READ_U32_NE(b8) _PCM_READ_U32_LE(b8) +#define _PCM_WRITE_S16_NE(b6) _PCM_WRITE_S16_LE(b8) +#define _PCM_WRITE_U16_NE(b6) _PCM_WRITE_U16_LE(b8) +#define _PCM_WRITE_S32_NE(b6) _PCM_WRITE_S32_LE(b8) +#define _PCM_WRITE_U32_NE(b6) _PCM_WRITE_U32_LE(b8) +#else /* !LITTLE_ENDIAN */ +#define _PCM_READ_S16_LE(b8) INTPCM_T((b8)[0] | (((int8_t)((b8)[1])) << 8)) +#define _PCM_READ_S32_LE(b8) \ + INTPCM_T((b8)[0] | ((b8)[1] << 8) | ((b8)[2] << 16) | \ (((int8_t)((b8)[3])) << 24)) -#define _PCM_READ_S16_BE(b8) INTPCM_T(*((int16_t *)(b8))) -#define _PCM_READ_S32_BE(b8) INTPCM_T(*((int32_t *)(b8))) - -#define _PCM_WRITE_S16_LE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[0] = val; \ - b8[1] = val >> 8; \ -} while (0) -#define _PCM_WRITE_S32_LE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[0] = val; \ - b8[1] = val >> 8; \ - b8[2] = val >> 16; \ - b8[3] = val >> 24; \ -} while (0) -#define _PCM_WRITE_S16_BE(b8, val) do { \ - *((int16_t *)(b8)) = (val); \ -} while (0) -#define _PCM_WRITE_S32_BE(b8, val) do { \ - *((int32_t *)(b8)) = (val); \ -} while (0) - -#define _PCM_READ_U16_LE(b8) \ +#define _PCM_READ_S16_BE(b8) INTPCM_T(*((int16_t *)(b8))) +#define _PCM_READ_S32_BE(b8) INTPCM_T(*((int32_t *)(b8))) + +#define _PCM_WRITE_S16_LE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[0] = val; \ + b8[1] = val >> 8; \ + } while (0) +#define _PCM_WRITE_S32_LE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[0] = val; \ + b8[1] = val >> 8; \ + b8[2] = val >> 16; \ + b8[3] = val >> 24; \ + } while (0) +#define _PCM_WRITE_S16_BE(b8, val) \ + do { \ + *((int16_t *)(b8)) = (val); \ + } while (0) +#define _PCM_WRITE_S32_BE(b8, val) \ + do { \ + *((int32_t *)(b8)) = (val); \ + } while (0) + +#define _PCM_READ_U16_LE(b8) \ INTPCM_T((b8)[0] | (((int8_t)((b8)[1] ^ 0x80)) << 8)) -#define _PCM_READ_U32_LE(b8) \ - INTPCM_T((b8)[0] | ((b8)[1] << 8) | ((b8)[2] << 16) | \ +#define _PCM_READ_U32_LE(b8) \ + INTPCM_T((b8)[0] | ((b8)[1] << 8) | ((b8)[2] << 16) | \ (((int8_t)((b8)[3] ^ 0x80)) << 24)) -#define _PCM_READ_U16_BE(b8) \ - INTPCM_T((int16_t)(*((uint16_t *)(b8)) ^ 0x8000)) -#define _PCM_READ_U32_BE(b8) \ +#define _PCM_READ_U16_BE(b8) INTPCM_T((int16_t)(*((uint16_t *)(b8)) ^ 0x8000)) +#define _PCM_READ_U32_BE(b8) \ INTPCM_T((int32_t)(*((uint32_t *)(b8)) ^ 0x80000000)) -#define _PCM_WRITE_U16_LE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[0] = val; \ - b8[1] = (val >> 8) ^ 0x80; \ -} while (0) -#define _PCM_WRITE_U32_LE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[0] = val; \ - b8[1] = val >> 8; \ - b8[2] = val >> 16; \ - b8[3] = (val >> 24) ^ 0x80; \ -} while (0) -#define _PCM_WRITE_U16_BE(b8, val) do { \ - *((uint16_t *)(b8)) = (val) ^ 0x8000; \ -} while (0) -#define _PCM_WRITE_U32_BE(b8, val) do { \ - *((uint32_t *)(b8)) = (val) ^ 0x80000000; \ -} while (0) - -#define _PCM_READ_S16_NE(b8) _PCM_READ_S16_BE(b8) -#define _PCM_READ_U16_NE(b8) _PCM_READ_U16_BE(b8) -#define _PCM_READ_S32_NE(b8) _PCM_READ_S32_BE(b8) -#define _PCM_READ_U32_NE(b8) _PCM_READ_U32_BE(b8) -#define _PCM_WRITE_S16_NE(b6) _PCM_WRITE_S16_BE(b8) -#define _PCM_WRITE_U16_NE(b6) _PCM_WRITE_U16_BE(b8) -#define _PCM_WRITE_S32_NE(b6) _PCM_WRITE_S32_BE(b8) -#define _PCM_WRITE_U32_NE(b6) _PCM_WRITE_U32_BE(b8) -#endif /* LITTLE_ENDIAN */ - -#define _PCM_READ_S24_LE(b8) \ +#define _PCM_WRITE_U16_LE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[0] = val; \ + b8[1] = (val >> 8) ^ 0x80; \ + } while (0) +#define _PCM_WRITE_U32_LE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[0] = val; \ + b8[1] = val >> 8; \ + b8[2] = val >> 16; \ + b8[3] = (val >> 24) ^ 0x80; \ + } while (0) +#define _PCM_WRITE_U16_BE(b8, val) \ + do { \ + *((uint16_t *)(b8)) = (val) ^ 0x8000; \ + } while (0) +#define _PCM_WRITE_U32_BE(b8, val) \ + do { \ + *((uint32_t *)(b8)) = (val) ^ 0x80000000; \ + } while (0) + +#define _PCM_READ_S16_NE(b8) _PCM_READ_S16_BE(b8) +#define _PCM_READ_U16_NE(b8) _PCM_READ_U16_BE(b8) +#define _PCM_READ_S32_NE(b8) _PCM_READ_S32_BE(b8) +#define _PCM_READ_U32_NE(b8) _PCM_READ_U32_BE(b8) +#define _PCM_WRITE_S16_NE(b6) _PCM_WRITE_S16_BE(b8) +#define _PCM_WRITE_U16_NE(b6) _PCM_WRITE_U16_BE(b8) +#define _PCM_WRITE_S32_NE(b6) _PCM_WRITE_S32_BE(b8) +#define _PCM_WRITE_U32_NE(b6) _PCM_WRITE_U32_BE(b8) +#endif /* LITTLE_ENDIAN */ + +#define _PCM_READ_S24_LE(b8) \ INTPCM_T((b8)[0] | ((b8)[1] << 8) | (((int8_t)((b8)[2])) << 16)) -#define _PCM_READ_S24_BE(b8) \ +#define _PCM_READ_S24_BE(b8) \ INTPCM_T((b8)[2] | ((b8)[1] << 8) | (((int8_t)((b8)[0])) << 16)) -#define _PCM_WRITE_S24_LE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[0] = val; \ - b8[1] = val >> 8; \ - b8[2] = val >> 16; \ -} while (0) -#define _PCM_WRITE_S24_BE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[2] = val; \ - b8[1] = val >> 8; \ - b8[0] = val >> 16; \ -} while (0) - -#define _PCM_READ_U24_LE(b8) \ - INTPCM_T((b8)[0] | ((b8)[1] << 8) | \ - (((int8_t)((b8)[2] ^ 0x80)) << 16)) -#define _PCM_READ_U24_BE(b8) \ - INTPCM_T((b8)[2] | ((b8)[1] << 8) | \ - (((int8_t)((b8)[0] ^ 0x80)) << 16)) - -#define _PCM_WRITE_U24_LE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[0] = val; \ - b8[1] = val >> 8; \ - b8[2] = (val >> 16) ^ 0x80; \ -} while (0) -#define _PCM_WRITE_U24_BE(bb8, vval) do { \ - intpcm_t val = (vval); \ - uint8_t *b8 = (bb8); \ - b8[2] = val; \ - b8[1] = val >> 8; \ - b8[0] = (val >> 16) ^ 0x80; \ -} while (0) +#define _PCM_WRITE_S24_LE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[0] = val; \ + b8[1] = val >> 8; \ + b8[2] = val >> 16; \ + } while (0) +#define _PCM_WRITE_S24_BE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[2] = val; \ + b8[1] = val >> 8; \ + b8[0] = val >> 16; \ + } while (0) + +#define _PCM_READ_U24_LE(b8) \ + INTPCM_T((b8)[0] | ((b8)[1] << 8) | (((int8_t)((b8)[2] ^ 0x80)) << 16)) +#define _PCM_READ_U24_BE(b8) \ + INTPCM_T((b8)[2] | ((b8)[1] << 8) | (((int8_t)((b8)[0] ^ 0x80)) << 16)) + +#define _PCM_WRITE_U24_LE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[0] = val; \ + b8[1] = val >> 8; \ + b8[2] = (val >> 16) ^ 0x80; \ + } while (0) +#define _PCM_WRITE_U24_BE(bb8, vval) \ + do { \ + intpcm_t val = (vval); \ + uint8_t *b8 = (bb8); \ + b8[2] = val; \ + b8[1] = val >> 8; \ + b8[0] = (val >> 16) ^ 0x80; \ + } while (0) #if BYTE_ORDER == LITTLE_ENDIAN -#define _PCM_READ_S24_NE(b8) _PCM_READ_S24_LE(b8) -#define _PCM_READ_U24_NE(b8) _PCM_READ_U24_LE(b8) -#define _PCM_WRITE_S24_NE(b6) _PCM_WRITE_S24_LE(b8) -#define _PCM_WRITE_U24_NE(b6) _PCM_WRITE_U24_LE(b8) -#else /* !LITTLE_ENDIAN */ -#define _PCM_READ_S24_NE(b8) _PCM_READ_S24_BE(b8) -#define _PCM_READ_U24_NE(b8) _PCM_READ_U24_BE(b8) -#define _PCM_WRITE_S24_NE(b6) _PCM_WRITE_S24_BE(b8) -#define _PCM_WRITE_U24_NE(b6) _PCM_WRITE_U24_BE(b8) -#endif /* LITTLE_ENDIAN */ +#define _PCM_READ_S24_NE(b8) _PCM_READ_S24_LE(b8) +#define _PCM_READ_U24_NE(b8) _PCM_READ_U24_LE(b8) +#define _PCM_WRITE_S24_NE(b6) _PCM_WRITE_S24_LE(b8) +#define _PCM_WRITE_U24_NE(b6) _PCM_WRITE_U24_LE(b8) +#else /* !LITTLE_ENDIAN */ +#define _PCM_READ_S24_NE(b8) _PCM_READ_S24_BE(b8) +#define _PCM_READ_U24_NE(b8) _PCM_READ_U24_BE(b8) +#define _PCM_WRITE_S24_NE(b6) _PCM_WRITE_S24_BE(b8) +#define _PCM_WRITE_U24_NE(b6) _PCM_WRITE_U24_BE(b8) +#endif /* LITTLE_ENDIAN */ /* * 8bit sample is pretty much useless since it doesn't provide * sufficient dynamic range throughout our filtering process. * For the sake of completeness, declare it anyway. */ -#define _PCM_READ_S8_NE(b8) INTPCM_T(*((int8_t *)(b8))) -#define _PCM_READ_U8_NE(b8) \ - INTPCM_T((int8_t)(*((uint8_t *)(b8)) ^ 0x80)) - -#define _PCM_WRITE_S8_NE(b8, val) do { \ - *((int8_t *)(b8)) = (val); \ -} while (0) -#define _PCM_WRITE_U8_NE(b8, val) do { \ - *((uint8_t *)(b8)) = (val) ^ 0x80; \ -} while (0) +#define _PCM_READ_S8_NE(b8) INTPCM_T(*((int8_t *)(b8))) +#define _PCM_READ_U8_NE(b8) INTPCM_T((int8_t)(*((uint8_t *)(b8)) ^ 0x80)) + +#define _PCM_WRITE_S8_NE(b8, val) \ + do { \ + *((int8_t *)(b8)) = (val); \ + } while (0) +#define _PCM_WRITE_U8_NE(b8, val) \ + do { \ + *((uint8_t *)(b8)) = (val) ^ 0x80; \ + } while (0) /* * Common macross. Use this instead of "_", unless we want @@ -321,60 +336,60 @@ */ /* 8bit */ -#define PCM_READ_S8_NE(b8) _PCM_READ_S8_NE(b8) -#define PCM_READ_U8_NE(b8) _PCM_READ_U8_NE(b8) -#define PCM_WRITE_S8_NE(b8, val) _PCM_WRITE_S8_NE(b8, val) -#define PCM_WRITE_U8_NE(b8, val) _PCM_WRITE_U8_NE(b8, val) +#define PCM_READ_S8_NE(b8) _PCM_READ_S8_NE(b8) +#define PCM_READ_U8_NE(b8) _PCM_READ_U8_NE(b8) +#define PCM_WRITE_S8_NE(b8, val) _PCM_WRITE_S8_NE(b8, val) +#define PCM_WRITE_U8_NE(b8, val) _PCM_WRITE_U8_NE(b8, val) /* 16bit */ -#define PCM_READ_S16_LE(b8) _PCM_READ_S16_LE(b8) -#define PCM_READ_S16_BE(b8) _PCM_READ_S16_BE(b8) -#define PCM_READ_U16_LE(b8) _PCM_READ_U16_LE(b8) -#define PCM_READ_U16_BE(b8) _PCM_READ_U16_BE(b8) +#define PCM_READ_S16_LE(b8) _PCM_READ_S16_LE(b8) +#define PCM_READ_S16_BE(b8) _PCM_READ_S16_BE(b8) +#define PCM_READ_U16_LE(b8) _PCM_READ_U16_LE(b8) +#define PCM_READ_U16_BE(b8) _PCM_READ_U16_BE(b8) -#define PCM_WRITE_S16_LE(b8, val) _PCM_WRITE_S16_LE(b8, val) -#define PCM_WRITE_S16_BE(b8, val) _PCM_WRITE_S16_BE(b8, val) -#define PCM_WRITE_U16_LE(b8, val) _PCM_WRITE_U16_LE(b8, val) -#define PCM_WRITE_U16_BE(b8, val) _PCM_WRITE_U16_BE(b8, val) +#define PCM_WRITE_S16_LE(b8, val) _PCM_WRITE_S16_LE(b8, val) +#define PCM_WRITE_S16_BE(b8, val) _PCM_WRITE_S16_BE(b8, val) +#define PCM_WRITE_U16_LE(b8, val) _PCM_WRITE_U16_LE(b8, val) +#define PCM_WRITE_U16_BE(b8, val) _PCM_WRITE_U16_BE(b8, val) -#define PCM_READ_S16_NE(b8) _PCM_READ_S16_NE(b8) -#define PCM_READ_U16_NE(b8) _PCM_READ_U16_NE(b8) -#define PCM_WRITE_S16_NE(b8) _PCM_WRITE_S16_NE(b8) -#define PCM_WRITE_U16_NE(b8) _PCM_WRITE_U16_NE(b8) +#define PCM_READ_S16_NE(b8) _PCM_READ_S16_NE(b8) +#define PCM_READ_U16_NE(b8) _PCM_READ_U16_NE(b8) +#define PCM_WRITE_S16_NE(b8) _PCM_WRITE_S16_NE(b8) +#define PCM_WRITE_U16_NE(b8) _PCM_WRITE_U16_NE(b8) /* 24bit */ -#define PCM_READ_S24_LE(b8) _PCM_READ_S24_LE(b8) -#define PCM_READ_S24_BE(b8) _PCM_READ_S24_BE(b8) -#define PCM_READ_U24_LE(b8) _PCM_READ_U24_LE(b8) -#define PCM_READ_U24_BE(b8) _PCM_READ_U24_BE(b8) +#define PCM_READ_S24_LE(b8) _PCM_READ_S24_LE(b8) +#define PCM_READ_S24_BE(b8) _PCM_READ_S24_BE(b8) +#define PCM_READ_U24_LE(b8) _PCM_READ_U24_LE(b8) +#define PCM_READ_U24_BE(b8) _PCM_READ_U24_BE(b8) -#define PCM_WRITE_S24_LE(b8, val) _PCM_WRITE_S24_LE(b8, val) -#define PCM_WRITE_S24_BE(b8, val) _PCM_WRITE_S24_BE(b8, val) -#define PCM_WRITE_U24_LE(b8, val) _PCM_WRITE_U24_LE(b8, val) -#define PCM_WRITE_U24_BE(b8, val) _PCM_WRITE_U24_BE(b8, val) +#define PCM_WRITE_S24_LE(b8, val) _PCM_WRITE_S24_LE(b8, val) +#define PCM_WRITE_S24_BE(b8, val) _PCM_WRITE_S24_BE(b8, val) +#define PCM_WRITE_U24_LE(b8, val) _PCM_WRITE_U24_LE(b8, val) +#define PCM_WRITE_U24_BE(b8, val) _PCM_WRITE_U24_BE(b8, val) -#define PCM_READ_S24_NE(b8) _PCM_READ_S24_NE(b8) -#define PCM_READ_U24_NE(b8) _PCM_READ_U24_NE(b8) -#define PCM_WRITE_S24_NE(b8) _PCM_WRITE_S24_NE(b8) -#define PCM_WRITE_U24_NE(b8) _PCM_WRITE_U24_NE(b8) +#define PCM_READ_S24_NE(b8) _PCM_READ_S24_NE(b8) +#define PCM_READ_U24_NE(b8) _PCM_READ_U24_NE(b8) +#define PCM_WRITE_S24_NE(b8) _PCM_WRITE_S24_NE(b8) +#define PCM_WRITE_U24_NE(b8) _PCM_WRITE_U24_NE(b8) /* 32bit */ #ifdef SND_PCM_64 -#define PCM_READ_S32_LE(b8) _PCM_READ_S32_LE(b8) -#define PCM_READ_S32_BE(b8) _PCM_READ_S32_BE(b8) -#define PCM_READ_U32_LE(b8) _PCM_READ_U32_LE(b8) -#define PCM_READ_U32_BE(b8) _PCM_READ_U32_BE(b8) - -#define PCM_WRITE_S32_LE(b8, val) _PCM_WRITE_S32_LE(b8, val) -#define PCM_WRITE_S32_BE(b8, val) _PCM_WRITE_S32_BE(b8, val) -#define PCM_WRITE_U32_LE(b8, val) _PCM_WRITE_U32_LE(b8, val) -#define PCM_WRITE_U32_BE(b8, val) _PCM_WRITE_U32_BE(b8, val) - -#define PCM_READ_S32_NE(b8) _PCM_READ_S32_NE(b8) -#define PCM_READ_U32_NE(b8) _PCM_READ_U32_NE(b8) -#define PCM_WRITE_S32_NE(b8) _PCM_WRITE_S32_NE(b8) -#define PCM_WRITE_U32_NE(b8) _PCM_WRITE_U32_NE(b8) -#else /* !SND_PCM_64 */ +#define PCM_READ_S32_LE(b8) _PCM_READ_S32_LE(b8) +#define PCM_READ_S32_BE(b8) _PCM_READ_S32_BE(b8) +#define PCM_READ_U32_LE(b8) _PCM_READ_U32_LE(b8) +#define PCM_READ_U32_BE(b8) _PCM_READ_U32_BE(b8) + +#define PCM_WRITE_S32_LE(b8, val) _PCM_WRITE_S32_LE(b8, val) +#define PCM_WRITE_S32_BE(b8, val) _PCM_WRITE_S32_BE(b8, val) +#define PCM_WRITE_U32_LE(b8, val) _PCM_WRITE_U32_LE(b8, val) +#define PCM_WRITE_U32_BE(b8, val) _PCM_WRITE_U32_BE(b8, val) + +#define PCM_READ_S32_NE(b8) _PCM_READ_S32_NE(b8) +#define PCM_READ_U32_NE(b8) _PCM_READ_U32_NE(b8) +#define PCM_WRITE_S32_NE(b8) _PCM_WRITE_S32_NE(b8) +#define PCM_WRITE_U32_NE(b8) _PCM_WRITE_U32_NE(b8) +#else /* !SND_PCM_64 */ /* * 24bit integer ?!? This is quite unfortunate, eh? Get the fact straight: * Dynamic range for: @@ -386,53 +401,51 @@ * Since we're not Bugs Bunny ..uh..err.. avoiding 64bit arithmetic, 24bit * is pretty much sufficient for our signed integer processing. */ -#define PCM_READ_S32_LE(b8) (_PCM_READ_S32_LE(b8) >> PCM_FXSHIFT) -#define PCM_READ_S32_BE(b8) (_PCM_READ_S32_BE(b8) >> PCM_FXSHIFT) -#define PCM_READ_U32_LE(b8) (_PCM_READ_U32_LE(b8) >> PCM_FXSHIFT) -#define PCM_READ_U32_BE(b8) (_PCM_READ_U32_BE(b8) >> PCM_FXSHIFT) - -#define PCM_READ_S32_NE(b8) (_PCM_READ_S32_NE(b8) >> PCM_FXSHIFT) -#define PCM_READ_U32_NE(b8) (_PCM_READ_U32_NE(b8) >> PCM_FXSHIFT) - -#define PCM_WRITE_S32_LE(b8, val) \ - _PCM_WRITE_S32_LE(b8, (val) << PCM_FXSHIFT) -#define PCM_WRITE_S32_BE(b8, val) \ - _PCM_WRITE_S32_BE(b8, (val) << PCM_FXSHIFT) -#define PCM_WRITE_U32_LE(b8, val) \ - _PCM_WRITE_U32_LE(b8, (val) << PCM_FXSHIFT) -#define PCM_WRITE_U32_BE(b8, val) \ - _PCM_WRITE_U32_BE(b8, (val) << PCM_FXSHIFT) - -#define PCM_WRITE_S32_NE(b8, val) \ - _PCM_WRITE_S32_NE(b8, (val) << PCM_FXSHIFT) -#define PCM_WRITE_U32_NE(b8, val) \ - _PCM_WRITE_U32_NE(b8, (val) << PCM_FXSHIFT) -#endif /* SND_PCM_64 */ - -#define PCM_CLAMP_S8(val) \ - (((val) > PCM_S8_MAX) ? PCM_S8_MAX : \ - (((val) < PCM_S8_MIN) ? PCM_S8_MIN : (val))) -#define PCM_CLAMP_S16(val) \ - (((val) > PCM_S16_MAX) ? PCM_S16_MAX : \ - (((val) < PCM_S16_MIN) ? PCM_S16_MIN : (val))) -#define PCM_CLAMP_S24(val) \ - (((val) > PCM_S24_MAX) ? PCM_S24_MAX : \ - (((val) < PCM_S24_MIN) ? PCM_S24_MIN : (val))) +#define PCM_READ_S32_LE(b8) (_PCM_READ_S32_LE(b8) >> PCM_FXSHIFT) +#define PCM_READ_S32_BE(b8) (_PCM_READ_S32_BE(b8) >> PCM_FXSHIFT) +#define PCM_READ_U32_LE(b8) (_PCM_READ_U32_LE(b8) >> PCM_FXSHIFT) +#define PCM_READ_U32_BE(b8) (_PCM_READ_U32_BE(b8) >> PCM_FXSHIFT) + +#define PCM_READ_S32_NE(b8) (_PCM_READ_S32_NE(b8) >> PCM_FXSHIFT) +#define PCM_READ_U32_NE(b8) (_PCM_READ_U32_NE(b8) >> PCM_FXSHIFT) + +#define PCM_WRITE_S32_LE(b8, val) _PCM_WRITE_S32_LE(b8, (val) << PCM_FXSHIFT) +#define PCM_WRITE_S32_BE(b8, val) _PCM_WRITE_S32_BE(b8, (val) << PCM_FXSHIFT) +#define PCM_WRITE_U32_LE(b8, val) _PCM_WRITE_U32_LE(b8, (val) << PCM_FXSHIFT) +#define PCM_WRITE_U32_BE(b8, val) _PCM_WRITE_U32_BE(b8, (val) << PCM_FXSHIFT) + +#define PCM_WRITE_S32_NE(b8, val) _PCM_WRITE_S32_NE(b8, (val) << PCM_FXSHIFT) +#define PCM_WRITE_U32_NE(b8, val) _PCM_WRITE_U32_NE(b8, (val) << PCM_FXSHIFT) +#endif /* SND_PCM_64 */ + +#define PCM_CLAMP_S8(val) \ + (((val) > PCM_S8_MAX) ? PCM_S8_MAX : \ + (((val) < PCM_S8_MIN) ? PCM_S8_MIN : (val))) +#define PCM_CLAMP_S16(val) \ + (((val) > PCM_S16_MAX) ? \ + PCM_S16_MAX : \ + (((val) < PCM_S16_MIN) ? PCM_S16_MIN : (val))) +#define PCM_CLAMP_S24(val) \ + (((val) > PCM_S24_MAX) ? \ + PCM_S24_MAX : \ + (((val) < PCM_S24_MIN) ? PCM_S24_MIN : (val))) #ifdef SND_PCM_64 -#define PCM_CLAMP_S32(val) \ - (((val) > PCM_S32_MAX) ? PCM_S32_MAX : \ - (((val) < PCM_S32_MIN) ? PCM_S32_MIN : (val))) -#else /* !SND_PCM_64 */ -#define PCM_CLAMP_S32(val) \ - (((val) > PCM_S24_MAX) ? PCM_S32_MAX : \ - (((val) < PCM_S24_MIN) ? PCM_S32_MIN : \ - ((val) << PCM_FXSHIFT))) -#endif /* SND_PCM_64 */ - -#define PCM_CLAMP_U8(val) PCM_CLAMP_S8(val) -#define PCM_CLAMP_U16(val) PCM_CLAMP_S16(val) -#define PCM_CLAMP_U24(val) PCM_CLAMP_S24(val) -#define PCM_CLAMP_U32(val) PCM_CLAMP_S32(val) - -#endif /* !_SND_PCM_H_ */ +#define PCM_CLAMP_S32(val) \ + (((val) > PCM_S32_MAX) ? \ + PCM_S32_MAX : \ + (((val) < PCM_S32_MIN) ? PCM_S32_MIN : (val))) +#else /* !SND_PCM_64 */ +#define PCM_CLAMP_S32(val) \ + (((val) > PCM_S24_MAX) ? \ + PCM_S32_MAX : \ + (((val) < PCM_S24_MIN) ? PCM_S32_MIN : \ + ((val) << PCM_FXSHIFT))) +#endif /* SND_PCM_64 */ + +#define PCM_CLAMP_U8(val) PCM_CLAMP_S8(val) +#define PCM_CLAMP_U16(val) PCM_CLAMP_S16(val) +#define PCM_CLAMP_U24(val) PCM_CLAMP_S24(val) +#define PCM_CLAMP_U32(val) PCM_CLAMP_S32(val) + +#endif /* !_SND_PCM_H_ */ Index: sys/dev/sound/pcm/sndstat.c =================================================================== --- sys/dev/sound/pcm/sndstat.c +++ sys/dev/sound/pcm/sndstat.c @@ -40,24 +40,24 @@ #endif #include +#include #include #include #include -#include #include #ifdef COMPAT_FREEBSD32 #include #endif -#include #include +#include #include #include "feeder_if.h" -#define SS_TYPE_PCM 1 -#define SS_TYPE_MIDI 2 -#define SS_TYPE_SEQUENCER 3 +#define SS_TYPE_PCM 1 +#define SS_TYPE_MIDI 2 +#define SS_TYPE_SEQUENCER 3 static d_open_t sndstat_open; static void sndstat_close(void *); @@ -66,13 +66,13 @@ static d_ioctl_t sndstat_ioctl; static struct cdevsw sndstat_cdevsw = { - .d_version = D_VERSION, - .d_open = sndstat_open, - .d_read = sndstat_read, - .d_write = sndstat_write, - .d_ioctl = sndstat_ioctl, - .d_name = "sndstat", - .d_flags = D_TRACKCLOSE, + .d_version = D_VERSION, + .d_open = sndstat_open, + .d_read = sndstat_read, + .d_write = sndstat_write, + .d_ioctl = sndstat_ioctl, + .d_name = "sndstat", + .d_flags = D_TRACKCLOSE, }; struct sndstat_entry { @@ -104,9 +104,9 @@ TAILQ_ENTRY(sndstat_file) entry; struct sbuf sbuf; struct sx lock; - void *devs_nvlbuf; /* (l) */ - size_t devs_nbytes; /* (l) */ - TAILQ_HEAD(, sndstat_userdev) userdev_list; /* (l) */ + void *devs_nvlbuf; /* (l) */ + size_t devs_nbytes; /* (l) */ + TAILQ_HEAD(, sndstat_userdev) userdev_list; /* (l) */ int out_offset; int in_offset; int fflags; @@ -115,17 +115,19 @@ static struct sx sndstat_lock; static struct cdev *sndstat_dev; -#define SNDSTAT_LOCK() sx_xlock(&sndstat_lock) -#define SNDSTAT_UNLOCK() sx_xunlock(&sndstat_lock) +#define SNDSTAT_LOCK() sx_xlock(&sndstat_lock) +#define SNDSTAT_UNLOCK() sx_xunlock(&sndstat_lock) -static TAILQ_HEAD(, sndstat_entry) sndstat_devlist = TAILQ_HEAD_INITIALIZER(sndstat_devlist); -static TAILQ_HEAD(, sndstat_file) sndstat_filelist = TAILQ_HEAD_INITIALIZER(sndstat_filelist); +static TAILQ_HEAD(, sndstat_entry) sndstat_devlist = TAILQ_HEAD_INITIALIZER( + sndstat_devlist); +static TAILQ_HEAD(, sndstat_file) sndstat_filelist = TAILQ_HEAD_INITIALIZER( + sndstat_filelist); int snd_verbose = 0; static int sndstat_prepare(struct sndstat_file *); -static struct sndstat_userdev * -sndstat_line2userdev(struct sndstat_file *, const char *, int); +static struct sndstat_userdev *sndstat_line2userdev(struct sndstat_file *, + const char *, int); static int sysctl_hw_sndverbose(SYSCTL_HANDLER_ARGS) @@ -144,8 +146,7 @@ } SYSCTL_PROC(_hw_snd, OID_AUTO, verbose, CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, 0, sizeof(int), - sysctl_hw_sndverbose, "I", - "verbosity level"); + sysctl_hw_sndverbose, "I", "verbosity level"); static int sndstat_open(struct cdev *i_dev, int flags, int mode, struct thread *td) @@ -182,8 +183,8 @@ { struct sndstat_userdev *ud; - KASSERT( - sx_xlocked(&pf->lock), ("%s: Called without pf->lock", __func__)); + KASSERT(sx_xlocked(&pf->lock), + ("%s: Called without pf->lock", __func__)); while ((ud = TAILQ_FIRST(&pf->userdev_list)) != NULL) { TAILQ_REMOVE(&pf->userdev_list, ud, link); free(ud->provider, M_DEVBUF); @@ -307,7 +308,8 @@ while ((line = strsep(&str, "\n")) != NULL) { struct sndstat_userdev *ud; - ud = sndstat_line2userdev(pf, line, strlen(line)); + ud = sndstat_line2userdev(pf, line, + strlen(line)); if (ud == NULL) continue; @@ -353,7 +355,8 @@ *minchn = UINT32_MAX; *maxchn = 0; encoding = 0; - CHN_FOREACH(c, d, channels.pcm) { + CHN_FOREACH(c, d, channels.pcm) + { struct pcmchan_caps *caps; int i; @@ -379,7 +382,7 @@ static nvlist_t * sndstat_create_diinfo_nv(uint32_t min_rate, uint32_t max_rate, uint32_t formats, - uint32_t min_chn, uint32_t max_chn) + uint32_t min_chn, uint32_t max_chn) { nvlist_t *nv; @@ -414,11 +417,10 @@ nvlist_add_bool(di, SNDST_DSPS_FROM_USER, false); nvlist_add_stringf(di, SNDST_DSPS_NAMEUNIT, "%s", - device_get_nameunit(d->dev)); + device_get_nameunit(d->dev)); nvlist_add_stringf(di, SNDST_DSPS_DEVNODE, "dsp%d", - device_get_unit(d->dev)); - nvlist_add_string( - di, SNDST_DSPS_DESC, device_get_desc(d->dev)); + device_get_unit(d->dev)); + nvlist_add_string(di, SNDST_DSPS_DESC, device_get_desc(d->dev)); PCM_ACQUIRE_QUICK(d); nvlist_add_number(di, SNDST_DSPS_PCHAN, d->playcount); @@ -451,9 +453,9 @@ } nvlist_add_number(sound4di, SNDST_DSPS_SOUND4_UNIT, - device_get_unit(d->dev)); // XXX: I want signed integer here - nvlist_add_bool( - sound4di, SNDST_DSPS_SOUND4_BITPERFECT, d->flags & SD_F_BITPERFECT); + device_get_unit(d->dev)); // XXX: I want signed integer here + nvlist_add_bool(sound4di, SNDST_DSPS_SOUND4_BITPERFECT, + d->flags & SD_F_BITPERFECT); nvlist_add_number(sound4di, SNDST_DSPS_SOUND4_PVCHAN, d->pvchancount); nvlist_add_number(sound4di, SNDST_DSPS_SOUND4_RVCHAN, d->rvchancount); nvlist_move_nvlist(di, SNDST_DSPS_PROVIDER_INFO, sound4di); @@ -491,16 +493,12 @@ nvlist_add_number(di, SNDST_DSPS_PCHAN, ud->pchan); nvlist_add_number(di, SNDST_DSPS_RCHAN, ud->rchan); nvlist_add_string(di, SNDST_DSPS_NAMEUNIT, ud->nameunit); - nvlist_add_string( - di, SNDST_DSPS_DEVNODE, ud->devnode); + nvlist_add_string(di, SNDST_DSPS_DEVNODE, ud->devnode); nvlist_add_string(di, SNDST_DSPS_DESC, ud->desc); if (ud->pchan != 0) { - nvlist_add_number(di, "pminrate", - ud->info_play.min_rate); - nvlist_add_number(di, "pmaxrate", - ud->info_play.max_rate); - nvlist_add_number(di, "pfmts", - ud->info_play.formats); + nvlist_add_number(di, "pminrate", ud->info_play.min_rate); + nvlist_add_number(di, "pmaxrate", ud->info_play.max_rate); + nvlist_add_number(di, "pfmts", ud->info_play.formats); diinfo = sndstat_create_diinfo_nv(ud->info_play.min_rate, ud->info_play.max_rate, ud->info_play.formats, ud->info_play.min_chn, ud->info_play.max_chn); @@ -510,12 +508,9 @@ nvlist_move_nvlist(di, SNDST_DSPS_INFO_PLAY, diinfo); } if (ud->rchan != 0) { - nvlist_add_number(di, "rminrate", - ud->info_rec.min_rate); - nvlist_add_number(di, "rmaxrate", - ud->info_rec.max_rate); - nvlist_add_number(di, "rfmts", - ud->info_rec.formats); + nvlist_add_number(di, "rminrate", ud->info_rec.min_rate); + nvlist_add_number(di, "rmaxrate", ud->info_rec.max_rate); + nvlist_add_number(di, "rfmts", ud->info_rec.formats); diinfo = sndstat_create_diinfo_nv(ud->info_rec.min_rate, ud->info_rec.max_rate, ud->info_rec.formats, ud->info_rec.min_chn, ud->info_rec.max_chn); @@ -527,8 +522,8 @@ nvlist_add_string(di, SNDST_DSPS_PROVIDER, (ud->provider != NULL) ? ud->provider : ""); if (ud->provider_nvl != NULL) - nvlist_add_nvlist( - di, SNDST_DSPS_PROVIDER_INFO, ud->provider_nvl); + nvlist_add_nvlist(di, SNDST_DSPS_PROVIDER_INFO, + ud->provider_nvl); err = nvlist_error(di); if (err) @@ -558,7 +553,7 @@ if (nvl == NULL) return (ENOMEM); - TAILQ_FOREACH(ent, &sndstat_devlist, link) { + TAILQ_FOREACH (ent, &sndstat_devlist, link) { struct snddev_info *d; nvlist_t *di; @@ -577,12 +572,12 @@ goto done; } - TAILQ_FOREACH(pf, &sndstat_filelist, entry) { + TAILQ_FOREACH (pf, &sndstat_filelist, entry) { struct sndstat_userdev *ud; sx_xlock(&pf->lock); - TAILQ_FOREACH(ud, &pf->userdev_list, link) { + TAILQ_FOREACH (ud, &pf->userdev_list, link) { nvlist_t *di; err = sndstat_build_userland_nvlist(ud, &di); @@ -717,10 +712,10 @@ sndstat_diinfo_is_sane(const nvlist_t *diinfo) { if (!(nvlist_exists_number(diinfo, SNDST_DSPS_INFO_MIN_RATE) && - nvlist_exists_number(diinfo, SNDST_DSPS_INFO_MAX_RATE) && - nvlist_exists_number(diinfo, SNDST_DSPS_INFO_FORMATS) && - nvlist_exists_number(diinfo, SNDST_DSPS_INFO_MIN_CHN) && - nvlist_exists_number(diinfo, SNDST_DSPS_INFO_MAX_CHN))) + nvlist_exists_number(diinfo, SNDST_DSPS_INFO_MAX_RATE) && + nvlist_exists_number(diinfo, SNDST_DSPS_INFO_FORMATS) && + nvlist_exists_number(diinfo, SNDST_DSPS_INFO_MIN_CHN) && + nvlist_exists_number(diinfo, SNDST_DSPS_INFO_MAX_CHN))) return (false); return (true); } @@ -729,41 +724,39 @@ sndstat_dsp_nvlist_is_sane(const nvlist_t *nvlist) { if (!(nvlist_exists_string(nvlist, SNDST_DSPS_DEVNODE) && - nvlist_exists_string(nvlist, SNDST_DSPS_DESC) && - nvlist_exists_number(nvlist, SNDST_DSPS_PCHAN) && - nvlist_exists_number(nvlist, SNDST_DSPS_RCHAN))) + nvlist_exists_string(nvlist, SNDST_DSPS_DESC) && + nvlist_exists_number(nvlist, SNDST_DSPS_PCHAN) && + nvlist_exists_number(nvlist, SNDST_DSPS_RCHAN))) return (false); if (nvlist_get_number(nvlist, SNDST_DSPS_PCHAN) > 0) { if (nvlist_exists_nvlist(nvlist, SNDST_DSPS_INFO_PLAY)) { if (!sndstat_diinfo_is_sane(nvlist_get_nvlist(nvlist, - SNDST_DSPS_INFO_PLAY))) + SNDST_DSPS_INFO_PLAY))) return (false); } else if (!(nvlist_exists_number(nvlist, "pminrate") && - nvlist_exists_number(nvlist, "pmaxrate") && - nvlist_exists_number(nvlist, "pfmts"))) + nvlist_exists_number(nvlist, "pmaxrate") && + nvlist_exists_number(nvlist, "pfmts"))) return (false); } if (nvlist_get_number(nvlist, SNDST_DSPS_RCHAN) > 0) { if (nvlist_exists_nvlist(nvlist, SNDST_DSPS_INFO_REC)) { - if (!sndstat_diinfo_is_sane(nvlist_get_nvlist(nvlist, - SNDST_DSPS_INFO_REC))) + if (!sndstat_diinfo_is_sane( + nvlist_get_nvlist(nvlist, SNDST_DSPS_INFO_REC))) return (false); } else if (!(nvlist_exists_number(nvlist, "rminrate") && - nvlist_exists_number(nvlist, "rmaxrate") && - nvlist_exists_number(nvlist, "rfmts"))) + nvlist_exists_number(nvlist, "rmaxrate") && + nvlist_exists_number(nvlist, "rfmts"))) return (false); } return (true); - } static void sndstat_get_diinfo_nv(const nvlist_t *nv, uint32_t *min_rate, - uint32_t *max_rate, uint32_t *formats, uint32_t *min_chn, - uint32_t *max_chn) + uint32_t *max_rate, uint32_t *formats, uint32_t *min_chn, uint32_t *max_chn) { *min_rate = nvlist_get_number(nv, SNDST_DSPS_INFO_MIN_RATE); *max_rate = nvlist_get_number(nv, SNDST_DSPS_INFO_MAX_RATE); @@ -808,8 +801,7 @@ } if (rchan != 0) { if (nvlist_exists_nvlist(nvlist, SNDST_DSPS_INFO_REC)) { - diinfo = nvlist_get_nvlist(nvlist, - SNDST_DSPS_INFO_REC); + diinfo = nvlist_get_nvlist(nvlist, SNDST_DSPS_INFO_REC); sndstat_get_diinfo_nv(diinfo, &rminrate, &rmaxrate, &rfmts, &rminchn, &rmaxchn); } else { @@ -856,7 +848,7 @@ { int err; nvlist_t *nvl = NULL; - const nvlist_t * const *dsps; + const nvlist_t *const *dsps; size_t i, ndsps; struct sndstioc_nv_arg *arg = (struct sndstioc_nv_arg *)data; @@ -882,8 +874,8 @@ } sx_xlock(&pf->lock); for (i = 0; i < ndsps; i++) { - struct sndstat_userdev *ud = - malloc(sizeof(*ud), M_DEVBUF, M_WAITOK); + struct sndstat_userdev *ud = malloc(sizeof(*ud), M_DEVBUF, + M_WAITOK); err = sndstat_dsp_unpack_nvlist(dsps[i], ud); if (err) { sx_unlock(&pf->lock); @@ -952,8 +944,8 @@ #endif static int -sndstat_ioctl( - struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct thread *td) +sndstat_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, + struct thread *td) { int err; struct sndstat_file *pf; @@ -1006,7 +998,7 @@ struct sndstat_userdev *ud; const char *e, *m; - ud = malloc(sizeof(*ud), M_DEVBUF, M_WAITOK|M_ZERO); + ud = malloc(sizeof(*ud), M_DEVBUF, M_WAITOK | M_ZERO); ud->provider = NULL; ud->provider_nvl = NULL; @@ -1081,7 +1073,7 @@ SNDSTAT_LOCK(); /* sorted list insertion */ - TAILQ_FOREACH(pre, &sndstat_devlist, link) { + TAILQ_FOREACH (pre, &sndstat_devlist, link) { if (pre->unit > unit) break; else if (pre->unit < unit) @@ -1108,7 +1100,7 @@ int error = ENXIO; SNDSTAT_LOCK(); - TAILQ_FOREACH(ent, &sndstat_devlist, link) { + TAILQ_FOREACH (ent, &sndstat_devlist, link) { if (ent->dev == dev) { TAILQ_REMOVE(&sndstat_devlist, ent, link); free(ent, M_DEVBUF); @@ -1139,18 +1131,18 @@ } if (verbose < 1) { - sbuf_printf(s, " (%s%s%s", - d->playcount ? "play" : "", + sbuf_printf(s, " (%s%s%s", d->playcount ? "play" : "", (d->playcount && d->reccount) ? "/" : "", d->reccount ? "rec" : ""); } else { - sbuf_printf(s, " (%dp:%dv/%dr:%dv", - d->playcount, d->pvchancount, - d->reccount, d->rvchancount); + sbuf_printf(s, " (%dp:%dv/%dr:%dv", d->playcount, + d->pvchancount, d->reccount, d->rvchancount); } sbuf_printf(s, "%s)%s", ((d->playcount != 0 && d->reccount != 0) && - (d->flags & SD_F_SIMPLEX)) ? " simplex" : "", + (d->flags & SD_F_SIMPLEX)) ? + " simplex" : + "", (device_get_unit(dev) == snd_unit) ? " default" : ""); if (verbose <= 1) @@ -1159,60 +1151,56 @@ sbuf_printf(s, "\n\t"); sbuf_printf(s, "snddev flags=0x%b", d->flags, SD_F_BITS); - CHN_FOREACH(c, d, channels.pcm) { + CHN_FOREACH(c, d, channels.pcm) + { KASSERT(c->bufhard != NULL && c->bufsoft != NULL, ("hosed pcm channel setup")); sbuf_printf(s, "\n\t"); sbuf_printf(s, "%s[%s]: ", - (c->parentchannel != NULL) ? - c->parentchannel->name : "", c->name); + (c->parentchannel != NULL) ? c->parentchannel->name : "", + c->name); sbuf_printf(s, "spd %d", c->speed); if (c->speed != sndbuf_getspd(c->bufhard)) { - sbuf_printf(s, "/%d", - sndbuf_getspd(c->bufhard)); + sbuf_printf(s, "/%d", sndbuf_getspd(c->bufhard)); } sbuf_printf(s, ", fmt 0x%08x", c->format); if (c->format != sndbuf_getfmt(c->bufhard)) { - sbuf_printf(s, "/0x%08x", - sndbuf_getfmt(c->bufhard)); + sbuf_printf(s, "/0x%08x", sndbuf_getfmt(c->bufhard)); } - sbuf_printf(s, ", flags 0x%08x, 0x%08x", - c->flags, c->feederflags); + sbuf_printf(s, ", flags 0x%08x, 0x%08x", c->flags, + c->feederflags); if (c->pid != -1) { - sbuf_printf(s, ", pid %d (%s)", - c->pid, c->comm); + sbuf_printf(s, ", pid %d (%s)", c->pid, c->comm); } sbuf_printf(s, "\n\t"); sbuf_printf(s, "interrupts %d, ", c->interrupts); - if (c->direction == PCMDIR_REC) { + if (c->direction == PCMDIR_REC) { sbuf_printf(s, "overruns %d, feed %u, hfree %d, " "sfree %d [b:%d/%d/%d|bs:%d/%d/%d]", - c->xruns, c->feedcount, - sndbuf_getfree(c->bufhard), - sndbuf_getfree(c->bufsoft), - sndbuf_getsize(c->bufhard), - sndbuf_getblksz(c->bufhard), - sndbuf_getblkcnt(c->bufhard), - sndbuf_getsize(c->bufsoft), - sndbuf_getblksz(c->bufsoft), - sndbuf_getblkcnt(c->bufsoft)); + c->xruns, c->feedcount, sndbuf_getfree(c->bufhard), + sndbuf_getfree(c->bufsoft), + sndbuf_getsize(c->bufhard), + sndbuf_getblksz(c->bufhard), + sndbuf_getblkcnt(c->bufhard), + sndbuf_getsize(c->bufsoft), + sndbuf_getblksz(c->bufsoft), + sndbuf_getblkcnt(c->bufsoft)); } else { sbuf_printf(s, "underruns %d, feed %u, ready %d " "[b:%d/%d/%d|bs:%d/%d/%d]", - c->xruns, c->feedcount, - sndbuf_getready(c->bufsoft), - sndbuf_getsize(c->bufhard), - sndbuf_getblksz(c->bufhard), - sndbuf_getblkcnt(c->bufhard), - sndbuf_getsize(c->bufsoft), - sndbuf_getblksz(c->bufsoft), - sndbuf_getblkcnt(c->bufsoft)); + c->xruns, c->feedcount, sndbuf_getready(c->bufsoft), + sndbuf_getsize(c->bufhard), + sndbuf_getblksz(c->bufhard), + sndbuf_getblkcnt(c->bufhard), + sndbuf_getsize(c->bufsoft), + sndbuf_getblksz(c->bufsoft), + sndbuf_getblkcnt(c->bufsoft)); } sbuf_printf(s, "\n\t"); @@ -1233,21 +1221,19 @@ } else if (f->desc->type == FEEDER_MATRIX) { sbuf_printf(s, "(%d.%d -> %d.%d)", AFMT_CHANNEL(f->desc->in) - - AFMT_EXTCHANNEL(f->desc->in), + AFMT_EXTCHANNEL(f->desc->in), AFMT_EXTCHANNEL(f->desc->in), AFMT_CHANNEL(f->desc->out) - - AFMT_EXTCHANNEL(f->desc->out), + AFMT_EXTCHANNEL(f->desc->out), AFMT_EXTCHANNEL(f->desc->out)); } else if (f->desc->type == FEEDER_RATE) { - sbuf_printf(s, - "(0x%08x q:%d %d -> %d)", + sbuf_printf(s, "(0x%08x q:%d %d -> %d)", f->desc->out, FEEDER_GET(f, FEEDRATE_QUALITY), FEEDER_GET(f, FEEDRATE_SRC), FEEDER_GET(f, FEEDRATE_DST)); } else { - sbuf_printf(s, "(0x%08x)", - f->desc->out); + sbuf_printf(s, "(0x%08x)", f->desc->out); } sbuf_printf(s, " -> "); f = f->parent; @@ -1279,7 +1265,7 @@ /* generate list of installed devices */ k = 0; - TAILQ_FOREACH(ent, &sndstat_devlist, link) { + TAILQ_FOREACH (ent, &sndstat_devlist, link) { d = device_get_softc(ent->dev); if (!PCM_REGISTERED(d)) continue; @@ -1300,7 +1286,7 @@ /* append any input from userspace */ k = 0; - TAILQ_FOREACH(pf, &sndstat_filelist, entry) { + TAILQ_FOREACH (pf, &sndstat_filelist, entry) { struct sndstat_userdev *ud; if (pf == pf_self) @@ -1312,7 +1298,7 @@ } if (!k++) sbuf_printf(s, "Installed devices from userspace:\n"); - TAILQ_FOREACH(ud, &pf->userdev_list, link) { + TAILQ_FOREACH (ud, &pf->userdev_list, link) { const char *caps = (ud->pchan && ud->rchan) ? "play/rec" : (ud->pchan ? "play" : (ud->rchan ? "rec" : "")); @@ -1333,8 +1319,8 @@ sndstat_sysinit(void *p) { sx_init(&sndstat_lock, "sndstat lock"); - sndstat_dev = make_dev(&sndstat_cdevsw, SND_DEV_STATUS, - UID_ROOT, GID_WHEEL, 0644, "sndstat"); + sndstat_dev = make_dev(&sndstat_cdevsw, SND_DEV_STATUS, UID_ROOT, + GID_WHEEL, 0644, "sndstat"); } SYSINIT(sndstat_sysinit, SI_SUB_DRIVERS, SI_ORDER_FIRST, sndstat_sysinit, NULL); @@ -1347,4 +1333,5 @@ } sx_destroy(&sndstat_lock); } -SYSUNINIT(sndstat_sysuninit, SI_SUB_DRIVERS, SI_ORDER_FIRST, sndstat_sysuninit, NULL); +SYSUNINIT(sndstat_sysuninit, SI_SUB_DRIVERS, SI_ORDER_FIRST, sndstat_sysuninit, + NULL); Index: sys/dev/sound/pcm/sound.h =================================================================== --- sys/dev/sound/pcm/sound.h +++ sys/dev/sound/pcm/sound.h @@ -38,42 +38,46 @@ #ifdef _KERNEL #include #include +#include +#include +#include +#include #include -#include -#include -#include #include -#include -#include -#include /* for DATA_SET */ -#include -#include #include -#include -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include /* for DATA_SET */ +#include #include +#include +#include #include +#include +#include #include +#include +#include #include -#include +#include #include +#include +#include #include -#include +#include +#include + #include #include -#include -#include -#include +#include +#include #ifndef KOBJMETHOD_END -#define KOBJMETHOD_END { NULL, NULL } +#define KOBJMETHOD_END \ + { \ + NULL, NULL \ + } #endif struct pcm_channel; @@ -82,23 +86,23 @@ struct snd_mixer; #include -#include -#include #include +#include #include +#include +#include #include -#include #include -#define PCM_SOFTC_SIZE (sizeof(struct snddev_info)) +#define PCM_SOFTC_SIZE (sizeof(struct snddev_info)) -#define SND_STATUSLEN 64 +#define SND_STATUSLEN 64 -#define SOUND_MODVER 5 +#define SOUND_MODVER 5 -#define SOUND_MINVER SOUND_MODVER -#define SOUND_PREFVER SOUND_MODVER -#define SOUND_MAXVER SOUND_MODVER +#define SOUND_MINVER SOUND_MODVER +#define SOUND_PREFVER SOUND_MODVER +#define SOUND_MAXVER SOUND_MODVER /* * We're abusing the fact that MAXMINOR still have enough room @@ -107,142 +111,144 @@ * next 100 years... */ -#define PCMMAXUNIT (snd_max_u()) -#define PCMMAXDEV (snd_max_d()) -#define PCMMAXCHAN (snd_max_c()) +#define PCMMAXUNIT (snd_max_u()) +#define PCMMAXDEV (snd_max_d()) +#define PCMMAXCHAN (snd_max_c()) -#define PCMUNIT(x) (snd_unit2u(dev2unit(x))) -#define PCMDEV(x) (snd_unit2d(dev2unit(x))) -#define PCMCHAN(x) (snd_unit2c(dev2unit(x))) +#define PCMUNIT(x) (snd_unit2u(dev2unit(x))) +#define PCMDEV(x) (snd_unit2d(dev2unit(x))) +#define PCMCHAN(x) (snd_unit2c(dev2unit(x))) /* XXX unit2minor compat */ -#define PCMMINOR(x) (x) +#define PCMMINOR(x) (x) /* * By design, limit possible channels for each direction. */ -#define SND_MAXHWCHAN 256 -#define SND_MAXVCHANS SND_MAXHWCHAN - -#define SD_F_SIMPLEX 0x00000001 -#define SD_F_AUTOVCHAN 0x00000002 -#define SD_F_SOFTPCMVOL 0x00000004 -#define SD_F_DYING 0x00000008 -#define SD_F_DETACHING 0x00000010 -#define SD_F_BUSY 0x00000020 -#define SD_F_MPSAFE 0x00000040 -#define SD_F_REGISTERED 0x00000080 -#define SD_F_BITPERFECT 0x00000100 -#define SD_F_VPC 0x00000200 /* volume-per-channel */ -#define SD_F_EQ 0x00000400 /* EQ */ -#define SD_F_EQ_ENABLED 0x00000800 /* EQ enabled */ -#define SD_F_EQ_BYPASSED 0x00001000 /* EQ bypassed */ -#define SD_F_EQ_PC 0x00002000 /* EQ per-channel */ - -#define SD_F_EQ_DEFAULT (SD_F_EQ | SD_F_EQ_ENABLED) -#define SD_F_EQ_MASK (SD_F_EQ | SD_F_EQ_ENABLED | \ - SD_F_EQ_BYPASSED | SD_F_EQ_PC) - -#define SD_F_PRIO_RD 0x10000000 -#define SD_F_PRIO_WR 0x20000000 -#define SD_F_PRIO_SET (SD_F_PRIO_RD | SD_F_PRIO_WR) -#define SD_F_DIR_SET 0x40000000 -#define SD_F_TRANSIENT 0xf0000000 - -#define SD_F_BITS "\020" \ - "\001SIMPLEX" \ - "\002AUTOVCHAN" \ - "\003SOFTPCMVOL" \ - "\004DYING" \ - "\005DETACHING" \ - "\006BUSY" \ - "\007MPSAFE" \ - "\010REGISTERED" \ - "\011BITPERFECT" \ - "\012VPC" \ - "\013EQ" \ - "\014EQ_ENABLED" \ - "\015EQ_BYPASSED" \ - "\016EQ_PC" \ - "\035PRIO_RD" \ - "\036PRIO_WR" \ - "\037DIR_SET" - -#define PCM_ALIVE(x) ((x) != NULL && (x)->lock != NULL && \ - !((x)->flags & SD_F_DYING)) -#define PCM_REGISTERED(x) (PCM_ALIVE(x) && \ - ((x)->flags & SD_F_REGISTERED)) - -#define PCM_DETACHING(x) ((x)->flags & SD_F_DETACHING) +#define SND_MAXHWCHAN 256 +#define SND_MAXVCHANS SND_MAXHWCHAN + +#define SD_F_SIMPLEX 0x00000001 +#define SD_F_AUTOVCHAN 0x00000002 +#define SD_F_SOFTPCMVOL 0x00000004 +#define SD_F_DYING 0x00000008 +#define SD_F_DETACHING 0x00000010 +#define SD_F_BUSY 0x00000020 +#define SD_F_MPSAFE 0x00000040 +#define SD_F_REGISTERED 0x00000080 +#define SD_F_BITPERFECT 0x00000100 +#define SD_F_VPC 0x00000200 /* volume-per-channel */ +#define SD_F_EQ 0x00000400 /* EQ */ +#define SD_F_EQ_ENABLED 0x00000800 /* EQ enabled */ +#define SD_F_EQ_BYPASSED 0x00001000 /* EQ bypassed */ +#define SD_F_EQ_PC 0x00002000 /* EQ per-channel */ + +#define SD_F_EQ_DEFAULT (SD_F_EQ | SD_F_EQ_ENABLED) +#define SD_F_EQ_MASK (SD_F_EQ | SD_F_EQ_ENABLED | SD_F_EQ_BYPASSED | SD_F_EQ_PC) + +#define SD_F_PRIO_RD 0x10000000 +#define SD_F_PRIO_WR 0x20000000 +#define SD_F_PRIO_SET (SD_F_PRIO_RD | SD_F_PRIO_WR) +#define SD_F_DIR_SET 0x40000000 +#define SD_F_TRANSIENT 0xf0000000 + +#define SD_F_BITS \ + "\020" \ + "\001SIMPLEX" \ + "\002AUTOVCHAN" \ + "\003SOFTPCMVOL" \ + "\004DYING" \ + "\005DETACHING" \ + "\006BUSY" \ + "\007MPSAFE" \ + "\010REGISTERED" \ + "\011BITPERFECT" \ + "\012VPC" \ + "\013EQ" \ + "\014EQ_ENABLED" \ + "\015EQ_BYPASSED" \ + "\016EQ_PC" \ + "\035PRIO_RD" \ + "\036PRIO_WR" \ + "\037DIR_SET" + +#define PCM_ALIVE(x) \ + ((x) != NULL && (x)->lock != NULL && !((x)->flags & SD_F_DYING)) +#define PCM_REGISTERED(x) (PCM_ALIVE(x) && ((x)->flags & SD_F_REGISTERED)) + +#define PCM_DETACHING(x) ((x)->flags & SD_F_DETACHING) /* many variables should be reduced to a range. Here define a macro */ -#define RANGE(var, low, high) (var) = \ - (((var)<(low))? (low) : ((var)>(high))? (high) : (var)) +#define RANGE(var, low, high) \ + (var) = (((var) < (low)) ? (low) : ((var) > (high)) ? (high) : (var)) #define DSP_BUFFSIZE (8192) /* make figuring out what a format is easier. got AFMT_STEREO already */ #define AFMT_32BIT (AFMT_S32_LE | AFMT_S32_BE | AFMT_U32_LE | AFMT_U32_BE) #define AFMT_24BIT (AFMT_S24_LE | AFMT_S24_BE | AFMT_U24_LE | AFMT_U24_BE) #define AFMT_16BIT (AFMT_S16_LE | AFMT_S16_BE | AFMT_U16_LE | AFMT_U16_BE) -#define AFMT_G711 (AFMT_MU_LAW | AFMT_A_LAW) +#define AFMT_G711 (AFMT_MU_LAW | AFMT_A_LAW) #define AFMT_8BIT (AFMT_G711 | AFMT_U8 | AFMT_S8) -#define AFMT_SIGNED (AFMT_S32_LE | AFMT_S32_BE | AFMT_S24_LE | AFMT_S24_BE | \ - AFMT_S16_LE | AFMT_S16_BE | AFMT_S8) -#define AFMT_BIGENDIAN (AFMT_S32_BE | AFMT_U32_BE | AFMT_S24_BE | AFMT_U24_BE | \ - AFMT_S16_BE | AFMT_U16_BE) +#define AFMT_SIGNED \ + (AFMT_S32_LE | AFMT_S32_BE | AFMT_S24_LE | AFMT_S24_BE | AFMT_S16_LE | \ + AFMT_S16_BE | AFMT_S8) +#define AFMT_BIGENDIAN \ + (AFMT_S32_BE | AFMT_U32_BE | AFMT_S24_BE | AFMT_U24_BE | AFMT_S16_BE | \ + AFMT_U16_BE) -#define AFMT_CONVERTIBLE (AFMT_8BIT | AFMT_16BIT | AFMT_24BIT | \ - AFMT_32BIT) +#define AFMT_CONVERTIBLE (AFMT_8BIT | AFMT_16BIT | AFMT_24BIT | AFMT_32BIT) /* Supported vchan mixing formats */ -#define AFMT_VCHAN (AFMT_CONVERTIBLE & ~AFMT_G711) +#define AFMT_VCHAN (AFMT_CONVERTIBLE & ~AFMT_G711) -#define AFMT_PASSTHROUGH AFMT_AC3 -#define AFMT_PASSTHROUGH_RATE 48000 -#define AFMT_PASSTHROUGH_CHANNEL 2 -#define AFMT_PASSTHROUGH_EXTCHANNEL 0 +#define AFMT_PASSTHROUGH AFMT_AC3 +#define AFMT_PASSTHROUGH_RATE 48000 +#define AFMT_PASSTHROUGH_CHANNEL 2 +#define AFMT_PASSTHROUGH_EXTCHANNEL 0 /* * We're simply using unused, contiguous bits from various AFMT_ definitions. * ~(0xb00ff7ff) */ -#define AFMT_ENCODING_MASK 0xf00fffff -#define AFMT_CHANNEL_MASK 0x07f00000 -#define AFMT_CHANNEL_SHIFT 20 -#define AFMT_CHANNEL_MAX 0x7f -#define AFMT_EXTCHANNEL_MASK 0x08000000 -#define AFMT_EXTCHANNEL_SHIFT 27 -#define AFMT_EXTCHANNEL_MAX 1 +#define AFMT_ENCODING_MASK 0xf00fffff +#define AFMT_CHANNEL_MASK 0x07f00000 +#define AFMT_CHANNEL_SHIFT 20 +#define AFMT_CHANNEL_MAX 0x7f +#define AFMT_EXTCHANNEL_MASK 0x08000000 +#define AFMT_EXTCHANNEL_SHIFT 27 +#define AFMT_EXTCHANNEL_MAX 1 -#define AFMT_ENCODING(v) ((v) & AFMT_ENCODING_MASK) +#define AFMT_ENCODING(v) ((v) & AFMT_ENCODING_MASK) -#define AFMT_EXTCHANNEL(v) (((v) & AFMT_EXTCHANNEL_MASK) >> \ - AFMT_EXTCHANNEL_SHIFT) +#define AFMT_EXTCHANNEL(v) \ + (((v) & AFMT_EXTCHANNEL_MASK) >> AFMT_EXTCHANNEL_SHIFT) -#define AFMT_CHANNEL(v) (((v) & AFMT_CHANNEL_MASK) >> \ - AFMT_CHANNEL_SHIFT) +#define AFMT_CHANNEL(v) (((v) & AFMT_CHANNEL_MASK) >> AFMT_CHANNEL_SHIFT) -#define AFMT_BIT(v) (((v) & AFMT_32BIT) ? 32 : \ - (((v) & AFMT_24BIT) ? 24 : \ - ((((v) & AFMT_16BIT) || \ - ((v) & AFMT_PASSTHROUGH)) ? 16 : 8))) +#define AFMT_BIT(v) \ + (((v) & AFMT_32BIT) ? \ + 32 : \ + (((v) & AFMT_24BIT) ? \ + 24 : \ + ((((v) & AFMT_16BIT) || ((v) & AFMT_PASSTHROUGH)) ? \ + 16 : \ + 8))) -#define AFMT_BPS(v) (AFMT_BIT(v) >> 3) -#define AFMT_ALIGN(v) (AFMT_BPS(v) * AFMT_CHANNEL(v)) +#define AFMT_BPS(v) (AFMT_BIT(v) >> 3) +#define AFMT_ALIGN(v) (AFMT_BPS(v) * AFMT_CHANNEL(v)) -#define SND_FORMAT(f, c, e) (AFMT_ENCODING(f) | \ - (((c) << AFMT_CHANNEL_SHIFT) & \ - AFMT_CHANNEL_MASK) | \ - (((e) << AFMT_EXTCHANNEL_SHIFT) & \ - AFMT_EXTCHANNEL_MASK)) +#define SND_FORMAT(f, c, e) \ + (AFMT_ENCODING(f) | \ + (((c) << AFMT_CHANNEL_SHIFT) & AFMT_CHANNEL_MASK) | \ + (((e) << AFMT_EXTCHANNEL_SHIFT) & AFMT_EXTCHANNEL_MASK)) -#define AFMT_U8_NE AFMT_U8 -#define AFMT_S8_NE AFMT_S8 +#define AFMT_U8_NE AFMT_U8 +#define AFMT_S8_NE AFMT_S8 -#define AFMT_SIGNED_NE (AFMT_S8_NE | AFMT_S16_NE | AFMT_S24_NE | AFMT_S32_NE) +#define AFMT_SIGNED_NE (AFMT_S8_NE | AFMT_S16_NE | AFMT_S24_NE | AFMT_S32_NE) -#define AFMT_NE (AFMT_SIGNED_NE | AFMT_U8_NE | AFMT_U16_NE | \ - AFMT_U24_NE | AFMT_U32_NE) +#define AFMT_NE \ + (AFMT_SIGNED_NE | AFMT_U8_NE | AFMT_U16_NE | AFMT_U24_NE | AFMT_U32_NE) /* * Minor numbers for the sound driver. @@ -253,41 +259,41 @@ * In v3.0 it's /dev/sndproc but this could be a temporary solution. */ -#define SND_DEV_CTL 0 /* Control port /dev/mixer */ -#define SND_DEV_SEQ 1 /* Sequencer /dev/sequencer */ -#define SND_DEV_MIDIN 2 /* Raw midi access */ -#define SND_DEV_DSP 3 /* Digitized voice /dev/dsp */ -#define SND_DEV_AUDIO 4 /* Sparc compatible /dev/audio */ -#define SND_DEV_DSP16 5 /* Like /dev/dsp but 16 bits/sample */ -#define SND_DEV_STATUS 6 /* /dev/sndstat */ - /* #7 not in use now. */ -#define SND_DEV_SEQ2 8 /* /dev/sequencer, level 2 interface */ -#define SND_DEV_SNDPROC 9 /* /dev/sndproc for programmable devices */ -#define SND_DEV_PSS SND_DEV_SNDPROC /* ? */ -#define SND_DEV_NORESET 10 - -#define SND_DEV_DSPHW_PLAY 11 /* specific playback channel */ -#define SND_DEV_DSPHW_VPLAY 12 /* specific virtual playback channel */ -#define SND_DEV_DSPHW_REC 13 /* specific record channel */ -#define SND_DEV_DSPHW_VREC 14 /* specific virtual record channel */ - -#define SND_DEV_DSPHW_CD 15 /* s16le/stereo 44100Hz CD */ +#define SND_DEV_CTL 0 /* Control port /dev/mixer */ +#define SND_DEV_SEQ 1 /* Sequencer /dev/sequencer */ +#define SND_DEV_MIDIN 2 /* Raw midi access */ +#define SND_DEV_DSP 3 /* Digitized voice /dev/dsp */ +#define SND_DEV_AUDIO 4 /* Sparc compatible /dev/audio */ +#define SND_DEV_DSP16 5 /* Like /dev/dsp but 16 bits/sample */ +#define SND_DEV_STATUS 6 /* /dev/sndstat */ + /* #7 not in use now. */ +#define SND_DEV_SEQ2 8 /* /dev/sequencer, level 2 interface */ +#define SND_DEV_SNDPROC 9 /* /dev/sndproc for programmable devices */ +#define SND_DEV_PSS SND_DEV_SNDPROC /* ? */ +#define SND_DEV_NORESET 10 + +#define SND_DEV_DSPHW_PLAY 11 /* specific playback channel */ +#define SND_DEV_DSPHW_VPLAY 12 /* specific virtual playback channel */ +#define SND_DEV_DSPHW_REC 13 /* specific record channel */ +#define SND_DEV_DSPHW_VREC 14 /* specific virtual record channel */ + +#define SND_DEV_DSPHW_CD 15 /* s16le/stereo 44100Hz CD */ /* * OSSv4 compatible device. For now, it serve no purpose and * the cloning itself will forward the request to ordinary /dev/dsp * instead. */ -#define SND_DEV_DSP_MMAP 16 /* /dev/dsp_mmap */ -#define SND_DEV_DSP_AC3 17 /* /dev/dsp_ac3 */ -#define SND_DEV_DSP_MULTICH 18 /* /dev/dsp_multich */ -#define SND_DEV_DSP_SPDIFOUT 19 /* /dev/dsp_spdifout */ -#define SND_DEV_DSP_SPDIFIN 20 /* /dev/dsp_spdifin */ +#define SND_DEV_DSP_MMAP 16 /* /dev/dsp_mmap */ +#define SND_DEV_DSP_AC3 17 /* /dev/dsp_ac3 */ +#define SND_DEV_DSP_MULTICH 18 /* /dev/dsp_multich */ +#define SND_DEV_DSP_SPDIFOUT 19 /* /dev/dsp_spdifout */ +#define SND_DEV_DSP_SPDIFIN 20 /* /dev/dsp_spdifin */ -#define DSP_DEFAULT_SPEED 8000 +#define DSP_DEFAULT_SPEED 8000 -#define ON 1 -#define OFF 0 +#define ON 1 +#define OFF 0 extern int pcm_veto_load; extern int snd_unit; @@ -301,7 +307,9 @@ * DDB/DEB to enable/disable debugging stuff * BVDDB to enable debugging when bootverbose */ -#define BVDDB(x) if (bootverbose) x +#define BVDDB(x) \ + if (bootverbose) \ + x #ifndef DEB #define DEB(x) @@ -315,13 +323,16 @@ int pcm_chnrelease(struct pcm_channel *c); int pcm_chnref(struct pcm_channel *c, int ref); -struct pcm_channel *pcm_chn_create(struct snddev_info *d, struct pcm_channel *parent, kobj_class_t cls, int dir, int num, void *devinfo); +struct pcm_channel *pcm_chn_create(struct snddev_info *d, + struct pcm_channel *parent, kobj_class_t cls, int dir, int num, + void *devinfo); int pcm_chn_destroy(struct pcm_channel *ch); int pcm_chn_add(struct snddev_info *d, struct pcm_channel *ch); int pcm_chn_remove(struct snddev_info *d, struct pcm_channel *ch); int pcm_addchan(device_t dev, int dir, kobj_class_t cls, void *devinfo); -unsigned int pcm_getbuffersize(device_t dev, unsigned int minbufsz, unsigned int deflt, unsigned int maxbufsz); +unsigned int pcm_getbuffersize(device_t dev, unsigned int minbufsz, + unsigned int deflt, unsigned int maxbufsz); int pcm_register(device_t dev, void *devinfo, int numplay, int numrec); int pcm_unregister(device_t dev); int pcm_setstatus(device_t dev, char *str); @@ -330,24 +341,24 @@ void *pcm_getdevinfo(device_t dev); int snd_setup_intr(device_t dev, struct resource *res, int flags, - driver_intr_t hand, void *param, void **cookiep); + driver_intr_t hand, void *param, void **cookiep); void *snd_mtxcreate(const char *desc, const char *type); void snd_mtxfree(void *m); void snd_mtxassert(void *m); -#define snd_mtxlock(m) mtx_lock(m) -#define snd_mtxunlock(m) mtx_unlock(m) +#define snd_mtxlock(m) mtx_lock(m) +#define snd_mtxunlock(m) mtx_unlock(m) int sndstat_register(device_t dev, char *str); int sndstat_unregister(device_t dev); /* usage of flags in device config entry (config file) */ -#define DV_F_DRQ_MASK 0x00000007 /* mask for secondary drq */ -#define DV_F_DUAL_DMA 0x00000010 /* set to use secondary dma channel */ +#define DV_F_DRQ_MASK 0x00000007 /* mask for secondary drq */ +#define DV_F_DUAL_DMA 0x00000010 /* set to use secondary dma channel */ /* ought to be made obsolete but still used by mss */ -#define DV_F_DEV_MASK 0x0000ff00 /* force device type/class */ -#define DV_F_DEV_SHIFT 8 /* force device type/class */ +#define DV_F_DEV_MASK 0x0000ff00 /* force device type/class */ +#define DV_F_DEV_SHIFT 8 /* force device type/class */ /* * this is rather kludgey- we need to duplicate these struct def'ns from sound.c @@ -367,7 +378,7 @@ } opened; } pcm; } channels; - unsigned devcount, playcount, reccount, pvchancount, rvchancount ; + unsigned devcount, playcount, reccount, pvchancount, rvchancount; unsigned flags; unsigned int bufsz; void *devinfo; @@ -384,210 +395,228 @@ struct cv cv; }; -void sound_oss_sysinfo(oss_sysinfo *); -int sound_oss_card_info(oss_card_info *); +void sound_oss_sysinfo(oss_sysinfo *); +int sound_oss_card_info(oss_card_info *); -#define PCM_MODE_MIXER 0x01 -#define PCM_MODE_PLAY 0x02 -#define PCM_MODE_REC 0x04 +#define PCM_MODE_MIXER 0x01 +#define PCM_MODE_PLAY 0x02 +#define PCM_MODE_REC 0x04 -#define PCM_LOCKOWNED(d) mtx_owned((d)->lock) -#define PCM_LOCK(d) mtx_lock((d)->lock) -#define PCM_UNLOCK(d) mtx_unlock((d)->lock) -#define PCM_TRYLOCK(d) mtx_trylock((d)->lock) -#define PCM_LOCKASSERT(d) mtx_assert((d)->lock, MA_OWNED) -#define PCM_UNLOCKASSERT(d) mtx_assert((d)->lock, MA_NOTOWNED) +#define PCM_LOCKOWNED(d) mtx_owned((d)->lock) +#define PCM_LOCK(d) mtx_lock((d)->lock) +#define PCM_UNLOCK(d) mtx_unlock((d)->lock) +#define PCM_TRYLOCK(d) mtx_trylock((d)->lock) +#define PCM_LOCKASSERT(d) mtx_assert((d)->lock, MA_OWNED) +#define PCM_UNLOCKASSERT(d) mtx_assert((d)->lock, MA_NOTOWNED) /* * For PCM_[WAIT | ACQUIRE | RELEASE], be sure to surround these * with PCM_LOCK/UNLOCK() sequence, or I'll come to gnaw upon you! */ #ifdef SND_DIAGNOSTIC -#define PCM_WAIT(x) do { \ - if (!PCM_LOCKOWNED(x)) \ - panic("%s(%d): [PCM WAIT] Mutex not owned!", \ - __func__, __LINE__); \ - while ((x)->flags & SD_F_BUSY) { \ - if (snd_verbose > 3) \ - device_printf((x)->dev, \ - "%s(%d): [PCM WAIT] calling cv_wait().\n", \ - __func__, __LINE__); \ - cv_wait(&(x)->cv, (x)->lock); \ - } \ -} while (0) - -#define PCM_ACQUIRE(x) do { \ - if (!PCM_LOCKOWNED(x)) \ - panic("%s(%d): [PCM ACQUIRE] Mutex not owned!", \ - __func__, __LINE__); \ - if ((x)->flags & SD_F_BUSY) \ - panic("%s(%d): [PCM ACQUIRE] " \ - "Trying to acquire BUSY cv!", __func__, __LINE__); \ - (x)->flags |= SD_F_BUSY; \ -} while (0) - -#define PCM_RELEASE(x) do { \ - if (!PCM_LOCKOWNED(x)) \ - panic("%s(%d): [PCM RELEASE] Mutex not owned!", \ - __func__, __LINE__); \ - if ((x)->flags & SD_F_BUSY) { \ - (x)->flags &= ~SD_F_BUSY; \ - if ((x)->cv.cv_waiters != 0) { \ - if ((x)->cv.cv_waiters > 1 && snd_verbose > 3) \ - device_printf((x)->dev, \ - "%s(%d): [PCM RELEASE] " \ - "cv_waiters=%d > 1!\n", \ - __func__, __LINE__, \ - (x)->cv.cv_waiters); \ - cv_broadcast(&(x)->cv); \ - } \ - } else \ - panic("%s(%d): [PCM RELEASE] Releasing non-BUSY cv!", \ - __func__, __LINE__); \ -} while (0) +#define PCM_WAIT(x) \ + do { \ + if (!PCM_LOCKOWNED(x)) \ + panic("%s(%d): [PCM WAIT] Mutex not owned!", __func__, \ + __LINE__); \ + while ((x)->flags & SD_F_BUSY) { \ + if (snd_verbose > 3) \ + device_printf((x)->dev, \ + "%s(%d): [PCM WAIT] calling cv_wait().\n", \ + __func__, __LINE__); \ + cv_wait(&(x)->cv, (x)->lock); \ + } \ + } while (0) + +#define PCM_ACQUIRE(x) \ + do { \ + if (!PCM_LOCKOWNED(x)) \ + panic("%s(%d): [PCM ACQUIRE] Mutex not owned!", \ + __func__, __LINE__); \ + if ((x)->flags & SD_F_BUSY) \ + panic("%s(%d): [PCM ACQUIRE] " \ + "Trying to acquire BUSY cv!", \ + __func__, __LINE__); \ + (x)->flags |= SD_F_BUSY; \ + } while (0) + +#define PCM_RELEASE(x) \ + do { \ + if (!PCM_LOCKOWNED(x)) \ + panic("%s(%d): [PCM RELEASE] Mutex not owned!", \ + __func__, __LINE__); \ + if ((x)->flags & SD_F_BUSY) { \ + (x)->flags &= ~SD_F_BUSY; \ + if ((x)->cv.cv_waiters != 0) { \ + if ((x)->cv.cv_waiters > 1 && snd_verbose > 3) \ + device_printf((x)->dev, \ + "%s(%d): [PCM RELEASE] " \ + "cv_waiters=%d > 1!\n", \ + __func__, __LINE__, \ + (x)->cv.cv_waiters); \ + cv_broadcast(&(x)->cv); \ + } \ + } else \ + panic("%s(%d): [PCM RELEASE] Releasing non-BUSY cv!", \ + __func__, __LINE__); \ + } while (0) /* Quick version, for shorter path. */ -#define PCM_ACQUIRE_QUICK(x) do { \ - if (PCM_LOCKOWNED(x)) \ - panic("%s(%d): [PCM ACQUIRE QUICK] Mutex owned!", \ - __func__, __LINE__); \ - PCM_LOCK(x); \ - PCM_WAIT(x); \ - PCM_ACQUIRE(x); \ - PCM_UNLOCK(x); \ -} while (0) - -#define PCM_RELEASE_QUICK(x) do { \ - if (PCM_LOCKOWNED(x)) \ - panic("%s(%d): [PCM RELEASE QUICK] Mutex owned!", \ - __func__, __LINE__); \ - PCM_LOCK(x); \ - PCM_RELEASE(x); \ - PCM_UNLOCK(x); \ -} while (0) - -#define PCM_BUSYASSERT(x) do { \ - if (!((x) != NULL && ((x)->flags & SD_F_BUSY))) \ - panic("%s(%d): [PCM BUSYASSERT] " \ - "Failed, snddev_info=%p", __func__, __LINE__, x); \ -} while (0) - -#define PCM_GIANT_ENTER(x) do { \ - int _pcm_giant = 0; \ - if (PCM_LOCKOWNED(x)) \ - panic("%s(%d): [GIANT ENTER] PCM lock owned!", \ - __func__, __LINE__); \ - if (mtx_owned(&Giant) != 0 && snd_verbose > 3) \ - device_printf((x)->dev, \ - "%s(%d): [GIANT ENTER] Giant owned!\n", \ - __func__, __LINE__); \ - if (!((x)->flags & SD_F_MPSAFE) && mtx_owned(&Giant) == 0) \ - do { \ - mtx_lock(&Giant); \ - _pcm_giant = 1; \ - } while (0) - -#define PCM_GIANT_EXIT(x) do { \ - if (PCM_LOCKOWNED(x)) \ - panic("%s(%d): [GIANT EXIT] PCM lock owned!", \ - __func__, __LINE__); \ - if (!(_pcm_giant == 0 || _pcm_giant == 1)) \ - panic("%s(%d): [GIANT EXIT] _pcm_giant screwed!", \ - __func__, __LINE__); \ - if ((x)->flags & SD_F_MPSAFE) { \ - if (_pcm_giant == 1) \ - panic("%s(%d): [GIANT EXIT] MPSAFE Giant?", \ - __func__, __LINE__); \ - if (mtx_owned(&Giant) != 0 && snd_verbose > 3) \ - device_printf((x)->dev, \ - "%s(%d): [GIANT EXIT] Giant owned!\n", \ - __func__, __LINE__); \ - } \ - if (_pcm_giant != 0) { \ - if (mtx_owned(&Giant) == 0) \ - panic("%s(%d): [GIANT EXIT] Giant not owned!", \ - __func__, __LINE__); \ - _pcm_giant = 0; \ - mtx_unlock(&Giant); \ - } \ -} while (0) +#define PCM_ACQUIRE_QUICK(x) \ + do { \ + if (PCM_LOCKOWNED(x)) \ + panic("%s(%d): [PCM ACQUIRE QUICK] Mutex owned!", \ + __func__, __LINE__); \ + PCM_LOCK(x); \ + PCM_WAIT(x); \ + PCM_ACQUIRE(x); \ + PCM_UNLOCK(x); \ + } while (0) + +#define PCM_RELEASE_QUICK(x) \ + do { \ + if (PCM_LOCKOWNED(x)) \ + panic("%s(%d): [PCM RELEASE QUICK] Mutex owned!", \ + __func__, __LINE__); \ + PCM_LOCK(x); \ + PCM_RELEASE(x); \ + PCM_UNLOCK(x); \ + } while (0) + +#define PCM_BUSYASSERT(x) \ + do { \ + if (!((x) != NULL && ((x)->flags & SD_F_BUSY))) \ + panic("%s(%d): [PCM BUSYASSERT] " \ + "Failed, snddev_info=%p", \ + __func__, __LINE__, x); \ + } while (0) + +#define PCM_GIANT_ENTER(x) \ + do { \ + int _pcm_giant = 0; \ + if (PCM_LOCKOWNED(x)) \ + panic("%s(%d): [GIANT ENTER] PCM lock owned!", \ + __func__, __LINE__); \ + if (mtx_owned(&Giant) != 0 && snd_verbose > 3) \ + device_printf((x)->dev, \ + "%s(%d): [GIANT ENTER] Giant owned!\n", __func__, \ + __LINE__); \ + if (!((x)->flags & SD_F_MPSAFE) && mtx_owned(&Giant) == 0) \ + do { \ + mtx_lock(&Giant); \ + _pcm_giant = 1; \ + } while (0) + +#define PCM_GIANT_EXIT(x) \ + do { \ + if (PCM_LOCKOWNED(x)) \ + panic("%s(%d): [GIANT EXIT] PCM lock owned!", \ + __func__, __LINE__); \ + if (!(_pcm_giant == 0 || _pcm_giant == 1)) \ + panic("%s(%d): [GIANT EXIT] _pcm_giant screwed!", \ + __func__, __LINE__); \ + if ((x)->flags & SD_F_MPSAFE) { \ + if (_pcm_giant == 1) \ + panic("%s(%d): [GIANT EXIT] MPSAFE Giant?", \ + __func__, __LINE__); \ + if (mtx_owned(&Giant) != 0 && snd_verbose > 3) \ + device_printf((x)->dev, \ + "%s(%d): [GIANT EXIT] Giant owned!\n", \ + __func__, __LINE__); \ + } \ + if (_pcm_giant != 0) { \ + if (mtx_owned(&Giant) == 0) \ + panic("%s(%d): [GIANT EXIT] Giant not owned!", \ + __func__, __LINE__); \ + _pcm_giant = 0; \ + mtx_unlock(&Giant); \ + } \ + } while (0) #else /* !SND_DIAGNOSTIC */ -#define PCM_WAIT(x) do { \ - PCM_LOCKASSERT(x); \ - while ((x)->flags & SD_F_BUSY) \ - cv_wait(&(x)->cv, (x)->lock); \ -} while (0) - -#define PCM_ACQUIRE(x) do { \ - PCM_LOCKASSERT(x); \ - KASSERT(!((x)->flags & SD_F_BUSY), \ - ("%s(%d): [PCM ACQUIRE] Trying to acquire BUSY cv!", \ - __func__, __LINE__)); \ - (x)->flags |= SD_F_BUSY; \ -} while (0) - -#define PCM_RELEASE(x) do { \ - PCM_LOCKASSERT(x); \ - KASSERT((x)->flags & SD_F_BUSY, \ - ("%s(%d): [PCM RELEASE] Releasing non-BUSY cv!", \ - __func__, __LINE__)); \ - (x)->flags &= ~SD_F_BUSY; \ - if ((x)->cv.cv_waiters != 0) \ - cv_broadcast(&(x)->cv); \ -} while (0) +#define PCM_WAIT(x) \ + do { \ + PCM_LOCKASSERT(x); \ + while ((x)->flags & SD_F_BUSY) \ + cv_wait(&(x)->cv, (x)->lock); \ + } while (0) + +#define PCM_ACQUIRE(x) \ + do { \ + PCM_LOCKASSERT(x); \ + KASSERT(!((x)->flags & SD_F_BUSY), \ + ("%s(%d): [PCM ACQUIRE] Trying to acquire BUSY cv!", \ + __func__, __LINE__)); \ + (x)->flags |= SD_F_BUSY; \ + } while (0) + +#define PCM_RELEASE(x) \ + do { \ + PCM_LOCKASSERT(x); \ + KASSERT((x)->flags &SD_F_BUSY, \ + ("%s(%d): [PCM RELEASE] Releasing non-BUSY cv!", __func__, \ + __LINE__)); \ + (x)->flags &= ~SD_F_BUSY; \ + if ((x)->cv.cv_waiters != 0) \ + cv_broadcast(&(x)->cv); \ + } while (0) /* Quick version, for shorter path. */ -#define PCM_ACQUIRE_QUICK(x) do { \ - PCM_UNLOCKASSERT(x); \ - PCM_LOCK(x); \ - PCM_WAIT(x); \ - PCM_ACQUIRE(x); \ - PCM_UNLOCK(x); \ -} while (0) - -#define PCM_RELEASE_QUICK(x) do { \ - PCM_UNLOCKASSERT(x); \ - PCM_LOCK(x); \ - PCM_RELEASE(x); \ - PCM_UNLOCK(x); \ -} while (0) - -#define PCM_BUSYASSERT(x) KASSERT(x != NULL && \ - ((x)->flags & SD_F_BUSY), \ - ("%s(%d): [PCM BUSYASSERT] " \ - "Failed, snddev_info=%p", \ - __func__, __LINE__, x)) - -#define PCM_GIANT_ENTER(x) do { \ - int _pcm_giant = 0; \ - PCM_UNLOCKASSERT(x); \ - if (!((x)->flags & SD_F_MPSAFE) && mtx_owned(&Giant) == 0) \ - do { \ - mtx_lock(&Giant); \ - _pcm_giant = 1; \ - } while (0) - -#define PCM_GIANT_EXIT(x) do { \ - PCM_UNLOCKASSERT(x); \ - KASSERT(_pcm_giant == 0 || _pcm_giant == 1, \ - ("%s(%d): [GIANT EXIT] _pcm_giant screwed!", \ - __func__, __LINE__)); \ - KASSERT(!((x)->flags & SD_F_MPSAFE) || \ - (((x)->flags & SD_F_MPSAFE) && _pcm_giant == 0), \ - ("%s(%d): [GIANT EXIT] MPSAFE Giant?", \ - __func__, __LINE__)); \ - if (_pcm_giant != 0) { \ - mtx_assert(&Giant, MA_OWNED); \ - _pcm_giant = 0; \ - mtx_unlock(&Giant); \ - } \ -} while (0) +#define PCM_ACQUIRE_QUICK(x) \ + do { \ + PCM_UNLOCKASSERT(x); \ + PCM_LOCK(x); \ + PCM_WAIT(x); \ + PCM_ACQUIRE(x); \ + PCM_UNLOCK(x); \ + } while (0) + +#define PCM_RELEASE_QUICK(x) \ + do { \ + PCM_UNLOCKASSERT(x); \ + PCM_LOCK(x); \ + PCM_RELEASE(x); \ + PCM_UNLOCK(x); \ + } while (0) + +#define PCM_BUSYASSERT(x) \ + KASSERT(x != NULL && ((x)->flags & SD_F_BUSY), \ + ("%s(%d): [PCM BUSYASSERT] " \ + "Failed, snddev_info=%p", \ + __func__, __LINE__, x)) + +#define PCM_GIANT_ENTER(x) \ + do { \ + int _pcm_giant = 0; \ + PCM_UNLOCKASSERT(x); \ + if (!((x)->flags & SD_F_MPSAFE) && mtx_owned(&Giant) == 0) \ + do { \ + mtx_lock(&Giant); \ + _pcm_giant = 1; \ + } while (0) + +#define PCM_GIANT_EXIT(x) \ + do { \ + PCM_UNLOCKASSERT(x); \ + KASSERT(_pcm_giant == 0 || _pcm_giant == 1, \ + ("%s(%d): [GIANT EXIT] _pcm_giant screwed!", __func__, \ + __LINE__)); \ + KASSERT(!((x)->flags & SD_F_MPSAFE) || \ + (((x)->flags & SD_F_MPSAFE) && _pcm_giant == 0), \ + ("%s(%d): [GIANT EXIT] MPSAFE Giant?", __func__, \ + __LINE__)); \ + if (_pcm_giant != 0) { \ + mtx_assert(&Giant, MA_OWNED); \ + _pcm_giant = 0; \ + mtx_unlock(&Giant); \ + } \ + } while (0) #endif /* SND_DIAGNOSTIC */ -#define PCM_GIANT_LEAVE(x) \ - PCM_GIANT_EXIT(x); \ -} while (0) +#define PCM_GIANT_LEAVE(x) \ + PCM_GIANT_EXIT(x); \ + } \ + while (0) #endif /* _KERNEL */ -#endif /* _OS_H_ */ +#endif /* _OS_H_ */ Index: sys/dev/sound/pcm/sound.c =================================================================== --- sys/dev/sound/pcm/sound.c +++ sys/dev/sound/pcm/sound.c @@ -37,13 +37,14 @@ #include "opt_snd.h" #endif -#include +#include +#include + #include -#include #include +#include +#include #include -#include -#include #include "feeder_if.h" @@ -54,13 +55,12 @@ int snd_unit = -1; static int snd_unit_auto = -1; -SYSCTL_INT(_hw_snd, OID_AUTO, default_auto, CTLFLAG_RWTUN, - &snd_unit_auto, 0, "assign default unit to a newly attached device"); +SYSCTL_INT(_hw_snd, OID_AUTO, default_auto, CTLFLAG_RWTUN, &snd_unit_auto, 0, + "assign default unit to a newly attached device"); int snd_maxautovchans = 16; -SYSCTL_NODE(_hw, OID_AUTO, snd, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "Sound driver"); +SYSCTL_NODE(_hw, OID_AUTO, snd, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, "Sound driver"); static void pcm_sysinit(device_t); @@ -68,10 +68,9 @@ * XXX I've had enough with people not telling proper version/arch * while reporting problems, not after 387397913213th questions/requests. */ -static char snd_driver_version[] = - __XSTRING(SND_DRV_VERSION)"/"MACHINE_ARCH; -SYSCTL_STRING(_hw_snd, OID_AUTO, version, CTLFLAG_RD, &snd_driver_version, - 0, "driver version/arch"); +static char snd_driver_version[] = __XSTRING(SND_DRV_VERSION) "/" MACHINE_ARCH; +SYSCTL_STRING(_hw_snd, OID_AUTO, version, CTLFLAG_RD, &snd_driver_version, 0, + "driver version/arch"); /** * @brief Unit number allocator for syncgroup IDs @@ -108,7 +107,8 @@ } int -snd_setup_intr(device_t dev, struct resource *res, int flags, driver_intr_t hand, void *param, void **cookiep) +snd_setup_intr(device_t dev, struct resource *res, int flags, + driver_intr_t hand, void *param, void **cookiep) { struct snddev_info *d; @@ -149,17 +149,20 @@ if (newcnt > vcnt) { KASSERT(num == -1 || - (num >= 0 && num < SND_MAXVCHANS && (newcnt - 1) == vcnt), + (num >= 0 && num < SND_MAXVCHANS && + (newcnt - 1) == vcnt), ("bogus vchan_create() request num=%d newcnt=%d vcnt=%d", - num, newcnt, vcnt)); + num, newcnt, vcnt)); /* add new vchans - find a parent channel first */ ch = NULL; - CHN_FOREACH(c, d, channels.pcm) { + CHN_FOREACH(c, d, channels.pcm) + { CHN_LOCK(c); if (c->direction == direction && - ((c->flags & CHN_F_HAS_VCHAN) || (vcnt == 0 && - c->refcount < 1 && - !(c->flags & (CHN_F_BUSY | CHN_F_VIRTUAL))))) { + ((c->flags & CHN_F_HAS_VCHAN) || + (vcnt == 0 && c->refcount < 1 && + !(c->flags & + (CHN_F_BUSY | CHN_F_VIRTUAL))))) { /* * Reuse hw channel with vchans already * created. @@ -209,7 +212,8 @@ } else if (newcnt < vcnt) { KASSERT(num == -1, ("bogus vchan_destroy() request num=%d", num)); - CHN_FOREACH(c, d, channels.pcm) { + CHN_FOREACH(c, d, channels.pcm) + { CHN_LOCK(c); if (c->direction != direction || CHN_EMPTY(c, children) || @@ -217,7 +221,8 @@ CHN_UNLOCK(c); continue; } - CHN_FOREACH_SAFE(ch, c, nch, children) { + CHN_FOREACH_SAFE(ch, c, nch, children) + { CHN_LOCK(ch); if (vcnt == 1 && c->refcount > 0) { CHN_UNLOCK(ch); @@ -249,11 +254,12 @@ struct pcm_channel *c; int err, vchancount, vchan_num; - KASSERT(d != NULL && ch != NULL && (devunit == -1 || - !(devunit & ~(SND_U_MASK | SND_D_MASK | SND_C_MASK))) && - (direction == PCMDIR_PLAY || direction == PCMDIR_REC), + KASSERT(d != NULL && ch != NULL && + (devunit == -1 || + !(devunit & ~(SND_U_MASK | SND_D_MASK | SND_C_MASK))) && + (direction == PCMDIR_PLAY || direction == PCMDIR_REC), ("%s(): invalid d=%p ch=%p direction=%d pid=%d devunit=%d", - __func__, d, ch, direction, pid, devunit)); + __func__, d, ch, direction, pid, devunit)); PCM_BUSYASSERT(d); /* Double check again. */ @@ -271,7 +277,7 @@ break; default: if (!(direction == PCMDIR_PLAY || - direction == PCMDIR_REC)) + direction == PCMDIR_REC)) return (ENOTSUP); break; } @@ -280,12 +286,13 @@ *ch = NULL; vchan_num = 0; vchancount = (direction == PCMDIR_PLAY) ? d->pvchancount : - d->rvchancount; + d->rvchancount; retry_chnalloc: err = ENOTSUP; /* scan for a free channel */ - CHN_FOREACH(c, d, channels.pcm) { + CHN_FOREACH(c, d, channels.pcm) + { CHN_LOCK(c); if (devunit == -1 && c->direction == direction && (c->flags & CHN_F_VIRTUAL)) { @@ -300,8 +307,9 @@ (devunit == -1 || devunit == -2 || c->unit == devunit)) { c->flags |= CHN_F_BUSY; c->pid = pid; - strlcpy(c->comm, (comm != NULL) ? comm : - CHN_COMM_UNKNOWN, sizeof(c->comm)); + strlcpy(c->comm, + (comm != NULL) ? comm : CHN_COMM_UNKNOWN, + sizeof(c->comm)); *ch = c; return (0); } else if (c->unit == devunit) { @@ -406,8 +414,7 @@ /* XXX: do we need a way to let the user change the default unit? */ SYSCTL_PROC(_hw_snd, OID_AUTO, default_unit, CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_ANYBODY | CTLFLAG_NEEDGIANT, 0, - sizeof(int), sysctl_hw_snd_default_unit, "I", - "default sound device"); + sizeof(int), sysctl_hw_snd_default_unit, "I", "default sound device"); static int sysctl_hw_snd_maxautovchans(SYSCTL_HANDLER_ARGS) @@ -424,7 +431,8 @@ v = SND_MAXVCHANS; snd_maxautovchans = v; for (i = 0; pcm_devclass != NULL && - i < devclass_get_maxunit(pcm_devclass); i++) { + i < devclass_get_maxunit(pcm_devclass); + i++) { d = devclass_get_softc(pcm_devclass, i); if (!PCM_REGISTERED(d)) continue; @@ -437,11 +445,11 @@ } SYSCTL_PROC(_hw_snd, OID_AUTO, maxautovchans, CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_NEEDGIANT, 0, sizeof(int), - sysctl_hw_snd_maxautovchans, "I", - "maximum virtual channel"); + sysctl_hw_snd_maxautovchans, "I", "maximum virtual channel"); struct pcm_channel * -pcm_chn_create(struct snddev_info *d, struct pcm_channel *parent, kobj_class_t cls, int dir, int num, void *devinfo) +pcm_chn_create(struct snddev_info *d, struct pcm_channel *parent, + kobj_class_t cls, int dir, int num, void *devinfo) { struct pcm_channel *ch; int direction, err, rpnum, *pnum, max; @@ -492,7 +500,8 @@ rpnum = 0; - CHN_FOREACH(ch, d, channels.pcm) { + CHN_FOREACH(ch, d, channels.pcm) + { if (CHN_DEV(ch) != device) continue; if (chan == CHN_CHAN(ch)) { @@ -503,8 +512,8 @@ } chan++; if (chan >= max) { - device_printf(d->dev, - "chan=%d > %d\n", chan, max); + device_printf(d->dev, "chan=%d > %d\n", chan, + max); return (NULL); } } @@ -580,8 +589,9 @@ { PCM_BUSYASSERT(d); PCM_LOCKASSERT(d); - KASSERT(ch != NULL && (ch->direction == PCMDIR_PLAY || - ch->direction == PCMDIR_REC), ("Invalid pcm channel")); + KASSERT(ch != NULL && + (ch->direction == PCMDIR_PLAY || ch->direction == PCMDIR_REC), + ("Invalid pcm channel")); CHN_INSERT_SORT_ASCEND(d, ch, channels.pcm); @@ -617,7 +627,8 @@ tmp = NULL; - CHN_FOREACH(tmp, d, channels.pcm) { + CHN_FOREACH(tmp, d, channels.pcm) + { if (tmp == ch) break; } @@ -705,8 +716,9 @@ best = -1; bestprio = -100; - for (i = 0; pcm_devclass != NULL && - i < devclass_get_maxunit(pcm_devclass); i++) { + for (i = 0; + pcm_devclass != NULL && i < devclass_get_maxunit(pcm_devclass); + i++) { d = devclass_get_softc(pcm_devclass, i); if (!PCM_REGISTERED(d)) continue; @@ -794,24 +806,30 @@ } unsigned int -pcm_getbuffersize(device_t dev, unsigned int minbufsz, unsigned int deflt, unsigned int maxbufsz) +pcm_getbuffersize(device_t dev, unsigned int minbufsz, unsigned int deflt, + unsigned int maxbufsz) { struct snddev_info *d = device_get_softc(dev); int sz, x; sz = 0; - if (resource_int_value(device_get_name(dev), device_get_unit(dev), "buffersize", &sz) == 0) { + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "buffersize", &sz) == 0) { x = sz; RANGE(sz, minbufsz, maxbufsz); if (x != sz) - device_printf(dev, "'buffersize=%d' hint is out of range (%d-%d), using %d\n", x, minbufsz, maxbufsz, sz); + device_printf(dev, + "'buffersize=%d' hint is out of range (%d-%d), using %d\n", + x, minbufsz, maxbufsz, sz); x = minbufsz; while (x < sz) x <<= 1; if (x > sz) x >>= 1; if (x != sz) { - device_printf(dev, "'buffersize=%d' hint is not a power of 2, using %d\n", sz, x); + device_printf(dev, + "'buffersize=%d' hint is not a power of 2, using %d\n", + sz, x); sz = x; } } else { @@ -886,16 +904,16 @@ /* XXX: a user should be able to set this with a control tool, the sysadmin then needs min+max sysctls for this */ SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "buffersize", CTLFLAG_RD, &d->bufsz, 0, "allocated buffer size"); + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, + "buffersize", CTLFLAG_RD, &d->bufsz, 0, "allocated buffer size"); SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "bitperfect", CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, d, sizeof(d), sysctl_dev_pcm_bitperfect, "I", "bit-perfect playback/recording (0=disable, 1=enable)"); SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "mode", CTLFLAG_RD, NULL, mode, + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "mode", + CTLFLAG_RD, NULL, mode, "mode (1=mixer, 2=play, 4=rec. The values are OR'ed if more than one" "mode is supported)"); if (d->flags & SD_F_AUTOVCHAN) @@ -911,7 +929,9 @@ int i; if (pcm_veto_load) { - device_printf(dev, "disabled due to an error while initialising: %d\n", pcm_veto_load); + device_printf(dev, + "disabled due to an error while initialising: %d\n", + pcm_veto_load); return EINVAL; } @@ -939,11 +959,13 @@ #endif i = 0; if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "vpc", &i) != 0 || i != 0) + "vpc", &i) != 0 || + i != 0) d->flags |= SD_F_VPC; if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "bitperfect", &i) == 0 && i != 0) + "bitperfect", &i) == 0 && + i != 0) d->flags |= SD_F_BITPERFECT; d->devinfo = devinfo; @@ -1003,7 +1025,8 @@ PCM_ACQUIRE(d); PCM_UNLOCK(d); - CHN_FOREACH(ch, d, channels.pcm) { + CHN_FOREACH(ch, d, channels.pcm) + { CHN_LOCK(ch); if (ch->flags & CHN_F_SLEEPING) { /* @@ -1081,8 +1104,8 @@ static char si_product[] = "FreeBSD native OSS ABI"; static char si_version[] = __XSTRING(__FreeBSD_version); static char si_license[] = "BSD"; - static int intnbits = sizeof(int) * 8; /* Better suited as macro? - Must pester a C guru. */ + static int intnbits = sizeof(int) * 8; /* Better suited as macro? + Must pester a C guru. */ struct snddev_info *d; struct pcm_channel *c; @@ -1104,8 +1127,9 @@ j = 0; - for (i = 0; pcm_devclass != NULL && - i < devclass_get_maxunit(pcm_devclass); i++) { + for (i = 0; + pcm_devclass != NULL && i < devclass_get_maxunit(pcm_devclass); + i++) { d = devclass_get_softc(pcm_devclass, i); if (!PCM_REGISTERED(d)) continue; @@ -1119,12 +1143,13 @@ si->numaudios += d->devcount; ++ncards; - CHN_FOREACH(c, d, channels.pcm) { + CHN_FOREACH(c, d, channels.pcm) + { CHN_UNLOCKASSERT(c); CHN_LOCK(c); if (c->flags & CHN_F_BUSY) - si->openedaudio[j / intnbits] |= - (1 << (j % intnbits)); + si->openedaudio[j / intnbits] |= (1 + << (j % intnbits)); CHN_UNLOCK(c); j++; } @@ -1133,7 +1158,7 @@ } si->numaudioengines = si->numaudios; - si->numsynths = 0; /* OSSv4 docs: this field is obsolete */ + si->numsynths = 0; /* OSSv4 docs: this field is obsolete */ /** * @todo Collect num{midis,timers}. * @@ -1149,9 +1174,9 @@ si->numtimers = 0; si->nummixers = mixer_count; si->numcards = ncards; - /* OSSv4 docs: Intended only for test apps; API doesn't - really have much of a concept of cards. Shouldn't be - used by applications. */ + /* OSSv4 docs: Intended only for test apps; API doesn't + really have much of a concept of cards. Shouldn't be + used by applications. */ /** * @todo Fill in "busy devices" fields. @@ -1164,7 +1189,7 @@ * Si->filler is a reserved array, but according to docs each * element should be set to -1. */ - for (i = 0; i < sizeof(si->filler)/sizeof(si->filler[0]); i++) + for (i = 0; i < sizeof(si->filler) / sizeof(si->filler[0]); i++) si->filler[i] = -1; } @@ -1176,8 +1201,9 @@ ncards = 0; - for (i = 0; pcm_devclass != NULL && - i < devclass_get_maxunit(pcm_devclass); i++) { + for (i = 0; + pcm_devclass != NULL && i < devclass_get_maxunit(pcm_devclass); + i++) { d = devclass_get_softc(pcm_devclass, i); if (!PCM_REGISTERED(d)) continue; @@ -1211,20 +1237,20 @@ ret = 0; switch (type) { - case MOD_LOAD: - pcm_devclass = devclass_create("pcm"); - pcmsg_unrhdr = new_unrhdr(1, INT_MAX, NULL); - break; - case MOD_UNLOAD: - if (pcmsg_unrhdr != NULL) { - delete_unrhdr(pcmsg_unrhdr); - pcmsg_unrhdr = NULL; - } - break; - case MOD_SHUTDOWN: - break; - default: - ret = ENOTSUP; + case MOD_LOAD: + pcm_devclass = devclass_create("pcm"); + pcmsg_unrhdr = new_unrhdr(1, INT_MAX, NULL); + break; + case MOD_UNLOAD: + if (pcmsg_unrhdr != NULL) { + delete_unrhdr(pcmsg_unrhdr); + pcmsg_unrhdr = NULL; + } + break; + case MOD_SHUTDOWN: + break; + default: + ret = ENOTSUP; } return ret; Index: sys/dev/sound/pcm/vchan.h =================================================================== --- sys/dev/sound/pcm/vchan.h +++ sys/dev/sound/pcm/vchan.h @@ -35,36 +35,37 @@ #ifdef SND_DEBUG int vchan_passthrough(struct pcm_channel *, const char *); -#define vchan_sync(c) vchan_passthrough(c, __func__) +#define vchan_sync(c) vchan_passthrough(c, __func__) #else int vchan_sync(struct pcm_channel *); #endif -#define VCHAN_SYNC_REQUIRED(c) \ - (((c)->flags & CHN_F_VIRTUAL) && (((c)->flags & CHN_F_DIRTY) || \ - sndbuf_getfmt((c)->bufhard) != (c)->parentchannel->format || \ - sndbuf_getspd((c)->bufhard) != (c)->parentchannel->speed)) +#define VCHAN_SYNC_REQUIRED(c) \ + (((c)->flags & CHN_F_VIRTUAL) && \ + (((c)->flags & CHN_F_DIRTY) || \ + sndbuf_getfmt((c)->bufhard) != (c)->parentchannel->format || \ + sndbuf_getspd((c)->bufhard) != (c)->parentchannel->speed)) void vchan_initsys(device_t); /* * Default format / rate */ -#define VCHAN_DEFAULT_FORMAT SND_FORMAT(AFMT_S16_LE, 2, 0) -#define VCHAN_DEFAULT_RATE 48000 +#define VCHAN_DEFAULT_FORMAT SND_FORMAT(AFMT_S16_LE, 2, 0) +#define VCHAN_DEFAULT_RATE 48000 -#define VCHAN_PLAY 0 -#define VCHAN_REC 1 +#define VCHAN_PLAY 0 +#define VCHAN_REC 1 /* * Offset by +/- 1 so we can distinguish bogus pointer. */ -#define VCHAN_SYSCTL_DATA(x, y) \ - ((void *)((intptr_t)(((((x) + 1) & 0xfff) << 2) | \ - (((VCHAN_##y) + 1) & 0x3)))) +#define VCHAN_SYSCTL_DATA(x, y) \ + ((void *)((intptr_t)(((((x) + 1) & 0xfff) << 2) | \ + (((VCHAN_##y) + 1) & 0x3)))) -#define VCHAN_SYSCTL_DATA_SIZE sizeof(void *) -#define VCHAN_SYSCTL_UNIT(x) ((int)(((intptr_t)(x) >> 2) & 0xfff) - 1) -#define VCHAN_SYSCTL_DIR(x) ((int)((intptr_t)(x) & 0x3) - 1) +#define VCHAN_SYSCTL_DATA_SIZE sizeof(void *) +#define VCHAN_SYSCTL_UNIT(x) ((int)(((intptr_t)(x) >> 2) & 0xfff) - 1) +#define VCHAN_SYSCTL_DIR(x) ((int)((intptr_t)(x) & 0x3) - 1) -#endif /* _SND_VCHAN_H_ */ +#endif /* _SND_VCHAN_H_ */ Index: sys/dev/sound/pcm/vchan.c =================================================================== --- sys/dev/sound/pcm/vchan.c +++ sys/dev/sound/pcm/vchan.c @@ -39,14 +39,14 @@ /* * [ac3 , dts , linear , 0, linear, 0] */ -#define FMTLIST_MAX 6 -#define FMTLIST_OFFSET 4 -#define DIGFMTS_MAX 2 +#define FMTLIST_MAX 6 +#define FMTLIST_OFFSET 4 +#define DIGFMTS_MAX 2 #ifdef SND_DEBUG static int snd_passthrough_verbose = 0; SYSCTL_INT(_hw_snd, OID_AUTO, passthrough_verbose, CTLFLAG_RWTUN, - &snd_passthrough_verbose, 0, "passthrough verbosity"); + &snd_passthrough_verbose, 0, "passthrough verbosity"); #endif @@ -58,8 +58,8 @@ }; static void * -vchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, - struct pcm_channel *c, int dir) +vchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, + int dir) { struct vchan_info *info; struct pcm_channel *p; @@ -218,8 +218,8 @@ info->caps.fmtlist[0] = pformat; else { device_printf(c->dev, - "%s(): invalid vchan format 0x%08x", - __func__, pformat); + "%s(): invalid vchan format 0x%08x", __func__, + pformat); info->caps.fmtlist[0] = VCHAN_DEFAULT_FORMAT; } info->caps.minspeed = pspeed; @@ -236,21 +236,18 @@ return (feeder_matrix_format_map(format)); } -static kobj_method_t vchan_methods[] = { - KOBJMETHOD(channel_init, vchan_init), - KOBJMETHOD(channel_free, vchan_free), - KOBJMETHOD(channel_setformat, vchan_setformat), - KOBJMETHOD(channel_setspeed, vchan_setspeed), - KOBJMETHOD(channel_trigger, vchan_trigger), - KOBJMETHOD(channel_getcaps, vchan_getcaps), - KOBJMETHOD(channel_getmatrix, vchan_getmatrix), - KOBJMETHOD_END -}; +static kobj_method_t vchan_methods[] = { KOBJMETHOD(channel_init, vchan_init), + KOBJMETHOD(channel_free, vchan_free), + KOBJMETHOD(channel_setformat, vchan_setformat), + KOBJMETHOD(channel_setspeed, vchan_setspeed), + KOBJMETHOD(channel_trigger, vchan_trigger), + KOBJMETHOD(channel_getcaps, vchan_getcaps), + KOBJMETHOD(channel_getmatrix, vchan_getmatrix), KOBJMETHOD_END }; CHANNEL_DECLARE(vchan); static void -pcm_getparentchannel(struct snddev_info *d, - struct pcm_channel **wrch, struct pcm_channel **rdch) +pcm_getparentchannel(struct snddev_info *d, struct pcm_channel **wrch, + struct pcm_channel **rdch) { struct pcm_channel **ch, *wch, *rch, *c; @@ -262,7 +259,8 @@ wch = NULL; rch = NULL; - CHN_FOREACH(c, d, channels.pcm) { + CHN_FOREACH(c, d, channels.pcm) + { CHN_LOCK(c); ch = (c->direction == PCMDIR_PLAY) ? &wch : &rch; if (c->flags & CHN_F_VIRTUAL) { @@ -387,8 +385,9 @@ return (EINVAL); } - KASSERT(direction == c->direction, ("%s(): invalid direction %d/%d", - __func__, direction, c->direction)); + KASSERT(direction == c->direction, + ("%s(): invalid direction %d/%d", __func__, direction, + c->direction)); CHN_LOCK(c); if (c->flags & CHN_F_VCHAN_PASSTHROUGH) @@ -435,10 +434,9 @@ * On the fly vchan rate/format settings */ -#define VCHAN_ACCESSIBLE(c) (!((c)->flags & (CHN_F_PASSTHROUGH | \ - CHN_F_EXCLUSIVE)) && \ - (((c)->flags & CHN_F_VCHAN_DYNAMIC) || \ - CHN_STOPPED(c))) +#define VCHAN_ACCESSIBLE(c) \ + (!((c)->flags & (CHN_F_PASSTHROUGH | CHN_F_EXCLUSIVE)) && \ + (((c)->flags & CHN_F_VCHAN_DYNAMIC) || CHN_STOPPED(c))) static int sysctl_dev_pcm_vchanrate(SYSCTL_HANDLER_ARGS) { @@ -489,8 +487,9 @@ return (EINVAL); } - KASSERT(direction == c->direction, ("%s(): invalid direction %d/%d", - __func__, direction, c->direction)); + KASSERT(direction == c->direction, + ("%s(): invalid direction %d/%d", __func__, direction, + c->direction)); CHN_LOCK(c); newspd = c->speed; @@ -520,15 +519,16 @@ if (feeder_rate_round) { caps = chn_getcaps(c); RANGE(newspd, caps->minspeed, caps->maxspeed); - newspd = CHANNEL_SETSPEED(c->methods, - c->devinfo, newspd); + newspd = CHANNEL_SETSPEED(c->methods, c->devinfo, + newspd); } ret = chn_reset(c, c->format, newspd); if (ret == 0) { *vchanrate = c->speed; if (restart != 0) { - CHN_FOREACH(ch, c, children.busy) { + CHN_FOREACH(ch, c, children.busy) + { CHN_LOCK(ch); if (VCHAN_SYNC_REQUIRED(ch)) vchan_sync(ch); @@ -598,8 +598,9 @@ return (EINVAL); } - KASSERT(direction == c->direction, ("%s(): invalid direction %d/%d", - __func__, direction, c->direction)); + KASSERT(direction == c->direction, + ("%s(): invalid direction %d/%d", __func__, direction, + c->direction)); CHN_LOCK(c); @@ -635,7 +636,8 @@ if (ret == 0) { *vchanformat = c->format; if (restart != 0) { - CHN_FOREACH(ch, c, children.busy) { + CHN_FOREACH(ch, c, children.busy) + { CHN_LOCK(ch); if (VCHAN_SYNC_REQUIRED(ch)) vchan_sync(ch); @@ -656,10 +658,10 @@ /* virtual channel interface */ -#define VCHAN_FMT_HINT(x) ((x) == PCMDIR_PLAY_VIRTUAL) ? \ - "play.vchanformat" : "rec.vchanformat" -#define VCHAN_SPD_HINT(x) ((x) == PCMDIR_PLAY_VIRTUAL) ? \ - "play.vchanrate" : "rec.vchanrate" +#define VCHAN_FMT_HINT(x) \ + ((x) == PCMDIR_PLAY_VIRTUAL) ? "play.vchanformat" : "rec.vchanformat" +#define VCHAN_SPD_HINT(x) \ + ((x) == PCMDIR_PLAY_VIRTUAL) ? "play.vchanrate" : "rec.vchanrate" int vchan_create(struct pcm_channel *parent, int num) @@ -679,7 +681,7 @@ return (EBUSY); if (!(parent->direction == PCMDIR_PLAY || - parent->direction == PCMDIR_REC)) + parent->direction == PCMDIR_REC)) return (EINVAL); d = parent->parentsnddev; @@ -854,8 +856,8 @@ int ret; KASSERT(c != NULL && c->parentchannel != NULL && - c->parentsnddev != NULL, ("%s(): invalid channel=%p", - __func__, c)); + c->parentsnddev != NULL, + ("%s(): invalid channel=%p", __func__, c)); CHN_LOCKASSERT(c); @@ -907,7 +909,7 @@ int ret; KASSERT(c != NULL && c->parentchannel != NULL && - (c->flags & CHN_F_VIRTUAL), + (c->flags & CHN_F_VIRTUAL), ("%s(): invalid passthrough", __func__)); CHN_LOCKASSERT(c); CHN_LOCKASSERT(c->parentchannel); @@ -924,8 +926,7 @@ char *devname, buf[CHN_NAMELEN]; devname = dsp_unit2name(buf, sizeof(buf), c->unit); - device_printf(c->dev, - "%s(%s/%s) %s() -> re-sync err=%d\n", + device_printf(c->dev, "%s(%s/%s) %s() -> re-sync err=%d\n", __func__, (devname != NULL) ? devname : "dspX", c->comm, caller, ret); } @@ -945,51 +946,42 @@ /* Play */ SYSCTL_ADD_PROC(&d->play_sysctl_ctx, - SYSCTL_CHILDREN(d->play_sysctl_tree), - OID_AUTO, "vchans", CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, + SYSCTL_CHILDREN(d->play_sysctl_tree), OID_AUTO, "vchans", + CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, VCHAN_SYSCTL_DATA(unit, PLAY), VCHAN_SYSCTL_DATA_SIZE, sysctl_dev_pcm_vchans, "I", "total allocated virtual channel"); SYSCTL_ADD_PROC(&d->play_sysctl_ctx, - SYSCTL_CHILDREN(d->play_sysctl_tree), - OID_AUTO, "vchanmode", + SYSCTL_CHILDREN(d->play_sysctl_tree), OID_AUTO, "vchanmode", CTLTYPE_STRING | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, VCHAN_SYSCTL_DATA(unit, PLAY), VCHAN_SYSCTL_DATA_SIZE, sysctl_dev_pcm_vchanmode, "A", "vchan format/rate selection: 0=fixed, 1=passthrough, 2=adaptive"); SYSCTL_ADD_PROC(&d->play_sysctl_ctx, - SYSCTL_CHILDREN(d->play_sysctl_tree), - OID_AUTO, "vchanrate", + SYSCTL_CHILDREN(d->play_sysctl_tree), OID_AUTO, "vchanrate", CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, VCHAN_SYSCTL_DATA(unit, PLAY), VCHAN_SYSCTL_DATA_SIZE, sysctl_dev_pcm_vchanrate, "I", "virtual channel mixing speed/rate"); SYSCTL_ADD_PROC(&d->play_sysctl_ctx, - SYSCTL_CHILDREN(d->play_sysctl_tree), - OID_AUTO, "vchanformat", + SYSCTL_CHILDREN(d->play_sysctl_tree), OID_AUTO, "vchanformat", CTLTYPE_STRING | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, VCHAN_SYSCTL_DATA(unit, PLAY), VCHAN_SYSCTL_DATA_SIZE, sysctl_dev_pcm_vchanformat, "A", "virtual channel mixing format"); /* Rec */ - SYSCTL_ADD_PROC(&d->rec_sysctl_ctx, - SYSCTL_CHILDREN(d->rec_sysctl_tree), - OID_AUTO, "vchans", - CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, + SYSCTL_ADD_PROC(&d->rec_sysctl_ctx, SYSCTL_CHILDREN(d->rec_sysctl_tree), + OID_AUTO, "vchans", CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, VCHAN_SYSCTL_DATA(unit, REC), VCHAN_SYSCTL_DATA_SIZE, sysctl_dev_pcm_vchans, "I", "total allocated virtual channel"); - SYSCTL_ADD_PROC(&d->rec_sysctl_ctx, - SYSCTL_CHILDREN(d->rec_sysctl_tree), + SYSCTL_ADD_PROC(&d->rec_sysctl_ctx, SYSCTL_CHILDREN(d->rec_sysctl_tree), OID_AUTO, "vchanmode", CTLTYPE_STRING | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, VCHAN_SYSCTL_DATA(unit, REC), VCHAN_SYSCTL_DATA_SIZE, sysctl_dev_pcm_vchanmode, "A", "vchan format/rate selection: 0=fixed, 1=passthrough, 2=adaptive"); - SYSCTL_ADD_PROC(&d->rec_sysctl_ctx, - SYSCTL_CHILDREN(d->rec_sysctl_tree), - OID_AUTO, "vchanrate", - CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, + SYSCTL_ADD_PROC(&d->rec_sysctl_ctx, SYSCTL_CHILDREN(d->rec_sysctl_tree), + OID_AUTO, "vchanrate", CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, VCHAN_SYSCTL_DATA(unit, REC), VCHAN_SYSCTL_DATA_SIZE, sysctl_dev_pcm_vchanrate, "I", "virtual channel mixing speed/rate"); - SYSCTL_ADD_PROC(&d->rec_sysctl_ctx, - SYSCTL_CHILDREN(d->rec_sysctl_tree), + SYSCTL_ADD_PROC(&d->rec_sysctl_ctx, SYSCTL_CHILDREN(d->rec_sysctl_tree), OID_AUTO, "vchanformat", CTLTYPE_STRING | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, VCHAN_SYSCTL_DATA(unit, REC), VCHAN_SYSCTL_DATA_SIZE, Index: sys/dev/sound/unit.h =================================================================== --- sys/dev/sound/unit.h +++ sys/dev/sound/unit.h @@ -29,8 +29,8 @@ #ifndef _SND_UNIT_H_ #define _SND_UNIT_H_ -#define SND_UNIT_UMIN 16 -#define SND_UNIT_UMAX 2048 +#define SND_UNIT_UMIN 16 +#define SND_UNIT_UMAX 2048 int snd_max_u(void); int snd_max_d(void); @@ -45,8 +45,8 @@ void snd_unit_init(void); -#define SND_U_MASK (snd_u2unit(snd_max_u())) -#define SND_D_MASK (snd_d2unit(snd_max_d())) -#define SND_C_MASK (snd_c2unit(snd_max_c())) +#define SND_U_MASK (snd_u2unit(snd_max_u())) +#define SND_D_MASK (snd_d2unit(snd_max_d())) +#define SND_C_MASK (snd_c2unit(snd_max_c())) #endif /* !_SND_UNIT_H_ */ Index: sys/dev/sound/unit.c =================================================================== --- sys/dev/sound/unit.c +++ sys/dev/sound/unit.c @@ -51,25 +51,26 @@ */ /* Default width */ -static int snd_u_shift = 9; /* 0 - 0x1ff : 512 distinct soundcards */ -static int snd_d_shift = 5; /* 0 - 0x1f : 32 distinct device types */ -static int snd_c_shift = 10; /* 0 - 0x3ff : 1024 distinct channels - (256 limit "by design") */ +static int snd_u_shift = 9; /* 0 - 0x1ff : 512 distinct soundcards */ +static int snd_d_shift = 5; /* 0 - 0x1f : 32 distinct device types */ +static int snd_c_shift = 10; /* 0 - 0x3ff : 1024 distinct channels + (256 limit "by design") */ static int snd_unit_initialized = 0; #ifdef SND_DIAGNOSTIC -#define SND_UNIT_ASSERT() do { \ - if (snd_unit_initialized == 0) \ - panic("%s(): Uninitialized sound unit!", __func__); \ -} while (0) +#define SND_UNIT_ASSERT() \ + do { \ + if (snd_unit_initialized == 0) \ + panic("%s(): Uninitialized sound unit!", __func__); \ + } while (0) #else -#define SND_UNIT_ASSERT() KASSERT(snd_unit_initialized != 0, \ - ("%s(): Uninitialized sound unit!", \ - __func__)) +#define SND_UNIT_ASSERT() \ + KASSERT(snd_unit_initialized != 0, \ + ("%s(): Uninitialized sound unit!", __func__)) #endif -#define MKMASK(x) ((1 << snd_##x##_shift) - 1) +#define MKMASK(x) ((1 << snd_##x##_shift) - 1) int snd_max_u(void) @@ -174,7 +175,7 @@ i = roundup2(i, 2); for (snd_u_shift = 0; (i >> (snd_u_shift + 1)) != 0; - snd_u_shift++) + snd_u_shift++) ; /* Make room for channels to fit within 24bit MAXMINOR limit. */ @@ -183,6 +184,6 @@ if (bootverbose != 0) printf("%s() u=0x%08x [%d] d=0x%08x [%d] c=0x%08x [%d]\n", - __func__, SND_U_MASK, snd_max_u() + 1, - SND_D_MASK, snd_max_d() + 1, SND_C_MASK, snd_max_c() + 1); + __func__, SND_U_MASK, snd_max_u() + 1, SND_D_MASK, + snd_max_d() + 1, SND_C_MASK, snd_max_c() + 1); } Index: sys/dev/sound/usb/uaudio.h =================================================================== --- sys/dev/sound/usb/uaudio.h +++ sys/dev/sound/usb/uaudio.h @@ -29,7 +29,7 @@ /* prototypes from "uaudio.c" used by "uaudio_pcm.c" */ #ifndef _UAUDIO_H_ -#define _UAUDIO_H_ +#define _UAUDIO_H_ struct uaudio_chan; struct uaudio_softc; @@ -37,35 +37,34 @@ struct snd_mixer; struct pcm_channel; -extern int uaudio_attach_sub(device_t dev, kobj_class_t mixer_class, - kobj_class_t chan_class); -extern int uaudio_detach_sub(device_t dev); -extern void *uaudio_chan_init(struct uaudio_chan *ch, struct snd_dbuf *b, - struct pcm_channel *c, int dir); -extern int uaudio_chan_free(struct uaudio_chan *ch); -extern int uaudio_chan_set_param_blocksize(struct uaudio_chan *ch, - uint32_t blocksize); -extern int uaudio_chan_set_param_fragments(struct uaudio_chan *ch, - uint32_t blocksize, uint32_t blockcount); -extern int uaudio_chan_set_param_speed(struct uaudio_chan *ch, - uint32_t speed); -extern int uaudio_chan_getptr(struct uaudio_chan *ch); -extern struct pcmchan_caps *uaudio_chan_getcaps(struct uaudio_chan *ch); -extern struct pcmchan_matrix *uaudio_chan_getmatrix(struct uaudio_chan *ch, - uint32_t format); -extern int uaudio_chan_set_param_format(struct uaudio_chan *ch, - uint32_t format); -extern void uaudio_chan_start(struct uaudio_chan *ch); -extern void uaudio_chan_stop(struct uaudio_chan *ch); -extern int uaudio_mixer_init_sub(struct uaudio_softc *, struct snd_mixer *); -extern int uaudio_mixer_uninit_sub(struct uaudio_softc *, struct snd_mixer *); -extern void uaudio_mixer_set(struct uaudio_softc *, struct snd_mixer *, - unsigned type, unsigned left, unsigned right); -extern uint32_t uaudio_mixer_setrecsrc(struct uaudio_softc *, struct snd_mixer *, - uint32_t src); +extern int uaudio_attach_sub(device_t dev, kobj_class_t mixer_class, + kobj_class_t chan_class); +extern int uaudio_detach_sub(device_t dev); +extern void *uaudio_chan_init(struct uaudio_chan *ch, struct snd_dbuf *b, + struct pcm_channel *c, int dir); +extern int uaudio_chan_free(struct uaudio_chan *ch); +extern int uaudio_chan_set_param_blocksize(struct uaudio_chan *ch, + uint32_t blocksize); +extern int uaudio_chan_set_param_fragments(struct uaudio_chan *ch, + uint32_t blocksize, uint32_t blockcount); +extern int uaudio_chan_set_param_speed(struct uaudio_chan *ch, uint32_t speed); +extern int uaudio_chan_getptr(struct uaudio_chan *ch); +extern struct pcmchan_caps *uaudio_chan_getcaps(struct uaudio_chan *ch); +extern struct pcmchan_matrix *uaudio_chan_getmatrix(struct uaudio_chan *ch, + uint32_t format); +extern int uaudio_chan_set_param_format(struct uaudio_chan *ch, + uint32_t format); +extern void uaudio_chan_start(struct uaudio_chan *ch); +extern void uaudio_chan_stop(struct uaudio_chan *ch); +extern int uaudio_mixer_init_sub(struct uaudio_softc *, struct snd_mixer *); +extern int uaudio_mixer_uninit_sub(struct uaudio_softc *, struct snd_mixer *); +extern void uaudio_mixer_set(struct uaudio_softc *, struct snd_mixer *, + unsigned type, unsigned left, unsigned right); +extern uint32_t uaudio_mixer_setrecsrc(struct uaudio_softc *, + struct snd_mixer *, uint32_t src); -int uaudio_get_vendor(device_t dev); -int uaudio_get_product(device_t dev); -int uaudio_get_release(device_t dev); +int uaudio_get_vendor(device_t dev); +int uaudio_get_product(device_t dev); +int uaudio_get_release(device_t dev); -#endif /* _UAUDIO_H_ */ +#endif /* _UAUDIO_H_ */ Index: sys/dev/sound/usb/uaudio.c =================================================================== --- sys/dev/sound/usb/uaudio.c +++ sys/dev/sound/usb/uaudio.c @@ -47,55 +47,55 @@ * $NetBSD: uaudio.c,v 1.97 2005/02/24 08:19:38 martin Exp $ */ -#include -#include -#include -#include #include +#include #include -#include #include -#include +#include +#include +#include #include +#include +#include #include -#include -#include +#include +#include +#include +#include #include +#include #include -#include -#include -#include #include - -#include "usbdevs.h" #include +#include +#include #include #include #include -#include -#include -#define USB_DEBUG_VAR uaudio_debug -#include +#include "usbdevs.h" -#include +#define USB_DEBUG_VAR uaudio_debug +#include /* for bootverbose */ -#include /* for bootverbose */ +#include +#include #ifdef HAVE_KERNEL_OPTION_HEADERS #include "opt_snd.h" #endif +#include #include -#include #include -#include +#include + #include "feeder_if.h" -static int uaudio_default_rate = 0; /* use rate list */ -static int uaudio_default_bits = 0; /* use default sample size */ -static int uaudio_default_channels = 0; /* use default */ +static int uaudio_default_rate = 0; /* use rate list */ +static int uaudio_default_bits = 0; /* use default sample size */ +static int uaudio_default_channels = 0; /* use default */ static int uaudio_buffer_ms = 4; static bool uaudio_handle_hid = true; @@ -110,8 +110,8 @@ SYSCTL_INT(_hw_usb_uaudio, OID_AUTO, default_channels, CTLFLAG_RWTUN, &uaudio_default_channels, 0, "uaudio default sample channels"); -#define UAUDIO_BUFFER_MS_MIN 1 -#define UAUDIO_BUFFER_MS_MAX 8 +#define UAUDIO_BUFFER_MS_MIN 1 +#define UAUDIO_BUFFER_MS_MAX 8 static int uaudio_buffer_ms_sysctl(SYSCTL_HANDLER_ARGS) @@ -141,23 +141,23 @@ #ifdef USB_DEBUG static int uaudio_debug; -SYSCTL_INT(_hw_usb_uaudio, OID_AUTO, debug, CTLFLAG_RWTUN, - &uaudio_debug, 0, "uaudio debug level"); +SYSCTL_INT(_hw_usb_uaudio, OID_AUTO, debug, CTLFLAG_RWTUN, &uaudio_debug, 0, + "uaudio debug level"); #else -#define uaudio_debug 0 +#define uaudio_debug 0 #endif -#define UAUDIO_NFRAMES 64 /* must be factor of 8 due HS-USB */ -#define UAUDIO_NCHANBUFS 2 /* number of outstanding request */ -#define UAUDIO_RECURSE_LIMIT 255 /* rounds */ -#define UAUDIO_BITS_MAX 32 /* maximum sample size in bits */ -#define UAUDIO_CHANNELS_MAX MIN(64, AFMT_CHANNEL_MAX) -#define UAUDIO_MATRIX_MAX 8 /* channels */ +#define UAUDIO_NFRAMES 64 /* must be factor of 8 due HS-USB */ +#define UAUDIO_NCHANBUFS 2 /* number of outstanding request */ +#define UAUDIO_RECURSE_LIMIT 255 /* rounds */ +#define UAUDIO_BITS_MAX 32 /* maximum sample size in bits */ +#define UAUDIO_CHANNELS_MAX MIN(64, AFMT_CHANNEL_MAX) +#define UAUDIO_MATRIX_MAX 8 /* channels */ -#define MAKE_WORD(h,l) (((h) << 8) | (l)) -#define BIT_TEST(bm,bno) (((bm)[(bno) / 8] >> (7 - ((bno) % 8))) & 1) -#define UAUDIO_MAX_CHAN(x) (x) -#define MIX(sc) ((sc)->sc_mixer_node) +#define MAKE_WORD(h, l) (((h) << 8) | (l)) +#define BIT_TEST(bm, bno) (((bm)[(bno) / 8] >> (7 - ((bno) % 8))) & 1) +#define UAUDIO_MAX_CHAN(x) (x) +#define MIX(sc) ((sc)->sc_mixer_node) union uaudio_asid { const struct usb_audio_streaming_interface_descriptor *v1; @@ -177,31 +177,31 @@ struct uaudio_mixer_node { const char *name; - int32_t minval; - int32_t maxval; -#define MIX_MAX_CHAN 16 - int32_t wValue[MIX_MAX_CHAN]; /* using nchan */ + int32_t minval; + int32_t maxval; +#define MIX_MAX_CHAN 16 + int32_t wValue[MIX_MAX_CHAN]; /* using nchan */ uint32_t mul; uint32_t ctl; - int wData[MIX_MAX_CHAN]; /* using nchan */ + int wData[MIX_MAX_CHAN]; /* using nchan */ uint16_t wIndex; - uint8_t update[(MIX_MAX_CHAN + 7) / 8]; - uint8_t nchan; - uint8_t type; -#define MIX_ON_OFF 1 -#define MIX_SIGNED_16 2 -#define MIX_UNSIGNED_16 3 -#define MIX_SIGNED_8 4 -#define MIX_SELECTOR 5 -#define MIX_UNKNOWN 6 -#define MIX_SIZE(n) ((((n) == MIX_SIGNED_16) || \ - ((n) == MIX_UNSIGNED_16)) ? 2 : 1) -#define MIX_UNSIGNED(n) ((n) == MIX_UNSIGNED_16) - -#define MAX_SELECTOR_INPUT_PIN 256 - uint8_t slctrtype[MAX_SELECTOR_INPUT_PIN]; + uint8_t update[(MIX_MAX_CHAN + 7) / 8]; + uint8_t nchan; + uint8_t type; +#define MIX_ON_OFF 1 +#define MIX_SIGNED_16 2 +#define MIX_UNSIGNED_16 3 +#define MIX_SIGNED_8 4 +#define MIX_SELECTOR 5 +#define MIX_UNKNOWN 6 +#define MIX_SIZE(n) \ + ((((n) == MIX_SIGNED_16) || ((n) == MIX_UNSIGNED_16)) ? 2 : 1) +#define MIX_UNSIGNED(n) ((n) == MIX_UNSIGNED_16) + +#define MAX_SELECTOR_INPUT_PIN 256 + uint8_t slctrtype[MAX_SELECTOR_INPUT_PIN]; uint8_t val_default; uint8_t desc[64]; @@ -214,7 +214,7 @@ struct uaudio_softc *sc; }; -#define CHAN_MAX_ALT 24 +#define CHAN_MAX_ALT 24 struct uaudio_chan_alt { union uaudio_asf1d p_asf1d; @@ -222,29 +222,29 @@ const usb_endpoint_descriptor_audio_t *p_ed1; const struct uaudio_format *p_fmt; const struct usb_config *usb_cfg; - uint32_t sample_rate; /* in Hz */ + uint32_t sample_rate; /* in Hz */ uint16_t sample_size; - uint8_t iface_index; - uint8_t iface_alt_index; + uint8_t iface_index; + uint8_t iface_alt_index; uint8_t channels; }; struct uaudio_chan { - struct pcmchan_caps pcm_cap; /* capabilities */ + struct pcmchan_caps pcm_cap; /* capabilities */ struct uaudio_chan_alt usb_alt[CHAN_MAX_ALT]; struct snd_dbuf *pcm_buf; - struct mtx *pcm_mtx; /* lock protecting this structure */ + struct mtx *pcm_mtx; /* lock protecting this structure */ struct uaudio_softc *priv_sc; struct pcm_channel *pcm_ch; struct usb_xfer *xfer[UAUDIO_NCHANBUFS + 1]; - uint8_t *buf; /* pointer to buffer */ - uint8_t *start; /* upper layer buffer start */ - uint8_t *end; /* upper layer buffer end */ - uint8_t *cur; /* current position in upper layer - * buffer */ + uint8_t *buf; /* pointer to buffer */ + uint8_t *start; /* upper layer buffer start */ + uint8_t *end; /* upper layer buffer end */ + uint8_t *cur; /* current position in upper layer + * buffer */ - uint32_t intr_frames; /* in units */ + uint32_t intr_frames; /* in units */ uint32_t frames_per_second; uint32_t sample_rem; uint32_t sample_curr; @@ -264,17 +264,17 @@ uint32_t cur_alt; uint32_t set_alt; uint32_t operation; -#define CHAN_OP_NONE 0 -#define CHAN_OP_START 1 -#define CHAN_OP_STOP 2 -#define CHAN_OP_DRAIN 3 +#define CHAN_OP_NONE 0 +#define CHAN_OP_START 1 +#define CHAN_OP_STOP 2 +#define CHAN_OP_DRAIN 3 uint8_t iface_index; }; -#define UMIDI_EMB_JACK_MAX 16 /* units */ -#define UMIDI_TX_FRAMES 256 /* units */ -#define UMIDI_TX_BUFFER (UMIDI_TX_FRAMES * 4) /* bytes */ +#define UMIDI_EMB_JACK_MAX 16 /* units */ +#define UMIDI_TX_FRAMES 256 /* units */ +#define UMIDI_TX_BUFFER (UMIDI_TX_FRAMES * 4) /* bytes */ enum { UMIDI_TX_TRANSFER, @@ -285,20 +285,20 @@ struct umidi_sub_chan { struct usb_fifo_sc fifo; uint8_t *temp_cmd; - uint8_t temp_0[4]; - uint8_t temp_1[4]; - uint8_t state; -#define UMIDI_ST_UNKNOWN 0 /* scan for command */ -#define UMIDI_ST_1PARAM 1 -#define UMIDI_ST_2PARAM_1 2 -#define UMIDI_ST_2PARAM_2 3 -#define UMIDI_ST_SYSEX_0 4 -#define UMIDI_ST_SYSEX_1 5 -#define UMIDI_ST_SYSEX_2 6 - - uint8_t read_open:1; - uint8_t write_open:1; - uint8_t unused:6; + uint8_t temp_0[4]; + uint8_t temp_1[4]; + uint8_t state; +#define UMIDI_ST_UNKNOWN 0 /* scan for command */ +#define UMIDI_ST_1PARAM 1 +#define UMIDI_ST_2PARAM_1 2 +#define UMIDI_ST_2PARAM_2 3 +#define UMIDI_ST_SYSEX_0 4 +#define UMIDI_ST_SYSEX_1 5 +#define UMIDI_ST_SYSEX_2 6 + + uint8_t read_open : 1; + uint8_t write_open : 1; + uint8_t unused : 6; }; struct umidi_chan { @@ -307,23 +307,23 @@ struct usb_xfer *xfer[UMIDI_N_TRANSFER]; - uint8_t iface_index; - uint8_t iface_alt_index; + uint8_t iface_index; + uint8_t iface_alt_index; - uint8_t read_open_refcount; - uint8_t write_open_refcount; + uint8_t read_open_refcount; + uint8_t write_open_refcount; - uint8_t curr_cable; - uint8_t max_emb_jack; - uint8_t valid; + uint8_t curr_cable; + uint8_t max_emb_jack; + uint8_t valid; uint8_t single_command; }; struct uaudio_search_result { - uint8_t bit_input[(256 + 7) / 8]; - uint8_t bit_output[(256 + 7) / 8]; - uint8_t recurse_level; - uint8_t id_max; + uint8_t bit_input[(256 + 7) / 8]; + uint8_t bit_output[(256 + 7) / 8]; + uint8_t recurse_level; + uint8_t id_max; uint8_t is_input; }; @@ -338,23 +338,23 @@ struct hid_location volume_down_loc; struct hid_location mute_loc; uint32_t flags; -#define UAUDIO_HID_VALID 0x0001 -#define UAUDIO_HID_HAS_ID 0x0002 -#define UAUDIO_HID_HAS_VOLUME_UP 0x0004 -#define UAUDIO_HID_HAS_VOLUME_DOWN 0x0008 -#define UAUDIO_HID_HAS_MUTE 0x0010 +#define UAUDIO_HID_VALID 0x0001 +#define UAUDIO_HID_HAS_ID 0x0002 +#define UAUDIO_HID_HAS_VOLUME_UP 0x0004 +#define UAUDIO_HID_HAS_VOLUME_DOWN 0x0008 +#define UAUDIO_HID_HAS_MUTE 0x0010 uint8_t iface_index; uint8_t volume_up_id; uint8_t volume_down_id; uint8_t mute_id; }; -#define UAUDIO_SPDIF_OUT 0x01 /* Enable S/PDIF output */ -#define UAUDIO_SPDIF_OUT_48K 0x02 /* Out sample rate = 48K */ -#define UAUDIO_SPDIF_OUT_96K 0x04 /* Out sample rate = 96K */ -#define UAUDIO_SPDIF_IN_MIX 0x10 /* Input mix enable */ +#define UAUDIO_SPDIF_OUT 0x01 /* Enable S/PDIF output */ +#define UAUDIO_SPDIF_OUT_48K 0x02 /* Out sample rate = 48K */ +#define UAUDIO_SPDIF_OUT_96K 0x04 /* Out sample rate = 96K */ +#define UAUDIO_SPDIF_IN_MIX 0x10 /* Input mix enable */ -#define UAUDIO_MAX_CHILD 2 +#define UAUDIO_MAX_CHILD 2 struct uaudio_softc_child { device_t pcm_device; @@ -364,8 +364,8 @@ uint32_t mix_info; uint32_t recsrc_info; - uint8_t pcm_registered:1; - uint8_t mixer_init:1; + uint8_t pcm_registered : 1; + uint8_t mixer_init : 1; }; struct uaudio_softc { @@ -384,21 +384,21 @@ struct usb_xfer *sc_mixer_xfer[1]; struct uaudio_mixer_node *sc_mixer_root; struct uaudio_mixer_node *sc_mixer_curr; - int (*sc_set_spdif_fn) (struct uaudio_softc *, int); + int (*sc_set_spdif_fn)(struct uaudio_softc *, int); uint16_t sc_audio_rev; uint16_t sc_mixer_count; - uint8_t sc_mixer_iface_index; - uint8_t sc_mixer_iface_no; - uint8_t sc_mixer_chan; - uint8_t sc_sndstat_valid:1; - uint8_t sc_uq_audio_swap_lr:1; - uint8_t sc_uq_au_inp_async:1; - uint8_t sc_uq_au_no_xu:1; - uint8_t sc_uq_bad_adc:1; - uint8_t sc_uq_au_vendor_class:1; - uint8_t sc_pcm_bitperfect:1; + uint8_t sc_mixer_iface_index; + uint8_t sc_mixer_iface_no; + uint8_t sc_mixer_chan; + uint8_t sc_sndstat_valid : 1; + uint8_t sc_uq_audio_swap_lr : 1; + uint8_t sc_uq_au_inp_async : 1; + uint8_t sc_uq_au_no_xu : 1; + uint8_t sc_uq_bad_adc : 1; + uint8_t sc_uq_au_vendor_class : 1; + uint8_t sc_pcm_bitperfect : 1; }; struct uaudio_terminal_node { @@ -423,48 +423,46 @@ const struct usb_audio20_processing_unit_0 *pu_v2; const struct usb_audio20_extension_unit_0 *eu_v2; const struct usb_audio20_effect_unit *ef_v2; - } u; + } u; struct uaudio_search_result usr; struct uaudio_terminal_node *root; }; struct uaudio_format { uint16_t wFormat; - uint8_t bPrecision; + uint8_t bPrecision; uint32_t freebsd_fmt; const char *description; }; static const struct uaudio_format uaudio10_formats[] = { - {UA_FMT_PCM8, 8, AFMT_U8, "8-bit U-LE PCM"}, - {UA_FMT_PCM8, 16, AFMT_U16_LE, "16-bit U-LE PCM"}, - {UA_FMT_PCM8, 24, AFMT_U24_LE, "24-bit U-LE PCM"}, - {UA_FMT_PCM8, 32, AFMT_U32_LE, "32-bit U-LE PCM"}, - - {UA_FMT_PCM, 8, AFMT_S8, "8-bit S-LE PCM"}, - {UA_FMT_PCM, 16, AFMT_S16_LE, "16-bit S-LE PCM"}, - {UA_FMT_PCM, 24, AFMT_S24_LE, "24-bit S-LE PCM"}, - {UA_FMT_PCM, 32, AFMT_S32_LE, "32-bit S-LE PCM"}, - - {UA_FMT_ALAW, 8, AFMT_A_LAW, "8-bit A-Law"}, - {UA_FMT_MULAW, 8, AFMT_MU_LAW, "8-bit mu-Law"}, - {0, 0, 0, NULL} + { UA_FMT_PCM8, 8, AFMT_U8, "8-bit U-LE PCM" }, + { UA_FMT_PCM8, 16, AFMT_U16_LE, "16-bit U-LE PCM" }, + { UA_FMT_PCM8, 24, AFMT_U24_LE, "24-bit U-LE PCM" }, + { UA_FMT_PCM8, 32, AFMT_U32_LE, "32-bit U-LE PCM" }, + + { UA_FMT_PCM, 8, AFMT_S8, "8-bit S-LE PCM" }, + { UA_FMT_PCM, 16, AFMT_S16_LE, "16-bit S-LE PCM" }, + { UA_FMT_PCM, 24, AFMT_S24_LE, "24-bit S-LE PCM" }, + { UA_FMT_PCM, 32, AFMT_S32_LE, "32-bit S-LE PCM" }, + + { UA_FMT_ALAW, 8, AFMT_A_LAW, "8-bit A-Law" }, + { UA_FMT_MULAW, 8, AFMT_MU_LAW, "8-bit mu-Law" }, { 0, 0, 0, NULL } }; static const struct uaudio_format uaudio20_formats[] = { - {UA20_FMT_PCM, 8, AFMT_S8, "8-bit S-LE PCM"}, - {UA20_FMT_PCM, 16, AFMT_S16_LE, "16-bit S-LE PCM"}, - {UA20_FMT_PCM, 24, AFMT_S24_LE, "24-bit S-LE PCM"}, - {UA20_FMT_PCM, 32, AFMT_S32_LE, "32-bit S-LE PCM"}, - - {UA20_FMT_PCM8, 8, AFMT_U8, "8-bit U-LE PCM"}, - {UA20_FMT_PCM8, 16, AFMT_U16_LE, "16-bit U-LE PCM"}, - {UA20_FMT_PCM8, 24, AFMT_U24_LE, "24-bit U-LE PCM"}, - {UA20_FMT_PCM8, 32, AFMT_U32_LE, "32-bit U-LE PCM"}, - - {UA20_FMT_ALAW, 8, AFMT_A_LAW, "8-bit A-Law"}, - {UA20_FMT_MULAW, 8, AFMT_MU_LAW, "8-bit mu-Law"}, - {0, 0, 0, NULL} + { UA20_FMT_PCM, 8, AFMT_S8, "8-bit S-LE PCM" }, + { UA20_FMT_PCM, 16, AFMT_S16_LE, "16-bit S-LE PCM" }, + { UA20_FMT_PCM, 24, AFMT_S24_LE, "24-bit S-LE PCM" }, + { UA20_FMT_PCM, 32, AFMT_S32_LE, "32-bit S-LE PCM" }, + + { UA20_FMT_PCM8, 8, AFMT_U8, "8-bit U-LE PCM" }, + { UA20_FMT_PCM8, 16, AFMT_U16_LE, "16-bit U-LE PCM" }, + { UA20_FMT_PCM8, 24, AFMT_U24_LE, "24-bit U-LE PCM" }, + { UA20_FMT_PCM8, 32, AFMT_U32_LE, "32-bit U-LE PCM" }, + + { UA20_FMT_ALAW, 8, AFMT_A_LAW, "8-bit A-Law" }, + { UA20_FMT_MULAW, 8, AFMT_MU_LAW, "8-bit mu-Law" }, { 0, 0, 0, NULL } }; /* prototypes */ @@ -488,86 +486,88 @@ static int uaudio_mixer_sysctl_handler(SYSCTL_HANDLER_ARGS); static void uaudio_mixer_ctl_free(struct uaudio_softc *); -static void uaudio_mixer_register_sysctl(struct uaudio_softc *, device_t, unsigned); +static void uaudio_mixer_register_sysctl(struct uaudio_softc *, device_t, + unsigned); static void uaudio_mixer_reload_all(struct uaudio_softc *); static void uaudio_mixer_controls_create_ftu(struct uaudio_softc *); /* ==== USB audio v1.0 ==== */ -static void uaudio_mixer_add_mixer(struct uaudio_softc *, - const struct uaudio_terminal_node *, int); -static void uaudio_mixer_add_selector(struct uaudio_softc *, - const struct uaudio_terminal_node *, int); -static uint32_t uaudio_mixer_feature_get_bmaControls( - const struct usb_audio_feature_unit *, uint8_t); -static void uaudio_mixer_add_feature(struct uaudio_softc *, - const struct uaudio_terminal_node *, int); -static void uaudio_mixer_add_processing_updown(struct uaudio_softc *, - const struct uaudio_terminal_node *, int); -static void uaudio_mixer_add_processing(struct uaudio_softc *, - const struct uaudio_terminal_node *, int); -static void uaudio_mixer_add_extension(struct uaudio_softc *, - const struct uaudio_terminal_node *, int); -static struct usb_audio_cluster uaudio_mixer_get_cluster(uint8_t, - const struct uaudio_terminal_node *); -static uint16_t uaudio_mixer_determine_class(const struct uaudio_terminal_node *); -static void uaudio_mixer_find_inputs_sub(struct uaudio_terminal_node *, - const uint8_t *, uint8_t, struct uaudio_search_result *); +static void uaudio_mixer_add_mixer(struct uaudio_softc *, + const struct uaudio_terminal_node *, int); +static void uaudio_mixer_add_selector(struct uaudio_softc *, + const struct uaudio_terminal_node *, int); +static uint32_t +uaudio_mixer_feature_get_bmaControls(const struct usb_audio_feature_unit *, + uint8_t); +static void uaudio_mixer_add_feature(struct uaudio_softc *, + const struct uaudio_terminal_node *, int); +static void uaudio_mixer_add_processing_updown(struct uaudio_softc *, + const struct uaudio_terminal_node *, int); +static void uaudio_mixer_add_processing(struct uaudio_softc *, + const struct uaudio_terminal_node *, int); +static void uaudio_mixer_add_extension(struct uaudio_softc *, + const struct uaudio_terminal_node *, int); +static struct usb_audio_cluster uaudio_mixer_get_cluster(uint8_t, + const struct uaudio_terminal_node *); +static uint16_t uaudio_mixer_determine_class( + const struct uaudio_terminal_node *); +static void uaudio_mixer_find_inputs_sub(struct uaudio_terminal_node *, + const uint8_t *, uint8_t, struct uaudio_search_result *); static const void *uaudio_mixer_verify_desc(const void *, uint32_t); static usb_error_t uaudio_set_speed(struct usb_device *, uint8_t, uint32_t); -static int uaudio_mixer_get(struct usb_device *, uint16_t, uint8_t, - struct uaudio_mixer_node *); +static int uaudio_mixer_get(struct usb_device *, uint16_t, uint8_t, + struct uaudio_mixer_node *); /* ==== USB audio v2.0 ==== */ -static void uaudio20_mixer_add_mixer(struct uaudio_softc *, - const struct uaudio_terminal_node *, int); -static void uaudio20_mixer_add_selector(struct uaudio_softc *, - const struct uaudio_terminal_node *, int); -static void uaudio20_mixer_add_feature(struct uaudio_softc *, - const struct uaudio_terminal_node *, int); -static struct usb_audio20_cluster uaudio20_mixer_get_cluster(uint8_t, - const struct uaudio_terminal_node *); -static uint16_t uaudio20_mixer_determine_class(const struct uaudio_terminal_node *); -static void uaudio20_mixer_find_inputs_sub(struct uaudio_terminal_node *, - const uint8_t *, uint8_t, struct uaudio_search_result *); +static void uaudio20_mixer_add_mixer(struct uaudio_softc *, + const struct uaudio_terminal_node *, int); +static void uaudio20_mixer_add_selector(struct uaudio_softc *, + const struct uaudio_terminal_node *, int); +static void uaudio20_mixer_add_feature(struct uaudio_softc *, + const struct uaudio_terminal_node *, int); +static struct usb_audio20_cluster uaudio20_mixer_get_cluster(uint8_t, + const struct uaudio_terminal_node *); +static uint16_t uaudio20_mixer_determine_class( + const struct uaudio_terminal_node *); +static void uaudio20_mixer_find_inputs_sub(struct uaudio_terminal_node *, + const uint8_t *, uint8_t, struct uaudio_search_result *); static const void *uaudio20_mixer_verify_desc(const void *, uint32_t); -static usb_error_t uaudio20_set_speed(struct usb_device *, uint8_t, - uint8_t, uint32_t); +static usb_error_t uaudio20_set_speed(struct usb_device *, uint8_t, uint8_t, + uint32_t); /* USB audio v1.0 and v2.0 */ -static void uaudio_chan_fill_info_sub(struct uaudio_softc *, - struct usb_device *, uint32_t, uint8_t, uint8_t); -static void uaudio_chan_fill_info(struct uaudio_softc *, - struct usb_device *); -static void uaudio_mixer_add_ctl_sub(struct uaudio_softc *, - struct uaudio_mixer_node *); -static void uaudio_mixer_add_ctl(struct uaudio_softc *, - struct uaudio_mixer_node *); -static void uaudio_mixer_fill_info(struct uaudio_softc *, - struct usb_device *, void *); -static int uaudio_mixer_signext(uint8_t, int); -static void uaudio_mixer_init(struct uaudio_softc *, unsigned); -static uint8_t umidi_convert_to_usb(struct umidi_sub_chan *, uint8_t, uint8_t); -static struct umidi_sub_chan *umidi_sub_by_fifo(struct usb_fifo *); -static void umidi_start_read(struct usb_fifo *); -static void umidi_stop_read(struct usb_fifo *); -static void umidi_start_write(struct usb_fifo *); -static void umidi_stop_write(struct usb_fifo *); -static int umidi_open(struct usb_fifo *, int); -static int umidi_ioctl(struct usb_fifo *, u_long cmd, void *, int); -static void umidi_close(struct usb_fifo *, int); -static void umidi_init(device_t dev); -static int umidi_probe(device_t dev); -static int umidi_detach(device_t dev); -static int uaudio_hid_probe(struct uaudio_softc *sc, - struct usb_attach_arg *uaa); -static void uaudio_hid_detach(struct uaudio_softc *sc); +static void uaudio_chan_fill_info_sub(struct uaudio_softc *, + struct usb_device *, uint32_t, uint8_t, uint8_t); +static void uaudio_chan_fill_info(struct uaudio_softc *, struct usb_device *); +static void uaudio_mixer_add_ctl_sub(struct uaudio_softc *, + struct uaudio_mixer_node *); +static void uaudio_mixer_add_ctl(struct uaudio_softc *, + struct uaudio_mixer_node *); +static void uaudio_mixer_fill_info(struct uaudio_softc *, struct usb_device *, + void *); +static int uaudio_mixer_signext(uint8_t, int); +static void uaudio_mixer_init(struct uaudio_softc *, unsigned); +static uint8_t umidi_convert_to_usb(struct umidi_sub_chan *, uint8_t, uint8_t); +static struct umidi_sub_chan *umidi_sub_by_fifo(struct usb_fifo *); +static void umidi_start_read(struct usb_fifo *); +static void umidi_stop_read(struct usb_fifo *); +static void umidi_start_write(struct usb_fifo *); +static void umidi_stop_write(struct usb_fifo *); +static int umidi_open(struct usb_fifo *, int); +static int umidi_ioctl(struct usb_fifo *, u_long cmd, void *, int); +static void umidi_close(struct usb_fifo *, int); +static void umidi_init(device_t dev); +static int umidi_probe(device_t dev); +static int umidi_detach(device_t dev); +static int uaudio_hid_probe(struct uaudio_softc *sc, + struct usb_attach_arg *uaa); +static void uaudio_hid_detach(struct uaudio_softc *sc); #ifdef USB_DEBUG -static void uaudio_chan_dump_ep_desc( - const usb_endpoint_descriptor_audio_t *); +static void uaudio_chan_dump_ep_desc(const usb_endpoint_descriptor_audio_t *); #endif static const struct usb_config @@ -648,24 +648,23 @@ }, }; -static const -uint8_t umidi_cmd_to_len[16] = { - [0x0] = 0, /* reserved */ - [0x1] = 0, /* reserved */ - [0x2] = 2, /* bytes */ - [0x3] = 3, /* bytes */ - [0x4] = 3, /* bytes */ - [0x5] = 1, /* bytes */ - [0x6] = 2, /* bytes */ - [0x7] = 3, /* bytes */ - [0x8] = 3, /* bytes */ - [0x9] = 3, /* bytes */ - [0xA] = 3, /* bytes */ - [0xB] = 3, /* bytes */ - [0xC] = 2, /* bytes */ - [0xD] = 2, /* bytes */ - [0xE] = 3, /* bytes */ - [0xF] = 1, /* bytes */ +static const uint8_t umidi_cmd_to_len[16] = { + [0x0] = 0, /* reserved */ + [0x1] = 0, /* reserved */ + [0x2] = 2, /* bytes */ + [0x3] = 3, /* bytes */ + [0x4] = 3, /* bytes */ + [0x5] = 1, /* bytes */ + [0x6] = 2, /* bytes */ + [0x7] = 3, /* bytes */ + [0x8] = 3, /* bytes */ + [0x9] = 3, /* bytes */ + [0xA] = 3, /* bytes */ + [0xB] = 3, /* bytes */ + [0xC] = 2, /* bytes */ + [0xD] = 2, /* bytes */ + [0xE] = 3, /* bytes */ + [0xF] = 1, /* bytes */ }; static const struct usb_config @@ -701,16 +700,15 @@ }, }; -static device_method_t uaudio_methods[] = { - DEVMETHOD(device_probe, uaudio_probe), +static device_method_t uaudio_methods[] = { DEVMETHOD(device_probe, + uaudio_probe), DEVMETHOD(device_attach, uaudio_attach), DEVMETHOD(device_detach, uaudio_detach), DEVMETHOD(device_suspend, bus_generic_suspend), DEVMETHOD(device_resume, bus_generic_resume), DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD_END -}; + DEVMETHOD_END }; static driver_t uaudio_driver = { .name = "uaudio", @@ -829,11 +827,15 @@ static const STRUCT_USB_HOST_ID __used uaudio_devs[] = { /* Generic USB audio class match */ - {USB_IFACE_CLASS(UICLASS_AUDIO), - USB_IFACE_SUBCLASS(UISUBCLASS_AUDIOCONTROL),}, + { + USB_IFACE_CLASS(UICLASS_AUDIO), + USB_IFACE_SUBCLASS(UISUBCLASS_AUDIOCONTROL), + }, /* Generic USB MIDI class match */ - {USB_IFACE_CLASS(UICLASS_AUDIO), - USB_IFACE_SUBCLASS(UISUBCLASS_MIDISTREAM),}, + { + USB_IFACE_CLASS(UICLASS_AUDIO), + USB_IFACE_SUBCLASS(UISUBCLASS_MIDISTREAM), + }, }; static unsigned @@ -855,8 +857,7 @@ unsigned i; for (i = 0; i != UAUDIO_MAX_CHILD; i++) { - if ((sc->sc_play_chan + i) == ch || - (sc->sc_rec_chan + i) == ch) + if ((sc->sc_play_chan + i) == ch || (sc->sc_rec_chan + i) == ch) return (i); } panic("uaudio_get_child_index_by_chan: Invalid chan: %p\n", ch); @@ -874,7 +875,7 @@ /* lookup non-standard device(s) */ if (usbd_lookup_id_by_uaa(uaudio_vendor_midi, - sizeof(uaudio_vendor_midi), uaa) == 0) { + sizeof(uaudio_vendor_midi), uaa) == 0) { return (BUS_PROBE_SPECIFIC); } @@ -911,10 +912,8 @@ static int uaudio_set_spdif_cm6206(struct uaudio_softc *sc, int flags) { - uint8_t cmd[2][4] = { - {0x20, 0x20, 0x00, 0}, - {0x20, 0x30, 0x02, 1} - }; + uint8_t cmd[2][4] = { { 0x20, 0x20, 0x00, 0 }, + { 0x20, 0x30, 0x02, 1 } }; int i; if (flags & UAUDIO_SPDIF_OUT) @@ -923,15 +922,15 @@ cmd[1][1] = 0x02; if (flags & UAUDIO_SPDIF_OUT_96K) - cmd[0][1] = 0x60; /* 96K: 3'b110 */ + cmd[0][1] = 0x60; /* 96K: 3'b110 */ if (flags & UAUDIO_SPDIF_IN_MIX) - cmd[1][1] = 0x03; /* SPDIFMIX */ + cmd[1][1] = 0x03; /* SPDIFMIX */ for (i = 0; i < 2; i++) { - if (usbd_req_set_report(sc->sc_udev, NULL, - cmd[i], sizeof(cmd[0]), - sc->sc_mixer_iface_index, UHID_OUTPUT_REPORT, 0) != 0) { + if (usbd_req_set_report(sc->sc_udev, NULL, cmd[i], + sizeof(cmd[0]), sc->sc_mixer_iface_index, + UHID_OUTPUT_REPORT, 0) != 0) { return (ENXIO); } } @@ -956,9 +955,10 @@ /* check if correct alternate setting is already selected */ if (iface->alt_index == 0) { - /* force power save mode by selecting default alternate setting */ - err = usbd_req_set_alt_interface_no(sc->sc_udev, NULL, iface_index, - iface->idesc->bAlternateSetting); + /* force power save mode by selecting default alternate setting + */ + err = usbd_req_set_alt_interface_no(sc->sc_udev, NULL, + iface_index, iface->idesc->bAlternateSetting); } else { err = usbd_set_alt_interface_index(sc->sc_udev, iface_index, 0); } @@ -1015,21 +1015,20 @@ /* fill channel info */ uaudio_chan_fill_info(sc, uaa->device); - DPRINTF("audio rev %d.%02x\n", - sc->sc_audio_rev >> 8, + DPRINTF("audio rev %d.%02x\n", sc->sc_audio_rev >> 8, sc->sc_audio_rev & 0xff); if (sc->sc_mixer_count == 0) { if (uaa->info.idVendor == USB_VENDOR_MAUDIO && (uaa->info.idProduct == USB_PRODUCT_MAUDIO_FASTTRACKULTRA || - uaa->info.idProduct == USB_PRODUCT_MAUDIO_FASTTRACKULTRA8R)) { + uaa->info.idProduct == + USB_PRODUCT_MAUDIO_FASTTRACKULTRA8R)) { DPRINTF("Generating mixer descriptors\n"); uaudio_mixer_controls_create_ftu(sc); } } - DPRINTF("%d mixer controls\n", - sc->sc_mixer_count); + DPRINTF("%d mixer controls\n", sc->sc_mixer_count); for (i = 0; i != UAUDIO_MAX_CHILD; i++) { uint8_t x; @@ -1050,13 +1049,13 @@ } for (x = 0; x != sc->sc_play_chan[i].num_alt; x++) { - device_printf(dev, "Play[%u]: %d Hz, %d ch, %s format, " - "2x%dms buffer.%s\n", i, - sc->sc_play_chan[i].usb_alt[x].sample_rate, + device_printf(dev, + "Play[%u]: %d Hz, %d ch, %s format, " + "2x%dms buffer.%s\n", + i, sc->sc_play_chan[i].usb_alt[x].sample_rate, sc->sc_play_chan[i].usb_alt[x].channels, sc->sc_play_chan[i].usb_alt[x].p_fmt->description, - uaudio_buffer_ms, - (x == 0) ? " (selected)" : ""); + uaudio_buffer_ms, (x == 0) ? " (selected)" : ""); } } if (i == 0) @@ -1081,13 +1080,13 @@ } for (x = 0; x != sc->sc_rec_chan[i].num_alt; x++) { - device_printf(dev, "Record[%u]: %d Hz, %d ch, %s format, " - "2x%dms buffer.%s\n", i, - sc->sc_rec_chan[i].usb_alt[x].sample_rate, + device_printf(dev, + "Record[%u]: %d Hz, %d ch, %s format, " + "2x%dms buffer.%s\n", + i, sc->sc_rec_chan[i].usb_alt[x].sample_rate, sc->sc_rec_chan[i].usb_alt[x].channels, sc->sc_rec_chan[i].usb_alt[x].p_fmt->description, - uaudio_buffer_ms, - (x == 0) ? " (selected)" : ""); + uaudio_buffer_ms, (x == 0) ? " (selected)" : ""); } } if (i == 0) @@ -1095,9 +1094,9 @@ if (sc->sc_midi_chan.valid == 0) { if (usbd_lookup_id_by_uaa(uaudio_vendor_midi, - sizeof(uaudio_vendor_midi), uaa) == 0) { - sc->sc_midi_chan.iface_index = - (uint8_t)uaa->driver_info; + sizeof(uaudio_vendor_midi), uaa) == 0) { + sc->sc_midi_chan.iface_index = (uint8_t) + uaa->driver_info; sc->sc_midi_chan.iface_alt_index = 0; sc->sc_midi_chan.valid = 1; } @@ -1127,8 +1126,7 @@ sc->sc_rec_chan[i].num_alt <= 0 && sc->sc_child[i].mix_info == 0) continue; - sc->sc_child[i].pcm_device = - device_add_child(dev, "pcm", -1); + sc->sc_child[i].pcm_device = device_add_child(dev, "pcm", -1); if (sc->sc_child[i].pcm_device == NULL) { DPRINTF("out of memory\n"); @@ -1155,11 +1153,11 @@ uaudio_mixer_reload_all(sc); /* enable S/PDIF output, if any */ - if (sc->sc_set_spdif_fn(sc, - UAUDIO_SPDIF_OUT | UAUDIO_SPDIF_OUT_48K) != 0) { + if (sc->sc_set_spdif_fn(sc, UAUDIO_SPDIF_OUT | UAUDIO_SPDIF_OUT_48K) != + 0) { device_printf(dev, "Failed to enable S/PDIF at 48K\n"); } - return (0); /* success */ + return (0); /* success */ detach: uaudio_detach(dev); @@ -1173,7 +1171,8 @@ } int -uaudio_attach_sub(device_t dev, kobj_class_t mixer_class, kobj_class_t chan_class) +uaudio_attach_sub(device_t dev, kobj_class_t mixer_class, + kobj_class_t chan_class) { struct uaudio_softc *sc = device_get_softc(device_get_parent(dev)); unsigned i = uaudio_get_child_index_by_dev(sc, dev); @@ -1205,16 +1204,14 @@ mixer_hwvol_init(dev); - device_set_descf(dev, "%s %s", - usb_get_manufacturer(sc->sc_udev), + device_set_descf(dev, "%s %s", usb_get_manufacturer(sc->sc_udev), usb_get_product(sc->sc_udev)); snprintf(status, sizeof(status), "on %s", device_get_nameunit(device_get_parent(dev))); - if (pcm_register(dev, sc, - (sc->sc_play_chan[i].num_alt > 0) ? 1 : 0, - (sc->sc_rec_chan[i].num_alt > 0) ? 1 : 0)) { + if (pcm_register(dev, sc, (sc->sc_play_chan[i].num_alt > 0) ? 1 : 0, + (sc->sc_rec_chan[i].num_alt > 0) ? 1 : 0)) { goto detach; } @@ -1223,14 +1220,12 @@ if (sc->sc_play_chan[i].num_alt > 0) { sc->sc_play_chan[i].priv_sc = sc; - pcm_addchan(dev, PCMDIR_PLAY, chan_class, - &sc->sc_play_chan[i]); + pcm_addchan(dev, PCMDIR_PLAY, chan_class, &sc->sc_play_chan[i]); } if (sc->sc_rec_chan[i].num_alt > 0) { sc->sc_rec_chan[i].priv_sc = sc; - pcm_addchan(dev, PCMDIR_REC, chan_class, - &sc->sc_rec_chan[i]); + pcm_addchan(dev, PCMDIR_REC, chan_class, &sc->sc_rec_chan[i]); } pcm_setstatus(dev, status); @@ -1238,10 +1233,10 @@ SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "feedback_rate", CTLFLAG_RD, &sc->sc_play_chan[i].feedback_rate, - 0, "Feedback sample rate in Hz"); + "feedback_rate", CTLFLAG_RD, &sc->sc_play_chan[i].feedback_rate, 0, + "Feedback sample rate in Hz"); - return (0); /* success */ + return (0); /* success */ detach: uaudio_detach_sub(dev); @@ -1280,13 +1275,15 @@ sc->sc_play_chan[i].operation = CHAN_OP_DRAIN; sc->sc_rec_chan[i].operation = CHAN_OP_DRAIN; } - usb_proc_explore_mwait(sc->sc_udev, - &sc->sc_config_msg[0], &sc->sc_config_msg[1]); + usb_proc_explore_mwait(sc->sc_udev, &sc->sc_config_msg[0], + &sc->sc_config_msg[1]); usb_proc_explore_unlock(sc->sc_udev); for (i = 0; i != UAUDIO_MAX_CHILD; i++) { - usbd_transfer_unsetup(sc->sc_play_chan[i].xfer, UAUDIO_NCHANBUFS + 1); - usbd_transfer_unsetup(sc->sc_rec_chan[i].xfer, UAUDIO_NCHANBUFS + 1); + usbd_transfer_unsetup(sc->sc_play_chan[i].xfer, + UAUDIO_NCHANBUFS + 1); + usbd_transfer_unsetup(sc->sc_rec_chan[i].xfer, + UAUDIO_NCHANBUFS + 1); } uaudio_hid_detach(sc); @@ -1304,7 +1301,7 @@ uaudio_mixer_ctl_free(sc); /* disable S/PDIF output, if any */ - (void) sc->sc_set_spdif_fn(sc, 0); + (void)sc->sc_set_spdif_fn(sc, 0); return (0); } @@ -1367,8 +1364,8 @@ } static void -uaudio_configure_msg_sub(struct uaudio_softc *sc, - struct uaudio_chan *chan, int dir) +uaudio_configure_msg_sub(struct uaudio_softc *sc, struct uaudio_chan *chan, + int dir) { struct uaudio_chan_alt *chan_alt; uint32_t frames; @@ -1410,9 +1407,11 @@ * power saving mode. Set this alternate setting as * part of entering stop. */ - err = usbd_set_alt_interface_index(sc->sc_udev, chan->iface_index, 0); + err = usbd_set_alt_interface_index(sc->sc_udev, + chan->iface_index, 0); if (err) { - DPRINTF("setting of default alternate index failed: %s!\n", + DPRINTF( + "setting of default alternate index failed: %s!\n", usbd_errstr(err)); } return; @@ -1432,8 +1431,8 @@ chan_alt = chan->usb_alt + next_alt; - err = usbd_set_alt_interface_index(sc->sc_udev, - chan_alt->iface_index, chan_alt->iface_alt_index); + err = usbd_set_alt_interface_index(sc->sc_udev, chan_alt->iface_index, + chan_alt->iface_alt_index); if (err) { DPRINTF("setting of alternate index failed: %s!\n", usbd_errstr(err)); @@ -1453,39 +1452,41 @@ for (x = 0; x != 256; x++) { if (dir == PCMDIR_PLAY) { if (!(sc->sc_mixer_clocks.bit_output[x / 8] & - (1 << (x % 8)))) { + (1 << (x % 8)))) { continue; } } else { if (!(sc->sc_mixer_clocks.bit_input[x / 8] & - (1 << (x % 8)))) { + (1 << (x % 8)))) { continue; } } if (uaudio20_set_speed(sc->sc_udev, - sc->sc_mixer_iface_no, x, chan_alt->sample_rate)) { + sc->sc_mixer_iface_no, x, + chan_alt->sample_rate)) { /* * If the endpoint is adaptive setting * the speed may fail. */ DPRINTF("setting of sample rate failed! " - "(continuing anyway)\n"); + "(continuing anyway)\n"); } } } else if (chan_alt->p_sed.v1->bmAttributes & UA_SED_FREQ_CONTROL) { if (uaudio_set_speed(sc->sc_udev, - chan_alt->p_ed1->bEndpointAddress, chan_alt->sample_rate)) { + chan_alt->p_ed1->bEndpointAddress, + chan_alt->sample_rate)) { /* * If the endpoint is adaptive setting the * speed may fail. */ DPRINTF("setting of sample rate failed! " - "(continuing anyway)\n"); + "(continuing anyway)\n"); } } if (usbd_transfer_setup(sc->sc_udev, &chan_alt->iface_index, chan->xfer, - chan_alt->usb_cfg, UAUDIO_NCHANBUFS + 1, chan, chan->pcm_mtx)) { + chan_alt->usb_cfg, UAUDIO_NCHANBUFS + 1, chan, chan->pcm_mtx)) { DPRINTF("could not allocate USB transfers!\n"); goto error; } @@ -1507,8 +1508,8 @@ frames >>= fps_shift; /* bytes per frame should not be zero */ - chan->bytes_per_frame[0] = - ((chan_alt->sample_rate / fps) * chan_alt->sample_size); + chan->bytes_per_frame[0] = ((chan_alt->sample_rate / fps) * + chan_alt->sample_size); chan->bytes_per_frame[1] = howmany(chan_alt->sample_rate, fps) * chan_alt->sample_size; @@ -1576,12 +1577,11 @@ { if (ed) { DPRINTF("endpoint=%p bLength=%d bDescriptorType=%d \n" - "bEndpointAddress=%d bmAttributes=0x%x \n" - "wMaxPacketSize=%d bInterval=%d \n" - "bRefresh=%d bSynchAddress=%d\n", - ed, ed->bLength, ed->bDescriptorType, - ed->bEndpointAddress, ed->bmAttributes, - UGETW(ed->wMaxPacketSize), ed->bInterval, + "bEndpointAddress=%d bmAttributes=0x%x \n" + "wMaxPacketSize=%d bInterval=%d \n" + "bRefresh=%d bSynchAddress=%d\n", + ed, ed->bLength, ed->bDescriptorType, ed->bEndpointAddress, + ed->bmAttributes, UGETW(ed->wMaxPacketSize), ed->bInterval, UEP_HAS_REFRESH(ed) ? ed->bRefresh : 0, UEP_HAS_SYNCADDR(ed) ? ed->bSynchAddress : 0); } @@ -1598,8 +1598,8 @@ * packet. */ static void -uaudio_record_fix_fs(usb_endpoint_descriptor_audio_t *ep, - uint32_t xps, uint32_t add) +uaudio_record_fix_fs(usb_endpoint_descriptor_audio_t *ep, uint32_t xps, + uint32_t add) { uint32_t mps; @@ -1622,26 +1622,25 @@ /* simply update the wMaxPacketSize field */ USETW(ep->wMaxPacketSize, xps); DPRINTF("Workaround: Updated wMaxPacketSize " - "from %d to %d bytes.\n", + "from %d to %d bytes.\n", (int)mps, (int)xps); } } } static usb_error_t -uaudio20_check_rate(struct usb_device *udev, uint8_t iface_no, - uint8_t clockid, uint32_t rate) +uaudio20_check_rate(struct usb_device *udev, uint8_t iface_no, uint8_t clockid, + uint32_t rate) { struct usb_device_request req; usb_error_t error; -#define UAUDIO20_MAX_RATES 32 /* we support at maximum 32 rates */ +#define UAUDIO20_MAX_RATES 32 /* we support at maximum 32 rates */ uint8_t data[2 + UAUDIO20_MAX_RATES * 12]; uint16_t actlen; uint16_t rates; uint16_t x; - DPRINTFN(6, "ifaceno=%d clockid=%d rate=%u\n", - iface_no, clockid, rate); + DPRINTFN(6, "ifaceno=%d clockid=%d rate=%u\n", iface_no, clockid, rate); req.bmRequestType = UT_READ_CLASS_INTERFACE; req.bRequest = UA20_CS_RANGE; @@ -1653,8 +1652,8 @@ */ USETW(req.wLength, (2 + 1 * 12)); - error = usbd_do_request_flags(udev, NULL, &req, data, - USB_SHORT_XFER_OK, &actlen, USB_DEFAULT_TIMEOUT); + error = usbd_do_request_flags(udev, NULL, &req, data, USB_SHORT_XFER_OK, + &actlen, USB_DEFAULT_TIMEOUT); if (error != 0 || actlen < 2) { /* @@ -1668,7 +1667,8 @@ rates = UGETW(data); if (rates > UAUDIO20_MAX_RATES) { - DPRINTF("Too many rates truncating to %d\n", UAUDIO20_MAX_RATES); + DPRINTF("Too many rates truncating to %d\n", + UAUDIO20_MAX_RATES); rates = UAUDIO20_MAX_RATES; error = USB_ERR_INVAL; } else if (rates > 1) { @@ -1685,7 +1685,7 @@ USETW(req.wLength, actlen); - error = usbd_do_request_flags(udev, NULL, &req, data, + error = usbd_do_request_flags(udev, NULL, &req, data, USB_SHORT_XFER_OK, &actlen, USB_DEFAULT_TIMEOUT); if (error != 0 || actlen < 2) @@ -1719,8 +1719,7 @@ max = temp; } - if (rate >= min && rate <= max && - (((rate - min) % res) == 0)) { + if (rate >= min && rate <= max && (((rate - min) % res) == 0)) { return (0); } } @@ -1789,22 +1788,21 @@ if ((!(sc->sc_hid.flags & UAUDIO_HID_VALID)) && (id->bInterfaceClass == UICLASS_HID) && (id->bInterfaceSubClass == 0) && - (id->bInterfaceProtocol == 0) && - (alt_index == 0) && + (id->bInterfaceProtocol == 0) && (alt_index == 0) && usbd_get_iface(udev, curidx) != NULL) { - DPRINTF("Found HID interface at %d\n", - curidx); + DPRINTF("Found HID interface at %d\n", curidx); sc->sc_hid.flags |= UAUDIO_HID_VALID; sc->sc_hid.iface_index = curidx; } - uma_if_class = - ((id->bInterfaceClass == UICLASS_AUDIO) || + uma_if_class = ((id->bInterfaceClass == + UICLASS_AUDIO) || ((id->bInterfaceClass == UICLASS_VENDOR) && - (sc->sc_uq_au_vendor_class != 0))); + (sc->sc_uq_au_vendor_class != 0))); if ((uma_if_class != 0) && - (id->bInterfaceSubClass == UISUBCLASS_AUDIOSTREAM)) { + (id->bInterfaceSubClass == + UISUBCLASS_AUDIOSTREAM)) { audio_if = 1; } else { audio_if = 0; @@ -1820,7 +1818,8 @@ if ((sc->sc_midi_chan.valid == 0) && (usbd_get_iface(udev, curidx) != NULL)) { sc->sc_midi_chan.iface_index = curidx; - sc->sc_midi_chan.iface_alt_index = alt_index; + sc->sc_midi_chan.iface_alt_index = + alt_index; sc->sc_midi_chan.valid = 1; } } else { @@ -1837,9 +1836,10 @@ * interfaces on this USB device so that we * don't attach USB audio twice: */ - if (alt_index == 0 && curidx != sc->sc_mixer_iface_index && - (id->bInterfaceClass == UICLASS_AUDIO || audio_if != 0 || - midi_if != 0)) { + if (alt_index == 0 && + curidx != sc->sc_mixer_iface_index && + (id->bInterfaceClass == UICLASS_AUDIO || + audio_if != 0 || midi_if != 0)) { usbd_set_parent_iface(sc->sc_udev, curidx, sc->sc_mixer_iface_index); } @@ -1848,8 +1848,10 @@ if (audio_if == 0) { if (midi_if == 0) { if ((acdp == NULL) && - (desc->bDescriptorType == UDESC_CS_INTERFACE) && - (desc->bDescriptorSubtype == UDESCSUB_AC_HEADER) && + (desc->bDescriptorType == + UDESC_CS_INTERFACE) && + (desc->bDescriptorSubtype == + UDESCSUB_AC_HEADER) && (desc->bLength >= sizeof(*acdp))) { acdp = (void *)desc; audio_rev = UGETW(acdp->bcdADC); @@ -1857,12 +1859,16 @@ } else { msid = (void *)desc; - /* get the maximum number of embedded jacks in use, if any */ + /* get the maximum number of embedded jacks in + * use, if any */ if (msid->bLength >= sizeof(*msid) && - msid->bDescriptorType == UDESC_CS_ENDPOINT && + msid->bDescriptorType == + UDESC_CS_ENDPOINT && msid->bDescriptorSubtype == MS_GENERAL && - msid->bNumEmbMIDIJack > sc->sc_midi_chan.max_emb_jack) { - sc->sc_midi_chan.max_emb_jack = msid->bNumEmbMIDIJack; + msid->bNumEmbMIDIJack > + sc->sc_midi_chan.max_emb_jack) { + sc->sc_midi_chan.max_emb_jack = + msid->bNumEmbMIDIJack; } } /* @@ -1901,16 +1907,23 @@ if (desc->bLength >= sizeof(*asf1d.v1)) { asf1d.v1 = (void *)desc; - if (asf1d.v1->bFormatType != FORMAT_TYPE_I) { - DPRINTFN(11, "ignored bFormatType = %d\n", + if (asf1d.v1->bFormatType != + FORMAT_TYPE_I) { + DPRINTFN(11, + "ignored bFormatType = %d\n", asf1d.v1->bFormatType); asf1d.v1 = NULL; continue; } - if (desc->bLength < (sizeof(*asf1d.v1) + - ((asf1d.v1->bSamFreqType == 0) ? 6 : - (asf1d.v1->bSamFreqType * 3)))) { - DPRINTFN(11, "invalid descriptor, " + if (desc->bLength < + (sizeof(*asf1d.v1) + + ((asf1d.v1->bSamFreqType == 0) ? + 6 : + (asf1d.v1 + ->bSamFreqType * + 3)))) { + DPRINTFN(11, + "invalid descriptor, " "too short\n"); asf1d.v1 = NULL; continue; @@ -1919,10 +1932,10 @@ } } if ((desc->bDescriptorType == UDESC_ENDPOINT) && - (desc->bLength >= UEP_MINSIZE) && - (ed1 == NULL)) { + (desc->bLength >= UEP_MINSIZE) && (ed1 == NULL)) { ed1 = (void *)desc; - if (UE_GET_XFERTYPE(ed1->bmAttributes) != UE_ISOCHRONOUS) { + if (UE_GET_XFERTYPE(ed1->bmAttributes) != + UE_ISOCHRONOUS) { ed1 = NULL; continue; } @@ -1941,8 +1954,8 @@ sed.v1 = (void *)desc; } } - if (asid.v1 == NULL || asf1d.v1 == NULL || - ed1 == NULL || sed.v1 == NULL) { + if (asid.v1 == NULL || asf1d.v1 == NULL || ed1 == NULL || + sed.v1 == NULL) { /* need more descriptors */ continue; } @@ -1966,8 +1979,8 @@ goto next_ep; } - for (p_fmt = uaudio20_formats; - p_fmt->wFormat != 0; p_fmt++) { + for (p_fmt = uaudio20_formats; p_fmt->wFormat != 0; + p_fmt++) { if ((p_fmt->wFormat & dwFormat) && (p_fmt->bPrecision == bBitResolution)) break; @@ -1980,13 +1993,15 @@ for (x = 0; x != 256; x++) { if (ep_dir == UE_DIR_OUT) { - if (!(sc->sc_mixer_clocks.bit_output[x / 8] & - (1 << (x % 8)))) { + if (!(sc->sc_mixer_clocks + .bit_output[x / 8] & + (1 << (x % 8)))) { continue; } } else { - if (!(sc->sc_mixer_clocks.bit_input[x / 8] & - (1 << (x % 8)))) { + if (!(sc->sc_mixer_clocks + .bit_input[x / 8] & + (1 << (x % 8)))) { continue; } } @@ -1994,9 +2009,10 @@ DPRINTF("Checking clock ID=%d\n", x); if (uaudio20_check_rate(udev, - sc->sc_mixer_iface_no, x, rate)) { + sc->sc_mixer_iface_no, x, rate)) { DPRINTF("Unsupported sampling " - "rate, id=%d\n", x); + "rate, id=%d\n", + x); goto next_ep; } } @@ -2009,8 +2025,7 @@ if (asf1d.v1->bSamFreqType == 0) { DPRINTFN(16, "Sample rate: %d-%dHz\n", - UA_SAMP_LO(asf1d.v1), - UA_SAMP_HI(asf1d.v1)); + UA_SAMP_LO(asf1d.v1), UA_SAMP_HI(asf1d.v1)); if ((rate >= UA_SAMP_LO(asf1d.v1)) && (rate <= UA_SAMP_HI(asf1d.v1))) @@ -2026,9 +2041,9 @@ } goto next_ep; - found_rate: - for (p_fmt = uaudio10_formats; - p_fmt->wFormat != 0; p_fmt++) { + found_rate: + for (p_fmt = uaudio10_formats; p_fmt->wFormat != 0; + p_fmt++) { if ((p_fmt->wFormat == wFormat) && (p_fmt->bPrecision == bBitResolution)) break; @@ -2045,10 +2060,13 @@ } } - chan = uaudio_get_chan(sc, (ep_dir == UE_DIR_OUT) ? &sc->sc_play_chan[0] : - &sc->sc_rec_chan[0], curidx); + chan = uaudio_get_chan(sc, + (ep_dir == UE_DIR_OUT) ? &sc->sc_play_chan[0] : + &sc->sc_rec_chan[0], + curidx); if (chan == NULL) { - DPRINTF("More than %d sub devices. (skipped)\n", UAUDIO_MAX_CHILD); + DPRINTF("More than %d sub devices. (skipped)\n", + UAUDIO_MAX_CHILD); goto next_ep; } @@ -2069,8 +2087,9 @@ uaudio_chan_dump_ep_desc(ed1); #endif DPRINTF("Sample rate = %dHz, channels = %d, " - "bits = %d, format = %s, ep 0x%02x, chan %p\n", rate, channels, - bit_resolution, p_fmt->description, ed1->bEndpointAddress, chan); + "bits = %d, format = %s, ep 0x%02x, chan %p\n", + rate, channels, bit_resolution, p_fmt->description, + ed1->bEndpointAddress, chan); chan_alt->sample_rate = rate; chan_alt->p_asf1d = asf1d; @@ -2086,7 +2105,8 @@ chan_alt->usb_cfg = uaudio_cfg_play; chan_alt->sample_size = (UAUDIO_MAX_CHAN(channels) * - p_fmt->bPrecision) / 8; + p_fmt->bPrecision) / + 8; chan_alt->channels = channels; if (ep_dir == UE_DIR_IN && @@ -2104,7 +2124,7 @@ format = SND_FORMAT(format, chan_alt->channels, 0); switch (chan_alt->channels) { - uint32_t temp_fmt; + uint32_t temp_fmt; case 1: case 2: /* mono and stereo */ @@ -2125,14 +2145,16 @@ goto next_ep; } if (chan->num_alt > 1) { - /* we only accumulate one format at different sample rates */ + /* we only accumulate one format at different sample + * rates */ if (chan->pcm_format[0] != format) { DPRINTF("Multiple formats is not supported\n"); chan->num_alt--; goto next_ep; } /* ignore if duplicate sample rate entry */ - if (rate == chan->usb_alt[chan->num_alt - 2].sample_rate) { + if (rate == + chan->usb_alt[chan->num_alt - 2].sample_rate) { DPRINTF("Duplicate sample rate detected\n"); chan->num_alt--; goto next_ep; @@ -2145,18 +2167,21 @@ if (chan_alt->channels > UAUDIO_MATRIX_MAX) sc->sc_pcm_bitperfect = 1; - if (rate < chan->pcm_cap.minspeed || chan->pcm_cap.minspeed == 0) + if (rate < chan->pcm_cap.minspeed || + chan->pcm_cap.minspeed == 0) chan->pcm_cap.minspeed = rate; - if (rate > chan->pcm_cap.maxspeed || chan->pcm_cap.maxspeed == 0) + if (rate > chan->pcm_cap.maxspeed || + chan->pcm_cap.maxspeed == 0) chan->pcm_cap.maxspeed = rate; if (sc->sc_sndstat_valid != 0) { - sbuf_printf(&sc->sc_sndstat, "\n\t" + sbuf_printf(&sc->sc_sndstat, + "\n\t" "mode %d.%d:(%s) %dch, %dbit, %s, %dHz", curidx, alt_index, (ep_dir == UE_DIR_IN) ? "input" : "output", - channels, p_fmt->bPrecision, - p_fmt->description, rate); + channels, p_fmt->bPrecision, p_fmt->description, + rate); } next_ep: @@ -2167,29 +2192,9 @@ /* This structure defines all the supported rates. */ -static const uint32_t uaudio_rate_list[CHAN_MAX_ALT] = { - 384000, - 352800, - 192000, - 176400, - 96000, - 88200, - 88000, - 80000, - 72000, - 64000, - 56000, - 48000, - 44100, - 40000, - 32000, - 24000, - 22050, - 16000, - 11025, - 8000, - 0 -}; +static const uint32_t uaudio_rate_list[CHAN_MAX_ALT] = { 384000, 352800, 192000, + 176400, 96000, 88200, 88000, 80000, 72000, 64000, 56000, 48000, 44100, + 40000, 32000, 24000, 22050, 16000, 11025, 8000, 0 }; static void uaudio_chan_fill_info(struct uaudio_softc *sc, struct usb_device *udev) @@ -2249,7 +2254,8 @@ uaudio_rate_list[z], x, y); } - /* after default value in first round, proceed with max bits */ + /* after default value in first round, proceed with max + * bits */ if (y == bits) y = UAUDIO_BITS_MAX + 8; /* skip default value subsequently */ @@ -2257,7 +2263,8 @@ y -= 8; } - /* after default value in first round, proceed with max channels */ + /* after default value in first round, proceed with max channels + */ if (x == channels) x = channels_max + 1; /* skip default value subsequently */ @@ -2328,8 +2335,8 @@ while (temp > (sample_rate + (sample_rate / 2))) temp /= 2; - DPRINTF("Comparing %d Hz :: %d Hz\n", - (int)temp, (int)sample_rate); + DPRINTF("Comparing %d Hz :: %d Hz\n", (int)temp, + (int)sample_rate); /* * Use feedback value as fallback when there is no @@ -2369,7 +2376,7 @@ usbd_transfer_submit(xfer); break; - default: /* Error */ + default: /* Error */ break; } } @@ -2414,7 +2421,7 @@ switch (USB_GET_STATE(xfer)) { case USB_ST_SETUP: -tr_setup: + tr_setup: if (ch_rec != NULL) { /* * NOTE: The play and record callbacks are @@ -2436,7 +2443,8 @@ case USB_ST_TRANSFERRED: if (actlen < sumlen) { DPRINTF("short transfer, " - "%d of %d bytes\n", actlen, sumlen); + "%d of %d bytes\n", + actlen, sumlen); } chn_intr(ch->pcm_ch); @@ -2458,8 +2466,10 @@ * This avoids a LOR situation. */ - /* translate receive jitter into transmit jitter */ - tx_jitter = ch->usb_alt[ch->cur_alt].sample_rate; + /* translate receive jitter into transmit jitter + */ + tx_jitter = + ch->usb_alt[ch->cur_alt].sample_rate; tx_jitter = (tx_jitter * ch_rec->jitter_curr) + ch->jitter_rem; @@ -2467,7 +2477,8 @@ ch_rec->jitter_curr = 0; ch_rec->jitter_rem = 0; - /* compute exact number of transmit jitter samples */ + /* compute exact number of transmit jitter + * samples */ rx_rate = ch_rec->usb_alt[rec_alt].sample_rate; ch->jitter_curr += tx_jitter / rx_rate; ch->jitter_rem = tx_jitter % rx_rate; @@ -2485,9 +2496,8 @@ if (ch->bytes_per_frame[1] > mfl) { DPRINTF("bytes per transfer, %d, " - "exceeds maximum, %d!\n", - ch->bytes_per_frame[1], - mfl); + "exceeds maximum, %d!\n", + ch->bytes_per_frame[1], mfl); break; } @@ -2552,7 +2562,7 @@ usbd_transfer_submit(xfer); break; - default: /* Error */ + default: /* Error */ if (error != USB_ERR_CANCELLED) goto tr_setup; break; @@ -2600,7 +2610,7 @@ /* compute number of expected bytes */ expected_bytes = (ch->intr_frames * ch->bytes_per_frame[0]) + ((ch->sample_curr / ch->frames_per_second) * - (ch->bytes_per_frame[1] - ch->bytes_per_frame[0])); + (ch->bytes_per_frame[1] - ch->bytes_per_frame[0])); /* keep remainder */ ch->sample_curr %= ch->frames_per_second; @@ -2655,14 +2665,14 @@ else if (ch->jitter_curr > nframes) ch->jitter_curr = nframes; - DPRINTFN(6, "transferred %d bytes, jitter %d samples\n", - actlen, ch->jitter_curr); + DPRINTFN(6, "transferred %d bytes, jitter %d samples\n", actlen, + ch->jitter_curr); if (ch->running != 0) chn_intr(ch->pcm_ch); case USB_ST_SETUP: -tr_setup: + tr_setup: nframes = ch->intr_frames; usbd_xfer_set_frames(xfer, nframes); @@ -2672,14 +2682,14 @@ usbd_transfer_submit(xfer); break; - default: /* Error */ + default: /* Error */ if (error != USB_ERR_CANCELLED) goto tr_setup; break; } } -void * +void * uaudio_chan_init(struct uaudio_chan *ch, struct snd_dbuf *b, struct pcm_channel *c, int dir) { @@ -2768,9 +2778,11 @@ for (x = 0, y = 1; y < ch->num_alt; y++) { /* prefer sample rate closer to and greater than requested */ if ((ch->usb_alt[x].sample_rate < speed && - ch->usb_alt[x].sample_rate < ch->usb_alt[y].sample_rate) || + ch->usb_alt[x].sample_rate < + ch->usb_alt[y].sample_rate) || (speed <= ch->usb_alt[y].sample_rate && - ch->usb_alt[y].sample_rate < ch->usb_alt[x].sample_rate)) + ch->usb_alt[y].sample_rate < + ch->usb_alt[x].sample_rate)) x = y; } @@ -2864,27 +2876,23 @@ * configuration, this part must be executed from the USB * explore process. */ - (void)usb_proc_explore_msignal(sc->sc_udev, - &sc->sc_config_msg[0], &sc->sc_config_msg[1]); + (void)usb_proc_explore_msignal(sc->sc_udev, &sc->sc_config_msg[0], + &sc->sc_config_msg[1]); } static int uaudio_chan_need_both(struct uaudio_chan *pchan, struct uaudio_chan *rchan) { - return (pchan->num_alt > 0 && - pchan->running != 0 && + return (pchan->num_alt > 0 && pchan->running != 0 && uaudio_chan_is_async(pchan, pchan->set_alt) != 0 && - rchan->num_alt > 0 && - rchan->running == 0); + rchan->num_alt > 0 && rchan->running == 0); } static int uaudio_chan_need_none(struct uaudio_chan *pchan, struct uaudio_chan *rchan) { - return (pchan->num_alt > 0 && - pchan->running == 0 && - rchan->num_alt > 0 && - rchan->running == 0); + return (pchan->num_alt > 0 && pchan->running == 0 && + rchan->num_alt > 0 && rchan->running == 0); } void @@ -2911,15 +2919,16 @@ ch->end = ch->buf + temp; ch->cur = ch->buf; - if (uaudio_chan_need_both( - &sc->sc_play_chan[i], - &sc->sc_rec_chan[i])) { + if (uaudio_chan_need_both(&sc->sc_play_chan[i], + &sc->sc_rec_chan[i])) { /* * Start both endpoints because of need for * jitter information: */ - uaudio_chan_reconfigure(&sc->sc_rec_chan[i], CHAN_OP_START); - uaudio_chan_reconfigure(&sc->sc_play_chan[i], CHAN_OP_START); + uaudio_chan_reconfigure(&sc->sc_rec_chan[i], + CHAN_OP_START); + uaudio_chan_reconfigure(&sc->sc_play_chan[i], + CHAN_OP_START); } else { uaudio_chan_reconfigure(ch, CHAN_OP_START); } @@ -2943,22 +2952,22 @@ /* clear running flag */ ch->running = 0; - if (uaudio_chan_need_both( - &sc->sc_play_chan[i], - &sc->sc_rec_chan[i])) { + if (uaudio_chan_need_both(&sc->sc_play_chan[i], + &sc->sc_rec_chan[i])) { /* * Leave the endpoints running because we need * information about jitter! */ - } else if (uaudio_chan_need_none( - &sc->sc_play_chan[i], - &sc->sc_rec_chan[i])) { + } else if (uaudio_chan_need_none(&sc->sc_play_chan[i], + &sc->sc_rec_chan[i])) { /* * Stop both endpoints in case the one was used for * jitter information: */ - uaudio_chan_reconfigure(&sc->sc_rec_chan[i], CHAN_OP_STOP); - uaudio_chan_reconfigure(&sc->sc_play_chan[i], CHAN_OP_STOP); + uaudio_chan_reconfigure(&sc->sc_rec_chan[i], + CHAN_OP_STOP); + uaudio_chan_reconfigure(&sc->sc_play_chan[i], + CHAN_OP_STOP); } else { uaudio_chan_reconfigure(ch, CHAN_OP_STOP); } @@ -3010,9 +3019,7 @@ /* update mixer value */ mtx_lock(sc->sc_child[0].mixer_lock); - if (pmc != NULL && - temp >= pmc->minval && - temp <= pmc->maxval) { + if (pmc != NULL && temp >= pmc->minval && temp <= pmc->maxval) { pmc->wData[chan] = temp; pmc->update[(chan / 8)] |= (1 << (chan % 8)); @@ -3057,17 +3064,18 @@ return; for (n = 0, pmc = sc->sc_mixer_root; pmc != NULL; - pmc = pmc->next, n++) { + pmc = pmc->next, n++) { for (chan = 0; chan < pmc->nchan; chan++) { if (pmc->nchan > 1) { snprintf(buf, sizeof(buf), "%s_%d_%d", pmc->name, n, chan); } else { - snprintf(buf, sizeof(buf), "%s_%d", - pmc->name, n); + snprintf(buf, sizeof(buf), "%s_%d", pmc->name, + n); } - control_tree = SYSCTL_ADD_NODE(device_get_sysctl_ctx(dev), + control_tree = SYSCTL_ADD_NODE(device_get_sysctl_ctx( + dev), SYSCTL_CHILDREN(mixer_tree), OID_AUTO, buf, CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Mixer control nodes"); @@ -3076,26 +3084,22 @@ continue; SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(control_tree), - OID_AUTO, "val", - CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, - sc, pmc->wValue[chan], - uaudio_mixer_sysctl_handler, "I", "Current value"); + SYSCTL_CHILDREN(control_tree), OID_AUTO, "val", + CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, sc, + pmc->wValue[chan], uaudio_mixer_sysctl_handler, "I", + "Current value"); SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(control_tree), - OID_AUTO, "min", CTLFLAG_RD, 0, pmc->minval, - "Minimum value"); + SYSCTL_CHILDREN(control_tree), OID_AUTO, "min", + CTLFLAG_RD, 0, pmc->minval, "Minimum value"); SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(control_tree), - OID_AUTO, "max", CTLFLAG_RD, 0, pmc->maxval, - "Maximum value"); + SYSCTL_CHILDREN(control_tree), OID_AUTO, "max", + CTLFLAG_RD, 0, pmc->maxval, "Maximum value"); SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(control_tree), - OID_AUTO, "desc", CTLFLAG_RD, pmc->desc, 0, - "Description"); + SYSCTL_CHILDREN(control_tree), OID_AUTO, "desc", + CTLFLAG_RD, pmc->desc, 0, "Description"); } } } @@ -3119,7 +3123,8 @@ MIX(sc).mul = 7; MIX(sc).nchan = 1; MIX(sc).update[0] = 1; - strlcpy(MIX(sc).desc, "Room1,2,3,Hall1,2,Plate,Delay,Echo", sizeof(MIX(sc).desc)); + strlcpy(MIX(sc).desc, "Room1,2,3,Hall1,2,Plate,Delay,Echo", + sizeof(MIX(sc).desc)); uaudio_mixer_add_ctl_sub(sc, &MIX(sc)); memset(&MIX(sc), 0, sizeof(MIX(sc))); @@ -3271,8 +3276,8 @@ static void uaudio_mixer_add_ctl_sub(struct uaudio_softc *sc, struct uaudio_mixer_node *mc) { - struct uaudio_mixer_node *p_mc_new = - malloc(sizeof(*p_mc_new), M_USBDEV, M_WAITOK); + struct uaudio_mixer_node *p_mc_new = malloc(sizeof(*p_mc_new), M_USBDEV, + M_WAITOK); int ch; if (p_mc_new != NULL) { @@ -3286,7 +3291,9 @@ switch (p_mc_new->val_default) { case 1: /* 50% */ - p_mc_new->wData[ch] = (p_mc_new->maxval + p_mc_new->minval) / 2; + p_mc_new->wData[ch] = (p_mc_new->maxval + + p_mc_new->minval) / + 2; break; case 2: /* 100% */ @@ -3317,10 +3324,10 @@ } else { /* determine min and max values */ - mc->minval = uaudio_mixer_get(sc->sc_udev, - sc->sc_audio_rev, GET_MIN, mc); - mc->maxval = uaudio_mixer_get(sc->sc_udev, - sc->sc_audio_rev, GET_MAX, mc); + mc->minval = uaudio_mixer_get(sc->sc_udev, sc->sc_audio_rev, + GET_MIN, mc); + mc->maxval = uaudio_mixer_get(sc->sc_udev, sc->sc_audio_rev, + GET_MAX, mc); /* check if max and min was swapped */ @@ -3336,8 +3343,8 @@ mc->mul = 1; /* compute value alignment */ - res = uaudio_mixer_get(sc->sc_udev, - sc->sc_audio_rev, GET_RES, mc); + res = uaudio_mixer_get(sc->sc_udev, sc->sc_audio_rev, GET_RES, + mc); DPRINTF("Resolution = %d\n", (int)res); } @@ -3352,9 +3359,8 @@ DPRINTF("[mix] wValue=%04x\n", mc->wValue[0]); } DPRINTF("[mix] wIndex=%04x type=%d ctl='%d' " - "min=%d max=%d\n", - mc->wIndex, mc->type, mc->ctl, - mc->minval, mc->maxval); + "min=%d max=%d\n", + mc->wIndex, mc->type, mc->ctl, mc->minval, mc->maxval); } #endif } @@ -3366,26 +3372,25 @@ const struct usb_audio_mixer_unit_0 *d0 = iot[id].u.mu_v1; const struct usb_audio_mixer_unit_1 *d1; - uint32_t bno; /* bit number */ - uint32_t p; /* bit number accumulator */ - uint32_t mo; /* matching outputs */ - uint32_t mc; /* matching channels */ - uint32_t ichs; /* input channels */ - uint32_t ochs; /* output channels */ + uint32_t bno; /* bit number */ + uint32_t p; /* bit number accumulator */ + uint32_t mo; /* matching outputs */ + uint32_t mc; /* matching channels */ + uint32_t ichs; /* input channels */ + uint32_t ochs; /* output channels */ uint32_t c; - uint32_t chs; /* channels */ + uint32_t chs; /* channels */ uint32_t i; uint32_t o; - DPRINTFN(3, "bUnitId=%d bNrInPins=%d\n", - d0->bUnitId, d0->bNrInPins); + DPRINTFN(3, "bUnitId=%d bNrInPins=%d\n", d0->bUnitId, d0->bNrInPins); /* compute the number of input channels */ ichs = 0; for (i = 0; i < d0->bNrInPins; i++) { - ichs += uaudio_mixer_get_cluster( - d0->baSourceId[i], iot).bNrChannels; + ichs += uaudio_mixer_get_cluster(d0->baSourceId[i], iot) + .bNrChannels; } d1 = (const void *)(d0->baSourceId + d0->bNrInPins); @@ -3405,8 +3410,8 @@ return; for (p = i = 0; i < d0->bNrInPins; i++) { - chs = uaudio_mixer_get_cluster( - d0->baSourceId[i], iot).bNrChannels; + chs = uaudio_mixer_get_cluster(d0->baSourceId[i], iot) + .bNrChannels; mc = 0; for (c = 0; c < chs; c++) { mo = 0; @@ -3426,7 +3431,8 @@ for (o = 0; o < ochs; o++) { bno = ((p + c) * ochs) + o; if (BIT_TEST(d1->bmControls, bno)) - MIX(sc).wValue[mc++] = MAKE_WORD(p + c + 1, o + 1); + MIX(sc).wValue[mc++] = + MAKE_WORD(p + c + 1, o + 1); } } MIX(sc).nchan = chs; @@ -3443,26 +3449,25 @@ const struct usb_audio20_mixer_unit_0 *d0 = iot[id].u.mu_v2; const struct usb_audio20_mixer_unit_1 *d1; - uint32_t bno; /* bit number */ - uint32_t p; /* bit number accumulator */ - uint32_t mo; /* matching outputs */ - uint32_t mc; /* matching channels */ - uint32_t ichs; /* input channels */ - uint32_t ochs; /* output channels */ + uint32_t bno; /* bit number */ + uint32_t p; /* bit number accumulator */ + uint32_t mo; /* matching outputs */ + uint32_t mc; /* matching channels */ + uint32_t ichs; /* input channels */ + uint32_t ochs; /* output channels */ uint32_t c; - uint32_t chs; /* channels */ + uint32_t chs; /* channels */ uint32_t i; uint32_t o; - DPRINTFN(3, "bUnitId=%d bNrInPins=%d\n", - d0->bUnitId, d0->bNrInPins); + DPRINTFN(3, "bUnitId=%d bNrInPins=%d\n", d0->bUnitId, d0->bNrInPins); /* compute the number of input channels */ ichs = 0; for (i = 0; i < d0->bNrInPins; i++) { - ichs += uaudio20_mixer_get_cluster( - d0->baSourceId[i], iot).bNrChannels; + ichs += uaudio20_mixer_get_cluster(d0->baSourceId[i], iot) + .bNrChannels; } d1 = (const void *)(d0->baSourceId + d0->bNrInPins); @@ -3482,8 +3487,8 @@ return; for (p = i = 0; i < d0->bNrInPins; i++) { - chs = uaudio20_mixer_get_cluster( - d0->baSourceId[i], iot).bNrChannels; + chs = uaudio20_mixer_get_cluster(d0->baSourceId[i], iot) + .bNrChannels; mc = 0; for (c = 0; c < chs; c++) { mo = 0; @@ -3503,7 +3508,8 @@ for (o = 0; o < ochs; o++) { bno = ((p + c) * ochs) + o; if (BIT_TEST(d1->bmControls, bno)) - MIX(sc).wValue[mc++] = MAKE_WORD(p + c + 1, o + 1); + MIX(sc).wValue[mc++] = + MAKE_WORD(p + c + 1, o + 1); } } MIX(sc).nchan = chs; @@ -3517,16 +3523,16 @@ uaudio_mixer_check_selectors(struct uaudio_softc *sc) { uint8_t reserve_feature[] = { - SOUND_MIXER_LINE, - SOUND_MIXER_LINE1, - SOUND_MIXER_LINE2, - SOUND_MIXER_LINE3, - SOUND_MIXER_DIGITAL1, - SOUND_MIXER_DIGITAL2, - SOUND_MIXER_DIGITAL3, + SOUND_MIXER_LINE, + SOUND_MIXER_LINE1, + SOUND_MIXER_LINE2, + SOUND_MIXER_LINE3, + SOUND_MIXER_DIGITAL1, + SOUND_MIXER_DIGITAL2, + SOUND_MIXER_DIGITAL3, }; - const uint16_t reserve_max = - sizeof(reserve_feature) / sizeof(reserve_feature[0]); + const uint16_t reserve_max = sizeof(reserve_feature) / + sizeof(reserve_feature[0]); uint16_t i; uint16_t j; uint16_t k; @@ -3558,7 +3564,8 @@ break; } if (k == reserve_max) { - DPRINTF("Selector type %d is not selectable!\n", j); + DPRINTF("Selector type %d is not selectable!\n", + j); MIX(sc).slctrtype[j] = SOUND_MIXER_NRDEVICES; } } @@ -3572,8 +3579,7 @@ const struct usb_audio_selector_unit *d = iot[id].u.su_v1; uint16_t i; - DPRINTFN(3, "bUnitId=%d bNrInPins=%d\n", - d->bUnitId, d->bNrInPins); + DPRINTFN(3, "bUnitId=%d bNrInPins=%d\n", d->bUnitId, d->bNrInPins); if (d->bNrInPins == 0) return; @@ -3591,8 +3597,8 @@ i = d->baSourceId[d->bNrInPins]; if (i == 0 || - usbd_req_get_string_any(sc->sc_udev, NULL, - MIX(sc).desc, sizeof(MIX(sc).desc), i) != 0) { + usbd_req_get_string_any(sc->sc_udev, NULL, MIX(sc).desc, + sizeof(MIX(sc).desc), i) != 0) { MIX(sc).desc[0] = 0; } @@ -3602,8 +3608,8 @@ MIX(sc).mul = MIX(sc).maxval - MIX(sc).minval; for (i = 0; i < MIX(sc).maxval; i++) { - MIX(sc).slctrtype[i] = - uaudio_mixer_determine_class(&iot[d->baSourceId[i]]); + MIX(sc).slctrtype[i] = uaudio_mixer_determine_class( + &iot[d->baSourceId[i]]); } for (; i < MAX_SELECTOR_INPUT_PIN; i++) MIX(sc).slctrtype[i] = SOUND_MIXER_NRDEVICES; @@ -3619,8 +3625,7 @@ const struct usb_audio20_selector_unit *d = iot[id].u.su_v2; uint16_t i; - DPRINTFN(3, "bUnitId=%d bNrInPins=%d\n", - d->bUnitId, d->bNrInPins); + DPRINTFN(3, "bUnitId=%d bNrInPins=%d\n", d->bUnitId, d->bNrInPins); if (d->bNrInPins == 0) return; @@ -3638,8 +3643,8 @@ i = d->baSourceId[d->bNrInPins]; if (i == 0 || - usbd_req_get_string_any(sc->sc_udev, NULL, - MIX(sc).desc, sizeof(MIX(sc).desc), i) != 0) { + usbd_req_get_string_any(sc->sc_udev, NULL, MIX(sc).desc, + sizeof(MIX(sc).desc), i) != 0) { MIX(sc).desc[0] = 0; } @@ -3649,8 +3654,8 @@ MIX(sc).mul = MIX(sc).maxval - MIX(sc).minval; for (i = 0; i < MIX(sc).maxval; i++) { - MIX(sc).slctrtype[i] = - uaudio20_mixer_determine_class(&iot[d->baSourceId[i]]); + MIX(sc).slctrtype[i] = uaudio20_mixer_determine_class( + &iot[d->baSourceId[i]]); } for (; i < MAX_SELECTOR_INPUT_PIN; i++) MIX(sc).slctrtype[i] = SOUND_MIXER_NRDEVICES; @@ -3673,7 +3678,8 @@ if (d->bControlSize > 2) { temp |= d->bmaControls[offset + 2] << 16; if (d->bControlSize > 3) { - temp |= d->bmaControls[offset + 3] << 24; + temp |= d->bmaControls[offset + 3] + << 24; } } } @@ -3710,8 +3716,8 @@ /* figure out what we can control */ for (chan = 1; chan < nchan; chan++) { - DPRINTFN(10, "chan=%d mask=%x\n", - chan, uaudio_mixer_feature_get_bmaControls(d, chan)); + DPRINTFN(10, "chan=%d mask=%x\n", chan, + uaudio_mixer_feature_get_bmaControls(d, chan)); cmask |= uaudio_mixer_feature_get_bmaControls(d, chan); } @@ -3720,8 +3726,8 @@ i = d->bmaControls[nchan * d->bControlSize]; if (i == 0 || - usbd_req_get_string_any(sc->sc_udev, NULL, - MIX(sc).desc, sizeof(MIX(sc).desc), i) != 0) { + usbd_req_get_string_any(sc->sc_udev, NULL, MIX(sc).desc, + sizeof(MIX(sc).desc), i) != 0) { MIX(sc).desc[0] = 0; } @@ -3731,8 +3737,7 @@ for (ctl = 1; ctl <= LOUDNESS_CONTROL; ctl++) { fumask = FU_MASK(ctl); - DPRINTFN(5, "ctl=%d fumask=0x%04x\n", - ctl, fumask); + DPRINTFN(5, "ctl=%d fumask=0x%04x\n", ctl, fumask); if (mmask & fumask) { MIX(sc).nchan = 1; @@ -3740,8 +3745,10 @@ } else if (cmask & fumask) { MIX(sc).nchan = nchan - 1; for (i = 1; i < nchan; i++) { - if (uaudio_mixer_feature_get_bmaControls(d, i) & fumask) - MIX(sc).wValue[i - 1] = MAKE_WORD(ctl, i); + if (uaudio_mixer_feature_get_bmaControls(d, i) & + fumask) + MIX(sc).wValue[i - 1] = MAKE_WORD(ctl, + i); else MIX(sc).wValue[i - 1] = -1; } @@ -3772,7 +3779,7 @@ case MID_CONTROL: MIX(sc).type = MIX_SIGNED_8; - MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ + MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ MIX(sc).name = "mid"; break; @@ -3783,29 +3790,29 @@ break; case GRAPHIC_EQUALIZER_CONTROL: - continue; /* XXX don't add anything */ + continue; /* XXX don't add anything */ case AGC_CONTROL: MIX(sc).type = MIX_ON_OFF; - MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ + MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ MIX(sc).name = "agc"; break; case DELAY_CONTROL: MIX(sc).type = MIX_UNSIGNED_16; - MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ + MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ MIX(sc).name = "delay"; break; case BASS_BOOST_CONTROL: MIX(sc).type = MIX_ON_OFF; - MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ + MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ MIX(sc).name = "boost"; break; case LOUDNESS_CONTROL: MIX(sc).type = MIX_ON_OFF; - MIX(sc).ctl = SOUND_MIXER_LOUD; /* Is this correct ? */ + MIX(sc).ctl = SOUND_MIXER_LOUD; /* Is this correct ? */ MIX(sc).name = "loudness"; break; @@ -3854,8 +3861,8 @@ i = d->bmaControls[nchan][0]; if (i == 0 || - usbd_req_get_string_any(sc->sc_udev, NULL, - MIX(sc).desc, sizeof(MIX(sc).desc), i) != 0) { + usbd_req_get_string_any(sc->sc_udev, NULL, MIX(sc).desc, + sizeof(MIX(sc).desc), i) != 0) { MIX(sc).desc[0] = 0; } @@ -3886,7 +3893,7 @@ break; case (3 << 6): MIX(sc).type = MIX_SIGNED_8; - MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ + MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ MIX(sc).name = "mid"; what = MID_CONTROL; break; @@ -3898,25 +3905,25 @@ break; case (3 << 12): MIX(sc).type = MIX_ON_OFF; - MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ + MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ MIX(sc).name = "agc"; what = AGC_CONTROL; break; case (3 << 14): MIX(sc).type = MIX_UNSIGNED_16; - MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ + MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ MIX(sc).name = "delay"; what = DELAY_CONTROL; break; case (3 << 16): MIX(sc).type = MIX_ON_OFF; - MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ + MIX(sc).ctl = SOUND_MIXER_NRDEVICES; /* XXXXX */ MIX(sc).name = "boost"; what = BASS_BOOST_CONTROL; break; case (3 << 18): MIX(sc).type = MIX_ON_OFF; - MIX(sc).ctl = SOUND_MIXER_LOUD; /* Is this correct ? */ + MIX(sc).ctl = SOUND_MIXER_LOUD; /* Is this correct ? */ MIX(sc).name = "loudness"; what = LOUDNESS_CONTROL; break; @@ -3943,7 +3950,8 @@ MIX(sc).nchan = nchan - 1; for (i = 1; i < nchan; i++) { if ((UGETDW(d->bmaControls[i]) & ctl) == ctl) - MIX(sc).wValue[i - 1] = MAKE_WORD(what, i); + MIX(sc).wValue[i - 1] = MAKE_WORD(what, + i); else MIX(sc).wValue[i - 1] = -1; } @@ -3970,12 +3978,11 @@ if (uaudio_mixer_verify_desc(d0, sizeof(*ud)) == NULL) { return; } - if (uaudio_mixer_verify_desc(d0, sizeof(*ud) + (2 * ud->bNrModes)) - == NULL) { + if (uaudio_mixer_verify_desc(d0, sizeof(*ud) + (2 * ud->bNrModes)) == + NULL) { return; } - DPRINTFN(3, "bUnitId=%d bNrModes=%d\n", - d0->bUnitId, ud->bNrModes); + DPRINTFN(3, "bUnitId=%d bNrModes=%d\n", d0->bUnitId, ud->bNrModes); if (!(d1->bmControls[0] & UA_PROC_MASK(UD_MODE_SELECT_CONTROL))) { DPRINTF("no mode select\n"); @@ -3986,7 +3993,7 @@ MIX(sc).wIndex = MAKE_WORD(d0->bUnitId, sc->sc_mixer_iface_no); MIX(sc).nchan = 1; MIX(sc).wValue[0] = MAKE_WORD(UD_MODE_SELECT_CONTROL, 0); - MIX(sc).type = MIX_ON_OFF; /* XXX */ + MIX(sc).type = MIX_ON_OFF; /* XXX */ for (i = 0; i < ud->bNrModes; i++) { DPRINTFN(3, "i=%d bm=0x%x\n", i, UGETW(ud->waModes[i])); @@ -4009,8 +4016,10 @@ ptype = UGETW(d0->wProcessType); - DPRINTFN(3, "wProcessType=%d bUnitId=%d " - "bNrInPins=%d\n", ptype, d0->bUnitId, d0->bNrInPins); + DPRINTFN(3, + "wProcessType=%d bUnitId=%d " + "bNrInPins=%d\n", + ptype, d0->bUnitId, d0->bNrInPins); if (d1->bControlSize == 0) { return; @@ -4033,8 +4042,8 @@ case CHORUS_PROCESS: case DYN_RANGE_COMP_PROCESS: default: - DPRINTF("unit %d, type=%d is not implemented\n", - d0->bUnitId, ptype); + DPRINTF("unit %d, type=%d is not implemented\n", d0->bUnitId, + ptype); break; } } @@ -4047,8 +4056,7 @@ const struct usb_audio_extension_unit_1 *d1 = (const void *)(d0->baSourceId + d0->bNrInPins); - DPRINTFN(3, "bUnitId=%d bNrInPins=%d\n", - d0->bUnitId, d0->bNrInPins); + DPRINTFN(3, "bUnitId=%d bNrInPins=%d\n", d0->bUnitId, d0->bNrInPins); if (sc->sc_uq_au_no_xu) { return; @@ -4084,7 +4092,7 @@ const struct usb_audio_feature_unit *fu; const struct usb_audio_processing_unit_0 *pu; const struct usb_audio_extension_unit_0 *eu; - } u; + } u; u.desc = arg; @@ -4192,9 +4200,8 @@ error: if (u.desc) { DPRINTF("invalid descriptor, type=%d, " - "sub_type=%d, len=%d of %d bytes\n", - u.desc->bDescriptorType, - u.desc->bDescriptorSubtype, + "sub_type=%d, len=%d of %d bytes\n", + u.desc->bDescriptorType, u.desc->bDescriptorSubtype, u.desc->bLength, len); } return (NULL); @@ -4222,7 +4229,7 @@ const struct usb_audio20_processing_unit_0 *pu; const struct usb_audio20_extension_unit_0 *eu; const struct usb_audio20_effect_unit *ef; - } u; + } u; u.desc = arg; @@ -4345,9 +4352,8 @@ error: if (u.desc) { DPRINTF("invalid descriptor, type=%d, " - "sub_type=%d, len=%d of %d bytes\n", - u.desc->bDescriptorType, - u.desc->bDescriptorSubtype, + "sub_type=%d, len=%d of %d bytes\n", + u.desc->bDescriptorType, u.desc->bDescriptorSubtype, u.desc->bLength, len); } return (NULL); @@ -4360,7 +4366,7 @@ const struct usb_descriptor *dp; uint8_t i; - for (i = 0; i < UAUDIO_RECURSE_LIMIT; i++) { /* avoid infinite loops */ + for (i = 0; i < UAUDIO_RECURSE_LIMIT; i++) { /* avoid infinite loops */ dp = iot[id].u.desc; if (dp == NULL) { goto error; @@ -4368,8 +4374,10 @@ switch (dp->bDescriptorSubtype) { case UDESCSUB_AC_INPUT: r.bNrChannels = iot[id].u.it_v1->bNrChannels; - r.wChannelConfig[0] = iot[id].u.it_v1->wChannelConfig[0]; - r.wChannelConfig[1] = iot[id].u.it_v1->wChannelConfig[1]; + r.wChannelConfig[0] = + iot[id].u.it_v1->wChannelConfig[0]; + r.wChannelConfig[1] = + iot[id].u.it_v1->wChannelConfig[1]; r.iChannelNames = iot[id].u.it_v1->iChannelNames; goto done; @@ -4378,9 +4386,9 @@ break; case UDESCSUB_AC_MIXER: - r = *(const struct usb_audio_cluster *) - &iot[id].u.mu_v1->baSourceId[ - iot[id].u.mu_v1->bNrInPins]; + r = *(const struct usb_audio_cluster *)&iot[id] + .u.mu_v1 + ->baSourceId[iot[id].u.mu_v1->bNrInPins]; goto done; case UDESCSUB_AC_SELECTOR: @@ -4395,15 +4403,15 @@ break; case UDESCSUB_AC_PROCESSING: - r = *((const struct usb_audio_cluster *) - &iot[id].u.pu_v1->baSourceId[ - iot[id].u.pu_v1->bNrInPins]); + r = *((const struct usb_audio_cluster *)&iot[id] + .u.pu_v1 + ->baSourceId[iot[id].u.pu_v1->bNrInPins]); goto done; case UDESCSUB_AC_EXTENSION: - r = *((const struct usb_audio_cluster *) - &iot[id].u.eu_v1->baSourceId[ - iot[id].u.eu_v1->bNrInPins]); + r = *((const struct usb_audio_cluster *)&iot[id] + .u.eu_v1 + ->baSourceId[iot[id].u.eu_v1->bNrInPins]); goto done; default: @@ -4424,7 +4432,7 @@ const struct usb_descriptor *dp; uint8_t i; - for (i = 0; i < UAUDIO_RECURSE_LIMIT; i++) { /* avoid infinite loops */ + for (i = 0; i < UAUDIO_RECURSE_LIMIT; i++) { /* avoid infinite loops */ dp = iot[id].u.desc; if (dp == NULL) goto error; @@ -4432,10 +4440,14 @@ switch (dp->bDescriptorSubtype) { case UDESCSUB_AC_INPUT: r.bNrChannels = iot[id].u.it_v2->bNrChannels; - r.bmChannelConfig[0] = iot[id].u.it_v2->bmChannelConfig[0]; - r.bmChannelConfig[1] = iot[id].u.it_v2->bmChannelConfig[1]; - r.bmChannelConfig[2] = iot[id].u.it_v2->bmChannelConfig[2]; - r.bmChannelConfig[3] = iot[id].u.it_v2->bmChannelConfig[3]; + r.bmChannelConfig[0] = + iot[id].u.it_v2->bmChannelConfig[0]; + r.bmChannelConfig[1] = + iot[id].u.it_v2->bmChannelConfig[1]; + r.bmChannelConfig[2] = + iot[id].u.it_v2->bmChannelConfig[2]; + r.bmChannelConfig[3] = + iot[id].u.it_v2->bmChannelConfig[3]; r.iChannelNames = iot[id].u.it_v2->iTerminal; goto done; @@ -4444,9 +4456,9 @@ break; case UDESCSUB_AC_MIXER: - r = *(const struct usb_audio20_cluster *) - &iot[id].u.mu_v2->baSourceId[ - iot[id].u.mu_v2->bNrInPins]; + r = *(const struct usb_audio20_cluster *)&iot[id] + .u.mu_v2 + ->baSourceId[iot[id].u.mu_v2->bNrInPins]; goto done; case UDESCSUB_AC_SELECTOR: @@ -4469,15 +4481,15 @@ break; case UDESCSUB_AC_PROCESSING_V2: - r = *((const struct usb_audio20_cluster *) - &iot[id].u.pu_v2->baSourceId[ - iot[id].u.pu_v2->bNrInPins]); + r = *((const struct usb_audio20_cluster *)&iot[id] + .u.pu_v2 + ->baSourceId[iot[id].u.pu_v2->bNrInPins]); goto done; case UDESCSUB_AC_EXTENSION_V2: - r = *((const struct usb_audio20_cluster *) - &iot[id].u.eu_v2->baSourceId[ - iot[id].u.eu_v2->bNrInPins]); + r = *((const struct usb_audio20_cluster *)&iot[id] + .u.eu_v2 + ->baSourceId[iot[id].u.eu_v2->bNrInPins]); goto done; default: @@ -4492,7 +4504,8 @@ } static bool -uaudio_mixer_foreach_input(const struct uaudio_terminal_node *iot, uint8_t *pindex) +uaudio_mixer_foreach_input(const struct uaudio_terminal_node *iot, + uint8_t *pindex) { uint8_t n; @@ -4511,7 +4524,8 @@ } static bool -uaudio_mixer_foreach_output(const struct uaudio_terminal_node *iot, uint8_t *pindex) +uaudio_mixer_foreach_output(const struct uaudio_terminal_node *iot, + uint8_t *pindex) { uint8_t n; @@ -4535,34 +4549,33 @@ }; static const struct uaudio_tt_to_feature uaudio_tt_to_feature[] = { - {UATI_MICROPHONE, SOUND_MIXER_MIC}, - {UATI_DESKMICROPHONE, SOUND_MIXER_MIC}, - {UATI_PERSONALMICROPHONE, SOUND_MIXER_MIC}, - {UATI_OMNIMICROPHONE, SOUND_MIXER_MIC}, - {UATI_MICROPHONEARRAY, SOUND_MIXER_MIC}, - {UATI_PROCMICROPHONEARR, SOUND_MIXER_MIC}, + { UATI_MICROPHONE, SOUND_MIXER_MIC }, + { UATI_DESKMICROPHONE, SOUND_MIXER_MIC }, + { UATI_PERSONALMICROPHONE, SOUND_MIXER_MIC }, + { UATI_OMNIMICROPHONE, SOUND_MIXER_MIC }, + { UATI_MICROPHONEARRAY, SOUND_MIXER_MIC }, + { UATI_PROCMICROPHONEARR, SOUND_MIXER_MIC }, - {UATE_ANALOGCONN, SOUND_MIXER_LINE}, - {UATE_LINECONN, SOUND_MIXER_LINE}, - {UATE_LEGACYCONN, SOUND_MIXER_LINE}, + { UATE_ANALOGCONN, SOUND_MIXER_LINE }, + { UATE_LINECONN, SOUND_MIXER_LINE }, + { UATE_LEGACYCONN, SOUND_MIXER_LINE }, - {UATE_DIGITALAUIFC, SOUND_MIXER_ALTPCM}, - {UATE_SPDIF, SOUND_MIXER_ALTPCM}, - {UATE_1394DA, SOUND_MIXER_ALTPCM}, - {UATE_1394DV, SOUND_MIXER_ALTPCM}, + { UATE_DIGITALAUIFC, SOUND_MIXER_ALTPCM }, + { UATE_SPDIF, SOUND_MIXER_ALTPCM }, { UATE_1394DA, SOUND_MIXER_ALTPCM }, + { UATE_1394DV, SOUND_MIXER_ALTPCM }, - {UATF_CDPLAYER, SOUND_MIXER_CD}, + { UATF_CDPLAYER, SOUND_MIXER_CD }, - {UATF_SYNTHESIZER, SOUND_MIXER_SYNTH}, + { UATF_SYNTHESIZER, SOUND_MIXER_SYNTH }, - {UATF_VIDEODISCAUDIO, SOUND_MIXER_VIDEO}, - {UATF_DVDAUDIO, SOUND_MIXER_VIDEO}, - {UATF_TVTUNERAUDIO, SOUND_MIXER_VIDEO}, + { UATF_VIDEODISCAUDIO, SOUND_MIXER_VIDEO }, + { UATF_DVDAUDIO, SOUND_MIXER_VIDEO }, + { UATF_TVTUNERAUDIO, SOUND_MIXER_VIDEO }, - {UATF_RADIORECV, SOUND_MIXER_RADIO}, - {UATF_RADIOXMIT, SOUND_MIXER_RADIO}, + { UATF_RADIORECV, SOUND_MIXER_RADIO }, + { UATF_RADIOXMIT, SOUND_MIXER_RADIO }, - {} /* END */ + {} /* END */ }; static uint16_t @@ -4573,31 +4586,32 @@ if (terminal_type == 0) { retval = default_type; - } else while (1) { - if (uat->terminal_type == 0) { - switch (terminal_type >> 8) { - case UATI_UNDEFINED >> 8: - retval = SOUND_MIXER_RECLEV; - goto done; - case UATO_UNDEFINED >> 8: - retval = SOUND_MIXER_PCM; - goto done; - case UATT_UNDEFINED >> 8: - retval = SOUND_MIXER_PHONEIN; - goto done; - default: - retval = default_type; + } else + while (1) { + if (uat->terminal_type == 0) { + switch (terminal_type >> 8) { + case UATI_UNDEFINED >> 8: + retval = SOUND_MIXER_RECLEV; + goto done; + case UATO_UNDEFINED >> 8: + retval = SOUND_MIXER_PCM; + goto done; + case UATT_UNDEFINED >> 8: + retval = SOUND_MIXER_PHONEIN; + goto done; + default: + retval = default_type; + goto done; + } + } else if (uat->terminal_type == terminal_type) { + retval = uat->feature; goto done; } - } else if (uat->terminal_type == terminal_type) { - retval = uat->feature; - goto done; + uat++; } - uat++; - } done: - DPRINTF("terminal_type=0x%04x RET=%d DEF=%d\n", - terminal_type, retval, default_type); + DPRINTF("terminal_type=0x%04x RET=%d DEF=%d\n", terminal_type, retval, + default_type); return (retval); } @@ -4611,7 +4625,7 @@ uint8_t match = 0; uint8_t i; - for (i = 0; uaudio_mixer_foreach_input(iot, &i); ) { + for (i = 0; uaudio_mixer_foreach_input(iot, &i);) { ptr = iot->root + i; temp = UGETW(ptr->u.it_v1->wTerminalType); @@ -4623,7 +4637,7 @@ terminal_type_input = temp; } - for (i = 0; uaudio_mixer_foreach_output(iot, &i); ) { + for (i = 0; uaudio_mixer_foreach_output(iot, &i);) { ptr = iot->root + i; temp = UGETW(ptr->u.ot_v1->wTerminalType); @@ -4635,26 +4649,28 @@ terminal_type_output = temp; } - DPRINTF("MATCH=%d IN=0x%04x OUT=0x%04x\n", - match, terminal_type_input, terminal_type_output); + DPRINTF("MATCH=%d IN=0x%04x OUT=0x%04x\n", match, terminal_type_input, + terminal_type_output); switch (match) { - case 0: /* not connected to USB */ + case 0: /* not connected to USB */ if (terminal_type_output != 0) { - return (uaudio_mixer_get_feature_by_tt( - terminal_type_output, SOUND_MIXER_MONITOR)); + return ( + uaudio_mixer_get_feature_by_tt(terminal_type_output, + SOUND_MIXER_MONITOR)); } else { - return (uaudio_mixer_get_feature_by_tt( - terminal_type_input, SOUND_MIXER_MONITOR)); + return ( + uaudio_mixer_get_feature_by_tt(terminal_type_input, + SOUND_MIXER_MONITOR)); } - case 3: /* connected to both USB input and USB output */ + case 3: /* connected to both USB input and USB output */ return (SOUND_MIXER_IMIX); - case 2: /* connected to USB output */ - return (uaudio_mixer_get_feature_by_tt( - terminal_type_input, SOUND_MIXER_RECLEV)); + case 2: /* connected to USB output */ + return (uaudio_mixer_get_feature_by_tt(terminal_type_input, + SOUND_MIXER_RECLEV)); case 1: /* connected to USB input */ - return (uaudio_mixer_get_feature_by_tt( - terminal_type_output, SOUND_MIXER_PCM)); + return (uaudio_mixer_get_feature_by_tt(terminal_type_output, + SOUND_MIXER_PCM)); default: return (SOUND_MIXER_NRDEVICES); } @@ -4670,7 +4686,7 @@ uint8_t match = 0; uint8_t i; - for (i = 0; uaudio_mixer_foreach_input(iot, &i); ) { + for (i = 0; uaudio_mixer_foreach_input(iot, &i);) { ptr = iot->root + i; temp = UGETW(ptr->u.it_v2->wTerminalType); @@ -4682,7 +4698,7 @@ terminal_type_input = temp; } - for (i = 0; uaudio_mixer_foreach_output(iot, &i); ) { + for (i = 0; uaudio_mixer_foreach_output(iot, &i);) { ptr = iot->root + i; temp = UGETW(ptr->u.ot_v2->wTerminalType); @@ -4694,26 +4710,28 @@ terminal_type_output = temp; } - DPRINTF("MATCH=%d IN=0x%04x OUT=0x%04x\n", - match, terminal_type_input, terminal_type_output); + DPRINTF("MATCH=%d IN=0x%04x OUT=0x%04x\n", match, terminal_type_input, + terminal_type_output); switch (match) { - case 0: /* not connected to USB */ + case 0: /* not connected to USB */ if (terminal_type_output != 0) { - return (uaudio_mixer_get_feature_by_tt( - terminal_type_output, SOUND_MIXER_MONITOR)); + return ( + uaudio_mixer_get_feature_by_tt(terminal_type_output, + SOUND_MIXER_MONITOR)); } else { - return (uaudio_mixer_get_feature_by_tt( - terminal_type_input, SOUND_MIXER_MONITOR)); + return ( + uaudio_mixer_get_feature_by_tt(terminal_type_input, + SOUND_MIXER_MONITOR)); } - case 3: /* connected to both USB input and USB output */ + case 3: /* connected to both USB input and USB output */ return (SOUND_MIXER_IMIX); - case 2: /* connected to USB output */ - return (uaudio_mixer_get_feature_by_tt( - terminal_type_input, SOUND_MIXER_RECLEV)); + case 2: /* connected to USB output */ + return (uaudio_mixer_get_feature_by_tt(terminal_type_input, + SOUND_MIXER_RECLEV)); case 1: /* connected to USB input */ - return (uaudio_mixer_get_feature_by_tt( - terminal_type_output, SOUND_MIXER_PCM)); + return (uaudio_mixer_get_feature_by_tt(terminal_type_output, + SOUND_MIXER_PCM)); default: return (SOUND_MIXER_NRDEVICES); } @@ -4723,7 +4741,8 @@ uaudio_mixer_merge_outputs(struct uaudio_search_result *dst, const struct uaudio_search_result *src) { - const uint8_t max = sizeof(src->bit_output) / sizeof(src->bit_output[0]); + const uint8_t max = sizeof(src->bit_output) / + sizeof(src->bit_output[0]); uint8_t x; for (x = 0; x != max; x++) @@ -4732,8 +4751,7 @@ static void uaudio_mixer_find_inputs_sub(struct uaudio_terminal_node *root, - const uint8_t *p_id, uint8_t n_id, - struct uaudio_search_result *info) + const uint8_t *p_id, uint8_t n_id, struct uaudio_search_result *info) { struct uaudio_terminal_node *iot; uint8_t n; @@ -4762,43 +4780,43 @@ case UDESCSUB_AC_FEATURE: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio_mixer_find_inputs_sub( - root, &iot->u.fu_v1->bSourceId, 1, info); + uaudio_mixer_find_inputs_sub(root, + &iot->u.fu_v1->bSourceId, 1, info); break; case UDESCSUB_AC_OUTPUT: info->bit_output[i / 8] |= (1 << (i % 8)); - uaudio_mixer_find_inputs_sub( - root, &iot->u.ot_v1->bSourceId, 1, info); + uaudio_mixer_find_inputs_sub(root, + &iot->u.ot_v1->bSourceId, 1, info); info->bit_output[i / 8] &= ~(1 << (i % 8)); break; case UDESCSUB_AC_MIXER: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio_mixer_find_inputs_sub( - root, iot->u.mu_v1->baSourceId, - iot->u.mu_v1->bNrInPins, info); + uaudio_mixer_find_inputs_sub(root, + iot->u.mu_v1->baSourceId, iot->u.mu_v1->bNrInPins, + info); break; case UDESCSUB_AC_SELECTOR: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio_mixer_find_inputs_sub( - root, iot->u.su_v1->baSourceId, - iot->u.su_v1->bNrInPins, info); + uaudio_mixer_find_inputs_sub(root, + iot->u.su_v1->baSourceId, iot->u.su_v1->bNrInPins, + info); break; case UDESCSUB_AC_PROCESSING: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio_mixer_find_inputs_sub( - root, iot->u.pu_v1->baSourceId, - iot->u.pu_v1->bNrInPins, info); + uaudio_mixer_find_inputs_sub(root, + iot->u.pu_v1->baSourceId, iot->u.pu_v1->bNrInPins, + info); break; case UDESCSUB_AC_EXTENSION: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio_mixer_find_inputs_sub( - root, iot->u.eu_v1->baSourceId, - iot->u.eu_v1->bNrInPins, info); + uaudio_mixer_find_inputs_sub(root, + iot->u.eu_v1->baSourceId, iot->u.eu_v1->bNrInPins, + info); break; default: @@ -4809,8 +4827,7 @@ static void uaudio20_mixer_find_inputs_sub(struct uaudio_terminal_node *root, - const uint8_t *p_id, uint8_t n_id, - struct uaudio_search_result *info) + const uint8_t *p_id, uint8_t n_id, struct uaudio_search_result *info) { struct uaudio_terminal_node *iot; uint8_t n; @@ -4839,57 +4856,55 @@ case UDESCSUB_AC_OUTPUT: info->bit_output[i / 8] |= (1 << (i % 8)); - uaudio20_mixer_find_inputs_sub( - root, &iot->u.ot_v2->bSourceId, 1, info); + uaudio20_mixer_find_inputs_sub(root, + &iot->u.ot_v2->bSourceId, 1, info); info->bit_output[i / 8] &= ~(1 << (i % 8)); break; case UDESCSUB_AC_MIXER: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio20_mixer_find_inputs_sub( - root, iot->u.mu_v2->baSourceId, - iot->u.mu_v2->bNrInPins, info); + uaudio20_mixer_find_inputs_sub(root, + iot->u.mu_v2->baSourceId, iot->u.mu_v2->bNrInPins, + info); break; case UDESCSUB_AC_SELECTOR: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio20_mixer_find_inputs_sub( - root, iot->u.su_v2->baSourceId, - iot->u.su_v2->bNrInPins, info); + uaudio20_mixer_find_inputs_sub(root, + iot->u.su_v2->baSourceId, iot->u.su_v2->bNrInPins, + info); break; case UDESCSUB_AC_SAMPLE_RT: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio20_mixer_find_inputs_sub( - root, &iot->u.ru_v2->bSourceId, - 1, info); + uaudio20_mixer_find_inputs_sub(root, + &iot->u.ru_v2->bSourceId, 1, info); break; case UDESCSUB_AC_EFFECT: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio20_mixer_find_inputs_sub( - root, &iot->u.ef_v2->bSourceId, - 1, info); + uaudio20_mixer_find_inputs_sub(root, + &iot->u.ef_v2->bSourceId, 1, info); break; case UDESCSUB_AC_FEATURE: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio20_mixer_find_inputs_sub( - root, &iot->u.fu_v2->bSourceId, 1, info); + uaudio20_mixer_find_inputs_sub(root, + &iot->u.fu_v2->bSourceId, 1, info); break; case UDESCSUB_AC_PROCESSING_V2: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio20_mixer_find_inputs_sub( - root, iot->u.pu_v2->baSourceId, - iot->u.pu_v2->bNrInPins, info); + uaudio20_mixer_find_inputs_sub(root, + iot->u.pu_v2->baSourceId, iot->u.pu_v2->bNrInPins, + info); break; case UDESCSUB_AC_EXTENSION_V2: uaudio_mixer_merge_outputs(&iot->usr, info); - uaudio20_mixer_find_inputs_sub( - root, iot->u.eu_v2->baSourceId, - iot->u.eu_v2->bNrInPins, info); + uaudio20_mixer_find_inputs_sub(root, + iot->u.eu_v2->baSourceId, iot->u.eu_v2->bNrInPins, + info); break; default: break; @@ -4899,8 +4914,7 @@ static void uaudio20_mixer_find_clocks_sub(struct uaudio_terminal_node *root, - const uint8_t *p_id, uint8_t n_id, - struct uaudio_search_result *info) + const uint8_t *p_id, uint8_t n_id, struct uaudio_search_result *info) { struct uaudio_terminal_node *iot; uint8_t n; @@ -4967,8 +4981,7 @@ goto top; } uaudio20_mixer_find_clocks_sub(root, - &iot->u.cmul_v2->bCSourceId, - 1, info); + &iot->u.cmul_v2->bCSourceId, 1, info); break; case UDESCSUB_AC_CLOCK_SRC: @@ -4994,8 +5007,8 @@ } static void -uaudio_mixer_fill_info(struct uaudio_softc *sc, - struct usb_device *udev, void *desc) +uaudio_mixer_fill_info(struct uaudio_softc *sc, struct usb_device *udev, + void *desc) { const struct usb_audio_control_descriptor *acdp; struct usb_config_descriptor *cd = usbd_get_config_descriptor(udev); @@ -5003,7 +5016,7 @@ const struct usb_audio_unit *au; struct uaudio_terminal_node *iot = NULL; uint16_t wTotalLen; - uint8_t ID_max = 0; /* inclusive */ + uint8_t ID_max = 0; /* inclusive */ uint8_t i; desc = usb_desc_foreach(cd, desc); @@ -5026,8 +5039,8 @@ /* get USB audio revision */ sc->sc_audio_rev = UGETW(acdp->bcdADC); - DPRINTFN(3, "found AC header, vers=%03x, len=%d\n", - sc->sc_audio_rev, wTotalLen); + DPRINTFN(3, "found AC header, vers=%03x, len=%d\n", sc->sc_audio_rev, + wTotalLen); iot = malloc(sizeof(struct uaudio_terminal_node) * 256, M_TEMP, M_WAITOK | M_ZERO); @@ -5066,17 +5079,17 @@ if (sc->sc_audio_rev >= UAUDIO_VERSION_30) { /* FALLTHROUGH */ } else if (sc->sc_audio_rev >= UAUDIO_VERSION_20) { - uaudio20_mixer_find_inputs_sub(iot, - &i, 1, &((iot + i)->usr)); + uaudio20_mixer_find_inputs_sub(iot, &i, 1, + &((iot + i)->usr)); sc->sc_mixer_clocks.is_input = 255; sc->sc_mixer_clocks.recurse_level = 0; - uaudio20_mixer_find_clocks_sub(iot, - &i, 1, &sc->sc_mixer_clocks); + uaudio20_mixer_find_clocks_sub(iot, &i, 1, + &sc->sc_mixer_clocks); } else { - uaudio_mixer_find_inputs_sub(iot, - &i, 1, &((iot + i)->usr)); + uaudio_mixer_find_inputs_sub(iot, &i, 1, + &((iot + i)->usr)); } } while (i--); @@ -5099,8 +5112,7 @@ if (dp == NULL) continue; - DPRINTFN(11, "id=%d subtype=%d\n", - i, dp->bDescriptorSubtype); + DPRINTFN(11, "id=%d subtype=%d\n", i, dp->bDescriptorSubtype); if (sc->sc_audio_rev >= UAUDIO_VERSION_30) { continue; @@ -5183,8 +5195,8 @@ } static int -uaudio_mixer_get(struct usb_device *udev, uint16_t audio_rev, - uint8_t what, struct uaudio_mixer_node *mc) +uaudio_mixer_get(struct usb_device *udev, uint16_t audio_rev, uint8_t what, + struct uaudio_mixer_node *mc) { struct usb_device_request req; int val; @@ -5272,9 +5284,9 @@ switch (USB_GET_STATE(xfer)) { case USB_ST_TRANSFERRED: -tr_transferred: + tr_transferred: case USB_ST_SETUP: -tr_setup: + tr_setup: if (mc == NULL) { mc = sc->sc_mixer_root; @@ -5288,19 +5300,23 @@ sc->sc_mixer_chan++; - update = ((mc->update[chan / 8] & (1 << (chan % 8))) && + update = ((mc->update[chan / 8] & + (1 << (chan % 8))) && (mc->wValue[chan] != -1)); mc->update[chan / 8] &= ~(1 << (chan % 8)); if (update) { - req.bmRequestType = UT_WRITE_CLASS_INTERFACE; + req.bmRequestType = + UT_WRITE_CLASS_INTERFACE; USETW(req.wValue, mc->wValue[chan]); USETW(req.wIndex, mc->wIndex); - if (sc->sc_audio_rev >= UAUDIO_VERSION_30) { + if (sc->sc_audio_rev >= + UAUDIO_VERSION_30) { return; - } else if (sc->sc_audio_rev >= UAUDIO_VERSION_20) { + } else if (sc->sc_audio_rev >= + UAUDIO_VERSION_20) { len = 2; req.bRequest = UA20_CS_CUR; USETW(req.wLength, len); @@ -5318,7 +5334,8 @@ pc = usbd_xfer_get_frame(xfer, 1); usbd_copy_in(pc, 0, buf, len); - usbd_xfer_set_frame_len(xfer, 0, sizeof(req)); + usbd_xfer_set_frame_len(xfer, 0, + sizeof(req)); usbd_xfer_set_frame_len(xfer, 1, len); usbd_xfer_set_frames(xfer, len ? 2 : 1); usbd_transfer_submit(xfer); @@ -5336,7 +5353,7 @@ } break; - default: /* Error */ + default: /* Error */ DPRINTF("error=%s\n", usbd_errstr(error)); if (error == USB_ERR_CANCELLED) { /* do nothing - we are detaching */ @@ -5367,14 +5384,14 @@ } static usb_error_t -uaudio20_set_speed(struct usb_device *udev, uint8_t iface_no, - uint8_t clockid, uint32_t speed) +uaudio20_set_speed(struct usb_device *udev, uint8_t iface_no, uint8_t clockid, + uint32_t speed) { struct usb_device_request req; uint8_t data[4]; - DPRINTFN(6, "ifaceno=%d clockid=%d speed=%u\n", - iface_no, clockid, speed); + DPRINTFN(6, "ifaceno=%d clockid=%d speed=%u\n", iface_no, clockid, + speed); req.bmRequestType = UT_WRITE_CLASS_INTERFACE; req.bRequest = UA20_CS_CUR; @@ -5420,8 +5437,8 @@ else if (val < mc->minval) val = mc->minval; - DPRINTFN(6, "type=0x%03x val=%d min=%d max=%d val=%d\n", - mc->type, val, mc->minval, mc->maxval, val); + DPRINTFN(6, "type=0x%03x val=%d min=%d max=%d val=%d\n", mc->type, val, + mc->minval, mc->maxval, val); return (val); } @@ -5457,10 +5474,13 @@ } if ((mc->ctl == SOUND_MIXER_NRDEVICES) && (mc->type == MIX_SELECTOR)) { - for (i = mc->minval; (i > 0) && (i <= mc->maxval); i++) { - if (mc->slctrtype[i - 1] == SOUND_MIXER_NRDEVICES) + for (i = mc->minval; (i > 0) && (i <= mc->maxval); + i++) { + if (mc->slctrtype[i - 1] == + SOUND_MIXER_NRDEVICES) continue; - sc->sc_child[index].recsrc_info |= 1U << mc->slctrtype[i - 1]; + sc->sc_child[index].recsrc_info |= 1U + << mc->slctrtype[i - 1]; } } } @@ -5478,8 +5498,8 @@ if (i == 0 && usbd_transfer_setup(sc->sc_udev, &sc->sc_mixer_iface_index, - sc->sc_mixer_xfer, uaudio_mixer_config, 1, sc, - sc->sc_child[i].mixer_lock)) { + sc->sc_mixer_xfer, uaudio_mixer_config, 1, sc, + sc->sc_child[i].mixer_lock)) { DPRINTFN(0, "could not allocate USB transfer for mixer!\n"); return (ENOMEM); } @@ -5510,8 +5530,8 @@ } void -uaudio_mixer_set(struct uaudio_softc *sc, struct snd_mixer *m, - unsigned type, unsigned left, unsigned right) +uaudio_mixer_set(struct uaudio_softc *sc, struct snd_mixer *m, unsigned type, + unsigned left, unsigned right) { unsigned index = uaudio_get_child_index_by_dev(sc, mix_get_dev(m)); struct uaudio_mixer_node *mc; @@ -5530,7 +5550,8 @@ } uint32_t -uaudio_mixer_setrecsrc(struct uaudio_softc *sc, struct snd_mixer *m, uint32_t src) +uaudio_mixer_setrecsrc(struct uaudio_softc *sc, struct snd_mixer *m, + uint32_t src) { unsigned index = uaudio_get_child_index_by_dev(sc, mix_get_dev(m)); struct uaudio_mixer_node *mc; @@ -5560,7 +5581,8 @@ src &= ~mask; src |= temp; - for (i = mc->minval; (i > 0) && (i <= mc->maxval); i++) { + for (i = mc->minval; (i > 0) && (i <= mc->maxval); + i++) { if (temp != (1U << mc->slctrtype[i - 1])) continue; uaudio_mixer_ctl_set(sc, mc, 0, i); @@ -5614,8 +5636,8 @@ (sub->read_open != 0)) { /* Send data to the application */ usb_fifo_put_data_linear( - sub->fifo.fp[USB_FIFO_RX], - buf + 1, cmd_len, 1); + sub->fifo.fp[USB_FIFO_RX], buf + 1, cmd_len, + 1); } actlen -= 4; pos += 4; @@ -5623,7 +5645,7 @@ case USB_ST_SETUP: DPRINTF("start\n"); -tr_setup: + tr_setup: usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); usbd_transfer_submit(xfer); break; @@ -5664,24 +5686,24 @@ } else if (b >= 0xf0) { switch (b) { - case 0xf0: /* system exclusive begin */ + case 0xf0: /* system exclusive begin */ sub->temp_1[1] = b; sub->state = UMIDI_ST_SYSEX_1; break; - case 0xf1: /* MIDI time code */ - case 0xf3: /* song select */ + case 0xf1: /* MIDI time code */ + case 0xf3: /* song select */ sub->temp_1[1] = b; sub->state = UMIDI_ST_1PARAM; break; - case 0xf2: /* song position pointer */ + case 0xf2: /* song position pointer */ sub->temp_1[1] = b; sub->state = UMIDI_ST_2PARAM_1; break; - case 0xf4: /* unknown */ - case 0xf5: /* unknown */ + case 0xf4: /* unknown */ + case 0xf5: /* unknown */ sub->state = UMIDI_ST_UNKNOWN; break; - case 0xf6: /* tune request */ + case 0xf6: /* tune request */ sub->temp_1[0] = p0 | 0x05; sub->temp_1[1] = 0xf6; sub->temp_1[2] = 0; @@ -5690,7 +5712,7 @@ sub->state = UMIDI_ST_UNKNOWN; return (1); - case 0xf7: /* system exclusive end */ + case 0xf7: /* system exclusive end */ switch (sub->state) { case UMIDI_ST_SYSEX_0: sub->temp_1[0] = p0 | 0x05; @@ -5724,7 +5746,7 @@ } else { sub->state = UMIDI_ST_2PARAM_1; } - } else { /* b < 0x80 */ + } else { /* b < 0x80 */ switch (sub->state) { case UMIDI_ST_1PARAM: if (sub->temp_1[1] < 0xf0) { @@ -5799,10 +5821,10 @@ DPRINTF("actlen=%d bytes\n", len); case USB_ST_SETUP: -tr_setup: + tr_setup: DPRINTF("start\n"); - nframes = 0; /* reset */ + nframes = 0; /* reset */ start_cable = chan->curr_cable; tr_any = 0; pc = usbd_xfer_get_frame(xfer, 0); @@ -5813,8 +5835,9 @@ sub = &chan->sub[chan->curr_cable]; if (sub->write_open) { - usb_fifo_get_data_linear(sub->fifo.fp[USB_FIFO_TX], - &buf, 1, &actlen, 0); + usb_fifo_get_data_linear( + sub->fifo.fp[USB_FIFO_TX], &buf, 1, &actlen, + 0); } else { actlen = 0; } @@ -5825,16 +5848,20 @@ DPRINTF("byte=0x%02x from FIFO %u\n", buf, (unsigned int)chan->curr_cable); - if (umidi_convert_to_usb(sub, chan->curr_cable, buf)) { - DPRINTF("sub=0x%02x 0x%02x 0x%02x 0x%02x\n", + if (umidi_convert_to_usb(sub, chan->curr_cable, + buf)) { + DPRINTF( + "sub=0x%02x 0x%02x 0x%02x 0x%02x\n", sub->temp_cmd[0], sub->temp_cmd[1], sub->temp_cmd[2], sub->temp_cmd[3]); - usbd_copy_in(pc, nframes * 4, sub->temp_cmd, 4); + usbd_copy_in(pc, nframes * 4, + sub->temp_cmd, 4); nframes++; - if ((nframes >= UMIDI_TX_FRAMES) || (chan->single_command != 0)) + if ((nframes >= UMIDI_TX_FRAMES) || + (chan->single_command != 0)) break; } else { continue; @@ -5859,7 +5886,7 @@ } break; - default: /* Error */ + default: /* Error */ DPRINTF("error=%s\n", usbd_errstr(error)); @@ -5887,8 +5914,7 @@ } } - panic("%s:%d cannot find usb_fifo!\n", - __FILE__, __LINE__); + panic("%s:%d cannot find usb_fifo!\n", __FILE__, __LINE__); return (NULL); } @@ -5981,7 +6007,7 @@ sub->state = UMIDI_ST_UNKNOWN; mtx_unlock(&chan->mtx); } - return (0); /* success */ + return (0); /* success */ } static void @@ -5996,8 +6022,7 @@ } static int -umidi_ioctl(struct usb_fifo *fifo, u_long cmd, void *data, - int fflags) +umidi_ioctl(struct usb_fifo *fifo, u_long cmd, void *data, int fflags) { return (ENODEV); } @@ -6036,8 +6061,8 @@ if (usb_test_quirk(uaa, UQ_SINGLE_CMD_MIDI)) chan->single_command = 1; - error = usbd_set_alt_interface_index(sc->sc_udev, - chan->iface_index, chan->iface_alt_index); + error = usbd_set_alt_interface_index(sc->sc_udev, chan->iface_index, + chan->iface_alt_index); if (error) { DPRINTF("setting of alternate index failed: %s\n", usbd_errstr(error)); @@ -6046,9 +6071,8 @@ usbd_set_parent_iface(sc->sc_udev, chan->iface_index, sc->sc_mixer_iface_index); - error = usbd_transfer_setup(uaa->device, &chan->iface_index, - chan->xfer, umidi_config, UMIDI_N_TRANSFER, - chan, &chan->mtx); + error = usbd_transfer_setup(uaa->device, &chan->iface_index, chan->xfer, + umidi_config, UMIDI_N_TRANSFER, chan, &chan->mtx); if (error) { DPRINTF("error=%s\n", usbd_errstr(error)); goto detach; @@ -6087,8 +6111,7 @@ sub = &chan->sub[n]; error = usb_fifo_attach(sc->sc_udev, chan, &chan->mtx, - &umidi_fifo_methods, &sub->fifo, unit, n, - chan->iface_index, + &umidi_fifo_methods, &sub->fifo, unit, n, chan->iface_index, UID_ROOT, GID_OPERATOR, 0666); if (error) { goto detach; @@ -6107,10 +6130,10 @@ mtx_unlock(&chan->mtx); - return (0); /* success */ + return (0); /* success */ detach: - return (ENXIO); /* failure */ + return (ENXIO); /* failure */ } static int @@ -6151,8 +6174,7 @@ case USB_ST_TRANSFERRED: DPRINTF("actlen=%d\n", actlen); - if (actlen != 0 && - (sc->sc_hid.flags & UAUDIO_HID_HAS_ID)) { + if (actlen != 0 && (sc->sc_hid.flags & UAUDIO_HID_HAS_ID)) { id = *buffer; buffer++; actlen--; @@ -6164,8 +6186,7 @@ if ((sc->sc_hid.flags & UAUDIO_HID_HAS_MUTE) && (sc->sc_hid.mute_id == id) && - hid_get_data(buffer, actlen, - &sc->sc_hid.mute_loc)) { + hid_get_data(buffer, actlen, &sc->sc_hid.mute_loc)) { DPRINTF("Mute toggle\n"); mixer_hwvol_mute_locked(m); @@ -6173,8 +6194,7 @@ if ((sc->sc_hid.flags & UAUDIO_HID_HAS_VOLUME_UP) && (sc->sc_hid.volume_up_id == id) && - hid_get_data(buffer, actlen, - &sc->sc_hid.volume_up_loc)) { + hid_get_data(buffer, actlen, &sc->sc_hid.volume_up_loc)) { DPRINTF("Volume Up\n"); mixer_hwvol_step_locked(m, 1, 1); @@ -6182,21 +6202,20 @@ if ((sc->sc_hid.flags & UAUDIO_HID_HAS_VOLUME_DOWN) && (sc->sc_hid.volume_down_id == id) && - hid_get_data(buffer, actlen, - &sc->sc_hid.volume_down_loc)) { + hid_get_data(buffer, actlen, &sc->sc_hid.volume_down_loc)) { DPRINTF("Volume Down\n"); mixer_hwvol_step_locked(m, -1, -1); } case USB_ST_SETUP: -tr_setup: + tr_setup: /* check if we can put more data into the FIFO */ usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); usbd_transfer_submit(xfer); break; - default: /* Error */ + default: /* Error */ DPRINTF("error=%s\n", usbd_errstr(error)); @@ -6210,8 +6229,7 @@ } static int -uaudio_hid_probe(struct uaudio_softc *sc, - struct usb_attach_arg *uaa) +uaudio_hid_probe(struct uaudio_softc *sc, struct usb_attach_arg *uaa) { void *d_ptr; uint32_t flags; @@ -6226,8 +6244,8 @@ return (-1); /* Get HID descriptor */ - error = usbd_req_get_hid_desc(uaa->device, NULL, &d_ptr, - &d_len, M_TEMP, sc->sc_hid.iface_index); + error = usbd_req_get_hid_desc(uaa->device, NULL, &d_ptr, &d_len, M_TEMP, + sc->sc_hid.iface_index); if (error) { DPRINTF("error reading report description\n"); @@ -6241,27 +6259,26 @@ sc->sc_hid.flags |= UAUDIO_HID_HAS_ID; if (hid_locate(d_ptr, d_len, - HID_USAGE2(HUP_CONSUMER, 0xE9 /* Volume Increment */), - hid_input, 0, &sc->sc_hid.volume_up_loc, &flags, - &sc->sc_hid.volume_up_id)) { + HID_USAGE2(HUP_CONSUMER, 0xE9 /* Volume Increment */), + hid_input, 0, &sc->sc_hid.volume_up_loc, &flags, + &sc->sc_hid.volume_up_id)) { if (flags & HIO_VARIABLE) sc->sc_hid.flags |= UAUDIO_HID_HAS_VOLUME_UP; DPRINTFN(1, "Found Volume Up key\n"); } if (hid_locate(d_ptr, d_len, - HID_USAGE2(HUP_CONSUMER, 0xEA /* Volume Decrement */), - hid_input, 0, &sc->sc_hid.volume_down_loc, &flags, - &sc->sc_hid.volume_down_id)) { + HID_USAGE2(HUP_CONSUMER, 0xEA /* Volume Decrement */), + hid_input, 0, &sc->sc_hid.volume_down_loc, &flags, + &sc->sc_hid.volume_down_id)) { if (flags & HIO_VARIABLE) sc->sc_hid.flags |= UAUDIO_HID_HAS_VOLUME_DOWN; DPRINTFN(1, "Found Volume Down key\n"); } - if (hid_locate(d_ptr, d_len, - HID_USAGE2(HUP_CONSUMER, 0xE2 /* Mute */), - hid_input, 0, &sc->sc_hid.mute_loc, &flags, - &sc->sc_hid.mute_id)) { + if (hid_locate(d_ptr, d_len, HID_USAGE2(HUP_CONSUMER, 0xE2 /* Mute */), + hid_input, 0, &sc->sc_hid.mute_loc, &flags, + &sc->sc_hid.mute_id)) { if (flags & HIO_VARIABLE) sc->sc_hid.flags |= UAUDIO_HID_HAS_MUTE; DPRINTFN(1, "Found Mute key\n"); @@ -6269,9 +6286,9 @@ free(d_ptr, M_TEMP); - if (!(sc->sc_hid.flags & (UAUDIO_HID_HAS_VOLUME_UP | - UAUDIO_HID_HAS_VOLUME_DOWN | - UAUDIO_HID_HAS_MUTE))) { + if (!(sc->sc_hid.flags & + (UAUDIO_HID_HAS_VOLUME_UP | UAUDIO_HID_HAS_VOLUME_DOWN | + UAUDIO_HID_HAS_MUTE))) { DPRINTFN(1, "Did not find any volume related keys\n"); return (-1); } @@ -6282,8 +6299,8 @@ /* allocate USB transfers */ error = usbd_transfer_setup(uaa->device, &sc->sc_hid.iface_index, - sc->sc_hid.xfer, uaudio_hid_config, UAUDIO_HID_N_TRANSFER, - sc, sc->sc_child[0].mixer_lock); + sc->sc_hid.xfer, uaudio_hid_config, UAUDIO_HID_N_TRANSFER, sc, + sc->sc_child[0].mixer_lock); if (error) { DPRINTF("error=%s\n", usbd_errstr(error)); return (-1); @@ -6297,7 +6314,8 @@ usbd_transfer_unsetup(sc->sc_hid.xfer, UAUDIO_HID_N_TRANSFER); } -DRIVER_MODULE_ORDERED(snd_uaudio, uhub, uaudio_driver, NULL, NULL, SI_ORDER_ANY); +DRIVER_MODULE_ORDERED(snd_uaudio, uhub, uaudio_driver, NULL, NULL, + SI_ORDER_ANY); MODULE_DEPEND(snd_uaudio, usb, 1, 1, 1); MODULE_DEPEND(snd_uaudio, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); MODULE_DEPEND(snd_uaudio, hid, 1, 1, 1); Index: sys/dev/sound/usb/uaudio_pcm.c =================================================================== --- sys/dev/sound/usb/uaudio_pcm.c +++ sys/dev/sound/usb/uaudio_pcm.c @@ -31,15 +31,16 @@ #include "opt_snd.h" #endif -#include #include +#include #include #include "mixer_if.h" /************************************************************/ static void * -ua_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +ua_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, + struct pcm_channel *c, int dir) { return (uaudio_chan_init(devinfo, b, c, dir)); } @@ -73,7 +74,8 @@ } static int -ua_chan_setfragments(kobj_t obj, void *data, uint32_t blocksize, uint32_t blockcount) +ua_chan_setfragments(kobj_t obj, void *data, uint32_t blocksize, + uint32_t blockcount) { return (uaudio_chan_set_param_fragments(data, blocksize, blockcount)); } @@ -109,8 +111,8 @@ return (uaudio_chan_getmatrix(data, format)); } -static kobj_method_t ua_chan_methods[] = { - KOBJMETHOD(channel_init, ua_chan_init), +static kobj_method_t ua_chan_methods[] = { KOBJMETHOD(channel_init, + ua_chan_init), KOBJMETHOD(channel_free, ua_chan_free), KOBJMETHOD(channel_setformat, ua_chan_setformat), KOBJMETHOD(channel_setspeed, ua_chan_setspeed), @@ -119,9 +121,7 @@ KOBJMETHOD(channel_trigger, ua_chan_trigger), KOBJMETHOD(channel_getptr, ua_chan_getptr), KOBJMETHOD(channel_getcaps, ua_chan_getcaps), - KOBJMETHOD(channel_getmatrix, ua_chan_getmatrix), - KOBJMETHOD_END -}; + KOBJMETHOD(channel_getmatrix, ua_chan_getmatrix), KOBJMETHOD_END }; CHANNEL_DECLARE(ua_chan); @@ -177,13 +177,11 @@ return (uaudio_mixer_uninit_sub(mix_getdevinfo(m), m)); } -static kobj_method_t ua_mixer_methods[] = { - KOBJMETHOD(mixer_init, ua_mixer_init), +static kobj_method_t ua_mixer_methods[] = { KOBJMETHOD(mixer_init, + ua_mixer_init), KOBJMETHOD(mixer_uninit, ua_mixer_uninit), KOBJMETHOD(mixer_set, ua_mixer_set), - KOBJMETHOD(mixer_setrecsrc, ua_mixer_setrecsrc), - KOBJMETHOD_END -}; + KOBJMETHOD(mixer_setrecsrc, ua_mixer_setrecsrc), KOBJMETHOD_END }; MIXER_DECLARE(ua_mixer); /************************************************************/ @@ -197,8 +195,7 @@ func = device_get_ivars(dev); - if ((func == NULL) || - (func->func != SCF_PCM)) { + if ((func == NULL) || (func->func != SCF_PCM)) { return (ENXIO); } @@ -221,8 +218,7 @@ static device_method_t ua_pcm_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, ua_probe), - DEVMETHOD(device_attach, ua_attach), + DEVMETHOD(device_probe, ua_probe), DEVMETHOD(device_attach, ua_attach), DEVMETHOD(device_detach, ua_detach), DEVMETHOD_END Index: sys/dev/sound/usb/uaudioreg.h =================================================================== --- sys/dev/sound/usb/uaudioreg.h +++ sys/dev/sound/usb/uaudioreg.h @@ -33,51 +33,51 @@ */ #ifndef _UAUDIOREG_H_ -#define _UAUDIOREG_H_ - -#define UAUDIO_VERSION_10 0x0100 -#define UAUDIO_VERSION_20 0x0200 -#define UAUDIO_VERSION_30 0x0300 - -#define UAUDIO_PROTOCOL_20 0x20 - -#define UDESC_CS_UNDEFINED 0x20 -#define UDESC_CS_DEVICE 0x21 -#define UDESC_CS_CONFIG 0x22 -#define UDESC_CS_STRING 0x23 -#define UDESC_CS_INTERFACE 0x24 -#define UDESC_CS_ENDPOINT 0x25 - -#define UDESCSUB_AC_HEADER 1 -#define UDESCSUB_AC_INPUT 2 -#define UDESCSUB_AC_OUTPUT 3 -#define UDESCSUB_AC_MIXER 4 -#define UDESCSUB_AC_SELECTOR 5 -#define UDESCSUB_AC_FEATURE 6 -#define UDESCSUB_AC_PROCESSING 7 -#define UDESCSUB_AC_EXTENSION 8 +#define _UAUDIOREG_H_ + +#define UAUDIO_VERSION_10 0x0100 +#define UAUDIO_VERSION_20 0x0200 +#define UAUDIO_VERSION_30 0x0300 + +#define UAUDIO_PROTOCOL_20 0x20 + +#define UDESC_CS_UNDEFINED 0x20 +#define UDESC_CS_DEVICE 0x21 +#define UDESC_CS_CONFIG 0x22 +#define UDESC_CS_STRING 0x23 +#define UDESC_CS_INTERFACE 0x24 +#define UDESC_CS_ENDPOINT 0x25 + +#define UDESCSUB_AC_HEADER 1 +#define UDESCSUB_AC_INPUT 2 +#define UDESCSUB_AC_OUTPUT 3 +#define UDESCSUB_AC_MIXER 4 +#define UDESCSUB_AC_SELECTOR 5 +#define UDESCSUB_AC_FEATURE 6 +#define UDESCSUB_AC_PROCESSING 7 +#define UDESCSUB_AC_EXTENSION 8 /* ==== USB audio v2.0 ==== */ -#define UDESCSUB_AC_EFFECT 7 -#define UDESCSUB_AC_PROCESSING_V2 8 -#define UDESCSUB_AC_EXTENSION_V2 9 -#define UDESCSUB_AC_CLOCK_SRC 10 -#define UDESCSUB_AC_CLOCK_SEL 11 -#define UDESCSUB_AC_CLOCK_MUL 12 -#define UDESCSUB_AC_SAMPLE_RT 13 +#define UDESCSUB_AC_EFFECT 7 +#define UDESCSUB_AC_PROCESSING_V2 8 +#define UDESCSUB_AC_EXTENSION_V2 9 +#define UDESCSUB_AC_CLOCK_SRC 10 +#define UDESCSUB_AC_CLOCK_SEL 11 +#define UDESCSUB_AC_CLOCK_MUL 12 +#define UDESCSUB_AC_SAMPLE_RT 13 /* These macros check if the endpoint descriptor has additional fields */ -#define UEP_MINSIZE 7 -#define UEP_HAS_REFRESH(ep) ((ep)->bLength >= 8) -#define UEP_HAS_SYNCADDR(ep) ((ep)->bLength >= 9) +#define UEP_MINSIZE 7 +#define UEP_HAS_REFRESH(ep) ((ep)->bLength >= 8) +#define UEP_HAS_SYNCADDR(ep) ((ep)->bLength >= 9) /* The first fields are identical to struct usb_endpoint_descriptor */ typedef struct { - uByte bLength; - uByte bDescriptorType; - uByte bEndpointAddress; - uByte bmAttributes; - uWord wMaxPacketSize; - uByte bInterval; + uByte bLength; + uByte bDescriptorType; + uByte bEndpointAddress; + uByte bmAttributes; + uWord wMaxPacketSize; + uByte bInterval; /* * The following two entries are only used by the Audio Class. * And according to the specs the Audio Class is the only one @@ -85,723 +85,724 @@ * Who knows what goes on in the minds of the people in the USB * standardization? :-( */ - uByte bRefresh; - uByte bSynchAddress; + uByte bRefresh; + uByte bSynchAddress; } __packed usb_endpoint_descriptor_audio_t; struct usb_audio_control_descriptor { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uWord bcdADC; - uWord wTotalLength; - uByte bInCollection; - uByte baInterfaceNr[1]; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uWord bcdADC; + uWord wTotalLength; + uByte bInCollection; + uByte baInterfaceNr[1]; } __packed; struct usb_audio_streaming_interface_descriptor { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bTerminalLink; - uByte bDelay; - uWord wFormatTag; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bTerminalLink; + uByte bDelay; + uWord wFormatTag; } __packed; struct usb_audio_streaming_endpoint_descriptor { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bmAttributes; -#define UA_SED_FREQ_CONTROL 0x01 -#define UA_SED_PITCH_CONTROL 0x02 -#define UA_SED_MAXPACKETSONLY 0x80 - uByte bLockDelayUnits; - uWord wLockDelay; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bmAttributes; +#define UA_SED_FREQ_CONTROL 0x01 +#define UA_SED_PITCH_CONTROL 0x02 +#define UA_SED_MAXPACKETSONLY 0x80 + uByte bLockDelayUnits; + uWord wLockDelay; } __packed; struct usb_midi_streaming_endpoint_descriptor { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bNumEmbMIDIJack; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bNumEmbMIDIJack; } __packed; struct usb_audio_streaming_type1_descriptor { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bFormatType; - uByte bNrChannels; - uByte bSubFrameSize; - uByte bBitResolution; - uByte bSamFreqType; -#define UA_SAMP_CONTNUOUS 0 - uByte tSamFreq[0]; -#define UA_GETSAMP(p, n) ((uint32_t)((((p)->tSamFreq[((n)*3)+0]) | \ - ((p)->tSamFreq[((n)*3)+1] << 8) | \ - ((p)->tSamFreq[((n)*3)+2] << 16)))) -#define UA_SAMP_LO(p) UA_GETSAMP(p, 0) -#define UA_SAMP_HI(p) UA_GETSAMP(p, 1) + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bFormatType; + uByte bNrChannels; + uByte bSubFrameSize; + uByte bBitResolution; + uByte bSamFreqType; +#define UA_SAMP_CONTNUOUS 0 + uByte tSamFreq[0]; +#define UA_GETSAMP(p, n) \ + ((uint32_t)((((p)->tSamFreq[((n) * 3) + 0]) | \ + ((p)->tSamFreq[((n) * 3) + 1] << 8) | \ + ((p)->tSamFreq[((n) * 3) + 2] << 16)))) +#define UA_SAMP_LO(p) UA_GETSAMP(p, 0) +#define UA_SAMP_HI(p) UA_GETSAMP(p, 1) } __packed; struct usb_audio_cluster { - uByte bNrChannels; - uWord wChannelConfig; -#define UA_CHANNEL_LEFT 0x0001 -#define UA_CHANNEL_RIGHT 0x0002 -#define UA_CHANNEL_CENTER 0x0004 -#define UA_CHANNEL_LFE 0x0008 -#define UA_CHANNEL_L_SURROUND 0x0010 -#define UA_CHANNEL_R_SURROUND 0x0020 -#define UA_CHANNEL_L_CENTER 0x0040 -#define UA_CHANNEL_R_CENTER 0x0080 -#define UA_CHANNEL_SURROUND 0x0100 -#define UA_CHANNEL_L_SIDE 0x0200 -#define UA_CHANNEL_R_SIDE 0x0400 -#define UA_CHANNEL_TOP 0x0800 - uByte iChannelNames; + uByte bNrChannels; + uWord wChannelConfig; +#define UA_CHANNEL_LEFT 0x0001 +#define UA_CHANNEL_RIGHT 0x0002 +#define UA_CHANNEL_CENTER 0x0004 +#define UA_CHANNEL_LFE 0x0008 +#define UA_CHANNEL_L_SURROUND 0x0010 +#define UA_CHANNEL_R_SURROUND 0x0020 +#define UA_CHANNEL_L_CENTER 0x0040 +#define UA_CHANNEL_R_CENTER 0x0080 +#define UA_CHANNEL_SURROUND 0x0100 +#define UA_CHANNEL_L_SIDE 0x0200 +#define UA_CHANNEL_R_SIDE 0x0400 +#define UA_CHANNEL_TOP 0x0800 + uByte iChannelNames; } __packed; /* Shared by all units and terminals */ struct usb_audio_unit { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; }; /* UDESCSUB_AC_INPUT */ struct usb_audio_input_terminal { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bTerminalId; - uWord wTerminalType; - uByte bAssocTerminal; - uByte bNrChannels; - uWord wChannelConfig; - uByte iChannelNames; -/* uByte iTerminal; */ + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bTerminalId; + uWord wTerminalType; + uByte bAssocTerminal; + uByte bNrChannels; + uWord wChannelConfig; + uByte iChannelNames; + /* uByte iTerminal; */ } __packed; /* UDESCSUB_AC_OUTPUT */ struct usb_audio_output_terminal { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bTerminalId; - uWord wTerminalType; - uByte bAssocTerminal; - uByte bSourceId; - uByte iTerminal; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bTerminalId; + uWord wTerminalType; + uByte bAssocTerminal; + uByte bSourceId; + uByte iTerminal; } __packed; /* UDESCSUB_AC_MIXER */ struct usb_audio_mixer_unit_0 { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uByte bNrInPins; - uByte baSourceId[0]; /* [bNrInPins] */ - /* struct usb_audio_mixer_unit_1 */ + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uByte bNrInPins; + uByte baSourceId[0]; /* [bNrInPins] */ + /* struct usb_audio_mixer_unit_1 */ } __packed; struct usb_audio_mixer_unit_1 { - uByte bNrChannels; - uWord wChannelConfig; - uByte iChannelNames; - uByte bmControls[0]; /* [see source code] */ - /* uByte iMixer; */ + uByte bNrChannels; + uWord wChannelConfig; + uByte iChannelNames; + uByte bmControls[0]; /* [see source code] */ + /* uByte iMixer; */ } __packed; /* UDESCSUB_AC_SELECTOR */ struct usb_audio_selector_unit { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uByte bNrInPins; - uByte baSourceId[0]; /* [bNrInPins] */ - /* uByte iSelector; */ + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uByte bNrInPins; + uByte baSourceId[0]; /* [bNrInPins] */ + /* uByte iSelector; */ } __packed; /* UDESCSUB_AC_FEATURE */ struct usb_audio_feature_unit { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uByte bSourceId; - uByte bControlSize; - uByte bmaControls[0]; /* [bControlSize * x] */ - /* uByte iFeature; */ + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uByte bSourceId; + uByte bControlSize; + uByte bmaControls[0]; /* [bControlSize * x] */ + /* uByte iFeature; */ } __packed; /* UDESCSUB_AC_PROCESSING */ struct usb_audio_processing_unit_0 { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uWord wProcessType; - uByte bNrInPins; - uByte baSourceId[0]; /* [bNrInPins] */ - /* struct usb_audio_processing_unit_1 */ + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uWord wProcessType; + uByte bNrInPins; + uByte baSourceId[0]; /* [bNrInPins] */ + /* struct usb_audio_processing_unit_1 */ } __packed; struct usb_audio_processing_unit_1 { - uByte bNrChannels; - uWord wChannelConfig; - uByte iChannelNames; - uByte bControlSize; - uByte bmControls[0]; /* [bControlSize] */ -#define UA_PROC_ENABLE_MASK 1 + uByte bNrChannels; + uWord wChannelConfig; + uByte iChannelNames; + uByte bControlSize; + uByte bmControls[0]; /* [bControlSize] */ +#define UA_PROC_ENABLE_MASK 1 } __packed; struct usb_audio_processing_unit_updown { - uByte iProcessing; - uByte bNrModes; - uWord waModes[0]; /* [bNrModes] */ + uByte iProcessing; + uByte bNrModes; + uWord waModes[0]; /* [bNrModes] */ } __packed; /* UDESCSUB_AC_EXTENSION */ struct usb_audio_extension_unit_0 { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uWord wExtensionCode; - uByte bNrInPins; - uByte baSourceId[0]; /* [bNrInPins] */ - /* struct usb_audio_extension_unit_1 */ + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uWord wExtensionCode; + uByte bNrInPins; + uByte baSourceId[0]; /* [bNrInPins] */ + /* struct usb_audio_extension_unit_1 */ } __packed; struct usb_audio_extension_unit_1 { - uByte bNrChannels; - uWord wChannelConfig; - uByte iChannelNames; - uByte bControlSize; - uByte bmControls[0]; /* [bControlSize] */ -#define UA_EXT_ENABLE_MASK 1 -#define UA_EXT_ENABLE 1 + uByte bNrChannels; + uWord wChannelConfig; + uByte iChannelNames; + uByte bControlSize; + uByte bmControls[0]; /* [bControlSize] */ +#define UA_EXT_ENABLE_MASK 1 +#define UA_EXT_ENABLE 1 /* uByte iExtension; */ } __packed; /* USB terminal types */ -#define UAT_UNDEFINED 0x0100 -#define UAT_STREAM 0x0101 -#define UAT_VENDOR 0x01ff +#define UAT_UNDEFINED 0x0100 +#define UAT_STREAM 0x0101 +#define UAT_VENDOR 0x01ff /* input terminal types */ -#define UATI_UNDEFINED 0x0200 -#define UATI_MICROPHONE 0x0201 -#define UATI_DESKMICROPHONE 0x0202 -#define UATI_PERSONALMICROPHONE 0x0203 -#define UATI_OMNIMICROPHONE 0x0204 -#define UATI_MICROPHONEARRAY 0x0205 -#define UATI_PROCMICROPHONEARR 0x0206 +#define UATI_UNDEFINED 0x0200 +#define UATI_MICROPHONE 0x0201 +#define UATI_DESKMICROPHONE 0x0202 +#define UATI_PERSONALMICROPHONE 0x0203 +#define UATI_OMNIMICROPHONE 0x0204 +#define UATI_MICROPHONEARRAY 0x0205 +#define UATI_PROCMICROPHONEARR 0x0206 /* output terminal types */ -#define UATO_UNDEFINED 0x0300 -#define UATO_SPEAKER 0x0301 -#define UATO_HEADPHONES 0x0302 -#define UATO_DISPLAYAUDIO 0x0303 -#define UATO_DESKTOPSPEAKER 0x0304 -#define UATO_ROOMSPEAKER 0x0305 -#define UATO_COMMSPEAKER 0x0306 -#define UATO_SUBWOOFER 0x0307 +#define UATO_UNDEFINED 0x0300 +#define UATO_SPEAKER 0x0301 +#define UATO_HEADPHONES 0x0302 +#define UATO_DISPLAYAUDIO 0x0303 +#define UATO_DESKTOPSPEAKER 0x0304 +#define UATO_ROOMSPEAKER 0x0305 +#define UATO_COMMSPEAKER 0x0306 +#define UATO_SUBWOOFER 0x0307 /* bidir terminal types */ -#define UATB_UNDEFINED 0x0400 -#define UATB_HANDSET 0x0401 -#define UATB_HEADSET 0x0402 -#define UATB_SPEAKERPHONE 0x0403 -#define UATB_SPEAKERPHONEESUP 0x0404 -#define UATB_SPEAKERPHONEECANC 0x0405 +#define UATB_UNDEFINED 0x0400 +#define UATB_HANDSET 0x0401 +#define UATB_HEADSET 0x0402 +#define UATB_SPEAKERPHONE 0x0403 +#define UATB_SPEAKERPHONEESUP 0x0404 +#define UATB_SPEAKERPHONEECANC 0x0405 /* telephony terminal types */ -#define UATT_UNDEFINED 0x0500 -#define UATT_PHONELINE 0x0501 -#define UATT_TELEPHONE 0x0502 -#define UATT_DOWNLINEPHONE 0x0503 +#define UATT_UNDEFINED 0x0500 +#define UATT_PHONELINE 0x0501 +#define UATT_TELEPHONE 0x0502 +#define UATT_DOWNLINEPHONE 0x0503 /* external terminal types */ -#define UATE_UNDEFINED 0x0600 -#define UATE_ANALOGCONN 0x0601 -#define UATE_DIGITALAUIFC 0x0602 -#define UATE_LINECONN 0x0603 -#define UATE_LEGACYCONN 0x0604 -#define UATE_SPDIF 0x0605 -#define UATE_1394DA 0x0606 -#define UATE_1394DV 0x0607 +#define UATE_UNDEFINED 0x0600 +#define UATE_ANALOGCONN 0x0601 +#define UATE_DIGITALAUIFC 0x0602 +#define UATE_LINECONN 0x0603 +#define UATE_LEGACYCONN 0x0604 +#define UATE_SPDIF 0x0605 +#define UATE_1394DA 0x0606 +#define UATE_1394DV 0x0607 /* embedded function terminal types */ -#define UATF_UNDEFINED 0x0700 -#define UATF_CALIBNOISE 0x0701 -#define UATF_EQUNOISE 0x0702 -#define UATF_CDPLAYER 0x0703 -#define UATF_DAT 0x0704 -#define UATF_DCC 0x0705 -#define UATF_MINIDISK 0x0706 -#define UATF_ANALOGTAPE 0x0707 -#define UATF_PHONOGRAPH 0x0708 -#define UATF_VCRAUDIO 0x0709 -#define UATF_VIDEODISCAUDIO 0x070a -#define UATF_DVDAUDIO 0x070b -#define UATF_TVTUNERAUDIO 0x070c -#define UATF_SATELLITE 0x070d -#define UATF_CABLETUNER 0x070e -#define UATF_DSS 0x070f -#define UATF_RADIORECV 0x0710 -#define UATF_RADIOXMIT 0x0711 -#define UATF_MULTITRACK 0x0712 -#define UATF_SYNTHESIZER 0x0713 - -#define SET_CUR 0x01 -#define GET_CUR 0x81 -#define SET_MIN 0x02 -#define GET_MIN 0x82 -#define SET_MAX 0x03 -#define GET_MAX 0x83 -#define SET_RES 0x04 -#define GET_RES 0x84 -#define SET_MEM 0x05 -#define GET_MEM 0x85 -#define GET_STAT 0xff - -#define MUTE_CONTROL 0x01 -#define VOLUME_CONTROL 0x02 -#define BASS_CONTROL 0x03 -#define MID_CONTROL 0x04 -#define TREBLE_CONTROL 0x05 -#define GRAPHIC_EQUALIZER_CONTROL 0x06 -#define AGC_CONTROL 0x07 -#define DELAY_CONTROL 0x08 -#define BASS_BOOST_CONTROL 0x09 -#define LOUDNESS_CONTROL 0x0a +#define UATF_UNDEFINED 0x0700 +#define UATF_CALIBNOISE 0x0701 +#define UATF_EQUNOISE 0x0702 +#define UATF_CDPLAYER 0x0703 +#define UATF_DAT 0x0704 +#define UATF_DCC 0x0705 +#define UATF_MINIDISK 0x0706 +#define UATF_ANALOGTAPE 0x0707 +#define UATF_PHONOGRAPH 0x0708 +#define UATF_VCRAUDIO 0x0709 +#define UATF_VIDEODISCAUDIO 0x070a +#define UATF_DVDAUDIO 0x070b +#define UATF_TVTUNERAUDIO 0x070c +#define UATF_SATELLITE 0x070d +#define UATF_CABLETUNER 0x070e +#define UATF_DSS 0x070f +#define UATF_RADIORECV 0x0710 +#define UATF_RADIOXMIT 0x0711 +#define UATF_MULTITRACK 0x0712 +#define UATF_SYNTHESIZER 0x0713 + +#define SET_CUR 0x01 +#define GET_CUR 0x81 +#define SET_MIN 0x02 +#define GET_MIN 0x82 +#define SET_MAX 0x03 +#define GET_MAX 0x83 +#define SET_RES 0x04 +#define GET_RES 0x84 +#define SET_MEM 0x05 +#define GET_MEM 0x85 +#define GET_STAT 0xff + +#define MUTE_CONTROL 0x01 +#define VOLUME_CONTROL 0x02 +#define BASS_CONTROL 0x03 +#define MID_CONTROL 0x04 +#define TREBLE_CONTROL 0x05 +#define GRAPHIC_EQUALIZER_CONTROL 0x06 +#define AGC_CONTROL 0x07 +#define DELAY_CONTROL 0x08 +#define BASS_BOOST_CONTROL 0x09 +#define LOUDNESS_CONTROL 0x0a /* ==== USB audio v2.0 ==== */ -#define INPUT_GAIN_CONTROL 0x0b -#define INPUT_GAIN_PAD_CONTROL 0x0c -#define PHASE_INVERTER_CONTROL 0x0d -#define UNDERFLOW_CONTROL 0x0e -#define OVERFLOW_CONTROL 0x0f -#define LATENCY_CONTROL 0x10 +#define INPUT_GAIN_CONTROL 0x0b +#define INPUT_GAIN_PAD_CONTROL 0x0c +#define PHASE_INVERTER_CONTROL 0x0d +#define UNDERFLOW_CONTROL 0x0e +#define OVERFLOW_CONTROL 0x0f +#define LATENCY_CONTROL 0x10 -#define FU_MASK(u) (1 << ((u)-1)) +#define FU_MASK(u) (1 << ((u)-1)) -#define MASTER_CHAN 0 +#define MASTER_CHAN 0 -#define MS_GENERAL 1 -#define AS_GENERAL 1 -#define FORMAT_TYPE 2 -#define FORMAT_SPECIFIC 3 +#define MS_GENERAL 1 +#define AS_GENERAL 1 +#define FORMAT_TYPE 2 +#define FORMAT_SPECIFIC 3 /* ==== USB audio v2.0 ==== */ -#define FORMAT_ENCODER 3 -#define FORMAT_DECODER 4 - -#define UA_FMT_PCM 1 -#define UA_FMT_PCM8 2 -#define UA_FMT_IEEE_FLOAT 3 -#define UA_FMT_ALAW 4 -#define UA_FMT_MULAW 5 -#define UA_FMT_MPEG 0x1001 -#define UA_FMT_AC3 0x1002 - -#define SAMPLING_FREQ_CONTROL 0x01 -#define PITCH_CONTROL 0x02 - -#define FORMAT_TYPE_UNDEFINED 0 -#define FORMAT_TYPE_I 1 -#define FORMAT_TYPE_II 2 -#define FORMAT_TYPE_III 3 - -#define UA_PROC_MASK(n) (1<< ((n)-1)) -#define PROCESS_UNDEFINED 0 -#define XX_ENABLE_CONTROL 1 -#define UPDOWNMIX_PROCESS 1 -#define UD_ENABLE_CONTROL 1 -#define UD_MODE_SELECT_CONTROL 2 -#define DOLBY_PROLOGIC_PROCESS 2 -#define DP_ENABLE_CONTROL 1 -#define DP_MODE_SELECT_CONTROL 2 -#define P3D_STEREO_EXTENDER_PROCESS 3 -#define P3D_ENABLE_CONTROL 1 -#define P3D_SPACIOUSNESS_CONTROL 2 -#define REVERBATION_PROCESS 4 -#define RV_ENABLE_CONTROL 1 -#define RV_LEVEL_CONTROL 2 -#define RV_TIME_CONTROL 3 -#define RV_FEEDBACK_CONTROL 4 -#define CHORUS_PROCESS 5 -#define CH_ENABLE_CONTROL 1 -#define CH_LEVEL_CONTROL 2 -#define CH_RATE_CONTROL 3 -#define CH_DEPTH_CONTROL 4 -#define DYN_RANGE_COMP_PROCESS 6 -#define DR_ENABLE_CONTROL 1 -#define DR_COMPRESSION_RATE_CONTROL 2 -#define DR_MAXAMPL_CONTROL 3 -#define DR_THRESHOLD_CONTROL 4 -#define DR_ATTACK_TIME_CONTROL 5 -#define DR_RELEASE_TIME_CONTROL 6 +#define FORMAT_ENCODER 3 +#define FORMAT_DECODER 4 + +#define UA_FMT_PCM 1 +#define UA_FMT_PCM8 2 +#define UA_FMT_IEEE_FLOAT 3 +#define UA_FMT_ALAW 4 +#define UA_FMT_MULAW 5 +#define UA_FMT_MPEG 0x1001 +#define UA_FMT_AC3 0x1002 + +#define SAMPLING_FREQ_CONTROL 0x01 +#define PITCH_CONTROL 0x02 + +#define FORMAT_TYPE_UNDEFINED 0 +#define FORMAT_TYPE_I 1 +#define FORMAT_TYPE_II 2 +#define FORMAT_TYPE_III 3 + +#define UA_PROC_MASK(n) (1 << ((n)-1)) +#define PROCESS_UNDEFINED 0 +#define XX_ENABLE_CONTROL 1 +#define UPDOWNMIX_PROCESS 1 +#define UD_ENABLE_CONTROL 1 +#define UD_MODE_SELECT_CONTROL 2 +#define DOLBY_PROLOGIC_PROCESS 2 +#define DP_ENABLE_CONTROL 1 +#define DP_MODE_SELECT_CONTROL 2 +#define P3D_STEREO_EXTENDER_PROCESS 3 +#define P3D_ENABLE_CONTROL 1 +#define P3D_SPACIOUSNESS_CONTROL 2 +#define REVERBATION_PROCESS 4 +#define RV_ENABLE_CONTROL 1 +#define RV_LEVEL_CONTROL 2 +#define RV_TIME_CONTROL 3 +#define RV_FEEDBACK_CONTROL 4 +#define CHORUS_PROCESS 5 +#define CH_ENABLE_CONTROL 1 +#define CH_LEVEL_CONTROL 2 +#define CH_RATE_CONTROL 3 +#define CH_DEPTH_CONTROL 4 +#define DYN_RANGE_COMP_PROCESS 6 +#define DR_ENABLE_CONTROL 1 +#define DR_COMPRESSION_RATE_CONTROL 2 +#define DR_MAXAMPL_CONTROL 3 +#define DR_THRESHOLD_CONTROL 4 +#define DR_ATTACK_TIME_CONTROL 5 +#define DR_RELEASE_TIME_CONTROL 6 /*------------------------------------------------------------------------* * USB audio v2.0 definitions *------------------------------------------------------------------------*/ struct usb_audio20_streaming_interface_descriptor { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bTerminalLink; - uByte bmControls; - uByte bFormatType; - uDWord bmFormats; - uByte bNrChannels; - uDWord bmChannelConfig; - uByte iChannelNames; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bTerminalLink; + uByte bmControls; + uByte bFormatType; + uDWord bmFormats; + uByte bNrChannels; + uDWord bmChannelConfig; + uByte iChannelNames; } __packed; struct usb_audio20_encoder_descriptor { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bEncoderID; - uByte bEncoder; - uDWord bmControls; - uByte iParam1; - uByte iParam2; - uByte iParam3; - uByte iParam4; - uByte iParam5; - uByte iParam6; - uByte iParam7; - uByte iParam8; - uByte iEncoder; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bEncoderID; + uByte bEncoder; + uDWord bmControls; + uByte iParam1; + uByte iParam2; + uByte iParam3; + uByte iParam4; + uByte iParam5; + uByte iParam6; + uByte iParam7; + uByte iParam8; + uByte iEncoder; } __packed; struct usb_audio20_streaming_endpoint_descriptor { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bmAttributes; -#define UA20_MPS_ONLY 0x80 - uByte bmControls; -#define UA20_PITCH_CONTROL_MASK 0x03 -#define UA20_DATA_OVERRUN_MASK 0x0C -#define UA20_DATA_UNDERRUN_MASK 0x30 - uByte bLockDelayUnits; - uWord wLockDelay; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bmAttributes; +#define UA20_MPS_ONLY 0x80 + uByte bmControls; +#define UA20_PITCH_CONTROL_MASK 0x03 +#define UA20_DATA_OVERRUN_MASK 0x0C +#define UA20_DATA_UNDERRUN_MASK 0x30 + uByte bLockDelayUnits; + uWord wLockDelay; } __packed; struct usb_audio20_feedback_endpoint_descriptor { - uByte bLength; - uByte bDescriptorType; - uByte bEndpointAddress; - uByte bmAttributes; - uWord wMaxPacketSize; - uByte bInterval; + uByte bLength; + uByte bDescriptorType; + uByte bEndpointAddress; + uByte bmAttributes; + uWord wMaxPacketSize; + uByte bInterval; } __packed; -#define UA20_CS_CUR 0x01 -#define UA20_CS_RANGE 0x02 -#define UA20_CS_MEM 0x03 +#define UA20_CS_CUR 0x01 +#define UA20_CS_RANGE 0x02 +#define UA20_CS_MEM 0x03 struct usb_audio20_cur1_parameter { - uByte bCur; + uByte bCur; } __packed; struct usb_audio20_ctl1_range_sub { - uByte bMIN; - uByte bMAX; - uByte bRES; + uByte bMIN; + uByte bMAX; + uByte bRES; } __packed; struct usb_audio20_ctl1_range { - uWord wNumSubRanges; + uWord wNumSubRanges; struct usb_audio20_ctl1_range_sub sub[1]; } __packed; struct usb_audio20_cur2_parameter { - uWord wCur; + uWord wCur; } __packed; struct usb_audio20_ctl2_range_sub { - uWord wMIN; - uWord wMAX; - uWord wRES; + uWord wMIN; + uWord wMAX; + uWord wRES; } __packed; struct usb_audio20_ctl2_range { - uWord wNumSubRanges; + uWord wNumSubRanges; struct usb_audio20_ctl2_range_sub sub[1]; } __packed; struct usb_audio20_cur4_parameter { - uDWord dCur; + uDWord dCur; } __packed; struct usb_audio20_ctl4_range_sub { - uDWord dMIN; - uDWord dMAX; - uDWord dRES; + uDWord dMIN; + uDWord dMAX; + uDWord dRES; } __packed; struct usb_audio20_ctl4_range { - uWord wNumSubRanges; + uWord wNumSubRanges; struct usb_audio20_ctl4_range_sub sub[1]; } __packed; struct usb_audio20_cc_cluster_descriptor { - uByte bNrChannels; - uDWord bmChannelConfig; - uByte iChannelNames; + uByte bNrChannels; + uDWord bmChannelConfig; + uByte iChannelNames; } __packed; struct usb_audio20_streaming_type1_descriptor { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bFormatType; - uByte bSubslotSize; - uByte bBitResolution; -} __packed; - -#define UA20_EERROR_NONE 0 -#define UA20_EERROR_MEMORY 1 -#define UA20_EERROR_BANDWIDTH 2 -#define UA20_EERROR_CPU 3 -#define UA20_EERROR_FORMATFR_ER 4 -#define UA20_EERROR_FORMATFR_SM 5 -#define UA20_EERROR_FORMATFR_LG 6 -#define UA20_EERROR_DATAFORMAT 7 -#define UA20_EERROR_NUMCHANNELS 8 -#define UA20_EERROR_SAMPLERATE 9 -#define UA20_EERROR_BITRATE 10 -#define UA20_EERROR_PARAM 11 -#define UA20_EERROR_NREADY 12 -#define UA20_EERROR_BUSY 13 + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bFormatType; + uByte bSubslotSize; + uByte bBitResolution; +} __packed; + +#define UA20_EERROR_NONE 0 +#define UA20_EERROR_MEMORY 1 +#define UA20_EERROR_BANDWIDTH 2 +#define UA20_EERROR_CPU 3 +#define UA20_EERROR_FORMATFR_ER 4 +#define UA20_EERROR_FORMATFR_SM 5 +#define UA20_EERROR_FORMATFR_LG 6 +#define UA20_EERROR_DATAFORMAT 7 +#define UA20_EERROR_NUMCHANNELS 8 +#define UA20_EERROR_SAMPLERATE 9 +#define UA20_EERROR_BITRATE 10 +#define UA20_EERROR_PARAM 11 +#define UA20_EERROR_NREADY 12 +#define UA20_EERROR_BUSY 13 struct usb_audio20_cc_alt_setting { - uByte bControlSize; - uDWord bmValidAltSettings; + uByte bControlSize; + uDWord bmValidAltSettings; } __packed; struct usb_audio20_interrupt_message { - uByte bInfo; - uByte bAttribute; - uDWord wValue; - uDWord wIndex; + uByte bInfo; + uByte bAttribute; + uDWord wValue; + uDWord wIndex; } __packed; /* UDESCSUB_AC_CLOCK_SRC */ struct usb_audio20_clock_source_unit { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bClockId; - uByte bmAttributes; - uByte bmControls; - uByte bAssocTerminal; - uByte iClockSource; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bClockId; + uByte bmAttributes; + uByte bmControls; + uByte bAssocTerminal; + uByte iClockSource; } __packed; /* UDESCSUB_AC_CLOCK_SEL */ struct usb_audio20_clock_selector_unit_0 { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bClockId; - uByte bNrInPins; - uByte baCSourceId[0]; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bClockId; + uByte bNrInPins; + uByte baCSourceId[0]; } __packed; struct usb_audio20_clock_selector_unit_1 { - uByte bmControls; - uByte iClockSelector; + uByte bmControls; + uByte iClockSelector; } __packed; /* UDESCSUB_AC_CLOCK_MUL */ struct usb_audio20_clock_multiplier_unit { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bClockId; - uByte bCSourceId; - uByte bmControls; - uByte iClockMultiplier; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bClockId; + uByte bCSourceId; + uByte bmControls; + uByte iClockMultiplier; } __packed; /* UDESCSUB_AC_INPUT */ struct usb_audio20_input_terminal { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bTerminalId; - uWord wTerminalType; - uByte bAssocTerminal; - uByte bCSourceId; - uByte bNrChannels; - uDWord bmChannelConfig; - uByte iCHannelNames; - uWord bmControls; - uByte iTerminal; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bTerminalId; + uWord wTerminalType; + uByte bAssocTerminal; + uByte bCSourceId; + uByte bNrChannels; + uDWord bmChannelConfig; + uByte iCHannelNames; + uWord bmControls; + uByte iTerminal; } __packed; /* UDESCSUB_AC_OUTPUT */ struct usb_audio20_output_terminal { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bTerminalId; - uWord wTerminalType; - uByte bAssocTerminal; - uByte bSourceId; - uByte bCSourceId; - uWord bmControls; - uByte iTerminal; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bTerminalId; + uWord wTerminalType; + uByte bAssocTerminal; + uByte bSourceId; + uByte bCSourceId; + uWord bmControls; + uByte iTerminal; } __packed; /* UDESCSUB_AC_MIXER */ struct usb_audio20_mixer_unit_0 { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uByte bNrInPins; - uByte baSourceId[0]; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uByte bNrInPins; + uByte baSourceId[0]; /* struct usb_audio20_mixer_unit_1 */ } __packed; struct usb_audio20_mixer_unit_1 { - uByte bNrChannels; - uDWord bmChannelConfig; - uByte iChannelNames; - uByte bmControls[0]; + uByte bNrChannels; + uDWord bmChannelConfig; + uByte iChannelNames; + uByte bmControls[0]; /* uByte iMixer; */ } __packed; /* UDESCSUB_AC_SELECTOR */ struct usb_audio20_selector_unit { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uByte bNrInPins; - uByte baSourceId[0]; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uByte bNrInPins; + uByte baSourceId[0]; /* uByte iSelector; */ } __packed; /* UDESCSUB_AC_FEATURE */ struct usb_audio20_feature_unit { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uByte bSourceId; - uDWord bmaControls[0]; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uByte bSourceId; + uDWord bmaControls[0]; /* uByte iFeature; */ } __packed; /* UDESCSUB_AC_SAMPLE_RT */ struct usb_audio20_sample_rate_unit { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uByte bSourceId; - uByte bSourceInId; - uByte bSourceOutId; - uByte iSrc; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uByte bSourceId; + uByte bSourceInId; + uByte bSourceOutId; + uByte iSrc; } __packed; /* UDESCSUB_AC_EFFECT */ struct usb_audio20_effect_unit { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uWord wEffectType; - uByte bSourceId; - uDWord bmaControls[0]; - uByte iEffects; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uWord wEffectType; + uByte bSourceId; + uDWord bmaControls[0]; + uByte iEffects; } __packed; /* UDESCSUB_AC_PROCESSING_V2 */ struct usb_audio20_processing_unit_0 { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uWord wProcessType; - uByte bNrInPins; - uByte baSourceId[0]; /* [bNrInPins] */ + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uWord wProcessType; + uByte bNrInPins; + uByte baSourceId[0]; /* [bNrInPins] */ } __packed; struct usb_audio20_processing_unit_1 { - uByte bNrChannels; - uDWord bmChannelConfig; - uByte iChannelNames; - uWord bmControls; - uByte iProcessing; + uByte bNrChannels; + uDWord bmChannelConfig; + uByte iChannelNames; + uWord bmControls; + uByte iProcessing; } __packed; /* UDESCSUB_AC_EXTENSION_V2 */ struct usb_audio20_extension_unit_0 { - uByte bLength; - uByte bDescriptorType; - uByte bDescriptorSubtype; - uByte bUnitId; - uWord wExtensionCode; - uByte bNrInPins; - uByte baSourceId[0]; + uByte bLength; + uByte bDescriptorType; + uByte bDescriptorSubtype; + uByte bUnitId; + uWord wExtensionCode; + uByte bNrInPins; + uByte baSourceId[0]; } __packed; struct usb_audio20_extension_unit_1 { - uByte bNrChannels; - uDWord bmChannelConfig; - uByte iChannelNames; - uByte bmControls; - uByte iExtension; + uByte bNrChannels; + uDWord bmChannelConfig; + uByte iChannelNames; + uByte bmControls; + uByte iExtension; } __packed; struct usb_audio20_cluster { - uByte bNrChannels; - uDWord bmChannelConfig; - uByte iChannelNames; -} __packed; - -#define UA20_TF_UNDEFINED 0x00 -#define UA20_TF_DESKTOP_SPEAKER 0x01 -#define UA20_TF_HOME_THEATER 0x02 -#define UA20_TF_MICROPHONE 0x03 -#define UA20_TF_HEADSET 0x04 -#define UA20_TF_TELEPHONE 0x05 -#define UA20_TF_CONVERTER 0x06 -#define UA20_TF_SOUND_RECORDER 0x07 -#define UA20_TF_IO_BOX 0x08 -#define UA20_TF_MUSICAL_INSTRUMENT 0x09 -#define UA20_TF_PRO_AUDIO 0x0A -#define UA20_TF_AV 0x0B -#define UA20_TF_CONTROL_PANEL 0x0C -#define UA20_TF_OTHER 0xFF - -#define UA20_CS_SAM_FREQ_CONTROL 0x01 -#define UA20_CS_CLOCK_VALID_CONTROL 0x02 - -#define UA20_TE_COPY_PROTECT_CONTROL 0x01 -#define UA20_TE_CONNECTOR_CONTROL 0x02 -#define UA20_TE_OVERLOAD_CONTROL 0x03 -#define UA20_TE_CLUSTER_CONTROL 0x04 -#define UA20_TE_UNDERFLOW_CONTROL 0x05 -#define UA20_TE_OVERFLOW_CONTROL 0x06 -#define UA20_TE_LATENCY_CONTROL 0x07 - -#define UA20_MU_MIXER_CONTROL 0x01 -#define UA20_MU_CLUSTER_CONTROL 0x02 -#define UA20_MU_UNDERFLOW_CONTROL 0x03 -#define UA20_MU_OVERFLOW_CONTROL 0x04 -#define UA20_MU_LATENCY_CONTROL 0x05 - -#define UA20_FMT_PCM (1U << 0) -#define UA20_FMT_PCM8 (1U << 1) -#define UA20_FMT_FLOAT (1U << 2) -#define UA20_FMT_ALAW (1U << 3) -#define UA20_FMT_MULAW (1U << 4) -#define UA20_FMT_RAW (1U << 31) - -#endif /* _UAUDIOREG_H_ */ + uByte bNrChannels; + uDWord bmChannelConfig; + uByte iChannelNames; +} __packed; + +#define UA20_TF_UNDEFINED 0x00 +#define UA20_TF_DESKTOP_SPEAKER 0x01 +#define UA20_TF_HOME_THEATER 0x02 +#define UA20_TF_MICROPHONE 0x03 +#define UA20_TF_HEADSET 0x04 +#define UA20_TF_TELEPHONE 0x05 +#define UA20_TF_CONVERTER 0x06 +#define UA20_TF_SOUND_RECORDER 0x07 +#define UA20_TF_IO_BOX 0x08 +#define UA20_TF_MUSICAL_INSTRUMENT 0x09 +#define UA20_TF_PRO_AUDIO 0x0A +#define UA20_TF_AV 0x0B +#define UA20_TF_CONTROL_PANEL 0x0C +#define UA20_TF_OTHER 0xFF + +#define UA20_CS_SAM_FREQ_CONTROL 0x01 +#define UA20_CS_CLOCK_VALID_CONTROL 0x02 + +#define UA20_TE_COPY_PROTECT_CONTROL 0x01 +#define UA20_TE_CONNECTOR_CONTROL 0x02 +#define UA20_TE_OVERLOAD_CONTROL 0x03 +#define UA20_TE_CLUSTER_CONTROL 0x04 +#define UA20_TE_UNDERFLOW_CONTROL 0x05 +#define UA20_TE_OVERFLOW_CONTROL 0x06 +#define UA20_TE_LATENCY_CONTROL 0x07 + +#define UA20_MU_MIXER_CONTROL 0x01 +#define UA20_MU_CLUSTER_CONTROL 0x02 +#define UA20_MU_UNDERFLOW_CONTROL 0x03 +#define UA20_MU_OVERFLOW_CONTROL 0x04 +#define UA20_MU_LATENCY_CONTROL 0x05 + +#define UA20_FMT_PCM (1U << 0) +#define UA20_FMT_PCM8 (1U << 1) +#define UA20_FMT_FLOAT (1U << 2) +#define UA20_FMT_ALAW (1U << 3) +#define UA20_FMT_MULAW (1U << 4) +#define UA20_FMT_RAW (1U << 31) + +#endif /* _UAUDIOREG_H_ */ Index: sys/dev/sound/version.h =================================================================== --- sys/dev/sound/version.h +++ sys/dev/sound/version.h @@ -37,6 +37,6 @@ * Last 2 decimal places reserved for daily versioning, starting * with 0. */ -#define SND_DRV_VERSION 2009061500 +#define SND_DRV_VERSION 2009061500 #endif /* !_SND_VERSION_H_ */