Index: Makefile =================================================================== --- Makefile +++ Makefile @@ -180,7 +180,7 @@ _TARGET_ARCH= ${TARGET:S/pc98/i386/:S/arm64/aarch64/} .elif !defined(TARGET) && defined(TARGET_ARCH) && \ ${TARGET_ARCH} != ${MACHINE_ARCH} -_TARGET= ${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/:C/aarch64/arm64/:C/powerpc64/powerpc/} +_TARGET= ${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/:C/aarch64/arm64/:C/powerpc64/powerpc/:C/riscv64/riscv/} .endif .if defined(TARGET) && !defined(_TARGET) _TARGET=${TARGET} @@ -347,13 +347,14 @@ # existing system is. # .if make(universe) || make(universe_kernels) || make(tinderbox) || make(targets) -TARGETS?=amd64 arm arm64 i386 mips pc98 powerpc sparc64 +TARGETS?=amd64 arm arm64 i386 mips pc98 powerpc riscv sparc64 _UNIVERSE_TARGETS= ${TARGETS} TARGET_ARCHES_arm?= arm armeb armv6 armv6hf TARGET_ARCHES_arm64?= aarch64 TARGET_ARCHES_mips?= mipsel mips mips64el mips64 mipsn32 TARGET_ARCHES_powerpc?= powerpc powerpc64 TARGET_ARCHES_pc98?= i386 +TARGET_ARCHES_riscv?= riscv64 .for target in ${TARGETS} TARGET_ARCHES_${target}?= ${target} .endfor Index: Makefile.inc1 =================================================================== --- Makefile.inc1 +++ Makefile.inc1 @@ -172,7 +172,11 @@ .export VERSION .endif -KNOWN_ARCHES?= aarch64/arm64 amd64 arm armeb/arm armv6/arm armv6hf/arm i386 i386/pc98 mips mipsel/mips mips64el/mips mips64/mips mipsn32el/mips mipsn32/mips powerpc powerpc64/powerpc sparc64 +KNOWN_ARCHES?= aarch64/arm64 amd64 arm armeb/arm armv6/arm armv6hf/arm \ + i386 i386/pc98 mips mipsel/mips mips64el/mips mips64/mips \ + mipsn32el/mips mipsn32/mips powerpc powerpc64/powerpc \ + riscv64/riscv sparc64 + .if ${TARGET} == ${TARGET_ARCH} _t= ${TARGET} .else Index: etc/etc.riscv/ttys =================================================================== --- /dev/null +++ etc/etc.riscv/ttys @@ -0,0 +1,51 @@ +# +# $FreeBSD$ +# @(#)ttys 5.1 (Berkeley) 4/17/89 +# +# This file specifies various information about terminals on the system. +# It is used by several different programs. Common entries for the +# various columns include: +# +# name The name of the terminal device. +# +# getty The program to start running on the terminal. Typically a +# getty program, as the name implies. Other common entries +# include none, when no getty is needed, and xdm, to start the +# X Window System. +# +# type The initial terminal type for this port. For hardwired +# terminal lines, this will contain the type of terminal used. +# For virtual consoles, the correct type is typically xterm. +# Other common values include dialup for incoming modem ports, and +# unknown when the terminal type cannot be predetermined. +# +# status Must be on or off. If on, init will run the getty program on +# the specified port. If the word "secure" appears, this tty +# allows root login. +# +# name getty type status comments +# +# If console is marked "insecure", then init will ask for the root password +# when going to single-user mode. +console none unknown off secure +# +ttyv0 "/usr/libexec/getty Pc" xterm onifconsole secure +# Virtual terminals +ttyv1 "/usr/libexec/getty Pc" xterm off secure +ttyv2 "/usr/libexec/getty Pc" xterm off secure +ttyv3 "/usr/libexec/getty Pc" xterm off secure +ttyv4 "/usr/libexec/getty Pc" xterm off secure +ttyv5 "/usr/libexec/getty Pc" xterm off secure +ttyv6 "/usr/libexec/getty Pc" xterm off secure +ttyv7 "/usr/libexec/getty Pc" xterm off secure +#ttyv8 "/usr/local/bin/xdm -nodaemon" xterm off secure +# Serial terminals +# The 'dialup' keyword identifies dialin lines to login, fingerd etc. +ttyu0 "/usr/libexec/getty 3wire" vt100 onifconsole secure +ttyu1 "/usr/libexec/getty 3wire" vt100 onifconsole secure +ttyu2 "/usr/libexec/getty 3wire" vt100 onifconsole secure +ttyu3 "/usr/libexec/getty 3wire" vt100 onifconsole secure +# Dumb console +dcons "/usr/libexec/getty std.9600" vt100 off secure +# RISC-V HTIF console +rcons "/usr/libexec/getty std.9600" vt100 onifconsole secure Index: lib/csu/riscv/Makefile =================================================================== --- /dev/null +++ lib/csu/riscv/Makefile @@ -0,0 +1,46 @@ +# $FreeBSD$ + +.PATH: ${.CURDIR}/../common + +SRCS= crt1.c crti.S crtn.S +OBJS= ${SRCS:N*.h:R:S/$/.o/g} +OBJS+= Scrt1.o gcrt1.o +CFLAGS+= -I${.CURDIR}/../common \ + -I${.CURDIR}/../../libc/include + +FILES= ${OBJS} +FILESMODE= ${LIBMODE} +FILESOWN= ${LIBOWN} +FILESGRP= ${LIBGRP} +FILESDIR= ${LIBDIR} +# These FILES qualify as libraries for the purpose of LIBRARIES_ONLY. +.undef LIBRARIES_ONLY + +CLEANFILES= ${OBJS} +CLEANFILES+= crt1.s gcrt1.s Scrt1.s + +# See the comment in lib/csu/common/crtbrand.c for the reason crt1.c is not +# directly compiled to .o files. + +crt1.s: crt1.c + ${CC} ${CFLAGS} -S -o ${.TARGET} ${.CURDIR}/crt1.c + sed ${SED_FIX_NOTE} ${.TARGET} + +crt1.o: crt1.s + ${CC} ${ACFLAGS} -c -o ${.TARGET} crt1.s + +gcrt1.s: crt1.c + ${CC} ${CFLAGS} -DGCRT -S -o ${.TARGET} ${.CURDIR}/crt1.c + sed ${SED_FIX_NOTE} ${.TARGET} + +gcrt1.o: gcrt1.s + ${CC} ${ACFLAGS} -c -o ${.TARGET} gcrt1.s + +Scrt1.s: crt1.c + ${CC} ${CFLAGS} -fPIC -DPIC -S -o ${.TARGET} ${.CURDIR}/crt1.c + sed ${SED_FIX_NOTE} ${.TARGET} + +Scrt1.o: Scrt1.s + ${CC} ${ACFLAGS} -c -o ${.TARGET} Scrt1.s + +.include Index: lib/csu/riscv/crt1.c =================================================================== --- /dev/null +++ lib/csu/riscv/crt1.c @@ -0,0 +1,89 @@ +/* LINTLIBRARY */ +/*- + * Copyright 1996-1998 John D. Polstra. + * Copyright (c) 2015 Ruslan Bukin + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include + +#include "libc_private.h" +#include "crtbrand.c" +#include "ignore_init.c" + +typedef void (*fptr)(void); + +#ifdef GCRT +extern void _mcleanup(void); +extern void monstartup(void *, void *); +extern int eprol; +extern int etext; +#endif + +void __start(int argc, char **argv, char **env, void (*cleanup)(void)); + +/* The entry function. */ +__asm(" .text \n" +" .align 0 \n" +" .globl _start \n" +" _start: \n" +" mv a3, a2 \n" /* cleanup */ +" addi a1, a0, 8 \n" /* get argv */ +" ld a0, 0(a0) \n" /* load argc */ +" slli t0, a0, 3 \n" /* mult by arg size */ +" add a2, a1, t0 \n" /* env is after argv */ +" addi a2, a2, 8 \n" /* argv is null terminated */ +" lla gp, _gp \n" /* load global pointer */ +" call __start"); + +void +__start(int argc, char **argv, char **env, void (*cleanup)(void)) +{ + + handle_argv(argc, argv, env); + + if (&_DYNAMIC != NULL) + atexit(cleanup); + else + _init_tls(); + +#ifdef GCRT + atexit(_mcleanup); + monstartup(&eprol, &etext); +__asm__("eprol:"); +#endif + + handle_static_init(argc, argv, env); + exit(main(argc, argv, env)); +} Index: lib/csu/riscv/crti.S =================================================================== --- /dev/null +++ lib/csu/riscv/crti.S @@ -0,0 +1,59 @@ +/*- + * Copyright 2001 David E. O'Brien + * Copyright (c) 2015 Ruslan Bukin + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +# this puts _gp into .dynsym, so symlook_obj can now find that (see reloc.c) + .weak _gp +_gp: + + .section .init,"ax",@progbits + .align 2 + .globl _init + .type _init,@function +_init: + addi sp, sp, -16 + sd ra, 0(sp) + + .section .fini,"ax",@progbits + .align 2 + .globl _fini + .type _fini,@function +_fini: + addi sp, sp, -16 + sd ra, 0(sp) + + .section .note.GNU-stack,"",%progbits Index: lib/csu/riscv/crtn.S =================================================================== --- /dev/null +++ lib/csu/riscv/crtn.S @@ -0,0 +1,49 @@ +/*- + * Copyright 2001 David E. O'Brien + * Copyright (c) 2015 Ruslan Bukin + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + + .section .init,"ax",@progbits + ld ra, 0(sp) + addi sp, sp, 16 + ret + + .section .fini,"ax",@progbits + ld ra, 0(sp) + addi sp, sp, 16 + ret + + .section .note.GNU-stack,"",%progbits Index: lib/libc/riscv/Makefile.inc =================================================================== --- /dev/null +++ lib/libc/riscv/Makefile.inc @@ -0,0 +1,9 @@ +# $FreeBSD$ +# +# Machine dependent definitions for the RISC-V architecture. +# + +# Long double is quad precision +GDTOASRCS+=strtorQ.c +MDSRCS+=machdep_ldisQ.c +SYM_MAPS+=${LIBC_SRCTOP}/riscv/Symbol.map Index: lib/libthr/arch/riscv/Makefile.inc =================================================================== --- /dev/null +++ lib/libthr/arch/riscv/Makefile.inc @@ -0,0 +1 @@ +# $FreeBSD$ Index: lib/msun/riscv/Makefile.inc =================================================================== --- /dev/null +++ lib/msun/riscv/Makefile.inc @@ -0,0 +1,6 @@ +# $FreeBSD$ + +# RISCVTODO: should be 113 +# compilation problems: gcc generates bltuz instruction, which is not exists + +LDBL_PREC = 53 Index: lib/msun/riscv/fenv.h =================================================================== --- /dev/null +++ lib/msun/riscv/fenv.h @@ -0,0 +1,235 @@ +/*- + * Copyright (c) 2004-2005 David Schultz + * Copyright (c) 2015 Ruslan Bukin + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _FENV_H_ +#define _FENV_H_ + +#include + +#ifndef __fenv_static +#define __fenv_static static +#endif + +typedef __uint64_t fenv_t; +typedef __uint64_t fexcept_t; + +/* Exception flags */ +#define FE_INVALID 0x0001 +#define FE_DIVBYZERO 0x0002 +#define FE_OVERFLOW 0x0004 +#define FE_UNDERFLOW 0x0008 +#define FE_INEXACT 0x0010 +#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ + FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW) + +/* + * RISC-V Rounding modes + */ +#define FE_TONEAREST 0x00 +#define FE_UPWARD 0x01 +#define FE_DOWNWARD 0x02 +#define FE_TOWARDZERO 0x03 + +#define FRM_SHIFT 5 +#define FRM_MASK (0x7 << FRM_SHIFT) +#define FRM_RNE 0 /* Round to Nearest, ties to Even */ +#define FRM_RTZ 1 /* Round towards Zero */ +#define FRM_RDN 2 /* Round Down (towards - infinum) */ +#define FRM_RUP 3 /* Round Up (towards + infinum) */ +#define FRM_RMM 4 /* Round to Nearest, ties to Max Magnitude */ +#define _ROUND_SHIFT 5 +#define _ROUND_MASK (0x7 << _ROUND_SHIFT) + +__BEGIN_DECLS + +/* Default floating-point environment */ +extern const fenv_t __fe_dfl_env; +#define FE_DFL_ENV (&__fe_dfl_env) + +/* We need to be able to map status flag positions to mask flag positions */ +#define _FPUSW_SHIFT 16 +#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT) + +#define __rfs(__fpsr) __asm __volatile("csrr %0, fcsr" : "=r" (*(__fpsr))) +#define __wfs(__fpsr) __asm __volatile("csrw fcsr, %0" :: "r" (__fpsr)) + +__fenv_static inline int +feclearexcept(int __excepts) +{ + fexcept_t __fpsr; + + __rfs(&__fpsr); + __fpsr &= ~__excepts; + __wfs(__fpsr); + return (0); +} + +__fenv_static inline int +fegetexceptflag(fexcept_t *__flagp, int __excepts) +{ + fexcept_t __fpsr; + + __rfs(&__fpsr); + *__flagp = __fpsr & __excepts; + return (0); +} + +__fenv_static inline int +fesetexceptflag(const fexcept_t *__flagp, int __excepts) +{ + fexcept_t __fpsr; + + __rfs(&__fpsr); + __fpsr &= ~__excepts; + __fpsr |= *__flagp & __excepts; + __wfs(__fpsr); + return (0); +} + +__fenv_static inline int +feraiseexcept(int __excepts) +{ + fexcept_t __ex = __excepts; + + fesetexceptflag(&__ex, __excepts); /* XXX */ + return (0); +} + +__fenv_static inline int +fetestexcept(int __excepts) +{ + fexcept_t __fpsr; + + __rfs(&__fpsr); + return (__fpsr & __excepts); +} + +__fenv_static inline int +fegetround(void) +{ + + return (-1); +} + +__fenv_static inline int +fesetround(int __round) +{ + + return (-1); +} + +__fenv_static inline int +fegetenv(fenv_t *__envp) +{ + + __rfs(__envp); + return (0); +} + +__fenv_static inline int +feholdexcept(fenv_t *__envp) +{ + fenv_t __env; + + __rfs(&__env); + *__envp = __env; + __env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); + __wfs(__env); + return (0); +} + +__fenv_static inline int +fesetenv(const fenv_t *__envp) +{ + + __wfs(*__envp); + return (0); +} + +__fenv_static inline int +feupdateenv(const fenv_t *__envp) +{ + fexcept_t __fpsr; + + __rfs(&__fpsr); + __wfs(*__envp); + feraiseexcept(__fpsr & FE_ALL_EXCEPT); + return (0); +} + +#if __BSD_VISIBLE + +/* We currently provide no external definitions of the functions below. */ + +static inline int +feenableexcept(int __mask) +{ + fenv_t __old_fpsr; + fenv_t __new_fpsr; + + __rfs(&__old_fpsr); + __new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT; + __wfs(__new_fpsr); + return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); +} + +static inline int +fedisableexcept(int __mask) +{ + fenv_t __old_fpsr; + fenv_t __new_fpsr; + + __rfs(&__old_fpsr); + __new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT); + __wfs(__new_fpsr); + return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT); +} + +static inline int +fegetexcept(void) +{ + fenv_t __fpsr; + + __rfs(&__fpsr); + return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT); +} + +#endif /* __BSD_VISIBLE */ + +__END_DECLS + +#endif /* !_FENV_H_ */ Index: share/mk/bsd.cpu.mk =================================================================== --- share/mk/bsd.cpu.mk +++ share/mk/bsd.cpu.mk @@ -18,6 +18,9 @@ MACHINE_CPU = mips . elif ${MACHINE_CPUARCH} == "powerpc" MACHINE_CPU = aim +. elif ${MACHINE_CPUARCH} == "riscv" +MACHINE_CPU = riscv +_CPUCFLAGS = -msoft-float . elif ${MACHINE_CPUARCH} == "sparc64" MACHINE_CPU = ultrasparc . endif @@ -143,6 +146,8 @@ # sb1, xlp, xlr _CPUCFLAGS = -march=${CPUTYPE:S/^mips//} . endif +. elif ${MACHINE_CPUARCH} == "riscv" +_CPUCFLAGS = -msoft-float # -march="RV64I" # RISCVTODO . elif ${MACHINE_ARCH} == "sparc64" . if ${CPUTYPE} == "v9" _CPUCFLAGS = -mcpu=v9 @@ -272,6 +277,9 @@ . if ${CPUTYPE} == "e500" MACHINE_CPU = booke softfp . endif +########## riscv +. elif ${MACHINE_CPUARCH} == "riscv" +MACHINE_CPU = riscv ########## sparc64 . elif ${MACHINE_ARCH} == "sparc64" . if ${CPUTYPE} == "v9" Index: share/mk/bsd.endian.mk =================================================================== --- share/mk/bsd.endian.mk +++ share/mk/bsd.endian.mk @@ -4,6 +4,7 @@ ${MACHINE_ARCH} == "amd64" || \ ${MACHINE_ARCH} == "i386" || \ (${MACHINE} == "arm" && ${MACHINE_ARCH:Marm*eb*} == "") || \ + ${MACHINE_ARCH} == "riscv64" || \ ${MACHINE_ARCH:Mmips*el} != "" TARGET_ENDIANNESS= 1234 .elif ${MACHINE_ARCH} == "powerpc" || \ Index: share/mk/bsd.sys.mk =================================================================== --- share/mk/bsd.sys.mk +++ share/mk/bsd.sys.mk @@ -109,6 +109,11 @@ CWARNFLAGS+= -Wno-format .endif # NO_WFORMAT || NO_WFORMAT.${COMPILER_TYPE} +# RISC-V / GCC 5.2.0 +.if ${MACHINE_CPUARCH} == "riscv" && ${COMPILER_TYPE} == "gcc" +CWARNFLAGS+= -Wno-error=unused-function -Wno-error=enum-compare -Wno-error=logical-not-parentheses -Wno-error=bool-compare -Wno-error=uninitialized -Wno-error=array-bounds -Wno-error=clobbered -Wno-error=cast-align -Wno-error=extra -Wno-error=attributes -Wno-error=inline -Wno-error=unused-but-set-variable -Wno-error=unused-value -Wno-error=strict-aliasing -Wno-error=address +.endif + # How to handle FreeBSD custom printf format specifiers. .if ${COMPILER_TYPE} == "clang" && ${COMPILER_VERSION} >= 30600 FORMAT_EXTENSIONS= -D__printf__=__freebsd_kprintf__ Index: share/mk/local.meta.sys.mk =================================================================== --- share/mk/local.meta.sys.mk +++ share/mk/local.meta.sys.mk @@ -48,13 +48,14 @@ TARGET_ARCHES_mips?= mipsel mips mips64el mips64 mipsn32 mipsn32el TARGET_ARCHES_powerpc?= powerpc powerpc64 TARGET_ARCHES_pc98?= i386 +TARGET_ARCHES_riscv?= riscv64 # some corner cases BOOT_MACHINE_DIR.amd64 = boot/i386 MACHINE_ARCH.host = ${_HOST_ARCH} # the list of machines we support -ALL_MACHINE_LIST?= amd64 arm arm64 i386 mips pc98 powerpc sparc64 +ALL_MACHINE_LIST?= amd64 arm arm64 i386 mips pc98 powerpc riscv sparc64 .for m in ${ALL_MACHINE_LIST:O:u} MACHINE_ARCH_LIST.$m?= ${TARGET_ARCHES_${m}:U$m} MACHINE_ARCH.$m?= ${MACHINE_ARCH_LIST.$m:[1]} Index: share/mk/src.opts.mk =================================================================== --- share/mk/src.opts.mk +++ share/mk/src.opts.mk @@ -229,12 +229,18 @@ __DEFAULT_NO_OPTIONS+=CLANG CLANG_BOOTSTRAP CLANG_FULL CLANG_IS_CC .endif # In-tree binutils/gcc are older versions without modern architecture support. -.if ${__T} == "aarch64" +.if ${__T} == "aarch64" || ${__T} == "riscv64" BROKEN_OPTIONS+=BINUTILS BINUTILS_BOOTSTRAP GCC GCC_BOOTSTRAP GDB __DEFAULT_YES_OPTIONS+=ELFCOPY_AS_OBJCOPY .else __DEFAULT_NO_OPTIONS+=ELFCOPY_AS_OBJCOPY .endif +.if ${__T} == "riscv64" +BROKEN_OPTIONS+=PROFILE # "sorry, unimplemented: profiler support for RISC-V" +BROKEN_OPTIONS+=TESTS # "undefined reference to `_Unwind_Resume'" +BROKEN_OPTIONS+=CXX # "contents.ms:38: macro error: KE without KS or KF" +BROKEN_OPTIONS+=RESCUE # "chio.lo: unknown executable format" +.endif # LLVM lacks support for FreeBSD 64-bit atomic operations for ARMv4/ARMv5 .if ${__T} == "arm" || ${__T} == "armeb" BROKEN_OPTIONS+=LLDB Index: share/mk/sys.mk =================================================================== --- share/mk/sys.mk +++ share/mk/sys.mk @@ -13,7 +13,7 @@ # and/or endian. This is called MACHINE_CPU in NetBSD, but that's used # for something different in FreeBSD. # -MACHINE_CPUARCH=${MACHINE_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/:C/powerpc64/powerpc/} +MACHINE_CPUARCH=${MACHINE_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/:C/powerpc64/powerpc/:C/riscv64/riscv/} .endif