Index: sys/arm/mv/armada38x/armada38x.c
===================================================================
--- sys/arm/mv/armada38x/armada38x.c
+++ sys/arm/mv/armada38x/armada38x.c
@@ -38,8 +38,9 @@
 #include <arm/mv/mvreg.h>
 #include <arm/mv/mvvar.h>
 
-int armada38x_win_set_iosync_barrier(void);
+int armada38x_open_bootrom_win(void);
 int armada38x_scu_enable(void);
+int armada38x_win_set_iosync_barrier(void);
 
 uint32_t
 get_tclk(void)
@@ -81,6 +82,39 @@
 }
 
 int
+armada38x_open_bootrom_win(void)
+{
+	bus_space_handle_t vaddr_iowind;
+	uint32_t val;
+	int rv;
+
+	rv = bus_space_map(fdtbus_bs_tag, (bus_addr_t)MV_MBUS_BRIDGE_BASE,
+	    MV_CPU_SUBSYS_REGS_LEN, 0, &vaddr_iowind);
+	if (rv != 0)
+		return (rv);
+
+	val = (MV_BOOTROM_WIN_SIZE & IO_WIN_SIZE_MASK) << IO_WIN_SIZE_SHIFT;
+	val |= (MBUS_BOOTROM_ATTR & IO_WIN_ATTR_MASK) << IO_WIN_ATTR_SHIFT;
+	val |= (MBUS_BOOTROM_TGT_ID & IO_WIN_TGT_MASK) << IO_WIN_TGT_SHIFT;
+	/* Enable window and Sync Barrier */
+	val |= (0x1 & IO_WIN_SYNC_MASK) << IO_WIN_SYNC_SHIFT;
+	val |= (0x1 & IO_WIN_ENA_MASK) << IO_WIN_ENA_SHIFT;
+
+	/* Configure IO Window Control Register */
+	bus_space_write_4(fdtbus_bs_tag, vaddr_iowind, IO_WIN_9_CTRL_OFFSET,
+	    val);
+	/* Configure IO Window Base Register */
+	bus_space_write_4(fdtbus_bs_tag, vaddr_iowind, IO_WIN_9_BASE_OFFSET,
+	    MV_BOOTROM_MEM_ADDR);
+
+	bus_space_barrier(fdtbus_bs_tag, vaddr_iowind, 0, MV_CPU_SUBSYS_REGS_LEN,
+	    BUS_SPACE_BARRIER_WRITE);
+	bus_space_unmap(fdtbus_bs_tag, vaddr_iowind, MV_CPU_SUBSYS_REGS_LEN);
+
+	return (rv);
+}
+
+int
 armada38x_scu_enable(void)
 {
 	bus_space_handle_t vaddr_scu;
Index: sys/arm/mv/mv_machdep.c
===================================================================
--- sys/arm/mv/mv_machdep.c
+++ sys/arm/mv/mv_machdep.c
@@ -69,6 +69,7 @@
 #if defined(SOC_MV_ARMADA38X)
 int armada38x_win_set_iosync_barrier(void);
 int armada38x_scu_enable(void);
+int armada38x_open_bootrom_win(void);
 #endif
 
 #define MPP_PIN_MAX		68
@@ -260,6 +261,11 @@
 		printf("WARNING: could not map CPU Subsystem registers\n");
 	if (armada38x_scu_enable() != 0)
 		printf("WARNING: could not enable SCU\n");
+#ifdef SMP
+	/* Open window to bootROM memory - needed for SMP */
+	if (armada38x_open_bootrom_win() != 0)
+		printf("WARNING: could not open window to bootROM\n");
+#endif
 #endif
 }
 
Index: sys/arm/mv/mvwin.h
===================================================================
--- sys/arm/mv/mvwin.h
+++ sys/arm/mv/mvwin.h
@@ -316,6 +316,25 @@
 #define	MV_BOOTROM_WIN_SIZE	0xF
 #define	MV_CPU_SUBSYS_REGS_LEN	0x100
 
+/* IO Window Control Register fields */
+#define	IO_WIN_SIZE_SHIFT	16
+#define	IO_WIN_SIZE_MASK	0xFFFF
+#define	IO_WIN_ATTR_SHIFT	8
+#define	IO_WIN_ATTR_MASK	0xFF
+#define	IO_WIN_TGT_SHIFT	4
+#define	IO_WIN_TGT_MASK		0xF
+#define	IO_WIN_SYNC_SHIFT	1
+#define	IO_WIN_SYNC_MASK	0x1
+#define	IO_WIN_ENA_SHIFT	0
+#define	IO_WIN_ENA_MASK		0x1
+
+#define	IO_WIN_9_CTRL_OFFSET	0x98
+#define	IO_WIN_9_BASE_OFFSET	0x9C
+
+/* Mbus decoding unit IDs and attributes */
+#define	MBUS_BOOTROM_TGT_ID	0x1
+#define	MBUS_BOOTROM_ATTR	0x1D
+
 /* Internal Units Sync Barrier Control Register */
 #define	MV_SYNC_BARRIER_CTRL		0x84
 #define	MV_SYNC_BARRIER_CTRL_ALL	0xFFFF