Index: sys/arm/mv/mv_pci.c =================================================================== --- sys/arm/mv/mv_pci.c +++ sys/arm/mv/mv_pci.c @@ -1,7 +1,7 @@ /*- * Copyright (c) 2008 MARVELL INTERNATIONAL LTD. * Copyright (c) 2010 The FreeBSD Foundation - * Copyright (c) 2010-2012 Semihalf + * Copyright (c) 2010-2015 Semihalf * All rights reserved. * * Developed by Semihalf. @@ -1016,6 +1016,25 @@ return ((sc->sc_type != MV_TYPE_PCI) ? 1 : PCI_SLOTMAX); } +static int +mv_pcib_root_slot(device_t dev, u_int bus, u_int slot, u_int func) +{ +#if defined(SOC_MV_ARMADA38X) + struct mv_pcib_softc *sc = device_get_softc(dev); + uint32_t vendor, device; + + vendor = mv_pcib_hw_cfgread(sc, bus, slot, func, PCIR_VENDOR, + PCIR_VENDOR_LENGTH); + device = mv_pcib_hw_cfgread(sc, bus, slot, func, PCIR_DEVICE, + PCIR_DEVICE_LENGTH) & MV_DEV_FAMILY_MASK; + + return (vendor == PCI_VENDORID_MRVL && device == MV_DEV_ARMADA38X); +#endif + + /* On platforms other than Armada38x, root link is always at slot 0 */ + return (slot == 0); +} + static uint32_t mv_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, int bytes) @@ -1024,7 +1043,7 @@ /* Return ~0 if link is inactive or trying to read from Root */ if ((bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_STATUS) & - PCIE_STATUS_LINK_DOWN) || (slot == 0)) + PCIE_STATUS_LINK_DOWN) || mv_pcib_root_slot(dev, bus, slot, func)) return (~0U); return (mv_pcib_hw_cfgread(sc, bus, slot, func, reg, bytes)); @@ -1038,7 +1057,7 @@ /* Return if link is inactive or trying to write to Root */ if ((bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_STATUS) & - PCIE_STATUS_LINK_DOWN) || (slot == 0)) + PCIE_STATUS_LINK_DOWN) || mv_pcib_root_slot(dev, bus, slot, func)) return; mv_pcib_hw_cfgwrite(sc, bus, slot, func, reg, val, bytes); Index: sys/arm/mv/mvreg.h =================================================================== --- sys/arm/mv/mvreg.h +++ sys/arm/mv/mvreg.h @@ -438,6 +438,7 @@ #define MV_DEV_FAMILY_MASK 0xff00 #define MV_DEV_DISCOVERY 0x7800 +#define MV_DEV_ARMADA38X 0x6800 /* * Doorbell register control Index: sys/dev/pci/pcireg.h =================================================================== --- sys/dev/pci/pcireg.h +++ sys/dev/pci/pcireg.h @@ -690,6 +690,9 @@ #define PCIR_VENDOR_LENGTH 0x2 #define PCIR_VENDOR_DATA 0x3 +/* PCI Device capability definitions */ +#define PCIR_DEVICE_LENGTH 0x2 + /* PCI EHCI Debug Port definitions */ #define PCIR_DEBUG_PORT 0x2 #define PCIM_DEBUG_PORT_OFFSET 0x1FFF