diff --git a/sys/arm64/arm64/cpufunc_asm.S b/sys/arm64/arm64/cpufunc_asm.S
--- a/sys/arm64/arm64/cpufunc_asm.S
+++ b/sys/arm64/arm64/cpufunc_asm.S
@@ -52,11 +52,12 @@
  */
 .macro cache_handle_range dcop = 0, ic = 0, icop = 0
 .if \ic == 0
-	ldr	x3, =dcache_line_size	/* Load the D cache line size */
+	adrp	x3, dcache_line_size	/* Load the D cache line size */
+	ldr	x3, [x3, :lo12:dcache_line_size]
 .else
-	ldr	x3, =idcache_line_size	/* Load the I & D cache line size */
+	adrp	x3, idcache_line_size	/* Load the I & D cache line size */
+	ldr	x3, [x3, :lo12:idcache_line_size]
 .endif
-	ldr	x3, [x3]
 	sub	x4, x3, #1		/* Get the address mask */
 	and	x2, x0, x4		/* Get the low bits of the address */
 	add	x1, x1, x2		/* Add these to the size */
diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S
--- a/sys/arm64/arm64/locore.S
+++ b/sys/arm64/arm64/locore.S
@@ -227,8 +227,8 @@
 	BTI_J
 
 	/* Start using the AP boot stack */
-	ldr	x4, =bootstack
-	ldr	x4, [x4]
+	adrp	x4, bootstack
+	ldr	x4, [x4, :lo12:bootstack]
 	mov	sp, x4
 
 #if defined(PERTHREAD_SSP)
diff --git a/sys/arm64/arm64/support.S b/sys/arm64/arm64/support.S
--- a/sys/arm64/arm64/support.S
+++ b/sys/arm64/arm64/support.S
@@ -376,8 +376,8 @@
 ENTRY(pagezero_cache)
 	add	x1, x0, #PAGE_SIZE
 
-	ldr	x2, =dczva_line_size
-	ldr	x2, [x2]
+	adrp	x2, dczva_line_size
+	ldr	x2, [x2, :lo12:dczva_line_size]
 
 1:
 	dc	zva, x0