diff --git a/sys/x86/acpica/madt.c b/sys/x86/acpica/madt.c
--- a/sys/x86/acpica/madt.c
+++ b/sys/x86/acpica/madt.c
@@ -221,7 +221,10 @@
 		else if (bootverbose)
 			printf("x2APIC available but disabled %s\n", reason);
 		user_x2apic = x2apic_mode;
+#ifndef BURN_BRIDGES
 		TUNABLE_INT_FETCH("hw.x2apic_enable", &user_x2apic);
+#endif
+		TUNABLE_INT_FETCH("hw.apic.x2apic_mode", &user_x2apic);
 		if (user_x2apic != x2apic_mode) {
 			if (bios_x2apic && !user_x2apic)
 				printf("x2APIC disabled by tunable and "
diff --git a/sys/x86/iommu/intel_drv.c b/sys/x86/iommu/intel_drv.c
--- a/sys/x86/iommu/intel_drv.c
+++ b/sys/x86/iommu/intel_drv.c
@@ -429,7 +429,10 @@
 	dmar_quirks_post_ident(unit);
 
 	timeout = dmar_get_timeout();
+#ifndef BURN_BRIDGES
 	TUNABLE_UINT64_FETCH("hw.dmar.timeout", &timeout);
+#endif
+	TUNABLE_UINT64_FETCH("hw.iommu.dmar.timeout", &timeout);
 	dmar_update_timeout(timeout);
 
 	for (i = 0; i < DMAR_INTR_TOTAL; i++)
diff --git a/sys/x86/iommu/intel_utils.c b/sys/x86/iommu/intel_utils.c
--- a/sys/x86/iommu/intel_utils.c
+++ b/sys/x86/iommu/intel_utils.c
@@ -696,6 +696,6 @@
     &dmar_batch_coalesce, 0,
     "Number of qi batches between interrupt");
 SYSCTL_PROC(_hw_iommu_dmar, OID_AUTO, timeout,
-    CTLTYPE_U64 | CTLFLAG_RW | CTLFLAG_MPSAFE, 0, 0,
+    CTLTYPE_U64 | CTLFLAG_RWTUN | CTLFLAG_NOFETCH | CTLFLAG_MPSAFE, 0, 0,
     dmar_timeout_sysctl, "QU",
     "Timeout for command wait, in nanoseconds");
diff --git a/sys/x86/x86/local_apic.c b/sys/x86/x86/local_apic.c
--- a/sys/x86/x86/local_apic.c
+++ b/sys/x86/x86/local_apic.c
@@ -209,10 +209,12 @@
 
 SYSCTL_NODE(_hw, OID_AUTO, apic, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
     "APIC options");
-SYSCTL_INT(_hw_apic, OID_AUTO, x2apic_mode, CTLFLAG_RD, &x2apic_mode, 0, "");
-SYSCTL_INT(_hw_apic, OID_AUTO, eoi_suppression, CTLFLAG_RD,
+SYSCTL_INT(_hw_apic, OID_AUTO, x2apic_mode, CTLFLAG_RDTUN | CTLFLAG_NOFETCH,
+    &x2apic_mode, 0, "");
+SYSCTL_INT(_hw_apic, OID_AUTO, eoi_suppression, CTLFLAG_RDTUN | CTLFLAG_NOFETCH,
     &lapic_eoi_suppression, 0, "");
-SYSCTL_INT(_hw_apic, OID_AUTO, timer_tsc_deadline, CTLFLAG_RD,
+SYSCTL_INT(_hw_apic, OID_AUTO, timer_tsc_deadline,
+    CTLFLAG_RDTUN | CTLFLAG_NOFETCH,
     &lapic_timer_tsc_deadline, 0, "");
 #ifdef SMP
 SYSCTL_INT(_hw_apic, OID_AUTO, ds_idle_timeout, CTLFLAG_RWTUN,
@@ -493,8 +495,12 @@
 		    (cpu_feature2 & CPUID2_TSCDLT) != 0 &&
 		    tsc_is_invariant && tsc_freq != 0) {
 			lapic_timer_tsc_deadline = 1;
+#ifndef BURN_BRIDGES
 			TUNABLE_INT_FETCH("hw.lapic_tsc_deadline",
 			    &lapic_timer_tsc_deadline);
+#endif
+			TUNABLE_INT_FETCH("hw.apic.timer_tsc_deadline",
+			    &lapic_timer_tsc_deadline);
 		}
 
 		lapic_et.et_frequency = 0;
@@ -526,8 +532,12 @@
 		       "KVM -- disabling lapic eoi suppression\n");
 			lapic_eoi_suppression = 0;
 		}
+#ifndef BURN_BRIDGES
 		TUNABLE_INT_FETCH("hw.lapic_eoi_suppression",
 		    &lapic_eoi_suppression);
+#endif
+		TUNABLE_INT_FETCH("hw.apic.eoi_suppression",
+		    &lapic_eoi_suppression);
 	}
 
 #ifdef SMP