Index: sys/arm/arm/gic.c
===================================================================
--- sys/arm/arm/gic.c
+++ sys/arm/arm/gic.c
@@ -115,6 +115,8 @@
 #define	GIC_DEFAULT_ICFGR_INIT	0x00000000
 #endif
 
+#define	GIC_FDT_TRIGGER_MASK	0x03
+
 #ifdef ARM_INTRNG
 static u_int gic_irq_cpu;
 static int arm_gic_intr(void *);
@@ -331,15 +333,17 @@
 		 *   2 = high-to-low edge triggered
 		 *   4 = active high level-sensitive
 		 *   8 = active low level-sensitive
-		 * The hardware only supports active-high-level or rising-edge.
+		 * The hardware only supports active-high-level or rising-edge
+		 * for SPIs
 		 */
-		if (fdt32_to_cpu(intr[2]) & 0x0a) {
+		if (*interrupt >= GIC_FIRST_SPI && fdt32_to_cpu(intr[2])
+		    & 0x0a) {
 			printf("unsupported trigger/polarity configuration "
 			    "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
 			return (ENOTSUP);
 		}
 		*pol  = INTR_POLARITY_CONFORM;
-		if (fdt32_to_cpu(intr[2]) & 0x01)
+		if (fdt32_to_cpu(intr[2]) & GIC_FDT_TRIGGER_MASK)
 			*trig = INTR_TRIGGER_EDGE;
 		else
 			*trig = INTR_TRIGGER_LEVEL;