diff --git a/usr.sbin/bhyve/pci_emul.c b/usr.sbin/bhyve/pci_emul.c --- a/usr.sbin/bhyve/pci_emul.c +++ b/usr.sbin/bhyve/pci_emul.c @@ -130,20 +130,31 @@ static TAILQ_HEAD(boot_list, boot_device) boot_devices = TAILQ_HEAD_INITIALIZER( boot_devices); +#if defined(__amd64__) #define PCI_EMUL_IOBASE 0x2000 #define PCI_EMUL_IOLIMIT 0x10000 +#define PCI_EMUL_IOMASK 0xffff +/* + * OVMF always uses 0xc0000000 as base address for 32 bit PCI MMIO. Don't + * change this address without changing it in OVMF. + */ +#define PCI_EMUL_MEMBASE32 0xc0000000 +#elif defined(__aarch64__) +#define PCI_EMUL_IOBASE 0x00df00000UL +#define PCI_EMUL_IOLIMIT 0x100000000UL +#define PCI_EMUL_MEMBASE32 0x0a0000000UL +#else +#error Unsupported platform +#endif -#define PCI_EMUL_ROMSIZE 0x10000000 +#define PCI_EMUL_ROMSIZE 0x10000000 #define PCI_EMUL_ECFG_BASE 0xE0000000 /* 3.5GB */ #define PCI_EMUL_ECFG_SIZE (MAXBUSES * 1024 * 1024) /* 1MB per bus */ +#ifdef __amd64__ SYSRES_MEM(PCI_EMUL_ECFG_BASE, PCI_EMUL_ECFG_SIZE); +#endif -/* - * OVMF always uses 0xC0000000 as base address for 32 bit PCI MMIO. Don't - * change this address without changing it in OVMF. - */ -#define PCI_EMUL_MEMBASE32 0xC0000000 #define PCI_EMUL_MEMLIMIT32 PCI_EMUL_ECFG_BASE #define PCI_EMUL_MEMSIZE64 (32*GB) @@ -1636,7 +1647,7 @@ } /* - * The guest physical memory map looks like the following: + * The guest physical memory map looks like the following on amd64: * [0, lowmem) guest system memory * [lowmem, 0xC0000000) memory hole (may be absent) * [0xC0000000, 0xE0000000) PCI hole (32-bit BAR allocation) @@ -1751,6 +1762,7 @@ dsdt_line(" 0x0001, // Length"); dsdt_line(" ,, )"); +#ifdef __amd64__ if (bus == 0) { dsdt_indent(3); dsdt_fixed_ioport(0xCF8, 8); @@ -1781,8 +1793,10 @@ goto done; } } +#endif assert(bi != NULL); +#ifdef __amd64__ /* i/o window */ dsdt_line(" WordIO (ResourceProducer, MinFixed, MaxFixed, " "PosDecode, EntireRange,"); @@ -1794,6 +1808,7 @@ dsdt_line(" 0x%04X, // Length", bi->iolimit - bi->iobase); dsdt_line(" ,, , TypeStatic)"); +#endif /* mmio window (32-bit) */ dsdt_line(" DWordMemory (ResourceProducer, PosDecode, " @@ -1856,7 +1871,9 @@ } } dsdt_unindent(2); +#ifdef __amd64__ done: +#endif dsdt_line(" }"); } @@ -2338,7 +2355,9 @@ break; case PCIBAR_IO: addr = *valp & mask; - addr &= 0xffff; +#if defined(PCI_EMUL_IOMASK) + addr &= PCI_EMUL_IOMASK; +#endif bar = addr | pi->pi_bar[idx].lobits; /* * Register the new BAR value for interception