Index: share/mk/bsd.cpu.mk
===================================================================
--- share/mk/bsd.cpu.mk
+++ share/mk/bsd.cpu.mk
@@ -122,18 +122,18 @@
 . elif ${MACHINE_ARCH} == "powerpc64"
 _CPUCFLAGS = -mcpu=${CPUTYPE}
 . elif ${MACHINE_CPUARCH} == "mips"
-.  if ${CPUTYPE} == "mips32"
-_CPUCFLAGS = -march=mips32
-.  elif ${CPUTYPE} == "mips32r2"
-_CPUCFLAGS = -march=mips32r2
-.  elif ${CPUTYPE} == "mips64"
-_CPUCFLAGS = -march=mips64
-.  elif ${CPUTYPE} == "mips64r2"
-_CPUCFLAGS = -march=mips64r2
-.  elif ${CPUTYPE} == "mips4kc"
-_CPUCFLAGS = -march=4kc
-.  elif ${CPUTYPE} == "mips24kc"
-_CPUCFLAGS = -march=24kc
+# mips[1234], mips32, mips64, and all later releases need to have mips
+# preserved (releases later than r2 require external toolchain)
+.  if ${CPUTYPE:Mmips32*} != "" || ${CPUTYPE:Mmips64*} != "" || \
+	${CPUTYPE:Mmips[1234]} != ""
+_CPUCFLAGS = -march=${CPUTYPE}
+. else
+# Default -march to the CPUTYPE passed in, with mips stripped off so we
+# accept either mips4kc or 4kc, mostly for historical reasons
+# Typical values for cores:
+#	4kc, 24kc, 34kc, 74kc, 1004kc, octeon, octeon+, octeon2, octeon3,
+#	sb1, xlp, xlr
+_CPUCFLAGS = -march=${CPUTYPE:S/^mips//}
 .  endif
 . elif ${MACHINE_ARCH} == "sparc64"
 .  if ${CPUTYPE} == "v9"
@@ -254,6 +254,9 @@
 MACHINE_CPU = sse3
 .  endif
 MACHINE_CPU += amd64 sse2 sse mmx
+########## Mips
+. elif ${MACHINE_CPUARCH} == "mips"
+MACHINE_CPU = mips
 ########## powerpc
 . elif ${MACHINE_ARCH} == "powerpc"
 .  if ${CPUTYPE} == "e500"
@@ -271,9 +274,34 @@
 . endif
 .endif
 
-.if ${MACHINE_CPUARCH} == "mips"
+# All the special-case hacks for robust external toolchain support
+. if ${MACHINE_CPUARCH} == "mips"
+# always add -G0
 CFLAGS += -G0
-.endif
+# Get endian right in case the default isn't correct
+.  if ${MACHINE_ARCH:M*el} != ""
+_ABI_CFLAGS += -EL
+.  else
+_ABI_CFLAGS += -EB
+.  endif
+# Get ABI right in case the default is wrong
+.  if ${MACHINE_ARCH} == "mips" || ${MACHINE_ARCH} == "mipsel"
+_ABI_CFLAGS += -mabi=32
+.  elif ${MACHINE_ARCH} == "mipsn32"
+_ABI_CFLAGS += -mabi=n32
+.  else
+_ABI_CFLAGS += -mabi=64
+.  endif
+# Get the default ISA correct. Kinda trick to pull off, hope this hueristic
+# works out: specify it when no CPUTYPE is specified
+.  if !defined(CPUTYPE) || empty(CPUTYPE)
+.   if ${MACHINE_ARCH:Mmips64*} || ${MACHINE_ARCH} == "mipsn32"
+_ABI_CFLAGS += -march=mips64
+.   else
+_ABI_CFLAGS += -march=mips3
+.   endif
+.  endif
+. endif
 
 ########## arm
 .if ${MACHINE_CPUARCH} == "arm"
@@ -288,10 +316,16 @@
 . if ${MACHINE_ARCH:Marmv6*} == ""
 MACHINE_CPU += softfp
 . endif
+# Get endian right for external toolchains
+.if ${MACHINE_ARCH} == "armeb"
+_ABI_CFLAGS += -mbig-endian
+.else
+_ABI_CFLAGS += -mlittle-endian
+.endif
 .if ${MACHINE_ARCH} == "armv6"
 # Needs to be CFLAGS not _CPUCFLAGS because it's needed for the ABI
 # not a nice optimization.
-CFLAGS += -mfloat-abi=softfp
+_ABI_CFLAGS += -mfloat-abi=softfp
 .endif
 .endif
 
@@ -300,6 +334,8 @@
 .if !defined(NO_CPU_CFLAGS)
 CFLAGS += ${_CPUCFLAGS}
 .endif
+CFLAGS += ${_ABI_CFLAGS}
+ACFLAGS+= ${_ABI_CFLAGS}
 
 #
 # Prohibit the compiler from emitting SIMD instructions.
Index: sys/conf/kern.pre.mk
===================================================================
--- sys/conf/kern.pre.mk
+++ sys/conf/kern.pre.mk
@@ -60,6 +60,7 @@
 .if !defined(NO_CPU_COPTFLAGS)
 COPTFLAGS+= ${_CPUCFLAGS}
 .endif
+COPTFLAGS+= ${_ABI_CFLAGS}
 NOSTDINC= -nostdinc
 
 INCLUDES= ${NOSTDINC} ${INCLMAGIC} -I. -I$S
@@ -87,7 +88,7 @@
 
 .endif
 
-CFLAGS=	${COPTFLAGS} ${DEBUG}
+CFLAGS= ${COPTFLAGS} ${DEBUG}
 CFLAGS+= ${INCLUDES} -D_KERNEL -DHAVE_KERNEL_OPTION_HEADERS -include opt_global.h
 CFLAGS_PARAM_INLINE_UNIT_GROWTH?=100
 CFLAGS_PARAM_LARGE_FUNCTION_GROWTH?=1000
@@ -157,15 +158,15 @@
 .endif
 DTRACE_CFLAGS+=	-I$S/cddl/contrib/opensolaris/common/util -I$S -DDIS_MEM -DSMP
 DTRACE_ASM_CFLAGS=	-x assembler-with-cpp -DLOCORE ${DTRACE_CFLAGS}
-DTRACE_C=	${CC} -c ${DTRACE_CFLAGS} ${CDDL_CFLAGS}	${WERROR} ${PROF} ${.IMPSRC}
-DTRACE_S=	${CC} -c ${DTRACE_ASM_CFLAGS} ${CDDL_CFLAGS}	${WERROR} ${.IMPSRC}
+DTRACE_C=	${CC} -c ${DTRACE_CFLAGS} 	${WERROR} ${PROF} ${.IMPSRC}
+DTRACE_S=	${CC} -c ${DTRACE_ASM_CFLAGS}	${WERROR} ${.IMPSRC}
 
 # Special flags for managing the compat compiles for DTrace/FBT
 FBT_CFLAGS=	-DBUILDING_DTRACE -nostdinc -I$S/cddl/dev/fbt/${MACHINE_CPUARCH} -I$S/cddl/dev/fbt -I$S/cddl/compat/opensolaris -I$S/cddl/contrib/opensolaris/uts/common -I$S ${CDDL_CFLAGS}
 .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
 FBT_CFLAGS+=	-I$S/cddl/dev/fbt/x86
 .endif
-FBT_C=		${CC} -c ${FBT_CFLAGS} ${CDDL_CFLAGS}		${WERROR} ${PROF} ${.IMPSRC}
+FBT_C=		${CC} -c ${FBT_CFLAGS}		${WERROR} ${PROF} ${.IMPSRC}
 
 .if ${MK_CTF} != "no"
 NORMAL_CTFCONVERT=	${CTFCONVERT} ${CTFFLAGS} ${.TARGET}