diff --git a/sys/dev/hwpmc/hwpmc_amd.h b/sys/dev/hwpmc/hwpmc_amd.h
--- a/sys/dev/hwpmc/hwpmc_amd.h
+++ b/sys/dev/hwpmc/hwpmc_amd.h
@@ -35,22 +35,22 @@
 
 /* AMD K8 PMCs */
 
-#define	AMD_PMC_EVSEL_0		0xC0010000
-#define	AMD_PMC_EVSEL_1		0xC0010001
-#define	AMD_PMC_EVSEL_2		0xC0010002
-#define	AMD_PMC_EVSEL_3		0xC0010003
-
-#define	AMD_PMC_PERFCTR_0	0xC0010004
-#define	AMD_PMC_PERFCTR_1	0xC0010005
-#define	AMD_PMC_PERFCTR_2	0xC0010006
-#define	AMD_PMC_PERFCTR_3	0xC0010007
 /* CORE */
+#define	AMD_PMC_EVSEL_0		0xC0010200
+#define	AMD_PMC_EVSEL_1		0xC0010202
+#define	AMD_PMC_EVSEL_2		0xC0010204
+#define	AMD_PMC_EVSEL_3		0xC0010206
 #define	AMD_PMC_EVSEL_4		0xC0010208
 #define	AMD_PMC_EVSEL_5		0xC001020A
 
+#define	AMD_PMC_PERFCTR_0	0xC0010201
+#define	AMD_PMC_PERFCTR_1	0xC0010203
+#define	AMD_PMC_PERFCTR_2	0xC0010205
+#define	AMD_PMC_PERFCTR_3	0xC0010207
 #define	AMD_PMC_PERFCTR_4	0xC0010209
 #define	AMD_PMC_PERFCTR_5	0xC001020B
-/* L3 */
+
+/* L2 / L3 cache */
 #define	AMD_PMC_EVSEL_EP_L3_0	0xC0010230
 #define	AMD_PMC_EVSEL_EP_L3_1	0xC0010232
 #define	AMD_PMC_EVSEL_EP_L3_2	0xC0010234
@@ -64,7 +64,8 @@
 #define	AMD_PMC_PERFCTR_EP_L3_3	0xC0010237
 #define	AMD_PMC_PERFCTR_EP_L3_4	0xC0010239
 #define	AMD_PMC_PERFCTR_EP_L3_5	0xC001023B
-/* DF */
+
+/* NorthBridge / Data Fabric */
 #define	AMD_PMC_EVSEL_EP_DF_0	0xC0010240
 #define	AMD_PMC_EVSEL_EP_DF_1	0xC0010242
 #define	AMD_PMC_EVSEL_EP_DF_2	0xC0010244
@@ -75,8 +76,10 @@
 #define	AMD_PMC_PERFCTR_EP_DF_2	0xC0010245
 #define	AMD_PMC_PERFCTR_EP_DF_3	0xC0010247
 
-#define	AMD_NPMCS		16
 #define	AMD_CORE_NPMCS		6
+#define	AMD_L3_NPMCS		6
+#define	AMD_DF_NPMCS		4
+#define	AMD_NPMCS		(AMD_CORE_NPMCS + AMD_L3_NPMCS + AMD_DF_NPMCS)
 
 
 #define	AMD_PMC_COUNTERMASK	0xFF000000