diff --git a/sys/dev/intel/spi.h b/sys/dev/intel/spi.h
--- a/sys/dev/intel/spi.h
+++ b/sys/dev/intel/spi.h
@@ -41,38 +41,10 @@
 	SPI_SUNRISEPOINT,
 };
 
-/* Same order as intelspi_vers */
-static const struct intelspi_info {
-	const char *desc;
-	uint32_t reg_lpss_base;
-	uint32_t reg_cs_ctrl;
-} intelspi_infos[] = {
-	[SPI_BAYTRAIL] = {
-		.desc = "Intel Bay Trail SPI Controller",
-		.reg_lpss_base = 0x400,
-		.reg_cs_ctrl = 0x18,
-	},
-	[SPI_BRASWELL] = {
-		.desc = "Intel Braswell SPI Controller",
-		.reg_lpss_base = 0x400,
-		.reg_cs_ctrl = 0x18,
-	},
-	[SPI_LYNXPOINT] = {
-		.desc = "Intel Lynx Point / Wildcat Point SPI Controller",
-		.reg_lpss_base = 0x800,
-		.reg_cs_ctrl = 0x18,
-	},
-	[SPI_SUNRISEPOINT] = {
-		.desc = "Intel Sunrise Point SPI Controller",
-		.reg_lpss_base = 0x200,
-		.reg_cs_ctrl = 0x24,
-	},
-};
-
 struct intelspi_softc {
 	ACPI_HANDLE		sc_handle;
 	device_t		sc_dev;
-	enum intelspi_vers sc_vers;
+	enum intelspi_vers	sc_vers;
 	struct mtx		sc_mtx;
 	int			sc_mem_rid;
 	struct resource		*sc_mem_res;
diff --git a/sys/dev/intel/spi.c b/sys/dev/intel/spi.c
--- a/sys/dev/intel/spi.c
+++ b/sys/dev/intel/spi.c
@@ -109,6 +109,29 @@
 #define	 SPI_CS_CTRL_HW_MODE			(1 << 0)
 #define	 SPI_CS_CTRL_CS_HIGH			(1 << 1)
 
+/* Same order as intelspi_vers */
+static const struct intelspi_info {
+	uint32_t reg_lpss_base;
+	uint32_t reg_cs_ctrl;
+} intelspi_infos[] = {
+	[SPI_BAYTRAIL] = {
+		.reg_lpss_base = 0x400,
+		.reg_cs_ctrl = 0x18,
+	},
+	[SPI_BRASWELL] = {
+		.reg_lpss_base = 0x400,
+		.reg_cs_ctrl = 0x18,
+	},
+	[SPI_LYNXPOINT] = {
+		.reg_lpss_base = 0x800,
+		.reg_cs_ctrl = 0x18,
+	},
+	[SPI_SUNRISEPOINT] = {
+		.reg_lpss_base = 0x200,
+		.reg_cs_ctrl = 0x24,
+	},
+};
+
 static void	intelspi_intr(void *);
 
 static int
diff --git a/sys/dev/intel/spi_acpi.c b/sys/dev/intel/spi_acpi.c
--- a/sys/dev/intel/spi_acpi.c
+++ b/sys/dev/intel/spi_acpi.c
@@ -42,9 +42,10 @@
 static const struct intelspi_acpi_device {
 	const char *hid;
 	enum intelspi_vers vers;
+	const char *desc;
 } intelspi_acpi_devices[] = {
-	{ "80860F0E", SPI_BAYTRAIL },
-	{ "8086228E", SPI_BRASWELL },
+	{ "80860F0E", SPI_BAYTRAIL, "Intel Bay Trail SPI Controller" },
+	{ "8086228E", SPI_BRASWELL, "Intel Braswell SPI Controller" },
 };
 
 static char *intelspi_ids[] = { "80860F0E", "8086228E", NULL };
@@ -66,7 +67,7 @@
 		if (strcmp(intelspi_acpi_devices[i].hid, hid) == 0) {
 			sc->sc_vers = intelspi_acpi_devices[i].vers;
 			sc->sc_handle = acpi_get_handle(dev);
-			device_set_desc(dev, intelspi_infos[sc->sc_vers].desc);
+			device_set_desc(dev, intelspi_acpi_devices[i].desc);
 			return (BUS_PROBE_DEFAULT);
 		}
 	}
diff --git a/sys/dev/intel/spi_pci.c b/sys/dev/intel/spi_pci.c
--- a/sys/dev/intel/spi_pci.c
+++ b/sys/dev/intel/spi_pci.c
@@ -45,19 +45,20 @@
 static struct intelspi_pci_device {
 	uint32_t devid;
 	enum intelspi_vers vers;
+	const char *desc;
 } intelspi_pci_devices[] = {
-	{ 0x9c658086, SPI_LYNXPOINT },
-	{ 0x9c668086, SPI_LYNXPOINT },
-	{ 0x9ce58086, SPI_LYNXPOINT },
-	{ 0x9ce68086, SPI_LYNXPOINT },
-	{ 0x9d298086, SPI_SUNRISEPOINT },
-	{ 0x9d2a8086, SPI_SUNRISEPOINT },
-	{ 0xa1298086, SPI_SUNRISEPOINT },
-	{ 0xa12a8086, SPI_SUNRISEPOINT },
-	{ 0xa2a98086, SPI_SUNRISEPOINT },
-	{ 0xa2aa8086, SPI_SUNRISEPOINT },
-	{ 0xa3a98086, SPI_SUNRISEPOINT },
-	{ 0xa3aa8086, SPI_SUNRISEPOINT },
+	{ 0x9c658086, SPI_LYNXPOINT, "Intel Lynx Point-LP SPI Controller-0" },
+	{ 0x9c668086, SPI_LYNXPOINT, "Intel Lynx Point-LP SPI Controller-1" },
+	{ 0x9ce58086, SPI_LYNXPOINT, "Intel Wildcat Point SPI Controller-0" },
+	{ 0x9ce68086, SPI_LYNXPOINT, "Intel Wildcat Point SPI Controller-1" },
+	{ 0x9d298086, SPI_SUNRISEPOINT, "Intel Sunrise Point-LP SPI Controller-0" },
+	{ 0x9d2a8086, SPI_SUNRISEPOINT, "Intel Sunrise Point-LP SPI Controller-1" },
+	{ 0xa1298086, SPI_SUNRISEPOINT, "Intel Sunrise Point-H SPI Controller-0" },
+	{ 0xa12a8086, SPI_SUNRISEPOINT, "Intel Sunrise Point-H SPI Controller-1" },
+	{ 0xa2a98086, SPI_SUNRISEPOINT, "Intel Kaby Lake-H SPI Controller-0" },
+	{ 0xa2aa8086, SPI_SUNRISEPOINT, "Intel Kaby Lake-H SPI Controller-1" },
+	{ 0xa3a98086, SPI_SUNRISEPOINT, "Intel Comet Lake-V SPI Controller-0" },
+	{ 0xa3aa8086, SPI_SUNRISEPOINT, "Intel Comet Lake-V SPI Controller-1" },
 };
 
 static int
@@ -73,7 +74,7 @@
 			/* The PCI device is listed in ACPI too.
 			 * Not that we use the handle for anything... */
 			sc->sc_handle = acpi_get_handle(dev);
-			device_set_desc(dev, intelspi_infos[sc->sc_vers].desc);
+			device_set_desc(dev, intelspi_pci_devices[i].desc);
 			return (BUS_PROBE_DEFAULT);
 		}
 	}