diff --git a/sys/dev/e1000/em_txrx.c b/sys/dev/e1000/em_txrx.c
--- a/sys/dev/e1000/em_txrx.c
+++ b/sys/dev/e1000/em_txrx.c
@@ -141,7 +141,6 @@
 	if_softc_ctx_t scctx = sc->shared;
 	struct em_tx_queue *que = &sc->tx_queues[pi->ipi_qsidx];
 	struct tx_ring *txr = &que->txr;
-	struct e1000_hw *hw = &sc->hw;
 	struct e1000_context_desc *TXD;
 	int cur, hdr_len;
 	uint32_t cmd_type_len;
@@ -151,27 +150,38 @@
 		      E1000_TXD_DTYP_D |	/* Data descr type */
 		      E1000_TXD_CMD_TSE);	/* Do TSE on this packet */
 
-	/* IP and/or TCP header checksum calculation and insertion. */
-	*txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
-
 	cur = pi->ipi_pidx;
 	TXD = (struct e1000_context_desc *)&txr->tx_base[cur];
 
 	/*
-	 * Start offset for header checksum calculation.
-	 * End offset for header checksum calculation.
-	 * Offset of place put the checksum.
+	 * ipcss - Start offset for header checksum calculation.
+	 * ipcse - End offset for header checksum calculation.
+	 * ipcso - Offset of place to put the checksum.
 	 */
+	switch(pi->ipi_etype) {
+	case ETHERTYPE_IP:
+		/* IP and/or TCP header checksum calculation and insertion. */
+		*txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
+
+		TXD->lower_setup.ip_fields.ipcse =
+		    htole16(pi->ipi_ehdrlen + pi->ipi_ip_hlen - 1);
+		break;
+	case ETHERTYPE_IPV6:
+		/* TCP header checksum calculation and insertion. */
+		*txd_upper = E1000_TXD_POPTS_TXSM << 8;
+
+		TXD->lower_setup.ip_fields.ipcse = htole16(0);
+	default:
+		break;
+	}
 	TXD->lower_setup.ip_fields.ipcss = pi->ipi_ehdrlen;
-	TXD->lower_setup.ip_fields.ipcse =
-	    htole16(pi->ipi_ehdrlen + pi->ipi_ip_hlen - 1);
 	TXD->lower_setup.ip_fields.ipcso =
 	    pi->ipi_ehdrlen + offsetof(struct ip, ip_sum);
 
 	/*
-	 * Start offset for payload checksum calculation.
-	 * End offset for payload checksum calculation.
-	 * Offset of place to put the checksum.
+	 * tucss - Start offset for payload checksum calculation.
+	 * tucse - End offset for payload checksum calculation.
+	 * tucso - Offset of place to put the checksum.
 	 */
 	TXD->upper_setup.tcp_fields.tucss = pi->ipi_ehdrlen + pi->ipi_ip_hlen;
 	TXD->upper_setup.tcp_fields.tucse = 0;
@@ -188,16 +198,13 @@
 	/*
 	 * "PCI/PCI-X SDM 4.0" page 45, and "PCIe GbE SDM 2.5" page 63
 	 * - Set up basic TUCMDs
-	 * - Enable IP bit on 82544
 	 * - For others IP bit on indicates IPv4, while off indicates IPv6
 	*/
 	cmd_type_len = sc->txd_cmd |
 	    E1000_TXD_CMD_DEXT | /* Extended descr */
 	    E1000_TXD_CMD_TSE |  /* TSE context */
 	    E1000_TXD_CMD_TCP;   /* Do TCP checksum */
-	if (hw->mac.type == e1000_82544)
-		cmd_type_len |= E1000_TXD_CMD_IP;
-	else if (pi->ipi_etype == ETHERTYPE_IP)
+	if (pi->ipi_etype == ETHERTYPE_IP)
 		cmd_type_len |= E1000_TXD_CMD_IP;
 	TXD->cmd_and_length = htole32(cmd_type_len |
 	    (pi->ipi_len - hdr_len)); /* Total len */
diff --git a/sys/dev/e1000/if_em.h b/sys/dev/e1000/if_em.h
--- a/sys/dev/e1000/if_em.h
+++ b/sys/dev/e1000/if_em.h
@@ -509,6 +509,7 @@
 	u32			smartspeed;
 	u32			dmac;
 	int			link_mask;
+	int			tso_automasked;
 
 	u64			que_mask;
 
diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c
--- a/sys/dev/e1000/if_em.c
+++ b/sys/dev/e1000/if_em.c
@@ -533,6 +533,10 @@
 SYSCTL_INT(_hw_em, OID_AUTO, smart_pwr_down, CTLFLAG_RDTUN, &em_smart_pwr_down,
     0, "Set to true to leave smart power down enabled on newer adapters");
 
+static bool em_unsupported_tso = false;
+SYSCTL_BOOL(_hw_em, OID_AUTO, em_unsupported_tso,CTLFLAG_RWTUN,
+    &em_unsupported_tso, 0, "Allow unsupported em(4) TSO configurations");
+
 /* Controls whether promiscuous also shows bad packets */
 static int em_debug_sbp = false;
 SYSCTL_INT(_hw_em, OID_AUTO, sbp, CTLFLAG_RDTUN, &em_debug_sbp, 0,
@@ -784,8 +788,7 @@
 #define LEM_CAPS \
     IFCAP_HWCSUM | IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | \
     IFCAP_VLAN_HWCSUM | IFCAP_WOL | IFCAP_VLAN_HWFILTER | IFCAP_TSO4 | \
-    IFCAP_LRO | IFCAP_VLAN_HWTSO| IFCAP_JUMBO_MTU | IFCAP_HWCSUM_IPV6 | \
-    IFCAP_TSO6
+    IFCAP_LRO | IFCAP_VLAN_HWTSO| IFCAP_JUMBO_MTU | IFCAP_HWCSUM_IPV6
 
 #define EM_CAPS \
     IFCAP_HWCSUM | IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | \
@@ -937,20 +940,22 @@
 		scctx->isc_tx_tso_segments_max = EM_MAX_SCATTER;
 		scctx->isc_tx_tso_size_max = EM_TSO_SIZE;
 		scctx->isc_tx_tso_segsize_max = EM_TSO_SEG_SIZE;
-		scctx->isc_capabilities = scctx->isc_capenable = EM_CAPS;
+		scctx->isc_capabilities = scctx->isc_capenable = LEM_CAPS;
+		if (em_unsupported_tso)
+			scctx->isc_capabilities |= IFCAP_TSO6;
 		/*
-		 * For LEM-class devices, don't enable IFCAP_{TSO4,VLAN_HWTSO,TSO6}
+		 * For LEM-class devices, don't enable IFCAP_{TSO4,VLAN_HWTSO}
 		 * by default as we don't have workarounds for all associated
 		 * silicon errata.  TSO4 may work on > 82544 but its status
 		 * is unknown by the authors.  Please report any success or failures.
 		 */
-		scctx->isc_capenable &= ~(IFCAP_TSO4 | IFCAP_VLAN_HWTSO | IFCAP_TSO6);
+		scctx->isc_capenable &= ~(IFCAP_TSO4 | IFCAP_VLAN_HWTSO);
 		scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP | CSUM_IP_TSO |
 		    CSUM_IP6_TCP | CSUM_IP6_UDP;
 
 		/* "PCI/PCI-X SDM 4.0" page 33 (b) - FDX requirement on these chips */
-		if (hw->mac.type < e1000_82543 || hw->mac.type == e1000_82547 ||
-		    hw->mac.type == e1000_82547_rev_2)
+		if (!em_unsupported_tso && (hw->mac.type < e1000_82543 ||
+		    hw->mac.type == e1000_82547 || hw->mac.type == e1000_82547_rev_2))
 			scctx->isc_capenable &= ~(IFCAP_HWCSUM|IFCAP_VLAN_HWCSUM);
 		/* 82541ER doesn't do HW tagging */
 		if (hw->device_id == E1000_DEV_ID_82541ER || hw->device_id == E1000_DEV_ID_82541ER_LOM)
@@ -1079,6 +1084,9 @@
 		goto err_late;
 	}
 
+	/* Clear the IFCAP_TSO auto mask */
+	sc->tso_automasked = 0;
+
 	/* Check SOL/IDER usage */
 	if (e1000_check_reset_block(hw))
 		device_printf(dev, "PHY reset is blocked"
@@ -1404,6 +1412,17 @@
 	} else if (sc->intr_type == IFLIB_INTR_MSIX) /* Set up queue routing */
 		igb_configure_queues(sc);
 
+	/* Only do TSO on gigabit Ethernet for older chips due to errata */
+	if (sc->hw.mac.type < igb_mac_min && !em_unsupported_tso &&
+	    sc->link_speed && sc->link_speed != SPEED_1000) {
+		sc->tso_automasked = scctx->isc_capenable & (IFCAP_TSO |
+		    IFCAP_VLAN_HWTSO);
+		scctx->isc_capenable &= ~(IFCAP_TSO | IFCAP_VLAN_HWTSO);
+	} else if (sc->tso_automasked) {
+		scctx->isc_capenable |= sc->tso_automasked;
+		sc->tso_automasked = 0;
+	}
+
 	/* this clears any pending interrupts */
 	E1000_READ_REG(&sc->hw, E1000_ICR);
 	E1000_WRITE_REG(&sc->hw, E1000_ICS, E1000_ICS_LSC);