Index: sys/x86/x86/intr_machdep.c
===================================================================
--- sys/x86/x86/intr_machdep.c
+++ sys/x86/x86/intr_machdep.c
@@ -75,6 +75,7 @@
 static struct intsrc *interrupt_sources[NUM_IO_INTS];
 static struct mtx intr_table_lock;
 static struct mtx intrcnt_lock;
+static struct mtx intr_isrc_lock;
 static TAILQ_HEAD(pics_head, pic) pics;
 
 #ifdef SMP
@@ -156,7 +157,9 @@
 	}
 	intrcnt_register(isrc);
 	interrupt_sources[vector] = isrc;
+	mtx_lock(&intr_isrc_lock);
 	isrc->is_handlers = 0;
+	mtx_unlock(&intr_isrc_lock);
 	mtx_unlock(&intr_table_lock);
 	return (0);
 }
@@ -181,14 +184,14 @@
 	error = intr_event_add_handler(isrc->is_event, name, filter, handler,
 	    arg, intr_priority(flags), flags, cookiep);
 	if (error == 0) {
-		mtx_lock(&intr_table_lock);
+		mtx_lock(&intr_isrc_lock);
 		intrcnt_updatename(isrc);
 		isrc->is_handlers++;
 		if (isrc->is_handlers == 1) {
 			isrc->is_pic->pic_enable_intr(isrc);
 			isrc->is_pic->pic_enable_source(isrc);
 		}
-		mtx_unlock(&intr_table_lock);
+		mtx_unlock(&intr_isrc_lock);
 	}
 	return (error);
 }
@@ -202,14 +205,14 @@
 	isrc = intr_handler_source(cookie);
 	error = intr_event_remove_handler(cookie);
 	if (error == 0) {
-		mtx_lock(&intr_table_lock);
+		mtx_lock(&intr_isrc_lock);
 		isrc->is_handlers--;
 		if (isrc->is_handlers == 0) {
 			isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI);
 			isrc->is_pic->pic_disable_intr(isrc);
 		}
 		intrcnt_updatename(isrc);
-		mtx_unlock(&intr_table_lock);
+		mtx_unlock(&intr_isrc_lock);
 	}
 	return (error);
 }
@@ -379,7 +382,8 @@
 	intrcnt_setname("???", 0);
 	intrcnt_index = 1;
 	TAILQ_INIT(&pics);
-	mtx_init(&intr_table_lock, "intr sources", NULL, MTX_DEF);
+	mtx_init(&intr_table_lock, "intr table", NULL, MTX_DEF);
+	mtx_init(&intr_isrc_lock, "intr source", NULL, MTX_DEF);
 	mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN);
 }
 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
@@ -538,6 +542,7 @@
 
 	/* Round-robin assign a CPU to each enabled source. */
 	mtx_lock(&intr_table_lock);
+	mtx_lock(&intr_isrc_lock);
 	assign_cpu = 1;
 	for (i = 0; i < NUM_IO_INTS; i++) {
 		isrc = interrupt_sources[i];
@@ -558,6 +563,7 @@
 
 		}
 	}
+	mtx_unlock(&intr_isrc_lock);
 	mtx_unlock(&intr_table_lock);
 }
 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,