diff --git a/sys/cddl/dev/dtrace/aarch64/dtrace_isa.c b/sys/cddl/dev/dtrace/aarch64/dtrace_isa.c
--- a/sys/cddl/dev/dtrace/aarch64/dtrace_isa.c
+++ b/sys/cddl/dev/dtrace/aarch64/dtrace_isa.c
@@ -278,17 +278,17 @@
 }
 
 ulong_t
-dtrace_getreg(struct trapframe *rp, uint_t reg)
+dtrace_getreg(struct trapframe *frame, uint_t reg)
 {
 	switch (reg) {
 	case REG_X0 ... REG_X29:
-		return (rp->tf_x[reg]);
+		return (frame->tf_x[reg]);
 	case REG_LR:
-		return (rp->tf_lr);
+		return (frame->tf_lr);
 	case REG_SP:
-		return (rp->tf_sp);
+		return (frame->tf_sp);
 	case REG_PC:
-		return (rp->tf_elr);
+		return (frame->tf_elr);
 	default:
 		DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP);
 		return (0);
diff --git a/sys/cddl/dev/dtrace/amd64/dtrace_isa.c b/sys/cddl/dev/dtrace/amd64/dtrace_isa.c
--- a/sys/cddl/dev/dtrace/amd64/dtrace_isa.c
+++ b/sys/cddl/dev/dtrace/amd64/dtrace_isa.c
@@ -476,7 +476,7 @@
 }
 
 ulong_t
-dtrace_getreg(struct trapframe *rp, uint_t reg)
+dtrace_getreg(struct trapframe *frame, uint_t reg)
 {
 	/* This table is dependent on reg.d. */
 	int regmap[] = {
@@ -515,57 +515,57 @@
 
 	switch (reg) {
 	case REG_RDI:
-		return (rp->tf_rdi);
+		return (frame->tf_rdi);
 	case REG_RSI:
-		return (rp->tf_rsi);
+		return (frame->tf_rsi);
 	case REG_RDX:
-		return (rp->tf_rdx);
+		return (frame->tf_rdx);
 	case REG_RCX:
-		return (rp->tf_rcx);
+		return (frame->tf_rcx);
 	case REG_R8:
-		return (rp->tf_r8);
+		return (frame->tf_r8);
 	case REG_R9:
-		return (rp->tf_r9);
+		return (frame->tf_r9);
 	case REG_RAX:
-		return (rp->tf_rax);
+		return (frame->tf_rax);
 	case REG_RBX:
-		return (rp->tf_rbx);
+		return (frame->tf_rbx);
 	case REG_RBP:
-		return (rp->tf_rbp);
+		return (frame->tf_rbp);
 	case REG_R10:
-		return (rp->tf_r10);
+		return (frame->tf_r10);
 	case REG_R11:
-		return (rp->tf_r11);
+		return (frame->tf_r11);
 	case REG_R12:
-		return (rp->tf_r12);
+		return (frame->tf_r12);
 	case REG_R13:
-		return (rp->tf_r13);
+		return (frame->tf_r13);
 	case REG_R14:
-		return (rp->tf_r14);
+		return (frame->tf_r14);
 	case REG_R15:
-		return (rp->tf_r15);
+		return (frame->tf_r15);
 	case REG_DS:
-		return (rp->tf_ds);
+		return (frame->tf_ds);
 	case REG_ES:
-		return (rp->tf_es);
+		return (frame->tf_es);
 	case REG_FS:
-		return (rp->tf_fs);
+		return (frame->tf_fs);
 	case REG_GS:
-		return (rp->tf_gs);
+		return (frame->tf_gs);
 	case REG_TRAPNO:
-		return (rp->tf_trapno);
+		return (frame->tf_trapno);
 	case REG_ERR:
-		return (rp->tf_err);
+		return (frame->tf_err);
 	case REG_RIP:
-		return (rp->tf_rip);
+		return (frame->tf_rip);
 	case REG_CS:
-		return (rp->tf_cs);
+		return (frame->tf_cs);
 	case REG_SS:
-		return (rp->tf_ss);
+		return (frame->tf_ss);
 	case REG_RFL:
-		return (rp->tf_rflags);
+		return (frame->tf_rflags);
 	case REG_RSP:
-		return (rp->tf_rsp);
+		return (frame->tf_rsp);
 	default:
 		DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP);
 		return (0);
diff --git a/sys/cddl/dev/dtrace/arm/dtrace_isa.c b/sys/cddl/dev/dtrace/arm/dtrace_isa.c
--- a/sys/cddl/dev/dtrace/arm/dtrace_isa.c
+++ b/sys/cddl/dev/dtrace/arm/dtrace_isa.c
@@ -157,7 +157,7 @@
 }
 
 ulong_t
-dtrace_getreg(struct trapframe *rp, uint_t reg)
+dtrace_getreg(struct trapframe *frame, uint_t reg)
 {
 	printf("IMPLEMENT ME: %s\n", __func__);
 
diff --git a/sys/cddl/dev/dtrace/i386/dtrace_isa.c b/sys/cddl/dev/dtrace/i386/dtrace_isa.c
--- a/sys/cddl/dev/dtrace/i386/dtrace_isa.c
+++ b/sys/cddl/dev/dtrace/i386/dtrace_isa.c
@@ -498,7 +498,7 @@
 }
 
 ulong_t
-dtrace_getreg(struct trapframe *rp, uint_t reg)
+dtrace_getreg(struct trapframe *frame, uint_t reg)
 {
 	struct pcb *pcb;
 	int regmap[] = {  /* Order is dependent on reg.d */
@@ -543,41 +543,41 @@
 		}
 		return (pcb->pcb_gs);
 	case REG_FS:
-		return (rp->tf_fs);
+		return (frame->tf_fs);
 	case REG_ES:
-		return (rp->tf_es);
+		return (frame->tf_es);
 	case REG_DS:
-		return (rp->tf_ds);
+		return (frame->tf_ds);
 	case REG_RDI:
-		return (rp->tf_edi);
+		return (frame->tf_edi);
 	case REG_RSI:
-		return (rp->tf_esi);
+		return (frame->tf_esi);
 	case REG_RBP:
-		return (rp->tf_ebp);
+		return (frame->tf_ebp);
 	case REG_RSP:
-		return (rp->tf_isp);
+		return (frame->tf_isp);
 	case REG_RBX:
-		return (rp->tf_ebx);
+		return (frame->tf_ebx);
 	case REG_RCX:
-		return (rp->tf_ecx);
+		return (frame->tf_ecx);
 	case REG_RAX:
-		return (rp->tf_eax);
+		return (frame->tf_eax);
 	case REG_TRAPNO:
-		return (rp->tf_trapno);
+		return (frame->tf_trapno);
 	case REG_ERR:
-		return (rp->tf_err);
+		return (frame->tf_err);
 	case REG_RIP:
-		return (rp->tf_eip);
+		return (frame->tf_eip);
 	case REG_CS:
-		return (rp->tf_cs);
+		return (frame->tf_cs);
 	case REG_RFL:
-		return (rp->tf_eflags);
+		return (frame->tf_eflags);
 #if 0
 	case REG_RSP:
-		return (rp->tf_esp);
+		return (frame->tf_esp);
 #endif
 	case REG_SS:
-		return (rp->tf_ss);
+		return (frame->tf_ss);
 	default:
 		DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP);
 		return (0);
diff --git a/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c b/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c
--- a/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c
+++ b/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c
@@ -530,26 +530,26 @@
 }
 
 ulong_t
-dtrace_getreg(struct trapframe *rp, uint_t reg)
+dtrace_getreg(struct trapframe *frame, uint_t reg)
 {
 	if (reg < 32)
-		return (rp->fixreg[reg]);
+		return (frame->fixreg[reg]);
 
 	switch (reg) {
 	case 32:
-		return (rp->lr);
+		return (frame->lr);
 	case 33:
-		return (rp->cr);
+		return (frame->cr);
 	case 34:
-		return (rp->xer);
+		return (frame->xer);
 	case 35:
-		return (rp->ctr);
+		return (frame->ctr);
 	case 36:
-		return (rp->srr0);
+		return (frame->srr0);
 	case 37:
-		return (rp->srr1);
+		return (frame->srr1);
 	case 38:
-		return (rp->exc);
+		return (frame->exc);
 	default:
 		DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP);
 		return (0);
diff --git a/sys/cddl/dev/dtrace/riscv/dtrace_isa.c b/sys/cddl/dev/dtrace/riscv/dtrace_isa.c
--- a/sys/cddl/dev/dtrace/riscv/dtrace_isa.c
+++ b/sys/cddl/dev/dtrace/riscv/dtrace_isa.c
@@ -309,31 +309,31 @@
 }
 
 ulong_t
-dtrace_getreg(struct trapframe *rp, uint_t reg)
+dtrace_getreg(struct trapframe *frame, uint_t reg)
 {
 	switch (reg) {
 	case REG_ZERO:
 		return (0);
 	case REG_RA:
-		return (rp->tf_ra);
+		return (frame->tf_ra);
 	case REG_SP:
-		return (rp->tf_sp);
+		return (frame->tf_sp);
 	case REG_GP:
-		return (rp->tf_gp);
+		return (frame->tf_gp);
 	case REG_TP:
-		return (rp->tf_tp);
+		return (frame->tf_tp);
 	case REG_T0 ... REG_T2:
-		return (rp->tf_t[reg - REG_T0]);
+		return (frame->tf_t[reg - REG_T0]);
 	case REG_S0 ... REG_S1:
-		return (rp->tf_s[reg - REG_S0]);
+		return (frame->tf_s[reg - REG_S0]);
 	case REG_A0 ... REG_A7:
-		return (rp->tf_a[reg - REG_A0]);
+		return (frame->tf_a[reg - REG_A0]);
 	case REG_S2 ... REG_S11:
-		return (rp->tf_s[reg - REG_S2 + 2]);
+		return (frame->tf_s[reg - REG_S2 + 2]);
 	case REG_T3 ... REG_T6:
-		return (rp->tf_t[reg - REG_T3 + 3]);
+		return (frame->tf_t[reg - REG_T3 + 3]);
 	case REG_PC:
-		return (rp->tf_sepc);
+		return (frame->tf_sepc);
 	default:
 		DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP);
 		return (0);