diff --git a/sys/arm/annapurna/alpine/alpine_machdep_mp.c b/sys/arm/annapurna/alpine/alpine_machdep_mp.c
--- a/sys/arm/annapurna/alpine/alpine_machdep_mp.c
+++ b/sys/arm/annapurna/alpine/alpine_machdep_mp.c
@@ -80,9 +80,9 @@
 static int platform_mp_get_core_cnt(void);
 static int alpine_get_cpu_resume_base(u_long *pbase, u_long *psize);
 static int alpine_get_nb_base(u_long *pbase, u_long *psize);
-static boolean_t alpine_validate_cpu(u_int, phandle_t, u_int, pcell_t *);
+static bool alpine_validate_cpu(u_int, phandle_t, u_int, pcell_t *);
 
-static boolean_t
+static bool
 alpine_validate_cpu(u_int id, phandle_t child, u_int addr_cell, pcell_t *reg)
 {
 	return ofw_bus_node_is_compatible(child, "arm,cortex-a15");
diff --git a/sys/arm/qemu/virt_mp.c b/sys/arm/qemu/virt_mp.c
--- a/sys/arm/qemu/virt_mp.c
+++ b/sys/arm/qemu/virt_mp.c
@@ -49,7 +49,7 @@
 
 static int running_cpus;
 
-static boolean_t
+static bool
 virt_start_ap(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg)
 {
 	int err;
diff --git a/sys/arm/qualcomm/ipq4018_mp.c b/sys/arm/qualcomm/ipq4018_mp.c
--- a/sys/arm/qualcomm/ipq4018_mp.c
+++ b/sys/arm/qualcomm/ipq4018_mp.c
@@ -75,7 +75,7 @@
 	printf("SMP: ncpu=%d\n", ncpu);
 }
 
-static boolean_t
+static bool
 ipq4018_start_ap(u_int id, phandle_t node, u_int addr_cells, pcell_t *arg)
 {
 
diff --git a/sys/arm/qualcomm/qcom_cpu_kpssv2.h b/sys/arm/qualcomm/qcom_cpu_kpssv2.h
--- a/sys/arm/qualcomm/qcom_cpu_kpssv2.h
+++ b/sys/arm/qualcomm/qcom_cpu_kpssv2.h
@@ -30,6 +30,6 @@
 #ifndef	__QCOM_CPU_KPSSV2_H__
 #define	__QCOM_CPU_KPSSV2_H__
 
-extern	boolean_t qcom_cpu_kpssv2_regulator_start(u_int id, phandle_t node);
+extern	bool qcom_cpu_kpssv2_regulator_start(u_int id, phandle_t node);
 
 #endif	/* __QCOM_CPU_KPSSV2_H__ */
diff --git a/sys/arm/rockchip/rk32xx_mp.c b/sys/arm/rockchip/rk32xx_mp.c
--- a/sys/arm/rockchip/rk32xx_mp.c
+++ b/sys/arm/rockchip/rk32xx_mp.c
@@ -119,7 +119,7 @@
 	bus_space_unmap(fdtbus_bs_tag, pmu, PMU_SIZE);
 }
 
-static boolean_t
+static bool
 rk32xx_start_ap(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg)
 {
 	int rv;
diff --git a/sys/arm64/arm64/mp_machdep.c b/sys/arm64/arm64/mp_machdep.c
--- a/sys/arm64/arm64/mp_machdep.c
+++ b/sys/arm64/arm64/mp_machdep.c
@@ -687,7 +687,7 @@
 	*release_addr = (((uintptr_t)buf[0] << 32) | buf[1]);
 }
 
-static boolean_t
+static bool
 start_cpu_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
 {
 	uint64_t target_cpu;
@@ -716,11 +716,11 @@
 	if (!psci_present && cpuid != 0) {
 		if (OF_getprop_alloc(node, "enable-method",
 		    (void **)&enable_method) <= 0)
-			return (FALSE);
+			return (false);
 
 		if (strcmp(enable_method, "spin-table") != 0) {
 			OF_prop_free(enable_method);
-			return (FALSE);
+			return (false);
 		}
 
 		OF_prop_free(enable_method);
@@ -728,12 +728,12 @@
 		if (release_addr == 0) {
 			printf("Failed to fetch release address for CPU %u",
 			    cpuid);
-			return (FALSE);
+			return (false);
 		}
 	}
 
 	if (!start_cpu(cpuid, target_cpu, 0, release_addr))
-		return (FALSE);
+		return (false);
 
 	/*
 	 * Don't increment for the boot CPU, its CPU ID is reserved.
@@ -748,7 +748,7 @@
 	cpuid_to_pcpu[cpuid]->pc_domain = domain;
 	if (domain < MAXMEMDOM)
 		CPU_SET(cpuid, &cpuset_domain[domain]);
-	return (TRUE);
+	return (true);
 }
 static void
 cpu_init_fdt(void)
diff --git a/sys/dev/fdt/fdt_arm_platform.c b/sys/dev/fdt/fdt_arm_platform.c
--- a/sys/dev/fdt/fdt_arm_platform.c
+++ b/sys/dev/fdt/fdt_arm_platform.c
@@ -73,7 +73,7 @@
 }
 
 #if defined(SMP)
-static boolean_t
+static bool
 fdt_platform_maxid(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg)
 {
 
diff --git a/sys/dev/ofw/ofw_cpu.h b/sys/dev/ofw/ofw_cpu.h
--- a/sys/dev/ofw/ofw_cpu.h
+++ b/sys/dev/ofw/ofw_cpu.h
@@ -31,7 +31,7 @@
 #ifndef _DEV_OFW_OFW_CPU_H_
 #define _DEV_OFW_OFW_CPU_H_
 
-typedef boolean_t (*ofw_cpu_foreach_cb)(u_int, phandle_t, u_int, pcell_t *);
+typedef bool (*ofw_cpu_foreach_cb)(u_int, phandle_t, u_int, pcell_t *);
 int ofw_cpu_early_foreach(ofw_cpu_foreach_cb, boolean_t);
 
 #endif /* _DEV_OFW_OFW_CPU_H_ */
diff --git a/sys/riscv/riscv/mp_machdep.c b/sys/riscv/riscv/mp_machdep.c
--- a/sys/riscv/riscv/mp_machdep.c
+++ b/sys/riscv/riscv/mp_machdep.c
@@ -403,7 +403,7 @@
 }
 
 #ifdef FDT
-static boolean_t
+static bool
 cpu_check_mmu(u_int id __unused, phandle_t node, u_int addr_size __unused,
     pcell_t *reg __unused)
 {
@@ -412,12 +412,12 @@
 	/* Check if this hart supports MMU. */
 	if (OF_getprop(node, "mmu-type", (void *)type, sizeof(type)) == -1 ||
 	    strncmp(type, "riscv,none", 10) == 0)
-		return (0);
+		return (false);
 
-	return (1);
+	return (true);
 }
 
-static boolean_t
+static bool
 cpu_init_fdt(u_int id, phandle_t node, u_int addr_size, pcell_t *reg)
 {
 	struct pcpu *pcpup;
@@ -428,7 +428,7 @@
 	int error;
 
 	if (!cpu_check_mmu(id, node, addr_size, reg))
-		return (0);
+		return (false);
 
 	KASSERT(id < MAXCPU, ("Too many CPUs"));
 
@@ -449,7 +449,7 @@
 
 	/* We are already running on this cpu */
 	if (hart == boot_hart)
-		return (1);
+		return (true);
 
 	/*
 	 * Rotate the CPU IDs to put the boot CPU as CPU 0.
@@ -462,7 +462,7 @@
 
 	/* Check if we are able to start this cpu */
 	if (cpuid > mp_maxid)
-		return (0);
+		return (false);
 
 	/*
 	 * Depending on the SBI implementation, APs are waiting either in
@@ -477,7 +477,7 @@
 			/* Send a warning to the user and continue. */
 			printf("AP %u (hart %lu) failed to start, error %d\n",
 			    cpuid, hart, error);
-			return (0);
+			return (false);
 		}
 	}
 
@@ -503,7 +503,7 @@
 	CPU_SET(cpuid, &all_cpus);
 	CPU_SET(hart, &all_harts);
 
-	return (1);
+	return (true);
 }
 #endif