diff --git a/share/man/man7/arch.7 b/share/man/man7/arch.7
--- a/share/man/man7/arch.7
+++ b/share/man/man7/arch.7
@@ -26,7 +26,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd September 15, 2022
+.Dd March 8, 2023
 .Dt ARCH 7
 .Os
 .Sh NAME
@@ -158,7 +158,6 @@
 .It Sy LP64        Ta Sy ILP32 counterpart
 .It Dv amd64       Ta Dv i386
 .It Dv powerpc64   Ta Dv powerpc
-.It Dv mips64*     Ta Dv mips*
 .It Dv aarch64     Ta Dv armv6/armv7
 .El
 .Pp
@@ -201,15 +200,6 @@
 .It armv6       Ta 4 Ta  8 Ta 8
 .It armv7       Ta 4 Ta  8 Ta 8
 .It i386        Ta 4 Ta 12 Ta 4
-.It mips        Ta 4 Ta  8 Ta 8
-.It mipsel      Ta 4 Ta  8 Ta 8
-.It mipselhf    Ta 4 Ta  8 Ta 8
-.It mipshf      Ta 4 Ta  8 Ta 8
-.It mipsn32     Ta 4 Ta  8 Ta 8
-.It mips64      Ta 8 Ta  8 Ta 8
-.It mips64el    Ta 8 Ta  8 Ta 8
-.It mips64elhf  Ta 8 Ta  8 Ta 8
-.It mips64hf    Ta 8 Ta  8 Ta 8
 .It powerpc     Ta 4 Ta  8 Ta 8
 .It powerpcspe  Ta 4 Ta  8 Ta 8
 .It powerpc64   Ta 8 Ta  8 Ta 8
@@ -228,15 +218,6 @@
 .It armv6       Ta little Ta unsigned
 .It armv7       Ta little Ta unsigned
 .It i386        Ta little Ta   signed
-.It mips        Ta big    Ta   signed
-.It mipsel      Ta little Ta   signed
-.It mipselhf    Ta little Ta   signed
-.It mipshf      Ta big    Ta   signed
-.It mipsn32     Ta big    Ta   signed
-.It mips64      Ta big    Ta   signed
-.It mips64el    Ta little Ta   signed
-.It mips64elhf  Ta little Ta   signed
-.It mips64hf    Ta big    Ta   signed
 .It powerpc     Ta big    Ta unsigned
 .It powerpcspe  Ta big    Ta unsigned
 .It powerpc64   Ta big    Ta unsigned
@@ -252,15 +233,6 @@
 .It armv6       Ta 4K, 1M
 .It armv7       Ta 4K, 1M
 .It i386        Ta 4K, 2M (PAE), 4M
-.It mips        Ta 4K
-.It mipsel      Ta 4K
-.It mipselhf    Ta 4K
-.It mipshf      Ta 4K
-.It mipsn32     Ta 4K
-.It mips64      Ta 4K
-.It mips64el    Ta 4K
-.It mips64elhf  Ta 4K
-.It mips64hf    Ta 4K
 .It powerpc     Ta 4K
 .It powerpcspe  Ta 4K
 .It powerpc64   Ta 4K
@@ -276,15 +248,6 @@
 .It armv6       Ta hard Ta hard, double precision
 .It armv7       Ta hard Ta hard, double precision
 .It i386        Ta hard Ta hard, 80 bit
-.It mips        Ta soft Ta identical to double
-.It mipsel      Ta soft Ta identical to double
-.It mipselhf    Ta hard Ta identical to double
-.It mipshf      Ta hard Ta identical to double
-.It mipsn32     Ta soft Ta identical to double
-.It mips64      Ta soft Ta identical to double
-.It mips64el    Ta soft Ta identical to double
-.It mips64elhf  Ta hard Ta identical to double
-.It mips64hf    Ta hard Ta identical to double
 .It powerpc     Ta hard Ta hard, double precision
 .It powerpcspe  Ta hard Ta hard, double precision
 .It powerpc64   Ta hard Ta hard, double precision
@@ -321,7 +284,6 @@
 .It amd64 Ta amd64 Ta amd64
 .It arm Ta arm Ta armv6, armv7
 .It i386 Ta i386 Ta i386
-.It mips Ta mips Ta mips, mipsel, mips64, mips64el, mipshf, mipselhf, mips64elhf, mipsn32
 .It powerpc Ta powerpc Ta powerpc, powerpcspe, powerpc64, powerpc64le
 .It riscv Ta riscv Ta riscv64, riscv64sf
 .El
@@ -355,15 +317,6 @@
 .It armv6       Ta Dv __arm__ , Dv __ARM_ARCH >= 6
 .It armv7       Ta Dv __arm__ , Dv __ARM_ARCH >= 7
 .It i386        Ta Dv __i386__
-.It mips        Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_o32
-.It mipsel      Ta Dv __mips__ , Dv __mips_o32
-.It mipselhf    Ta Dv __mips__ , Dv __mips_o32
-.It mipshf      Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_o32
-.It mipsn32     Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n32
-.It mips64      Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n64
-.It mips64el    Ta Dv __mips__ , Dv __mips_n64
-.It mips64elhf  Ta Dv __mips__ , Dv __mips_n64
-.It mips64hf    Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n64
 .It powerpc     Ta Dv __powerpc__
 .It powerpcspe  Ta Dv __powerpc__ , Dv __SPE__
 .It powerpc64   Ta Dv __powerpc__ , Dv __powerpc64__
@@ -431,17 +384,13 @@
 It may also encode a ISA revision.
 It may also encode hard versus soft floating point ABI and usage.
 It may also encode a variant ABI when the other factors do not
-uniquely define the ABI (e.g., MIPS' n32 ABI).
+uniquely define the ABI.
 It, along with
 .Dv MACHINE ,
 defines the ABI used by the system.
-For example, the MIPS CPU processor family supports 9 different
-combinations encoding pointer size, endian and hard versus soft float (for
-8 combinations) as well as N32 (which only ever had one variation of
-all these).
 Generally, the plain CPU name specifies the most common (or at least
 first) variant of the CPU.
-This is why mips and mips64 imply 'big endian' while 'armv6' and 'armv7'
+This is why powerpc and powerpc64 imply 'big endian' while 'armv6' and 'armv7'
 imply little endian.
 If we ever were to support the so-called x32 ABI (using 32-bit
 pointers on the amd64 architecture), it would most likely be encoded
@@ -455,10 +404,6 @@
 .Dv MACHINE_ARCH .
 It is generally the common prefix for all the MACHINE_ARCH that
 share the same implementation, though 'riscv' breaks this rule.
-For example,
-.Dv MACHINE_CPUARCH
-is defined to be mips for all the flavors of mips that we support
-since we support them all with a shared set of sources.
 While amd64 and i386 are closely related, MACHINE_CPUARCH is not x86
 for them.
 The