diff --git a/sys/dev/usb/controller/dwc3.h b/sys/dev/usb/controller/dwc3.h
--- a/sys/dev/usb/controller/dwc3.h
+++ b/sys/dev/usb/controller/dwc3.h
@@ -110,6 +110,11 @@
 #define	 DWC3_GUSB3PIPECTL0_DELAYP1TRANS	(1 << 18)
 #define	 DWC3_GUSB3PIPECTL0_SUSPENDUSB3		(1 << 17)
 
+#define	DWC3_HWPARAMS3_SSPHY(x)			(x & 0x3)
+#define	 DWC3_HWPARAMS3_SSPHY_DISABLE		0
+#define	 DWC3_HWPARAMS3_SSPHY_GEN1		1
+#define	 DWC3_HWPARAMS3_SSPHY_GEN2		2
+
 #define	DWC3_GTXFIFOSIZ(x)	(0xc300 + 0x4 * (x))
 #define	DWC3_GRXFIFOSIZ(x)	(0xc380 + 0x4 * (x))
 #define	DWC3_GEVNTADRLO0		0xc400
diff --git a/sys/dev/usb/controller/dwc3.c b/sys/dev/usb/controller/dwc3.c
--- a/sys/dev/usb/controller/dwc3.c
+++ b/sys/dev/usb/controller/dwc3.c
@@ -458,12 +458,19 @@
 	error = phy_get_by_ofw_name(dev, node, "usb3-phy", &usb3_phy);
 	if (error == 0 && usb3_phy != NULL)
 		phy_enable(usb3_phy);
-	else {
-		reg = DWC3_READ(sc, DWC3_GUCTL1);
-		if (bootverbose)
-			device_printf(dev, "Forcing USB2 clock only\n");
-		reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
-		DWC3_WRITE(sc, DWC3_GUCTL1, reg);
+	if (sc->snpsversion == DWC3_IP_ID) {
+		if (sc->snpsrevision >= 0x290A) {
+			uint32_t hwparams3;
+
+			hwparams3 = DWC3_READ(sc, DWC3_GHWPARAMS3);
+			if (DWC3_HWPARAMS3_SSPHY(hwparams3) == DWC3_HWPARAMS3_SSPHY_DISABLE) {
+				reg = DWC3_READ(sc, DWC3_GUCTL1);
+				if (bootverbose)
+					device_printf(dev, "Forcing USB2 clock only\n");
+				reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
+				DWC3_WRITE(sc, DWC3_GUCTL1, reg);
+			}
+		}
 	}
 	snps_dwc3_configure_phy(sc, node);
 skip_phys: