Index: sys/arm64/arm64/exception.S
===================================================================
--- sys/arm64/arm64/exception.S
+++ sys/arm64/arm64/exception.S
@@ -63,8 +63,13 @@
 .endm
 
 .macro	restore_registers el
-	msr	daifset, #2		/* Disable interrupts, x18 may change
-					 * in the interrupt exception handler */
+.if \el == 1	
+	msr	daifset, #2
+	/*
+	 * Disable interrupts, x18 may change in the interrupt exception
+	 * handler.  For EL0 exceptions, do_ast already did this.
+	 */
+.endif
 	ldp	x18, lr, [sp], #16
 	ldp	x10, x11, [sp], #16
 .if \el == 0
@@ -110,8 +115,7 @@
 	/* Check if we have either bits set */
 	mov	x3, #((TDF_ASTPENDING|TDF_NEEDRESCHED) >> 8)
 	lsl	x3, x3, #8
-	and	x2, x2, x3
-	cmp	x2, #0
+	tst	x2, x3
 	b.eq	2f
 
 	/* Restore interrupts */
@@ -125,8 +129,6 @@
 	b	1b
 
 2:
-	/* Restore interrupts */
-	msr	daif, x19
 .endm
 
 handle_el1h_sync:
@@ -158,6 +160,7 @@
 	save_registers 0
 	mov	x0, sp
 	bl	arm_cpu_intr
+	do_ast
 	restore_registers 0
 	eret