diff --git a/sys/dev/psci/smccc_arm.S b/sys/dev/psci/smccc_arm.S --- a/sys/dev/psci/smccc_arm.S +++ b/sys/dev/psci/smccc_arm.S @@ -37,38 +37,25 @@ .arch_extension sec /* For smc */ .arch_extension virt /* For hvc */ -/* - * int arm_smccc_hvc(register_t, register_t, register_t, register_t, - * register_t, register_t, register_t, register_t, - * struct arm_smccc_res *res) - */ -ENTRY(arm_smccc_hvc) +.macro arm_smccc_1_0 insn +ENTRY(arm_smccc_\insn) mov r12, sp push {r4-r7} ldm r12, {r4-r7} - hvc #0 + \insn #0 pop {r4-r7} ldr r12, [sp, #(4 * 4)] cmp r12, #0 beq 1f stm r12, {r0-r3} 1: bx lr -END(arm_smccc_hvc) +END(arm_smccc_\insn) +.endm /* - * int arm_smccc_smc(register_t, register_t, register_t, register_t, + * int arm_smccc_hvc(register_t, register_t, register_t, register_t, * register_t, register_t, register_t, register_t, * struct arm_smccc_res *res) */ -ENTRY(arm_smccc_smc) - mov r12, sp - push {r4-r7} - ldm r12, {r4-r7} - smc #0 - pop {r4-r7} - ldr r12, [sp, #(4 * 4)] - cmp r12, #0 - beq 1f - stm r12, {r0-r3} -1: bx lr -END(arm_smccc_smc) +arm_smccc_1_0 hvc +arm_smccc_1_0 smc diff --git a/sys/dev/psci/smccc_arm64.S b/sys/dev/psci/smccc_arm64.S --- a/sys/dev/psci/smccc_arm64.S +++ b/sys/dev/psci/smccc_arm64.S @@ -33,30 +33,21 @@ #include __FBSDID("$FreeBSD$"); -/* - * int arm_smccc_hvc(register_t, register_t, register_t, register_t, - * register_t, register_t, register_t, register_t, - * struct arm_smccc_res *res) - */ -ENTRY(arm_smccc_hvc) - hvc #0 +.macro arm_smccc_1_0 insn +ENTRY(arm_smccc_\insn) + \insn #0 ldr x4, [sp] cbz x4, 1f stp x0, x1, [x4, #16 * 0] stp x2, x3, [x4, #16 * 1] 1: ret -END(arm_smccc_hvc) +END(arm_smccc_\insn) +.endm /* - * int arm_smccc_smc(register_t, register_t, register_t, register_t, + * int arm_smccc_*(register_t, register_t, register_t, register_t, * register_t, register_t, register_t, register_t, * struct arm_smccc_res *res) */ -ENTRY(arm_smccc_smc) - smc #0 - ldr x4, [sp] - cbz x4, 1f - stp x0, x1, [x4, #16 * 0] - stp x2, x3, [x4, #16 * 1] -1: ret -END(arm_smccc_smc) +arm_smccc_1_0 hvc +arm_smccc_1_0 smc