Index: sys/dev/mmc/host/dwmmc.c
===================================================================
--- sys/dev/mmc/host/dwmmc.c
+++ sys/dev/mmc/host/dwmmc.c
@@ -61,9 +61,7 @@
 #include <machine/cpu.h>
 #include <machine/intr.h>
 
-#ifdef EXT_RESOURCES
 #include <dev/extres/clk/clk.h>
-#endif
 
 #include <dev/mmc/host/dwmmc_reg.h>
 #include <dev/mmc/host/dwmmc_var.h>
@@ -515,9 +513,7 @@
 	phandle_t node;
 	uint32_t bus_hz = 0;
 	int len;
-#ifdef EXT_RESOURCES
 	int error;
-#endif
 
 	if ((node = ofw_bus_get_node(sc->dev)) == -1)
 		return (ENXIO);
@@ -549,8 +545,6 @@
 		bus_hz = dts_value[0];
 	}
 
-#ifdef EXT_RESOURCES
-
 	/* IP block reset is optional */
 	error = hwreset_get_by_ofw_name(sc->dev, 0, "reset", &sc->hwreset);
 	if (error != 0 &&
@@ -657,7 +651,6 @@
 			goto fail;
 		}
 	}
-#endif /* EXT_RESOURCES */
 
 	if (sc->bus_hz == 0) {
 		device_printf(sc->dev, "No bus speed provided\n");
@@ -799,7 +792,6 @@
 
 	DWMMC_LOCK_DESTROY(sc);
 
-#ifdef EXT_RESOURCES
 	if (sc->hwreset != NULL && hwreset_deassert(sc->hwreset) != 0)
 		device_printf(sc->dev, "cannot deassert reset\n");
 	if (sc->biu != NULL && clk_disable(sc->biu) != 0)
@@ -811,7 +803,6 @@
 		device_printf(sc->dev, "Cannot disable vmmc regulator\n");
 	if (sc->vqmmc && regulator_disable(sc->vqmmc) != 0)
 		device_printf(sc->dev, "Cannot disable vqmmc regulator\n");
-#endif
 
 #ifdef MMCCAM
 	mmc_cam_sim_free(&sc->mmc_sim);
Index: sys/dev/mmc/host/dwmmc_rockchip.c
===================================================================
--- sys/dev/mmc/host/dwmmc_rockchip.c
+++ sys/dev/mmc/host/dwmmc_rockchip.c
@@ -41,9 +41,7 @@
 
 #include <dev/ofw/ofw_bus_subr.h>
 
-#ifdef EXT_RESOURCES
 #include <dev/extres/clk/clk.h>
-#endif
 
 #include <dev/mmc/host/dwmmc_var.h>
 
@@ -94,14 +92,11 @@
 		break;
 	}
 
-#ifdef EXT_RESOURCES
 	sc->update_ios = &dwmmc_rockchip_update_ios;
-#endif
 
 	return (dwmmc_attach(dev));
 }
 
-#ifdef EXT_RESOURCES
 static int
 dwmmc_rockchip_update_ios(struct dwmmc_softc *sc, struct mmc_ios *ios)
 {
@@ -128,7 +123,6 @@
 	}
 	return (0);
 }
-#endif
 
 static device_method_t rockchip_dwmmc_methods[] = {
 	/* bus interface */
Index: sys/dev/mmc/host/dwmmc_var.h
===================================================================
--- sys/dev/mmc/host/dwmmc_var.h
+++ sys/dev/mmc/host/dwmmc_var.h
@@ -33,11 +33,9 @@
 #ifndef DEV_MMC_HOST_DWMMC_VAR_H
 #define DEV_MMC_HOST_DWMMC_VAR_H
 
-#ifdef EXT_RESOURCES
 #include <dev/extres/clk/clk.h>
 #include <dev/extres/hwreset/hwreset.h>
 #include <dev/extres/regulator/regulator.h>
-#endif
 
 #include "opt_mmccam.h"
 
@@ -92,13 +90,11 @@
 	uint32_t		sdr_timing;
 	uint32_t		ddr_timing;
 
-#ifdef EXT_RESOURCES
 	clk_t			biu;
 	clk_t			ciu;
 	hwreset_t		hwreset;
 	regulator_t		vmmc;
 	regulator_t		vqmmc;
-#endif
 };
 
 DECLARE_CLASS(dwmmc_driver);