diff --git a/sys/arm64/rockchip/clk/rk_clk_composite.c b/sys/arm64/rockchip/clk/rk_clk_composite.c
--- a/sys/arm64/rockchip/clk/rk_clk_composite.c
+++ b/sys/arm64/rockchip/clk/rk_clk_composite.c
@@ -247,7 +247,7 @@
 			break;
 		}
 	}
-	*reg = div_reg;
+	*reg = best_div_reg;
 	return (best_div);
 }
 
diff --git a/sys/arm64/rockchip/clk/rk_clk_pll.c b/sys/arm64/rockchip/clk/rk_clk_pll.c
--- a/sys/arm64/rockchip/clk/rk_clk_pll.c
+++ b/sys/arm64/rockchip/clk/rk_clk_pll.c
@@ -373,10 +373,6 @@
 static int
 rk3328_clk_pll_init(struct clknode *clk, device_t dev)
 {
-	struct rk_clk_pll_sc *sc;
-
-	sc = clknode_get_softc(clk);
-
 	clknode_init_parent_idx(clk, 0);
 
 	return (0);
@@ -585,9 +581,6 @@
 static int
 rk3399_clk_pll_init(struct clknode *clk, device_t dev)
 {
-	struct rk_clk_pll_sc *sc;
-
-	sc = clknode_get_softc(clk);
 	clknode_init_parent_idx(clk, 0);
 
 	return (0);
diff --git a/sys/arm64/rockchip/rk_i2s.c b/sys/arm64/rockchip/rk_i2s.c
--- a/sys/arm64/rockchip/rk_i2s.c
+++ b/sys/arm64/rockchip/rk_i2s.c
@@ -404,13 +404,14 @@
 		uint8_t *samples;
 		uint32_t count, size, readyptr, written;
 		count = sndbuf_getready(play_buf);
+		if (count > FIFO_SIZE - 1)
+			count = FIFO_SIZE - 1;
 		size = sndbuf_getsize(play_buf);
 		readyptr = sndbuf_getreadyptr(play_buf);
 
-		/* FIXME: check actual count size */
 		samples = (uint8_t*)sndbuf_getbuf(play_buf);
 		written = 0;
-		for (; level < FIFO_SIZE - 1; level++) {
+		for (; level < count; level++) {
 			val  = (samples[readyptr++ % size] << 0);
 			val |= (samples[readyptr++ % size] << 8);
 			val |= (samples[readyptr++ % size] << 16);
diff --git a/sys/arm64/rockchip/rk_pinctrl.c b/sys/arm64/rockchip/rk_pinctrl.c
--- a/sys/arm64/rockchip/rk_pinctrl.c
+++ b/sys/arm64/rockchip/rk_pinctrl.c
@@ -1117,7 +1117,7 @@
 {
 	struct rk_pinctrl_softc *sc;
 	struct syscon *syscon;
-	uint32_t reg, mask, bit;
+	uint32_t reg, bit;
 	uint32_t bias;
 	int bank;
 	int rv = 0;
@@ -1141,7 +1141,6 @@
 	reg = sc->conf->get_pd_offset(sc, bank);
 	reg += bank * 0x10 + ((pin / 8) * 0x4);
 	bit = (pin % 8) * 2;
-	mask = (0x3 << bit) << 16;
 	reg = SYSCON_READ_4(syscon, reg);
 	reg = (reg >> bit) & 0x3;
 	bias = sc->conf->resolv_bias_value(bank, reg);