Index: sys/dev/e1000/e1000_defines.h =================================================================== --- sys/dev/e1000/e1000_defines.h +++ sys/dev/e1000/e1000_defines.h @@ -428,11 +428,12 @@ #define E1000_SCTL_ENABLE_SERDES_LOOPBACK 0x0410 /* Receive Checksum Control */ -#define E1000_RXCSUM_IPOFL 0x00000100 /* IPv4 checksum offload */ -#define E1000_RXCSUM_TUOFL 0x00000200 /* TCP / UDP checksum offload */ -#define E1000_RXCSUM_CRCOFL 0x00000800 /* CRC32 offload enable */ -#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */ -#define E1000_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */ +#define E1000_RXCSUM_IPOFL 0x00000100 /* IPv4 checksum offload */ +#define E1000_RXCSUM_TUOFL 0x00000200 /* TCP / UDP checksum offload */ +#define E1000_RXCSUM_IPV6OFL 0x00000400 /* lem(4) IPv6 checksum offload */ +#define E1000_RXCSUM_CRCOFL 0x00000800 /* CRC32 offload enable */ +#define E1000_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */ +#define E1000_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */ /* Header split receive */ #define E1000_RFCTL_NFSW_DIS 0x00000040 Index: sys/dev/e1000/if_em.c =================================================================== --- sys/dev/e1000/if_em.c +++ sys/dev/e1000/if_em.c @@ -2736,6 +2736,11 @@ struct e1000_hw *hw = &adapter->hw; int i; + /* RSS hash reported in the Rx descriptor */ + rxcsum = E1000_READ_REG(hw, E1000_RXCSUM); + rxcsum |= E1000_RXCSUM_PCSD; + E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum); + /* * Configure RSS key */ @@ -2778,6 +2783,11 @@ u32 reta; u32 rss_key[10], mrqc, shift = 0; + /* RSS hash reported in the Rx descriptor */ + rxcsum = E1000_READ_REG(hw, E1000_RXCSUM); + rxcsum |= E1000_RXCSUM_PCSD; + E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum); + /* XXX? */ if (hw->mac.type == e1000_82575) shift = 6; @@ -3246,28 +3256,18 @@ } rxcsum = E1000_READ_REG(hw, E1000_RXCSUM); - if (if_getcapenable(ifp) & IFCAP_RXCSUM && - hw->mac.type >= e1000_82543) { - if (adapter->tx_num_queues > 1) { - if (hw->mac.type >= igb_mac_min) { - rxcsum |= E1000_RXCSUM_PCSD; - if (hw->mac.type != e1000_82575) - rxcsum |= E1000_RXCSUM_CRCOFL; - } else - rxcsum |= E1000_RXCSUM_TUOFL | - E1000_RXCSUM_IPOFL | - E1000_RXCSUM_PCSD; - } else { - if (hw->mac.type >= igb_mac_min) - rxcsum |= E1000_RXCSUM_IPPCSE; - else - rxcsum |= E1000_RXCSUM_TUOFL | E1000_RXCSUM_IPOFL; - if (hw->mac.type > e1000_82575) - rxcsum |= E1000_RXCSUM_CRCOFL; - } - } else - rxcsum &= ~E1000_RXCSUM_TUOFL; - + if (scctx->isc_capenable & IFCAP_RXCSUM) { + rxcsum |= E1000_RXCSUM_TUOFL | E1000_RXCSUM_IPOFL; + if (hw->mac.type > e1000_82575) + rxcsum |= E1000_RXCSUM_CRCOFL; + else if (hw->mac.type < em_mac_min && + scctx->isc_capenable & IFCAP_HWCSUM_IPV6) + rxcsum |= E1000_RXCSUM_IPV6OFL; + } else { + rxcsum &= ~(E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL); + if (hw->mac.type < em_mac_min) + rxcsum &= ~E1000_RXCSUM_IPV6OFL; + } E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum); if (adapter->rx_num_queues > 1) {