Index: sys/dev/sdhci/sdhci_fsl_fdt.c
===================================================================
--- sys/dev/sdhci/sdhci_fsl_fdt.c
+++ sys/dev/sdhci/sdhci_fsl_fdt.c
@@ -45,6 +45,7 @@
 #include <dev/extres/clk/clk.h>
 #include <dev/mmc/bridge.h>
 #include <dev/mmc/mmcbrvar.h>
+#include <dev/mmc/mmc_fdt_helpers.h>
 #include <dev/ofw/ofw_bus.h>
 #include <dev/ofw/ofw_bus_subr.h>
 #include <dev/sdhci/sdhci.h>
@@ -101,6 +102,7 @@
 	bool					slot_init_done;
 	uint32_t				cmd_and_mode;
 	uint16_t				sdclk_bits;
+	struct mmc_fdt_helper			fdt_helper;
 
 	uint32_t (* read)(struct sdhci_fsl_fdt_softc *, bus_size_t);
 	void (* write)(struct sdhci_fsl_fdt_softc *, bus_size_t, uint32_t);
@@ -463,6 +465,19 @@
 	return (sdhci_fdt_gpio_get_present(sc->gpio));
 }
 
+static void
+sdhci_fsl_fdt_of_parse(device_t dev)
+{
+	struct sdhci_fsl_fdt_softc *sc;
+	phandle_t node;
+
+	sc = device_get_softc(dev);
+	node = ofw_bus_get_node(dev);
+
+	/* Call mmc_fdt_parse in order to get mmc related properties. */
+	mmc_fdt_parse(dev, node, &sc->fdt_helper, &sc->slot.host);
+}
+
 static int
 sdhci_fsl_fdt_attach(device_t dev)
 {
@@ -534,6 +549,8 @@
 		buf_order = SDHCI_FSL_PROT_CTRL_BYTE_SWAP;
 	}
 
+	sdhci_fsl_fdt_of_parse(dev);
+
 	/*
 	 * Setting this register affects byte order in SDHCI_BUFFER only.
 	 * If the eSDHC block is connected over a big-endian bus, the data