Index: head/sys/conf/files.powerpc =================================================================== --- head/sys/conf/files.powerpc +++ head/sys/conf/files.powerpc @@ -99,7 +99,6 @@ libkern/ucmpdi2.c optional powerpc libkern/udivdi3.c optional powerpc libkern/umoddi3.c optional powerpc -powerpc/aim/interrupt.c optional aim powerpc/aim/locore.S optional aim no-obj powerpc/aim/aim_machdep.c optional aim powerpc/aim/mmu_oea.c optional aim powerpc @@ -108,7 +107,6 @@ powerpc/aim/moea64_native.c optional aim powerpc/aim/mp_cpudep.c optional aim powerpc/aim/slb.c optional aim powerpc64 -powerpc/booke/interrupt.c optional booke powerpc/booke/locore.S optional booke no-obj powerpc/booke/booke_machdep.c optional booke powerpc/booke/machdep_e500.c optional booke_e500 @@ -197,6 +195,7 @@ powerpc/powerpc/fuswintr.c standard powerpc/powerpc/gdb_machdep.c optional gdb powerpc/powerpc/in_cksum.c optional inet | inet6 +powerpc/powerpc/interrupt.c standard powerpc/powerpc/intr_machdep.c standard powerpc/powerpc/iommu_if.m standard powerpc/powerpc/machdep.c standard Index: head/sys/powerpc/aim/interrupt.c =================================================================== --- head/sys/powerpc/aim/interrupt.c +++ head/sys/powerpc/aim/interrupt.c @@ -1,122 +0,0 @@ -/*- - * Copyright 2002 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * Interrupts are dispatched to here from locore asm - */ - -#include "opt_hwpmc_hooks.h" - -#include /* RCS ID & Copyright macro defns */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef HWPMC_HOOKS -#include -#endif -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "pic_if.h" - -/* - * A very short dispatch, to try and maximise assembler code use - * between all exception types. Maybe 'true' interrupts should go - * here, and the trap code can come in separately - */ -void -powerpc_interrupt(struct trapframe *framep) -{ - struct thread *td; - struct trapframe *oldframe; - register_t ee; - - td = curthread; - - CTR2(KTR_INTR, "%s: EXC=%x", __func__, framep->exc); - - switch (framep->exc) { - case EXC_EXI: - critical_enter(); - PIC_DISPATCH(root_pic, framep); - critical_exit(); - break; - - case EXC_DECR: - critical_enter(); - atomic_add_int(&td->td_intr_nesting_level, 1); - oldframe = td->td_intr_frame; - td->td_intr_frame = framep; - decr_intr(framep); - td->td_intr_frame = oldframe; - atomic_subtract_int(&td->td_intr_nesting_level, 1); - critical_exit(); - break; -#ifdef HWPMC_HOOKS - case EXC_PERF: - critical_enter(); - KASSERT(pmc_intr != NULL, ("Performance exception, but no handler!")); - (*pmc_intr)(PCPU_GET(cpuid), framep); - if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN)) - pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, framep); - critical_exit(); - break; -#endif - - default: - /* Re-enable interrupts if applicable. */ - ee = framep->srr1 & PSL_EE; - if (ee != 0) - mtmsr(mfmsr() | ee); - trap(framep); - } -} Index: head/sys/powerpc/booke/interrupt.c =================================================================== --- head/sys/powerpc/booke/interrupt.c +++ head/sys/powerpc/booke/interrupt.c @@ -1,169 +0,0 @@ -/*- - * Copyright (C) 2006 Semihalf, Rafal Jaworowski - * Copyright 2002 by Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -/* - * Interrupts are dispatched to here from locore asm - */ - -#include "opt_hwpmc_hooks.h" - -#include /* RCS ID & Copyright macro defns */ -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef HWPMC_HOOKS -#include -#endif -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "pic_if.h" - -extern void decr_intr(struct trapframe *); - -void powerpc_decr_interrupt(struct trapframe *); -void powerpc_extr_interrupt(struct trapframe *); -void powerpc_crit_interrupt(struct trapframe *); -void powerpc_mchk_interrupt(struct trapframe *); -#ifdef HWPMC_HOOKS -void powerpc_pmc_interrupt(struct trapframe *framep); -#endif - -static void dump_frame(struct trapframe *framep); - -static void -dump_frame(struct trapframe *frame) -{ - int i; - - printf("\n*** *** STACK FRAME DUMP *** ***\n"); - printf(" exc = 0x%x\n", frame->exc); - printf(" srr0 = 0x%08x\n", frame->srr0); - printf(" srr1 = 0x%08x\n", frame->srr1); - printf(" dear = 0x%08x\n", frame->dar); - printf(" esr = 0x%08x\n", frame->cpu.booke.esr); - printf(" lr = 0x%08x\n", frame->lr); - printf(" cr = 0x%08x\n", frame->cr); - printf(" sp = 0x%08x\n", frame->fixreg[1]); - - for (i = 0; i < 32; i++) { - printf(" R%02d = 0x%08x", i, frame->fixreg[i]); - if ((i & 0x3) == 3) - printf("\n"); - } - printf("\n"); -} - -void powerpc_crit_interrupt(struct trapframe *framep) -{ - - printf("powerpc_crit_interrupt: critical interrupt!\n"); - dump_frame(framep); - trap(framep); -} - -void powerpc_mchk_interrupt(struct trapframe *framep) -{ - - printf("powerpc_mchk_interrupt: machine check interrupt!\n"); - dump_frame(framep); - trap(framep); -} - -/* - * Decrementer interrupt routine - */ -void -powerpc_decr_interrupt(struct trapframe *framep) -{ - struct thread *td; - struct trapframe *oldframe; - - td = curthread; - critical_enter(); - atomic_add_int(&td->td_intr_nesting_level, 1); - oldframe = td->td_intr_frame; - td->td_intr_frame = framep; - decr_intr(framep); - td->td_intr_frame = oldframe; - atomic_subtract_int(&td->td_intr_nesting_level, 1); - critical_exit(); - framep->srr1 &= ~PSL_WE; -} - -/* - * External input interrupt routine - */ -void -powerpc_extr_interrupt(struct trapframe *framep) -{ - - critical_enter(); - PIC_DISPATCH(root_pic, framep); - critical_exit(); - framep->srr1 &= ~PSL_WE; -} - -#ifdef HWPMC_HOOKS -/* - * Performance Counter interrupt routine - */ -void -powerpc_pmc_interrupt(struct trapframe *framep) -{ - - critical_enter(); - KASSERT(pmc_intr != NULL, ("Performance exception, but no handler!")); - (*pmc_intr)(PCPU_GET(cpuid), framep); - critical_exit(); - if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN)) - pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, framep); -} -#endif Index: head/sys/powerpc/booke/trap_subr.S =================================================================== --- head/sys/powerpc/booke/trap_subr.S +++ head/sys/powerpc/booke/trap_subr.S @@ -401,7 +401,7 @@ STANDARD_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1) FRAME_SETUP(SPR_SPRG2, PC_BOOKE_CRITSAVE, EXC_CRIT) addi %r3, %r1, 8 - bl CNAME(powerpc_crit_interrupt) + bl CNAME(powerpc_interrupt) FRAME_LEAVE(SPR_CSRR0, SPR_CSRR1) rfci @@ -413,7 +413,7 @@ STANDARD_PROLOG(SPR_SPRG3, PC_BOOKE_MCHKSAVE, SPR_MCSRR0, SPR_MCSRR1) FRAME_SETUP(SPR_SPRG3, PC_BOOKE_MCHKSAVE, EXC_MCHK) addi %r3, %r1, 8 - bl CNAME(powerpc_mchk_interrupt) + bl CNAME(powerpc_interrupt) FRAME_LEAVE(SPR_MCSRR0, SPR_MCSRR1) rfmci @@ -443,8 +443,8 @@ STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_EXI) addi %r3, %r1, 8 - bl CNAME(powerpc_extr_interrupt) - b trapexit + bl CNAME(powerpc_interrupt) + b clear_we INTERRUPT(int_alignment) @@ -475,8 +475,8 @@ STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_DECR) addi %r3, %r1, 8 - bl CNAME(powerpc_decr_interrupt) - b trapexit + bl CNAME(powerpc_interrupt) + b clear_we /***************************************************************************** @@ -505,7 +505,7 @@ STANDARD_PROLOG(SPR_SPRG3, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) FRAME_SETUP(SPR_SPRG3, PC_TEMPSAVE, EXC_PERF) addi %r3, %r1, 8 - bl CNAME(powerpc_pmc_interrupt) + bl CNAME(powerpc_interrupt) b trapexit #endif @@ -879,6 +879,12 @@ rfi #endif /* KDB */ +clear_we: + lwz %r3, (FRAME_SRR1+8)(%r1) + rlwinm %r3, %r3, 0, 14, 12 + stw %r3, (FRAME_SRR1+8)(%r1) + b trapexit + #ifdef SMP ENTRY(tlb_lock) GET_CPUINFO(%r5) Index: head/sys/powerpc/powerpc/interrupt.c =================================================================== --- head/sys/powerpc/powerpc/interrupt.c +++ head/sys/powerpc/powerpc/interrupt.c @@ -0,0 +1,122 @@ +/*- + * Copyright 2002 by Peter Grehan. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* + * Interrupts are dispatched to here from locore asm + */ + +#include "opt_hwpmc_hooks.h" + +#include /* RCS ID & Copyright macro defns */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef HWPMC_HOOKS +#include +#endif +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pic_if.h" + +/* + * A very short dispatch, to try and maximise assembler code use + * between all exception types. Maybe 'true' interrupts should go + * here, and the trap code can come in separately + */ +void +powerpc_interrupt(struct trapframe *framep) +{ + struct thread *td; + struct trapframe *oldframe; + register_t ee; + + td = curthread; + + CTR2(KTR_INTR, "%s: EXC=%x", __func__, framep->exc); + + switch (framep->exc) { + case EXC_EXI: + critical_enter(); + PIC_DISPATCH(root_pic, framep); + critical_exit(); + break; + + case EXC_DECR: + critical_enter(); + atomic_add_int(&td->td_intr_nesting_level, 1); + oldframe = td->td_intr_frame; + td->td_intr_frame = framep; + decr_intr(framep); + td->td_intr_frame = oldframe; + atomic_subtract_int(&td->td_intr_nesting_level, 1); + critical_exit(); + break; +#ifdef HWPMC_HOOKS + case EXC_PERF: + critical_enter(); + KASSERT(pmc_intr != NULL, ("Performance exception, but no handler!")); + (*pmc_intr)(PCPU_GET(cpuid), framep); + if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN)) + pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, framep); + critical_exit(); + break; +#endif + + default: + /* Re-enable interrupts if applicable. */ + ee = framep->srr1 & PSL_EE; + if (ee != 0) + mtmsr(mfmsr() | ee); + trap(framep); + } +}