Index: share/man/man3/siginfo.3
===================================================================
--- share/man/man3/siginfo.3
+++ share/man/man3/siginfo.3
@@ -27,7 +27,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd July 28, 2020
+.Dd February 16, 2021
 .Dt SIGINFO 3
 .Os
 .Sh NAME
@@ -218,6 +218,10 @@
 may report the address of the faulting memory access (if available) in
 .Va si_addr
 instead.
+Additionally, on some platforms, SIGTRAP raised by a hardware watchpoint
+exception will report the data address that triggered the watchpoint in
+.Va si_addr .
+Notably, this is the case on arm64, but not on amd64 or i386.
 .Pp
 Sychronous signals set
 .Va si_trapno
Index: sys/arm64/arm64/trap.c
===================================================================
--- sys/arm64/arm64/trap.c
+++ sys/arm64/arm64/trap.c
@@ -474,6 +474,7 @@
 	case EXCP_UNKNOWN:
 	case EXCP_DATA_ABORT_L:
 	case EXCP_DATA_ABORT:
+	case EXCP_WATCHPT_EL0:
 		far = READ_SPECIALREG(far_el1);
 		break;
 	}
@@ -534,6 +535,11 @@
 		    exception);
 		userret(td, frame);
 		break;
+	case EXCP_WATCHPT_EL0:
+		call_trapsignal(td, SIGTRAP, TRAP_TRACE, (void *)far,
+		    exception);
+		userret(td, frame);
+		break;
 	case EXCP_MSR:
 		/*
 		 * The CPU can raise EXCP_MSR when userspace executes an mrs
Index: sys/arm64/include/armreg.h
===================================================================
--- sys/arm64/include/armreg.h
+++ sys/arm64/include/armreg.h
@@ -230,6 +230,7 @@
 #define	 EXCP_BRKPT_EL0		0x30	/* Hardware breakpoint, from same EL */
 #define	 EXCP_SOFTSTP_EL0	0x32	/* Software Step, from lower EL */
 #define	 EXCP_SOFTSTP_EL1	0x33	/* Software Step, from same EL */
+#define	 EXCP_WATCHPT_EL0	0x34	/* Watchpoint, from lower EL */
 #define	 EXCP_WATCHPT_EL1	0x35	/* Watchpoint, from same EL */
 #define	 EXCP_BRK		0x3c	/* Breakpoint */