Much of this effort has been focused on preparing CheriBSD on CHERI-RISC-V for inclusion as a demonstrator system in DARPA's Finding -Exploits to Thwart Tampering (FETT Bug Bounty -program). +Exploits to Thwart Tampering (FETT) Bug Bounty +program.
In addition, work has begun this quarter on porting CheriBSD to Arm's Morello SoC. Morello is a prototype demonstrator board which adds CHERI diff --git a/en_US.ISO8859-1/htdocs/news/status/report-2020-07-2020-09.xml b/en_US.ISO8859-1/htdocs/news/status/report-2020-07-2020-09.xml --- a/en_US.ISO8859-1/htdocs/news/status/report-2020-07-2020-09.xml +++ b/en_US.ISO8859-1/htdocs/news/status/report-2020-07-2020-09.xml @@ -1808,14 +1808,14 @@
We have released [Capability Hardware Enhanced RISC Instructions: CHERI - Instruction-Set Architecture (Version 8)](https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-951.pdf). +
We have released Capability + Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 8). Notable changes include promotion of CHERI-RISC-V to non-experimental and discussion of Arm's Morello prototype.
We have developed a set of [Adversarial CHERI Exercises and - Missions](https://ctsrd-cheri.github.io/cheri-exercises) to introduce security +
We have developed a set of Adversarial + CHERI Exercises and Missions to introduce security researchers to CHERI protections.