Index: sys/arm/arm/pmu.c =================================================================== --- sys/arm/arm/pmu.c +++ sys/arm/arm/pmu.c @@ -60,7 +60,7 @@ #include #include -#ifdef notyet +#if defined(__aarch64__) && defined(FDT) #define MAX_RLEN 8 #else #define MAX_RLEN 1 @@ -74,8 +74,7 @@ static struct resource_spec pmu_spec[] = { { SYS_RES_IRQ, 0, RF_ACTIVE }, - /* We don't currently handle pmu events, other than on cpu 0 */ -#ifdef notyet +#if defined(__aarch64__) && defined(FDT) { SYS_RES_IRQ, 1, RF_ACTIVE | RF_OPTIONAL }, { SYS_RES_IRQ, 2, RF_ACTIVE | RF_OPTIONAL }, { SYS_RES_IRQ, 3, RF_ACTIVE | RF_OPTIONAL }, @@ -137,12 +136,30 @@ #if defined(__arm__) && (__ARM_ARCH > 6) uint32_t iesr; #endif +#if defined(__aarch64__) && defined(FDT) + int ncpus; + phandle_t node; + phandle_t *cpus; + device_t cpudev; + int cpuid; +#endif int err; int i; sc = device_get_softc(dev); sc->dev = dev; +#if defined(__aarch64__) && defined(FDT) + ncpus = 0; + cpus = NULL; + node = ofw_bus_get_node(dev); + if (node != 0) + ncpus = OF_getencprop_alloc_multi(node, "interrupt-affinity", + sizeof(*cpus), (void **)&cpus); + if (ncpus < 0) + ncpus = 0; +#endif + if (bus_alloc_resources(dev, pmu_spec, sc->res)) { device_printf(dev, "could not allocate resources\n"); return (ENXIO); @@ -159,8 +176,28 @@ device_printf(dev, "Unable to setup interrupt handler.\n"); return (ENXIO); } +#if defined(__aarch64__) && defined(FDT) + if (i < ncpus) { + cpudev = OF_device_from_xref(cpus[i]); + if (cpudev) { + cpuid = device_get_unit(cpudev); + if (bootverbose) + device_printf(dev, + "affinity entry #%d -> CPU%d\n", + i, cpuid); + bus_bind_intr(dev, sc->res[i], cpuid); + } else + device_printf(dev, + "could not get CPU for entry #%d\n", i); + } +#endif } +#if defined(__aarch64__) && defined(FDT) + if (cpus) + OF_prop_free(cpus); +#endif + #if defined(__arm__) && (__ARM_ARCH > 6) /* Initialize to 0. */ for (i = 0; i < MAXCPU; i++) @@ -181,6 +218,7 @@ #ifdef FDT static struct ofw_compat_data compat_data[] = { {"arm,armv8-pmuv3", 1}, + {"arm,cortex-a53-pmu", 1}, {"arm,cortex-a17-pmu", 1}, {"arm,cortex-a15-pmu", 1}, {"arm,cortex-a12-pmu", 1}, Index: sys/dev/ofw/ofw_cpu.c =================================================================== --- sys/dev/ofw/ofw_cpu.c +++ sys/dev/ofw/ofw_cpu.c @@ -205,6 +205,7 @@ struct ofw_cpulist_softc *psc; struct ofw_cpu_softc *sc; phandle_t node; + intptr_t xref; pcell_t cell; int rv; #ifdef EXT_RESOURCES @@ -299,6 +300,11 @@ if (sc->sc_nominal_mhz != 0 && bootverbose) device_printf(dev, "Nominal frequency %dMhz\n", sc->sc_nominal_mhz); + + xref = OF_xref_from_node(node); + /* Register xref */ + OF_device_register_xref(xref, dev); + bus_generic_probe(dev); return (bus_generic_attach(dev)); }