Index: head/sys/dev/iommu/busdma_iommu.c
===================================================================
--- head/sys/dev/iommu/busdma_iommu.c
+++ head/sys/dev/iommu/busdma_iommu.c
@@ -326,6 +326,26 @@
 	return (true);
 }
 
+void
+iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno)
+{
+
+	MPASS(busno <= PCI_BUSMAX);
+	IOMMU_LOCK(unit);
+	unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] |=
+	    1 << (busno % (NBBY * sizeof(uint32_t)));
+	IOMMU_UNLOCK(unit);
+}
+
+bool
+iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno)
+{
+
+	MPASS(busno <= PCI_BUSMAX);
+	return ((unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] &
+	    (1U << (busno % (NBBY * sizeof(uint32_t))))) != 0);
+}
+
 static MALLOC_DEFINE(M_IOMMU_DMAMAP, "iommu_dmamap", "IOMMU DMA Map");
 
 static void iommu_bus_schedule_dmamap(struct iommu_unit *unit,
Index: head/sys/dev/iommu/iommu.h
===================================================================
--- head/sys/dev/iommu/iommu.h
+++ head/sys/dev/iommu/iommu.h
@@ -221,6 +221,13 @@
 int iommu_gas_reserve_region(struct iommu_domain *domain, iommu_gaddr_t start,
     iommu_gaddr_t end);
 
+void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno);
+bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno);
+
+bool bus_dma_iommu_set_buswide(device_t dev);
+int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
+    vm_paddr_t start, vm_size_t length, int flags);
+
 SYSCTL_DECL(_hw_iommu);
 
 #endif /* !_SYS_IOMMU_H_ */
Index: head/sys/x86/include/bus_dma.h
===================================================================
--- head/sys/x86/include/bus_dma.h
+++ head/sys/x86/include/bus_dma.h
@@ -191,11 +191,5 @@
 	return (tc->impl->map_complete(dmat, map, segs, nsegs, error));
 }
 
-#ifdef _KERNEL
-bool bus_dma_iommu_set_buswide(device_t dev);
-int bus_dma_iommu_load_ident(bus_dma_tag_t dmat, bus_dmamap_t map,
-    vm_paddr_t start, vm_size_t length, int flags);
-#endif
-
 #endif /* !_X86_BUS_DMA_H_ */
 
Index: head/sys/x86/iommu/intel_dmar.h
===================================================================
--- head/sys/x86/iommu/intel_dmar.h
+++ head/sys/x86/iommu/intel_dmar.h
@@ -281,9 +281,6 @@
 int dmar_init_irt(struct dmar_unit *unit);
 void dmar_fini_irt(struct dmar_unit *unit);
 
-void iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno);
-bool iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno);
-
 extern iommu_haddr_t dmar_high;
 extern int haw;
 extern int dmar_tbl_pagecnt;
Index: head/sys/x86/iommu/intel_drv.c
===================================================================
--- head/sys/x86/iommu/intel_drv.c
+++ head/sys/x86/iommu/intel_drv.c
@@ -592,26 +592,6 @@
 DRIVER_MODULE(dmar, acpi, dmar_driver, dmar_devclass, 0, 0);
 MODULE_DEPEND(dmar, acpi, 1, 1, 1);
 
-void
-iommu_set_buswide_ctx(struct iommu_unit *unit, u_int busno)
-{
-
-	MPASS(busno <= PCI_BUSMAX);
-	IOMMU_LOCK(unit);
-	unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] |=
-	    1 << (busno % (NBBY * sizeof(uint32_t)));
-	IOMMU_UNLOCK(unit);
-}
-
-bool
-iommu_is_buswide_ctx(struct iommu_unit *unit, u_int busno)
-{
-
-	MPASS(busno <= PCI_BUSMAX);
-	return ((unit->buswide_ctxs[busno / NBBY / sizeof(uint32_t)] &
-	    (1U << (busno % (NBBY * sizeof(uint32_t))))) != 0);
-}
-
 static void
 dmar_print_path(int busno, int depth, const ACPI_DMAR_PCI_PATH *path)
 {