riscv pmap: zero reserved pte bits in ppn

[freebsdphab-AX9_cmx.ietfng.org]

Summary

The top 10 bits of a pte are reserved by specification and are not part of the PPN

[kp]

For those playing along at home, from 'Volume II: RISC-V Privileged Architectures V20190608-Priv-MSU-Ratified', '4.4.1 Addressing and Memory Protection', page 72: "The PTE format for Sv39 is shown in Figure 4.18. Bits 9–0 have the same meaning as for Sv32. Bits 63–54 are reserved for future use and must be zeroed by software for forward compatibility.".

[mhorne]

sys/riscv/riscv/pmap.c

362 ↗

(On Diff #73923)

I'd prefer to see a definition for the constant placed in pte.h, something like PTE_MASK.
Also, rather than splitting the expression in the middle, you could do:

#define PTE_TO_PHYS(pte) \
    ((((pte) & PTE_MASK) >> PTE_PPN0_S) * PAGE_SIZE)

(The second line has a 4-space indent)

[freebsdphab-AX9_cmx.ietfng.org]

Feedback from mhorne.

[kp]

@mhorne Do you want to commit or shall I?

[mhorne]

In D25523#564539, @kp wrote:

@mhorne Do you want to commit or shall I?

Would you? Alongside D25524 if you don't mind.