Index: head/sys/mips/include/proc.h
===================================================================
--- head/sys/mips/include/proc.h
+++ head/sys/mips/include/proc.h
@@ -64,7 +64,6 @@
 	int		md_pc_count;	/* performance counter */
 	int		md_pc_spill;	/* performance counter spill */
 	void		*md_tls;
-	size_t		md_tls_tcb_offset;	/* TCB offset */
 #ifdef	CPU_CNMIPS
 	struct octeon_cop2_state	*md_cop2; /* kernel context */
 	struct octeon_cop2_state	*md_ucop2; /* userland context */
@@ -79,8 +78,7 @@
 #define	MDTD_COP2USED	0x0002		/* Process used the COP2 */
 
 struct mdproc {
-	/* Avoid empty structs because they are undefined behavior. */
-	long	md_spare;
+	size_t		md_tls_tcb_offset;	/* TCB offset */
 };
 
 struct syscall_args {
Index: head/sys/mips/mips/genassym.c
===================================================================
--- head/sys/mips/mips/genassym.c
+++ head/sys/mips/mips/genassym.c
@@ -70,13 +70,15 @@
 #endif
 
 ASSYM(TD_PCB, offsetof(struct thread, td_pcb));
+ASSYM(TD_PROC, offsetof(struct thread, td_proc));
 ASSYM(TD_UPTE, offsetof(struct thread, td_md.md_upte));
 ASSYM(TD_KSTACK, offsetof(struct thread, td_kstack));
 ASSYM(TD_FLAGS, offsetof(struct thread, td_flags));
 ASSYM(TD_LOCK, offsetof(struct thread, td_lock));
 ASSYM(TD_MDFLAGS, offsetof(struct thread, td_md.md_flags));
 ASSYM(TD_MDTLS, offsetof(struct thread, td_md.md_tls));
-ASSYM(TD_MDTLS_TCB_OFFSET, offsetof(struct thread, td_md.md_tls_tcb_offset));
+
+ASSYM(P_MDTLS_TCB_OFFSET, offsetof(struct proc, p_md.md_tls_tcb_offset));
 
 ASSYM(U_PCB_REGS, offsetof(struct pcb, pcb_regs.zero));
 ASSYM(U_PCB_CONTEXT, offsetof(struct pcb, pcb_context));
Index: head/sys/mips/mips/pm_machdep.c
===================================================================
--- head/sys/mips/mips/pm_machdep.c
+++ head/sys/mips/mips/pm_machdep.c
@@ -473,12 +473,15 @@
 	    PCPU_SET(fpcurthread, (struct thread *)0);
 	td->td_md.md_ss_addr = 0;
 
+	td->td_md.md_tls = NULL;
 #ifdef COMPAT_FREEBSD32
 	if (!SV_PROC_FLAG(td->td_proc, SV_LP64))
-		td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE32;
+		td->td_proc->p_md.md_tls_tcb_offset = TLS_TP_OFFSET +
+		    TLS_TCB_SIZE32;
 	else
 #endif
-		td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE;
+		td->td_proc->p_md.md_tls_tcb_offset = TLS_TP_OFFSET +
+		    TLS_TCB_SIZE;
 }
 
 int
Index: head/sys/mips/mips/swtch.S
===================================================================
--- head/sys/mips/mips/swtch.S
+++ head/sys/mips/mips/swtch.S
@@ -386,7 +386,8 @@
 	.globl	cpu_switch_set_userlocal
 cpu_switch_set_userlocal:
 	PTR_L	t0, TD_MDTLS(a1)		# Get TLS pointer
-	PTR_L	t1, TD_MDTLS_TCB_OFFSET(a1)	# Get TLS/TCB offset
+	PTR_L	t1, TD_PROC(a1)
+	PTR_L	t1, P_MDTLS_TCB_OFFSET(t1)	# Get TLS/TCB offset
 	PTR_ADDU v0, t0, t1
 	MTC0	v0, MIPS_COP_0_USERLOCAL, 2	# write it to ULR for rdhwr
 
Index: head/sys/mips/mips/sys_machdep.c
===================================================================
--- head/sys/mips/mips/sys_machdep.c
+++ head/sys/mips/mips/sys_machdep.c
@@ -72,7 +72,7 @@
 		 */
 		if (cpuinfo.userlocal_reg == true) {
 			mips_wr_userlocal((unsigned long)(uap->parms +
-			    td->td_md.md_tls_tcb_offset));
+			    td->td_proc->p_md.md_tls_tcb_offset));
 		}
 		return (0);
 	case MIPS_GET_TLS: 
Index: head/sys/mips/mips/trap.c
===================================================================
--- head/sys/mips/mips/trap.c
+++ head/sys/mips/mips/trap.c
@@ -902,7 +902,7 @@
 					if (inst.RType.rd == 29) {
 						frame_regs = &(trapframe->zero);
 						frame_regs[inst.RType.rt] = (register_t)(intptr_t)td->td_md.md_tls;
-						frame_regs[inst.RType.rt] += td->td_md.md_tls_tcb_offset;
+						frame_regs[inst.RType.rt] += td->td_proc->p_md.md_tls_tcb_offset;
 						trapframe->pc += sizeof(int);
 						goto out;
 					}
Index: head/sys/mips/mips/vm_machdep.c
===================================================================
--- head/sys/mips/mips/vm_machdep.c
+++ head/sys/mips/mips/vm_machdep.c
@@ -141,7 +141,7 @@
 	 */
 
 	td2->td_md.md_tls = td1->td_md.md_tls;
-	td2->td_md.md_tls_tcb_offset = td1->td_md.md_tls_tcb_offset;
+	p2->p_md.md_tls_tcb_offset = td1->td_proc->p_md.md_tls_tcb_offset;
 	td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
 	td2->td_md.md_spinlock_count = 1;
 #ifdef CPU_CNMIPS
@@ -403,6 +403,7 @@
 	                          (MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) |
 	                          (MIPS_SR_INT_IE | MIPS_HARD_INT_MASK));
 #endif
+	td->td_md.md_tls = NULL;
 }
 
 /*
@@ -473,16 +474,10 @@
 cpu_set_user_tls(struct thread *td, void *tls_base)
 {
 
-#if defined(__mips_n64) && defined(COMPAT_FREEBSD32)
-	if (td->td_proc && SV_PROC_FLAG(td->td_proc, SV_ILP32))
-		td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE32;
-	else
-#endif
-	td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE;
 	td->td_md.md_tls = (char*)tls_base;
 	if (td == curthread && cpuinfo.userlocal_reg == true) {
 		mips_wr_userlocal((unsigned long)tls_base +
-		    td->td_md.md_tls_tcb_offset);
+		    td->td_proc->p_md.md_tls_tcb_offset);
 	}
 
 	return (0);