Index: sys/x86/x86/io_apic.c
===================================================================
--- sys/x86/x86/io_apic.c
+++ sys/x86/x86/io_apic.c
@@ -94,7 +94,7 @@
 struct ioapic {
 	struct pic io_pic;
 	u_int io_id:8;			/* logical ID */
-	u_int io_apic_id:4;
+	u_int io_apic_id:8;
 	u_int io_intbase:8;		/* System Interrupt base */
 	u_int io_numintr:8;
 	u_int io_haseoi:1;
@@ -192,8 +192,11 @@
 		low1 |= IOART_TRGREDG | IOART_INTMSET;
 		ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(src->io_intpin),
 		    low1);
+		low1 = src->io_lowreg;
+		if (src->io_masked != 0)
+			low1 |= IOART_INTMSET;
 		ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(src->io_intpin),
-		    src->io_lowreg);
+		    low1);
 		if (!locked)
 			mtx_unlock_spin(&icu_lock);
 	}
@@ -610,7 +613,7 @@
 	struct ioapic *io;
 	struct ioapic_intsrc *intpin;
 	volatile ioapic_t *apic;
-	u_int numintr, i;
+	u_int numintr, i, old_id;
 	uint32_t value;
 
 	/* Map the register window so we can access the device. */
@@ -636,11 +639,12 @@
 	io->io_id = next_id++;
 	io->io_apic_id = ioapic_read(apic, IOAPIC_ID) >> APIC_ID_SHIFT;
 	if (apic_id != -1 && io->io_apic_id != apic_id) {
+		old_id = io->io_apic_id;
 		ioapic_write(apic, IOAPIC_ID, apic_id << APIC_ID_SHIFT);
-		mtx_unlock_spin(&icu_lock);
 		io->io_apic_id = apic_id;
-		printf("ioapic%u: Changing APIC ID to %d\n", io->io_id,
-		    apic_id);
+		mtx_unlock_spin(&icu_lock);
+		printf("ioapic%u: Changing APIC ID from %d to %d\n", io->io_id,
+		    old_id, apic_id);
 	} else
 		mtx_unlock_spin(&icu_lock);
 	if (intbase == -1) {
@@ -1023,8 +1027,9 @@
 	mtx_unlock_spin(&icu_lock);
 	if (bootverbose)
 		device_printf(dev,
-		    "cannot match pci bar apic id %d against MADT\n",
-		    apic_id);
+		    "cannot match pci bar apic id %d against MADT, "
+		    "BAR0 %#jx io id %d\n",
+		    apic_id, (uintmax_t)rman_get_start(res), apic_id);
 fail:
 	bus_release_resource(dev, SYS_RES_MEMORY, rid, res);
 	return (ENXIO);