Index: head/sys/mips/mips/vm_machdep.c
===================================================================
--- head/sys/mips/mips/vm_machdep.c
+++ head/sys/mips/mips/vm_machdep.c
@@ -414,7 +414,7 @@
     stack_t *stack)
 {
 	struct trapframe *tf;
-	register_t sp;
+	register_t sp, sr;
 
 	sp = (((intptr_t)stack->ss_sp + stack->ss_size) & ~(STACK_ALIGN - 1)) -
 	    CALLFRAME_SIZ;
@@ -424,8 +424,10 @@
 	 * function.
 	 */
 	tf = td->td_frame;
+	sr = tf->sr;
 	bzero(tf, sizeof(struct trapframe));
 	tf->sp = sp;
+	tf->sr = sr;
 	tf->pc = (register_t)(intptr_t)entry;
 	/* 
 	 * MIPS ABI requires T9 to be the same as PC 
@@ -434,18 +436,6 @@
 	tf->t9 = (register_t)(intptr_t)entry; 
 	tf->a0 = (register_t)(intptr_t)arg;
 
-	/*
-	 * Keep interrupt mask
-	 */
-	td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
-	    (mips_rd_status() & MIPS_SR_INT_MASK);
-#if defined(__mips_n32) 
-	td->td_frame->sr |= MIPS_SR_PX;
-#elif  defined(__mips_n64)
-	td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
-#endif
-/*	tf->sr |= (ALL_INT_MASK & idle_mask) | SR_INT_ENAB; */
-	/**XXX the above may now be wrong -- mips2 implements this as panic */
 	/*
 	 * FREEBSD_DEVELOPERS_FIXME:
 	 * Setup any other CPU-Specific registers (Not MIPS Standard)