Index: sys/dev/amdtemp/amdtemp.c
===================================================================
--- sys/dev/amdtemp/amdtemp.c
+++ sys/dev/amdtemp/amdtemp.c
@@ -158,6 +158,7 @@
  * Thermaltrip Status Register (Family 0Fh only)
  */
 #define	AMDTEMP_THERMTP_STAT	0xe4
+#define AMDTEMP_NORTHBRIDGE_CAP		0xe8
 #define	AMDTEMP_TTSR_SELCORE	0x04
 #define	AMDTEMP_TTSR_SELSENSOR	0x40
 
@@ -289,7 +290,7 @@
 	struct amdtemp_softc *sc;
 	struct sysctl_ctx_list *sysctlctx;
 	struct sysctl_oid *sysctlnode;
-	uint32_t cpuid, family, model;
+	uint32_t cpuid, family, model, pcidata;
 	u_int bid;
 	int erratum319, unit;
 	bool needsmn;
@@ -381,9 +382,11 @@
 		}
 
 		/*
-		 * There are two sensors per core.
+		 * There are one or two sensors per core.
 		 */
-		sc->sc_ntemps = 2;
+		pcidata = pci_read_config(device_get_parent(dev),
+			AMDTEMP_NORTHBRIDGE_CAP, 4);
+		sc->sc_ntemps = (pcidata >> 12) & 0x3 ? 2 : 1 ;
 
 		sc->sc_gettemp = amdtemp_gettemp0f;
 		break;
@@ -703,7 +706,8 @@
 	error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CUR_TMP, &val);
 	KASSERT(error == 0, ("amdsmn_read"));
 
-	temp = ((val >> 21) & 0x7ff) * 5 / 4;
+	temp = ((val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT) &
+		AMDTEMP_REPTMP10H_CURTMP_MASK) * 5 / 4;
 	if ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0)
 		temp -= AMDTEMP_CURTMP_RANGE_ADJUST;
 	temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10;