Index: head/sys/arm64/arm64/gicv3_its.c
===================================================================
--- head/sys/arm64/arm64/gicv3_its.c
+++ head/sys/arm64/arm64/gicv3_its.c
@@ -574,26 +574,17 @@
 	}
 }
 
-static int
-its_init_cpu(device_t dev, struct gicv3_its_softc *sc)
+static void
+its_init_cpu_lpi(device_t dev, struct gicv3_its_softc *sc)
 {
-	struct redist_pcpu *rpcpu;
 	device_t gicv3;
-	vm_paddr_t target;
 	uint64_t xbaser, tmp;
 	uint32_t ctlr;
 	u_int cpuid;
 
 	gicv3 = device_get_parent(dev);
 	cpuid = PCPU_GET(cpuid);
-	if (!CPU_ISSET(cpuid, &sc->sc_cpus))
-		return (0);
 
-	/* Check if the ITS is enabled on this CPU */
-	if ((gic_r_read_4(gicv3, GICR_TYPER) & GICR_TYPER_PLPIS) == 0) {
-		return (ENXIO);
-	}
-
 	/* Disable LPIs */
 	ctlr = gic_r_read_4(gicv3, GICR_CTLR);
 	ctlr &= ~GICR_CTLR_LPI_ENABLE;
@@ -662,6 +653,26 @@
 
 	/* Make sure the GIC has seen everything */
 	dsb(sy);
+}
+
+static int
+its_init_cpu(device_t dev, struct gicv3_its_softc *sc)
+{
+	device_t gicv3;
+	vm_paddr_t target;
+	u_int cpuid;
+	struct redist_pcpu *rpcpu;
+
+	gicv3 = device_get_parent(dev);
+	cpuid = PCPU_GET(cpuid);
+	if (!CPU_ISSET(cpuid, &sc->sc_cpus))
+		return (0);
+
+	/* Check if the ITS is enabled on this CPU */
+	if ((gic_r_read_4(gicv3, GICR_TYPER) & GICR_TYPER_PLPIS) == 0)
+		return (ENXIO);
+
+	its_init_cpu_lpi(dev, sc);
 
 	if ((gic_its_read_8(sc, GITS_TYPER) & GITS_TYPER_PTA) != 0) {
 		/* This ITS wants the redistributor physical address */