Index: graphics/mesa-dri/Makefile.common =================================================================== --- graphics/mesa-dri/Makefile.common +++ graphics/mesa-dri/Makefile.common @@ -14,7 +14,7 @@ MESAVERSION= ${MESABASEVERSION}${MESASUBVERSION:C/^(.)/.\1/} MESADISTVERSION=${MESABASEVERSION}${MESASUBVERSION:C/^(.)/-\1/} -MESABASEVERSION= 18.3.6 +MESABASEVERSION= 19.0.8 # if there is a subversion, don't include the '-' between 7.11-rc2. MESASUBVERSION= @@ -48,6 +48,7 @@ localbase pathfix pkgconfig python:2.7,build shebangfix tar:xz USE_LDCONFIG= yes GNU_CONFIGURE= yes +CONFIGURE_ARGS+=--enable-autotools # only have one port to check with portscout. .if ${PORTNAME} != mesa-dri Index: graphics/mesa-dri/distinfo =================================================================== --- graphics/mesa-dri/distinfo +++ graphics/mesa-dri/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1554461603 -SHA256 (mesa-18.3.6.tar.xz) = aaf17638dcf5a90b93b6389e152fdc9ef147768b09598f24d2c5cf482fcfc705 -SIZE (mesa-18.3.6.tar.xz) = 11882744 +TIMESTAMP = 1561580048 +SHA256 (mesa-19.0.8.tar.xz) = d017eb53a810c32dabeedf6ca2238ae1e897ce9090e470e9ce1d6c9e3f1b0862 +SIZE (mesa-19.0.8.tar.xz) = 11967592 Index: graphics/mesa-dri/files/patch-0a7e767 =================================================================== --- graphics/mesa-dri/files/patch-0a7e767 +++ /dev/null @@ -1,23 +0,0 @@ -https://gitlab.freedesktop.org/mesa/mesa/commit/0a7e767e5869 - ---- src/amd/vulkan/radv_shader.c.orig 2019-01-17 11:26:22 UTC -+++ src/amd/vulkan/radv_shader.c -@@ -548,9 +548,15 @@ static void radv_init_llvm_target() - * - * "mesa" is the prefix for error messages. - */ -- const char *argv[3] = { "mesa", "-simplifycfg-sink-common=false", -- "-amdgpu-skip-threshold=1" }; -- LLVMParseCommandLineOptions(3, argv, NULL); -+ if (HAVE_LLVM >= 0x0800) { -+ const char *argv[2] = { "mesa", "-simplifycfg-sink-common=false" }; -+ LLVMParseCommandLineOptions(2, argv, NULL); -+ -+ } else { -+ const char *argv[3] = { "mesa", "-simplifycfg-sink-common=false", -+ "-amdgpu-skip-threshold=1" }; -+ LLVMParseCommandLineOptions(3, argv, NULL); -+ } - } - - static once_flag radv_init_llvm_target_once_flag = ONCE_FLAG_INIT; Index: graphics/mesa-dri/files/patch-3e249b8 =================================================================== --- graphics/mesa-dri/files/patch-3e249b8 +++ /dev/null @@ -1,13 +0,0 @@ -https://gitlab.freedesktop.org/mesa/mesa/commit/3e249b853ebb - ---- src/amd/common/ac_llvm_util.c.orig 2019-01-17 11:26:22 UTC -+++ src/amd/common/ac_llvm_util.c -@@ -136,7 +136,7 @@ const char *ac_get_llvm_processor_name(enum radeon_fam - case CHIP_VEGA20: - return HAVE_LLVM >= 0x0700 ? "gfx906" : "gfx902"; - case CHIP_RAVEN2: -- return "gfx902"; /* TODO: use gfx909 when it's available */ -+ return HAVE_LLVM >= 0x0800 ? "gfx909" : "gfx902"; - default: - return ""; - } Index: graphics/mesa-dri/files/patch-648dc52 =================================================================== --- graphics/mesa-dri/files/patch-648dc52 +++ /dev/null @@ -1,94 +0,0 @@ -https://gitlab.freedesktop.org/mesa/mesa/commit/648dc52367c6 - ---- src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c.orig 2019-01-17 11:26:22 UTC -+++ src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c -@@ -698,17 +698,25 @@ static void store_emit( - } - - if (target == TGSI_TEXTURE_BUFFER) { -- LLVMValueRef buf_args[] = { -+ LLVMValueRef buf_args[6] = { - value, - args.resource, - vindex, - ctx->i32_0, /* voffset */ -- LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_glc), 0), -- LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_slc), 0), - }; - -+ if (HAVE_LLVM >= 0x0800) { -+ buf_args[4] = ctx->i32_0; /* soffset */ -+ buf_args[5] = LLVMConstInt(ctx->i1, args.cache_policy, 0); -+ } else { -+ buf_args[4] = LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_glc), 0); -+ buf_args[5] = LLVMConstInt(ctx->i1, !!(args.cache_policy & ac_slc), 0); -+ } -+ - emit_data->output[emit_data->chan] = ac_build_intrinsic( -- &ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32", -+ &ctx->ac, -+ HAVE_LLVM >= 0x0800 ? "llvm.amdgcn.struct.buffer.store.format.v4f32" : -+ "llvm.amdgcn.buffer.store.format.v4f32", - ctx->voidt, buf_args, 6, - ac_get_store_intr_attribs(writeonly_memory)); - } else { -@@ -830,8 +838,35 @@ static void atomic_emit( - vindex = args.coords[0]; /* for buffers only */ - } - -- if (inst->Src[0].Register.File == TGSI_FILE_BUFFER || -+ if (HAVE_LLVM >= 0x0800 && -+ inst->Src[0].Register.File != TGSI_FILE_BUFFER && - inst->Memory.Texture == TGSI_TEXTURE_BUFFER) { -+ LLVMValueRef buf_args[7]; -+ unsigned num_args = 0; -+ -+ buf_args[num_args++] = args.data[0]; -+ if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS) -+ buf_args[num_args++] = args.data[1]; -+ -+ buf_args[num_args++] = args.resource; -+ buf_args[num_args++] = vindex; -+ buf_args[num_args++] = voffset; -+ buf_args[num_args++] = ctx->i32_0; /* soffset */ -+ buf_args[num_args++] = LLVMConstInt(ctx->i32, args.cache_policy & ac_slc, 0); -+ -+ char intrinsic_name[64]; -+ snprintf(intrinsic_name, sizeof(intrinsic_name), -+ "llvm.amdgcn.struct.buffer.atomic.%s", action->intr_name); -+ emit_data->output[emit_data->chan] = -+ ac_to_float(&ctx->ac, -+ ac_build_intrinsic(&ctx->ac, intrinsic_name, -+ ctx->i32, buf_args, num_args, 0)); -+ return; -+ } -+ -+ if (inst->Src[0].Register.File == TGSI_FILE_BUFFER || -+ (HAVE_LLVM < 0x0800 && -+ inst->Memory.Texture == TGSI_TEXTURE_BUFFER)) { - LLVMValueRef buf_args[7]; - unsigned num_args = 0; - - src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 45 ++++++++++++++++++++--- - src/gallium/drivers/radeonsi/si_state.c | 7 +--- - 2 files changed, 42 insertions(+), 10 deletions(-) - ---- src/gallium/drivers/radeonsi/si_state.c.orig 2019-01-17 11:26:22 UTC -+++ src/gallium/drivers/radeonsi/si_state.c -@@ -3613,14 +3613,11 @@ si_make_buffer_descriptor(struct si_screen *screen, st - * - For VMEM and inst.IDXEN == 0 or STRIDE == 0, it's in byte units. - * - For VMEM and inst.IDXEN == 1 and STRIDE != 0, it's in units of STRIDE. - */ -- if (screen->info.chip_class >= GFX9) -- /* When vindex == 0, LLVM sets IDXEN = 0, thus changing units -+ if (screen->info.chip_class >= GFX9 && HAVE_LLVM < 0x0800) -+ /* When vindex == 0, LLVM < 8.0 sets IDXEN = 0, thus changing units - * from STRIDE to bytes. This works around it by setting - * NUM_RECORDS to at least the size of one element, so that - * the first element is readable when IDXEN == 0. -- * -- * TODO: Fix this in LLVM, but do we need a new intrinsic where -- * IDXEN is enforced? - */ - num_records = num_records ? MAX2(num_records, stride) : 0; - else if (screen->info.chip_class == VI) Index: graphics/mesa-dri/files/patch-9cab8cc.c =================================================================== --- graphics/mesa-dri/files/patch-9cab8cc.c +++ /dev/null @@ -1,17 +0,0 @@ -amd: Make vgpr-spilling depend on llvm version - -https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=230789#c14 -diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c -index 69d9f7b9f3fe9e5feb07b32c35cbcf1206a14ca8..dc9b684e9dd287d5bb558d9ad3868a9d0975228d 100644 ---- src/amd/common/ac_llvm_util.c -+++ src/amd/common/ac_llvm_util.c -@@ -153,7 +153,8 @@ static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, - LLVMTargetRef target = ac_get_llvm_target(triple); - - snprintf(features, sizeof(features), -- "+DumpCode,+vgpr-spilling,-fp32-denormals,+fp64-denormals%s%s%s%s", -+ "+DumpCode,-fp32-denormals,+fp64-denormals%s%s%s%s%s", -+ HAVE_LLVM >= 0x0800 ? "" : ",+vgpr-spilling", - tm_options & AC_TM_SISCHED ? ",+si-scheduler" : "", - tm_options & AC_TM_FORCE_ENABLE_XNACK ? ",+xnack" : "", - tm_options & AC_TM_FORCE_DISABLE_XNACK ? ",-xnack" : "", Index: graphics/mesa-dri/files/patch-e4803ab =================================================================== --- graphics/mesa-dri/files/patch-e4803ab +++ /dev/null @@ -1,24 +0,0 @@ -https://gitlab.freedesktop.org/mesa/mesa/commit/e4803ab7d2b6 - ---- src/amd/common/ac_llvm_build.c.orig 2019-01-17 11:26:22 UTC -+++ src/amd/common/ac_llvm_build.c -@@ -1191,11 +1191,15 @@ ac_build_buffer_load(struct ac_llvm_context *ctx, - offset = LLVMBuildAdd(ctx->builder, offset, - LLVMConstInt(ctx->i32, 4, 0), ""); - } -- LLVMValueRef args[2] = {rsrc, offset}; -- result[i] = ac_build_intrinsic(ctx, "llvm.SI.load.const.v4i32", -- ctx->f32, args, 2, -+ const char *intrname = -+ HAVE_LLVM >= 0x0800 ? "llvm.amdgcn.s.buffer.load.f32" -+ : "llvm.SI.load.const.v4i32"; -+ unsigned num_args = HAVE_LLVM >= 0x0800 ? 3 : 2; -+ LLVMValueRef args[3] = {rsrc, offset, ctx->i32_0}; -+ result[i] = ac_build_intrinsic(ctx, intrname, -+ ctx->f32, args, num_args, - AC_FUNC_ATTR_READNONE | -- AC_FUNC_ATTR_LEGACY); -+ (HAVE_LLVM < 0x0800 ? AC_FUNC_ATTR_LEGACY : 0)); - } - if (num_channels == 1) - return result[0];