Index: sys/amd64/include/pcpu.h
===================================================================
--- sys/amd64/include/pcpu.h
+++ sys/amd64/include/pcpu.h
@@ -116,16 +116,23 @@
  */
 #define	__PCPU_GET(name) __extension__ ({				\
 	__pcpu_type(name) __res;					\
-	struct __s {							\
-		u_char	__b[MIN(sizeof(__pcpu_type(name)), 8)];		\
-	} __s;								\
 									\
-	if (sizeof(__res) == 1 || sizeof(__res) == 2 ||			\
-	    sizeof(__res) == 4 || sizeof(__res) == 8) {			\
-		__asm __volatile("mov %%gs:%1,%0"			\
-		    : "=r" (__s)					\
-		    : "m" (*(struct __s *)(__pcpu_offset(name))));	\
-		*(struct __s *)(void *)&__res = __s;			\
+	if (sizeof(__res) == 1) {					\
+		__asm __volatile("movb %%gs:%1,%0"			\
+		    : "=r" (__res)					\
+		    : "m" (*(uint8_t *)(__pcpu_offset(name))));		\
+	} else if (sizeof(__res) == 2) {				\
+		__asm __volatile("movw %%gs:%1,%0"			\
+		    : "=r" (__res)					\
+		    : "m" (*(uint16_t *)(__pcpu_offset(name))));	\
+	} else if (sizeof(__res) == 4) {				\
+		__asm __volatile("movl %%gs:%1,%0"			\
+		    : "=r" (__res)					\
+		    : "m" (*(uint32_t *)(__pcpu_offset(name))));	\
+	} else if (sizeof(__res) == 8) {				\
+		__asm __volatile("movq %%gs:%1,%0"			\
+		    : "=r" (__res)					\
+		    : "m" (*(uint64_t *)(__pcpu_offset(name))));	\
 	} else {							\
 		__res = *__PCPU_PTR(name);				\
 	}								\
@@ -138,17 +145,24 @@
  */
 #define	__PCPU_ADD(name, val) do {					\
 	__pcpu_type(name) __val;					\
-	struct __s {							\
-		u_char	__b[MIN(sizeof(__pcpu_type(name)), 8)];		\
-	} __s;								\
 									\
 	__val = (val);							\
-	if (sizeof(__val) == 1 || sizeof(__val) == 2 ||			\
-	    sizeof(__val) == 4 || sizeof(__val) == 8) {			\
-		__s = *(struct __s *)(void *)&__val;			\
-		__asm __volatile("add %1,%%gs:%0"			\
-		    : "=m" (*(struct __s *)(__pcpu_offset(name)))	\
-		    : "r" (__s));					\
+	if (sizeof(__val) == 1) {					\
+		__asm __volatile("addb %1,%%gs:%0"			\
+		    : "=m" (*(uint8_t *)(__pcpu_offset(name)))		\
+		    : "r" (__val));					\
+	} else if (sizeof(__val) == 2) {				\
+		__asm __volatile("addw %1,%%gs:%0"			\
+		    : "=m" (*(uint16_t *)(__pcpu_offset(name)))		\
+		    : "r" (__val));					\
+	} else if (sizeof(__val) == 4) {				\
+		__asm __volatile("addl %1,%%gs:%0"			\
+		    : "=m" (*(uint32_t *)(__pcpu_offset(name)))		\
+		    : "r" (__val));					\
+	} else if (sizeof(__val) == 8) {				\
+		__asm __volatile("addq %1,%%gs:%0"			\
+		    : "=m" (*(uint64_t *)(__pcpu_offset(name)))		\
+		    : "r" (__val));					\
 	} else								\
 		*__PCPU_PTR(name) += __val;				\
 } while (0)
@@ -186,17 +200,24 @@
  */
 #define	__PCPU_SET(name, val) {						\
 	__pcpu_type(name) __val;					\
-	struct __s {							\
-		u_char	__b[MIN(sizeof(__pcpu_type(name)), 8)];		\
-	} __s;								\
 									\
 	__val = (val);							\
-	if (sizeof(__val) == 1 || sizeof(__val) == 2 ||			\
-	    sizeof(__val) == 4 || sizeof(__val) == 8) {			\
-		__s = *(struct __s *)(void *)&__val;			\
-		__asm __volatile("mov %1,%%gs:%0"			\
-		    : "=m" (*(struct __s *)(__pcpu_offset(name)))	\
-		    : "r" (__s));					\
+	if (sizeof(__val) == 1) {					\
+		__asm __volatile("movb %1,%%gs:%0"			\
+		    : "=m" (*(uint8_t *)(__pcpu_offset(name)))		\
+		    : "r" (__val));					\
+	} else if (sizeof(__val) == 2) {				\
+		__asm __volatile("movw %1,%%gs:%0"			\
+		    : "=m" (*(uint16_t *)(__pcpu_offset(name)))		\
+		    : "r" (__val));					\
+	} else if (sizeof(__val) == 4) {				\
+		__asm __volatile("movl %1,%%gs:%0"			\
+		    : "=m" (*(uint32_t *)(__pcpu_offset(name)))		\
+		    : "r" (__val));					\
+	} else if (sizeof(__val) == 8) {				\
+		__asm __volatile("movq %1,%%gs:%0"			\
+		    : "=m" (*(uint64_t *)(__pcpu_offset(name)))		\
+		    : "r" (__val));					\
 	} else {							\
 		*__PCPU_PTR(name) = __val;				\
 	}								\