Index: head/UPDATING =================================================================== --- head/UPDATING +++ head/UPDATING @@ -31,6 +31,10 @@ disable the most expensive debugging functionality run "ln -s 'abort:false,junk:false' /etc/malloc.conf".) +20181215: + The old sibyte / swarm / Broadcom BCM1250 support has been + removed from the mips port. + 20181211: Clang, llvm, lld, lldb, compiler-rt and libc++ have been upgraded to 7.0.1. Please see the 20141231 entry below for information about Index: head/sys/mips/conf/SWARM =================================================================== --- head/sys/mips/conf/SWARM +++ head/sys/mips/conf/SWARM @@ -1,12 +0,0 @@ -# -# $FreeBSD$ -# - -include "std.SWARM" - -ident SWARM - -machine mips mips - -makeoptions ARCH_FLAGS="-mabi=32 -march=mips32" -makeoptions LDSCRIPT_NAME= ldscript.mips.cfe Index: head/sys/mips/conf/SWARM.hints =================================================================== --- head/sys/mips/conf/SWARM.hints +++ head/sys/mips/conf/SWARM.hints @@ -1,17 +0,0 @@ -# $FreeBSD$ -hint.zbbus.0.at="nexus0" -hint.zbpci.0.at="zbbus0" -hint.scd.0.at="zbbus0" - -# -# SWARM IDE interface is on the generic bus at chip select 4. -# The CS4 region is 64KB in size and starts at 0x100B0000. -# The IDE interrupt is wired to GPIO4 (intsrc 36 to the interrupt mapper) -# -hint.ata.0.at="zbbus0" -hint.ata.0.maddr=0x100B0000 -hint.ata.0.msize=0x10000 -hint.ata.0.irq=36 -#hint.ata.0.disabled=0 -#hint.ata.0.regoffset=0x1F0 -#hint.ata.0.regshift=5 Index: head/sys/mips/conf/SWARM64 =================================================================== --- head/sys/mips/conf/SWARM64 +++ head/sys/mips/conf/SWARM64 @@ -1,12 +0,0 @@ -# -# $FreeBSD$ -# - -include "std.SWARM" - -ident SWARM64 - -machine mips mips64 -makeoptions ARCH_FLAGS="-mabi=64 -march=mips64" -makeoptions LDSCRIPT_NAME=ldscript.mips.cfe -makeoptions KERNLOADADDR=0xffffffff80001000 Index: head/sys/mips/conf/SWARM64_SMP =================================================================== --- head/sys/mips/conf/SWARM64_SMP +++ head/sys/mips/conf/SWARM64_SMP @@ -1,15 +0,0 @@ -# -# $FreeBSD$ -# - -include "std.SWARM" - -ident SWARM64_SMP - -options SMP -options PRINTF_BUFR_SIZE=128 - -machine mips mips64 -makeoptions ARCH_FLAGS="-mabi=64 -march=mips64" -makeoptions LDSCRIPT_NAME=ldscript.mips.cfe -makeoptions KERNLOADADDR=0xffffffff80001000 Index: head/sys/mips/conf/SWARM_SMP =================================================================== --- head/sys/mips/conf/SWARM_SMP +++ head/sys/mips/conf/SWARM_SMP @@ -1,15 +0,0 @@ -# -# $FreeBSD$ -# - -include "std.SWARM" - -ident SWARM_SMP - -options SMP -options PRINTF_BUFR_SIZE=128 - -machine mips mips - -makeoptions ARCH_FLAGS="-mabi=32 -march=mips32" -makeoptions LDSCRIPT_NAME= ldscript.mips.cfe Index: head/sys/mips/conf/std.SWARM =================================================================== --- head/sys/mips/conf/std.SWARM +++ head/sys/mips/conf/std.SWARM @@ -1,60 +0,0 @@ -# -# $FreeBSD$ -# - -hints "SWARM.hints" -include "../sibyte/std.sibyte" - -options CFE -options CFE_CONSOLE -options CFE_ENV -options ALT_BREAK_TO_DEBUGGER - -cpu CPU_SB1 - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -makeoptions MODULES_OVERRIDE="" - -options DDB -options KDB - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options TCP_HHOOK # hhook(9) framework for TCP -options NFSCL #Network Filesystem Client -options NFS_ROOT #NFS usable as /, requires NFSCL -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# Debugging for use in -current -#options DEADLKRES -options INVARIANTS -options INVARIANT_SUPPORT -options WITNESS - -options FFS #Fast filesystem - -options KTRACE - -device pci -device miibus -device bge -device loop -device ether -device md -device random - -options USB_DEBUG -device usb -device ohci -device uhci -device ehci - -device umass - -device scbus -device cd -device da -device pass - -device ata Index: head/sys/mips/mips/bus_space_generic.c =================================================================== --- head/sys/mips/mips/bus_space_generic.c +++ head/sys/mips/mips/bus_space_generic.c @@ -202,14 +202,6 @@ #define wr16(a, v) cvmx_write64_uint16(a, v) #define wr32(a, v) cvmx_write64_uint32(a, v) #define wr64(a, v) cvmx_write64_uint64(a, v) -#elif defined(CPU_SB1) && _BYTE_ORDER == _BIG_ENDIAN -#include -#define rd8(a) sb_big_endian_read8(a) -#define rd16(a) sb_big_endian_read16(a) -#define rd32(a) sb_big_endian_read32(a) -#define wr8(a, v) sb_big_endian_write8(a, v) -#define wr16(a, v) sb_big_endian_write16(a, v) -#define wr32(a, v) sb_big_endian_write32(a, v) #else #define rd8(a) readb(a) #define rd16(a) readw(a) Index: head/sys/mips/sibyte/ata_zbbus.c =================================================================== --- head/sys/mips/sibyte/ata_zbbus.c +++ head/sys/mips/sibyte/ata_zbbus.c @@ -1,172 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2009 Neelkanth Natu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include - -#include - -__FBSDID("$FreeBSD$"); - -static int -ata_zbbus_probe(device_t dev) -{ - - return (ata_probe(dev)); -} - -static int -ata_zbbus_attach(device_t dev) -{ - int i, rid, regshift, regoffset; - struct ata_channel *ch; - struct resource *io; - - ch = device_get_softc(dev); - - if (ch->attached) - return (0); - ch->attached = 1; - - rid = 0; - io = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (io == NULL) - return (ENXIO); - - /* - * SWARM needs an address shift of 5 when accessing ATA registers. - * - * For e.g. an access to register 4 actually needs an address - * of (4 << 5) to be output on the generic bus. - */ - regshift = 5; - resource_int_value(device_get_name(dev), device_get_unit(dev), - "regshift", ®shift); - if (regshift && bootverbose) - device_printf(dev, "using a register shift of %d\n", regshift); - - regoffset = 0x1F0; - resource_int_value(device_get_name(dev), device_get_unit(dev), - "regoffset", ®offset); - if (regoffset && bootverbose) { - device_printf(dev, "using a register offset of 0x%0x\n", - regoffset); - } - - /* setup the ata register addresses */ - for (i = ATA_DATA; i <= ATA_COMMAND; ++i) { - ch->r_io[i].res = io; - ch->r_io[i].offset = (regoffset + i) << regshift; - } - - ch->r_io[ATA_CONTROL].res = io; - ch->r_io[ATA_CONTROL].offset = (regoffset + ATA_CTLOFFSET) << regshift; - ch->r_io[ATA_IDX_ADDR].res = io; /* XXX what is this used for */ - ata_default_registers(dev); - - /* initialize softc for this channel */ - ch->unit = 0; - ch->flags |= ATA_USE_16BIT; - ata_generic_hw(dev); - - return (ata_attach(dev)); -} - -static int -ata_zbbus_detach(device_t dev) -{ - int error; - struct ata_channel *ch = device_get_softc(dev); - - if (!ch->attached) - return (0); - ch->attached = 0; - - error = ata_detach(dev); - - bus_release_resource(dev, SYS_RES_MEMORY, 0, - ch->r_io[ATA_IDX_ADDR].res); - - return (error); -} - -static int -ata_zbbus_suspend(device_t dev) -{ - struct ata_channel *ch = device_get_softc(dev); - - if (!ch->attached) - return (0); - - return (ata_suspend(dev)); -} - -static int -ata_zbbus_resume(device_t dev) -{ - struct ata_channel *ch = device_get_softc(dev); - - if (!ch->attached) - return (0); - - return (ata_resume(dev)); -} - -static device_method_t ata_zbbus_methods[] = { - /* device interface */ - DEVMETHOD(device_probe, ata_zbbus_probe), - DEVMETHOD(device_attach, ata_zbbus_attach), - DEVMETHOD(device_detach, ata_zbbus_detach), - DEVMETHOD(device_suspend, ata_zbbus_suspend), - DEVMETHOD(device_resume, ata_zbbus_resume), - - { 0, 0 } -}; - -static driver_t ata_zbbus_driver = { - "ata", - ata_zbbus_methods, - sizeof(struct ata_channel) -}; - -DRIVER_MODULE(ata, zbbus, ata_zbbus_driver, ata_devclass, 0, 0); Index: head/sys/mips/sibyte/files.sibyte =================================================================== --- head/sys/mips/sibyte/files.sibyte +++ head/sys/mips/sibyte/files.sibyte @@ -1,10 +0,0 @@ -# $FreeBSD$ - -mips/sibyte/sb_machdep.c standard -mips/sibyte/sb_zbbus.c standard -mips/sibyte/sb_zbpci.c standard -mips/sibyte/sb_scd.c standard -mips/sibyte/ata_zbbus.c standard -mips/mips/intr_machdep.c standard -mips/sibyte/sb_asm.S standard -mips/mips/tick.c standard Index: head/sys/mips/sibyte/sb_asm.S =================================================================== --- head/sys/mips/sibyte/sb_asm.S +++ head/sys/mips/sibyte/sb_asm.S @@ -1,51 +0,0 @@ -/*- - * Copyright (c) 2009 Neelkanth Natu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include -#include - -.set mips64 -.set noat -.set noreorder - -#ifdef SMP -/* - * This function must be implemented in assembly because it is called early - * in AP boot without a valid stack. - * - * This cpu number is available in bits 25 to 27 of the coprocessor 0 PRID - * register. This is not documented in the BCM1250 user manual but can be - * gleaned from the CFE source code - see sb1250_altcpu.S - */ -LEAF(platform_processor_id) - mfc0 v0, MIPS_COP_0_PRID - srl v0, v0, 25 - jr ra - and v0, v0, 7 -END(platform_processor_id) -#endif /* SMP */ Index: head/sys/mips/sibyte/sb_bus_space.h =================================================================== --- head/sys/mips/sibyte/sb_bus_space.h +++ head/sys/mips/sibyte/sb_bus_space.h @@ -1,45 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2010 Neelkanth Natu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#ifndef _SB_BUS_SPACE_H_ -#define _SB_BUS_SPACE_H_ - -#include - -#if _BYTE_ORDER == _BIG_ENDIAN -uint8_t sb_big_endian_read8(bus_addr_t addr); -uint16_t sb_big_endian_read16(bus_addr_t addr); -uint32_t sb_big_endian_read32(bus_addr_t addr); -void sb_big_endian_write8(bus_addr_t addr, uint8_t val); -void sb_big_endian_write16(bus_addr_t addr, uint16_t val); -void sb_big_endian_write32(bus_addr_t addr, uint32_t val); -#endif - -#endif Index: head/sys/mips/sibyte/sb_machdep.c =================================================================== --- head/sys/mips/sibyte/sb_machdep.c +++ head/sys/mips/sibyte/sb_machdep.c @@ -1,441 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2007 Bruce M. Simpson. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include "opt_ddb.h" -#include "opt_kdb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef SMP -#include -#include -#endif - -#ifdef CFE -#include -#endif - -#include "sb_scd.h" - -#ifdef DDB -#ifndef KDB -#error KDB must be enabled in order for DDB to work! -#endif -#endif - -#ifdef CFE_ENV -extern void cfe_env_init(void); -#endif - -extern int *edata; -extern int *end; - -extern char MipsTLBMiss[], MipsTLBMissEnd[]; - -void -platform_cpu_init() -{ - /* Nothing special */ -} - -static void -sb_intr_init(int cpuid) -{ - int intrnum, intsrc; - - /* - * Disable all sources to the interrupt mapper and setup the mapping - * between an interrupt source and the mips hard interrupt number. - */ - for (intsrc = 0; intsrc < NUM_INTSRC; ++intsrc) { - intrnum = sb_route_intsrc(intsrc); - sb_disable_intsrc(cpuid, intsrc); - sb_write_intmap(cpuid, intsrc, intrnum); -#ifdef SMP - /* - * Set up the mailbox interrupt mapping. - * - * The mailbox interrupt is "special" in that it is not shared - * with any other interrupt source. - */ - if (intsrc == INTSRC_MAILBOX3) { - intrnum = platform_ipi_hardintr_num(); - sb_write_intmap(cpuid, INTSRC_MAILBOX3, intrnum); - sb_enable_intsrc(cpuid, INTSRC_MAILBOX3); - } -#endif - } -} - -static void -mips_init(void) -{ - int i, j, cfe_mem_idx, tmp; - uint64_t maxmem; - -#ifdef CFE_ENV - cfe_env_init(); -#endif - - TUNABLE_INT_FETCH("boothowto", &boothowto); - - if (boothowto & RB_VERBOSE) - bootverbose++; - -#ifdef MAXMEM - tmp = MAXMEM; -#else - tmp = 0; -#endif - TUNABLE_INT_FETCH("hw.physmem", &tmp); - maxmem = (uint64_t)tmp * 1024; - - /* - * XXX - * If we used vm_paddr_t consistently in pmap, etc., we could - * use 64-bit page numbers on !n64 systems, too, like i386 - * does with PAE. - */ -#if !defined(__mips_n64) - if (maxmem == 0 || maxmem > 0xffffffff) - maxmem = 0xffffffff; -#endif - -#ifdef CFE - /* - * Query DRAM memory map from CFE. - */ - physmem = 0; - cfe_mem_idx = 0; - for (i = 0; i < 10; i += 2) { - int result; - uint64_t addr, len, type; - - result = cfe_enummem(cfe_mem_idx++, 0, &addr, &len, &type); - if (result < 0) { - phys_avail[i] = phys_avail[i + 1] = 0; - break; - } - - KASSERT(type == CFE_MI_AVAILABLE, - ("CFE DRAM region is not available?")); - - if (bootverbose) - printf("cfe_enummem: 0x%016jx/%ju.\n", addr, len); - - if (maxmem != 0) { - if (addr >= maxmem) { - printf("Ignoring %ju bytes of memory at 0x%jx " - "that is above maxmem %dMB\n", - len, addr, - (int)(maxmem / (1024 * 1024))); - continue; - } - - if (addr + len > maxmem) { - printf("Ignoring %ju bytes of memory " - "that is above maxmem %dMB\n", - (addr + len) - maxmem, - (int)(maxmem / (1024 * 1024))); - len = maxmem - addr; - } - } - - phys_avail[i] = addr; - if (i == 0 && addr == 0) { - /* - * If this is the first physical memory segment probed - * from CFE, omit the region at the start of physical - * memory where the kernel has been loaded. - */ - phys_avail[i] += MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); - } - phys_avail[i + 1] = addr + len; - physmem += len; - } - - realmem = btoc(physmem); -#endif - - for (j = 0; j < i; j++) - dump_avail[j] = phys_avail[j]; - - physmem = realmem; - - init_param1(); - init_param2(physmem); - mips_cpu_init(); - - /* - * Sibyte has a L1 data cache coherent with DMA. This includes - * on-chip network interfaces as well as PCI/HyperTransport bus - * masters. - */ - cpuinfo.cache_coherent_dma = TRUE; - - /* - * XXX - * The kernel is running in 32-bit mode but the CFE is running in - * 64-bit mode. So the SR_KX bit in the status register is turned - * on by the CFE every time we call into it - for e.g. CFE_CONSOLE. - * - * This means that if get a TLB miss for any address above 0xc0000000 - * and the SR_KX bit is set then we will end up in the XTLB exception - * vector. - * - * For now work around this by copying the TLB exception handling - * code to the XTLB exception vector. - */ - { - bcopy(MipsTLBMiss, (void *)MIPS_XTLB_MISS_EXC_VEC, - MipsTLBMissEnd - MipsTLBMiss); - - mips_icache_sync_all(); - mips_dcache_wbinv_all(); - } - - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - - kdb_init(); -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif -} - -void -platform_reset(void) -{ - - /* - * XXX SMP - * XXX flush data caches - */ - sb_system_reset(); -} - -static void -kseg0_map_coherent(void) -{ - uint32_t config; - const int CFG_K0_COHERENT = 5; - - config = mips_rd_config(); - config &= ~MIPS_CONFIG_K0_MASK; - config |= CFG_K0_COHERENT; - mips_wr_config(config); -} - -#ifdef SMP -void -platform_ipi_send(int cpuid) -{ - KASSERT(cpuid == 0 || cpuid == 1, - ("platform_ipi_send: invalid cpuid %d", cpuid)); - - sb_set_mailbox(cpuid, 1ULL); -} - -void -platform_ipi_clear(void) -{ - int cpuid; - - cpuid = PCPU_GET(cpuid); - sb_clear_mailbox(cpuid, 1ULL); -} - -int -platform_ipi_hardintr_num(void) -{ - - return (4); -} - -int -platform_ipi_softintr_num(void) -{ - - return (-1); -} - -struct cpu_group * -platform_smp_topo(void) -{ - - return (smp_topo_none()); -} - -void -platform_init_ap(int cpuid) -{ - int ipi_int_mask, clock_int_mask; - - KASSERT(cpuid == 1, ("AP has an invalid cpu id %d", cpuid)); - - /* - * Make sure that kseg0 is mapped cacheable-coherent - */ - kseg0_map_coherent(); - - sb_intr_init(cpuid); - - /* - * Unmask the clock and ipi interrupts. - */ - clock_int_mask = hard_int_mask(5); - ipi_int_mask = hard_int_mask(platform_ipi_hardintr_num()); - set_intr_mask(ipi_int_mask | clock_int_mask); -} - -int -platform_start_ap(int cpuid) -{ -#ifdef CFE - int error; - - if ((error = cfe_cpu_start(cpuid, mpentry, 0, 0, 0))) { - printf("cfe_cpu_start error: %d\n", error); - return (-1); - } else { - return (0); - } -#else - return (-1); -#endif /* CFE */ -} -#endif /* SMP */ - -static u_int -sb_get_timecount(struct timecounter *tc) -{ - - return ((u_int)sb_zbbus_cycle_count()); -} - -static void -sb_timecounter_init(void) -{ - static struct timecounter sb_timecounter = { - sb_get_timecount, - NULL, - ~0u, - 0, - "sibyte_zbbus_counter", - 2000 - }; - - /* - * The ZBbus cycle counter runs at half the cpu frequency. - */ - sb_timecounter.tc_frequency = sb_cpu_speed() / 2; - platform_timecounter = &sb_timecounter; -} - -void -platform_start(__register_t a0, __register_t a1, __register_t a2, - __register_t a3) -{ - /* - * Make sure that kseg0 is mapped cacheable-coherent - */ - kseg0_map_coherent(); - - /* clear the BSS and SBSS segments */ - memset(&edata, 0, (vm_offset_t)&end - (vm_offset_t)&edata); - mips_postboot_fixup(); - - sb_intr_init(0); - sb_timecounter_init(); - - /* Initialize pcpu stuff */ - mips_pcpu0_init(); - -#ifdef CFE - /* - * Initialize CFE firmware trampolines before - * we initialize the low-level console. - * - * CFE passes the following values in registers: - * a0: firmware handle - * a2: firmware entry point - * a3: entry point seal - */ - if (a3 == CFE_EPTSEAL) - cfe_init(a0, a2); -#endif - cninit(); - - mips_init(); - - mips_timer_init_params(sb_cpu_speed(), 0); -} Index: head/sys/mips/sibyte/sb_scd.h =================================================================== --- head/sys/mips/sibyte/sb_scd.h +++ head/sys/mips/sibyte/sb_scd.h @@ -1,54 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2009 Neelkanth Natu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#ifndef _SB_SCD_H_ -#define _SB_SCD_H_ - -#define NUM_INTSRC 64 /* total number of interrupt sources */ - -uint64_t sb_zbbus_cycle_count(void); -uint64_t sb_cpu_speed(void); -void sb_system_reset(void); - -int sb_route_intsrc(int src); -void sb_enable_intsrc(int cpu, int src); -void sb_disable_intsrc(int cpu, int src); -uint64_t sb_read_intsrc_mask(int cpu); -void sb_write_intsrc_mask(int cpu, uint64_t mask); -void sb_write_intmap(int cpu, int intsrc, int intrnum); -int sb_read_intmap(int cpu, int intsrc); - -#ifdef SMP -#define INTSRC_MAILBOX3 29 -void sb_set_mailbox(int cpuid, uint64_t val); -void sb_clear_mailbox(int cpuid, uint64_t val); -#endif - -#endif /* _SB_SCD_H_ */ Index: head/sys/mips/sibyte/sb_scd.c =================================================================== --- head/sys/mips/sibyte/sb_scd.c +++ head/sys/mips/sibyte/sb_scd.c @@ -1,308 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2009 Neelkanth Natu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "sb_scd.h" - -/* - * We compile a 32-bit kernel to run on the SB-1 processor which is a 64-bit - * processor. It has some registers that must be accessed using 64-bit load - * and store instructions. - * - * We use the mips_ld() and mips_sd() functions to do this for us. - */ -#define sb_store64(addr, val) mips3_sd((uint64_t *)(uintptr_t)(addr), (val)) -#define sb_load64(addr) mips3_ld((uint64_t *)(uintptr_t)(addr)) - -/* - * System Control and Debug (SCD) unit on the Sibyte ZBbus. - */ - -/* - * Extract the value starting at bit position 'b' for 'n' bits from 'x'. - */ -#define GET_VAL_64(x, b, n) (((x) >> (b)) & ((1ULL << (n)) - 1)) - -#define SYSREV_ADDR MIPS_PHYS_TO_KSEG1(0x10020000) -#define SYSREV_NUM_PROCESSORS(x) GET_VAL_64((x), 24, 4) - -#define SYSCFG_ADDR MIPS_PHYS_TO_KSEG1(0x10020008) -#define SYSCFG_PLLDIV(x) GET_VAL_64((x), 7, 5) - -#define ZBBUS_CYCLE_COUNT_ADDR MIPS_PHYS_TO_KSEG1(0x10030000) - -#define INTSRC_MASK_ADDR(cpu) \ - (MIPS_PHYS_TO_KSEG1(0x10020028) | ((cpu) << 13)) - -#define INTSRC_MAP_ADDR(cpu, intsrc) \ - (MIPS_PHYS_TO_KSEG1(0x10020200) | ((cpu) << 13)) + (intsrc * 8) - -#define MAILBOX_SET_ADDR(cpu) \ - (MIPS_PHYS_TO_KSEG1(0x100200C8) | ((cpu) << 13)) - -#define MAILBOX_CLEAR_ADDR(cpu) \ - (MIPS_PHYS_TO_KSEG1(0x100200D0) | ((cpu) << 13)) - -static uint64_t -sb_read_syscfg(void) -{ - - return (sb_load64(SYSCFG_ADDR)); -} - -static void -sb_write_syscfg(uint64_t val) -{ - - sb_store64(SYSCFG_ADDR, val); -} - -uint64_t -sb_zbbus_cycle_count(void) -{ - - return (sb_load64(ZBBUS_CYCLE_COUNT_ADDR)); -} - -uint64_t -sb_cpu_speed(void) -{ - int plldiv; - const uint64_t MHZ = 1000000; - - plldiv = SYSCFG_PLLDIV(sb_read_syscfg()); - if (plldiv == 0) { - printf("PLL_DIV is 0 - assuming 6 (300MHz).\n"); - plldiv = 6; - } - - return (plldiv * 50 * MHZ); -} - -void -sb_system_reset(void) -{ - uint64_t syscfg; - - const uint64_t SYSTEM_RESET = 1ULL << 60; - const uint64_t EXT_RESET = 1ULL << 59; - const uint64_t SOFT_RESET = 1ULL << 58; - - syscfg = sb_read_syscfg(); - syscfg &= ~SOFT_RESET; - syscfg |= SYSTEM_RESET | EXT_RESET; - sb_write_syscfg(syscfg); -} - -void -sb_disable_intsrc(int cpu, int src) -{ - int regaddr; - uint64_t val; - - regaddr = INTSRC_MASK_ADDR(cpu); - - val = sb_load64(regaddr); - val |= 1ULL << src; - sb_store64(regaddr, val); -} - -void -sb_enable_intsrc(int cpu, int src) -{ - int regaddr; - uint64_t val; - - regaddr = INTSRC_MASK_ADDR(cpu); - - val = sb_load64(regaddr); - val &= ~(1ULL << src); - sb_store64(regaddr, val); -} - -void -sb_write_intsrc_mask(int cpu, uint64_t val) -{ - int regaddr; - - regaddr = INTSRC_MASK_ADDR(cpu); - sb_store64(regaddr, val); -} - -uint64_t -sb_read_intsrc_mask(int cpu) -{ - int regaddr; - uint64_t val; - - regaddr = INTSRC_MASK_ADDR(cpu); - val = sb_load64(regaddr); - - return (val); -} - -void -sb_write_intmap(int cpu, int intsrc, int intrnum) -{ - int regaddr; - - regaddr = INTSRC_MAP_ADDR(cpu, intsrc); - sb_store64(regaddr, intrnum); -} - -int -sb_read_intmap(int cpu, int intsrc) -{ - int regaddr; - - regaddr = INTSRC_MAP_ADDR(cpu, intsrc); - return (sb_load64(regaddr) & 0x7); -} - -int -sb_route_intsrc(int intsrc) -{ - int intrnum; - - KASSERT(intsrc >= 0 && intsrc < NUM_INTSRC, - ("Invalid interrupt source number (%d)", intsrc)); - - /* - * Interrupt 5 is used by sources internal to the CPU (e.g. timer). - * Use a deterministic mapping for the remaining sources. - */ -#ifdef SMP - KASSERT(platform_ipi_hardintr_num() == 4, - ("Unexpected interrupt number used for IPI")); - intrnum = intsrc % 4; -#else - intrnum = intsrc % 5; -#endif - - return (intrnum); -} - -#ifdef SMP -static uint64_t -sb_read_sysrev(void) -{ - - return (sb_load64(SYSREV_ADDR)); -} - -void -sb_set_mailbox(int cpu, uint64_t val) -{ - int regaddr; - - regaddr = MAILBOX_SET_ADDR(cpu); - sb_store64(regaddr, val); -} - -void -sb_clear_mailbox(int cpu, uint64_t val) -{ - int regaddr; - - regaddr = MAILBOX_CLEAR_ADDR(cpu); - sb_store64(regaddr, val); -} - -void -platform_cpu_mask(cpuset_t *mask) -{ - int i, s; - - CPU_ZERO(mask); - s = SYSREV_NUM_PROCESSORS(sb_read_sysrev()); - for (i = 0; i < s; i++) - CPU_SET(i, mask); -} -#endif /* SMP */ - -#define SCD_PHYSADDR 0x10000000 -#define SCD_SIZE 0x00060000 - -static int -scd_probe(device_t dev) -{ - - device_set_desc(dev, "Broadcom/Sibyte System Control and Debug"); - return (0); -} - -static int -scd_attach(device_t dev) -{ - int rid; - struct resource *res; - - if (bootverbose) - device_printf(dev, "attached.\n"); - - rid = 0; - res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, SCD_PHYSADDR, - SCD_PHYSADDR + SCD_SIZE - 1, SCD_SIZE, 0); - if (res == NULL) - panic("Cannot allocate resource for system control and debug."); - - return (0); -} - -static device_method_t scd_methods[] ={ - /* Device interface */ - DEVMETHOD(device_probe, scd_probe), - DEVMETHOD(device_attach, scd_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - { 0, 0 } -}; - -static driver_t scd_driver = { - "scd", - scd_methods -}; - -static devclass_t scd_devclass; - -DRIVER_MODULE(scd, zbbus, scd_driver, scd_devclass, 0, 0); Index: head/sys/mips/sibyte/sb_zbbus.c =================================================================== --- head/sys/mips/sibyte/sb_zbbus.c +++ head/sys/mips/sibyte/sb_zbbus.c @@ -1,464 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2009 Neelkanth Natu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "sb_scd.h" - -static MALLOC_DEFINE(M_INTMAP, "sb1250 intmap", "Sibyte 1250 Interrupt Mapper"); - -static struct mtx zbbus_intr_mtx; -MTX_SYSINIT(zbbus_intr_mtx, &zbbus_intr_mtx, "zbbus_intr_mask/unmask lock", - MTX_SPIN); - -/* - * This array holds the mapping between a MIPS hard interrupt and the - * interrupt sources that feed into that it. - */ -static uint64_t hardint_to_intsrc_mask[NHARD_IRQS]; - -struct sb_intmap { - int intsrc; /* interrupt mapper register number (0 - 63) */ - int hardint; /* cpu interrupt from 0 to NHARD_IRQS - 1 */ - - /* - * The device that the interrupt belongs to. Note that multiple - * devices may share an interrupt. For e.g. PCI_INT_x lines. - * - * The device 'dev' in combination with the 'rid' uniquely - * identify this interrupt source. - */ - device_t dev; - int rid; - - SLIST_ENTRY(sb_intmap) next; -}; - -static SLIST_HEAD(, sb_intmap) sb_intmap_head; - -static struct sb_intmap * -sb_intmap_lookup(int intrnum, device_t dev, int rid) -{ - struct sb_intmap *map; - - SLIST_FOREACH(map, &sb_intmap_head, next) { - if (dev == map->dev && rid == map->rid && - intrnum == map->hardint) - break; - } - return (map); -} - -/* - * Keep track of which (dev,rid,hardint) tuple is using the interrupt source. - * - * We don't actually unmask the interrupt source until the device calls - * a bus_setup_intr() on the resource. - */ -static void -sb_intmap_add(int intrnum, device_t dev, int rid, int intsrc) -{ - struct sb_intmap *map; - - KASSERT(intrnum >= 0 && intrnum < NHARD_IRQS, - ("intrnum is out of range: %d", intrnum)); - - map = sb_intmap_lookup(intrnum, dev, rid); - if (map) { - KASSERT(intsrc == map->intsrc, - ("%s%d allocating SYS_RES_IRQ resource with rid %d " - "with a different intsrc (%d versus %d)", - device_get_name(dev), device_get_unit(dev), rid, - intsrc, map->intsrc)); - return; - } - - map = malloc(sizeof(*map), M_INTMAP, M_WAITOK | M_ZERO); - map->intsrc = intsrc; - map->hardint = intrnum; - map->dev = dev; - map->rid = rid; - - SLIST_INSERT_HEAD(&sb_intmap_head, map, next); -} - -static void -sb_intmap_activate(int intrnum, device_t dev, int rid) -{ - struct sb_intmap *map; - - KASSERT(intrnum >= 0 && intrnum < NHARD_IRQS, - ("intrnum is out of range: %d", intrnum)); - - map = sb_intmap_lookup(intrnum, dev, rid); - if (map) { - /* - * Deliver all interrupts to CPU0. - */ - mtx_lock_spin(&zbbus_intr_mtx); - hardint_to_intsrc_mask[intrnum] |= 1ULL << map->intsrc; - sb_enable_intsrc(0, map->intsrc); - mtx_unlock_spin(&zbbus_intr_mtx); - } else { - /* - * In zbbus_setup_intr() we blindly call sb_intmap_activate() - * for every interrupt activation that comes our way. - * - * We might end up here if we did not "hijack" the SYS_RES_IRQ - * resource in zbbus_alloc_resource(). - */ - printf("sb_intmap_activate: unable to activate interrupt %d " - "for device %s%d rid %d.\n", intrnum, - device_get_name(dev), device_get_unit(dev), rid); - } -} - -/* - * Replace the default interrupt mask and unmask routines in intr_machdep.c - * with routines that are SMP-friendly. In contrast to the default mask/unmask - * routines in intr_machdep.c these routines do not change the SR.int_mask bits. - * - * Instead they use the interrupt mapper to either mask or unmask all - * interrupt sources feeding into a particular interrupt line of the processor. - * - * This means that these routines have an identical effect irrespective of - * which cpu is executing them. This is important because the ithread may - * be scheduled to run on either of the cpus. - */ -static void -zbbus_intr_mask(void *arg) -{ - uint64_t mask; - int irq; - - irq = (uintptr_t)arg; - - mtx_lock_spin(&zbbus_intr_mtx); - - mask = sb_read_intsrc_mask(0); - mask |= hardint_to_intsrc_mask[irq]; - sb_write_intsrc_mask(0, mask); - - mtx_unlock_spin(&zbbus_intr_mtx); -} - -static void -zbbus_intr_unmask(void *arg) -{ - uint64_t mask; - int irq; - - irq = (uintptr_t)arg; - - mtx_lock_spin(&zbbus_intr_mtx); - - mask = sb_read_intsrc_mask(0); - mask &= ~hardint_to_intsrc_mask[irq]; - sb_write_intsrc_mask(0, mask); - - mtx_unlock_spin(&zbbus_intr_mtx); -} - -struct zbbus_devinfo { - struct resource_list resources; -}; - -static MALLOC_DEFINE(M_ZBBUSDEV, "zbbusdev", "zbbusdev"); - -static int -zbbus_probe(device_t dev) -{ - - device_set_desc(dev, "Broadcom/Sibyte ZBbus"); - return (BUS_PROBE_NOWILDCARD); -} - -static int -zbbus_attach(device_t dev) -{ - - if (bootverbose) { - device_printf(dev, "attached.\n"); - } - - cpu_set_hardintr_mask_func(zbbus_intr_mask); - cpu_set_hardintr_unmask_func(zbbus_intr_unmask); - - bus_generic_probe(dev); - bus_enumerate_hinted_children(dev); - bus_generic_attach(dev); - - return (0); -} - -static void -zbbus_hinted_child(device_t bus, const char *dname, int dunit) -{ - device_t child; - long maddr, msize; - int err, irq; - - if (resource_disabled(dname, dunit)) - return; - - child = BUS_ADD_CHILD(bus, 0, dname, dunit); - if (child == NULL) { - panic("zbbus: could not add child %s unit %d\n", dname, dunit); - } - - if (bootverbose) - device_printf(bus, "Adding hinted child %s%d\n", dname, dunit); - - /* - * Assign any pre-defined resources to the child. - */ - if (resource_long_value(dname, dunit, "msize", &msize) == 0 && - resource_long_value(dname, dunit, "maddr", &maddr) == 0) { - if (bootverbose) { - device_printf(bus, "Assigning memory resource " - "0x%0lx/%ld to child %s%d\n", - maddr, msize, dname, dunit); - } - err = bus_set_resource(child, SYS_RES_MEMORY, 0, maddr, msize); - if (err) { - device_printf(bus, "Unable to set memory resource " - "0x%0lx/%ld for child %s%d: %d\n", - maddr, msize, dname, dunit, err); - } - } - - if (resource_int_value(dname, dunit, "irq", &irq) == 0) { - if (bootverbose) { - device_printf(bus, "Assigning irq resource %d to " - "child %s%d\n", irq, dname, dunit); - } - err = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1); - if (err) { - device_printf(bus, "Unable to set irq resource %d" - "for child %s%d: %d\n", - irq, dname, dunit, err); - } - } -} - -static struct resource * -zbbus_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct resource *res; - int intrnum, intsrc, isdefault; - struct resource_list *rl; - struct resource_list_entry *rle; - struct zbbus_devinfo *dinfo; - - isdefault = (RMAN_IS_DEFAULT_RANGE(start, end) && count == 1); - - /* - * Our direct child is asking for a default resource allocation. - */ - if (device_get_parent(child) == bus) { - dinfo = device_get_ivars(child); - rl = &dinfo->resources; - rle = resource_list_find(rl, type, *rid); - if (rle) { - if (rle->res) - panic("zbbus_alloc_resource: resource is busy"); - if (isdefault) { - start = rle->start; - count = ulmax(count, rle->count); - end = ulmax(rle->end, start + count - 1); - } - } else { - if (isdefault) { - /* - * Our child is requesting a default - * resource allocation but we don't have the - * 'type/rid' tuple in the resource list. - * - * We have to fail the resource allocation. - */ - return (NULL); - } else { - /* - * The child is requesting a non-default - * resource. We just pass the request up - * to our parent. If the resource allocation - * succeeds we will create a resource list - * entry corresponding to that resource. - */ - } - } - } else { - rl = NULL; - rle = NULL; - } - - /* - * nexus doesn't know about the interrupt mapper and only wants to - * see the hard irq numbers [0-6]. We translate from the interrupt - * source presented to the mapper to the interrupt number presented - * to the cpu. - */ - if ((count == 1) && (type == SYS_RES_IRQ)) { - intsrc = start; - intrnum = sb_route_intsrc(intsrc); - start = end = intrnum; - } else { - intsrc = -1; /* satisfy gcc */ - intrnum = -1; - } - - res = bus_generic_alloc_resource(bus, child, type, rid, - start, end, count, flags); - - /* - * Keep track of the input into the interrupt mapper that maps - * to the resource allocated by 'child' with resource id 'rid'. - * - * If we don't record the mapping here then we won't be able to - * locate the interrupt source when bus_setup_intr(child,rid) is - * called. - */ - if (res != NULL && intrnum != -1) - sb_intmap_add(intrnum, child, rman_get_rid(res), intsrc); - - /* - * If a non-default resource allocation by our child was successful - * then keep track of the resource in the resource list associated - * with the child. - */ - if (res != NULL && rle == NULL && device_get_parent(child) == bus) { - resource_list_add(rl, type, *rid, start, end, count); - rle = resource_list_find(rl, type, *rid); - if (rle == NULL) - panic("zbbus_alloc_resource: cannot find resource"); - } - - if (rle != NULL) { - KASSERT(device_get_parent(child) == bus, - ("rle should be NULL for passthru device")); - rle->res = res; - if (rle->res) { - rle->start = rman_get_start(rle->res); - rle->end = rman_get_end(rle->res); - rle->count = count; - } - } - - return (res); -} - -static int -zbbus_setup_intr(device_t dev, device_t child, struct resource *irq, int flags, - driver_filter_t *filter, driver_intr_t *intr, void *arg, - void **cookiep) -{ - int error; - - error = bus_generic_setup_intr(dev, child, irq, flags, - filter, intr, arg, cookiep); - if (error == 0) - sb_intmap_activate(rman_get_start(irq), child, - rman_get_rid(irq)); - - return (error); -} - -static device_t -zbbus_add_child(device_t bus, u_int order, const char *name, int unit) -{ - device_t child; - struct zbbus_devinfo *dinfo; - - child = device_add_child_ordered(bus, order, name, unit); - if (child != NULL) { - dinfo = malloc(sizeof(struct zbbus_devinfo), M_ZBBUSDEV, - M_WAITOK | M_ZERO); - resource_list_init(&dinfo->resources); - device_set_ivars(child, dinfo); - } - - return (child); -} - -static struct resource_list * -zbbus_get_resource_list(device_t dev, device_t child) -{ - struct zbbus_devinfo *dinfo = device_get_ivars(child); - - return (&dinfo->resources); -} - -static device_method_t zbbus_methods[] ={ - /* Device interface */ - DEVMETHOD(device_probe, zbbus_probe), - DEVMETHOD(device_attach, zbbus_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus interface */ - DEVMETHOD(bus_alloc_resource, zbbus_alloc_resource), - DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_get_resource_list,zbbus_get_resource_list), - DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), - DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), - DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), - DEVMETHOD(bus_setup_intr, zbbus_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - DEVMETHOD(bus_add_child, zbbus_add_child), - DEVMETHOD(bus_hinted_child, zbbus_hinted_child), - - { 0, 0 } -}; - -static driver_t zbbus_driver = { - "zbbus", - zbbus_methods -}; - -static devclass_t zbbus_devclass; - -DRIVER_MODULE(zbbus, nexus, zbbus_driver, zbbus_devclass, 0, 0); Index: head/sys/mips/sibyte/sb_zbpci.c =================================================================== --- head/sys/mips/sibyte/sb_zbpci.c +++ head/sys/mips/sibyte/sb_zbpci.c @@ -1,545 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2009 Neelkanth Natu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include "pcib_if.h" - -#include "sb_bus_space.h" -#include "sb_scd.h" - -__FBSDID("$FreeBSD$"); - -static struct { - vm_offset_t vaddr; - vm_paddr_t paddr; -} zbpci_config_space[MAXCPU]; - -static const vm_paddr_t CFG_PADDR_BASE = 0xFE000000; -static const u_long PCI_IOSPACE_ADDR = 0xFC000000; -static const u_long PCI_IOSPACE_SIZE = 0x02000000; - -#define PCI_MATCH_BYTE_LANES_START 0x40000000 -#define PCI_MATCH_BYTE_LANES_END 0x5FFFFFFF -#define PCI_MATCH_BYTE_LANES_SIZE 0x20000000 - -#define PCI_MATCH_BIT_LANES_MASK (1 << 29) -#define PCI_MATCH_BIT_LANES_START 0x60000000 -#define PCI_MATCH_BIT_LANES_END 0x7FFFFFFF -#define PCI_MATCH_BIT_LANES_SIZE 0x20000000 - -static struct rman port_rman; - -static int -zbpci_probe(device_t dev) -{ - - device_set_desc(dev, "Broadcom/Sibyte PCI I/O Bridge"); - return (0); -} - -static int -zbpci_attach(device_t dev) -{ - int n, rid, size; - vm_offset_t va; - struct resource *res; - - /* - * Reserve the physical memory window used to map PCI I/O space. - */ - rid = 0; - res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, - PCI_IOSPACE_ADDR, - PCI_IOSPACE_ADDR + PCI_IOSPACE_SIZE - 1, - PCI_IOSPACE_SIZE, 0); - if (res == NULL) - panic("Cannot allocate resource for PCI I/O space mapping."); - - port_rman.rm_start = 0; - port_rman.rm_end = PCI_IOSPACE_SIZE - 1; - port_rman.rm_type = RMAN_ARRAY; - port_rman.rm_descr = "PCI I/O ports"; - if (rman_init(&port_rman) != 0 || - rman_manage_region(&port_rman, 0, PCI_IOSPACE_SIZE - 1) != 0) - panic("%s: port_rman", __func__); - - /* - * Reserve the physical memory that is used to read/write to the - * pci config space but don't activate it. We are using a page worth - * of KVA as a window over this region. - */ - rid = 1; - size = (PCI_BUSMAX + 1) * (PCI_SLOTMAX + 1) * (PCI_FUNCMAX + 1) * 256; - res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, CFG_PADDR_BASE, - CFG_PADDR_BASE + size - 1, size, 0); - if (res == NULL) - panic("Cannot allocate resource for config space accesses."); - - /* - * Allocate the entire "match bit lanes" address space. - */ -#if _BYTE_ORDER == _BIG_ENDIAN - rid = 2; - res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, - PCI_MATCH_BIT_LANES_START, - PCI_MATCH_BIT_LANES_END, - PCI_MATCH_BIT_LANES_SIZE, 0); - if (res == NULL) - panic("Cannot allocate resource for pci match bit lanes."); -#endif /* _BYTE_ORDER ==_BIG_ENDIAN */ - - /* - * Allocate KVA for accessing PCI config space. - */ - va = kva_alloc(PAGE_SIZE * mp_ncpus); - if (va == 0) { - device_printf(dev, "Cannot allocate virtual addresses for " - "config space access.\n"); - return (ENOMEM); - } - - for (n = 0; n < mp_ncpus; ++n) - zbpci_config_space[n].vaddr = va + n * PAGE_SIZE; - - /* - * Sibyte has the PCI bus hierarchy rooted at bus 0 and HT-PCI - * hierarchy rooted at bus 1. - */ - if (device_add_child(dev, "pci", 0) == NULL) - panic("zbpci_attach: could not add pci bus 0.\n"); - - if (device_add_child(dev, "pci", 1) == NULL) - panic("zbpci_attach: could not add pci bus 1.\n"); - - if (bootverbose) - device_printf(dev, "attached.\n"); - - return (bus_generic_attach(dev)); -} - -static struct resource * -zbpci_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct resource *res; - - /* - * Handle PCI I/O port resources here and pass everything else to nexus. - */ - if (type != SYS_RES_IOPORT) { - res = bus_generic_alloc_resource(bus, child, type, rid, - start, end, count, flags); - return (res); - } - - res = rman_reserve_resource(&port_rman, start, end, count, - flags, child); - if (res == NULL) - return (NULL); - - rman_set_rid(res, *rid); - - /* Activate the resource is requested */ - if (flags & RF_ACTIVE) { - if (bus_activate_resource(child, type, *rid, res) != 0) { - rman_release_resource(res); - return (NULL); - } - } - - return (res); -} - -static int -zbpci_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - int error; - void *vaddr; - u_long orig_paddr, paddr, psize; - - paddr = rman_get_start(res); - psize = rman_get_size(res); - orig_paddr = paddr; - -#if _BYTE_ORDER == _BIG_ENDIAN - /* - * The CFE allocates PCI memory resources that map to the - * "match byte lanes" address space. This address space works - * best for DMA transfers because it does not do any automatic - * byte swaps when data crosses the pci-cpu interface. - * - * This also makes it sub-optimal for accesses to PCI device - * registers because it exposes the little-endian nature of - * the PCI bus to the big-endian CPU. The Sibyte has another - * address window called the "match bit lanes" window which - * automatically swaps bytes when data crosses the pci-cpu - * interface. - * - * We "assume" that any bus_space memory accesses done by the - * CPU to a PCI device are register/configuration accesses and - * are done through the "match bit lanes" window. Any DMA - * transfers will continue to be through the "match byte lanes" - * window because the PCI BAR registers will not be changed. - */ - if (type == SYS_RES_MEMORY) { - if (paddr >= PCI_MATCH_BYTE_LANES_START && - paddr + psize - 1 <= PCI_MATCH_BYTE_LANES_END) { - paddr |= PCI_MATCH_BIT_LANES_MASK; - rman_set_start(res, paddr); - rman_set_end(res, paddr + psize - 1); - } - } -#endif - - if (type != SYS_RES_IOPORT) { - error = bus_generic_activate_resource(bus, child, type, - rid, res); -#if _BYTE_ORDER == _BIG_ENDIAN - if (type == SYS_RES_MEMORY) { - rman_set_start(res, orig_paddr); - rman_set_end(res, orig_paddr + psize - 1); - } -#endif - return (error); - } - - /* - * Map the I/O space resource through the memory window starting - * at PCI_IOSPACE_ADDR. - */ - vaddr = pmap_mapdev(paddr + PCI_IOSPACE_ADDR, psize); - - rman_set_virtual(res, vaddr); - rman_set_bustag(res, mips_bus_space_generic); - rman_set_bushandle(res, (bus_space_handle_t)vaddr); - - return (rman_activate_resource(res)); -} - -static int -zbpci_release_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - int error; - - if (type != SYS_RES_IOPORT) - return (bus_generic_release_resource(bus, child, type, rid, r)); - - if (rman_get_flags(r) & RF_ACTIVE) { - error = bus_deactivate_resource(child, type, rid, r); - if (error) - return (error); - } - - return (rman_release_resource(r)); -} - -static int -zbpci_deactivate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - vm_offset_t va; - - if (type != SYS_RES_IOPORT) { - return (bus_generic_deactivate_resource(bus, child, type, - rid, r)); - } - - va = (vm_offset_t)rman_get_virtual(r); - pmap_unmapdev(va, rman_get_size(r)); - - return (rman_deactivate_resource(r)); -} - -static int -zbpci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) -{ - - switch (which) { - case PCIB_IVAR_DOMAIN: - *result = 0; /* single PCI domain */ - return (0); - case PCIB_IVAR_BUS: - *result = device_get_unit(child); /* PCI bus 0 or 1 */ - return (0); - default: - return (ENOENT); - } -} - -/* - * We rely on the CFE to have configured the intline correctly to point to - * one of PCI-A/PCI-B/PCI-C/PCI-D in the interupt mapper. - */ -static int -zbpci_route_interrupt(device_t pcib, device_t dev, int pin) -{ - - return (PCI_INVALID_IRQ); -} - -/* - * This function is expected to be called in a critical section since it - * changes the per-cpu pci config space va-to-pa mappings. - */ -static vm_offset_t -zbpci_config_space_va(int bus, int slot, int func, int reg, int bytes) -{ - int cpu; - vm_offset_t va_page; - vm_paddr_t pa, pa_page; - - if (bus <= PCI_BUSMAX && slot <= PCI_SLOTMAX && func <= PCI_FUNCMAX && - reg <= PCI_REGMAX && (bytes == 1 || bytes == 2 || bytes == 4) && - ((reg & (bytes - 1)) == 0)) { - cpu = PCPU_GET(cpuid); - va_page = zbpci_config_space[cpu].vaddr; - pa = CFG_PADDR_BASE | - (bus << 16) | (slot << 11) | (func << 8) | reg; -#if _BYTE_ORDER == _BIG_ENDIAN - pa = pa ^ (4 - bytes); -#endif - pa_page = rounddown2(pa, PAGE_SIZE); - if (zbpci_config_space[cpu].paddr != pa_page) { - pmap_kremove(va_page); - pmap_kenter_attr(va_page, pa_page, PTE_C_UNCACHED); - zbpci_config_space[cpu].paddr = pa_page; - } - return (va_page + (pa - pa_page)); - } else { - return (0); - } -} - -static uint32_t -zbpci_read_config(device_t dev, u_int b, u_int s, u_int f, u_int r, int w) -{ - uint32_t data; - vm_offset_t va; - - critical_enter(); - - va = zbpci_config_space_va(b, s, f, r, w); - if (va == 0) { - panic("zbpci_read_config: invalid %d/%d/%d[%d] %d\n", - b, s, f, r, w); - } - - switch (w) { - case 4: - data = *(uint32_t *)va; - break; - case 2: - data = *(uint16_t *)va; - break; - case 1: - data = *(uint8_t *)va; - break; - default: - panic("zbpci_read_config: invalid width %d\n", w); - } - - critical_exit(); - - return (data); -} - -static void -zbpci_write_config(device_t d, u_int b, u_int s, u_int f, u_int r, - uint32_t data, int w) -{ - vm_offset_t va; - - critical_enter(); - - va = zbpci_config_space_va(b, s, f, r, w); - if (va == 0) { - panic("zbpci_write_config: invalid %d/%d/%d[%d] %d/%d\n", - b, s, f, r, data, w); - } - - switch (w) { - case 4: - *(uint32_t *)va = data; - break; - case 2: - *(uint16_t *)va = data; - break; - case 1: - *(uint8_t *)va = data; - break; - default: - panic("zbpci_write_config: invalid width %d\n", w); - } - - critical_exit(); -} - -static device_method_t zbpci_methods[] ={ - /* Device interface */ - DEVMETHOD(device_probe, zbpci_probe), - DEVMETHOD(device_attach, zbpci_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus interface */ - DEVMETHOD(bus_read_ivar, zbpci_read_ivar), - DEVMETHOD(bus_write_ivar, bus_generic_write_ivar), - DEVMETHOD(bus_alloc_resource, zbpci_alloc_resource), - DEVMETHOD(bus_activate_resource, zbpci_activate_resource), - DEVMETHOD(bus_deactivate_resource, zbpci_deactivate_resource), - DEVMETHOD(bus_release_resource, zbpci_release_resource), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - DEVMETHOD(bus_add_child, bus_generic_add_child), - - /* pcib interface */ - DEVMETHOD(pcib_maxslots, pcib_maxslots), - DEVMETHOD(pcib_read_config, zbpci_read_config), - DEVMETHOD(pcib_write_config, zbpci_write_config), - DEVMETHOD(pcib_route_interrupt, zbpci_route_interrupt), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - { 0, 0 } -}; - -/* - * The "zbpci" class inherits from the "pcib" base class. Therefore in - * addition to drivers that belong to the "zbpci" class we will also - * consider drivers belonging to the "pcib" when probing children of - * "zbpci". - */ -DEFINE_CLASS_1(zbpci, zbpci_driver, zbpci_methods, 0, pcib_driver); - -static devclass_t zbpci_devclass; - -DRIVER_MODULE(zbpci, zbbus, zbpci_driver, zbpci_devclass, 0, 0); - -/* - * Big endian bus space routines - */ -#if _BYTE_ORDER == _BIG_ENDIAN - -/* - * The CPU correctly deals with the big-endian to little-endian swap if - * we are accessing 4 bytes at a time. However if we want to read 1 or 2 - * bytes then we need to fudge the address generated by the CPU such that - * it generates the right byte enables on the PCI bus. - */ -static bus_addr_t -sb_match_bit_lane_addr(bus_addr_t addr, int bytes) -{ - vm_offset_t pa; - - pa = vtophys(addr); - - if (pa >= PCI_MATCH_BIT_LANES_START && pa <= PCI_MATCH_BIT_LANES_END) - return (addr ^ (4 - bytes)); - else - return (addr); -} - -uint8_t -sb_big_endian_read8(bus_addr_t addr) -{ - bus_addr_t addr2; - - addr2 = sb_match_bit_lane_addr(addr, 1); - return (readb(addr2)); -} - -uint16_t -sb_big_endian_read16(bus_addr_t addr) -{ - bus_addr_t addr2; - - addr2 = sb_match_bit_lane_addr(addr, 2); - return (readw(addr2)); -} - -uint32_t -sb_big_endian_read32(bus_addr_t addr) -{ - bus_addr_t addr2; - - addr2 = sb_match_bit_lane_addr(addr, 4); - return (readl(addr2)); -} - -void -sb_big_endian_write8(bus_addr_t addr, uint8_t val) -{ - bus_addr_t addr2; - - addr2 = sb_match_bit_lane_addr(addr, 1); - writeb(addr2, val); -} - -void -sb_big_endian_write16(bus_addr_t addr, uint16_t val) -{ - bus_addr_t addr2; - - addr2 = sb_match_bit_lane_addr(addr, 2); - writew(addr2, val); -} - -void -sb_big_endian_write32(bus_addr_t addr, uint32_t val) -{ - bus_addr_t addr2; - - addr2 = sb_match_bit_lane_addr(addr, 4); - writel(addr2, val); -} -#endif /* _BIG_ENDIAN */ Index: head/sys/mips/sibyte/std.sibyte =================================================================== --- head/sys/mips/sibyte/std.sibyte +++ head/sys/mips/sibyte/std.sibyte @@ -1,3 +0,0 @@ -# $FreeBSD$ - -files "../sibyte/files.sibyte"