Index: sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.h
===================================================================
--- sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.h
+++ sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.h
@@ -57,6 +57,17 @@
 #define	MTKSWITCH_FPA		0x0084
 #define		FPA_ALL_AUTO	0x00000000
 
+#define	MTKSWITCH_SOCPC		0x008c
+#define		SOCPC_DISUN2C(x)	(1 << (x))
+#define		SOCPC_DISMC2C(x)	((1 << (x)) << 8)
+#define		SOCPC_DISBC2C(x)	((1 << (x)) << 16)
+#define		SOCPC_CRC_PADDING	0x02000000
+
+#define	MTKSWITCH_POC0		0x0090
+#define		POC0_DIS_PORT_MSK	0x0f800000
+#define		POC0_DIS_GPORT1_MSK	0x10000000
+#define		POC0_DIS_GPORT2_MSK	0x20000000
+
 #define	MTKSWITCH_POC2		0x0098
 #define		POC2_UNTAG_PORT(x)	(1 << (x))
 #define		POC2_UNTAG_VLAN		(1 << 15)
@@ -76,6 +87,9 @@
 #define		PCR1_DATA_OFF	16
 #define		PCR1_DATA_MASK	0xffff
 
+#define	MTKSWITCH_FPA2		0x00c8
+#define	MTKSWITCH_FCT2		0x00cc
+
 #define	MTKSWITCH_SGC2		0x00e4
 #define		SGC2_DOUBLE_TAG_PORT(x)	(1 << (x))
 
Index: sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
===================================================================
--- sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
+++ sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
@@ -51,6 +51,9 @@
 #include <dev/mii/miivar.h>
 #include <dev/mdio/mdio.h>
 
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/ofw_bus.h>
+
 #include <dev/etherswitch/etherswitch.h>
 #include <dev/etherswitch/mtkswitch/mtkswitchvar.h>
 #include <dev/etherswitch/mtkswitch/mtkswitch_rt3050.h>
@@ -124,7 +127,16 @@
 static int
 mtkswitch_reset(struct mtkswitch_softc *sc)
 {
+	phandle_t node;
+	int val;
+
+	node = ofw_bus_get_node(sc->sc_dev);
 
+	if (OF_getencprop(node, "ralink,noreset", &val,
+	    sizeof(val)) >= 0) {
+		if(val == 1)
+			return (0);
+	}
 	MTKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
 	MTKSWITCH_LOCK(sc);
 	MTKSWITCH_WRITE(sc, MTKSWITCH_STRT, STRT_RESET);
@@ -137,12 +149,33 @@
 static int
 mtkswitch_hw_setup(struct mtkswitch_softc *sc)
 {
+	phandle_t node;
+	int val;
+
+	node = ofw_bus_get_node(sc->sc_dev);
 
 	/*
 	 * TODO: parse the device tree and see if we need to configure
 	 *       ports, etc. differently. For now we fallback to defaults.
 	 */
 
+	if (OF_getencprop(node, "ralink,fct2", &val,
+	    sizeof(val)) >= 0) {
+		MTKSWITCH_WRITE(sc, MTKSWITCH_FCT2, val);
+	}
+	if (OF_getencprop(node, "ralink,fpa2", &val,
+	    sizeof(val)) >= 0) {
+		MTKSWITCH_WRITE(sc, MTKSWITCH_FPA2, val);
+	}
+	val = MTKSWITCH_READ(sc, MTKSWITCH_POC0);
+	val = val & ~(POC0_DIS_PORT_MSK | POC0_DIS_GPORT1_MSK |
+	    POC0_DIS_GPORT2_MSK);
+	MTKSWITCH_WRITE(sc, MTKSWITCH_POC0, val);
+	MTKSWITCH_WRITE(sc, MTKSWITCH_SOCPC, (SOCPC_CRC_PADDING | 
+	    SOCPC_DISBC2C(MTKSWITCH_CPU_PORT) |
+	    SOCPC_DISMC2C(MTKSWITCH_CPU_PORT) |
+	    SOCPC_DISUN2C(MTKSWITCH_CPU_PORT)));
+
 	/* Called early and hence unlocked */
 	/* Set ports 0-4 to auto negotiation */
 	MTKSWITCH_WRITE(sc, MTKSWITCH_FPA, FPA_ALL_AUTO);
Index: sys/dts/mips/WN-G300DGR.dts
===================================================================
--- /dev/null
+++ sys/dts/mips/WN-G300DGR.dts
@@ -0,0 +1,142 @@
+/dts-v1/;
+
+#include "rt3050.dtsi"
+
+/ {
+	compatible = "WN-G300DGR", "ralink,rt3052-soc";
+	model = "IOData WN-G300DGR";
+
+	cfi@1f000000 {
+		compatible = "cfi-flash";
+		reg = <0x1f000000 0x400000>;
+		bank-width = <2>;
+		device-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x0 0x50000>;
+			read-only;
+		};
+
+		partition@30000 {
+			label = "u-boot-env";
+			reg = <0x30000 0x10000>;
+			read-only;
+		};
+
+		factory: partition@40000 {
+			label = "factory";
+			reg = <0x40000 0x10000>;
+			read-only;
+		};
+
+		partition@50000 {
+			label = "firmware";
+			reg = <0x00050000 0x003b0000>;
+			read-only;
+		};
+
+		partition@800000 {
+			label = "upgrade";
+			reg = <0x00050000 0x003b0000>;
+		};
+
+	};
+
+	/* gpio 7 connect reset */
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		status {
+			label = "status";
+			gpios = <&gpio0 12 0>;
+		};
+
+		led1 {
+			label = "led1";
+			gpios = <&gpio0 13 1>;
+		};
+
+		led2 {
+			label = "led2";
+			gpios = <&gpio0 8 1>;
+		};
+
+		led3 {
+			label = "led3";
+			gpios = <&gpio0 11 1>;
+		};
+
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 10 1>;
+			linux,code = <0x198>;
+		};
+
+	};
+
+        gpioiic {
+                compatible = "gpioiic";
+                gpios = <&gpio0 2 0
+                        &gpio0 1 0>;
+                gpio-names = "scl", "sda";
+        };
+
+        rtl8366rb {
+                compatible = "realtek,rtl8366rb";
+        };
+
+};
+
+&pinctrl {
+	state_default: pinctrl0 {
+		gpio {
+			ralink,group = "i2c", "jtag", "uartf";
+			ralink,function = "gpio";
+		};
+
+		rgmii {
+			ralink,group = "rgmii";
+			ralink,function = "rgmii";
+		};
+
+		mdio {
+			ralink,group = "mdio";
+			ralink,function = "mdio";
+		};
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+};
+
+&esw {
+	ralink,noreset = <1>;
+
+	mediatek,portmap = <0x2f>;
+
+	/* same as WL-351.dts */
+	ralink,fct2 = <0x0002500c>;
+	ralink,fpa2 = <0x1f003fff>;
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0>;
+};
+
+&otg {
+	status = "okay";
+};
+