Index: lib/libc/riscv/gen/_setjmp.S
===================================================================
--- lib/libc/riscv/gen/_setjmp.S
+++ lib/libc/riscv/gen/_setjmp.S
@@ -63,19 +63,19 @@
 
 #if !defined(_STANDALONE) && defined(__riscv_float_abi_double)
 	/* Store the fpe registers */
-	fsd	fs0, (0 * 16)(a0)
-	fsd	fs1, (1 * 16)(a0)
-	fsd	fs2, (2 * 16)(a0)
-	fsd	fs3, (3 * 16)(a0)
-	fsd	fs4, (4 * 16)(a0)
-	fsd	fs5, (5 * 16)(a0)
-	fsd	fs6, (6 * 16)(a0)
-	fsd	fs7, (7 * 16)(a0)
-	fsd	fs8, (8 * 16)(a0)
-	fsd	fs9, (9 * 16)(a0)
-	fsd	fs10, (10 * 16)(a0)
-	fsd	fs11, (11 * 16)(a0)
-	addi	a0, a0, (12 * 16)
+	fsd	fs0, (0 * 8)(a0)
+	fsd	fs1, (1 * 8)(a0)
+	fsd	fs2, (2 * 8)(a0)
+	fsd	fs3, (3 * 8)(a0)
+	fsd	fs4, (4 * 8)(a0)
+	fsd	fs5, (5 * 8)(a0)
+	fsd	fs6, (6 * 8)(a0)
+	fsd	fs7, (7 * 8)(a0)
+	fsd	fs8, (8 * 8)(a0)
+	fsd	fs9, (9 * 8)(a0)
+	fsd	fs10, (10 * 8)(a0)
+	fsd	fs11, (11 * 8)(a0)
+	addi	a0, a0, (12 * 8)
 #endif
 
 	/* Return value */
@@ -116,19 +116,19 @@
 
 #if !defined(_STANDALONE) && defined(__riscv_float_abi_double)
 	/* Restore the fpe registers */
-	fld	fs0, (0 * 16)(a0)
-	fld	fs1, (1 * 16)(a0)
-	fld	fs2, (2 * 16)(a0)
-	fld	fs3, (3 * 16)(a0)
-	fld	fs4, (4 * 16)(a0)
-	fld	fs5, (5 * 16)(a0)
-	fld	fs6, (6 * 16)(a0)
-	fld	fs7, (7 * 16)(a0)
-	fld	fs8, (8 * 16)(a0)
-	fld	fs9, (9 * 16)(a0)
-	fld	fs10, (10 * 16)(a0)
-	fld	fs11, (11 * 16)(a0)
-	addi	a0, a0, (12 * 16)
+	fld	fs0, (0 * 8)(a0)
+	fld	fs1, (1 * 8)(a0)
+	fld	fs2, (2 * 8)(a0)
+	fld	fs3, (3 * 8)(a0)
+	fld	fs4, (4 * 8)(a0)
+	fld	fs5, (5 * 8)(a0)
+	fld	fs6, (6 * 8)(a0)
+	fld	fs7, (7 * 8)(a0)
+	fld	fs8, (8 * 8)(a0)
+	fld	fs9, (9 * 8)(a0)
+	fld	fs10, (10 * 8)(a0)
+	fld	fs11, (11 * 8)(a0)
+	addi	a0, a0, (12 * 8)
 #endif
 
 	/* Load the return value */
Index: lib/libc/riscv/gen/setjmp.S
===================================================================
--- lib/libc/riscv/gen/setjmp.S
+++ lib/libc/riscv/gen/setjmp.S
@@ -77,19 +77,19 @@
 
 #ifdef __riscv_float_abi_double
 	/* Store the fpe registers */
-	fsd	fs0, (0 * 16)(a0)
-	fsd	fs1, (1 * 16)(a0)
-	fsd	fs2, (2 * 16)(a0)
-	fsd	fs3, (3 * 16)(a0)
-	fsd	fs4, (4 * 16)(a0)
-	fsd	fs5, (5 * 16)(a0)
-	fsd	fs6, (6 * 16)(a0)
-	fsd	fs7, (7 * 16)(a0)
-	fsd	fs8, (8 * 16)(a0)
-	fsd	fs9, (9 * 16)(a0)
-	fsd	fs10, (10 * 16)(a0)
-	fsd	fs11, (11 * 16)(a0)
-	addi	a0, a0, (12 * 16)
+	fsd	fs0, (0 * 8)(a0)
+	fsd	fs1, (1 * 8)(a0)
+	fsd	fs2, (2 * 8)(a0)
+	fsd	fs3, (3 * 8)(a0)
+	fsd	fs4, (4 * 8)(a0)
+	fsd	fs5, (5 * 8)(a0)
+	fsd	fs6, (6 * 8)(a0)
+	fsd	fs7, (7 * 8)(a0)
+	fsd	fs8, (8 * 8)(a0)
+	fsd	fs9, (9 * 8)(a0)
+	fsd	fs10, (10 * 8)(a0)
+	fsd	fs11, (11 * 8)(a0)
+	addi	a0, a0, (12 * 8)
 #endif
 
 	/* Return value */
@@ -146,19 +146,19 @@
 
 #ifdef __riscv_float_abi_double
 	/* Restore the fpe registers */
-	fld	fs0, (0 * 16)(a0)
-	fld	fs1, (1 * 16)(a0)
-	fld	fs2, (2 * 16)(a0)
-	fld	fs3, (3 * 16)(a0)
-	fld	fs4, (4 * 16)(a0)
-	fld	fs5, (5 * 16)(a0)
-	fld	fs6, (6 * 16)(a0)
-	fld	fs7, (7 * 16)(a0)
-	fld	fs8, (8 * 16)(a0)
-	fld	fs9, (9 * 16)(a0)
-	fld	fs10, (10 * 16)(a0)
-	fld	fs11, (11 * 16)(a0)
-	addi	a0, a0, (12 * 16)
+	fld	fs0, (0 * 8)(a0)
+	fld	fs1, (1 * 8)(a0)
+	fld	fs2, (2 * 8)(a0)
+	fld	fs3, (3 * 8)(a0)
+	fld	fs4, (4 * 8)(a0)
+	fld	fs5, (5 * 8)(a0)
+	fld	fs6, (6 * 8)(a0)
+	fld	fs7, (7 * 8)(a0)
+	fld	fs8, (8 * 8)(a0)
+	fld	fs9, (9 * 8)(a0)
+	fld	fs10, (10 * 8)(a0)
+	fld	fs11, (11 * 8)(a0)
+	addi	a0, a0, (12 * 8)
 #endif
 
 	/* Load the return value */
Index: sys/riscv/include/reg.h
===================================================================
--- sys/riscv/include/reg.h
+++ sys/riscv/include/reg.h
@@ -50,7 +50,7 @@
 };
 
 struct fpreg {
-	uint64_t	fp_x[32][2];	/* Floating point registers */
+	uint64_t	fp_x[32];	/* Floating point registers */
 	uint64_t	fp_fcsr;	/* Floating point control reg */
 };
 
Index: sys/riscv/include/setjmp.h
===================================================================
--- sys/riscv/include/setjmp.h
+++ sys/riscv/include/setjmp.h
@@ -40,7 +40,7 @@
 #include <sys/cdefs.h>
 
 #define	_JBLEN		63	/* sp, ra, [f]s0-11, magic val, sigmask */
-#define	_JB_SIGMASK	21
+#define	_JB_SIGMASK	27
 
 #ifdef	__ASSEMBLER__
 #define	_JB_MAGIC__SETJMP	0xbe87fd8a2910af00
Index: sys/riscv/riscv/swtch.S
===================================================================
--- sys/riscv/riscv/swtch.S
+++ sys/riscv/riscv/swtch.S
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2015-2017 Ruslan Bukin <br@bsdpad.com>
+ * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
  * All rights reserved.
  *
  * Portions of this software were developed by SRI International and the
@@ -54,38 +54,38 @@
 	/* Store registers */
 	frcsr	t0
 	sd	t0, (PCB_FCSR)(\p)
-	fsd	f0, (PCB_X + 0 * 16)(\p)
-	fsd	f1, (PCB_X + 1 * 16)(\p)
-	fsd	f2, (PCB_X + 2 * 16)(\p)
-	fsd	f3, (PCB_X + 3 * 16)(\p)
-	fsd	f4, (PCB_X + 4 * 16)(\p)
-	fsd	f5, (PCB_X + 5 * 16)(\p)
-	fsd	f6, (PCB_X + 6 * 16)(\p)
-	fsd	f7, (PCB_X + 7 * 16)(\p)
-	fsd	f8, (PCB_X + 8 * 16)(\p)
-	fsd	f9, (PCB_X + 9 * 16)(\p)
-	fsd	f10, (PCB_X + 10 * 16)(\p)
-	fsd	f11, (PCB_X + 11 * 16)(\p)
-	fsd	f12, (PCB_X + 12 * 16)(\p)
-	fsd	f13, (PCB_X + 13 * 16)(\p)
-	fsd	f14, (PCB_X + 14 * 16)(\p)
-	fsd	f15, (PCB_X + 15 * 16)(\p)
-	fsd	f16, (PCB_X + 16 * 16)(\p)
-	fsd	f17, (PCB_X + 17 * 16)(\p)
-	fsd	f18, (PCB_X + 18 * 16)(\p)
-	fsd	f19, (PCB_X + 19 * 16)(\p)
-	fsd	f20, (PCB_X + 20 * 16)(\p)
-	fsd	f21, (PCB_X + 21 * 16)(\p)
-	fsd	f22, (PCB_X + 22 * 16)(\p)
-	fsd	f23, (PCB_X + 23 * 16)(\p)
-	fsd	f24, (PCB_X + 24 * 16)(\p)
-	fsd	f25, (PCB_X + 25 * 16)(\p)
-	fsd	f26, (PCB_X + 26 * 16)(\p)
-	fsd	f27, (PCB_X + 27 * 16)(\p)
-	fsd	f28, (PCB_X + 28 * 16)(\p)
-	fsd	f29, (PCB_X + 29 * 16)(\p)
-	fsd	f30, (PCB_X + 30 * 16)(\p)
-	fsd	f31, (PCB_X + 31 * 16)(\p)
+	fsd	f0, (PCB_X + 0 * 8)(\p)
+	fsd	f1, (PCB_X + 1 * 8)(\p)
+	fsd	f2, (PCB_X + 2 * 8)(\p)
+	fsd	f3, (PCB_X + 3 * 8)(\p)
+	fsd	f4, (PCB_X + 4 * 8)(\p)
+	fsd	f5, (PCB_X + 5 * 8)(\p)
+	fsd	f6, (PCB_X + 6 * 8)(\p)
+	fsd	f7, (PCB_X + 7 * 8)(\p)
+	fsd	f8, (PCB_X + 8 * 8)(\p)
+	fsd	f9, (PCB_X + 9 * 8)(\p)
+	fsd	f10, (PCB_X + 10 * 8)(\p)
+	fsd	f11, (PCB_X + 11 * 8)(\p)
+	fsd	f12, (PCB_X + 12 * 8)(\p)
+	fsd	f13, (PCB_X + 13 * 8)(\p)
+	fsd	f14, (PCB_X + 14 * 8)(\p)
+	fsd	f15, (PCB_X + 15 * 8)(\p)
+	fsd	f16, (PCB_X + 16 * 8)(\p)
+	fsd	f17, (PCB_X + 17 * 8)(\p)
+	fsd	f18, (PCB_X + 18 * 8)(\p)
+	fsd	f19, (PCB_X + 19 * 8)(\p)
+	fsd	f20, (PCB_X + 20 * 8)(\p)
+	fsd	f21, (PCB_X + 21 * 8)(\p)
+	fsd	f22, (PCB_X + 22 * 8)(\p)
+	fsd	f23, (PCB_X + 23 * 8)(\p)
+	fsd	f24, (PCB_X + 24 * 8)(\p)
+	fsd	f25, (PCB_X + 25 * 8)(\p)
+	fsd	f26, (PCB_X + 26 * 8)(\p)
+	fsd	f27, (PCB_X + 27 * 8)(\p)
+	fsd	f28, (PCB_X + 28 * 8)(\p)
+	fsd	f29, (PCB_X + 29 * 8)(\p)
+	fsd	f30, (PCB_X + 30 * 8)(\p)
+	fsd	f31, (PCB_X + 31 * 8)(\p)
 
 	/* Disable FPE usage in supervisor mode. */
 	li	t0, SSTATUS_FS_MASK
@@ -103,38 +103,38 @@
 	/* Restore registers */
 	ld	t0, (PCB_FCSR)(\p)
 	fscsr	t0
-	fld	f0, (PCB_X + 0 * 16)(\p)
-	fld	f1, (PCB_X + 1 * 16)(\p)
-	fld	f2, (PCB_X + 2 * 16)(\p)
-	fld	f3, (PCB_X + 3 * 16)(\p)
-	fld	f4, (PCB_X + 4 * 16)(\p)
-	fld	f5, (PCB_X + 5 * 16)(\p)
-	fld	f6, (PCB_X + 6 * 16)(\p)
-	fld	f7, (PCB_X + 7 * 16)(\p)
-	fld	f8, (PCB_X + 8 * 16)(\p)
-	fld	f9, (PCB_X + 9 * 16)(\p)
-	fld	f10, (PCB_X + 10 * 16)(\p)
-	fld	f11, (PCB_X + 11 * 16)(\p)
-	fld	f12, (PCB_X + 12 * 16)(\p)
-	fld	f13, (PCB_X + 13 * 16)(\p)
-	fld	f14, (PCB_X + 14 * 16)(\p)
-	fld	f15, (PCB_X + 15 * 16)(\p)
-	fld	f16, (PCB_X + 16 * 16)(\p)
-	fld	f17, (PCB_X + 17 * 16)(\p)
-	fld	f18, (PCB_X + 18 * 16)(\p)
-	fld	f19, (PCB_X + 19 * 16)(\p)
-	fld	f20, (PCB_X + 20 * 16)(\p)
-	fld	f21, (PCB_X + 21 * 16)(\p)
-	fld	f22, (PCB_X + 22 * 16)(\p)
-	fld	f23, (PCB_X + 23 * 16)(\p)
-	fld	f24, (PCB_X + 24 * 16)(\p)
-	fld	f25, (PCB_X + 25 * 16)(\p)
-	fld	f26, (PCB_X + 26 * 16)(\p)
-	fld	f27, (PCB_X + 27 * 16)(\p)
-	fld	f28, (PCB_X + 28 * 16)(\p)
-	fld	f29, (PCB_X + 29 * 16)(\p)
-	fld	f30, (PCB_X + 30 * 16)(\p)
-	fld	f31, (PCB_X + 31 * 16)(\p)
+	fld	f0, (PCB_X + 0 * 8)(\p)
+	fld	f1, (PCB_X + 1 * 8)(\p)
+	fld	f2, (PCB_X + 2 * 8)(\p)
+	fld	f3, (PCB_X + 3 * 8)(\p)
+	fld	f4, (PCB_X + 4 * 8)(\p)
+	fld	f5, (PCB_X + 5 * 8)(\p)
+	fld	f6, (PCB_X + 6 * 8)(\p)
+	fld	f7, (PCB_X + 7 * 8)(\p)
+	fld	f8, (PCB_X + 8 * 8)(\p)
+	fld	f9, (PCB_X + 9 * 8)(\p)
+	fld	f10, (PCB_X + 10 * 8)(\p)
+	fld	f11, (PCB_X + 11 * 8)(\p)
+	fld	f12, (PCB_X + 12 * 8)(\p)
+	fld	f13, (PCB_X + 13 * 8)(\p)
+	fld	f14, (PCB_X + 14 * 8)(\p)
+	fld	f15, (PCB_X + 15 * 8)(\p)
+	fld	f16, (PCB_X + 16 * 8)(\p)
+	fld	f17, (PCB_X + 17 * 8)(\p)
+	fld	f18, (PCB_X + 18 * 8)(\p)
+	fld	f19, (PCB_X + 19 * 8)(\p)
+	fld	f20, (PCB_X + 20 * 8)(\p)
+	fld	f21, (PCB_X + 21 * 8)(\p)
+	fld	f22, (PCB_X + 22 * 8)(\p)
+	fld	f23, (PCB_X + 23 * 8)(\p)
+	fld	f24, (PCB_X + 24 * 8)(\p)
+	fld	f25, (PCB_X + 25 * 8)(\p)
+	fld	f26, (PCB_X + 26 * 8)(\p)
+	fld	f27, (PCB_X + 27 * 8)(\p)
+	fld	f28, (PCB_X + 28 * 8)(\p)
+	fld	f29, (PCB_X + 29 * 8)(\p)
+	fld	f30, (PCB_X + 30 * 8)(\p)
+	fld	f31, (PCB_X + 31 * 8)(\p)
 
 	/* Disable FPE usage in supervisor mode. */
 	li	t0, SSTATUS_FS_MASK