Index: sys/arm/include/cpufunc.h
===================================================================
--- sys/arm/include/cpufunc.h
+++ sys/arm/include/cpufunc.h
@@ -495,6 +495,14 @@
 extern u_int	arm_cache_loc;
 extern u_int	arm_cache_type[14];
 
+#else	/* !_KERNEL */
+
+static __inline void
+breakpoint(void)
+{
+	__asm(".word      0xe7ffdefe");
+}
+
 #endif	/* _KERNEL */
 #endif	/* _MACHINE_CPUFUNC_H_ */
 
Index: sys/arm64/include/cpufunc.h
===================================================================
--- sys/arm64/include/cpufunc.h
+++ sys/arm64/include/cpufunc.h
@@ -29,12 +29,6 @@
 #ifndef _MACHINE_CPUFUNC_H_
 #define	_MACHINE_CPUFUNC_H_
 
-#ifdef _KERNEL
-
-#include <machine/armreg.h>
-
-void pan_enable(void);
-
 static __inline void
 breakpoint(void)
 {
@@ -42,6 +36,12 @@
 	__asm("brk #0");
 }
 
+#ifdef _KERNEL
+
+#include <machine/armreg.h>
+
+void pan_enable(void);
+
 static __inline register_t
 dbg_disable(void)
 {
Index: sys/riscv/include/cpufunc.h
===================================================================
--- sys/riscv/include/cpufunc.h
+++ sys/riscv/include/cpufunc.h
@@ -37,10 +37,6 @@
 #ifndef _MACHINE_CPUFUNC_H_
 #define	_MACHINE_CPUFUNC_H_
 
-#ifdef _KERNEL
-
-#include <machine/riscvreg.h>
-
 static __inline void
 breakpoint(void)
 {
@@ -48,6 +44,10 @@
 	__asm("ebreak");
 }
 
+#ifdef _KERNEL
+
+#include <machine/riscvreg.h>
+
 static __inline register_t
 intr_disable(void)
 {
Index: tests/sys/kern/ptrace_test.c
===================================================================
--- tests/sys/kern/ptrace_test.c
+++ tests/sys/kern/ptrace_test.c
@@ -54,7 +54,8 @@
 /*
  * Architectures with a user-visible breakpoint().
  */
-#if defined(__amd64__) || defined(__i386__) || defined(__mips__) ||	\
+#if defined(__aarch64__) || defined(__amd64__) || defined(__arm__) ||	\
+    defined(__i386__) || defined(__mips__) || defined(__riscv__) ||	\
     defined(__sparc64__)
 #define	HAVE_BREAKPOINT
 #endif
@@ -63,10 +64,16 @@
  * Adjust PC to skip over a breakpoint when stopped for a breakpoint trap.
  */
 #ifdef HAVE_BREAKPOINT
-#if defined(__amd64__) || defined(__i386__)
+#if defined(__aarch64__)
+#define	SKIP_BREAK(reg)	((reg)->elr += 4)
+#elif defined(__amd64__) || defined(__i386__)
 #define	SKIP_BREAK(reg)
+#elif defined(__arm__)
+#define	SKIP_BREAK(reg)	((reg)->r_pc += 4)
 #elif defined(__mips__)
 #define	SKIP_BREAK(reg)	((reg)->r_regs[PC] += 4)
+#elif defined(__riscv__)
+#define	SKIP_BREAK(reg)	((reg)->sepc += 4)
 #elif defined(__sparc64__)
 #define	SKIP_BREAK(reg)	do {						\
 	(reg)->r_tpc = (reg)->r_tnpc + 4;				\