Index: head/sys/arm/include/cpufunc.h =================================================================== --- head/sys/arm/include/cpufunc.h +++ head/sys/arm/include/cpufunc.h @@ -54,7 +54,7 @@ static __inline void breakpoint(void) { - __asm(".word 0xe7ffffff"); + __asm("udf 0xffff"); } struct cpu_functions { @@ -494,6 +494,19 @@ extern u_int arm_cache_level; extern u_int arm_cache_loc; extern u_int arm_cache_type[14]; + +#else /* !_KERNEL */ + +static __inline void +breakpoint(void) +{ + + /* + * This matches the instruction used by GDB for software + * breakpoints. + */ + __asm("udf 0xfdee"); +} #endif /* _KERNEL */ #endif /* _MACHINE_CPUFUNC_H_ */ Index: head/sys/arm64/include/cpufunc.h =================================================================== --- head/sys/arm64/include/cpufunc.h +++ head/sys/arm64/include/cpufunc.h @@ -29,18 +29,18 @@ #ifndef _MACHINE_CPUFUNC_H_ #define _MACHINE_CPUFUNC_H_ -#ifdef _KERNEL - -#include - -void pan_enable(void); - static __inline void breakpoint(void) { __asm("brk #0"); } + +#ifdef _KERNEL + +#include + +void pan_enable(void); static __inline register_t dbg_disable(void) Index: head/tests/sys/kern/ptrace_test.c =================================================================== --- head/tests/sys/kern/ptrace_test.c +++ head/tests/sys/kern/ptrace_test.c @@ -54,8 +54,9 @@ /* * Architectures with a user-visible breakpoint(). */ -#if defined(__amd64__) || defined(__i386__) || defined(__mips__) || \ - defined(__riscv) || defined(__sparc64__) +#if defined(__aarch64__) || defined(__amd64__) || defined(__arm__) || \ + defined(__i386__) || defined(__mips__) || defined(__riscv) || \ + defined(__sparc64__) #define HAVE_BREAKPOINT #endif @@ -63,8 +64,12 @@ * Adjust PC to skip over a breakpoint when stopped for a breakpoint trap. */ #ifdef HAVE_BREAKPOINT -#if defined(__amd64__) || defined(__i386__) +#if defined(__aarch64__) +#define SKIP_BREAK(reg) ((reg)->elr += 4) +#elif defined(__amd64__) || defined(__i386__) #define SKIP_BREAK(reg) +#elif defined(__arm__) +#define SKIP_BREAK(reg) ((reg)->r_pc += 4) #elif defined(__mips__) #define SKIP_BREAK(reg) ((reg)->r_regs[PC] += 4) #elif defined(__riscv)