Index: head/sys/kern/subr_uio.c
===================================================================
--- head/sys/kern/subr_uio.c
+++ head/sys/kern/subr_uio.c
@@ -505,8 +505,8 @@
 /*
  * XXXKIB The temporal implementation of fue*() functions which do not
  * handle usermode -1 properly, mixing it with the fault code.  Keep
- * this until MD code is written.  Currently sparc64 and mips do not
- * have proper implementation.
+ * this until MD code is written.  Currently sparc64 does not have a
+ * proper implementation.
  */
 
 int
Index: head/sys/mips/include/param.h
===================================================================
--- head/sys/mips/include/param.h
+++ head/sys/mips/include/param.h
@@ -185,8 +185,4 @@
 
 #define	pgtok(x)		((x) * (PAGE_SIZE / 1024))
 
-#ifdef _KERNEL
-#define	NO_FUEWORD	1
-#endif
-
 #endif /* !_MIPS_INCLUDE_PARAM_H_ */
Index: head/sys/mips/mips/support.S
===================================================================
--- head/sys/mips/mips/support.S
+++ head/sys/mips/mips/support.S
@@ -285,8 +285,8 @@
  * user-space.
  */
 #ifdef __mips_n64
-LEAF(fuword64)
-XLEAF(fuword)
+LEAF(fueword64)
+XLEAF(fueword)
 	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
 	nop
@@ -294,14 +294,16 @@
 	PTR_L	v1, PC_CURPCB(v1)
 	PTR_S	v0, U_PCB_ONFAULT(v1)
 	ld	v0, 0(a0)		# fetch word
-	j	ra
 	PTR_S	zero, U_PCB_ONFAULT(v1)
-END(fuword64)
+	sd	v0, 0(a1)		# store word
+	j	ra
+	li	v0, 0
+END(fueword64)
 #endif
 
-LEAF(fuword32)
+LEAF(fueword32)
 #ifndef __mips_n64
-XLEAF(fuword)
+XLEAF(fueword)
 #endif
 	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
@@ -310,11 +312,13 @@
 	PTR_L	v1, PC_CURPCB(v1)
 	PTR_S	v0, U_PCB_ONFAULT(v1)
 	lw	v0, 0(a0)		# fetch word
-	j	ra
 	PTR_S	zero, U_PCB_ONFAULT(v1)
-END(fuword32)
+	sw	v0, 0(a1)		# store word
+	j	ra
+	li	v0, 0
+END(fueword32)
 
-LEAF(fusword)
+LEAF(fuesword)
 	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
 	nop
@@ -322,9 +326,11 @@
 	PTR_L	v1, PC_CURPCB(v1)
 	PTR_S	v0, U_PCB_ONFAULT(v1)
 	lhu	v0, 0(a0)		# fetch short
-	j	ra
 	PTR_S	zero, U_PCB_ONFAULT(v1)
-END(fusword)
+	sh	v0, 0(a1)		# store short
+	j	ra
+	li	v0, 0
+END(fuesword)
 
 LEAF(fubyte)
 	PTR_LA	v0, fswberr
@@ -371,17 +377,18 @@
 #endif
 
 /*
- * casuword(9)
- * <v0>u_long casuword(<a0>u_long *p, <a1>u_long oldval, <a2>u_long newval)
+ * casueword(9)
+ * <v0>u_long casueword(<a0>u_long *p, <a1>u_long oldval, <a2>u_long *oldval_p,
+ *		       <a3>u_long newval)
  */
 /*
- * casuword32(9)
- * <v0>uint32_t casuword(<a0>uint32_t *p, <a1>uint32_t oldval, 
- *							<a2>uint32_t newval)
+ * casueword32(9)
+ * <v0>uint32_t casueword(<a0>uint32_t *p, <a1>uint32_t oldval,
+ *			 <a2>uint32_t newval)
  */
-LEAF(casuword32)
+LEAF(casueword32)
 #ifndef __mips_n64
-XLEAF(casuword)
+XLEAF(casueword)
 #endif
 	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
@@ -390,26 +397,26 @@
 	PTR_L	v1, PC_CURPCB(v1)
 	PTR_S	v0, U_PCB_ONFAULT(v1)
 1:
-	move	t0, a2
-	ll	v0, 0(a0)
-	bne	a1, v0, 2f
+	move	t0, a3
+	ll	t1, 0(a0)
+	bne	a1, t1, 2f
 	nop
 	sc	t0, 0(a0)		# store word
 	beqz	t0, 1b
 	nop
 	j	3f
-	nop
+	li	v0, 0
 2:
 	li	v0, -1
 3:
 	PTR_S	zero, U_PCB_ONFAULT(v1)
 	jr	ra
-	nop
-END(casuword32)
+	sw	t1, 0(a2)		# unconditionally store old word
+END(casueword32)
 
 #ifdef __mips_n64
-LEAF(casuword64)
-XLEAF(casuword)
+LEAF(casueword64)
+XLEAF(casueword)
 	PTR_LA	v0, fswberr
 	blt	a0, zero, fswberr	# make sure address is in user space
 	nop
@@ -417,22 +424,22 @@
 	PTR_L	v1, PC_CURPCB(v1)
 	PTR_S	v0, U_PCB_ONFAULT(v1)
 1:
-	move	t0, a2
-	lld	v0, 0(a0)
-	bne	a1, v0, 2f
+	move	t0, a3
+	lld	t1, 0(a0)
+	bne	a1, t1, 2f
 	nop
 	scd	t0, 0(a0)		# store double word
 	beqz	t0, 1b
 	nop
 	j	3f
-	nop
+	li	v0, 0
 2:
 	li	v0, -1
 3:
 	PTR_S	zero, U_PCB_ONFAULT(v1)
 	jr	ra
-	nop
-END(casuword64)
+	sd	t1, 0(a2)		# unconditionally store old word
+END(casueword64)
 #endif
 
 /*