Index: sys/dev/uart/uart_dev_msm.h =================================================================== --- sys/dev/uart/uart_dev_msm.h +++ sys/dev/uart/uart_dev_msm.h @@ -177,6 +177,11 @@ /* UART Data Mover Enable Register */ #define UART_DM_DMEN 0x3c +/* + * Single-Character mode for RX channel (every character received + * is zero-padded into a word). + */ +#define UART_DM_DMEN_RX_SC_ENABLE (1 << 5) /* Number of characters for Transmission */ #define UART_DM_NO_CHARS_FOR_TX 0x40 Index: sys/dev/uart/uart_dev_msm.c =================================================================== --- sys/dev/uart/uart_dev_msm.c +++ sys/dev/uart/uart_dev_msm.c @@ -37,7 +37,9 @@ #include #include #include +#ifndef __aarch64__ #include +#endif #include #include @@ -122,9 +124,6 @@ return (EINVAL); } uart_setreg(bas, UART_DM_MR2, ulcon); - - /* Set 115200 for both TX and RX. */ - uart_setreg(bas, UART_DM_CSR, UART_DM_CSR_115200); uart_barrier(bas); return (0); @@ -143,6 +142,8 @@ msm_probe(struct uart_bas *bas) { + bas->regiowidth = 4; + return (0); } @@ -203,7 +204,7 @@ /* Enable/Disable Rx/Tx DM interfaces */ /* Disable Data Mover for now. */ - uart_setreg(bas, UART_DM_DMEN, 0x0); + uart_setreg(bas, UART_DM_DMEN, UART_DM_DMEN_RX_SC_ENABLE); /* Enable transmitter and receiver */ uart_setreg(bas, UART_DM_CR, UART_DM_CR_RX_ENABLE); @@ -239,6 +240,7 @@ while ((uart_getreg(bas, UART_DM_ISR) & UART_DM_TX_READY) == 0 && --limit) DELAY(4); + SETREG(bas, UART_DM_CR, UART_DM_CLEAR_TX_READY); } /* FIFO is ready, write number of characters to be written */ uart_setreg(bas, UART_DM_NO_CHARS_FOR_TX, 1); @@ -324,6 +326,10 @@ int msm_bus_probe(struct uart_softc *sc) { + struct uart_bas *bas; + + bas = &sc->sc_bas; + bas->regiowidth = 4; sc->sc_txfifosz = 64; sc->sc_rxfifosz = 64; @@ -570,7 +576,8 @@ }; static struct ofw_compat_data compat_data[] = { - {"qcom,msm-uartdm", (uintptr_t)&uart_msm_class}, - {NULL, (uintptr_t)NULL}, + {"qcom,msm-uartdm-v1.4", (uintptr_t)&uart_msm_class}, + {"qcom,msm-uartdm", (uintptr_t)&uart_msm_class}, + {NULL, (uintptr_t)NULL}, }; UART_FDT_CLASS_AND_DEVICE(compat_data);