Index: sys/arm/mv/armada38x/armada38x.c =================================================================== --- sys/arm/mv/armada38x/armada38x.c +++ sys/arm/mv/armada38x/armada38x.c @@ -29,6 +29,7 @@ __FBSDID("$FreeBSD$"); #include +#include #include #include @@ -43,6 +44,10 @@ int armada38x_win_set_iosync_barrier(void); int armada38x_mbus_optimization(void); +static int hw_clockrate; +SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD, + &hw_clockrate, 0, "CPU instruction clock rate"); + uint32_t get_tclk(void) { @@ -60,6 +65,29 @@ return (TCLK_200MHZ); } +uint32_t +get_cpu_freq(void) +{ + uint32_t sar; + + static const uint32_t cpu_frequencies[] = { + 0, 0, 0, 0, + 1066, 0, 0, 0, + 1332, 0, 0, 0, + 1600, 0, 0, 0, + 1866, 0, 0, 2000 + }; + + sar = (uint32_t)get_sar_value(); + sar = (sar & CPU_DDR_CLK_MASK) >> CPU_DDR_CLK_SHIFT; + if (sar >= nitems(cpu_frequencies)) + return (0); + + hw_clockrate = cpu_frequencies[sar]; + + return (hw_clockrate * 1000 * 1000); +} + int armada38x_win_set_iosync_barrier(void) { Index: sys/arm/mv/mv_common.c =================================================================== --- sys/arm/mv/mv_common.c +++ sys/arm/mv/mv_common.c @@ -133,6 +133,8 @@ typedef void (*decode_win_setup_t)(u_long); typedef void (*dump_win_t)(u_long); +uint32_t mv_default_get_cpu_freq(void); + /* * The power status of device feature is only supported on * Kirkwood and Discovery SoCs. @@ -413,10 +415,18 @@ *rev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 8) & 0xff; } +uint32_t +mv_default_get_cpu_freq(void) +{ + + return (0); +} +__weak_reference(mv_default_get_cpu_freq, get_cpu_freq); + static void soc_identify(void) { - uint32_t d, r, size, mode; + uint32_t d, r, size, mode, freq; const char *dev; const char *rev; @@ -509,7 +519,11 @@ printf("%s", dev); if (*rev != '\0') printf(" rev %s", rev); - printf(", TClock %dMHz\n", get_tclk() / 1000 / 1000); + printf(", TClock %dMHz", get_tclk() / 1000 / 1000); + freq = get_cpu_freq(); + if (freq != 0) + printf(", Frequency %dMHz", freq / 1000 / 1000); + printf("\n"); mode = read_cpu_ctrl(CPU_CONFIG); printf(" Instruction cache prefetch %s, data cache prefetch %s\n", Index: sys/arm/mv/mvreg.h =================================================================== --- sys/arm/mv/mvreg.h +++ sys/arm/mv/mvreg.h @@ -341,8 +341,10 @@ #define TCLK_MASK 0x00000180 #define TCLK_SHIFT 0x07 #elif defined(SOC_MV_ARMADA38X) -#define TCLK_MASK 0x00008000 -#define TCLK_SHIFT 15 +#define TCLK_MASK 0x00008000 +#define TCLK_SHIFT 15 +#define CPU_DDR_CLK_MASK 0x00007c00 +#define CPU_DDR_CLK_SHIFT 10 #endif #define TCLK_100MHZ 100000000 Index: sys/arm/mv/mvvar.h =================================================================== --- sys/arm/mv/mvvar.h +++ sys/arm/mv/mvvar.h @@ -104,6 +104,7 @@ uint32_t cpu_extra_feat(void); uint32_t get_tclk(void); +uint32_t get_cpu_freq(void); uint32_t get_l2clk(void); uint32_t read_cpu_ctrl(uint32_t); void write_cpu_ctrl(uint32_t, uint32_t);